region_devs.c 24 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724725726727728729730731732733734735736737738739740741742743744745746747748749750751752753754755756757758759760761762763764765766767768769770771772773774775776777778779780781782783784785786787788789790791792793794795796797798799800801802803804805806807808809810811812813814815816817818819820821822823824825826827828829830831832833834835836837838839840841842843844845846847848849850851852853854855856857858859860861862863864865866867868869870871872873874875876877878879880881882883884885886887888889890891892893894895896897898899900901902903904905906907908909910911912913914915916917918919920921922923924925926927928929930931932933934935936937938939940941942943944945946
  1. /*
  2. * Copyright(c) 2013-2015 Intel Corporation. All rights reserved.
  3. *
  4. * This program is free software; you can redistribute it and/or modify
  5. * it under the terms of version 2 of the GNU General Public License as
  6. * published by the Free Software Foundation.
  7. *
  8. * This program is distributed in the hope that it will be useful, but
  9. * WITHOUT ANY WARRANTY; without even the implied warranty of
  10. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  11. * General Public License for more details.
  12. */
  13. #include <linux/scatterlist.h>
  14. #include <linux/highmem.h>
  15. #include <linux/sched.h>
  16. #include <linux/slab.h>
  17. #include <linux/hash.h>
  18. #include <linux/pmem.h>
  19. #include <linux/sort.h>
  20. #include <linux/io.h>
  21. #include <linux/nd.h>
  22. #include "nd-core.h"
  23. #include "nd.h"
  24. /*
  25. * For readq() and writeq() on 32-bit builds, the hi-lo, lo-hi order is
  26. * irrelevant.
  27. */
  28. #include <linux/io-64-nonatomic-hi-lo.h>
  29. static DEFINE_IDA(region_ida);
  30. static DEFINE_PER_CPU(int, flush_idx);
  31. static int nvdimm_map_flush(struct device *dev, struct nvdimm *nvdimm, int dimm,
  32. struct nd_region_data *ndrd)
  33. {
  34. int i, j;
  35. dev_dbg(dev, "%s: map %d flush address%s\n", nvdimm_name(nvdimm),
  36. nvdimm->num_flush, nvdimm->num_flush == 1 ? "" : "es");
  37. for (i = 0; i < (1 << ndrd->hints_shift); i++) {
  38. struct resource *res = &nvdimm->flush_wpq[i];
  39. unsigned long pfn = PHYS_PFN(res->start);
  40. void __iomem *flush_page;
  41. /* check if flush hints share a page */
  42. for (j = 0; j < i; j++) {
  43. struct resource *res_j = &nvdimm->flush_wpq[j];
  44. unsigned long pfn_j = PHYS_PFN(res_j->start);
  45. if (pfn == pfn_j)
  46. break;
  47. }
  48. if (j < i)
  49. flush_page = (void __iomem *) ((unsigned long)
  50. ndrd_get_flush_wpq(ndrd, dimm, j)
  51. & PAGE_MASK);
  52. else
  53. flush_page = devm_nvdimm_ioremap(dev,
  54. PFN_PHYS(pfn), PAGE_SIZE);
  55. if (!flush_page)
  56. return -ENXIO;
  57. ndrd_set_flush_wpq(ndrd, dimm, i, flush_page
  58. + (res->start & ~PAGE_MASK));
  59. }
  60. return 0;
  61. }
  62. int nd_region_activate(struct nd_region *nd_region)
  63. {
  64. int i, num_flush = 0;
  65. struct nd_region_data *ndrd;
  66. struct device *dev = &nd_region->dev;
  67. size_t flush_data_size = sizeof(void *);
  68. nvdimm_bus_lock(&nd_region->dev);
  69. for (i = 0; i < nd_region->ndr_mappings; i++) {
  70. struct nd_mapping *nd_mapping = &nd_region->mapping[i];
  71. struct nvdimm *nvdimm = nd_mapping->nvdimm;
  72. /* at least one null hint slot per-dimm for the "no-hint" case */
  73. flush_data_size += sizeof(void *);
  74. num_flush = min_not_zero(num_flush, nvdimm->num_flush);
  75. if (!nvdimm->num_flush)
  76. continue;
  77. flush_data_size += nvdimm->num_flush * sizeof(void *);
  78. }
  79. nvdimm_bus_unlock(&nd_region->dev);
  80. ndrd = devm_kzalloc(dev, sizeof(*ndrd) + flush_data_size, GFP_KERNEL);
  81. if (!ndrd)
  82. return -ENOMEM;
  83. dev_set_drvdata(dev, ndrd);
  84. if (!num_flush)
  85. return 0;
  86. ndrd->hints_shift = ilog2(num_flush);
  87. for (i = 0; i < nd_region->ndr_mappings; i++) {
  88. struct nd_mapping *nd_mapping = &nd_region->mapping[i];
  89. struct nvdimm *nvdimm = nd_mapping->nvdimm;
  90. int rc = nvdimm_map_flush(&nd_region->dev, nvdimm, i, ndrd);
  91. if (rc)
  92. return rc;
  93. }
  94. return 0;
  95. }
  96. static void nd_region_release(struct device *dev)
  97. {
  98. struct nd_region *nd_region = to_nd_region(dev);
  99. u16 i;
  100. for (i = 0; i < nd_region->ndr_mappings; i++) {
  101. struct nd_mapping *nd_mapping = &nd_region->mapping[i];
  102. struct nvdimm *nvdimm = nd_mapping->nvdimm;
  103. put_device(&nvdimm->dev);
  104. }
  105. free_percpu(nd_region->lane);
  106. ida_simple_remove(&region_ida, nd_region->id);
  107. if (is_nd_blk(dev))
  108. kfree(to_nd_blk_region(dev));
  109. else
  110. kfree(nd_region);
  111. }
  112. static struct device_type nd_blk_device_type = {
  113. .name = "nd_blk",
  114. .release = nd_region_release,
  115. };
  116. static struct device_type nd_pmem_device_type = {
  117. .name = "nd_pmem",
  118. .release = nd_region_release,
  119. };
  120. static struct device_type nd_volatile_device_type = {
  121. .name = "nd_volatile",
  122. .release = nd_region_release,
  123. };
  124. bool is_nd_pmem(struct device *dev)
  125. {
  126. return dev ? dev->type == &nd_pmem_device_type : false;
  127. }
  128. bool is_nd_blk(struct device *dev)
  129. {
  130. return dev ? dev->type == &nd_blk_device_type : false;
  131. }
  132. struct nd_region *to_nd_region(struct device *dev)
  133. {
  134. struct nd_region *nd_region = container_of(dev, struct nd_region, dev);
  135. WARN_ON(dev->type->release != nd_region_release);
  136. return nd_region;
  137. }
  138. EXPORT_SYMBOL_GPL(to_nd_region);
  139. struct nd_blk_region *to_nd_blk_region(struct device *dev)
  140. {
  141. struct nd_region *nd_region = to_nd_region(dev);
  142. WARN_ON(!is_nd_blk(dev));
  143. return container_of(nd_region, struct nd_blk_region, nd_region);
  144. }
  145. EXPORT_SYMBOL_GPL(to_nd_blk_region);
  146. void *nd_region_provider_data(struct nd_region *nd_region)
  147. {
  148. return nd_region->provider_data;
  149. }
  150. EXPORT_SYMBOL_GPL(nd_region_provider_data);
  151. void *nd_blk_region_provider_data(struct nd_blk_region *ndbr)
  152. {
  153. return ndbr->blk_provider_data;
  154. }
  155. EXPORT_SYMBOL_GPL(nd_blk_region_provider_data);
  156. void nd_blk_region_set_provider_data(struct nd_blk_region *ndbr, void *data)
  157. {
  158. ndbr->blk_provider_data = data;
  159. }
  160. EXPORT_SYMBOL_GPL(nd_blk_region_set_provider_data);
  161. /**
  162. * nd_region_to_nstype() - region to an integer namespace type
  163. * @nd_region: region-device to interrogate
  164. *
  165. * This is the 'nstype' attribute of a region as well, an input to the
  166. * MODALIAS for namespace devices, and bit number for a nvdimm_bus to match
  167. * namespace devices with namespace drivers.
  168. */
  169. int nd_region_to_nstype(struct nd_region *nd_region)
  170. {
  171. if (is_nd_pmem(&nd_region->dev)) {
  172. u16 i, alias;
  173. for (i = 0, alias = 0; i < nd_region->ndr_mappings; i++) {
  174. struct nd_mapping *nd_mapping = &nd_region->mapping[i];
  175. struct nvdimm *nvdimm = nd_mapping->nvdimm;
  176. if (nvdimm->flags & NDD_ALIASING)
  177. alias++;
  178. }
  179. if (alias)
  180. return ND_DEVICE_NAMESPACE_PMEM;
  181. else
  182. return ND_DEVICE_NAMESPACE_IO;
  183. } else if (is_nd_blk(&nd_region->dev)) {
  184. return ND_DEVICE_NAMESPACE_BLK;
  185. }
  186. return 0;
  187. }
  188. EXPORT_SYMBOL(nd_region_to_nstype);
  189. static ssize_t size_show(struct device *dev,
  190. struct device_attribute *attr, char *buf)
  191. {
  192. struct nd_region *nd_region = to_nd_region(dev);
  193. unsigned long long size = 0;
  194. if (is_nd_pmem(dev)) {
  195. size = nd_region->ndr_size;
  196. } else if (nd_region->ndr_mappings == 1) {
  197. struct nd_mapping *nd_mapping = &nd_region->mapping[0];
  198. size = nd_mapping->size;
  199. }
  200. return sprintf(buf, "%llu\n", size);
  201. }
  202. static DEVICE_ATTR_RO(size);
  203. static ssize_t mappings_show(struct device *dev,
  204. struct device_attribute *attr, char *buf)
  205. {
  206. struct nd_region *nd_region = to_nd_region(dev);
  207. return sprintf(buf, "%d\n", nd_region->ndr_mappings);
  208. }
  209. static DEVICE_ATTR_RO(mappings);
  210. static ssize_t nstype_show(struct device *dev,
  211. struct device_attribute *attr, char *buf)
  212. {
  213. struct nd_region *nd_region = to_nd_region(dev);
  214. return sprintf(buf, "%d\n", nd_region_to_nstype(nd_region));
  215. }
  216. static DEVICE_ATTR_RO(nstype);
  217. static ssize_t set_cookie_show(struct device *dev,
  218. struct device_attribute *attr, char *buf)
  219. {
  220. struct nd_region *nd_region = to_nd_region(dev);
  221. struct nd_interleave_set *nd_set = nd_region->nd_set;
  222. if (is_nd_pmem(dev) && nd_set)
  223. /* pass, should be precluded by region_visible */;
  224. else
  225. return -ENXIO;
  226. return sprintf(buf, "%#llx\n", nd_set->cookie);
  227. }
  228. static DEVICE_ATTR_RO(set_cookie);
  229. resource_size_t nd_region_available_dpa(struct nd_region *nd_region)
  230. {
  231. resource_size_t blk_max_overlap = 0, available, overlap;
  232. int i;
  233. WARN_ON(!is_nvdimm_bus_locked(&nd_region->dev));
  234. retry:
  235. available = 0;
  236. overlap = blk_max_overlap;
  237. for (i = 0; i < nd_region->ndr_mappings; i++) {
  238. struct nd_mapping *nd_mapping = &nd_region->mapping[i];
  239. struct nvdimm_drvdata *ndd = to_ndd(nd_mapping);
  240. /* if a dimm is disabled the available capacity is zero */
  241. if (!ndd)
  242. return 0;
  243. if (is_nd_pmem(&nd_region->dev)) {
  244. available += nd_pmem_available_dpa(nd_region,
  245. nd_mapping, &overlap);
  246. if (overlap > blk_max_overlap) {
  247. blk_max_overlap = overlap;
  248. goto retry;
  249. }
  250. } else if (is_nd_blk(&nd_region->dev)) {
  251. available += nd_blk_available_dpa(nd_mapping);
  252. }
  253. }
  254. return available;
  255. }
  256. static ssize_t available_size_show(struct device *dev,
  257. struct device_attribute *attr, char *buf)
  258. {
  259. struct nd_region *nd_region = to_nd_region(dev);
  260. unsigned long long available = 0;
  261. /*
  262. * Flush in-flight updates and grab a snapshot of the available
  263. * size. Of course, this value is potentially invalidated the
  264. * memory nvdimm_bus_lock() is dropped, but that's userspace's
  265. * problem to not race itself.
  266. */
  267. nvdimm_bus_lock(dev);
  268. wait_nvdimm_bus_probe_idle(dev);
  269. available = nd_region_available_dpa(nd_region);
  270. nvdimm_bus_unlock(dev);
  271. return sprintf(buf, "%llu\n", available);
  272. }
  273. static DEVICE_ATTR_RO(available_size);
  274. static ssize_t init_namespaces_show(struct device *dev,
  275. struct device_attribute *attr, char *buf)
  276. {
  277. struct nd_region_data *ndrd = dev_get_drvdata(dev);
  278. ssize_t rc;
  279. nvdimm_bus_lock(dev);
  280. if (ndrd)
  281. rc = sprintf(buf, "%d/%d\n", ndrd->ns_active, ndrd->ns_count);
  282. else
  283. rc = -ENXIO;
  284. nvdimm_bus_unlock(dev);
  285. return rc;
  286. }
  287. static DEVICE_ATTR_RO(init_namespaces);
  288. static ssize_t namespace_seed_show(struct device *dev,
  289. struct device_attribute *attr, char *buf)
  290. {
  291. struct nd_region *nd_region = to_nd_region(dev);
  292. ssize_t rc;
  293. nvdimm_bus_lock(dev);
  294. if (nd_region->ns_seed)
  295. rc = sprintf(buf, "%s\n", dev_name(nd_region->ns_seed));
  296. else
  297. rc = sprintf(buf, "\n");
  298. nvdimm_bus_unlock(dev);
  299. return rc;
  300. }
  301. static DEVICE_ATTR_RO(namespace_seed);
  302. static ssize_t btt_seed_show(struct device *dev,
  303. struct device_attribute *attr, char *buf)
  304. {
  305. struct nd_region *nd_region = to_nd_region(dev);
  306. ssize_t rc;
  307. nvdimm_bus_lock(dev);
  308. if (nd_region->btt_seed)
  309. rc = sprintf(buf, "%s\n", dev_name(nd_region->btt_seed));
  310. else
  311. rc = sprintf(buf, "\n");
  312. nvdimm_bus_unlock(dev);
  313. return rc;
  314. }
  315. static DEVICE_ATTR_RO(btt_seed);
  316. static ssize_t pfn_seed_show(struct device *dev,
  317. struct device_attribute *attr, char *buf)
  318. {
  319. struct nd_region *nd_region = to_nd_region(dev);
  320. ssize_t rc;
  321. nvdimm_bus_lock(dev);
  322. if (nd_region->pfn_seed)
  323. rc = sprintf(buf, "%s\n", dev_name(nd_region->pfn_seed));
  324. else
  325. rc = sprintf(buf, "\n");
  326. nvdimm_bus_unlock(dev);
  327. return rc;
  328. }
  329. static DEVICE_ATTR_RO(pfn_seed);
  330. static ssize_t dax_seed_show(struct device *dev,
  331. struct device_attribute *attr, char *buf)
  332. {
  333. struct nd_region *nd_region = to_nd_region(dev);
  334. ssize_t rc;
  335. nvdimm_bus_lock(dev);
  336. if (nd_region->dax_seed)
  337. rc = sprintf(buf, "%s\n", dev_name(nd_region->dax_seed));
  338. else
  339. rc = sprintf(buf, "\n");
  340. nvdimm_bus_unlock(dev);
  341. return rc;
  342. }
  343. static DEVICE_ATTR_RO(dax_seed);
  344. static ssize_t read_only_show(struct device *dev,
  345. struct device_attribute *attr, char *buf)
  346. {
  347. struct nd_region *nd_region = to_nd_region(dev);
  348. return sprintf(buf, "%d\n", nd_region->ro);
  349. }
  350. static ssize_t read_only_store(struct device *dev,
  351. struct device_attribute *attr, const char *buf, size_t len)
  352. {
  353. bool ro;
  354. int rc = strtobool(buf, &ro);
  355. struct nd_region *nd_region = to_nd_region(dev);
  356. if (rc)
  357. return rc;
  358. nd_region->ro = ro;
  359. return len;
  360. }
  361. static DEVICE_ATTR_RW(read_only);
  362. static struct attribute *nd_region_attributes[] = {
  363. &dev_attr_size.attr,
  364. &dev_attr_nstype.attr,
  365. &dev_attr_mappings.attr,
  366. &dev_attr_btt_seed.attr,
  367. &dev_attr_pfn_seed.attr,
  368. &dev_attr_dax_seed.attr,
  369. &dev_attr_read_only.attr,
  370. &dev_attr_set_cookie.attr,
  371. &dev_attr_available_size.attr,
  372. &dev_attr_namespace_seed.attr,
  373. &dev_attr_init_namespaces.attr,
  374. NULL,
  375. };
  376. static umode_t region_visible(struct kobject *kobj, struct attribute *a, int n)
  377. {
  378. struct device *dev = container_of(kobj, typeof(*dev), kobj);
  379. struct nd_region *nd_region = to_nd_region(dev);
  380. struct nd_interleave_set *nd_set = nd_region->nd_set;
  381. int type = nd_region_to_nstype(nd_region);
  382. if (!is_nd_pmem(dev) && a == &dev_attr_pfn_seed.attr)
  383. return 0;
  384. if (!is_nd_pmem(dev) && a == &dev_attr_dax_seed.attr)
  385. return 0;
  386. if (a != &dev_attr_set_cookie.attr
  387. && a != &dev_attr_available_size.attr)
  388. return a->mode;
  389. if ((type == ND_DEVICE_NAMESPACE_PMEM
  390. || type == ND_DEVICE_NAMESPACE_BLK)
  391. && a == &dev_attr_available_size.attr)
  392. return a->mode;
  393. else if (is_nd_pmem(dev) && nd_set)
  394. return a->mode;
  395. return 0;
  396. }
  397. struct attribute_group nd_region_attribute_group = {
  398. .attrs = nd_region_attributes,
  399. .is_visible = region_visible,
  400. };
  401. EXPORT_SYMBOL_GPL(nd_region_attribute_group);
  402. u64 nd_region_interleave_set_cookie(struct nd_region *nd_region)
  403. {
  404. struct nd_interleave_set *nd_set = nd_region->nd_set;
  405. if (nd_set)
  406. return nd_set->cookie;
  407. return 0;
  408. }
  409. /*
  410. * Upon successful probe/remove, take/release a reference on the
  411. * associated interleave set (if present), and plant new btt + namespace
  412. * seeds. Also, on the removal of a BLK region, notify the provider to
  413. * disable the region.
  414. */
  415. static void nd_region_notify_driver_action(struct nvdimm_bus *nvdimm_bus,
  416. struct device *dev, bool probe)
  417. {
  418. struct nd_region *nd_region;
  419. if (!probe && (is_nd_pmem(dev) || is_nd_blk(dev))) {
  420. int i;
  421. nd_region = to_nd_region(dev);
  422. for (i = 0; i < nd_region->ndr_mappings; i++) {
  423. struct nd_mapping *nd_mapping = &nd_region->mapping[i];
  424. struct nvdimm_drvdata *ndd = nd_mapping->ndd;
  425. struct nvdimm *nvdimm = nd_mapping->nvdimm;
  426. kfree(nd_mapping->labels);
  427. nd_mapping->labels = NULL;
  428. put_ndd(ndd);
  429. nd_mapping->ndd = NULL;
  430. if (ndd)
  431. atomic_dec(&nvdimm->busy);
  432. }
  433. if (is_nd_pmem(dev))
  434. return;
  435. }
  436. if (dev->parent && is_nd_blk(dev->parent) && probe) {
  437. nd_region = to_nd_region(dev->parent);
  438. nvdimm_bus_lock(dev);
  439. if (nd_region->ns_seed == dev)
  440. nd_region_create_blk_seed(nd_region);
  441. nvdimm_bus_unlock(dev);
  442. }
  443. if (is_nd_btt(dev) && probe) {
  444. struct nd_btt *nd_btt = to_nd_btt(dev);
  445. nd_region = to_nd_region(dev->parent);
  446. nvdimm_bus_lock(dev);
  447. if (nd_region->btt_seed == dev)
  448. nd_region_create_btt_seed(nd_region);
  449. if (nd_region->ns_seed == &nd_btt->ndns->dev &&
  450. is_nd_blk(dev->parent))
  451. nd_region_create_blk_seed(nd_region);
  452. nvdimm_bus_unlock(dev);
  453. }
  454. if (is_nd_pfn(dev) && probe) {
  455. nd_region = to_nd_region(dev->parent);
  456. nvdimm_bus_lock(dev);
  457. if (nd_region->pfn_seed == dev)
  458. nd_region_create_pfn_seed(nd_region);
  459. nvdimm_bus_unlock(dev);
  460. }
  461. if (is_nd_dax(dev) && probe) {
  462. nd_region = to_nd_region(dev->parent);
  463. nvdimm_bus_lock(dev);
  464. if (nd_region->dax_seed == dev)
  465. nd_region_create_dax_seed(nd_region);
  466. nvdimm_bus_unlock(dev);
  467. }
  468. }
  469. void nd_region_probe_success(struct nvdimm_bus *nvdimm_bus, struct device *dev)
  470. {
  471. nd_region_notify_driver_action(nvdimm_bus, dev, true);
  472. }
  473. void nd_region_disable(struct nvdimm_bus *nvdimm_bus, struct device *dev)
  474. {
  475. nd_region_notify_driver_action(nvdimm_bus, dev, false);
  476. }
  477. static ssize_t mappingN(struct device *dev, char *buf, int n)
  478. {
  479. struct nd_region *nd_region = to_nd_region(dev);
  480. struct nd_mapping *nd_mapping;
  481. struct nvdimm *nvdimm;
  482. if (n >= nd_region->ndr_mappings)
  483. return -ENXIO;
  484. nd_mapping = &nd_region->mapping[n];
  485. nvdimm = nd_mapping->nvdimm;
  486. return sprintf(buf, "%s,%llu,%llu\n", dev_name(&nvdimm->dev),
  487. nd_mapping->start, nd_mapping->size);
  488. }
  489. #define REGION_MAPPING(idx) \
  490. static ssize_t mapping##idx##_show(struct device *dev, \
  491. struct device_attribute *attr, char *buf) \
  492. { \
  493. return mappingN(dev, buf, idx); \
  494. } \
  495. static DEVICE_ATTR_RO(mapping##idx)
  496. /*
  497. * 32 should be enough for a while, even in the presence of socket
  498. * interleave a 32-way interleave set is a degenerate case.
  499. */
  500. REGION_MAPPING(0);
  501. REGION_MAPPING(1);
  502. REGION_MAPPING(2);
  503. REGION_MAPPING(3);
  504. REGION_MAPPING(4);
  505. REGION_MAPPING(5);
  506. REGION_MAPPING(6);
  507. REGION_MAPPING(7);
  508. REGION_MAPPING(8);
  509. REGION_MAPPING(9);
  510. REGION_MAPPING(10);
  511. REGION_MAPPING(11);
  512. REGION_MAPPING(12);
  513. REGION_MAPPING(13);
  514. REGION_MAPPING(14);
  515. REGION_MAPPING(15);
  516. REGION_MAPPING(16);
  517. REGION_MAPPING(17);
  518. REGION_MAPPING(18);
  519. REGION_MAPPING(19);
  520. REGION_MAPPING(20);
  521. REGION_MAPPING(21);
  522. REGION_MAPPING(22);
  523. REGION_MAPPING(23);
  524. REGION_MAPPING(24);
  525. REGION_MAPPING(25);
  526. REGION_MAPPING(26);
  527. REGION_MAPPING(27);
  528. REGION_MAPPING(28);
  529. REGION_MAPPING(29);
  530. REGION_MAPPING(30);
  531. REGION_MAPPING(31);
  532. static umode_t mapping_visible(struct kobject *kobj, struct attribute *a, int n)
  533. {
  534. struct device *dev = container_of(kobj, struct device, kobj);
  535. struct nd_region *nd_region = to_nd_region(dev);
  536. if (n < nd_region->ndr_mappings)
  537. return a->mode;
  538. return 0;
  539. }
  540. static struct attribute *mapping_attributes[] = {
  541. &dev_attr_mapping0.attr,
  542. &dev_attr_mapping1.attr,
  543. &dev_attr_mapping2.attr,
  544. &dev_attr_mapping3.attr,
  545. &dev_attr_mapping4.attr,
  546. &dev_attr_mapping5.attr,
  547. &dev_attr_mapping6.attr,
  548. &dev_attr_mapping7.attr,
  549. &dev_attr_mapping8.attr,
  550. &dev_attr_mapping9.attr,
  551. &dev_attr_mapping10.attr,
  552. &dev_attr_mapping11.attr,
  553. &dev_attr_mapping12.attr,
  554. &dev_attr_mapping13.attr,
  555. &dev_attr_mapping14.attr,
  556. &dev_attr_mapping15.attr,
  557. &dev_attr_mapping16.attr,
  558. &dev_attr_mapping17.attr,
  559. &dev_attr_mapping18.attr,
  560. &dev_attr_mapping19.attr,
  561. &dev_attr_mapping20.attr,
  562. &dev_attr_mapping21.attr,
  563. &dev_attr_mapping22.attr,
  564. &dev_attr_mapping23.attr,
  565. &dev_attr_mapping24.attr,
  566. &dev_attr_mapping25.attr,
  567. &dev_attr_mapping26.attr,
  568. &dev_attr_mapping27.attr,
  569. &dev_attr_mapping28.attr,
  570. &dev_attr_mapping29.attr,
  571. &dev_attr_mapping30.attr,
  572. &dev_attr_mapping31.attr,
  573. NULL,
  574. };
  575. struct attribute_group nd_mapping_attribute_group = {
  576. .is_visible = mapping_visible,
  577. .attrs = mapping_attributes,
  578. };
  579. EXPORT_SYMBOL_GPL(nd_mapping_attribute_group);
  580. int nd_blk_region_init(struct nd_region *nd_region)
  581. {
  582. struct device *dev = &nd_region->dev;
  583. struct nvdimm_bus *nvdimm_bus = walk_to_nvdimm_bus(dev);
  584. if (!is_nd_blk(dev))
  585. return 0;
  586. if (nd_region->ndr_mappings < 1) {
  587. dev_err(dev, "invalid BLK region\n");
  588. return -ENXIO;
  589. }
  590. return to_nd_blk_region(dev)->enable(nvdimm_bus, dev);
  591. }
  592. /**
  593. * nd_region_acquire_lane - allocate and lock a lane
  594. * @nd_region: region id and number of lanes possible
  595. *
  596. * A lane correlates to a BLK-data-window and/or a log slot in the BTT.
  597. * We optimize for the common case where there are 256 lanes, one
  598. * per-cpu. For larger systems we need to lock to share lanes. For now
  599. * this implementation assumes the cost of maintaining an allocator for
  600. * free lanes is on the order of the lock hold time, so it implements a
  601. * static lane = cpu % num_lanes mapping.
  602. *
  603. * In the case of a BTT instance on top of a BLK namespace a lane may be
  604. * acquired recursively. We lock on the first instance.
  605. *
  606. * In the case of a BTT instance on top of PMEM, we only acquire a lane
  607. * for the BTT metadata updates.
  608. */
  609. unsigned int nd_region_acquire_lane(struct nd_region *nd_region)
  610. {
  611. unsigned int cpu, lane;
  612. cpu = get_cpu();
  613. if (nd_region->num_lanes < nr_cpu_ids) {
  614. struct nd_percpu_lane *ndl_lock, *ndl_count;
  615. lane = cpu % nd_region->num_lanes;
  616. ndl_count = per_cpu_ptr(nd_region->lane, cpu);
  617. ndl_lock = per_cpu_ptr(nd_region->lane, lane);
  618. if (ndl_count->count++ == 0)
  619. spin_lock(&ndl_lock->lock);
  620. } else
  621. lane = cpu;
  622. return lane;
  623. }
  624. EXPORT_SYMBOL(nd_region_acquire_lane);
  625. void nd_region_release_lane(struct nd_region *nd_region, unsigned int lane)
  626. {
  627. if (nd_region->num_lanes < nr_cpu_ids) {
  628. unsigned int cpu = get_cpu();
  629. struct nd_percpu_lane *ndl_lock, *ndl_count;
  630. ndl_count = per_cpu_ptr(nd_region->lane, cpu);
  631. ndl_lock = per_cpu_ptr(nd_region->lane, lane);
  632. if (--ndl_count->count == 0)
  633. spin_unlock(&ndl_lock->lock);
  634. put_cpu();
  635. }
  636. put_cpu();
  637. }
  638. EXPORT_SYMBOL(nd_region_release_lane);
  639. static struct nd_region *nd_region_create(struct nvdimm_bus *nvdimm_bus,
  640. struct nd_region_desc *ndr_desc, struct device_type *dev_type,
  641. const char *caller)
  642. {
  643. struct nd_region *nd_region;
  644. struct device *dev;
  645. void *region_buf;
  646. unsigned int i;
  647. int ro = 0;
  648. for (i = 0; i < ndr_desc->num_mappings; i++) {
  649. struct nd_mapping *nd_mapping = &ndr_desc->nd_mapping[i];
  650. struct nvdimm *nvdimm = nd_mapping->nvdimm;
  651. if ((nd_mapping->start | nd_mapping->size) % SZ_4K) {
  652. dev_err(&nvdimm_bus->dev, "%s: %s mapping%d is not 4K aligned\n",
  653. caller, dev_name(&nvdimm->dev), i);
  654. return NULL;
  655. }
  656. if (nvdimm->flags & NDD_UNARMED)
  657. ro = 1;
  658. }
  659. if (dev_type == &nd_blk_device_type) {
  660. struct nd_blk_region_desc *ndbr_desc;
  661. struct nd_blk_region *ndbr;
  662. ndbr_desc = to_blk_region_desc(ndr_desc);
  663. ndbr = kzalloc(sizeof(*ndbr) + sizeof(struct nd_mapping)
  664. * ndr_desc->num_mappings,
  665. GFP_KERNEL);
  666. if (ndbr) {
  667. nd_region = &ndbr->nd_region;
  668. ndbr->enable = ndbr_desc->enable;
  669. ndbr->do_io = ndbr_desc->do_io;
  670. }
  671. region_buf = ndbr;
  672. } else {
  673. nd_region = kzalloc(sizeof(struct nd_region)
  674. + sizeof(struct nd_mapping)
  675. * ndr_desc->num_mappings,
  676. GFP_KERNEL);
  677. region_buf = nd_region;
  678. }
  679. if (!region_buf)
  680. return NULL;
  681. nd_region->id = ida_simple_get(&region_ida, 0, 0, GFP_KERNEL);
  682. if (nd_region->id < 0)
  683. goto err_id;
  684. nd_region->lane = alloc_percpu(struct nd_percpu_lane);
  685. if (!nd_region->lane)
  686. goto err_percpu;
  687. for (i = 0; i < nr_cpu_ids; i++) {
  688. struct nd_percpu_lane *ndl;
  689. ndl = per_cpu_ptr(nd_region->lane, i);
  690. spin_lock_init(&ndl->lock);
  691. ndl->count = 0;
  692. }
  693. memcpy(nd_region->mapping, ndr_desc->nd_mapping,
  694. sizeof(struct nd_mapping) * ndr_desc->num_mappings);
  695. for (i = 0; i < ndr_desc->num_mappings; i++) {
  696. struct nd_mapping *nd_mapping = &ndr_desc->nd_mapping[i];
  697. struct nvdimm *nvdimm = nd_mapping->nvdimm;
  698. get_device(&nvdimm->dev);
  699. }
  700. nd_region->ndr_mappings = ndr_desc->num_mappings;
  701. nd_region->provider_data = ndr_desc->provider_data;
  702. nd_region->nd_set = ndr_desc->nd_set;
  703. nd_region->num_lanes = ndr_desc->num_lanes;
  704. nd_region->flags = ndr_desc->flags;
  705. nd_region->ro = ro;
  706. nd_region->numa_node = ndr_desc->numa_node;
  707. ida_init(&nd_region->ns_ida);
  708. ida_init(&nd_region->btt_ida);
  709. ida_init(&nd_region->pfn_ida);
  710. ida_init(&nd_region->dax_ida);
  711. dev = &nd_region->dev;
  712. dev_set_name(dev, "region%d", nd_region->id);
  713. dev->parent = &nvdimm_bus->dev;
  714. dev->type = dev_type;
  715. dev->groups = ndr_desc->attr_groups;
  716. nd_region->ndr_size = resource_size(ndr_desc->res);
  717. nd_region->ndr_start = ndr_desc->res->start;
  718. nd_device_register(dev);
  719. return nd_region;
  720. err_percpu:
  721. ida_simple_remove(&region_ida, nd_region->id);
  722. err_id:
  723. kfree(region_buf);
  724. return NULL;
  725. }
  726. struct nd_region *nvdimm_pmem_region_create(struct nvdimm_bus *nvdimm_bus,
  727. struct nd_region_desc *ndr_desc)
  728. {
  729. ndr_desc->num_lanes = ND_MAX_LANES;
  730. return nd_region_create(nvdimm_bus, ndr_desc, &nd_pmem_device_type,
  731. __func__);
  732. }
  733. EXPORT_SYMBOL_GPL(nvdimm_pmem_region_create);
  734. struct nd_region *nvdimm_blk_region_create(struct nvdimm_bus *nvdimm_bus,
  735. struct nd_region_desc *ndr_desc)
  736. {
  737. if (ndr_desc->num_mappings > 1)
  738. return NULL;
  739. ndr_desc->num_lanes = min(ndr_desc->num_lanes, ND_MAX_LANES);
  740. return nd_region_create(nvdimm_bus, ndr_desc, &nd_blk_device_type,
  741. __func__);
  742. }
  743. EXPORT_SYMBOL_GPL(nvdimm_blk_region_create);
  744. struct nd_region *nvdimm_volatile_region_create(struct nvdimm_bus *nvdimm_bus,
  745. struct nd_region_desc *ndr_desc)
  746. {
  747. ndr_desc->num_lanes = ND_MAX_LANES;
  748. return nd_region_create(nvdimm_bus, ndr_desc, &nd_volatile_device_type,
  749. __func__);
  750. }
  751. EXPORT_SYMBOL_GPL(nvdimm_volatile_region_create);
  752. /**
  753. * nvdimm_flush - flush any posted write queues between the cpu and pmem media
  754. * @nd_region: blk or interleaved pmem region
  755. */
  756. void nvdimm_flush(struct nd_region *nd_region)
  757. {
  758. struct nd_region_data *ndrd = dev_get_drvdata(&nd_region->dev);
  759. int i, idx;
  760. /*
  761. * Try to encourage some diversity in flush hint addresses
  762. * across cpus assuming a limited number of flush hints.
  763. */
  764. idx = this_cpu_read(flush_idx);
  765. idx = this_cpu_add_return(flush_idx, hash_32(current->pid + idx, 8));
  766. /*
  767. * The first wmb() is needed to 'sfence' all previous writes
  768. * such that they are architecturally visible for the platform
  769. * buffer flush. Note that we've already arranged for pmem
  770. * writes to avoid the cache via arch_memcpy_to_pmem(). The
  771. * final wmb() ensures ordering for the NVDIMM flush write.
  772. */
  773. wmb();
  774. for (i = 0; i < nd_region->ndr_mappings; i++)
  775. if (ndrd_get_flush_wpq(ndrd, i, 0))
  776. writeq(1, ndrd_get_flush_wpq(ndrd, i, idx));
  777. wmb();
  778. }
  779. EXPORT_SYMBOL_GPL(nvdimm_flush);
  780. /**
  781. * nvdimm_has_flush - determine write flushing requirements
  782. * @nd_region: blk or interleaved pmem region
  783. *
  784. * Returns 1 if writes require flushing
  785. * Returns 0 if writes do not require flushing
  786. * Returns -ENXIO if flushing capability can not be determined
  787. */
  788. int nvdimm_has_flush(struct nd_region *nd_region)
  789. {
  790. struct nd_region_data *ndrd = dev_get_drvdata(&nd_region->dev);
  791. int i;
  792. /* no nvdimm == flushing capability unknown */
  793. if (nd_region->ndr_mappings == 0)
  794. return -ENXIO;
  795. for (i = 0; i < nd_region->ndr_mappings; i++)
  796. /* flush hints present, flushing required */
  797. if (ndrd_get_flush_wpq(ndrd, i, 0))
  798. return 1;
  799. /*
  800. * The platform defines dimm devices without hints, assume
  801. * platform persistence mechanism like ADR
  802. */
  803. return 0;
  804. }
  805. EXPORT_SYMBOL_GPL(nvdimm_has_flush);
  806. void __exit nd_region_devs_exit(void)
  807. {
  808. ida_destroy(&region_ida);
  809. }