gpu_scheduler.c 18 KB

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  1. /*
  2. * Copyright 2015 Advanced Micro Devices, Inc.
  3. *
  4. * Permission is hereby granted, free of charge, to any person obtaining a
  5. * copy of this software and associated documentation files (the "Software"),
  6. * to deal in the Software without restriction, including without limitation
  7. * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  8. * and/or sell copies of the Software, and to permit persons to whom the
  9. * Software is furnished to do so, subject to the following conditions:
  10. *
  11. * The above copyright notice and this permission notice shall be included in
  12. * all copies or substantial portions of the Software.
  13. *
  14. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  15. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  16. * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  17. * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  18. * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  19. * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  20. * OTHER DEALINGS IN THE SOFTWARE.
  21. *
  22. *
  23. */
  24. #include <linux/kthread.h>
  25. #include <linux/wait.h>
  26. #include <linux/sched.h>
  27. #include <uapi/linux/sched/types.h>
  28. #include <drm/drmP.h>
  29. #include "gpu_scheduler.h"
  30. #define CREATE_TRACE_POINTS
  31. #include "gpu_sched_trace.h"
  32. static bool amd_sched_entity_is_ready(struct amd_sched_entity *entity);
  33. static void amd_sched_wakeup(struct amd_gpu_scheduler *sched);
  34. static void amd_sched_process_job(struct dma_fence *f, struct dma_fence_cb *cb);
  35. /* Initialize a given run queue struct */
  36. static void amd_sched_rq_init(struct amd_sched_rq *rq)
  37. {
  38. spin_lock_init(&rq->lock);
  39. INIT_LIST_HEAD(&rq->entities);
  40. rq->current_entity = NULL;
  41. }
  42. static void amd_sched_rq_add_entity(struct amd_sched_rq *rq,
  43. struct amd_sched_entity *entity)
  44. {
  45. if (!list_empty(&entity->list))
  46. return;
  47. spin_lock(&rq->lock);
  48. list_add_tail(&entity->list, &rq->entities);
  49. spin_unlock(&rq->lock);
  50. }
  51. static void amd_sched_rq_remove_entity(struct amd_sched_rq *rq,
  52. struct amd_sched_entity *entity)
  53. {
  54. if (list_empty(&entity->list))
  55. return;
  56. spin_lock(&rq->lock);
  57. list_del_init(&entity->list);
  58. if (rq->current_entity == entity)
  59. rq->current_entity = NULL;
  60. spin_unlock(&rq->lock);
  61. }
  62. /**
  63. * Select an entity which could provide a job to run
  64. *
  65. * @rq The run queue to check.
  66. *
  67. * Try to find a ready entity, returns NULL if none found.
  68. */
  69. static struct amd_sched_entity *
  70. amd_sched_rq_select_entity(struct amd_sched_rq *rq)
  71. {
  72. struct amd_sched_entity *entity;
  73. spin_lock(&rq->lock);
  74. entity = rq->current_entity;
  75. if (entity) {
  76. list_for_each_entry_continue(entity, &rq->entities, list) {
  77. if (amd_sched_entity_is_ready(entity)) {
  78. rq->current_entity = entity;
  79. spin_unlock(&rq->lock);
  80. return entity;
  81. }
  82. }
  83. }
  84. list_for_each_entry(entity, &rq->entities, list) {
  85. if (amd_sched_entity_is_ready(entity)) {
  86. rq->current_entity = entity;
  87. spin_unlock(&rq->lock);
  88. return entity;
  89. }
  90. if (entity == rq->current_entity)
  91. break;
  92. }
  93. spin_unlock(&rq->lock);
  94. return NULL;
  95. }
  96. /**
  97. * Init a context entity used by scheduler when submit to HW ring.
  98. *
  99. * @sched The pointer to the scheduler
  100. * @entity The pointer to a valid amd_sched_entity
  101. * @rq The run queue this entity belongs
  102. * @kernel If this is an entity for the kernel
  103. * @jobs The max number of jobs in the job queue
  104. *
  105. * return 0 if succeed. negative error code on failure
  106. */
  107. int amd_sched_entity_init(struct amd_gpu_scheduler *sched,
  108. struct amd_sched_entity *entity,
  109. struct amd_sched_rq *rq,
  110. uint32_t jobs, atomic_t *guilty)
  111. {
  112. int r;
  113. if (!(sched && entity && rq))
  114. return -EINVAL;
  115. memset(entity, 0, sizeof(struct amd_sched_entity));
  116. INIT_LIST_HEAD(&entity->list);
  117. entity->rq = rq;
  118. entity->sched = sched;
  119. entity->guilty = guilty;
  120. spin_lock_init(&entity->rq_lock);
  121. spin_lock_init(&entity->queue_lock);
  122. r = kfifo_alloc(&entity->job_queue, jobs * sizeof(void *), GFP_KERNEL);
  123. if (r)
  124. return r;
  125. atomic_set(&entity->fence_seq, 0);
  126. entity->fence_context = dma_fence_context_alloc(2);
  127. return 0;
  128. }
  129. /**
  130. * Query if entity is initialized
  131. *
  132. * @sched Pointer to scheduler instance
  133. * @entity The pointer to a valid scheduler entity
  134. *
  135. * return true if entity is initialized, false otherwise
  136. */
  137. static bool amd_sched_entity_is_initialized(struct amd_gpu_scheduler *sched,
  138. struct amd_sched_entity *entity)
  139. {
  140. return entity->sched == sched &&
  141. entity->rq != NULL;
  142. }
  143. /**
  144. * Check if entity is idle
  145. *
  146. * @entity The pointer to a valid scheduler entity
  147. *
  148. * Return true if entity don't has any unscheduled jobs.
  149. */
  150. static bool amd_sched_entity_is_idle(struct amd_sched_entity *entity)
  151. {
  152. rmb();
  153. if (kfifo_is_empty(&entity->job_queue))
  154. return true;
  155. return false;
  156. }
  157. /**
  158. * Check if entity is ready
  159. *
  160. * @entity The pointer to a valid scheduler entity
  161. *
  162. * Return true if entity could provide a job.
  163. */
  164. static bool amd_sched_entity_is_ready(struct amd_sched_entity *entity)
  165. {
  166. if (kfifo_is_empty(&entity->job_queue))
  167. return false;
  168. if (READ_ONCE(entity->dependency))
  169. return false;
  170. return true;
  171. }
  172. /**
  173. * Destroy a context entity
  174. *
  175. * @sched Pointer to scheduler instance
  176. * @entity The pointer to a valid scheduler entity
  177. *
  178. * Cleanup and free the allocated resources.
  179. */
  180. void amd_sched_entity_fini(struct amd_gpu_scheduler *sched,
  181. struct amd_sched_entity *entity)
  182. {
  183. int r;
  184. if (!amd_sched_entity_is_initialized(sched, entity))
  185. return;
  186. /**
  187. * The client will not queue more IBs during this fini, consume existing
  188. * queued IBs or discard them on SIGKILL
  189. */
  190. if ((current->flags & PF_SIGNALED) && current->exit_code == SIGKILL)
  191. r = -ERESTARTSYS;
  192. else
  193. r = wait_event_killable(sched->job_scheduled,
  194. amd_sched_entity_is_idle(entity));
  195. amd_sched_entity_set_rq(entity, NULL);
  196. if (r) {
  197. struct amd_sched_job *job;
  198. /* Park the kernel for a moment to make sure it isn't processing
  199. * our enity.
  200. */
  201. kthread_park(sched->thread);
  202. kthread_unpark(sched->thread);
  203. while (kfifo_out(&entity->job_queue, &job, sizeof(job))) {
  204. struct amd_sched_fence *s_fence = job->s_fence;
  205. amd_sched_fence_scheduled(s_fence);
  206. dma_fence_set_error(&s_fence->finished, -ESRCH);
  207. amd_sched_fence_finished(s_fence);
  208. dma_fence_put(&s_fence->finished);
  209. sched->ops->free_job(job);
  210. }
  211. }
  212. kfifo_free(&entity->job_queue);
  213. }
  214. static void amd_sched_entity_wakeup(struct dma_fence *f, struct dma_fence_cb *cb)
  215. {
  216. struct amd_sched_entity *entity =
  217. container_of(cb, struct amd_sched_entity, cb);
  218. entity->dependency = NULL;
  219. dma_fence_put(f);
  220. amd_sched_wakeup(entity->sched);
  221. }
  222. static void amd_sched_entity_clear_dep(struct dma_fence *f, struct dma_fence_cb *cb)
  223. {
  224. struct amd_sched_entity *entity =
  225. container_of(cb, struct amd_sched_entity, cb);
  226. entity->dependency = NULL;
  227. dma_fence_put(f);
  228. }
  229. void amd_sched_entity_set_rq(struct amd_sched_entity *entity,
  230. struct amd_sched_rq *rq)
  231. {
  232. if (entity->rq == rq)
  233. return;
  234. spin_lock(&entity->rq_lock);
  235. if (entity->rq)
  236. amd_sched_rq_remove_entity(entity->rq, entity);
  237. entity->rq = rq;
  238. if (rq)
  239. amd_sched_rq_add_entity(rq, entity);
  240. spin_unlock(&entity->rq_lock);
  241. }
  242. bool amd_sched_dependency_optimized(struct dma_fence* fence,
  243. struct amd_sched_entity *entity)
  244. {
  245. struct amd_gpu_scheduler *sched = entity->sched;
  246. struct amd_sched_fence *s_fence;
  247. if (!fence || dma_fence_is_signaled(fence))
  248. return false;
  249. if (fence->context == entity->fence_context)
  250. return true;
  251. s_fence = to_amd_sched_fence(fence);
  252. if (s_fence && s_fence->sched == sched)
  253. return true;
  254. return false;
  255. }
  256. static bool amd_sched_entity_add_dependency_cb(struct amd_sched_entity *entity)
  257. {
  258. struct amd_gpu_scheduler *sched = entity->sched;
  259. struct dma_fence * fence = entity->dependency;
  260. struct amd_sched_fence *s_fence;
  261. if (fence->context == entity->fence_context) {
  262. /* We can ignore fences from ourself */
  263. dma_fence_put(entity->dependency);
  264. return false;
  265. }
  266. s_fence = to_amd_sched_fence(fence);
  267. if (s_fence && s_fence->sched == sched) {
  268. /*
  269. * Fence is from the same scheduler, only need to wait for
  270. * it to be scheduled
  271. */
  272. fence = dma_fence_get(&s_fence->scheduled);
  273. dma_fence_put(entity->dependency);
  274. entity->dependency = fence;
  275. if (!dma_fence_add_callback(fence, &entity->cb,
  276. amd_sched_entity_clear_dep))
  277. return true;
  278. /* Ignore it when it is already scheduled */
  279. dma_fence_put(fence);
  280. return false;
  281. }
  282. if (!dma_fence_add_callback(entity->dependency, &entity->cb,
  283. amd_sched_entity_wakeup))
  284. return true;
  285. dma_fence_put(entity->dependency);
  286. return false;
  287. }
  288. static struct amd_sched_job *
  289. amd_sched_entity_peek_job(struct amd_sched_entity *entity)
  290. {
  291. struct amd_gpu_scheduler *sched = entity->sched;
  292. struct amd_sched_job *sched_job;
  293. if (!kfifo_out_peek(&entity->job_queue, &sched_job, sizeof(sched_job)))
  294. return NULL;
  295. while ((entity->dependency = sched->ops->dependency(sched_job)))
  296. if (amd_sched_entity_add_dependency_cb(entity))
  297. return NULL;
  298. return sched_job;
  299. }
  300. /**
  301. * Helper to submit a job to the job queue
  302. *
  303. * @sched_job The pointer to job required to submit
  304. *
  305. * Returns true if we could submit the job.
  306. */
  307. static bool amd_sched_entity_in(struct amd_sched_job *sched_job)
  308. {
  309. struct amd_gpu_scheduler *sched = sched_job->sched;
  310. struct amd_sched_entity *entity = sched_job->s_entity;
  311. bool added, first = false;
  312. spin_lock(&entity->queue_lock);
  313. added = kfifo_in(&entity->job_queue, &sched_job,
  314. sizeof(sched_job)) == sizeof(sched_job);
  315. if (added && kfifo_len(&entity->job_queue) == sizeof(sched_job))
  316. first = true;
  317. spin_unlock(&entity->queue_lock);
  318. /* first job wakes up scheduler */
  319. if (first) {
  320. /* Add the entity to the run queue */
  321. spin_lock(&entity->rq_lock);
  322. amd_sched_rq_add_entity(entity->rq, entity);
  323. spin_unlock(&entity->rq_lock);
  324. amd_sched_wakeup(sched);
  325. }
  326. return added;
  327. }
  328. /* job_finish is called after hw fence signaled
  329. */
  330. static void amd_sched_job_finish(struct work_struct *work)
  331. {
  332. struct amd_sched_job *s_job = container_of(work, struct amd_sched_job,
  333. finish_work);
  334. struct amd_gpu_scheduler *sched = s_job->sched;
  335. /* remove job from ring_mirror_list */
  336. spin_lock(&sched->job_list_lock);
  337. list_del_init(&s_job->node);
  338. if (sched->timeout != MAX_SCHEDULE_TIMEOUT) {
  339. struct amd_sched_job *next;
  340. spin_unlock(&sched->job_list_lock);
  341. cancel_delayed_work_sync(&s_job->work_tdr);
  342. spin_lock(&sched->job_list_lock);
  343. /* queue TDR for next job */
  344. next = list_first_entry_or_null(&sched->ring_mirror_list,
  345. struct amd_sched_job, node);
  346. if (next)
  347. schedule_delayed_work(&next->work_tdr, sched->timeout);
  348. }
  349. spin_unlock(&sched->job_list_lock);
  350. dma_fence_put(&s_job->s_fence->finished);
  351. sched->ops->free_job(s_job);
  352. }
  353. static void amd_sched_job_finish_cb(struct dma_fence *f,
  354. struct dma_fence_cb *cb)
  355. {
  356. struct amd_sched_job *job = container_of(cb, struct amd_sched_job,
  357. finish_cb);
  358. schedule_work(&job->finish_work);
  359. }
  360. static void amd_sched_job_begin(struct amd_sched_job *s_job)
  361. {
  362. struct amd_gpu_scheduler *sched = s_job->sched;
  363. dma_fence_add_callback(&s_job->s_fence->finished, &s_job->finish_cb,
  364. amd_sched_job_finish_cb);
  365. spin_lock(&sched->job_list_lock);
  366. list_add_tail(&s_job->node, &sched->ring_mirror_list);
  367. if (sched->timeout != MAX_SCHEDULE_TIMEOUT &&
  368. list_first_entry_or_null(&sched->ring_mirror_list,
  369. struct amd_sched_job, node) == s_job)
  370. schedule_delayed_work(&s_job->work_tdr, sched->timeout);
  371. spin_unlock(&sched->job_list_lock);
  372. }
  373. static void amd_sched_job_timedout(struct work_struct *work)
  374. {
  375. struct amd_sched_job *job = container_of(work, struct amd_sched_job,
  376. work_tdr.work);
  377. job->sched->ops->timedout_job(job);
  378. }
  379. void amd_sched_hw_job_reset(struct amd_gpu_scheduler *sched)
  380. {
  381. struct amd_sched_job *s_job;
  382. spin_lock(&sched->job_list_lock);
  383. list_for_each_entry_reverse(s_job, &sched->ring_mirror_list, node) {
  384. if (s_job->s_fence->parent &&
  385. dma_fence_remove_callback(s_job->s_fence->parent,
  386. &s_job->s_fence->cb)) {
  387. dma_fence_put(s_job->s_fence->parent);
  388. s_job->s_fence->parent = NULL;
  389. atomic_dec(&sched->hw_rq_count);
  390. }
  391. }
  392. spin_unlock(&sched->job_list_lock);
  393. }
  394. void amd_sched_job_kickout(struct amd_sched_job *s_job)
  395. {
  396. struct amd_gpu_scheduler *sched = s_job->sched;
  397. spin_lock(&sched->job_list_lock);
  398. list_del_init(&s_job->node);
  399. spin_unlock(&sched->job_list_lock);
  400. }
  401. void amd_sched_job_recovery(struct amd_gpu_scheduler *sched)
  402. {
  403. struct amd_sched_job *s_job, *tmp;
  404. int r;
  405. spin_lock(&sched->job_list_lock);
  406. s_job = list_first_entry_or_null(&sched->ring_mirror_list,
  407. struct amd_sched_job, node);
  408. if (s_job && sched->timeout != MAX_SCHEDULE_TIMEOUT)
  409. schedule_delayed_work(&s_job->work_tdr, sched->timeout);
  410. list_for_each_entry_safe(s_job, tmp, &sched->ring_mirror_list, node) {
  411. struct amd_sched_fence *s_fence = s_job->s_fence;
  412. struct dma_fence *fence;
  413. spin_unlock(&sched->job_list_lock);
  414. fence = sched->ops->run_job(s_job);
  415. atomic_inc(&sched->hw_rq_count);
  416. if (fence) {
  417. s_fence->parent = dma_fence_get(fence);
  418. r = dma_fence_add_callback(fence, &s_fence->cb,
  419. amd_sched_process_job);
  420. if (r == -ENOENT)
  421. amd_sched_process_job(fence, &s_fence->cb);
  422. else if (r)
  423. DRM_ERROR("fence add callback failed (%d)\n",
  424. r);
  425. dma_fence_put(fence);
  426. } else {
  427. DRM_ERROR("Failed to run job!\n");
  428. amd_sched_process_job(NULL, &s_fence->cb);
  429. }
  430. spin_lock(&sched->job_list_lock);
  431. }
  432. spin_unlock(&sched->job_list_lock);
  433. }
  434. /**
  435. * Submit a job to the job queue
  436. *
  437. * @sched_job The pointer to job required to submit
  438. *
  439. * Returns 0 for success, negative error code otherwise.
  440. */
  441. void amd_sched_entity_push_job(struct amd_sched_job *sched_job)
  442. {
  443. struct amd_sched_entity *entity = sched_job->s_entity;
  444. trace_amd_sched_job(sched_job);
  445. wait_event(entity->sched->job_scheduled,
  446. amd_sched_entity_in(sched_job));
  447. }
  448. /* init a sched_job with basic field */
  449. int amd_sched_job_init(struct amd_sched_job *job,
  450. struct amd_gpu_scheduler *sched,
  451. struct amd_sched_entity *entity,
  452. void *owner)
  453. {
  454. job->sched = sched;
  455. job->s_entity = entity;
  456. job->s_priority = entity->rq - sched->sched_rq;
  457. job->s_fence = amd_sched_fence_create(entity, owner);
  458. if (!job->s_fence)
  459. return -ENOMEM;
  460. job->id = atomic64_inc_return(&sched->job_id_count);
  461. INIT_WORK(&job->finish_work, amd_sched_job_finish);
  462. INIT_LIST_HEAD(&job->node);
  463. INIT_DELAYED_WORK(&job->work_tdr, amd_sched_job_timedout);
  464. return 0;
  465. }
  466. /**
  467. * Return ture if we can push more jobs to the hw.
  468. */
  469. static bool amd_sched_ready(struct amd_gpu_scheduler *sched)
  470. {
  471. return atomic_read(&sched->hw_rq_count) <
  472. sched->hw_submission_limit;
  473. }
  474. /**
  475. * Wake up the scheduler when it is ready
  476. */
  477. static void amd_sched_wakeup(struct amd_gpu_scheduler *sched)
  478. {
  479. if (amd_sched_ready(sched))
  480. wake_up_interruptible(&sched->wake_up_worker);
  481. }
  482. /**
  483. * Select next entity to process
  484. */
  485. static struct amd_sched_entity *
  486. amd_sched_select_entity(struct amd_gpu_scheduler *sched)
  487. {
  488. struct amd_sched_entity *entity;
  489. int i;
  490. if (!amd_sched_ready(sched))
  491. return NULL;
  492. /* Kernel run queue has higher priority than normal run queue*/
  493. for (i = AMD_SCHED_PRIORITY_MAX - 1; i >= AMD_SCHED_PRIORITY_MIN; i--) {
  494. entity = amd_sched_rq_select_entity(&sched->sched_rq[i]);
  495. if (entity)
  496. break;
  497. }
  498. return entity;
  499. }
  500. static void amd_sched_process_job(struct dma_fence *f, struct dma_fence_cb *cb)
  501. {
  502. struct amd_sched_fence *s_fence =
  503. container_of(cb, struct amd_sched_fence, cb);
  504. struct amd_gpu_scheduler *sched = s_fence->sched;
  505. dma_fence_get(&s_fence->finished);
  506. atomic_dec(&sched->hw_rq_count);
  507. amd_sched_fence_finished(s_fence);
  508. trace_amd_sched_process_job(s_fence);
  509. dma_fence_put(&s_fence->finished);
  510. wake_up_interruptible(&sched->wake_up_worker);
  511. }
  512. static bool amd_sched_blocked(struct amd_gpu_scheduler *sched)
  513. {
  514. if (kthread_should_park()) {
  515. kthread_parkme();
  516. return true;
  517. }
  518. return false;
  519. }
  520. static int amd_sched_main(void *param)
  521. {
  522. struct sched_param sparam = {.sched_priority = 1};
  523. struct amd_gpu_scheduler *sched = (struct amd_gpu_scheduler *)param;
  524. int r, count;
  525. sched_setscheduler(current, SCHED_FIFO, &sparam);
  526. while (!kthread_should_stop()) {
  527. struct amd_sched_entity *entity = NULL;
  528. struct amd_sched_fence *s_fence;
  529. struct amd_sched_job *sched_job;
  530. struct dma_fence *fence;
  531. wait_event_interruptible(sched->wake_up_worker,
  532. (!amd_sched_blocked(sched) &&
  533. (entity = amd_sched_select_entity(sched))) ||
  534. kthread_should_stop());
  535. if (!entity)
  536. continue;
  537. sched_job = amd_sched_entity_peek_job(entity);
  538. if (!sched_job)
  539. continue;
  540. s_fence = sched_job->s_fence;
  541. atomic_inc(&sched->hw_rq_count);
  542. amd_sched_job_begin(sched_job);
  543. fence = sched->ops->run_job(sched_job);
  544. amd_sched_fence_scheduled(s_fence);
  545. if (fence) {
  546. s_fence->parent = dma_fence_get(fence);
  547. r = dma_fence_add_callback(fence, &s_fence->cb,
  548. amd_sched_process_job);
  549. if (r == -ENOENT)
  550. amd_sched_process_job(fence, &s_fence->cb);
  551. else if (r)
  552. DRM_ERROR("fence add callback failed (%d)\n",
  553. r);
  554. dma_fence_put(fence);
  555. } else {
  556. DRM_ERROR("Failed to run job!\n");
  557. amd_sched_process_job(NULL, &s_fence->cb);
  558. }
  559. count = kfifo_out(&entity->job_queue, &sched_job,
  560. sizeof(sched_job));
  561. WARN_ON(count != sizeof(sched_job));
  562. wake_up(&sched->job_scheduled);
  563. }
  564. return 0;
  565. }
  566. /**
  567. * Init a gpu scheduler instance
  568. *
  569. * @sched The pointer to the scheduler
  570. * @ops The backend operations for this scheduler.
  571. * @hw_submissions Number of hw submissions to do.
  572. * @name Name used for debugging
  573. *
  574. * Return 0 on success, otherwise error code.
  575. */
  576. int amd_sched_init(struct amd_gpu_scheduler *sched,
  577. const struct amd_sched_backend_ops *ops,
  578. unsigned hw_submission,
  579. unsigned hang_limit,
  580. long timeout,
  581. const char *name)
  582. {
  583. int i;
  584. sched->ops = ops;
  585. sched->hw_submission_limit = hw_submission;
  586. sched->name = name;
  587. sched->timeout = timeout;
  588. sched->hang_limit = hang_limit;
  589. for (i = AMD_SCHED_PRIORITY_MIN; i < AMD_SCHED_PRIORITY_MAX; i++)
  590. amd_sched_rq_init(&sched->sched_rq[i]);
  591. init_waitqueue_head(&sched->wake_up_worker);
  592. init_waitqueue_head(&sched->job_scheduled);
  593. INIT_LIST_HEAD(&sched->ring_mirror_list);
  594. spin_lock_init(&sched->job_list_lock);
  595. atomic_set(&sched->hw_rq_count, 0);
  596. atomic64_set(&sched->job_id_count, 0);
  597. /* Each scheduler will run on a seperate kernel thread */
  598. sched->thread = kthread_run(amd_sched_main, sched, sched->name);
  599. if (IS_ERR(sched->thread)) {
  600. DRM_ERROR("Failed to create scheduler for %s.\n", name);
  601. return PTR_ERR(sched->thread);
  602. }
  603. return 0;
  604. }
  605. /**
  606. * Destroy a gpu scheduler
  607. *
  608. * @sched The pointer to the scheduler
  609. */
  610. void amd_sched_fini(struct amd_gpu_scheduler *sched)
  611. {
  612. if (sched->thread)
  613. kthread_stop(sched->thread);
  614. }