htt_rx.c 69 KB

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  1. /*
  2. * Copyright (c) 2005-2011 Atheros Communications Inc.
  3. * Copyright (c) 2011-2013 Qualcomm Atheros, Inc.
  4. *
  5. * Permission to use, copy, modify, and/or distribute this software for any
  6. * purpose with or without fee is hereby granted, provided that the above
  7. * copyright notice and this permission notice appear in all copies.
  8. *
  9. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
  10. * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  11. * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  12. * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  13. * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  14. * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  15. * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  16. */
  17. #include "core.h"
  18. #include "htc.h"
  19. #include "htt.h"
  20. #include "txrx.h"
  21. #include "debug.h"
  22. #include "trace.h"
  23. #include "mac.h"
  24. #include <linux/log2.h>
  25. #define HTT_RX_RING_SIZE HTT_RX_RING_SIZE_MAX
  26. #define HTT_RX_RING_FILL_LEVEL (((HTT_RX_RING_SIZE) / 2) - 1)
  27. /* when under memory pressure rx ring refill may fail and needs a retry */
  28. #define HTT_RX_RING_REFILL_RETRY_MS 50
  29. static int ath10k_htt_rx_get_csum_state(struct sk_buff *skb);
  30. static void ath10k_htt_txrx_compl_task(unsigned long ptr);
  31. static struct sk_buff *
  32. ath10k_htt_rx_find_skb_paddr(struct ath10k *ar, u32 paddr)
  33. {
  34. struct ath10k_skb_rxcb *rxcb;
  35. hash_for_each_possible(ar->htt.rx_ring.skb_table, rxcb, hlist, paddr)
  36. if (rxcb->paddr == paddr)
  37. return ATH10K_RXCB_SKB(rxcb);
  38. WARN_ON_ONCE(1);
  39. return NULL;
  40. }
  41. static void ath10k_htt_rx_ring_free(struct ath10k_htt *htt)
  42. {
  43. struct sk_buff *skb;
  44. struct ath10k_skb_rxcb *rxcb;
  45. struct hlist_node *n;
  46. int i;
  47. if (htt->rx_ring.in_ord_rx) {
  48. hash_for_each_safe(htt->rx_ring.skb_table, i, n, rxcb, hlist) {
  49. skb = ATH10K_RXCB_SKB(rxcb);
  50. dma_unmap_single(htt->ar->dev, rxcb->paddr,
  51. skb->len + skb_tailroom(skb),
  52. DMA_FROM_DEVICE);
  53. hash_del(&rxcb->hlist);
  54. dev_kfree_skb_any(skb);
  55. }
  56. } else {
  57. for (i = 0; i < htt->rx_ring.size; i++) {
  58. skb = htt->rx_ring.netbufs_ring[i];
  59. if (!skb)
  60. continue;
  61. rxcb = ATH10K_SKB_RXCB(skb);
  62. dma_unmap_single(htt->ar->dev, rxcb->paddr,
  63. skb->len + skb_tailroom(skb),
  64. DMA_FROM_DEVICE);
  65. dev_kfree_skb_any(skb);
  66. }
  67. }
  68. htt->rx_ring.fill_cnt = 0;
  69. hash_init(htt->rx_ring.skb_table);
  70. memset(htt->rx_ring.netbufs_ring, 0,
  71. htt->rx_ring.size * sizeof(htt->rx_ring.netbufs_ring[0]));
  72. }
  73. static int __ath10k_htt_rx_ring_fill_n(struct ath10k_htt *htt, int num)
  74. {
  75. struct htt_rx_desc *rx_desc;
  76. struct ath10k_skb_rxcb *rxcb;
  77. struct sk_buff *skb;
  78. dma_addr_t paddr;
  79. int ret = 0, idx;
  80. /* The Full Rx Reorder firmware has no way of telling the host
  81. * implicitly when it copied HTT Rx Ring buffers to MAC Rx Ring.
  82. * To keep things simple make sure ring is always half empty. This
  83. * guarantees there'll be no replenishment overruns possible.
  84. */
  85. BUILD_BUG_ON(HTT_RX_RING_FILL_LEVEL >= HTT_RX_RING_SIZE / 2);
  86. idx = __le32_to_cpu(*htt->rx_ring.alloc_idx.vaddr);
  87. while (num > 0) {
  88. skb = dev_alloc_skb(HTT_RX_BUF_SIZE + HTT_RX_DESC_ALIGN);
  89. if (!skb) {
  90. ret = -ENOMEM;
  91. goto fail;
  92. }
  93. if (!IS_ALIGNED((unsigned long)skb->data, HTT_RX_DESC_ALIGN))
  94. skb_pull(skb,
  95. PTR_ALIGN(skb->data, HTT_RX_DESC_ALIGN) -
  96. skb->data);
  97. /* Clear rx_desc attention word before posting to Rx ring */
  98. rx_desc = (struct htt_rx_desc *)skb->data;
  99. rx_desc->attention.flags = __cpu_to_le32(0);
  100. paddr = dma_map_single(htt->ar->dev, skb->data,
  101. skb->len + skb_tailroom(skb),
  102. DMA_FROM_DEVICE);
  103. if (unlikely(dma_mapping_error(htt->ar->dev, paddr))) {
  104. dev_kfree_skb_any(skb);
  105. ret = -ENOMEM;
  106. goto fail;
  107. }
  108. rxcb = ATH10K_SKB_RXCB(skb);
  109. rxcb->paddr = paddr;
  110. htt->rx_ring.netbufs_ring[idx] = skb;
  111. htt->rx_ring.paddrs_ring[idx] = __cpu_to_le32(paddr);
  112. htt->rx_ring.fill_cnt++;
  113. if (htt->rx_ring.in_ord_rx) {
  114. hash_add(htt->rx_ring.skb_table,
  115. &ATH10K_SKB_RXCB(skb)->hlist,
  116. (u32)paddr);
  117. }
  118. num--;
  119. idx++;
  120. idx &= htt->rx_ring.size_mask;
  121. }
  122. fail:
  123. /*
  124. * Make sure the rx buffer is updated before available buffer
  125. * index to avoid any potential rx ring corruption.
  126. */
  127. mb();
  128. *htt->rx_ring.alloc_idx.vaddr = __cpu_to_le32(idx);
  129. return ret;
  130. }
  131. static int ath10k_htt_rx_ring_fill_n(struct ath10k_htt *htt, int num)
  132. {
  133. lockdep_assert_held(&htt->rx_ring.lock);
  134. return __ath10k_htt_rx_ring_fill_n(htt, num);
  135. }
  136. static void ath10k_htt_rx_msdu_buff_replenish(struct ath10k_htt *htt)
  137. {
  138. int ret, num_deficit, num_to_fill;
  139. /* Refilling the whole RX ring buffer proves to be a bad idea. The
  140. * reason is RX may take up significant amount of CPU cycles and starve
  141. * other tasks, e.g. TX on an ethernet device while acting as a bridge
  142. * with ath10k wlan interface. This ended up with very poor performance
  143. * once CPU the host system was overwhelmed with RX on ath10k.
  144. *
  145. * By limiting the number of refills the replenishing occurs
  146. * progressively. This in turns makes use of the fact tasklets are
  147. * processed in FIFO order. This means actual RX processing can starve
  148. * out refilling. If there's not enough buffers on RX ring FW will not
  149. * report RX until it is refilled with enough buffers. This
  150. * automatically balances load wrt to CPU power.
  151. *
  152. * This probably comes at a cost of lower maximum throughput but
  153. * improves the average and stability. */
  154. spin_lock_bh(&htt->rx_ring.lock);
  155. num_deficit = htt->rx_ring.fill_level - htt->rx_ring.fill_cnt;
  156. num_to_fill = min(ATH10K_HTT_MAX_NUM_REFILL, num_deficit);
  157. num_deficit -= num_to_fill;
  158. ret = ath10k_htt_rx_ring_fill_n(htt, num_to_fill);
  159. if (ret == -ENOMEM) {
  160. /*
  161. * Failed to fill it to the desired level -
  162. * we'll start a timer and try again next time.
  163. * As long as enough buffers are left in the ring for
  164. * another A-MPDU rx, no special recovery is needed.
  165. */
  166. mod_timer(&htt->rx_ring.refill_retry_timer, jiffies +
  167. msecs_to_jiffies(HTT_RX_RING_REFILL_RETRY_MS));
  168. } else if (num_deficit > 0) {
  169. tasklet_schedule(&htt->rx_replenish_task);
  170. }
  171. spin_unlock_bh(&htt->rx_ring.lock);
  172. }
  173. static void ath10k_htt_rx_ring_refill_retry(unsigned long arg)
  174. {
  175. struct ath10k_htt *htt = (struct ath10k_htt *)arg;
  176. ath10k_htt_rx_msdu_buff_replenish(htt);
  177. }
  178. int ath10k_htt_rx_ring_refill(struct ath10k *ar)
  179. {
  180. struct ath10k_htt *htt = &ar->htt;
  181. int ret;
  182. spin_lock_bh(&htt->rx_ring.lock);
  183. ret = ath10k_htt_rx_ring_fill_n(htt, (htt->rx_ring.fill_level -
  184. htt->rx_ring.fill_cnt));
  185. spin_unlock_bh(&htt->rx_ring.lock);
  186. if (ret)
  187. ath10k_htt_rx_ring_free(htt);
  188. return ret;
  189. }
  190. void ath10k_htt_rx_free(struct ath10k_htt *htt)
  191. {
  192. del_timer_sync(&htt->rx_ring.refill_retry_timer);
  193. tasklet_kill(&htt->rx_replenish_task);
  194. tasklet_kill(&htt->txrx_compl_task);
  195. skb_queue_purge(&htt->rx_compl_q);
  196. skb_queue_purge(&htt->rx_in_ord_compl_q);
  197. skb_queue_purge(&htt->tx_fetch_ind_q);
  198. ath10k_htt_rx_ring_free(htt);
  199. dma_free_coherent(htt->ar->dev,
  200. (htt->rx_ring.size *
  201. sizeof(htt->rx_ring.paddrs_ring)),
  202. htt->rx_ring.paddrs_ring,
  203. htt->rx_ring.base_paddr);
  204. dma_free_coherent(htt->ar->dev,
  205. sizeof(*htt->rx_ring.alloc_idx.vaddr),
  206. htt->rx_ring.alloc_idx.vaddr,
  207. htt->rx_ring.alloc_idx.paddr);
  208. kfree(htt->rx_ring.netbufs_ring);
  209. }
  210. static inline struct sk_buff *ath10k_htt_rx_netbuf_pop(struct ath10k_htt *htt)
  211. {
  212. struct ath10k *ar = htt->ar;
  213. int idx;
  214. struct sk_buff *msdu;
  215. lockdep_assert_held(&htt->rx_ring.lock);
  216. if (htt->rx_ring.fill_cnt == 0) {
  217. ath10k_warn(ar, "tried to pop sk_buff from an empty rx ring\n");
  218. return NULL;
  219. }
  220. idx = htt->rx_ring.sw_rd_idx.msdu_payld;
  221. msdu = htt->rx_ring.netbufs_ring[idx];
  222. htt->rx_ring.netbufs_ring[idx] = NULL;
  223. htt->rx_ring.paddrs_ring[idx] = 0;
  224. idx++;
  225. idx &= htt->rx_ring.size_mask;
  226. htt->rx_ring.sw_rd_idx.msdu_payld = idx;
  227. htt->rx_ring.fill_cnt--;
  228. dma_unmap_single(htt->ar->dev,
  229. ATH10K_SKB_RXCB(msdu)->paddr,
  230. msdu->len + skb_tailroom(msdu),
  231. DMA_FROM_DEVICE);
  232. ath10k_dbg_dump(ar, ATH10K_DBG_HTT_DUMP, NULL, "htt rx netbuf pop: ",
  233. msdu->data, msdu->len + skb_tailroom(msdu));
  234. return msdu;
  235. }
  236. /* return: < 0 fatal error, 0 - non chained msdu, 1 chained msdu */
  237. static int ath10k_htt_rx_amsdu_pop(struct ath10k_htt *htt,
  238. u8 **fw_desc, int *fw_desc_len,
  239. struct sk_buff_head *amsdu)
  240. {
  241. struct ath10k *ar = htt->ar;
  242. int msdu_len, msdu_chaining = 0;
  243. struct sk_buff *msdu;
  244. struct htt_rx_desc *rx_desc;
  245. lockdep_assert_held(&htt->rx_ring.lock);
  246. for (;;) {
  247. int last_msdu, msdu_len_invalid, msdu_chained;
  248. msdu = ath10k_htt_rx_netbuf_pop(htt);
  249. if (!msdu) {
  250. __skb_queue_purge(amsdu);
  251. return -ENOENT;
  252. }
  253. __skb_queue_tail(amsdu, msdu);
  254. rx_desc = (struct htt_rx_desc *)msdu->data;
  255. /* FIXME: we must report msdu payload since this is what caller
  256. * expects now */
  257. skb_put(msdu, offsetof(struct htt_rx_desc, msdu_payload));
  258. skb_pull(msdu, offsetof(struct htt_rx_desc, msdu_payload));
  259. /*
  260. * Sanity check - confirm the HW is finished filling in the
  261. * rx data.
  262. * If the HW and SW are working correctly, then it's guaranteed
  263. * that the HW's MAC DMA is done before this point in the SW.
  264. * To prevent the case that we handle a stale Rx descriptor,
  265. * just assert for now until we have a way to recover.
  266. */
  267. if (!(__le32_to_cpu(rx_desc->attention.flags)
  268. & RX_ATTENTION_FLAGS_MSDU_DONE)) {
  269. __skb_queue_purge(amsdu);
  270. return -EIO;
  271. }
  272. /*
  273. * Copy the FW rx descriptor for this MSDU from the rx
  274. * indication message into the MSDU's netbuf. HL uses the
  275. * same rx indication message definition as LL, and simply
  276. * appends new info (fields from the HW rx desc, and the
  277. * MSDU payload itself). So, the offset into the rx
  278. * indication message only has to account for the standard
  279. * offset of the per-MSDU FW rx desc info within the
  280. * message, and how many bytes of the per-MSDU FW rx desc
  281. * info have already been consumed. (And the endianness of
  282. * the host, since for a big-endian host, the rx ind
  283. * message contents, including the per-MSDU rx desc bytes,
  284. * were byteswapped during upload.)
  285. */
  286. if (*fw_desc_len > 0) {
  287. rx_desc->fw_desc.info0 = **fw_desc;
  288. /*
  289. * The target is expected to only provide the basic
  290. * per-MSDU rx descriptors. Just to be sure, verify
  291. * that the target has not attached extension data
  292. * (e.g. LRO flow ID).
  293. */
  294. /* or more, if there's extension data */
  295. (*fw_desc)++;
  296. (*fw_desc_len)--;
  297. } else {
  298. /*
  299. * When an oversized AMSDU happened, FW will lost
  300. * some of MSDU status - in this case, the FW
  301. * descriptors provided will be less than the
  302. * actual MSDUs inside this MPDU. Mark the FW
  303. * descriptors so that it will still deliver to
  304. * upper stack, if no CRC error for this MPDU.
  305. *
  306. * FIX THIS - the FW descriptors are actually for
  307. * MSDUs in the end of this A-MSDU instead of the
  308. * beginning.
  309. */
  310. rx_desc->fw_desc.info0 = 0;
  311. }
  312. msdu_len_invalid = !!(__le32_to_cpu(rx_desc->attention.flags)
  313. & (RX_ATTENTION_FLAGS_MPDU_LENGTH_ERR |
  314. RX_ATTENTION_FLAGS_MSDU_LENGTH_ERR));
  315. msdu_len = MS(__le32_to_cpu(rx_desc->msdu_start.common.info0),
  316. RX_MSDU_START_INFO0_MSDU_LENGTH);
  317. msdu_chained = rx_desc->frag_info.ring2_more_count;
  318. if (msdu_len_invalid)
  319. msdu_len = 0;
  320. skb_trim(msdu, 0);
  321. skb_put(msdu, min(msdu_len, HTT_RX_MSDU_SIZE));
  322. msdu_len -= msdu->len;
  323. /* Note: Chained buffers do not contain rx descriptor */
  324. while (msdu_chained--) {
  325. msdu = ath10k_htt_rx_netbuf_pop(htt);
  326. if (!msdu) {
  327. __skb_queue_purge(amsdu);
  328. return -ENOENT;
  329. }
  330. __skb_queue_tail(amsdu, msdu);
  331. skb_trim(msdu, 0);
  332. skb_put(msdu, min(msdu_len, HTT_RX_BUF_SIZE));
  333. msdu_len -= msdu->len;
  334. msdu_chaining = 1;
  335. }
  336. last_msdu = __le32_to_cpu(rx_desc->msdu_end.common.info0) &
  337. RX_MSDU_END_INFO0_LAST_MSDU;
  338. trace_ath10k_htt_rx_desc(ar, &rx_desc->attention,
  339. sizeof(*rx_desc) - sizeof(u32));
  340. if (last_msdu)
  341. break;
  342. }
  343. if (skb_queue_empty(amsdu))
  344. msdu_chaining = -1;
  345. /*
  346. * Don't refill the ring yet.
  347. *
  348. * First, the elements popped here are still in use - it is not
  349. * safe to overwrite them until the matching call to
  350. * mpdu_desc_list_next. Second, for efficiency it is preferable to
  351. * refill the rx ring with 1 PPDU's worth of rx buffers (something
  352. * like 32 x 3 buffers), rather than one MPDU's worth of rx buffers
  353. * (something like 3 buffers). Consequently, we'll rely on the txrx
  354. * SW to tell us when it is done pulling all the PPDU's rx buffers
  355. * out of the rx ring, and then refill it just once.
  356. */
  357. return msdu_chaining;
  358. }
  359. static void ath10k_htt_rx_replenish_task(unsigned long ptr)
  360. {
  361. struct ath10k_htt *htt = (struct ath10k_htt *)ptr;
  362. ath10k_htt_rx_msdu_buff_replenish(htt);
  363. }
  364. static struct sk_buff *ath10k_htt_rx_pop_paddr(struct ath10k_htt *htt,
  365. u32 paddr)
  366. {
  367. struct ath10k *ar = htt->ar;
  368. struct ath10k_skb_rxcb *rxcb;
  369. struct sk_buff *msdu;
  370. lockdep_assert_held(&htt->rx_ring.lock);
  371. msdu = ath10k_htt_rx_find_skb_paddr(ar, paddr);
  372. if (!msdu)
  373. return NULL;
  374. rxcb = ATH10K_SKB_RXCB(msdu);
  375. hash_del(&rxcb->hlist);
  376. htt->rx_ring.fill_cnt--;
  377. dma_unmap_single(htt->ar->dev, rxcb->paddr,
  378. msdu->len + skb_tailroom(msdu),
  379. DMA_FROM_DEVICE);
  380. ath10k_dbg_dump(ar, ATH10K_DBG_HTT_DUMP, NULL, "htt rx netbuf pop: ",
  381. msdu->data, msdu->len + skb_tailroom(msdu));
  382. return msdu;
  383. }
  384. static int ath10k_htt_rx_pop_paddr_list(struct ath10k_htt *htt,
  385. struct htt_rx_in_ord_ind *ev,
  386. struct sk_buff_head *list)
  387. {
  388. struct ath10k *ar = htt->ar;
  389. struct htt_rx_in_ord_msdu_desc *msdu_desc = ev->msdu_descs;
  390. struct htt_rx_desc *rxd;
  391. struct sk_buff *msdu;
  392. int msdu_count;
  393. bool is_offload;
  394. u32 paddr;
  395. lockdep_assert_held(&htt->rx_ring.lock);
  396. msdu_count = __le16_to_cpu(ev->msdu_count);
  397. is_offload = !!(ev->info & HTT_RX_IN_ORD_IND_INFO_OFFLOAD_MASK);
  398. while (msdu_count--) {
  399. paddr = __le32_to_cpu(msdu_desc->msdu_paddr);
  400. msdu = ath10k_htt_rx_pop_paddr(htt, paddr);
  401. if (!msdu) {
  402. __skb_queue_purge(list);
  403. return -ENOENT;
  404. }
  405. __skb_queue_tail(list, msdu);
  406. if (!is_offload) {
  407. rxd = (void *)msdu->data;
  408. trace_ath10k_htt_rx_desc(ar, rxd, sizeof(*rxd));
  409. skb_put(msdu, sizeof(*rxd));
  410. skb_pull(msdu, sizeof(*rxd));
  411. skb_put(msdu, __le16_to_cpu(msdu_desc->msdu_len));
  412. if (!(__le32_to_cpu(rxd->attention.flags) &
  413. RX_ATTENTION_FLAGS_MSDU_DONE)) {
  414. ath10k_warn(htt->ar, "tried to pop an incomplete frame, oops!\n");
  415. return -EIO;
  416. }
  417. }
  418. msdu_desc++;
  419. }
  420. return 0;
  421. }
  422. int ath10k_htt_rx_alloc(struct ath10k_htt *htt)
  423. {
  424. struct ath10k *ar = htt->ar;
  425. dma_addr_t paddr;
  426. void *vaddr;
  427. size_t size;
  428. struct timer_list *timer = &htt->rx_ring.refill_retry_timer;
  429. htt->rx_confused = false;
  430. /* XXX: The fill level could be changed during runtime in response to
  431. * the host processing latency. Is this really worth it?
  432. */
  433. htt->rx_ring.size = HTT_RX_RING_SIZE;
  434. htt->rx_ring.size_mask = htt->rx_ring.size - 1;
  435. htt->rx_ring.fill_level = HTT_RX_RING_FILL_LEVEL;
  436. if (!is_power_of_2(htt->rx_ring.size)) {
  437. ath10k_warn(ar, "htt rx ring size is not power of 2\n");
  438. return -EINVAL;
  439. }
  440. htt->rx_ring.netbufs_ring =
  441. kzalloc(htt->rx_ring.size * sizeof(struct sk_buff *),
  442. GFP_KERNEL);
  443. if (!htt->rx_ring.netbufs_ring)
  444. goto err_netbuf;
  445. size = htt->rx_ring.size * sizeof(htt->rx_ring.paddrs_ring);
  446. vaddr = dma_alloc_coherent(htt->ar->dev, size, &paddr, GFP_KERNEL);
  447. if (!vaddr)
  448. goto err_dma_ring;
  449. htt->rx_ring.paddrs_ring = vaddr;
  450. htt->rx_ring.base_paddr = paddr;
  451. vaddr = dma_alloc_coherent(htt->ar->dev,
  452. sizeof(*htt->rx_ring.alloc_idx.vaddr),
  453. &paddr, GFP_KERNEL);
  454. if (!vaddr)
  455. goto err_dma_idx;
  456. htt->rx_ring.alloc_idx.vaddr = vaddr;
  457. htt->rx_ring.alloc_idx.paddr = paddr;
  458. htt->rx_ring.sw_rd_idx.msdu_payld = htt->rx_ring.size_mask;
  459. *htt->rx_ring.alloc_idx.vaddr = 0;
  460. /* Initialize the Rx refill retry timer */
  461. setup_timer(timer, ath10k_htt_rx_ring_refill_retry, (unsigned long)htt);
  462. spin_lock_init(&htt->rx_ring.lock);
  463. htt->rx_ring.fill_cnt = 0;
  464. htt->rx_ring.sw_rd_idx.msdu_payld = 0;
  465. hash_init(htt->rx_ring.skb_table);
  466. tasklet_init(&htt->rx_replenish_task, ath10k_htt_rx_replenish_task,
  467. (unsigned long)htt);
  468. skb_queue_head_init(&htt->rx_compl_q);
  469. skb_queue_head_init(&htt->rx_in_ord_compl_q);
  470. skb_queue_head_init(&htt->tx_fetch_ind_q);
  471. tasklet_init(&htt->txrx_compl_task, ath10k_htt_txrx_compl_task,
  472. (unsigned long)htt);
  473. ath10k_dbg(ar, ATH10K_DBG_BOOT, "htt rx ring size %d fill_level %d\n",
  474. htt->rx_ring.size, htt->rx_ring.fill_level);
  475. return 0;
  476. err_dma_idx:
  477. dma_free_coherent(htt->ar->dev,
  478. (htt->rx_ring.size *
  479. sizeof(htt->rx_ring.paddrs_ring)),
  480. htt->rx_ring.paddrs_ring,
  481. htt->rx_ring.base_paddr);
  482. err_dma_ring:
  483. kfree(htt->rx_ring.netbufs_ring);
  484. err_netbuf:
  485. return -ENOMEM;
  486. }
  487. static int ath10k_htt_rx_crypto_param_len(struct ath10k *ar,
  488. enum htt_rx_mpdu_encrypt_type type)
  489. {
  490. switch (type) {
  491. case HTT_RX_MPDU_ENCRYPT_NONE:
  492. return 0;
  493. case HTT_RX_MPDU_ENCRYPT_WEP40:
  494. case HTT_RX_MPDU_ENCRYPT_WEP104:
  495. return IEEE80211_WEP_IV_LEN;
  496. case HTT_RX_MPDU_ENCRYPT_TKIP_WITHOUT_MIC:
  497. case HTT_RX_MPDU_ENCRYPT_TKIP_WPA:
  498. return IEEE80211_TKIP_IV_LEN;
  499. case HTT_RX_MPDU_ENCRYPT_AES_CCM_WPA2:
  500. return IEEE80211_CCMP_HDR_LEN;
  501. case HTT_RX_MPDU_ENCRYPT_WEP128:
  502. case HTT_RX_MPDU_ENCRYPT_WAPI:
  503. break;
  504. }
  505. ath10k_warn(ar, "unsupported encryption type %d\n", type);
  506. return 0;
  507. }
  508. #define MICHAEL_MIC_LEN 8
  509. static int ath10k_htt_rx_crypto_tail_len(struct ath10k *ar,
  510. enum htt_rx_mpdu_encrypt_type type)
  511. {
  512. switch (type) {
  513. case HTT_RX_MPDU_ENCRYPT_NONE:
  514. return 0;
  515. case HTT_RX_MPDU_ENCRYPT_WEP40:
  516. case HTT_RX_MPDU_ENCRYPT_WEP104:
  517. return IEEE80211_WEP_ICV_LEN;
  518. case HTT_RX_MPDU_ENCRYPT_TKIP_WITHOUT_MIC:
  519. case HTT_RX_MPDU_ENCRYPT_TKIP_WPA:
  520. return IEEE80211_TKIP_ICV_LEN;
  521. case HTT_RX_MPDU_ENCRYPT_AES_CCM_WPA2:
  522. return IEEE80211_CCMP_MIC_LEN;
  523. case HTT_RX_MPDU_ENCRYPT_WEP128:
  524. case HTT_RX_MPDU_ENCRYPT_WAPI:
  525. break;
  526. }
  527. ath10k_warn(ar, "unsupported encryption type %d\n", type);
  528. return 0;
  529. }
  530. struct amsdu_subframe_hdr {
  531. u8 dst[ETH_ALEN];
  532. u8 src[ETH_ALEN];
  533. __be16 len;
  534. } __packed;
  535. #define GROUP_ID_IS_SU_MIMO(x) ((x) == 0 || (x) == 63)
  536. static void ath10k_htt_rx_h_rates(struct ath10k *ar,
  537. struct ieee80211_rx_status *status,
  538. struct htt_rx_desc *rxd)
  539. {
  540. struct ieee80211_supported_band *sband;
  541. u8 cck, rate, bw, sgi, mcs, nss;
  542. u8 preamble = 0;
  543. u8 group_id;
  544. u32 info1, info2, info3;
  545. info1 = __le32_to_cpu(rxd->ppdu_start.info1);
  546. info2 = __le32_to_cpu(rxd->ppdu_start.info2);
  547. info3 = __le32_to_cpu(rxd->ppdu_start.info3);
  548. preamble = MS(info1, RX_PPDU_START_INFO1_PREAMBLE_TYPE);
  549. switch (preamble) {
  550. case HTT_RX_LEGACY:
  551. /* To get legacy rate index band is required. Since band can't
  552. * be undefined check if freq is non-zero.
  553. */
  554. if (!status->freq)
  555. return;
  556. cck = info1 & RX_PPDU_START_INFO1_L_SIG_RATE_SELECT;
  557. rate = MS(info1, RX_PPDU_START_INFO1_L_SIG_RATE);
  558. rate &= ~RX_PPDU_START_RATE_FLAG;
  559. sband = &ar->mac.sbands[status->band];
  560. status->rate_idx = ath10k_mac_hw_rate_to_idx(sband, rate, cck);
  561. break;
  562. case HTT_RX_HT:
  563. case HTT_RX_HT_WITH_TXBF:
  564. /* HT-SIG - Table 20-11 in info2 and info3 */
  565. mcs = info2 & 0x1F;
  566. nss = mcs >> 3;
  567. bw = (info2 >> 7) & 1;
  568. sgi = (info3 >> 7) & 1;
  569. status->rate_idx = mcs;
  570. status->flag |= RX_FLAG_HT;
  571. if (sgi)
  572. status->flag |= RX_FLAG_SHORT_GI;
  573. if (bw)
  574. status->flag |= RX_FLAG_40MHZ;
  575. break;
  576. case HTT_RX_VHT:
  577. case HTT_RX_VHT_WITH_TXBF:
  578. /* VHT-SIG-A1 in info2, VHT-SIG-A2 in info3
  579. TODO check this */
  580. bw = info2 & 3;
  581. sgi = info3 & 1;
  582. group_id = (info2 >> 4) & 0x3F;
  583. if (GROUP_ID_IS_SU_MIMO(group_id)) {
  584. mcs = (info3 >> 4) & 0x0F;
  585. nss = ((info2 >> 10) & 0x07) + 1;
  586. } else {
  587. /* Hardware doesn't decode VHT-SIG-B into Rx descriptor
  588. * so it's impossible to decode MCS. Also since
  589. * firmware consumes Group Id Management frames host
  590. * has no knowledge regarding group/user position
  591. * mapping so it's impossible to pick the correct Nsts
  592. * from VHT-SIG-A1.
  593. *
  594. * Bandwidth and SGI are valid so report the rateinfo
  595. * on best-effort basis.
  596. */
  597. mcs = 0;
  598. nss = 1;
  599. }
  600. if (mcs > 0x09) {
  601. ath10k_warn(ar, "invalid MCS received %u\n", mcs);
  602. ath10k_warn(ar, "rxd %08x mpdu start %08x %08x msdu start %08x %08x ppdu start %08x %08x %08x %08x %08x\n",
  603. __le32_to_cpu(rxd->attention.flags),
  604. __le32_to_cpu(rxd->mpdu_start.info0),
  605. __le32_to_cpu(rxd->mpdu_start.info1),
  606. __le32_to_cpu(rxd->msdu_start.common.info0),
  607. __le32_to_cpu(rxd->msdu_start.common.info1),
  608. rxd->ppdu_start.info0,
  609. __le32_to_cpu(rxd->ppdu_start.info1),
  610. __le32_to_cpu(rxd->ppdu_start.info2),
  611. __le32_to_cpu(rxd->ppdu_start.info3),
  612. __le32_to_cpu(rxd->ppdu_start.info4));
  613. ath10k_warn(ar, "msdu end %08x mpdu end %08x\n",
  614. __le32_to_cpu(rxd->msdu_end.common.info0),
  615. __le32_to_cpu(rxd->mpdu_end.info0));
  616. ath10k_dbg_dump(ar, ATH10K_DBG_HTT_DUMP, NULL,
  617. "rx desc msdu payload: ",
  618. rxd->msdu_payload, 50);
  619. }
  620. status->rate_idx = mcs;
  621. status->vht_nss = nss;
  622. if (sgi)
  623. status->flag |= RX_FLAG_SHORT_GI;
  624. switch (bw) {
  625. /* 20MHZ */
  626. case 0:
  627. break;
  628. /* 40MHZ */
  629. case 1:
  630. status->flag |= RX_FLAG_40MHZ;
  631. break;
  632. /* 80MHZ */
  633. case 2:
  634. status->vht_flag |= RX_VHT_FLAG_80MHZ;
  635. }
  636. status->flag |= RX_FLAG_VHT;
  637. break;
  638. default:
  639. break;
  640. }
  641. }
  642. static struct ieee80211_channel *
  643. ath10k_htt_rx_h_peer_channel(struct ath10k *ar, struct htt_rx_desc *rxd)
  644. {
  645. struct ath10k_peer *peer;
  646. struct ath10k_vif *arvif;
  647. struct cfg80211_chan_def def;
  648. u16 peer_id;
  649. lockdep_assert_held(&ar->data_lock);
  650. if (!rxd)
  651. return NULL;
  652. if (rxd->attention.flags &
  653. __cpu_to_le32(RX_ATTENTION_FLAGS_PEER_IDX_INVALID))
  654. return NULL;
  655. if (!(rxd->msdu_end.common.info0 &
  656. __cpu_to_le32(RX_MSDU_END_INFO0_FIRST_MSDU)))
  657. return NULL;
  658. peer_id = MS(__le32_to_cpu(rxd->mpdu_start.info0),
  659. RX_MPDU_START_INFO0_PEER_IDX);
  660. peer = ath10k_peer_find_by_id(ar, peer_id);
  661. if (!peer)
  662. return NULL;
  663. arvif = ath10k_get_arvif(ar, peer->vdev_id);
  664. if (WARN_ON_ONCE(!arvif))
  665. return NULL;
  666. if (WARN_ON(ath10k_mac_vif_chan(arvif->vif, &def)))
  667. return NULL;
  668. return def.chan;
  669. }
  670. static struct ieee80211_channel *
  671. ath10k_htt_rx_h_vdev_channel(struct ath10k *ar, u32 vdev_id)
  672. {
  673. struct ath10k_vif *arvif;
  674. struct cfg80211_chan_def def;
  675. lockdep_assert_held(&ar->data_lock);
  676. list_for_each_entry(arvif, &ar->arvifs, list) {
  677. if (arvif->vdev_id == vdev_id &&
  678. ath10k_mac_vif_chan(arvif->vif, &def) == 0)
  679. return def.chan;
  680. }
  681. return NULL;
  682. }
  683. static void
  684. ath10k_htt_rx_h_any_chan_iter(struct ieee80211_hw *hw,
  685. struct ieee80211_chanctx_conf *conf,
  686. void *data)
  687. {
  688. struct cfg80211_chan_def *def = data;
  689. *def = conf->def;
  690. }
  691. static struct ieee80211_channel *
  692. ath10k_htt_rx_h_any_channel(struct ath10k *ar)
  693. {
  694. struct cfg80211_chan_def def = {};
  695. ieee80211_iter_chan_contexts_atomic(ar->hw,
  696. ath10k_htt_rx_h_any_chan_iter,
  697. &def);
  698. return def.chan;
  699. }
  700. static bool ath10k_htt_rx_h_channel(struct ath10k *ar,
  701. struct ieee80211_rx_status *status,
  702. struct htt_rx_desc *rxd,
  703. u32 vdev_id)
  704. {
  705. struct ieee80211_channel *ch;
  706. spin_lock_bh(&ar->data_lock);
  707. ch = ar->scan_channel;
  708. if (!ch)
  709. ch = ar->rx_channel;
  710. if (!ch)
  711. ch = ath10k_htt_rx_h_peer_channel(ar, rxd);
  712. if (!ch)
  713. ch = ath10k_htt_rx_h_vdev_channel(ar, vdev_id);
  714. if (!ch)
  715. ch = ath10k_htt_rx_h_any_channel(ar);
  716. if (!ch)
  717. ch = ar->tgt_oper_chan;
  718. spin_unlock_bh(&ar->data_lock);
  719. if (!ch)
  720. return false;
  721. status->band = ch->band;
  722. status->freq = ch->center_freq;
  723. return true;
  724. }
  725. static void ath10k_htt_rx_h_signal(struct ath10k *ar,
  726. struct ieee80211_rx_status *status,
  727. struct htt_rx_desc *rxd)
  728. {
  729. /* FIXME: Get real NF */
  730. status->signal = ATH10K_DEFAULT_NOISE_FLOOR +
  731. rxd->ppdu_start.rssi_comb;
  732. status->flag &= ~RX_FLAG_NO_SIGNAL_VAL;
  733. }
  734. static void ath10k_htt_rx_h_mactime(struct ath10k *ar,
  735. struct ieee80211_rx_status *status,
  736. struct htt_rx_desc *rxd)
  737. {
  738. /* FIXME: TSF is known only at the end of PPDU, in the last MPDU. This
  739. * means all prior MSDUs in a PPDU are reported to mac80211 without the
  740. * TSF. Is it worth holding frames until end of PPDU is known?
  741. *
  742. * FIXME: Can we get/compute 64bit TSF?
  743. */
  744. status->mactime = __le32_to_cpu(rxd->ppdu_end.common.tsf_timestamp);
  745. status->flag |= RX_FLAG_MACTIME_END;
  746. }
  747. static void ath10k_htt_rx_h_ppdu(struct ath10k *ar,
  748. struct sk_buff_head *amsdu,
  749. struct ieee80211_rx_status *status,
  750. u32 vdev_id)
  751. {
  752. struct sk_buff *first;
  753. struct htt_rx_desc *rxd;
  754. bool is_first_ppdu;
  755. bool is_last_ppdu;
  756. if (skb_queue_empty(amsdu))
  757. return;
  758. first = skb_peek(amsdu);
  759. rxd = (void *)first->data - sizeof(*rxd);
  760. is_first_ppdu = !!(rxd->attention.flags &
  761. __cpu_to_le32(RX_ATTENTION_FLAGS_FIRST_MPDU));
  762. is_last_ppdu = !!(rxd->attention.flags &
  763. __cpu_to_le32(RX_ATTENTION_FLAGS_LAST_MPDU));
  764. if (is_first_ppdu) {
  765. /* New PPDU starts so clear out the old per-PPDU status. */
  766. status->freq = 0;
  767. status->rate_idx = 0;
  768. status->vht_nss = 0;
  769. status->vht_flag &= ~RX_VHT_FLAG_80MHZ;
  770. status->flag &= ~(RX_FLAG_HT |
  771. RX_FLAG_VHT |
  772. RX_FLAG_SHORT_GI |
  773. RX_FLAG_40MHZ |
  774. RX_FLAG_MACTIME_END);
  775. status->flag |= RX_FLAG_NO_SIGNAL_VAL;
  776. ath10k_htt_rx_h_signal(ar, status, rxd);
  777. ath10k_htt_rx_h_channel(ar, status, rxd, vdev_id);
  778. ath10k_htt_rx_h_rates(ar, status, rxd);
  779. }
  780. if (is_last_ppdu)
  781. ath10k_htt_rx_h_mactime(ar, status, rxd);
  782. }
  783. static const char * const tid_to_ac[] = {
  784. "BE",
  785. "BK",
  786. "BK",
  787. "BE",
  788. "VI",
  789. "VI",
  790. "VO",
  791. "VO",
  792. };
  793. static char *ath10k_get_tid(struct ieee80211_hdr *hdr, char *out, size_t size)
  794. {
  795. u8 *qc;
  796. int tid;
  797. if (!ieee80211_is_data_qos(hdr->frame_control))
  798. return "";
  799. qc = ieee80211_get_qos_ctl(hdr);
  800. tid = *qc & IEEE80211_QOS_CTL_TID_MASK;
  801. if (tid < 8)
  802. snprintf(out, size, "tid %d (%s)", tid, tid_to_ac[tid]);
  803. else
  804. snprintf(out, size, "tid %d", tid);
  805. return out;
  806. }
  807. static void ath10k_process_rx(struct ath10k *ar,
  808. struct ieee80211_rx_status *rx_status,
  809. struct sk_buff *skb)
  810. {
  811. struct ieee80211_rx_status *status;
  812. struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
  813. char tid[32];
  814. status = IEEE80211_SKB_RXCB(skb);
  815. *status = *rx_status;
  816. ath10k_dbg(ar, ATH10K_DBG_DATA,
  817. "rx skb %p len %u peer %pM %s %s sn %u %s%s%s%s%s %srate_idx %u vht_nss %u freq %u band %u flag 0x%x fcs-err %i mic-err %i amsdu-more %i\n",
  818. skb,
  819. skb->len,
  820. ieee80211_get_SA(hdr),
  821. ath10k_get_tid(hdr, tid, sizeof(tid)),
  822. is_multicast_ether_addr(ieee80211_get_DA(hdr)) ?
  823. "mcast" : "ucast",
  824. (__le16_to_cpu(hdr->seq_ctrl) & IEEE80211_SCTL_SEQ) >> 4,
  825. status->flag == 0 ? "legacy" : "",
  826. status->flag & RX_FLAG_HT ? "ht" : "",
  827. status->flag & RX_FLAG_VHT ? "vht" : "",
  828. status->flag & RX_FLAG_40MHZ ? "40" : "",
  829. status->vht_flag & RX_VHT_FLAG_80MHZ ? "80" : "",
  830. status->flag & RX_FLAG_SHORT_GI ? "sgi " : "",
  831. status->rate_idx,
  832. status->vht_nss,
  833. status->freq,
  834. status->band, status->flag,
  835. !!(status->flag & RX_FLAG_FAILED_FCS_CRC),
  836. !!(status->flag & RX_FLAG_MMIC_ERROR),
  837. !!(status->flag & RX_FLAG_AMSDU_MORE));
  838. ath10k_dbg_dump(ar, ATH10K_DBG_HTT_DUMP, NULL, "rx skb: ",
  839. skb->data, skb->len);
  840. trace_ath10k_rx_hdr(ar, skb->data, skb->len);
  841. trace_ath10k_rx_payload(ar, skb->data, skb->len);
  842. ieee80211_rx(ar->hw, skb);
  843. }
  844. static int ath10k_htt_rx_nwifi_hdrlen(struct ath10k *ar,
  845. struct ieee80211_hdr *hdr)
  846. {
  847. int len = ieee80211_hdrlen(hdr->frame_control);
  848. if (!test_bit(ATH10K_FW_FEATURE_NO_NWIFI_DECAP_4ADDR_PADDING,
  849. ar->fw_features))
  850. len = round_up(len, 4);
  851. return len;
  852. }
  853. static void ath10k_htt_rx_h_undecap_raw(struct ath10k *ar,
  854. struct sk_buff *msdu,
  855. struct ieee80211_rx_status *status,
  856. enum htt_rx_mpdu_encrypt_type enctype,
  857. bool is_decrypted)
  858. {
  859. struct ieee80211_hdr *hdr;
  860. struct htt_rx_desc *rxd;
  861. size_t hdr_len;
  862. size_t crypto_len;
  863. bool is_first;
  864. bool is_last;
  865. rxd = (void *)msdu->data - sizeof(*rxd);
  866. is_first = !!(rxd->msdu_end.common.info0 &
  867. __cpu_to_le32(RX_MSDU_END_INFO0_FIRST_MSDU));
  868. is_last = !!(rxd->msdu_end.common.info0 &
  869. __cpu_to_le32(RX_MSDU_END_INFO0_LAST_MSDU));
  870. /* Delivered decapped frame:
  871. * [802.11 header]
  872. * [crypto param] <-- can be trimmed if !fcs_err &&
  873. * !decrypt_err && !peer_idx_invalid
  874. * [amsdu header] <-- only if A-MSDU
  875. * [rfc1042/llc]
  876. * [payload]
  877. * [FCS] <-- at end, needs to be trimmed
  878. */
  879. /* This probably shouldn't happen but warn just in case */
  880. if (unlikely(WARN_ON_ONCE(!is_first)))
  881. return;
  882. /* This probably shouldn't happen but warn just in case */
  883. if (unlikely(WARN_ON_ONCE(!(is_first && is_last))))
  884. return;
  885. skb_trim(msdu, msdu->len - FCS_LEN);
  886. /* In most cases this will be true for sniffed frames. It makes sense
  887. * to deliver them as-is without stripping the crypto param. This is
  888. * necessary for software based decryption.
  889. *
  890. * If there's no error then the frame is decrypted. At least that is
  891. * the case for frames that come in via fragmented rx indication.
  892. */
  893. if (!is_decrypted)
  894. return;
  895. /* The payload is decrypted so strip crypto params. Start from tail
  896. * since hdr is used to compute some stuff.
  897. */
  898. hdr = (void *)msdu->data;
  899. /* Tail */
  900. if (status->flag & RX_FLAG_IV_STRIPPED)
  901. skb_trim(msdu, msdu->len -
  902. ath10k_htt_rx_crypto_tail_len(ar, enctype));
  903. /* MMIC */
  904. if ((status->flag & RX_FLAG_MMIC_STRIPPED) &&
  905. !ieee80211_has_morefrags(hdr->frame_control) &&
  906. enctype == HTT_RX_MPDU_ENCRYPT_TKIP_WPA)
  907. skb_trim(msdu, msdu->len - 8);
  908. /* Head */
  909. if (status->flag & RX_FLAG_IV_STRIPPED) {
  910. hdr_len = ieee80211_hdrlen(hdr->frame_control);
  911. crypto_len = ath10k_htt_rx_crypto_param_len(ar, enctype);
  912. memmove((void *)msdu->data + crypto_len,
  913. (void *)msdu->data, hdr_len);
  914. skb_pull(msdu, crypto_len);
  915. }
  916. }
  917. static void ath10k_htt_rx_h_undecap_nwifi(struct ath10k *ar,
  918. struct sk_buff *msdu,
  919. struct ieee80211_rx_status *status,
  920. const u8 first_hdr[64])
  921. {
  922. struct ieee80211_hdr *hdr;
  923. size_t hdr_len;
  924. u8 da[ETH_ALEN];
  925. u8 sa[ETH_ALEN];
  926. /* Delivered decapped frame:
  927. * [nwifi 802.11 header] <-- replaced with 802.11 hdr
  928. * [rfc1042/llc]
  929. *
  930. * Note: The nwifi header doesn't have QoS Control and is
  931. * (always?) a 3addr frame.
  932. *
  933. * Note2: There's no A-MSDU subframe header. Even if it's part
  934. * of an A-MSDU.
  935. */
  936. /* pull decapped header and copy SA & DA */
  937. if ((ar->hw_params.hw_4addr_pad == ATH10K_HW_4ADDR_PAD_BEFORE) &&
  938. ieee80211_has_a4(((struct ieee80211_hdr *)first_hdr)->frame_control)) {
  939. /* The QCA99X0 4 address mode pad 2 bytes at the
  940. * beginning of MSDU
  941. */
  942. hdr = (struct ieee80211_hdr *)(msdu->data + 2);
  943. /* The skb length need be extended 2 as the 2 bytes at the tail
  944. * be excluded due to the padding
  945. */
  946. skb_put(msdu, 2);
  947. } else {
  948. hdr = (struct ieee80211_hdr *)(msdu->data);
  949. }
  950. hdr_len = ath10k_htt_rx_nwifi_hdrlen(ar, hdr);
  951. ether_addr_copy(da, ieee80211_get_DA(hdr));
  952. ether_addr_copy(sa, ieee80211_get_SA(hdr));
  953. skb_pull(msdu, hdr_len);
  954. /* push original 802.11 header */
  955. hdr = (struct ieee80211_hdr *)first_hdr;
  956. hdr_len = ieee80211_hdrlen(hdr->frame_control);
  957. memcpy(skb_push(msdu, hdr_len), hdr, hdr_len);
  958. /* original 802.11 header has a different DA and in
  959. * case of 4addr it may also have different SA
  960. */
  961. hdr = (struct ieee80211_hdr *)msdu->data;
  962. ether_addr_copy(ieee80211_get_DA(hdr), da);
  963. ether_addr_copy(ieee80211_get_SA(hdr), sa);
  964. }
  965. static void *ath10k_htt_rx_h_find_rfc1042(struct ath10k *ar,
  966. struct sk_buff *msdu,
  967. enum htt_rx_mpdu_encrypt_type enctype)
  968. {
  969. struct ieee80211_hdr *hdr;
  970. struct htt_rx_desc *rxd;
  971. size_t hdr_len, crypto_len;
  972. void *rfc1042;
  973. bool is_first, is_last, is_amsdu;
  974. rxd = (void *)msdu->data - sizeof(*rxd);
  975. hdr = (void *)rxd->rx_hdr_status;
  976. is_first = !!(rxd->msdu_end.common.info0 &
  977. __cpu_to_le32(RX_MSDU_END_INFO0_FIRST_MSDU));
  978. is_last = !!(rxd->msdu_end.common.info0 &
  979. __cpu_to_le32(RX_MSDU_END_INFO0_LAST_MSDU));
  980. is_amsdu = !(is_first && is_last);
  981. rfc1042 = hdr;
  982. if (is_first) {
  983. hdr_len = ieee80211_hdrlen(hdr->frame_control);
  984. crypto_len = ath10k_htt_rx_crypto_param_len(ar, enctype);
  985. rfc1042 += round_up(hdr_len, 4) +
  986. round_up(crypto_len, 4);
  987. }
  988. if (is_amsdu)
  989. rfc1042 += sizeof(struct amsdu_subframe_hdr);
  990. return rfc1042;
  991. }
  992. static void ath10k_htt_rx_h_undecap_eth(struct ath10k *ar,
  993. struct sk_buff *msdu,
  994. struct ieee80211_rx_status *status,
  995. const u8 first_hdr[64],
  996. enum htt_rx_mpdu_encrypt_type enctype)
  997. {
  998. struct ieee80211_hdr *hdr;
  999. struct ethhdr *eth;
  1000. size_t hdr_len;
  1001. void *rfc1042;
  1002. u8 da[ETH_ALEN];
  1003. u8 sa[ETH_ALEN];
  1004. /* Delivered decapped frame:
  1005. * [eth header] <-- replaced with 802.11 hdr & rfc1042/llc
  1006. * [payload]
  1007. */
  1008. rfc1042 = ath10k_htt_rx_h_find_rfc1042(ar, msdu, enctype);
  1009. if (WARN_ON_ONCE(!rfc1042))
  1010. return;
  1011. /* pull decapped header and copy SA & DA */
  1012. eth = (struct ethhdr *)msdu->data;
  1013. ether_addr_copy(da, eth->h_dest);
  1014. ether_addr_copy(sa, eth->h_source);
  1015. skb_pull(msdu, sizeof(struct ethhdr));
  1016. /* push rfc1042/llc/snap */
  1017. memcpy(skb_push(msdu, sizeof(struct rfc1042_hdr)), rfc1042,
  1018. sizeof(struct rfc1042_hdr));
  1019. /* push original 802.11 header */
  1020. hdr = (struct ieee80211_hdr *)first_hdr;
  1021. hdr_len = ieee80211_hdrlen(hdr->frame_control);
  1022. memcpy(skb_push(msdu, hdr_len), hdr, hdr_len);
  1023. /* original 802.11 header has a different DA and in
  1024. * case of 4addr it may also have different SA
  1025. */
  1026. hdr = (struct ieee80211_hdr *)msdu->data;
  1027. ether_addr_copy(ieee80211_get_DA(hdr), da);
  1028. ether_addr_copy(ieee80211_get_SA(hdr), sa);
  1029. }
  1030. static void ath10k_htt_rx_h_undecap_snap(struct ath10k *ar,
  1031. struct sk_buff *msdu,
  1032. struct ieee80211_rx_status *status,
  1033. const u8 first_hdr[64])
  1034. {
  1035. struct ieee80211_hdr *hdr;
  1036. size_t hdr_len;
  1037. /* Delivered decapped frame:
  1038. * [amsdu header] <-- replaced with 802.11 hdr
  1039. * [rfc1042/llc]
  1040. * [payload]
  1041. */
  1042. skb_pull(msdu, sizeof(struct amsdu_subframe_hdr));
  1043. hdr = (struct ieee80211_hdr *)first_hdr;
  1044. hdr_len = ieee80211_hdrlen(hdr->frame_control);
  1045. memcpy(skb_push(msdu, hdr_len), hdr, hdr_len);
  1046. }
  1047. static void ath10k_htt_rx_h_undecap(struct ath10k *ar,
  1048. struct sk_buff *msdu,
  1049. struct ieee80211_rx_status *status,
  1050. u8 first_hdr[64],
  1051. enum htt_rx_mpdu_encrypt_type enctype,
  1052. bool is_decrypted)
  1053. {
  1054. struct htt_rx_desc *rxd;
  1055. enum rx_msdu_decap_format decap;
  1056. /* First msdu's decapped header:
  1057. * [802.11 header] <-- padded to 4 bytes long
  1058. * [crypto param] <-- padded to 4 bytes long
  1059. * [amsdu header] <-- only if A-MSDU
  1060. * [rfc1042/llc]
  1061. *
  1062. * Other (2nd, 3rd, ..) msdu's decapped header:
  1063. * [amsdu header] <-- only if A-MSDU
  1064. * [rfc1042/llc]
  1065. */
  1066. rxd = (void *)msdu->data - sizeof(*rxd);
  1067. decap = MS(__le32_to_cpu(rxd->msdu_start.common.info1),
  1068. RX_MSDU_START_INFO1_DECAP_FORMAT);
  1069. switch (decap) {
  1070. case RX_MSDU_DECAP_RAW:
  1071. ath10k_htt_rx_h_undecap_raw(ar, msdu, status, enctype,
  1072. is_decrypted);
  1073. break;
  1074. case RX_MSDU_DECAP_NATIVE_WIFI:
  1075. ath10k_htt_rx_h_undecap_nwifi(ar, msdu, status, first_hdr);
  1076. break;
  1077. case RX_MSDU_DECAP_ETHERNET2_DIX:
  1078. ath10k_htt_rx_h_undecap_eth(ar, msdu, status, first_hdr, enctype);
  1079. break;
  1080. case RX_MSDU_DECAP_8023_SNAP_LLC:
  1081. ath10k_htt_rx_h_undecap_snap(ar, msdu, status, first_hdr);
  1082. break;
  1083. }
  1084. }
  1085. static int ath10k_htt_rx_get_csum_state(struct sk_buff *skb)
  1086. {
  1087. struct htt_rx_desc *rxd;
  1088. u32 flags, info;
  1089. bool is_ip4, is_ip6;
  1090. bool is_tcp, is_udp;
  1091. bool ip_csum_ok, tcpudp_csum_ok;
  1092. rxd = (void *)skb->data - sizeof(*rxd);
  1093. flags = __le32_to_cpu(rxd->attention.flags);
  1094. info = __le32_to_cpu(rxd->msdu_start.common.info1);
  1095. is_ip4 = !!(info & RX_MSDU_START_INFO1_IPV4_PROTO);
  1096. is_ip6 = !!(info & RX_MSDU_START_INFO1_IPV6_PROTO);
  1097. is_tcp = !!(info & RX_MSDU_START_INFO1_TCP_PROTO);
  1098. is_udp = !!(info & RX_MSDU_START_INFO1_UDP_PROTO);
  1099. ip_csum_ok = !(flags & RX_ATTENTION_FLAGS_IP_CHKSUM_FAIL);
  1100. tcpudp_csum_ok = !(flags & RX_ATTENTION_FLAGS_TCP_UDP_CHKSUM_FAIL);
  1101. if (!is_ip4 && !is_ip6)
  1102. return CHECKSUM_NONE;
  1103. if (!is_tcp && !is_udp)
  1104. return CHECKSUM_NONE;
  1105. if (!ip_csum_ok)
  1106. return CHECKSUM_NONE;
  1107. if (!tcpudp_csum_ok)
  1108. return CHECKSUM_NONE;
  1109. return CHECKSUM_UNNECESSARY;
  1110. }
  1111. static void ath10k_htt_rx_h_csum_offload(struct sk_buff *msdu)
  1112. {
  1113. msdu->ip_summed = ath10k_htt_rx_get_csum_state(msdu);
  1114. }
  1115. static void ath10k_htt_rx_h_mpdu(struct ath10k *ar,
  1116. struct sk_buff_head *amsdu,
  1117. struct ieee80211_rx_status *status)
  1118. {
  1119. struct sk_buff *first;
  1120. struct sk_buff *last;
  1121. struct sk_buff *msdu;
  1122. struct htt_rx_desc *rxd;
  1123. struct ieee80211_hdr *hdr;
  1124. enum htt_rx_mpdu_encrypt_type enctype;
  1125. u8 first_hdr[64];
  1126. u8 *qos;
  1127. size_t hdr_len;
  1128. bool has_fcs_err;
  1129. bool has_crypto_err;
  1130. bool has_tkip_err;
  1131. bool has_peer_idx_invalid;
  1132. bool is_decrypted;
  1133. bool is_mgmt;
  1134. u32 attention;
  1135. if (skb_queue_empty(amsdu))
  1136. return;
  1137. first = skb_peek(amsdu);
  1138. rxd = (void *)first->data - sizeof(*rxd);
  1139. is_mgmt = !!(rxd->attention.flags &
  1140. __cpu_to_le32(RX_ATTENTION_FLAGS_MGMT_TYPE));
  1141. enctype = MS(__le32_to_cpu(rxd->mpdu_start.info0),
  1142. RX_MPDU_START_INFO0_ENCRYPT_TYPE);
  1143. /* First MSDU's Rx descriptor in an A-MSDU contains full 802.11
  1144. * decapped header. It'll be used for undecapping of each MSDU.
  1145. */
  1146. hdr = (void *)rxd->rx_hdr_status;
  1147. hdr_len = ieee80211_hdrlen(hdr->frame_control);
  1148. memcpy(first_hdr, hdr, hdr_len);
  1149. /* Each A-MSDU subframe will use the original header as the base and be
  1150. * reported as a separate MSDU so strip the A-MSDU bit from QoS Ctl.
  1151. */
  1152. hdr = (void *)first_hdr;
  1153. qos = ieee80211_get_qos_ctl(hdr);
  1154. qos[0] &= ~IEEE80211_QOS_CTL_A_MSDU_PRESENT;
  1155. /* Some attention flags are valid only in the last MSDU. */
  1156. last = skb_peek_tail(amsdu);
  1157. rxd = (void *)last->data - sizeof(*rxd);
  1158. attention = __le32_to_cpu(rxd->attention.flags);
  1159. has_fcs_err = !!(attention & RX_ATTENTION_FLAGS_FCS_ERR);
  1160. has_crypto_err = !!(attention & RX_ATTENTION_FLAGS_DECRYPT_ERR);
  1161. has_tkip_err = !!(attention & RX_ATTENTION_FLAGS_TKIP_MIC_ERR);
  1162. has_peer_idx_invalid = !!(attention & RX_ATTENTION_FLAGS_PEER_IDX_INVALID);
  1163. /* Note: If hardware captures an encrypted frame that it can't decrypt,
  1164. * e.g. due to fcs error, missing peer or invalid key data it will
  1165. * report the frame as raw.
  1166. */
  1167. is_decrypted = (enctype != HTT_RX_MPDU_ENCRYPT_NONE &&
  1168. !has_fcs_err &&
  1169. !has_crypto_err &&
  1170. !has_peer_idx_invalid);
  1171. /* Clear per-MPDU flags while leaving per-PPDU flags intact. */
  1172. status->flag &= ~(RX_FLAG_FAILED_FCS_CRC |
  1173. RX_FLAG_MMIC_ERROR |
  1174. RX_FLAG_DECRYPTED |
  1175. RX_FLAG_IV_STRIPPED |
  1176. RX_FLAG_ONLY_MONITOR |
  1177. RX_FLAG_MMIC_STRIPPED);
  1178. if (has_fcs_err)
  1179. status->flag |= RX_FLAG_FAILED_FCS_CRC;
  1180. if (has_tkip_err)
  1181. status->flag |= RX_FLAG_MMIC_ERROR;
  1182. /* Firmware reports all necessary management frames via WMI already.
  1183. * They are not reported to monitor interfaces at all so pass the ones
  1184. * coming via HTT to monitor interfaces instead. This simplifies
  1185. * matters a lot.
  1186. */
  1187. if (is_mgmt)
  1188. status->flag |= RX_FLAG_ONLY_MONITOR;
  1189. if (is_decrypted) {
  1190. status->flag |= RX_FLAG_DECRYPTED;
  1191. if (likely(!is_mgmt))
  1192. status->flag |= RX_FLAG_IV_STRIPPED |
  1193. RX_FLAG_MMIC_STRIPPED;
  1194. }
  1195. skb_queue_walk(amsdu, msdu) {
  1196. ath10k_htt_rx_h_csum_offload(msdu);
  1197. ath10k_htt_rx_h_undecap(ar, msdu, status, first_hdr, enctype,
  1198. is_decrypted);
  1199. /* Undecapping involves copying the original 802.11 header back
  1200. * to sk_buff. If frame is protected and hardware has decrypted
  1201. * it then remove the protected bit.
  1202. */
  1203. if (!is_decrypted)
  1204. continue;
  1205. if (is_mgmt)
  1206. continue;
  1207. hdr = (void *)msdu->data;
  1208. hdr->frame_control &= ~__cpu_to_le16(IEEE80211_FCTL_PROTECTED);
  1209. }
  1210. }
  1211. static void ath10k_htt_rx_h_deliver(struct ath10k *ar,
  1212. struct sk_buff_head *amsdu,
  1213. struct ieee80211_rx_status *status)
  1214. {
  1215. struct sk_buff *msdu;
  1216. while ((msdu = __skb_dequeue(amsdu))) {
  1217. /* Setup per-MSDU flags */
  1218. if (skb_queue_empty(amsdu))
  1219. status->flag &= ~RX_FLAG_AMSDU_MORE;
  1220. else
  1221. status->flag |= RX_FLAG_AMSDU_MORE;
  1222. ath10k_process_rx(ar, status, msdu);
  1223. }
  1224. }
  1225. static int ath10k_unchain_msdu(struct sk_buff_head *amsdu)
  1226. {
  1227. struct sk_buff *skb, *first;
  1228. int space;
  1229. int total_len = 0;
  1230. /* TODO: Might could optimize this by using
  1231. * skb_try_coalesce or similar method to
  1232. * decrease copying, or maybe get mac80211 to
  1233. * provide a way to just receive a list of
  1234. * skb?
  1235. */
  1236. first = __skb_dequeue(amsdu);
  1237. /* Allocate total length all at once. */
  1238. skb_queue_walk(amsdu, skb)
  1239. total_len += skb->len;
  1240. space = total_len - skb_tailroom(first);
  1241. if ((space > 0) &&
  1242. (pskb_expand_head(first, 0, space, GFP_ATOMIC) < 0)) {
  1243. /* TODO: bump some rx-oom error stat */
  1244. /* put it back together so we can free the
  1245. * whole list at once.
  1246. */
  1247. __skb_queue_head(amsdu, first);
  1248. return -1;
  1249. }
  1250. /* Walk list again, copying contents into
  1251. * msdu_head
  1252. */
  1253. while ((skb = __skb_dequeue(amsdu))) {
  1254. skb_copy_from_linear_data(skb, skb_put(first, skb->len),
  1255. skb->len);
  1256. dev_kfree_skb_any(skb);
  1257. }
  1258. __skb_queue_head(amsdu, first);
  1259. return 0;
  1260. }
  1261. static void ath10k_htt_rx_h_unchain(struct ath10k *ar,
  1262. struct sk_buff_head *amsdu,
  1263. bool chained)
  1264. {
  1265. struct sk_buff *first;
  1266. struct htt_rx_desc *rxd;
  1267. enum rx_msdu_decap_format decap;
  1268. first = skb_peek(amsdu);
  1269. rxd = (void *)first->data - sizeof(*rxd);
  1270. decap = MS(__le32_to_cpu(rxd->msdu_start.common.info1),
  1271. RX_MSDU_START_INFO1_DECAP_FORMAT);
  1272. if (!chained)
  1273. return;
  1274. /* FIXME: Current unchaining logic can only handle simple case of raw
  1275. * msdu chaining. If decapping is other than raw the chaining may be
  1276. * more complex and this isn't handled by the current code. Don't even
  1277. * try re-constructing such frames - it'll be pretty much garbage.
  1278. */
  1279. if (decap != RX_MSDU_DECAP_RAW ||
  1280. skb_queue_len(amsdu) != 1 + rxd->frag_info.ring2_more_count) {
  1281. __skb_queue_purge(amsdu);
  1282. return;
  1283. }
  1284. ath10k_unchain_msdu(amsdu);
  1285. }
  1286. static bool ath10k_htt_rx_amsdu_allowed(struct ath10k *ar,
  1287. struct sk_buff_head *amsdu,
  1288. struct ieee80211_rx_status *rx_status)
  1289. {
  1290. /* FIXME: It might be a good idea to do some fuzzy-testing to drop
  1291. * invalid/dangerous frames.
  1292. */
  1293. if (!rx_status->freq) {
  1294. ath10k_warn(ar, "no channel configured; ignoring frame(s)!\n");
  1295. return false;
  1296. }
  1297. if (test_bit(ATH10K_CAC_RUNNING, &ar->dev_flags)) {
  1298. ath10k_dbg(ar, ATH10K_DBG_HTT, "htt rx cac running\n");
  1299. return false;
  1300. }
  1301. return true;
  1302. }
  1303. static void ath10k_htt_rx_h_filter(struct ath10k *ar,
  1304. struct sk_buff_head *amsdu,
  1305. struct ieee80211_rx_status *rx_status)
  1306. {
  1307. if (skb_queue_empty(amsdu))
  1308. return;
  1309. if (ath10k_htt_rx_amsdu_allowed(ar, amsdu, rx_status))
  1310. return;
  1311. __skb_queue_purge(amsdu);
  1312. }
  1313. static void ath10k_htt_rx_handler(struct ath10k_htt *htt,
  1314. struct htt_rx_indication *rx)
  1315. {
  1316. struct ath10k *ar = htt->ar;
  1317. struct ieee80211_rx_status *rx_status = &htt->rx_status;
  1318. struct htt_rx_indication_mpdu_range *mpdu_ranges;
  1319. struct sk_buff_head amsdu;
  1320. int num_mpdu_ranges;
  1321. int fw_desc_len;
  1322. u8 *fw_desc;
  1323. int i, ret, mpdu_count = 0;
  1324. lockdep_assert_held(&htt->rx_ring.lock);
  1325. if (htt->rx_confused)
  1326. return;
  1327. fw_desc_len = __le16_to_cpu(rx->prefix.fw_rx_desc_bytes);
  1328. fw_desc = (u8 *)&rx->fw_desc;
  1329. num_mpdu_ranges = MS(__le32_to_cpu(rx->hdr.info1),
  1330. HTT_RX_INDICATION_INFO1_NUM_MPDU_RANGES);
  1331. mpdu_ranges = htt_rx_ind_get_mpdu_ranges(rx);
  1332. ath10k_dbg_dump(ar, ATH10K_DBG_HTT_DUMP, NULL, "htt rx ind: ",
  1333. rx, sizeof(*rx) +
  1334. (sizeof(struct htt_rx_indication_mpdu_range) *
  1335. num_mpdu_ranges));
  1336. for (i = 0; i < num_mpdu_ranges; i++)
  1337. mpdu_count += mpdu_ranges[i].mpdu_count;
  1338. while (mpdu_count--) {
  1339. __skb_queue_head_init(&amsdu);
  1340. ret = ath10k_htt_rx_amsdu_pop(htt, &fw_desc,
  1341. &fw_desc_len, &amsdu);
  1342. if (ret < 0) {
  1343. ath10k_warn(ar, "rx ring became corrupted: %d\n", ret);
  1344. __skb_queue_purge(&amsdu);
  1345. /* FIXME: It's probably a good idea to reboot the
  1346. * device instead of leaving it inoperable.
  1347. */
  1348. htt->rx_confused = true;
  1349. break;
  1350. }
  1351. ath10k_htt_rx_h_ppdu(ar, &amsdu, rx_status, 0xffff);
  1352. ath10k_htt_rx_h_unchain(ar, &amsdu, ret > 0);
  1353. ath10k_htt_rx_h_filter(ar, &amsdu, rx_status);
  1354. ath10k_htt_rx_h_mpdu(ar, &amsdu, rx_status);
  1355. ath10k_htt_rx_h_deliver(ar, &amsdu, rx_status);
  1356. }
  1357. tasklet_schedule(&htt->rx_replenish_task);
  1358. }
  1359. static void ath10k_htt_rx_frag_handler(struct ath10k_htt *htt,
  1360. struct htt_rx_fragment_indication *frag)
  1361. {
  1362. struct ath10k *ar = htt->ar;
  1363. struct ieee80211_rx_status *rx_status = &htt->rx_status;
  1364. struct sk_buff_head amsdu;
  1365. int ret;
  1366. u8 *fw_desc;
  1367. int fw_desc_len;
  1368. fw_desc_len = __le16_to_cpu(frag->fw_rx_desc_bytes);
  1369. fw_desc = (u8 *)frag->fw_msdu_rx_desc;
  1370. __skb_queue_head_init(&amsdu);
  1371. spin_lock_bh(&htt->rx_ring.lock);
  1372. ret = ath10k_htt_rx_amsdu_pop(htt, &fw_desc, &fw_desc_len,
  1373. &amsdu);
  1374. spin_unlock_bh(&htt->rx_ring.lock);
  1375. tasklet_schedule(&htt->rx_replenish_task);
  1376. ath10k_dbg(ar, ATH10K_DBG_HTT_DUMP, "htt rx frag ahead\n");
  1377. if (ret) {
  1378. ath10k_warn(ar, "failed to pop amsdu from httr rx ring for fragmented rx %d\n",
  1379. ret);
  1380. __skb_queue_purge(&amsdu);
  1381. return;
  1382. }
  1383. if (skb_queue_len(&amsdu) != 1) {
  1384. ath10k_warn(ar, "failed to pop frag amsdu: too many msdus\n");
  1385. __skb_queue_purge(&amsdu);
  1386. return;
  1387. }
  1388. ath10k_htt_rx_h_ppdu(ar, &amsdu, rx_status, 0xffff);
  1389. ath10k_htt_rx_h_filter(ar, &amsdu, rx_status);
  1390. ath10k_htt_rx_h_mpdu(ar, &amsdu, rx_status);
  1391. ath10k_htt_rx_h_deliver(ar, &amsdu, rx_status);
  1392. if (fw_desc_len > 0) {
  1393. ath10k_dbg(ar, ATH10K_DBG_HTT,
  1394. "expecting more fragmented rx in one indication %d\n",
  1395. fw_desc_len);
  1396. }
  1397. }
  1398. static void ath10k_htt_rx_tx_compl_ind(struct ath10k *ar,
  1399. struct sk_buff *skb)
  1400. {
  1401. struct ath10k_htt *htt = &ar->htt;
  1402. struct htt_resp *resp = (struct htt_resp *)skb->data;
  1403. struct htt_tx_done tx_done = {};
  1404. int status = MS(resp->data_tx_completion.flags, HTT_DATA_TX_STATUS);
  1405. __le16 msdu_id;
  1406. int i;
  1407. switch (status) {
  1408. case HTT_DATA_TX_STATUS_NO_ACK:
  1409. tx_done.status = HTT_TX_COMPL_STATE_NOACK;
  1410. break;
  1411. case HTT_DATA_TX_STATUS_OK:
  1412. tx_done.status = HTT_TX_COMPL_STATE_ACK;
  1413. break;
  1414. case HTT_DATA_TX_STATUS_DISCARD:
  1415. case HTT_DATA_TX_STATUS_POSTPONE:
  1416. case HTT_DATA_TX_STATUS_DOWNLOAD_FAIL:
  1417. tx_done.status = HTT_TX_COMPL_STATE_DISCARD;
  1418. break;
  1419. default:
  1420. ath10k_warn(ar, "unhandled tx completion status %d\n", status);
  1421. tx_done.status = HTT_TX_COMPL_STATE_DISCARD;
  1422. break;
  1423. }
  1424. ath10k_dbg(ar, ATH10K_DBG_HTT, "htt tx completion num_msdus %d\n",
  1425. resp->data_tx_completion.num_msdus);
  1426. for (i = 0; i < resp->data_tx_completion.num_msdus; i++) {
  1427. msdu_id = resp->data_tx_completion.msdus[i];
  1428. tx_done.msdu_id = __le16_to_cpu(msdu_id);
  1429. /* kfifo_put: In practice firmware shouldn't fire off per-CE
  1430. * interrupt and main interrupt (MSI/-X range case) for the same
  1431. * HTC service so it should be safe to use kfifo_put w/o lock.
  1432. *
  1433. * From kfifo_put() documentation:
  1434. * Note that with only one concurrent reader and one concurrent
  1435. * writer, you don't need extra locking to use these macro.
  1436. */
  1437. if (!kfifo_put(&htt->txdone_fifo, tx_done)) {
  1438. ath10k_warn(ar, "txdone fifo overrun, msdu_id %d status %d\n",
  1439. tx_done.msdu_id, tx_done.status);
  1440. ath10k_txrx_tx_unref(htt, &tx_done);
  1441. }
  1442. }
  1443. }
  1444. static void ath10k_htt_rx_addba(struct ath10k *ar, struct htt_resp *resp)
  1445. {
  1446. struct htt_rx_addba *ev = &resp->rx_addba;
  1447. struct ath10k_peer *peer;
  1448. struct ath10k_vif *arvif;
  1449. u16 info0, tid, peer_id;
  1450. info0 = __le16_to_cpu(ev->info0);
  1451. tid = MS(info0, HTT_RX_BA_INFO0_TID);
  1452. peer_id = MS(info0, HTT_RX_BA_INFO0_PEER_ID);
  1453. ath10k_dbg(ar, ATH10K_DBG_HTT,
  1454. "htt rx addba tid %hu peer_id %hu size %hhu\n",
  1455. tid, peer_id, ev->window_size);
  1456. spin_lock_bh(&ar->data_lock);
  1457. peer = ath10k_peer_find_by_id(ar, peer_id);
  1458. if (!peer) {
  1459. ath10k_warn(ar, "received addba event for invalid peer_id: %hu\n",
  1460. peer_id);
  1461. spin_unlock_bh(&ar->data_lock);
  1462. return;
  1463. }
  1464. arvif = ath10k_get_arvif(ar, peer->vdev_id);
  1465. if (!arvif) {
  1466. ath10k_warn(ar, "received addba event for invalid vdev_id: %u\n",
  1467. peer->vdev_id);
  1468. spin_unlock_bh(&ar->data_lock);
  1469. return;
  1470. }
  1471. ath10k_dbg(ar, ATH10K_DBG_HTT,
  1472. "htt rx start rx ba session sta %pM tid %hu size %hhu\n",
  1473. peer->addr, tid, ev->window_size);
  1474. ieee80211_start_rx_ba_session_offl(arvif->vif, peer->addr, tid);
  1475. spin_unlock_bh(&ar->data_lock);
  1476. }
  1477. static void ath10k_htt_rx_delba(struct ath10k *ar, struct htt_resp *resp)
  1478. {
  1479. struct htt_rx_delba *ev = &resp->rx_delba;
  1480. struct ath10k_peer *peer;
  1481. struct ath10k_vif *arvif;
  1482. u16 info0, tid, peer_id;
  1483. info0 = __le16_to_cpu(ev->info0);
  1484. tid = MS(info0, HTT_RX_BA_INFO0_TID);
  1485. peer_id = MS(info0, HTT_RX_BA_INFO0_PEER_ID);
  1486. ath10k_dbg(ar, ATH10K_DBG_HTT,
  1487. "htt rx delba tid %hu peer_id %hu\n",
  1488. tid, peer_id);
  1489. spin_lock_bh(&ar->data_lock);
  1490. peer = ath10k_peer_find_by_id(ar, peer_id);
  1491. if (!peer) {
  1492. ath10k_warn(ar, "received addba event for invalid peer_id: %hu\n",
  1493. peer_id);
  1494. spin_unlock_bh(&ar->data_lock);
  1495. return;
  1496. }
  1497. arvif = ath10k_get_arvif(ar, peer->vdev_id);
  1498. if (!arvif) {
  1499. ath10k_warn(ar, "received addba event for invalid vdev_id: %u\n",
  1500. peer->vdev_id);
  1501. spin_unlock_bh(&ar->data_lock);
  1502. return;
  1503. }
  1504. ath10k_dbg(ar, ATH10K_DBG_HTT,
  1505. "htt rx stop rx ba session sta %pM tid %hu\n",
  1506. peer->addr, tid);
  1507. ieee80211_stop_rx_ba_session_offl(arvif->vif, peer->addr, tid);
  1508. spin_unlock_bh(&ar->data_lock);
  1509. }
  1510. static int ath10k_htt_rx_extract_amsdu(struct sk_buff_head *list,
  1511. struct sk_buff_head *amsdu)
  1512. {
  1513. struct sk_buff *msdu;
  1514. struct htt_rx_desc *rxd;
  1515. if (skb_queue_empty(list))
  1516. return -ENOBUFS;
  1517. if (WARN_ON(!skb_queue_empty(amsdu)))
  1518. return -EINVAL;
  1519. while ((msdu = __skb_dequeue(list))) {
  1520. __skb_queue_tail(amsdu, msdu);
  1521. rxd = (void *)msdu->data - sizeof(*rxd);
  1522. if (rxd->msdu_end.common.info0 &
  1523. __cpu_to_le32(RX_MSDU_END_INFO0_LAST_MSDU))
  1524. break;
  1525. }
  1526. msdu = skb_peek_tail(amsdu);
  1527. rxd = (void *)msdu->data - sizeof(*rxd);
  1528. if (!(rxd->msdu_end.common.info0 &
  1529. __cpu_to_le32(RX_MSDU_END_INFO0_LAST_MSDU))) {
  1530. skb_queue_splice_init(amsdu, list);
  1531. return -EAGAIN;
  1532. }
  1533. return 0;
  1534. }
  1535. static void ath10k_htt_rx_h_rx_offload_prot(struct ieee80211_rx_status *status,
  1536. struct sk_buff *skb)
  1537. {
  1538. struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
  1539. if (!ieee80211_has_protected(hdr->frame_control))
  1540. return;
  1541. /* Offloaded frames are already decrypted but firmware insists they are
  1542. * protected in the 802.11 header. Strip the flag. Otherwise mac80211
  1543. * will drop the frame.
  1544. */
  1545. hdr->frame_control &= ~__cpu_to_le16(IEEE80211_FCTL_PROTECTED);
  1546. status->flag |= RX_FLAG_DECRYPTED |
  1547. RX_FLAG_IV_STRIPPED |
  1548. RX_FLAG_MMIC_STRIPPED;
  1549. }
  1550. static void ath10k_htt_rx_h_rx_offload(struct ath10k *ar,
  1551. struct sk_buff_head *list)
  1552. {
  1553. struct ath10k_htt *htt = &ar->htt;
  1554. struct ieee80211_rx_status *status = &htt->rx_status;
  1555. struct htt_rx_offload_msdu *rx;
  1556. struct sk_buff *msdu;
  1557. size_t offset;
  1558. while ((msdu = __skb_dequeue(list))) {
  1559. /* Offloaded frames don't have Rx descriptor. Instead they have
  1560. * a short meta information header.
  1561. */
  1562. rx = (void *)msdu->data;
  1563. skb_put(msdu, sizeof(*rx));
  1564. skb_pull(msdu, sizeof(*rx));
  1565. if (skb_tailroom(msdu) < __le16_to_cpu(rx->msdu_len)) {
  1566. ath10k_warn(ar, "dropping frame: offloaded rx msdu is too long!\n");
  1567. dev_kfree_skb_any(msdu);
  1568. continue;
  1569. }
  1570. skb_put(msdu, __le16_to_cpu(rx->msdu_len));
  1571. /* Offloaded rx header length isn't multiple of 2 nor 4 so the
  1572. * actual payload is unaligned. Align the frame. Otherwise
  1573. * mac80211 complains. This shouldn't reduce performance much
  1574. * because these offloaded frames are rare.
  1575. */
  1576. offset = 4 - ((unsigned long)msdu->data & 3);
  1577. skb_put(msdu, offset);
  1578. memmove(msdu->data + offset, msdu->data, msdu->len);
  1579. skb_pull(msdu, offset);
  1580. /* FIXME: The frame is NWifi. Re-construct QoS Control
  1581. * if possible later.
  1582. */
  1583. memset(status, 0, sizeof(*status));
  1584. status->flag |= RX_FLAG_NO_SIGNAL_VAL;
  1585. ath10k_htt_rx_h_rx_offload_prot(status, msdu);
  1586. ath10k_htt_rx_h_channel(ar, status, NULL, rx->vdev_id);
  1587. ath10k_process_rx(ar, status, msdu);
  1588. }
  1589. }
  1590. static void ath10k_htt_rx_in_ord_ind(struct ath10k *ar, struct sk_buff *skb)
  1591. {
  1592. struct ath10k_htt *htt = &ar->htt;
  1593. struct htt_resp *resp = (void *)skb->data;
  1594. struct ieee80211_rx_status *status = &htt->rx_status;
  1595. struct sk_buff_head list;
  1596. struct sk_buff_head amsdu;
  1597. u16 peer_id;
  1598. u16 msdu_count;
  1599. u8 vdev_id;
  1600. u8 tid;
  1601. bool offload;
  1602. bool frag;
  1603. int ret;
  1604. lockdep_assert_held(&htt->rx_ring.lock);
  1605. if (htt->rx_confused)
  1606. return;
  1607. skb_pull(skb, sizeof(resp->hdr));
  1608. skb_pull(skb, sizeof(resp->rx_in_ord_ind));
  1609. peer_id = __le16_to_cpu(resp->rx_in_ord_ind.peer_id);
  1610. msdu_count = __le16_to_cpu(resp->rx_in_ord_ind.msdu_count);
  1611. vdev_id = resp->rx_in_ord_ind.vdev_id;
  1612. tid = SM(resp->rx_in_ord_ind.info, HTT_RX_IN_ORD_IND_INFO_TID);
  1613. offload = !!(resp->rx_in_ord_ind.info &
  1614. HTT_RX_IN_ORD_IND_INFO_OFFLOAD_MASK);
  1615. frag = !!(resp->rx_in_ord_ind.info & HTT_RX_IN_ORD_IND_INFO_FRAG_MASK);
  1616. ath10k_dbg(ar, ATH10K_DBG_HTT,
  1617. "htt rx in ord vdev %i peer %i tid %i offload %i frag %i msdu count %i\n",
  1618. vdev_id, peer_id, tid, offload, frag, msdu_count);
  1619. if (skb->len < msdu_count * sizeof(*resp->rx_in_ord_ind.msdu_descs)) {
  1620. ath10k_warn(ar, "dropping invalid in order rx indication\n");
  1621. return;
  1622. }
  1623. /* The event can deliver more than 1 A-MSDU. Each A-MSDU is later
  1624. * extracted and processed.
  1625. */
  1626. __skb_queue_head_init(&list);
  1627. ret = ath10k_htt_rx_pop_paddr_list(htt, &resp->rx_in_ord_ind, &list);
  1628. if (ret < 0) {
  1629. ath10k_warn(ar, "failed to pop paddr list: %d\n", ret);
  1630. htt->rx_confused = true;
  1631. return;
  1632. }
  1633. /* Offloaded frames are very different and need to be handled
  1634. * separately.
  1635. */
  1636. if (offload)
  1637. ath10k_htt_rx_h_rx_offload(ar, &list);
  1638. while (!skb_queue_empty(&list)) {
  1639. __skb_queue_head_init(&amsdu);
  1640. ret = ath10k_htt_rx_extract_amsdu(&list, &amsdu);
  1641. switch (ret) {
  1642. case 0:
  1643. /* Note: The in-order indication may report interleaved
  1644. * frames from different PPDUs meaning reported rx rate
  1645. * to mac80211 isn't accurate/reliable. It's still
  1646. * better to report something than nothing though. This
  1647. * should still give an idea about rx rate to the user.
  1648. */
  1649. ath10k_htt_rx_h_ppdu(ar, &amsdu, status, vdev_id);
  1650. ath10k_htt_rx_h_filter(ar, &amsdu, status);
  1651. ath10k_htt_rx_h_mpdu(ar, &amsdu, status);
  1652. ath10k_htt_rx_h_deliver(ar, &amsdu, status);
  1653. break;
  1654. case -EAGAIN:
  1655. /* fall through */
  1656. default:
  1657. /* Should not happen. */
  1658. ath10k_warn(ar, "failed to extract amsdu: %d\n", ret);
  1659. htt->rx_confused = true;
  1660. __skb_queue_purge(&list);
  1661. return;
  1662. }
  1663. }
  1664. tasklet_schedule(&htt->rx_replenish_task);
  1665. }
  1666. static void ath10k_htt_rx_tx_fetch_resp_id_confirm(struct ath10k *ar,
  1667. const __le32 *resp_ids,
  1668. int num_resp_ids)
  1669. {
  1670. int i;
  1671. u32 resp_id;
  1672. ath10k_dbg(ar, ATH10K_DBG_HTT, "htt rx tx fetch confirm num_resp_ids %d\n",
  1673. num_resp_ids);
  1674. for (i = 0; i < num_resp_ids; i++) {
  1675. resp_id = le32_to_cpu(resp_ids[i]);
  1676. ath10k_dbg(ar, ATH10K_DBG_HTT, "htt rx tx fetch confirm resp_id %u\n",
  1677. resp_id);
  1678. /* TODO: free resp_id */
  1679. }
  1680. }
  1681. static void ath10k_htt_rx_tx_fetch_ind(struct ath10k *ar, struct sk_buff *skb)
  1682. {
  1683. struct ieee80211_hw *hw = ar->hw;
  1684. struct ieee80211_txq *txq;
  1685. struct htt_resp *resp = (struct htt_resp *)skb->data;
  1686. struct htt_tx_fetch_record *record;
  1687. size_t len;
  1688. size_t max_num_bytes;
  1689. size_t max_num_msdus;
  1690. size_t num_bytes;
  1691. size_t num_msdus;
  1692. const __le32 *resp_ids;
  1693. u16 num_records;
  1694. u16 num_resp_ids;
  1695. u16 peer_id;
  1696. u8 tid;
  1697. int ret;
  1698. int i;
  1699. ath10k_dbg(ar, ATH10K_DBG_HTT, "htt rx tx fetch ind\n");
  1700. len = sizeof(resp->hdr) + sizeof(resp->tx_fetch_ind);
  1701. if (unlikely(skb->len < len)) {
  1702. ath10k_warn(ar, "received corrupted tx_fetch_ind event: buffer too short\n");
  1703. return;
  1704. }
  1705. num_records = le16_to_cpu(resp->tx_fetch_ind.num_records);
  1706. num_resp_ids = le16_to_cpu(resp->tx_fetch_ind.num_resp_ids);
  1707. len += sizeof(resp->tx_fetch_ind.records[0]) * num_records;
  1708. len += sizeof(resp->tx_fetch_ind.resp_ids[0]) * num_resp_ids;
  1709. if (unlikely(skb->len < len)) {
  1710. ath10k_warn(ar, "received corrupted tx_fetch_ind event: too many records/resp_ids\n");
  1711. return;
  1712. }
  1713. ath10k_dbg(ar, ATH10K_DBG_HTT, "htt rx tx fetch ind num records %hu num resps %hu seq %hu\n",
  1714. num_records, num_resp_ids,
  1715. le16_to_cpu(resp->tx_fetch_ind.fetch_seq_num));
  1716. if (!ar->htt.tx_q_state.enabled) {
  1717. ath10k_warn(ar, "received unexpected tx_fetch_ind event: not enabled\n");
  1718. return;
  1719. }
  1720. if (ar->htt.tx_q_state.mode == HTT_TX_MODE_SWITCH_PUSH) {
  1721. ath10k_warn(ar, "received unexpected tx_fetch_ind event: in push mode\n");
  1722. return;
  1723. }
  1724. rcu_read_lock();
  1725. for (i = 0; i < num_records; i++) {
  1726. record = &resp->tx_fetch_ind.records[i];
  1727. peer_id = MS(le16_to_cpu(record->info),
  1728. HTT_TX_FETCH_RECORD_INFO_PEER_ID);
  1729. tid = MS(le16_to_cpu(record->info),
  1730. HTT_TX_FETCH_RECORD_INFO_TID);
  1731. max_num_msdus = le16_to_cpu(record->num_msdus);
  1732. max_num_bytes = le32_to_cpu(record->num_bytes);
  1733. ath10k_dbg(ar, ATH10K_DBG_HTT, "htt rx tx fetch record %i peer_id %hu tid %hhu msdus %zu bytes %zu\n",
  1734. i, peer_id, tid, max_num_msdus, max_num_bytes);
  1735. if (unlikely(peer_id >= ar->htt.tx_q_state.num_peers) ||
  1736. unlikely(tid >= ar->htt.tx_q_state.num_tids)) {
  1737. ath10k_warn(ar, "received out of range peer_id %hu tid %hhu\n",
  1738. peer_id, tid);
  1739. continue;
  1740. }
  1741. spin_lock_bh(&ar->data_lock);
  1742. txq = ath10k_mac_txq_lookup(ar, peer_id, tid);
  1743. spin_unlock_bh(&ar->data_lock);
  1744. /* It is okay to release the lock and use txq because RCU read
  1745. * lock is held.
  1746. */
  1747. if (unlikely(!txq)) {
  1748. ath10k_warn(ar, "failed to lookup txq for peer_id %hu tid %hhu\n",
  1749. peer_id, tid);
  1750. continue;
  1751. }
  1752. num_msdus = 0;
  1753. num_bytes = 0;
  1754. while (num_msdus < max_num_msdus &&
  1755. num_bytes < max_num_bytes) {
  1756. ret = ath10k_mac_tx_push_txq(hw, txq);
  1757. if (ret < 0)
  1758. break;
  1759. num_msdus++;
  1760. num_bytes += ret;
  1761. }
  1762. record->num_msdus = cpu_to_le16(num_msdus);
  1763. record->num_bytes = cpu_to_le32(num_bytes);
  1764. ath10k_htt_tx_txq_recalc(hw, txq);
  1765. }
  1766. rcu_read_unlock();
  1767. resp_ids = ath10k_htt_get_tx_fetch_ind_resp_ids(&resp->tx_fetch_ind);
  1768. ath10k_htt_rx_tx_fetch_resp_id_confirm(ar, resp_ids, num_resp_ids);
  1769. ret = ath10k_htt_tx_fetch_resp(ar,
  1770. resp->tx_fetch_ind.token,
  1771. resp->tx_fetch_ind.fetch_seq_num,
  1772. resp->tx_fetch_ind.records,
  1773. num_records);
  1774. if (unlikely(ret)) {
  1775. ath10k_warn(ar, "failed to submit tx fetch resp for token 0x%08x: %d\n",
  1776. le32_to_cpu(resp->tx_fetch_ind.token), ret);
  1777. /* FIXME: request fw restart */
  1778. }
  1779. ath10k_htt_tx_txq_sync(ar);
  1780. }
  1781. static void ath10k_htt_rx_tx_fetch_confirm(struct ath10k *ar,
  1782. struct sk_buff *skb)
  1783. {
  1784. const struct htt_resp *resp = (void *)skb->data;
  1785. size_t len;
  1786. int num_resp_ids;
  1787. ath10k_dbg(ar, ATH10K_DBG_HTT, "htt rx tx fetch confirm\n");
  1788. len = sizeof(resp->hdr) + sizeof(resp->tx_fetch_confirm);
  1789. if (unlikely(skb->len < len)) {
  1790. ath10k_warn(ar, "received corrupted tx_fetch_confirm event: buffer too short\n");
  1791. return;
  1792. }
  1793. num_resp_ids = le16_to_cpu(resp->tx_fetch_confirm.num_resp_ids);
  1794. len += sizeof(resp->tx_fetch_confirm.resp_ids[0]) * num_resp_ids;
  1795. if (unlikely(skb->len < len)) {
  1796. ath10k_warn(ar, "received corrupted tx_fetch_confirm event: resp_ids buffer overflow\n");
  1797. return;
  1798. }
  1799. ath10k_htt_rx_tx_fetch_resp_id_confirm(ar,
  1800. resp->tx_fetch_confirm.resp_ids,
  1801. num_resp_ids);
  1802. }
  1803. static void ath10k_htt_rx_tx_mode_switch_ind(struct ath10k *ar,
  1804. struct sk_buff *skb)
  1805. {
  1806. const struct htt_resp *resp = (void *)skb->data;
  1807. const struct htt_tx_mode_switch_record *record;
  1808. struct ieee80211_txq *txq;
  1809. struct ath10k_txq *artxq;
  1810. size_t len;
  1811. size_t num_records;
  1812. enum htt_tx_mode_switch_mode mode;
  1813. bool enable;
  1814. u16 info0;
  1815. u16 info1;
  1816. u16 threshold;
  1817. u16 peer_id;
  1818. u8 tid;
  1819. int i;
  1820. ath10k_dbg(ar, ATH10K_DBG_HTT, "htt rx tx mode switch ind\n");
  1821. len = sizeof(resp->hdr) + sizeof(resp->tx_mode_switch_ind);
  1822. if (unlikely(skb->len < len)) {
  1823. ath10k_warn(ar, "received corrupted tx_mode_switch_ind event: buffer too short\n");
  1824. return;
  1825. }
  1826. info0 = le16_to_cpu(resp->tx_mode_switch_ind.info0);
  1827. info1 = le16_to_cpu(resp->tx_mode_switch_ind.info1);
  1828. enable = !!(info0 & HTT_TX_MODE_SWITCH_IND_INFO0_ENABLE);
  1829. num_records = MS(info0, HTT_TX_MODE_SWITCH_IND_INFO1_THRESHOLD);
  1830. mode = MS(info1, HTT_TX_MODE_SWITCH_IND_INFO1_MODE);
  1831. threshold = MS(info1, HTT_TX_MODE_SWITCH_IND_INFO1_THRESHOLD);
  1832. ath10k_dbg(ar, ATH10K_DBG_HTT,
  1833. "htt rx tx mode switch ind info0 0x%04hx info1 0x%04hx enable %d num records %zd mode %d threshold %hu\n",
  1834. info0, info1, enable, num_records, mode, threshold);
  1835. len += sizeof(resp->tx_mode_switch_ind.records[0]) * num_records;
  1836. if (unlikely(skb->len < len)) {
  1837. ath10k_warn(ar, "received corrupted tx_mode_switch_mode_ind event: too many records\n");
  1838. return;
  1839. }
  1840. switch (mode) {
  1841. case HTT_TX_MODE_SWITCH_PUSH:
  1842. case HTT_TX_MODE_SWITCH_PUSH_PULL:
  1843. break;
  1844. default:
  1845. ath10k_warn(ar, "received invalid tx_mode_switch_mode_ind mode %d, ignoring\n",
  1846. mode);
  1847. return;
  1848. }
  1849. if (!enable)
  1850. return;
  1851. ar->htt.tx_q_state.enabled = enable;
  1852. ar->htt.tx_q_state.mode = mode;
  1853. ar->htt.tx_q_state.num_push_allowed = threshold;
  1854. rcu_read_lock();
  1855. for (i = 0; i < num_records; i++) {
  1856. record = &resp->tx_mode_switch_ind.records[i];
  1857. info0 = le16_to_cpu(record->info0);
  1858. peer_id = MS(info0, HTT_TX_MODE_SWITCH_RECORD_INFO0_PEER_ID);
  1859. tid = MS(info0, HTT_TX_MODE_SWITCH_RECORD_INFO0_TID);
  1860. if (unlikely(peer_id >= ar->htt.tx_q_state.num_peers) ||
  1861. unlikely(tid >= ar->htt.tx_q_state.num_tids)) {
  1862. ath10k_warn(ar, "received out of range peer_id %hu tid %hhu\n",
  1863. peer_id, tid);
  1864. continue;
  1865. }
  1866. spin_lock_bh(&ar->data_lock);
  1867. txq = ath10k_mac_txq_lookup(ar, peer_id, tid);
  1868. spin_unlock_bh(&ar->data_lock);
  1869. /* It is okay to release the lock and use txq because RCU read
  1870. * lock is held.
  1871. */
  1872. if (unlikely(!txq)) {
  1873. ath10k_warn(ar, "failed to lookup txq for peer_id %hu tid %hhu\n",
  1874. peer_id, tid);
  1875. continue;
  1876. }
  1877. spin_lock_bh(&ar->htt.tx_lock);
  1878. artxq = (void *)txq->drv_priv;
  1879. artxq->num_push_allowed = le16_to_cpu(record->num_max_msdus);
  1880. spin_unlock_bh(&ar->htt.tx_lock);
  1881. }
  1882. rcu_read_unlock();
  1883. ath10k_mac_tx_push_pending(ar);
  1884. }
  1885. static inline enum ieee80211_band phy_mode_to_band(u32 phy_mode)
  1886. {
  1887. enum ieee80211_band band;
  1888. switch (phy_mode) {
  1889. case MODE_11A:
  1890. case MODE_11NA_HT20:
  1891. case MODE_11NA_HT40:
  1892. case MODE_11AC_VHT20:
  1893. case MODE_11AC_VHT40:
  1894. case MODE_11AC_VHT80:
  1895. band = IEEE80211_BAND_5GHZ;
  1896. break;
  1897. case MODE_11G:
  1898. case MODE_11B:
  1899. case MODE_11GONLY:
  1900. case MODE_11NG_HT20:
  1901. case MODE_11NG_HT40:
  1902. case MODE_11AC_VHT20_2G:
  1903. case MODE_11AC_VHT40_2G:
  1904. case MODE_11AC_VHT80_2G:
  1905. default:
  1906. band = IEEE80211_BAND_2GHZ;
  1907. }
  1908. return band;
  1909. }
  1910. void ath10k_htt_t2h_msg_handler(struct ath10k *ar, struct sk_buff *skb)
  1911. {
  1912. struct ath10k_htt *htt = &ar->htt;
  1913. struct htt_resp *resp = (struct htt_resp *)skb->data;
  1914. enum htt_t2h_msg_type type;
  1915. /* confirm alignment */
  1916. if (!IS_ALIGNED((unsigned long)skb->data, 4))
  1917. ath10k_warn(ar, "unaligned htt message, expect trouble\n");
  1918. ath10k_dbg(ar, ATH10K_DBG_HTT, "htt rx, msg_type: 0x%0X\n",
  1919. resp->hdr.msg_type);
  1920. if (resp->hdr.msg_type >= ar->htt.t2h_msg_types_max) {
  1921. ath10k_dbg(ar, ATH10K_DBG_HTT, "htt rx, unsupported msg_type: 0x%0X\n max: 0x%0X",
  1922. resp->hdr.msg_type, ar->htt.t2h_msg_types_max);
  1923. dev_kfree_skb_any(skb);
  1924. return;
  1925. }
  1926. type = ar->htt.t2h_msg_types[resp->hdr.msg_type];
  1927. switch (type) {
  1928. case HTT_T2H_MSG_TYPE_VERSION_CONF: {
  1929. htt->target_version_major = resp->ver_resp.major;
  1930. htt->target_version_minor = resp->ver_resp.minor;
  1931. complete(&htt->target_version_received);
  1932. break;
  1933. }
  1934. case HTT_T2H_MSG_TYPE_RX_IND:
  1935. skb_queue_tail(&htt->rx_compl_q, skb);
  1936. tasklet_schedule(&htt->txrx_compl_task);
  1937. return;
  1938. case HTT_T2H_MSG_TYPE_PEER_MAP: {
  1939. struct htt_peer_map_event ev = {
  1940. .vdev_id = resp->peer_map.vdev_id,
  1941. .peer_id = __le16_to_cpu(resp->peer_map.peer_id),
  1942. };
  1943. memcpy(ev.addr, resp->peer_map.addr, sizeof(ev.addr));
  1944. ath10k_peer_map_event(htt, &ev);
  1945. break;
  1946. }
  1947. case HTT_T2H_MSG_TYPE_PEER_UNMAP: {
  1948. struct htt_peer_unmap_event ev = {
  1949. .peer_id = __le16_to_cpu(resp->peer_unmap.peer_id),
  1950. };
  1951. ath10k_peer_unmap_event(htt, &ev);
  1952. break;
  1953. }
  1954. case HTT_T2H_MSG_TYPE_MGMT_TX_COMPLETION: {
  1955. struct htt_tx_done tx_done = {};
  1956. int status = __le32_to_cpu(resp->mgmt_tx_completion.status);
  1957. tx_done.msdu_id = __le32_to_cpu(resp->mgmt_tx_completion.desc_id);
  1958. switch (status) {
  1959. case HTT_MGMT_TX_STATUS_OK:
  1960. tx_done.status = HTT_TX_COMPL_STATE_ACK;
  1961. break;
  1962. case HTT_MGMT_TX_STATUS_RETRY:
  1963. tx_done.status = HTT_TX_COMPL_STATE_NOACK;
  1964. break;
  1965. case HTT_MGMT_TX_STATUS_DROP:
  1966. tx_done.status = HTT_TX_COMPL_STATE_DISCARD;
  1967. break;
  1968. }
  1969. status = ath10k_txrx_tx_unref(htt, &tx_done);
  1970. if (!status) {
  1971. spin_lock_bh(&htt->tx_lock);
  1972. ath10k_htt_tx_mgmt_dec_pending(htt);
  1973. spin_unlock_bh(&htt->tx_lock);
  1974. }
  1975. ath10k_mac_tx_push_pending(ar);
  1976. break;
  1977. }
  1978. case HTT_T2H_MSG_TYPE_TX_COMPL_IND:
  1979. ath10k_htt_rx_tx_compl_ind(htt->ar, skb);
  1980. tasklet_schedule(&htt->txrx_compl_task);
  1981. break;
  1982. case HTT_T2H_MSG_TYPE_SEC_IND: {
  1983. struct ath10k *ar = htt->ar;
  1984. struct htt_security_indication *ev = &resp->security_indication;
  1985. ath10k_dbg(ar, ATH10K_DBG_HTT,
  1986. "sec ind peer_id %d unicast %d type %d\n",
  1987. __le16_to_cpu(ev->peer_id),
  1988. !!(ev->flags & HTT_SECURITY_IS_UNICAST),
  1989. MS(ev->flags, HTT_SECURITY_TYPE));
  1990. complete(&ar->install_key_done);
  1991. break;
  1992. }
  1993. case HTT_T2H_MSG_TYPE_RX_FRAG_IND: {
  1994. ath10k_dbg_dump(ar, ATH10K_DBG_HTT_DUMP, NULL, "htt event: ",
  1995. skb->data, skb->len);
  1996. ath10k_htt_rx_frag_handler(htt, &resp->rx_frag_ind);
  1997. break;
  1998. }
  1999. case HTT_T2H_MSG_TYPE_TEST:
  2000. break;
  2001. case HTT_T2H_MSG_TYPE_STATS_CONF:
  2002. trace_ath10k_htt_stats(ar, skb->data, skb->len);
  2003. break;
  2004. case HTT_T2H_MSG_TYPE_TX_INSPECT_IND:
  2005. /* Firmware can return tx frames if it's unable to fully
  2006. * process them and suspects host may be able to fix it. ath10k
  2007. * sends all tx frames as already inspected so this shouldn't
  2008. * happen unless fw has a bug.
  2009. */
  2010. ath10k_warn(ar, "received an unexpected htt tx inspect event\n");
  2011. break;
  2012. case HTT_T2H_MSG_TYPE_RX_ADDBA:
  2013. ath10k_htt_rx_addba(ar, resp);
  2014. break;
  2015. case HTT_T2H_MSG_TYPE_RX_DELBA:
  2016. ath10k_htt_rx_delba(ar, resp);
  2017. break;
  2018. case HTT_T2H_MSG_TYPE_PKTLOG: {
  2019. struct ath10k_pktlog_hdr *hdr =
  2020. (struct ath10k_pktlog_hdr *)resp->pktlog_msg.payload;
  2021. trace_ath10k_htt_pktlog(ar, resp->pktlog_msg.payload,
  2022. sizeof(*hdr) +
  2023. __le16_to_cpu(hdr->size));
  2024. break;
  2025. }
  2026. case HTT_T2H_MSG_TYPE_RX_FLUSH: {
  2027. /* Ignore this event because mac80211 takes care of Rx
  2028. * aggregation reordering.
  2029. */
  2030. break;
  2031. }
  2032. case HTT_T2H_MSG_TYPE_RX_IN_ORD_PADDR_IND: {
  2033. skb_queue_tail(&htt->rx_in_ord_compl_q, skb);
  2034. tasklet_schedule(&htt->txrx_compl_task);
  2035. return;
  2036. }
  2037. case HTT_T2H_MSG_TYPE_TX_CREDIT_UPDATE_IND:
  2038. break;
  2039. case HTT_T2H_MSG_TYPE_CHAN_CHANGE: {
  2040. u32 phymode = __le32_to_cpu(resp->chan_change.phymode);
  2041. u32 freq = __le32_to_cpu(resp->chan_change.freq);
  2042. ar->tgt_oper_chan =
  2043. __ieee80211_get_channel(ar->hw->wiphy, freq);
  2044. ath10k_dbg(ar, ATH10K_DBG_HTT,
  2045. "htt chan change freq %u phymode %s\n",
  2046. freq, ath10k_wmi_phymode_str(phymode));
  2047. break;
  2048. }
  2049. case HTT_T2H_MSG_TYPE_AGGR_CONF:
  2050. break;
  2051. case HTT_T2H_MSG_TYPE_TX_FETCH_IND: {
  2052. struct sk_buff *tx_fetch_ind = skb_copy(skb, GFP_ATOMIC);
  2053. if (!tx_fetch_ind) {
  2054. ath10k_warn(ar, "failed to copy htt tx fetch ind\n");
  2055. break;
  2056. }
  2057. skb_queue_tail(&htt->tx_fetch_ind_q, tx_fetch_ind);
  2058. tasklet_schedule(&htt->txrx_compl_task);
  2059. break;
  2060. }
  2061. case HTT_T2H_MSG_TYPE_TX_FETCH_CONFIRM:
  2062. ath10k_htt_rx_tx_fetch_confirm(ar, skb);
  2063. break;
  2064. case HTT_T2H_MSG_TYPE_TX_MODE_SWITCH_IND:
  2065. ath10k_htt_rx_tx_mode_switch_ind(ar, skb);
  2066. break;
  2067. case HTT_T2H_MSG_TYPE_EN_STATS:
  2068. default:
  2069. ath10k_warn(ar, "htt event (%d) not handled\n",
  2070. resp->hdr.msg_type);
  2071. ath10k_dbg_dump(ar, ATH10K_DBG_HTT_DUMP, NULL, "htt event: ",
  2072. skb->data, skb->len);
  2073. break;
  2074. };
  2075. /* Free the indication buffer */
  2076. dev_kfree_skb_any(skb);
  2077. }
  2078. EXPORT_SYMBOL(ath10k_htt_t2h_msg_handler);
  2079. void ath10k_htt_rx_pktlog_completion_handler(struct ath10k *ar,
  2080. struct sk_buff *skb)
  2081. {
  2082. trace_ath10k_htt_pktlog(ar, skb->data, skb->len);
  2083. dev_kfree_skb_any(skb);
  2084. }
  2085. EXPORT_SYMBOL(ath10k_htt_rx_pktlog_completion_handler);
  2086. static void ath10k_htt_txrx_compl_task(unsigned long ptr)
  2087. {
  2088. struct ath10k_htt *htt = (struct ath10k_htt *)ptr;
  2089. struct ath10k *ar = htt->ar;
  2090. struct htt_tx_done tx_done = {};
  2091. struct sk_buff_head rx_q;
  2092. struct sk_buff_head rx_ind_q;
  2093. struct sk_buff_head tx_ind_q;
  2094. struct htt_resp *resp;
  2095. struct sk_buff *skb;
  2096. unsigned long flags;
  2097. __skb_queue_head_init(&rx_q);
  2098. __skb_queue_head_init(&rx_ind_q);
  2099. __skb_queue_head_init(&tx_ind_q);
  2100. spin_lock_irqsave(&htt->rx_compl_q.lock, flags);
  2101. skb_queue_splice_init(&htt->rx_compl_q, &rx_q);
  2102. spin_unlock_irqrestore(&htt->rx_compl_q.lock, flags);
  2103. spin_lock_irqsave(&htt->rx_in_ord_compl_q.lock, flags);
  2104. skb_queue_splice_init(&htt->rx_in_ord_compl_q, &rx_ind_q);
  2105. spin_unlock_irqrestore(&htt->rx_in_ord_compl_q.lock, flags);
  2106. spin_lock_irqsave(&htt->tx_fetch_ind_q.lock, flags);
  2107. skb_queue_splice_init(&htt->tx_fetch_ind_q, &tx_ind_q);
  2108. spin_unlock_irqrestore(&htt->tx_fetch_ind_q.lock, flags);
  2109. /* kfifo_get: called only within txrx_tasklet so it's neatly serialized.
  2110. * From kfifo_get() documentation:
  2111. * Note that with only one concurrent reader and one concurrent writer,
  2112. * you don't need extra locking to use these macro.
  2113. */
  2114. while (kfifo_get(&htt->txdone_fifo, &tx_done))
  2115. ath10k_txrx_tx_unref(htt, &tx_done);
  2116. while ((skb = __skb_dequeue(&tx_ind_q))) {
  2117. ath10k_htt_rx_tx_fetch_ind(ar, skb);
  2118. dev_kfree_skb_any(skb);
  2119. }
  2120. ath10k_mac_tx_push_pending(ar);
  2121. while ((skb = __skb_dequeue(&rx_q))) {
  2122. resp = (struct htt_resp *)skb->data;
  2123. spin_lock_bh(&htt->rx_ring.lock);
  2124. ath10k_htt_rx_handler(htt, &resp->rx_ind);
  2125. spin_unlock_bh(&htt->rx_ring.lock);
  2126. dev_kfree_skb_any(skb);
  2127. }
  2128. while ((skb = __skb_dequeue(&rx_ind_q))) {
  2129. spin_lock_bh(&htt->rx_ring.lock);
  2130. ath10k_htt_rx_in_ord_ind(ar, skb);
  2131. spin_unlock_bh(&htt->rx_ring.lock);
  2132. dev_kfree_skb_any(skb);
  2133. }
  2134. }