intel_breadcrumbs.c 25 KB

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  1. /*
  2. * Copyright © 2015 Intel Corporation
  3. *
  4. * Permission is hereby granted, free of charge, to any person obtaining a
  5. * copy of this software and associated documentation files (the "Software"),
  6. * to deal in the Software without restriction, including without limitation
  7. * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  8. * and/or sell copies of the Software, and to permit persons to whom the
  9. * Software is furnished to do so, subject to the following conditions:
  10. *
  11. * The above copyright notice and this permission notice (including the next
  12. * paragraph) shall be included in all copies or substantial portions of the
  13. * Software.
  14. *
  15. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17. * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  18. * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19. * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20. * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  21. * IN THE SOFTWARE.
  22. *
  23. */
  24. #include <linux/kthread.h>
  25. #include <uapi/linux/sched/types.h>
  26. #include "i915_drv.h"
  27. static unsigned int __intel_breadcrumbs_wakeup(struct intel_breadcrumbs *b)
  28. {
  29. struct intel_wait *wait;
  30. unsigned int result = 0;
  31. lockdep_assert_held(&b->irq_lock);
  32. wait = b->irq_wait;
  33. if (wait) {
  34. result = ENGINE_WAKEUP_WAITER;
  35. if (wake_up_process(wait->tsk))
  36. result |= ENGINE_WAKEUP_ASLEEP;
  37. }
  38. return result;
  39. }
  40. unsigned int intel_engine_wakeup(struct intel_engine_cs *engine)
  41. {
  42. struct intel_breadcrumbs *b = &engine->breadcrumbs;
  43. unsigned int result;
  44. spin_lock_irq(&b->irq_lock);
  45. result = __intel_breadcrumbs_wakeup(b);
  46. spin_unlock_irq(&b->irq_lock);
  47. return result;
  48. }
  49. static unsigned long wait_timeout(void)
  50. {
  51. return round_jiffies_up(jiffies + DRM_I915_HANGCHECK_JIFFIES);
  52. }
  53. static noinline void missed_breadcrumb(struct intel_engine_cs *engine)
  54. {
  55. DRM_DEBUG_DRIVER("%s missed breadcrumb at %pF, irq posted? %s\n",
  56. engine->name, __builtin_return_address(0),
  57. yesno(test_bit(ENGINE_IRQ_BREADCRUMB,
  58. &engine->irq_posted)));
  59. set_bit(engine->id, &engine->i915->gpu_error.missed_irq_rings);
  60. }
  61. static void intel_breadcrumbs_hangcheck(unsigned long data)
  62. {
  63. struct intel_engine_cs *engine = (struct intel_engine_cs *)data;
  64. struct intel_breadcrumbs *b = &engine->breadcrumbs;
  65. if (!b->irq_armed)
  66. return;
  67. if (b->hangcheck_interrupts != atomic_read(&engine->irq_count)) {
  68. b->hangcheck_interrupts = atomic_read(&engine->irq_count);
  69. mod_timer(&b->hangcheck, wait_timeout());
  70. return;
  71. }
  72. /* We keep the hangcheck timer alive until we disarm the irq, even
  73. * if there are no waiters at present.
  74. *
  75. * If the waiter was currently running, assume it hasn't had a chance
  76. * to process the pending interrupt (e.g, low priority task on a loaded
  77. * system) and wait until it sleeps before declaring a missed interrupt.
  78. *
  79. * If the waiter was asleep (and not even pending a wakeup), then we
  80. * must have missed an interrupt as the GPU has stopped advancing
  81. * but we still have a waiter. Assuming all batches complete within
  82. * DRM_I915_HANGCHECK_JIFFIES [1.5s]!
  83. */
  84. if (intel_engine_wakeup(engine) & ENGINE_WAKEUP_ASLEEP) {
  85. missed_breadcrumb(engine);
  86. mod_timer(&engine->breadcrumbs.fake_irq, jiffies + 1);
  87. } else {
  88. mod_timer(&b->hangcheck, wait_timeout());
  89. }
  90. }
  91. static void intel_breadcrumbs_fake_irq(unsigned long data)
  92. {
  93. struct intel_engine_cs *engine = (struct intel_engine_cs *)data;
  94. struct intel_breadcrumbs *b = &engine->breadcrumbs;
  95. /* The timer persists in case we cannot enable interrupts,
  96. * or if we have previously seen seqno/interrupt incoherency
  97. * ("missed interrupt" syndrome, better known as a "missed breadcrumb").
  98. * Here the worker will wake up every jiffie in order to kick the
  99. * oldest waiter to do the coherent seqno check.
  100. */
  101. spin_lock_irq(&b->irq_lock);
  102. if (!__intel_breadcrumbs_wakeup(b))
  103. __intel_engine_disarm_breadcrumbs(engine);
  104. spin_unlock_irq(&b->irq_lock);
  105. if (!b->irq_armed)
  106. return;
  107. mod_timer(&b->fake_irq, jiffies + 1);
  108. /* Ensure that even if the GPU hangs, we get woken up.
  109. *
  110. * However, note that if no one is waiting, we never notice
  111. * a gpu hang. Eventually, we will have to wait for a resource
  112. * held by the GPU and so trigger a hangcheck. In the most
  113. * pathological case, this will be upon memory starvation! To
  114. * prevent this, we also queue the hangcheck from the retire
  115. * worker.
  116. */
  117. i915_queue_hangcheck(engine->i915);
  118. }
  119. static void irq_enable(struct intel_engine_cs *engine)
  120. {
  121. /* Enabling the IRQ may miss the generation of the interrupt, but
  122. * we still need to force the barrier before reading the seqno,
  123. * just in case.
  124. */
  125. set_bit(ENGINE_IRQ_BREADCRUMB, &engine->irq_posted);
  126. /* Caller disables interrupts */
  127. spin_lock(&engine->i915->irq_lock);
  128. engine->irq_enable(engine);
  129. spin_unlock(&engine->i915->irq_lock);
  130. }
  131. static void irq_disable(struct intel_engine_cs *engine)
  132. {
  133. /* Caller disables interrupts */
  134. spin_lock(&engine->i915->irq_lock);
  135. engine->irq_disable(engine);
  136. spin_unlock(&engine->i915->irq_lock);
  137. }
  138. void __intel_engine_disarm_breadcrumbs(struct intel_engine_cs *engine)
  139. {
  140. struct intel_breadcrumbs *b = &engine->breadcrumbs;
  141. lockdep_assert_held(&b->irq_lock);
  142. GEM_BUG_ON(b->irq_wait);
  143. if (b->irq_enabled) {
  144. irq_disable(engine);
  145. b->irq_enabled = false;
  146. }
  147. b->irq_armed = false;
  148. }
  149. void intel_engine_disarm_breadcrumbs(struct intel_engine_cs *engine)
  150. {
  151. struct intel_breadcrumbs *b = &engine->breadcrumbs;
  152. struct intel_wait *wait, *n, *first;
  153. if (!b->irq_armed)
  154. return;
  155. /* We only disarm the irq when we are idle (all requests completed),
  156. * so if the bottom-half remains asleep, it missed the request
  157. * completion.
  158. */
  159. spin_lock_irq(&b->rb_lock);
  160. spin_lock(&b->irq_lock);
  161. first = fetch_and_zero(&b->irq_wait);
  162. __intel_engine_disarm_breadcrumbs(engine);
  163. spin_unlock(&b->irq_lock);
  164. rbtree_postorder_for_each_entry_safe(wait, n, &b->waiters, node) {
  165. RB_CLEAR_NODE(&wait->node);
  166. if (wake_up_process(wait->tsk) && wait == first)
  167. missed_breadcrumb(engine);
  168. }
  169. b->waiters = RB_ROOT;
  170. spin_unlock_irq(&b->rb_lock);
  171. }
  172. static bool use_fake_irq(const struct intel_breadcrumbs *b)
  173. {
  174. const struct intel_engine_cs *engine =
  175. container_of(b, struct intel_engine_cs, breadcrumbs);
  176. if (!test_bit(engine->id, &engine->i915->gpu_error.missed_irq_rings))
  177. return false;
  178. /* Only start with the heavy weight fake irq timer if we have not
  179. * seen any interrupts since enabling it the first time. If the
  180. * interrupts are still arriving, it means we made a mistake in our
  181. * engine->seqno_barrier(), a timing error that should be transient
  182. * and unlikely to reoccur.
  183. */
  184. return atomic_read(&engine->irq_count) == b->hangcheck_interrupts;
  185. }
  186. static void enable_fake_irq(struct intel_breadcrumbs *b)
  187. {
  188. /* Ensure we never sleep indefinitely */
  189. if (!b->irq_enabled || use_fake_irq(b))
  190. mod_timer(&b->fake_irq, jiffies + 1);
  191. else
  192. mod_timer(&b->hangcheck, wait_timeout());
  193. }
  194. static void __intel_breadcrumbs_enable_irq(struct intel_breadcrumbs *b)
  195. {
  196. struct intel_engine_cs *engine =
  197. container_of(b, struct intel_engine_cs, breadcrumbs);
  198. struct drm_i915_private *i915 = engine->i915;
  199. lockdep_assert_held(&b->irq_lock);
  200. if (b->irq_armed)
  201. return;
  202. /* The breadcrumb irq will be disarmed on the interrupt after the
  203. * waiters are signaled. This gives us a single interrupt window in
  204. * which we can add a new waiter and avoid the cost of re-enabling
  205. * the irq.
  206. */
  207. b->irq_armed = true;
  208. GEM_BUG_ON(b->irq_enabled);
  209. if (I915_SELFTEST_ONLY(b->mock)) {
  210. /* For our mock objects we want to avoid interaction
  211. * with the real hardware (which is not set up). So
  212. * we simply pretend we have enabled the powerwell
  213. * and the irq, and leave it up to the mock
  214. * implementation to call intel_engine_wakeup()
  215. * itself when it wants to simulate a user interrupt,
  216. */
  217. return;
  218. }
  219. /* Since we are waiting on a request, the GPU should be busy
  220. * and should have its own rpm reference. This is tracked
  221. * by i915->gt.awake, we can forgo holding our own wakref
  222. * for the interrupt as before i915->gt.awake is released (when
  223. * the driver is idle) we disarm the breadcrumbs.
  224. */
  225. /* No interrupts? Kick the waiter every jiffie! */
  226. if (intel_irqs_enabled(i915)) {
  227. if (!test_bit(engine->id, &i915->gpu_error.test_irq_rings))
  228. irq_enable(engine);
  229. b->irq_enabled = true;
  230. }
  231. enable_fake_irq(b);
  232. }
  233. static inline struct intel_wait *to_wait(struct rb_node *node)
  234. {
  235. return rb_entry(node, struct intel_wait, node);
  236. }
  237. static inline void __intel_breadcrumbs_finish(struct intel_breadcrumbs *b,
  238. struct intel_wait *wait)
  239. {
  240. lockdep_assert_held(&b->rb_lock);
  241. GEM_BUG_ON(b->irq_wait == wait);
  242. /* This request is completed, so remove it from the tree, mark it as
  243. * complete, and *then* wake up the associated task. N.B. when the
  244. * task wakes up, it will find the empty rb_node, discern that it
  245. * has already been removed from the tree and skip the serialisation
  246. * of the b->rb_lock and b->irq_lock. This means that the destruction
  247. * of the intel_wait is not serialised with the interrupt handler
  248. * by the waiter - it must instead be serialised by the caller.
  249. */
  250. rb_erase(&wait->node, &b->waiters);
  251. RB_CLEAR_NODE(&wait->node);
  252. wake_up_process(wait->tsk); /* implicit smp_wmb() */
  253. }
  254. static inline void __intel_breadcrumbs_next(struct intel_engine_cs *engine,
  255. struct rb_node *next)
  256. {
  257. struct intel_breadcrumbs *b = &engine->breadcrumbs;
  258. spin_lock(&b->irq_lock);
  259. GEM_BUG_ON(!b->irq_armed);
  260. GEM_BUG_ON(!b->irq_wait);
  261. b->irq_wait = to_wait(next);
  262. spin_unlock(&b->irq_lock);
  263. /* We always wake up the next waiter that takes over as the bottom-half
  264. * as we may delegate not only the irq-seqno barrier to the next waiter
  265. * but also the task of waking up concurrent waiters.
  266. */
  267. if (next)
  268. wake_up_process(to_wait(next)->tsk);
  269. }
  270. static bool __intel_engine_add_wait(struct intel_engine_cs *engine,
  271. struct intel_wait *wait)
  272. {
  273. struct intel_breadcrumbs *b = &engine->breadcrumbs;
  274. struct rb_node **p, *parent, *completed;
  275. bool first;
  276. u32 seqno;
  277. /* Insert the request into the retirement ordered list
  278. * of waiters by walking the rbtree. If we are the oldest
  279. * seqno in the tree (the first to be retired), then
  280. * set ourselves as the bottom-half.
  281. *
  282. * As we descend the tree, prune completed branches since we hold the
  283. * spinlock we know that the first_waiter must be delayed and can
  284. * reduce some of the sequential wake up latency if we take action
  285. * ourselves and wake up the completed tasks in parallel. Also, by
  286. * removing stale elements in the tree, we may be able to reduce the
  287. * ping-pong between the old bottom-half and ourselves as first-waiter.
  288. */
  289. first = true;
  290. parent = NULL;
  291. completed = NULL;
  292. seqno = intel_engine_get_seqno(engine);
  293. /* If the request completed before we managed to grab the spinlock,
  294. * return now before adding ourselves to the rbtree. We let the
  295. * current bottom-half handle any pending wakeups and instead
  296. * try and get out of the way quickly.
  297. */
  298. if (i915_seqno_passed(seqno, wait->seqno)) {
  299. RB_CLEAR_NODE(&wait->node);
  300. return first;
  301. }
  302. p = &b->waiters.rb_node;
  303. while (*p) {
  304. parent = *p;
  305. if (wait->seqno == to_wait(parent)->seqno) {
  306. /* We have multiple waiters on the same seqno, select
  307. * the highest priority task (that with the smallest
  308. * task->prio) to serve as the bottom-half for this
  309. * group.
  310. */
  311. if (wait->tsk->prio > to_wait(parent)->tsk->prio) {
  312. p = &parent->rb_right;
  313. first = false;
  314. } else {
  315. p = &parent->rb_left;
  316. }
  317. } else if (i915_seqno_passed(wait->seqno,
  318. to_wait(parent)->seqno)) {
  319. p = &parent->rb_right;
  320. if (i915_seqno_passed(seqno, to_wait(parent)->seqno))
  321. completed = parent;
  322. else
  323. first = false;
  324. } else {
  325. p = &parent->rb_left;
  326. }
  327. }
  328. rb_link_node(&wait->node, parent, p);
  329. rb_insert_color(&wait->node, &b->waiters);
  330. if (first) {
  331. spin_lock(&b->irq_lock);
  332. b->irq_wait = wait;
  333. /* After assigning ourselves as the new bottom-half, we must
  334. * perform a cursory check to prevent a missed interrupt.
  335. * Either we miss the interrupt whilst programming the hardware,
  336. * or if there was a previous waiter (for a later seqno) they
  337. * may be woken instead of us (due to the inherent race
  338. * in the unlocked read of b->irq_seqno_bh in the irq handler)
  339. * and so we miss the wake up.
  340. */
  341. __intel_breadcrumbs_enable_irq(b);
  342. spin_unlock(&b->irq_lock);
  343. }
  344. if (completed) {
  345. /* Advance the bottom-half (b->irq_wait) before we wake up
  346. * the waiters who may scribble over their intel_wait
  347. * just as the interrupt handler is dereferencing it via
  348. * b->irq_wait.
  349. */
  350. if (!first) {
  351. struct rb_node *next = rb_next(completed);
  352. GEM_BUG_ON(next == &wait->node);
  353. __intel_breadcrumbs_next(engine, next);
  354. }
  355. do {
  356. struct intel_wait *crumb = to_wait(completed);
  357. completed = rb_prev(completed);
  358. __intel_breadcrumbs_finish(b, crumb);
  359. } while (completed);
  360. }
  361. GEM_BUG_ON(!b->irq_wait);
  362. GEM_BUG_ON(!b->irq_armed);
  363. GEM_BUG_ON(rb_first(&b->waiters) != &b->irq_wait->node);
  364. return first;
  365. }
  366. bool intel_engine_add_wait(struct intel_engine_cs *engine,
  367. struct intel_wait *wait)
  368. {
  369. struct intel_breadcrumbs *b = &engine->breadcrumbs;
  370. bool first;
  371. spin_lock_irq(&b->rb_lock);
  372. first = __intel_engine_add_wait(engine, wait);
  373. spin_unlock_irq(&b->rb_lock);
  374. return first;
  375. }
  376. static inline bool chain_wakeup(struct rb_node *rb, int priority)
  377. {
  378. return rb && to_wait(rb)->tsk->prio <= priority;
  379. }
  380. static inline int wakeup_priority(struct intel_breadcrumbs *b,
  381. struct task_struct *tsk)
  382. {
  383. if (tsk == b->signaler)
  384. return INT_MIN;
  385. else
  386. return tsk->prio;
  387. }
  388. static void __intel_engine_remove_wait(struct intel_engine_cs *engine,
  389. struct intel_wait *wait)
  390. {
  391. struct intel_breadcrumbs *b = &engine->breadcrumbs;
  392. lockdep_assert_held(&b->rb_lock);
  393. if (RB_EMPTY_NODE(&wait->node))
  394. goto out;
  395. if (b->irq_wait == wait) {
  396. const int priority = wakeup_priority(b, wait->tsk);
  397. struct rb_node *next;
  398. /* We are the current bottom-half. Find the next candidate,
  399. * the first waiter in the queue on the remaining oldest
  400. * request. As multiple seqnos may complete in the time it
  401. * takes us to wake up and find the next waiter, we have to
  402. * wake up that waiter for it to perform its own coherent
  403. * completion check.
  404. */
  405. next = rb_next(&wait->node);
  406. if (chain_wakeup(next, priority)) {
  407. /* If the next waiter is already complete,
  408. * wake it up and continue onto the next waiter. So
  409. * if have a small herd, they will wake up in parallel
  410. * rather than sequentially, which should reduce
  411. * the overall latency in waking all the completed
  412. * clients.
  413. *
  414. * However, waking up a chain adds extra latency to
  415. * the first_waiter. This is undesirable if that
  416. * waiter is a high priority task.
  417. */
  418. u32 seqno = intel_engine_get_seqno(engine);
  419. while (i915_seqno_passed(seqno, to_wait(next)->seqno)) {
  420. struct rb_node *n = rb_next(next);
  421. __intel_breadcrumbs_finish(b, to_wait(next));
  422. next = n;
  423. if (!chain_wakeup(next, priority))
  424. break;
  425. }
  426. }
  427. __intel_breadcrumbs_next(engine, next);
  428. } else {
  429. GEM_BUG_ON(rb_first(&b->waiters) == &wait->node);
  430. }
  431. GEM_BUG_ON(RB_EMPTY_NODE(&wait->node));
  432. rb_erase(&wait->node, &b->waiters);
  433. out:
  434. GEM_BUG_ON(b->irq_wait == wait);
  435. GEM_BUG_ON(rb_first(&b->waiters) !=
  436. (b->irq_wait ? &b->irq_wait->node : NULL));
  437. }
  438. void intel_engine_remove_wait(struct intel_engine_cs *engine,
  439. struct intel_wait *wait)
  440. {
  441. struct intel_breadcrumbs *b = &engine->breadcrumbs;
  442. /* Quick check to see if this waiter was already decoupled from
  443. * the tree by the bottom-half to avoid contention on the spinlock
  444. * by the herd.
  445. */
  446. if (RB_EMPTY_NODE(&wait->node)) {
  447. GEM_BUG_ON(READ_ONCE(b->irq_wait) == wait);
  448. return;
  449. }
  450. spin_lock_irq(&b->rb_lock);
  451. __intel_engine_remove_wait(engine, wait);
  452. spin_unlock_irq(&b->rb_lock);
  453. }
  454. static bool signal_valid(const struct drm_i915_gem_request *request)
  455. {
  456. return intel_wait_check_request(&request->signaling.wait, request);
  457. }
  458. static bool signal_complete(const struct drm_i915_gem_request *request)
  459. {
  460. if (!request)
  461. return false;
  462. /* If another process served as the bottom-half it may have already
  463. * signalled that this wait is already completed.
  464. */
  465. if (intel_wait_complete(&request->signaling.wait))
  466. return signal_valid(request);
  467. /* Carefully check if the request is complete, giving time for the
  468. * seqno to be visible or if the GPU hung.
  469. */
  470. if (__i915_request_irq_complete(request))
  471. return true;
  472. return false;
  473. }
  474. static struct drm_i915_gem_request *to_signaler(struct rb_node *rb)
  475. {
  476. return rb_entry(rb, struct drm_i915_gem_request, signaling.node);
  477. }
  478. static void signaler_set_rtpriority(void)
  479. {
  480. struct sched_param param = { .sched_priority = 1 };
  481. sched_setscheduler_nocheck(current, SCHED_FIFO, &param);
  482. }
  483. static int intel_breadcrumbs_signaler(void *arg)
  484. {
  485. struct intel_engine_cs *engine = arg;
  486. struct intel_breadcrumbs *b = &engine->breadcrumbs;
  487. struct drm_i915_gem_request *request;
  488. /* Install ourselves with high priority to reduce signalling latency */
  489. signaler_set_rtpriority();
  490. do {
  491. set_current_state(TASK_INTERRUPTIBLE);
  492. /* We are either woken up by the interrupt bottom-half,
  493. * or by a client adding a new signaller. In both cases,
  494. * the GPU seqno may have advanced beyond our oldest signal.
  495. * If it has, propagate the signal, remove the waiter and
  496. * check again with the next oldest signal. Otherwise we
  497. * need to wait for a new interrupt from the GPU or for
  498. * a new client.
  499. */
  500. rcu_read_lock();
  501. request = rcu_dereference(b->first_signal);
  502. if (request)
  503. request = i915_gem_request_get_rcu(request);
  504. rcu_read_unlock();
  505. if (signal_complete(request)) {
  506. local_bh_disable();
  507. dma_fence_signal(&request->fence);
  508. local_bh_enable(); /* kick start the tasklets */
  509. spin_lock_irq(&b->rb_lock);
  510. /* Wake up all other completed waiters and select the
  511. * next bottom-half for the next user interrupt.
  512. */
  513. __intel_engine_remove_wait(engine,
  514. &request->signaling.wait);
  515. /* Find the next oldest signal. Note that as we have
  516. * not been holding the lock, another client may
  517. * have installed an even older signal than the one
  518. * we just completed - so double check we are still
  519. * the oldest before picking the next one.
  520. */
  521. if (request == rcu_access_pointer(b->first_signal)) {
  522. struct rb_node *rb =
  523. rb_next(&request->signaling.node);
  524. rcu_assign_pointer(b->first_signal,
  525. rb ? to_signaler(rb) : NULL);
  526. }
  527. rb_erase(&request->signaling.node, &b->signals);
  528. RB_CLEAR_NODE(&request->signaling.node);
  529. spin_unlock_irq(&b->rb_lock);
  530. i915_gem_request_put(request);
  531. } else {
  532. DEFINE_WAIT(exec);
  533. if (kthread_should_stop()) {
  534. GEM_BUG_ON(request);
  535. break;
  536. }
  537. if (request)
  538. add_wait_queue(&request->execute, &exec);
  539. schedule();
  540. if (request)
  541. remove_wait_queue(&request->execute, &exec);
  542. if (kthread_should_park())
  543. kthread_parkme();
  544. }
  545. i915_gem_request_put(request);
  546. } while (1);
  547. __set_current_state(TASK_RUNNING);
  548. return 0;
  549. }
  550. void intel_engine_enable_signaling(struct drm_i915_gem_request *request)
  551. {
  552. struct intel_engine_cs *engine = request->engine;
  553. struct intel_breadcrumbs *b = &engine->breadcrumbs;
  554. struct rb_node *parent, **p;
  555. bool first, wakeup;
  556. u32 seqno;
  557. /* Note that we may be called from an interrupt handler on another
  558. * device (e.g. nouveau signaling a fence completion causing us
  559. * to submit a request, and so enable signaling). As such,
  560. * we need to make sure that all other users of b->rb_lock protect
  561. * against interrupts, i.e. use spin_lock_irqsave.
  562. */
  563. /* locked by dma_fence_enable_sw_signaling() (irqsafe fence->lock) */
  564. GEM_BUG_ON(!irqs_disabled());
  565. lockdep_assert_held(&request->lock);
  566. seqno = i915_gem_request_global_seqno(request);
  567. if (!seqno)
  568. return;
  569. request->signaling.wait.tsk = b->signaler;
  570. request->signaling.wait.request = request;
  571. request->signaling.wait.seqno = seqno;
  572. i915_gem_request_get(request);
  573. spin_lock(&b->rb_lock);
  574. /* First add ourselves into the list of waiters, but register our
  575. * bottom-half as the signaller thread. As per usual, only the oldest
  576. * waiter (not just signaller) is tasked as the bottom-half waking
  577. * up all completed waiters after the user interrupt.
  578. *
  579. * If we are the oldest waiter, enable the irq (after which we
  580. * must double check that the seqno did not complete).
  581. */
  582. wakeup = __intel_engine_add_wait(engine, &request->signaling.wait);
  583. /* Now insert ourselves into the retirement ordered list of signals
  584. * on this engine. We track the oldest seqno as that will be the
  585. * first signal to complete.
  586. */
  587. parent = NULL;
  588. first = true;
  589. p = &b->signals.rb_node;
  590. while (*p) {
  591. parent = *p;
  592. if (i915_seqno_passed(seqno,
  593. to_signaler(parent)->signaling.wait.seqno)) {
  594. p = &parent->rb_right;
  595. first = false;
  596. } else {
  597. p = &parent->rb_left;
  598. }
  599. }
  600. rb_link_node(&request->signaling.node, parent, p);
  601. rb_insert_color(&request->signaling.node, &b->signals);
  602. if (first)
  603. rcu_assign_pointer(b->first_signal, request);
  604. spin_unlock(&b->rb_lock);
  605. if (wakeup)
  606. wake_up_process(b->signaler);
  607. }
  608. void intel_engine_cancel_signaling(struct drm_i915_gem_request *request)
  609. {
  610. struct intel_engine_cs *engine = request->engine;
  611. struct intel_breadcrumbs *b = &engine->breadcrumbs;
  612. GEM_BUG_ON(!irqs_disabled());
  613. lockdep_assert_held(&request->lock);
  614. GEM_BUG_ON(!request->signaling.wait.seqno);
  615. spin_lock(&b->rb_lock);
  616. if (!RB_EMPTY_NODE(&request->signaling.node)) {
  617. if (request == rcu_access_pointer(b->first_signal)) {
  618. struct rb_node *rb =
  619. rb_next(&request->signaling.node);
  620. rcu_assign_pointer(b->first_signal,
  621. rb ? to_signaler(rb) : NULL);
  622. }
  623. rb_erase(&request->signaling.node, &b->signals);
  624. RB_CLEAR_NODE(&request->signaling.node);
  625. i915_gem_request_put(request);
  626. }
  627. __intel_engine_remove_wait(engine, &request->signaling.wait);
  628. spin_unlock(&b->rb_lock);
  629. request->signaling.wait.seqno = 0;
  630. }
  631. int intel_engine_init_breadcrumbs(struct intel_engine_cs *engine)
  632. {
  633. struct intel_breadcrumbs *b = &engine->breadcrumbs;
  634. struct task_struct *tsk;
  635. spin_lock_init(&b->rb_lock);
  636. spin_lock_init(&b->irq_lock);
  637. setup_timer(&b->fake_irq,
  638. intel_breadcrumbs_fake_irq,
  639. (unsigned long)engine);
  640. setup_timer(&b->hangcheck,
  641. intel_breadcrumbs_hangcheck,
  642. (unsigned long)engine);
  643. /* Spawn a thread to provide a common bottom-half for all signals.
  644. * As this is an asynchronous interface we cannot steal the current
  645. * task for handling the bottom-half to the user interrupt, therefore
  646. * we create a thread to do the coherent seqno dance after the
  647. * interrupt and then signal the waitqueue (via the dma-buf/fence).
  648. */
  649. tsk = kthread_run(intel_breadcrumbs_signaler, engine,
  650. "i915/signal:%d", engine->id);
  651. if (IS_ERR(tsk))
  652. return PTR_ERR(tsk);
  653. b->signaler = tsk;
  654. return 0;
  655. }
  656. static void cancel_fake_irq(struct intel_engine_cs *engine)
  657. {
  658. struct intel_breadcrumbs *b = &engine->breadcrumbs;
  659. del_timer_sync(&b->hangcheck);
  660. del_timer_sync(&b->fake_irq);
  661. clear_bit(engine->id, &engine->i915->gpu_error.missed_irq_rings);
  662. }
  663. void intel_engine_reset_breadcrumbs(struct intel_engine_cs *engine)
  664. {
  665. struct intel_breadcrumbs *b = &engine->breadcrumbs;
  666. cancel_fake_irq(engine);
  667. spin_lock_irq(&b->irq_lock);
  668. if (b->irq_enabled)
  669. irq_enable(engine);
  670. else
  671. irq_disable(engine);
  672. /* We set the IRQ_BREADCRUMB bit when we enable the irq presuming the
  673. * GPU is active and may have already executed the MI_USER_INTERRUPT
  674. * before the CPU is ready to receive. However, the engine is currently
  675. * idle (we haven't started it yet), there is no possibility for a
  676. * missed interrupt as we enabled the irq and so we can clear the
  677. * immediate wakeup (until a real interrupt arrives for the waiter).
  678. */
  679. clear_bit(ENGINE_IRQ_BREADCRUMB, &engine->irq_posted);
  680. if (b->irq_armed)
  681. enable_fake_irq(b);
  682. spin_unlock_irq(&b->irq_lock);
  683. }
  684. void intel_engine_fini_breadcrumbs(struct intel_engine_cs *engine)
  685. {
  686. struct intel_breadcrumbs *b = &engine->breadcrumbs;
  687. /* The engines should be idle and all requests accounted for! */
  688. WARN_ON(READ_ONCE(b->irq_wait));
  689. WARN_ON(!RB_EMPTY_ROOT(&b->waiters));
  690. WARN_ON(rcu_access_pointer(b->first_signal));
  691. WARN_ON(!RB_EMPTY_ROOT(&b->signals));
  692. if (!IS_ERR_OR_NULL(b->signaler))
  693. kthread_stop(b->signaler);
  694. cancel_fake_irq(engine);
  695. }
  696. bool intel_breadcrumbs_busy(struct intel_engine_cs *engine)
  697. {
  698. struct intel_breadcrumbs *b = &engine->breadcrumbs;
  699. bool busy = false;
  700. spin_lock_irq(&b->rb_lock);
  701. if (b->irq_wait) {
  702. wake_up_process(b->irq_wait->tsk);
  703. busy = true;
  704. }
  705. if (rcu_access_pointer(b->first_signal)) {
  706. wake_up_process(b->signaler);
  707. busy = true;
  708. }
  709. spin_unlock_irq(&b->rb_lock);
  710. return busy;
  711. }
  712. #if IS_ENABLED(CONFIG_DRM_I915_SELFTEST)
  713. #include "selftests/intel_breadcrumbs.c"
  714. #endif