ata.h 17 KB

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  1. /*
  2. * Copyright 2003-2004 Red Hat, Inc. All rights reserved.
  3. * Copyright 2003-2004 Jeff Garzik
  4. *
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License as published by
  8. * the Free Software Foundation; either version 2, or (at your option)
  9. * any later version.
  10. *
  11. * This program is distributed in the hope that it will be useful,
  12. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  14. * GNU General Public License for more details.
  15. *
  16. * You should have received a copy of the GNU General Public License
  17. * along with this program; see the file COPYING. If not, write to
  18. * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.
  19. *
  20. *
  21. * libata documentation is available via 'make {ps|pdf}docs',
  22. * as Documentation/DocBook/libata.*
  23. *
  24. * Hardware documentation available from http://www.t13.org/
  25. *
  26. */
  27. #ifndef __LINUX_ATA_H__
  28. #define __LINUX_ATA_H__
  29. #include <linux/types.h>
  30. /* defines only for the constants which don't work well as enums */
  31. #define ATA_DMA_BOUNDARY 0xffffUL
  32. #define ATA_DMA_MASK 0xffffffffULL
  33. enum {
  34. /* various global constants */
  35. ATA_MAX_DEVICES = 2, /* per bus/port */
  36. ATA_MAX_PRD = 256, /* we could make these 256/256 */
  37. ATA_SECT_SIZE = 512,
  38. ATA_MAX_SECTORS_128 = 128,
  39. ATA_MAX_SECTORS = 256,
  40. ATA_MAX_SECTORS_LBA48 = 65535,/* TODO: 65536? */
  41. ATA_MAX_SECTORS_TAPE = 65535,
  42. ATA_ID_WORDS = 256,
  43. ATA_ID_SERNO = 10,
  44. ATA_ID_FW_REV = 23,
  45. ATA_ID_PROD = 27,
  46. ATA_ID_OLD_PIO_MODES = 51,
  47. ATA_ID_FIELD_VALID = 53,
  48. ATA_ID_MWDMA_MODES = 63,
  49. ATA_ID_PIO_MODES = 64,
  50. ATA_ID_EIDE_DMA_MIN = 65,
  51. ATA_ID_EIDE_PIO = 67,
  52. ATA_ID_EIDE_PIO_IORDY = 68,
  53. ATA_ID_UDMA_MODES = 88,
  54. ATA_ID_MAJOR_VER = 80,
  55. ATA_ID_PIO4 = (1 << 1),
  56. ATA_ID_SERNO_LEN = 20,
  57. ATA_ID_FW_REV_LEN = 8,
  58. ATA_ID_PROD_LEN = 40,
  59. ATA_PCI_CTL_OFS = 2,
  60. ATA_PIO0 = (1 << 0),
  61. ATA_PIO1 = ATA_PIO0 | (1 << 1),
  62. ATA_PIO2 = ATA_PIO1 | (1 << 2),
  63. ATA_PIO3 = ATA_PIO2 | (1 << 3),
  64. ATA_PIO4 = ATA_PIO3 | (1 << 4),
  65. ATA_PIO5 = ATA_PIO4 | (1 << 5),
  66. ATA_PIO6 = ATA_PIO5 | (1 << 6),
  67. ATA_SWDMA0 = (1 << 0),
  68. ATA_SWDMA1 = ATA_SWDMA0 | (1 << 1),
  69. ATA_SWDMA2 = ATA_SWDMA1 | (1 << 2),
  70. ATA_SWDMA2_ONLY = (1 << 2),
  71. ATA_MWDMA0 = (1 << 0),
  72. ATA_MWDMA1 = ATA_MWDMA0 | (1 << 1),
  73. ATA_MWDMA2 = ATA_MWDMA1 | (1 << 2),
  74. ATA_MWDMA12_ONLY = (1 << 1) | (1 << 2),
  75. ATA_MWDMA2_ONLY = (1 << 2),
  76. ATA_UDMA0 = (1 << 0),
  77. ATA_UDMA1 = ATA_UDMA0 | (1 << 1),
  78. ATA_UDMA2 = ATA_UDMA1 | (1 << 2),
  79. ATA_UDMA3 = ATA_UDMA2 | (1 << 3),
  80. ATA_UDMA4 = ATA_UDMA3 | (1 << 4),
  81. ATA_UDMA5 = ATA_UDMA4 | (1 << 5),
  82. ATA_UDMA6 = ATA_UDMA5 | (1 << 6),
  83. ATA_UDMA7 = ATA_UDMA6 | (1 << 7),
  84. /* ATA_UDMA7 is just for completeness... doesn't exist (yet?). */
  85. ATA_UDMA_MASK_40C = ATA_UDMA2, /* udma0-2 */
  86. /* DMA-related */
  87. ATA_PRD_SZ = 8,
  88. ATA_PRD_TBL_SZ = (ATA_MAX_PRD * ATA_PRD_SZ),
  89. ATA_PRD_EOT = (1 << 31), /* end-of-table flag */
  90. ATA_DMA_TABLE_OFS = 4,
  91. ATA_DMA_STATUS = 2,
  92. ATA_DMA_CMD = 0,
  93. ATA_DMA_WR = (1 << 3),
  94. ATA_DMA_START = (1 << 0),
  95. ATA_DMA_INTR = (1 << 2),
  96. ATA_DMA_ERR = (1 << 1),
  97. ATA_DMA_ACTIVE = (1 << 0),
  98. /* bits in ATA command block registers */
  99. ATA_HOB = (1 << 7), /* LBA48 selector */
  100. ATA_NIEN = (1 << 1), /* disable-irq flag */
  101. ATA_LBA = (1 << 6), /* LBA28 selector */
  102. ATA_DEV1 = (1 << 4), /* Select Device 1 (slave) */
  103. ATA_DEVICE_OBS = (1 << 7) | (1 << 5), /* obs bits in dev reg */
  104. ATA_DEVCTL_OBS = (1 << 3), /* obsolete bit in devctl reg */
  105. ATA_BUSY = (1 << 7), /* BSY status bit */
  106. ATA_DRDY = (1 << 6), /* device ready */
  107. ATA_DF = (1 << 5), /* device fault */
  108. ATA_DRQ = (1 << 3), /* data request i/o */
  109. ATA_ERR = (1 << 0), /* have an error */
  110. ATA_SRST = (1 << 2), /* software reset */
  111. ATA_ICRC = (1 << 7), /* interface CRC error */
  112. ATA_UNC = (1 << 6), /* uncorrectable media error */
  113. ATA_IDNF = (1 << 4), /* ID not found */
  114. ATA_ABORTED = (1 << 2), /* command aborted */
  115. /* ATA command block registers */
  116. ATA_REG_DATA = 0x00,
  117. ATA_REG_ERR = 0x01,
  118. ATA_REG_NSECT = 0x02,
  119. ATA_REG_LBAL = 0x03,
  120. ATA_REG_LBAM = 0x04,
  121. ATA_REG_LBAH = 0x05,
  122. ATA_REG_DEVICE = 0x06,
  123. ATA_REG_STATUS = 0x07,
  124. ATA_REG_FEATURE = ATA_REG_ERR, /* and their aliases */
  125. ATA_REG_CMD = ATA_REG_STATUS,
  126. ATA_REG_BYTEL = ATA_REG_LBAM,
  127. ATA_REG_BYTEH = ATA_REG_LBAH,
  128. ATA_REG_DEVSEL = ATA_REG_DEVICE,
  129. ATA_REG_IRQ = ATA_REG_NSECT,
  130. /* ATA device commands */
  131. ATA_CMD_DEV_RESET = 0x08, /* ATAPI device reset */
  132. ATA_CMD_CHK_POWER = 0xE5, /* check power mode */
  133. ATA_CMD_STANDBY = 0xE2, /* place in standby power mode */
  134. ATA_CMD_IDLE = 0xE3, /* place in idle power mode */
  135. ATA_CMD_EDD = 0x90, /* execute device diagnostic */
  136. ATA_CMD_FLUSH = 0xE7,
  137. ATA_CMD_FLUSH_EXT = 0xEA,
  138. ATA_CMD_ID_ATA = 0xEC,
  139. ATA_CMD_ID_ATAPI = 0xA1,
  140. ATA_CMD_READ = 0xC8,
  141. ATA_CMD_READ_EXT = 0x25,
  142. ATA_CMD_WRITE = 0xCA,
  143. ATA_CMD_WRITE_EXT = 0x35,
  144. ATA_CMD_WRITE_FUA_EXT = 0x3D,
  145. ATA_CMD_FPDMA_READ = 0x60,
  146. ATA_CMD_FPDMA_WRITE = 0x61,
  147. ATA_CMD_PIO_READ = 0x20,
  148. ATA_CMD_PIO_READ_EXT = 0x24,
  149. ATA_CMD_PIO_WRITE = 0x30,
  150. ATA_CMD_PIO_WRITE_EXT = 0x34,
  151. ATA_CMD_READ_MULTI = 0xC4,
  152. ATA_CMD_READ_MULTI_EXT = 0x29,
  153. ATA_CMD_WRITE_MULTI = 0xC5,
  154. ATA_CMD_WRITE_MULTI_EXT = 0x39,
  155. ATA_CMD_WRITE_MULTI_FUA_EXT = 0xCE,
  156. ATA_CMD_SET_FEATURES = 0xEF,
  157. ATA_CMD_SET_MULTI = 0xC6,
  158. ATA_CMD_PACKET = 0xA0,
  159. ATA_CMD_VERIFY = 0x40,
  160. ATA_CMD_VERIFY_EXT = 0x42,
  161. ATA_CMD_STANDBYNOW1 = 0xE0,
  162. ATA_CMD_IDLEIMMEDIATE = 0xE1,
  163. ATA_CMD_SLEEP = 0xE6,
  164. ATA_CMD_INIT_DEV_PARAMS = 0x91,
  165. ATA_CMD_READ_NATIVE_MAX = 0xF8,
  166. ATA_CMD_READ_NATIVE_MAX_EXT = 0x27,
  167. ATA_CMD_SET_MAX = 0xF9,
  168. ATA_CMD_SET_MAX_EXT = 0x37,
  169. ATA_CMD_READ_LOG_EXT = 0x2f,
  170. ATA_CMD_PMP_READ = 0xE4,
  171. ATA_CMD_PMP_WRITE = 0xE8,
  172. ATA_CMD_CONF_OVERLAY = 0xB1,
  173. ATA_CMD_SEC_FREEZE_LOCK = 0xF5,
  174. /* READ_LOG_EXT pages */
  175. ATA_LOG_SATA_NCQ = 0x10,
  176. /* READ/WRITE LONG (obsolete) */
  177. ATA_CMD_READ_LONG = 0x22,
  178. ATA_CMD_READ_LONG_ONCE = 0x23,
  179. ATA_CMD_WRITE_LONG = 0x32,
  180. ATA_CMD_WRITE_LONG_ONCE = 0x33,
  181. /* SETFEATURES stuff */
  182. SETFEATURES_XFER = 0x03,
  183. XFER_UDMA_7 = 0x47,
  184. XFER_UDMA_6 = 0x46,
  185. XFER_UDMA_5 = 0x45,
  186. XFER_UDMA_4 = 0x44,
  187. XFER_UDMA_3 = 0x43,
  188. XFER_UDMA_2 = 0x42,
  189. XFER_UDMA_1 = 0x41,
  190. XFER_UDMA_0 = 0x40,
  191. XFER_MW_DMA_4 = 0x24, /* CFA only */
  192. XFER_MW_DMA_3 = 0x23, /* CFA only */
  193. XFER_MW_DMA_2 = 0x22,
  194. XFER_MW_DMA_1 = 0x21,
  195. XFER_MW_DMA_0 = 0x20,
  196. XFER_SW_DMA_2 = 0x12,
  197. XFER_SW_DMA_1 = 0x11,
  198. XFER_SW_DMA_0 = 0x10,
  199. XFER_PIO_6 = 0x0E, /* CFA only */
  200. XFER_PIO_5 = 0x0D, /* CFA only */
  201. XFER_PIO_4 = 0x0C,
  202. XFER_PIO_3 = 0x0B,
  203. XFER_PIO_2 = 0x0A,
  204. XFER_PIO_1 = 0x09,
  205. XFER_PIO_0 = 0x08,
  206. XFER_PIO_SLOW = 0x00,
  207. SETFEATURES_WC_ON = 0x02, /* Enable write cache */
  208. SETFEATURES_WC_OFF = 0x82, /* Disable write cache */
  209. SETFEATURES_SPINUP = 0x07, /* Spin-up drive */
  210. SETFEATURES_SATA_ENABLE = 0x10, /* Enable use of SATA feature */
  211. SETFEATURES_SATA_DISABLE = 0x90, /* Disable use of SATA feature */
  212. /* SETFEATURE Sector counts for SATA features */
  213. SATA_AN = 0x05, /* Asynchronous Notification */
  214. SATA_DIPM = 0x03, /* Device Initiated Power Management */
  215. /* feature values for SET_MAX */
  216. ATA_SET_MAX_ADDR = 0x00,
  217. ATA_SET_MAX_PASSWD = 0x01,
  218. ATA_SET_MAX_LOCK = 0x02,
  219. ATA_SET_MAX_UNLOCK = 0x03,
  220. ATA_SET_MAX_FREEZE_LOCK = 0x04,
  221. /* feature values for DEVICE CONFIGURATION OVERLAY */
  222. ATA_DCO_RESTORE = 0xC0,
  223. ATA_DCO_FREEZE_LOCK = 0xC1,
  224. ATA_DCO_IDENTIFY = 0xC2,
  225. ATA_DCO_SET = 0xC3,
  226. /* ATAPI stuff */
  227. ATAPI_PKT_DMA = (1 << 0),
  228. ATAPI_DMADIR = (1 << 2), /* ATAPI data dir:
  229. 0=to device, 1=to host */
  230. ATAPI_CDB_LEN = 16,
  231. /* PMP stuff */
  232. SATA_PMP_MAX_PORTS = 15,
  233. SATA_PMP_CTRL_PORT = 15,
  234. SATA_PMP_GSCR_DWORDS = 128,
  235. SATA_PMP_GSCR_PROD_ID = 0,
  236. SATA_PMP_GSCR_REV = 1,
  237. SATA_PMP_GSCR_PORT_INFO = 2,
  238. SATA_PMP_GSCR_ERROR = 32,
  239. SATA_PMP_GSCR_ERROR_EN = 33,
  240. SATA_PMP_GSCR_FEAT = 64,
  241. SATA_PMP_GSCR_FEAT_EN = 96,
  242. SATA_PMP_PSCR_STATUS = 0,
  243. SATA_PMP_PSCR_ERROR = 1,
  244. SATA_PMP_PSCR_CONTROL = 2,
  245. SATA_PMP_FEAT_BIST = (1 << 0),
  246. SATA_PMP_FEAT_PMREQ = (1 << 1),
  247. SATA_PMP_FEAT_DYNSSC = (1 << 2),
  248. SATA_PMP_FEAT_NOTIFY = (1 << 3),
  249. /* cable types */
  250. ATA_CBL_NONE = 0,
  251. ATA_CBL_PATA40 = 1,
  252. ATA_CBL_PATA80 = 2,
  253. ATA_CBL_PATA40_SHORT = 3, /* 40 wire cable to high UDMA spec */
  254. ATA_CBL_PATA_UNK = 4,
  255. ATA_CBL_SATA = 5,
  256. /* SATA Status and Control Registers */
  257. SCR_STATUS = 0,
  258. SCR_ERROR = 1,
  259. SCR_CONTROL = 2,
  260. SCR_ACTIVE = 3,
  261. SCR_NOTIFICATION = 4,
  262. /* SError bits */
  263. SERR_DATA_RECOVERED = (1 << 0), /* recovered data error */
  264. SERR_COMM_RECOVERED = (1 << 1), /* recovered comm failure */
  265. SERR_DATA = (1 << 8), /* unrecovered data error */
  266. SERR_PERSISTENT = (1 << 9), /* persistent data/comm error */
  267. SERR_PROTOCOL = (1 << 10), /* protocol violation */
  268. SERR_INTERNAL = (1 << 11), /* host internal error */
  269. SERR_PHYRDY_CHG = (1 << 16), /* PHY RDY changed */
  270. SERR_PHY_INT_ERR = (1 << 17), /* PHY internal error */
  271. SERR_COMM_WAKE = (1 << 18), /* Comm wake */
  272. SERR_10B_8B_ERR = (1 << 19), /* 10b to 8b decode error */
  273. SERR_DISPARITY = (1 << 20), /* Disparity */
  274. SERR_CRC = (1 << 21), /* CRC error */
  275. SERR_HANDSHAKE = (1 << 22), /* Handshake error */
  276. SERR_LINK_SEQ_ERR = (1 << 23), /* Link sequence error */
  277. SERR_TRANS_ST_ERROR = (1 << 24), /* Transport state trans. error */
  278. SERR_UNRECOG_FIS = (1 << 25), /* Unrecognized FIS */
  279. SERR_DEV_XCHG = (1 << 26), /* device exchanged */
  280. /* struct ata_taskfile flags */
  281. ATA_TFLAG_LBA48 = (1 << 0), /* enable 48-bit LBA and "HOB" */
  282. ATA_TFLAG_ISADDR = (1 << 1), /* enable r/w to nsect/lba regs */
  283. ATA_TFLAG_DEVICE = (1 << 2), /* enable r/w to device reg */
  284. ATA_TFLAG_WRITE = (1 << 3), /* data dir: host->dev==1 (write) */
  285. ATA_TFLAG_LBA = (1 << 4), /* enable LBA */
  286. ATA_TFLAG_FUA = (1 << 5), /* enable FUA */
  287. ATA_TFLAG_POLLING = (1 << 6), /* set nIEN to 1 and use polling */
  288. };
  289. enum ata_tf_protocols {
  290. /* ATA taskfile protocols */
  291. ATA_PROT_UNKNOWN, /* unknown/invalid */
  292. ATA_PROT_NODATA, /* no data */
  293. ATA_PROT_PIO, /* PIO data xfer */
  294. ATA_PROT_DMA, /* DMA */
  295. ATA_PROT_NCQ, /* NCQ */
  296. ATA_PROT_ATAPI, /* packet command, PIO data xfer*/
  297. ATA_PROT_ATAPI_NODATA, /* packet command, no data */
  298. ATA_PROT_ATAPI_DMA, /* packet command with special DMA sauce */
  299. };
  300. enum ata_ioctls {
  301. ATA_IOC_GET_IO32 = 0x309,
  302. ATA_IOC_SET_IO32 = 0x324,
  303. };
  304. /* core structures */
  305. struct ata_prd {
  306. u32 addr;
  307. u32 flags_len;
  308. };
  309. struct ata_taskfile {
  310. unsigned long flags; /* ATA_TFLAG_xxx */
  311. u8 protocol; /* ATA_PROT_xxx */
  312. u8 ctl; /* control reg */
  313. u8 hob_feature; /* additional data */
  314. u8 hob_nsect; /* to support LBA48 */
  315. u8 hob_lbal;
  316. u8 hob_lbam;
  317. u8 hob_lbah;
  318. u8 feature;
  319. u8 nsect;
  320. u8 lbal;
  321. u8 lbam;
  322. u8 lbah;
  323. u8 device;
  324. u8 command; /* IO operation */
  325. };
  326. #define ata_id_is_ata(id) (((id)[0] & (1 << 15)) == 0)
  327. #define ata_id_has_lba(id) ((id)[49] & (1 << 9))
  328. #define ata_id_has_dma(id) ((id)[49] & (1 << 8))
  329. #define ata_id_has_ncq(id) ((id)[76] & (1 << 8))
  330. #define ata_id_queue_depth(id) (((id)[75] & 0x1f) + 1)
  331. #define ata_id_removeable(id) ((id)[0] & (1 << 7))
  332. #define ata_id_has_atapi_AN(id) \
  333. ( (((id)[76] != 0x0000) && ((id)[76] != 0xffff)) && \
  334. ((id)[78] & (1 << 5)) )
  335. #define ata_id_iordy_disable(id) ((id)[49] & (1 << 10))
  336. #define ata_id_has_iordy(id) ((id)[49] & (1 << 11))
  337. #define ata_id_u32(id,n) \
  338. (((u32) (id)[(n) + 1] << 16) | ((u32) (id)[(n)]))
  339. #define ata_id_u64(id,n) \
  340. ( ((u64) (id)[(n) + 3] << 48) | \
  341. ((u64) (id)[(n) + 2] << 32) | \
  342. ((u64) (id)[(n) + 1] << 16) | \
  343. ((u64) (id)[(n) + 0]) )
  344. #define ata_id_cdb_intr(id) (((id)[0] & 0x60) == 0x20)
  345. static inline bool ata_id_has_hipm(const u16 *id)
  346. {
  347. u16 val = id[76];
  348. if (val == 0 || val == 0xffff)
  349. return false;
  350. return val & (1 << 9);
  351. }
  352. static inline bool ata_id_has_dipm(const u16 *id)
  353. {
  354. u16 val = id[78];
  355. if (val == 0 || val == 0xffff)
  356. return false;
  357. return val & (1 << 3);
  358. }
  359. static inline int ata_id_has_fua(const u16 *id)
  360. {
  361. if ((id[84] & 0xC000) != 0x4000)
  362. return 0;
  363. return id[84] & (1 << 6);
  364. }
  365. static inline int ata_id_has_flush(const u16 *id)
  366. {
  367. if ((id[83] & 0xC000) != 0x4000)
  368. return 0;
  369. return id[83] & (1 << 12);
  370. }
  371. static inline int ata_id_has_flush_ext(const u16 *id)
  372. {
  373. if ((id[83] & 0xC000) != 0x4000)
  374. return 0;
  375. return id[83] & (1 << 13);
  376. }
  377. static inline int ata_id_has_lba48(const u16 *id)
  378. {
  379. if ((id[83] & 0xC000) != 0x4000)
  380. return 0;
  381. if (!ata_id_u64(id, 100))
  382. return 0;
  383. return id[83] & (1 << 10);
  384. }
  385. static inline int ata_id_hpa_enabled(const u16 *id)
  386. {
  387. /* Yes children, word 83 valid bits cover word 82 data */
  388. if ((id[83] & 0xC000) != 0x4000)
  389. return 0;
  390. /* And 87 covers 85-87 */
  391. if ((id[87] & 0xC000) != 0x4000)
  392. return 0;
  393. /* Check command sets enabled as well as supported */
  394. if ((id[85] & ( 1 << 10)) == 0)
  395. return 0;
  396. return id[82] & (1 << 10);
  397. }
  398. static inline int ata_id_has_wcache(const u16 *id)
  399. {
  400. /* Yes children, word 83 valid bits cover word 82 data */
  401. if ((id[83] & 0xC000) != 0x4000)
  402. return 0;
  403. return id[82] & (1 << 5);
  404. }
  405. static inline int ata_id_has_pm(const u16 *id)
  406. {
  407. if ((id[83] & 0xC000) != 0x4000)
  408. return 0;
  409. return id[82] & (1 << 3);
  410. }
  411. static inline int ata_id_rahead_enabled(const u16 *id)
  412. {
  413. if ((id[87] & 0xC000) != 0x4000)
  414. return 0;
  415. return id[85] & (1 << 6);
  416. }
  417. static inline int ata_id_wcache_enabled(const u16 *id)
  418. {
  419. if ((id[87] & 0xC000) != 0x4000)
  420. return 0;
  421. return id[85] & (1 << 5);
  422. }
  423. /**
  424. * ata_id_major_version - get ATA level of drive
  425. * @id: Identify data
  426. *
  427. * Caveats:
  428. * ATA-1 considers identify optional
  429. * ATA-2 introduces mandatory identify
  430. * ATA-3 introduces word 80 and accurate reporting
  431. *
  432. * The practical impact of this is that ata_id_major_version cannot
  433. * reliably report on drives below ATA3.
  434. */
  435. static inline unsigned int ata_id_major_version(const u16 *id)
  436. {
  437. unsigned int mver;
  438. if (id[ATA_ID_MAJOR_VER] == 0xFFFF)
  439. return 0;
  440. for (mver = 14; mver >= 1; mver--)
  441. if (id[ATA_ID_MAJOR_VER] & (1 << mver))
  442. break;
  443. return mver;
  444. }
  445. static inline int ata_id_is_sata(const u16 *id)
  446. {
  447. return ata_id_major_version(id) >= 5 && id[93] == 0;
  448. }
  449. static inline int ata_id_has_tpm(const u16 *id)
  450. {
  451. /* The TPM bits are only valid on ATA8 */
  452. if (ata_id_major_version(id) < 8)
  453. return 0;
  454. if ((id[48] & 0xC000) != 0x4000)
  455. return 0;
  456. return id[48] & (1 << 0);
  457. }
  458. static inline int ata_id_has_dword_io(const u16 *id)
  459. {
  460. /* ATA 8 reuses this flag for "trusted" computing */
  461. if (ata_id_major_version(id) > 7)
  462. return 0;
  463. if (id[48] & (1 << 0))
  464. return 1;
  465. return 0;
  466. }
  467. static inline int ata_id_current_chs_valid(const u16 *id)
  468. {
  469. /* For ATA-1 devices, if the INITIALIZE DEVICE PARAMETERS command
  470. has not been issued to the device then the values of
  471. id[54] to id[56] are vendor specific. */
  472. return (id[53] & 0x01) && /* Current translation valid */
  473. id[54] && /* cylinders in current translation */
  474. id[55] && /* heads in current translation */
  475. id[55] <= 16 &&
  476. id[56]; /* sectors in current translation */
  477. }
  478. static inline int ata_id_is_cfa(const u16 *id)
  479. {
  480. u16 v = id[0];
  481. if (v == 0x848A) /* Standard CF */
  482. return 1;
  483. /* Could be CF hiding as standard ATA */
  484. if (ata_id_major_version(id) >= 3 && id[82] != 0xFFFF &&
  485. (id[82] & ( 1 << 2)))
  486. return 1;
  487. return 0;
  488. }
  489. static inline int ata_drive_40wire(const u16 *dev_id)
  490. {
  491. if (ata_id_is_sata(dev_id))
  492. return 0; /* SATA */
  493. if ((dev_id[93] & 0xE000) == 0x6000)
  494. return 0; /* 80 wire */
  495. return 1;
  496. }
  497. static inline int ata_drive_40wire_relaxed(const u16 *dev_id)
  498. {
  499. if ((dev_id[93] & 0x2000) == 0x2000)
  500. return 0; /* 80 wire */
  501. return 1;
  502. }
  503. static inline int atapi_cdb_len(const u16 *dev_id)
  504. {
  505. u16 tmp = dev_id[0] & 0x3;
  506. switch (tmp) {
  507. case 0: return 12;
  508. case 1: return 16;
  509. default: return -1;
  510. }
  511. }
  512. static inline int atapi_command_packet_set(const u16 *dev_id)
  513. {
  514. return (dev_id[0] >> 8) & 0x1f;
  515. }
  516. static inline int is_atapi_taskfile(const struct ata_taskfile *tf)
  517. {
  518. return (tf->protocol == ATA_PROT_ATAPI) ||
  519. (tf->protocol == ATA_PROT_ATAPI_NODATA) ||
  520. (tf->protocol == ATA_PROT_ATAPI_DMA);
  521. }
  522. static inline int is_multi_taskfile(struct ata_taskfile *tf)
  523. {
  524. return (tf->command == ATA_CMD_READ_MULTI) ||
  525. (tf->command == ATA_CMD_WRITE_MULTI) ||
  526. (tf->command == ATA_CMD_READ_MULTI_EXT) ||
  527. (tf->command == ATA_CMD_WRITE_MULTI_EXT) ||
  528. (tf->command == ATA_CMD_WRITE_MULTI_FUA_EXT);
  529. }
  530. static inline int ata_ok(u8 status)
  531. {
  532. return ((status & (ATA_BUSY | ATA_DRDY | ATA_DF | ATA_DRQ | ATA_ERR))
  533. == ATA_DRDY);
  534. }
  535. static inline int lba_28_ok(u64 block, u32 n_block)
  536. {
  537. /* check the ending block number */
  538. return ((block + n_block - 1) < ((u64)1 << 28)) && (n_block <= 256);
  539. }
  540. static inline int lba_48_ok(u64 block, u32 n_block)
  541. {
  542. /* check the ending block number */
  543. return ((block + n_block - 1) < ((u64)1 << 48)) && (n_block <= 65536);
  544. }
  545. #define sata_pmp_gscr_vendor(gscr) ((gscr)[SATA_PMP_GSCR_PROD_ID] & 0xffff)
  546. #define sata_pmp_gscr_devid(gscr) ((gscr)[SATA_PMP_GSCR_PROD_ID] >> 16)
  547. #define sata_pmp_gscr_rev(gscr) (((gscr)[SATA_PMP_GSCR_REV] >> 8) & 0xff)
  548. #define sata_pmp_gscr_ports(gscr) ((gscr)[SATA_PMP_GSCR_PORT_INFO] & 0xf)
  549. #endif /* __LINUX_ATA_H__ */