main.c 66 KB

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  1. /*
  2. * Copyright (c) 2006, 2007 Cisco Systems, Inc. All rights reserved.
  3. * Copyright (c) 2007, 2008 Mellanox Technologies. All rights reserved.
  4. *
  5. * This software is available to you under a choice of one of two
  6. * licenses. You may choose to be licensed under the terms of the GNU
  7. * General Public License (GPL) Version 2, available from the file
  8. * COPYING in the main directory of this source tree, or the
  9. * OpenIB.org BSD license below:
  10. *
  11. * Redistribution and use in source and binary forms, with or
  12. * without modification, are permitted provided that the following
  13. * conditions are met:
  14. *
  15. * - Redistributions of source code must retain the above
  16. * copyright notice, this list of conditions and the following
  17. * disclaimer.
  18. *
  19. * - Redistributions in binary form must reproduce the above
  20. * copyright notice, this list of conditions and the following
  21. * disclaimer in the documentation and/or other materials
  22. * provided with the distribution.
  23. *
  24. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  25. * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  26. * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  27. * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  28. * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  29. * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  30. * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  31. * SOFTWARE.
  32. */
  33. #include <linux/module.h>
  34. #include <linux/init.h>
  35. #include <linux/slab.h>
  36. #include <linux/errno.h>
  37. #include <linux/netdevice.h>
  38. #include <linux/inetdevice.h>
  39. #include <linux/rtnetlink.h>
  40. #include <linux/if_vlan.h>
  41. #include <net/ipv6.h>
  42. #include <net/addrconf.h>
  43. #include <rdma/ib_smi.h>
  44. #include <rdma/ib_user_verbs.h>
  45. #include <rdma/ib_addr.h>
  46. #include <linux/mlx4/driver.h>
  47. #include <linux/mlx4/cmd.h>
  48. #include "mlx4_ib.h"
  49. #include "user.h"
  50. #define DRV_NAME MLX4_IB_DRV_NAME
  51. #define DRV_VERSION "2.2-1"
  52. #define DRV_RELDATE "Feb 2014"
  53. #define MLX4_IB_FLOW_MAX_PRIO 0xFFF
  54. #define MLX4_IB_FLOW_QPN_MASK 0xFFFFFF
  55. MODULE_AUTHOR("Roland Dreier");
  56. MODULE_DESCRIPTION("Mellanox ConnectX HCA InfiniBand driver");
  57. MODULE_LICENSE("Dual BSD/GPL");
  58. MODULE_VERSION(DRV_VERSION);
  59. int mlx4_ib_sm_guid_assign = 1;
  60. module_param_named(sm_guid_assign, mlx4_ib_sm_guid_assign, int, 0444);
  61. MODULE_PARM_DESC(sm_guid_assign, "Enable SM alias_GUID assignment if sm_guid_assign > 0 (Default: 1)");
  62. static const char mlx4_ib_version[] =
  63. DRV_NAME ": Mellanox ConnectX InfiniBand driver v"
  64. DRV_VERSION " (" DRV_RELDATE ")\n";
  65. struct update_gid_work {
  66. struct work_struct work;
  67. union ib_gid gids[128];
  68. struct mlx4_ib_dev *dev;
  69. int port;
  70. };
  71. static void do_slave_init(struct mlx4_ib_dev *ibdev, int slave, int do_init);
  72. static struct workqueue_struct *wq;
  73. static void init_query_mad(struct ib_smp *mad)
  74. {
  75. mad->base_version = 1;
  76. mad->mgmt_class = IB_MGMT_CLASS_SUBN_LID_ROUTED;
  77. mad->class_version = 1;
  78. mad->method = IB_MGMT_METHOD_GET;
  79. }
  80. static union ib_gid zgid;
  81. static int check_flow_steering_support(struct mlx4_dev *dev)
  82. {
  83. int eth_num_ports = 0;
  84. int ib_num_ports = 0;
  85. int dmfs = dev->caps.steering_mode == MLX4_STEERING_MODE_DEVICE_MANAGED;
  86. if (dmfs) {
  87. int i;
  88. mlx4_foreach_port(i, dev, MLX4_PORT_TYPE_ETH)
  89. eth_num_ports++;
  90. mlx4_foreach_port(i, dev, MLX4_PORT_TYPE_IB)
  91. ib_num_ports++;
  92. dmfs &= (!ib_num_ports ||
  93. (dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_DMFS_IPOIB)) &&
  94. (!eth_num_ports ||
  95. (dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_FS_EN));
  96. if (ib_num_ports && mlx4_is_mfunc(dev)) {
  97. pr_warn("Device managed flow steering is unavailable for IB port in multifunction env.\n");
  98. dmfs = 0;
  99. }
  100. }
  101. return dmfs;
  102. }
  103. static int mlx4_ib_query_device(struct ib_device *ibdev,
  104. struct ib_device_attr *props)
  105. {
  106. struct mlx4_ib_dev *dev = to_mdev(ibdev);
  107. struct ib_smp *in_mad = NULL;
  108. struct ib_smp *out_mad = NULL;
  109. int err = -ENOMEM;
  110. in_mad = kzalloc(sizeof *in_mad, GFP_KERNEL);
  111. out_mad = kmalloc(sizeof *out_mad, GFP_KERNEL);
  112. if (!in_mad || !out_mad)
  113. goto out;
  114. init_query_mad(in_mad);
  115. in_mad->attr_id = IB_SMP_ATTR_NODE_INFO;
  116. err = mlx4_MAD_IFC(to_mdev(ibdev), MLX4_MAD_IFC_IGNORE_KEYS,
  117. 1, NULL, NULL, in_mad, out_mad);
  118. if (err)
  119. goto out;
  120. memset(props, 0, sizeof *props);
  121. props->fw_ver = dev->dev->caps.fw_ver;
  122. props->device_cap_flags = IB_DEVICE_CHANGE_PHY_PORT |
  123. IB_DEVICE_PORT_ACTIVE_EVENT |
  124. IB_DEVICE_SYS_IMAGE_GUID |
  125. IB_DEVICE_RC_RNR_NAK_GEN |
  126. IB_DEVICE_BLOCK_MULTICAST_LOOPBACK;
  127. if (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_BAD_PKEY_CNTR)
  128. props->device_cap_flags |= IB_DEVICE_BAD_PKEY_CNTR;
  129. if (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_BAD_QKEY_CNTR)
  130. props->device_cap_flags |= IB_DEVICE_BAD_QKEY_CNTR;
  131. if (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_APM)
  132. props->device_cap_flags |= IB_DEVICE_AUTO_PATH_MIG;
  133. if (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_UD_AV_PORT)
  134. props->device_cap_flags |= IB_DEVICE_UD_AV_PORT_ENFORCE;
  135. if (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_IPOIB_CSUM)
  136. props->device_cap_flags |= IB_DEVICE_UD_IP_CSUM;
  137. if (dev->dev->caps.max_gso_sz && dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_BLH)
  138. props->device_cap_flags |= IB_DEVICE_UD_TSO;
  139. if (dev->dev->caps.bmme_flags & MLX4_BMME_FLAG_RESERVED_LKEY)
  140. props->device_cap_flags |= IB_DEVICE_LOCAL_DMA_LKEY;
  141. if ((dev->dev->caps.bmme_flags & MLX4_BMME_FLAG_LOCAL_INV) &&
  142. (dev->dev->caps.bmme_flags & MLX4_BMME_FLAG_REMOTE_INV) &&
  143. (dev->dev->caps.bmme_flags & MLX4_BMME_FLAG_FAST_REG_WR))
  144. props->device_cap_flags |= IB_DEVICE_MEM_MGT_EXTENSIONS;
  145. if (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_XRC)
  146. props->device_cap_flags |= IB_DEVICE_XRC;
  147. if (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_MEM_WINDOW)
  148. props->device_cap_flags |= IB_DEVICE_MEM_WINDOW;
  149. if (dev->dev->caps.bmme_flags & MLX4_BMME_FLAG_TYPE_2_WIN) {
  150. if (dev->dev->caps.bmme_flags & MLX4_BMME_FLAG_WIN_TYPE_2B)
  151. props->device_cap_flags |= IB_DEVICE_MEM_WINDOW_TYPE_2B;
  152. else
  153. props->device_cap_flags |= IB_DEVICE_MEM_WINDOW_TYPE_2A;
  154. if (dev->steering_support == MLX4_STEERING_MODE_DEVICE_MANAGED)
  155. props->device_cap_flags |= IB_DEVICE_MANAGED_FLOW_STEERING;
  156. }
  157. props->vendor_id = be32_to_cpup((__be32 *) (out_mad->data + 36)) &
  158. 0xffffff;
  159. props->vendor_part_id = dev->dev->pdev->device;
  160. props->hw_ver = be32_to_cpup((__be32 *) (out_mad->data + 32));
  161. memcpy(&props->sys_image_guid, out_mad->data + 4, 8);
  162. props->max_mr_size = ~0ull;
  163. props->page_size_cap = dev->dev->caps.page_size_cap;
  164. props->max_qp = dev->dev->quotas.qp;
  165. props->max_qp_wr = dev->dev->caps.max_wqes - MLX4_IB_SQ_MAX_SPARE;
  166. props->max_sge = min(dev->dev->caps.max_sq_sg,
  167. dev->dev->caps.max_rq_sg);
  168. props->max_cq = dev->dev->quotas.cq;
  169. props->max_cqe = dev->dev->caps.max_cqes;
  170. props->max_mr = dev->dev->quotas.mpt;
  171. props->max_pd = dev->dev->caps.num_pds - dev->dev->caps.reserved_pds;
  172. props->max_qp_rd_atom = dev->dev->caps.max_qp_dest_rdma;
  173. props->max_qp_init_rd_atom = dev->dev->caps.max_qp_init_rdma;
  174. props->max_res_rd_atom = props->max_qp_rd_atom * props->max_qp;
  175. props->max_srq = dev->dev->quotas.srq;
  176. props->max_srq_wr = dev->dev->caps.max_srq_wqes - 1;
  177. props->max_srq_sge = dev->dev->caps.max_srq_sge;
  178. props->max_fast_reg_page_list_len = MLX4_MAX_FAST_REG_PAGES;
  179. props->local_ca_ack_delay = dev->dev->caps.local_ca_ack_delay;
  180. props->atomic_cap = dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_ATOMIC ?
  181. IB_ATOMIC_HCA : IB_ATOMIC_NONE;
  182. props->masked_atomic_cap = props->atomic_cap;
  183. props->max_pkeys = dev->dev->caps.pkey_table_len[1];
  184. props->max_mcast_grp = dev->dev->caps.num_mgms + dev->dev->caps.num_amgms;
  185. props->max_mcast_qp_attach = dev->dev->caps.num_qp_per_mgm;
  186. props->max_total_mcast_qp_attach = props->max_mcast_qp_attach *
  187. props->max_mcast_grp;
  188. props->max_map_per_fmr = dev->dev->caps.max_fmr_maps;
  189. out:
  190. kfree(in_mad);
  191. kfree(out_mad);
  192. return err;
  193. }
  194. static enum rdma_link_layer
  195. mlx4_ib_port_link_layer(struct ib_device *device, u8 port_num)
  196. {
  197. struct mlx4_dev *dev = to_mdev(device)->dev;
  198. return dev->caps.port_mask[port_num] == MLX4_PORT_TYPE_IB ?
  199. IB_LINK_LAYER_INFINIBAND : IB_LINK_LAYER_ETHERNET;
  200. }
  201. static int ib_link_query_port(struct ib_device *ibdev, u8 port,
  202. struct ib_port_attr *props, int netw_view)
  203. {
  204. struct ib_smp *in_mad = NULL;
  205. struct ib_smp *out_mad = NULL;
  206. int ext_active_speed;
  207. int mad_ifc_flags = MLX4_MAD_IFC_IGNORE_KEYS;
  208. int err = -ENOMEM;
  209. in_mad = kzalloc(sizeof *in_mad, GFP_KERNEL);
  210. out_mad = kmalloc(sizeof *out_mad, GFP_KERNEL);
  211. if (!in_mad || !out_mad)
  212. goto out;
  213. init_query_mad(in_mad);
  214. in_mad->attr_id = IB_SMP_ATTR_PORT_INFO;
  215. in_mad->attr_mod = cpu_to_be32(port);
  216. if (mlx4_is_mfunc(to_mdev(ibdev)->dev) && netw_view)
  217. mad_ifc_flags |= MLX4_MAD_IFC_NET_VIEW;
  218. err = mlx4_MAD_IFC(to_mdev(ibdev), mad_ifc_flags, port, NULL, NULL,
  219. in_mad, out_mad);
  220. if (err)
  221. goto out;
  222. props->lid = be16_to_cpup((__be16 *) (out_mad->data + 16));
  223. props->lmc = out_mad->data[34] & 0x7;
  224. props->sm_lid = be16_to_cpup((__be16 *) (out_mad->data + 18));
  225. props->sm_sl = out_mad->data[36] & 0xf;
  226. props->state = out_mad->data[32] & 0xf;
  227. props->phys_state = out_mad->data[33] >> 4;
  228. props->port_cap_flags = be32_to_cpup((__be32 *) (out_mad->data + 20));
  229. if (netw_view)
  230. props->gid_tbl_len = out_mad->data[50];
  231. else
  232. props->gid_tbl_len = to_mdev(ibdev)->dev->caps.gid_table_len[port];
  233. props->max_msg_sz = to_mdev(ibdev)->dev->caps.max_msg_sz;
  234. props->pkey_tbl_len = to_mdev(ibdev)->dev->caps.pkey_table_len[port];
  235. props->bad_pkey_cntr = be16_to_cpup((__be16 *) (out_mad->data + 46));
  236. props->qkey_viol_cntr = be16_to_cpup((__be16 *) (out_mad->data + 48));
  237. props->active_width = out_mad->data[31] & 0xf;
  238. props->active_speed = out_mad->data[35] >> 4;
  239. props->max_mtu = out_mad->data[41] & 0xf;
  240. props->active_mtu = out_mad->data[36] >> 4;
  241. props->subnet_timeout = out_mad->data[51] & 0x1f;
  242. props->max_vl_num = out_mad->data[37] >> 4;
  243. props->init_type_reply = out_mad->data[41] >> 4;
  244. /* Check if extended speeds (EDR/FDR/...) are supported */
  245. if (props->port_cap_flags & IB_PORT_EXTENDED_SPEEDS_SUP) {
  246. ext_active_speed = out_mad->data[62] >> 4;
  247. switch (ext_active_speed) {
  248. case 1:
  249. props->active_speed = IB_SPEED_FDR;
  250. break;
  251. case 2:
  252. props->active_speed = IB_SPEED_EDR;
  253. break;
  254. }
  255. }
  256. /* If reported active speed is QDR, check if is FDR-10 */
  257. if (props->active_speed == IB_SPEED_QDR) {
  258. init_query_mad(in_mad);
  259. in_mad->attr_id = MLX4_ATTR_EXTENDED_PORT_INFO;
  260. in_mad->attr_mod = cpu_to_be32(port);
  261. err = mlx4_MAD_IFC(to_mdev(ibdev), mad_ifc_flags, port,
  262. NULL, NULL, in_mad, out_mad);
  263. if (err)
  264. goto out;
  265. /* Checking LinkSpeedActive for FDR-10 */
  266. if (out_mad->data[15] & 0x1)
  267. props->active_speed = IB_SPEED_FDR10;
  268. }
  269. /* Avoid wrong speed value returned by FW if the IB link is down. */
  270. if (props->state == IB_PORT_DOWN)
  271. props->active_speed = IB_SPEED_SDR;
  272. out:
  273. kfree(in_mad);
  274. kfree(out_mad);
  275. return err;
  276. }
  277. static u8 state_to_phys_state(enum ib_port_state state)
  278. {
  279. return state == IB_PORT_ACTIVE ? 5 : 3;
  280. }
  281. static int eth_link_query_port(struct ib_device *ibdev, u8 port,
  282. struct ib_port_attr *props, int netw_view)
  283. {
  284. struct mlx4_ib_dev *mdev = to_mdev(ibdev);
  285. struct mlx4_ib_iboe *iboe = &mdev->iboe;
  286. struct net_device *ndev;
  287. enum ib_mtu tmp;
  288. struct mlx4_cmd_mailbox *mailbox;
  289. int err = 0;
  290. mailbox = mlx4_alloc_cmd_mailbox(mdev->dev);
  291. if (IS_ERR(mailbox))
  292. return PTR_ERR(mailbox);
  293. err = mlx4_cmd_box(mdev->dev, 0, mailbox->dma, port, 0,
  294. MLX4_CMD_QUERY_PORT, MLX4_CMD_TIME_CLASS_B,
  295. MLX4_CMD_WRAPPED);
  296. if (err)
  297. goto out;
  298. props->active_width = (((u8 *)mailbox->buf)[5] == 0x40) ?
  299. IB_WIDTH_4X : IB_WIDTH_1X;
  300. props->active_speed = IB_SPEED_QDR;
  301. props->port_cap_flags = IB_PORT_CM_SUP | IB_PORT_IP_BASED_GIDS;
  302. props->gid_tbl_len = mdev->dev->caps.gid_table_len[port];
  303. props->max_msg_sz = mdev->dev->caps.max_msg_sz;
  304. props->pkey_tbl_len = 1;
  305. props->max_mtu = IB_MTU_4096;
  306. props->max_vl_num = 2;
  307. props->state = IB_PORT_DOWN;
  308. props->phys_state = state_to_phys_state(props->state);
  309. props->active_mtu = IB_MTU_256;
  310. spin_lock(&iboe->lock);
  311. ndev = iboe->netdevs[port - 1];
  312. if (!ndev)
  313. goto out_unlock;
  314. tmp = iboe_get_mtu(ndev->mtu);
  315. props->active_mtu = tmp ? min(props->max_mtu, tmp) : IB_MTU_256;
  316. props->state = (netif_running(ndev) && netif_carrier_ok(ndev)) ?
  317. IB_PORT_ACTIVE : IB_PORT_DOWN;
  318. props->phys_state = state_to_phys_state(props->state);
  319. out_unlock:
  320. spin_unlock(&iboe->lock);
  321. out:
  322. mlx4_free_cmd_mailbox(mdev->dev, mailbox);
  323. return err;
  324. }
  325. int __mlx4_ib_query_port(struct ib_device *ibdev, u8 port,
  326. struct ib_port_attr *props, int netw_view)
  327. {
  328. int err;
  329. memset(props, 0, sizeof *props);
  330. err = mlx4_ib_port_link_layer(ibdev, port) == IB_LINK_LAYER_INFINIBAND ?
  331. ib_link_query_port(ibdev, port, props, netw_view) :
  332. eth_link_query_port(ibdev, port, props, netw_view);
  333. return err;
  334. }
  335. static int mlx4_ib_query_port(struct ib_device *ibdev, u8 port,
  336. struct ib_port_attr *props)
  337. {
  338. /* returns host view */
  339. return __mlx4_ib_query_port(ibdev, port, props, 0);
  340. }
  341. int __mlx4_ib_query_gid(struct ib_device *ibdev, u8 port, int index,
  342. union ib_gid *gid, int netw_view)
  343. {
  344. struct ib_smp *in_mad = NULL;
  345. struct ib_smp *out_mad = NULL;
  346. int err = -ENOMEM;
  347. struct mlx4_ib_dev *dev = to_mdev(ibdev);
  348. int clear = 0;
  349. int mad_ifc_flags = MLX4_MAD_IFC_IGNORE_KEYS;
  350. in_mad = kzalloc(sizeof *in_mad, GFP_KERNEL);
  351. out_mad = kmalloc(sizeof *out_mad, GFP_KERNEL);
  352. if (!in_mad || !out_mad)
  353. goto out;
  354. init_query_mad(in_mad);
  355. in_mad->attr_id = IB_SMP_ATTR_PORT_INFO;
  356. in_mad->attr_mod = cpu_to_be32(port);
  357. if (mlx4_is_mfunc(dev->dev) && netw_view)
  358. mad_ifc_flags |= MLX4_MAD_IFC_NET_VIEW;
  359. err = mlx4_MAD_IFC(dev, mad_ifc_flags, port, NULL, NULL, in_mad, out_mad);
  360. if (err)
  361. goto out;
  362. memcpy(gid->raw, out_mad->data + 8, 8);
  363. if (mlx4_is_mfunc(dev->dev) && !netw_view) {
  364. if (index) {
  365. /* For any index > 0, return the null guid */
  366. err = 0;
  367. clear = 1;
  368. goto out;
  369. }
  370. }
  371. init_query_mad(in_mad);
  372. in_mad->attr_id = IB_SMP_ATTR_GUID_INFO;
  373. in_mad->attr_mod = cpu_to_be32(index / 8);
  374. err = mlx4_MAD_IFC(dev, mad_ifc_flags, port,
  375. NULL, NULL, in_mad, out_mad);
  376. if (err)
  377. goto out;
  378. memcpy(gid->raw + 8, out_mad->data + (index % 8) * 8, 8);
  379. out:
  380. if (clear)
  381. memset(gid->raw + 8, 0, 8);
  382. kfree(in_mad);
  383. kfree(out_mad);
  384. return err;
  385. }
  386. static int iboe_query_gid(struct ib_device *ibdev, u8 port, int index,
  387. union ib_gid *gid)
  388. {
  389. struct mlx4_ib_dev *dev = to_mdev(ibdev);
  390. *gid = dev->iboe.gid_table[port - 1][index];
  391. return 0;
  392. }
  393. static int mlx4_ib_query_gid(struct ib_device *ibdev, u8 port, int index,
  394. union ib_gid *gid)
  395. {
  396. if (rdma_port_get_link_layer(ibdev, port) == IB_LINK_LAYER_INFINIBAND)
  397. return __mlx4_ib_query_gid(ibdev, port, index, gid, 0);
  398. else
  399. return iboe_query_gid(ibdev, port, index, gid);
  400. }
  401. int __mlx4_ib_query_pkey(struct ib_device *ibdev, u8 port, u16 index,
  402. u16 *pkey, int netw_view)
  403. {
  404. struct ib_smp *in_mad = NULL;
  405. struct ib_smp *out_mad = NULL;
  406. int mad_ifc_flags = MLX4_MAD_IFC_IGNORE_KEYS;
  407. int err = -ENOMEM;
  408. in_mad = kzalloc(sizeof *in_mad, GFP_KERNEL);
  409. out_mad = kmalloc(sizeof *out_mad, GFP_KERNEL);
  410. if (!in_mad || !out_mad)
  411. goto out;
  412. init_query_mad(in_mad);
  413. in_mad->attr_id = IB_SMP_ATTR_PKEY_TABLE;
  414. in_mad->attr_mod = cpu_to_be32(index / 32);
  415. if (mlx4_is_mfunc(to_mdev(ibdev)->dev) && netw_view)
  416. mad_ifc_flags |= MLX4_MAD_IFC_NET_VIEW;
  417. err = mlx4_MAD_IFC(to_mdev(ibdev), mad_ifc_flags, port, NULL, NULL,
  418. in_mad, out_mad);
  419. if (err)
  420. goto out;
  421. *pkey = be16_to_cpu(((__be16 *) out_mad->data)[index % 32]);
  422. out:
  423. kfree(in_mad);
  424. kfree(out_mad);
  425. return err;
  426. }
  427. static int mlx4_ib_query_pkey(struct ib_device *ibdev, u8 port, u16 index, u16 *pkey)
  428. {
  429. return __mlx4_ib_query_pkey(ibdev, port, index, pkey, 0);
  430. }
  431. static int mlx4_ib_modify_device(struct ib_device *ibdev, int mask,
  432. struct ib_device_modify *props)
  433. {
  434. struct mlx4_cmd_mailbox *mailbox;
  435. unsigned long flags;
  436. if (mask & ~IB_DEVICE_MODIFY_NODE_DESC)
  437. return -EOPNOTSUPP;
  438. if (!(mask & IB_DEVICE_MODIFY_NODE_DESC))
  439. return 0;
  440. if (mlx4_is_slave(to_mdev(ibdev)->dev))
  441. return -EOPNOTSUPP;
  442. spin_lock_irqsave(&to_mdev(ibdev)->sm_lock, flags);
  443. memcpy(ibdev->node_desc, props->node_desc, 64);
  444. spin_unlock_irqrestore(&to_mdev(ibdev)->sm_lock, flags);
  445. /*
  446. * If possible, pass node desc to FW, so it can generate
  447. * a 144 trap. If cmd fails, just ignore.
  448. */
  449. mailbox = mlx4_alloc_cmd_mailbox(to_mdev(ibdev)->dev);
  450. if (IS_ERR(mailbox))
  451. return 0;
  452. memcpy(mailbox->buf, props->node_desc, 64);
  453. mlx4_cmd(to_mdev(ibdev)->dev, mailbox->dma, 1, 0,
  454. MLX4_CMD_SET_NODE, MLX4_CMD_TIME_CLASS_A, MLX4_CMD_NATIVE);
  455. mlx4_free_cmd_mailbox(to_mdev(ibdev)->dev, mailbox);
  456. return 0;
  457. }
  458. static int mlx4_SET_PORT(struct mlx4_ib_dev *dev, u8 port, int reset_qkey_viols,
  459. u32 cap_mask)
  460. {
  461. struct mlx4_cmd_mailbox *mailbox;
  462. int err;
  463. u8 is_eth = dev->dev->caps.port_type[port] == MLX4_PORT_TYPE_ETH;
  464. mailbox = mlx4_alloc_cmd_mailbox(dev->dev);
  465. if (IS_ERR(mailbox))
  466. return PTR_ERR(mailbox);
  467. if (dev->dev->flags & MLX4_FLAG_OLD_PORT_CMDS) {
  468. *(u8 *) mailbox->buf = !!reset_qkey_viols << 6;
  469. ((__be32 *) mailbox->buf)[2] = cpu_to_be32(cap_mask);
  470. } else {
  471. ((u8 *) mailbox->buf)[3] = !!reset_qkey_viols;
  472. ((__be32 *) mailbox->buf)[1] = cpu_to_be32(cap_mask);
  473. }
  474. err = mlx4_cmd(dev->dev, mailbox->dma, port, is_eth, MLX4_CMD_SET_PORT,
  475. MLX4_CMD_TIME_CLASS_B, MLX4_CMD_NATIVE);
  476. mlx4_free_cmd_mailbox(dev->dev, mailbox);
  477. return err;
  478. }
  479. static int mlx4_ib_modify_port(struct ib_device *ibdev, u8 port, int mask,
  480. struct ib_port_modify *props)
  481. {
  482. struct ib_port_attr attr;
  483. u32 cap_mask;
  484. int err;
  485. mutex_lock(&to_mdev(ibdev)->cap_mask_mutex);
  486. err = mlx4_ib_query_port(ibdev, port, &attr);
  487. if (err)
  488. goto out;
  489. cap_mask = (attr.port_cap_flags | props->set_port_cap_mask) &
  490. ~props->clr_port_cap_mask;
  491. err = mlx4_SET_PORT(to_mdev(ibdev), port,
  492. !!(mask & IB_PORT_RESET_QKEY_CNTR),
  493. cap_mask);
  494. out:
  495. mutex_unlock(&to_mdev(ibdev)->cap_mask_mutex);
  496. return err;
  497. }
  498. static struct ib_ucontext *mlx4_ib_alloc_ucontext(struct ib_device *ibdev,
  499. struct ib_udata *udata)
  500. {
  501. struct mlx4_ib_dev *dev = to_mdev(ibdev);
  502. struct mlx4_ib_ucontext *context;
  503. struct mlx4_ib_alloc_ucontext_resp_v3 resp_v3;
  504. struct mlx4_ib_alloc_ucontext_resp resp;
  505. int err;
  506. if (!dev->ib_active)
  507. return ERR_PTR(-EAGAIN);
  508. if (ibdev->uverbs_abi_ver == MLX4_IB_UVERBS_NO_DEV_CAPS_ABI_VERSION) {
  509. resp_v3.qp_tab_size = dev->dev->caps.num_qps;
  510. resp_v3.bf_reg_size = dev->dev->caps.bf_reg_size;
  511. resp_v3.bf_regs_per_page = dev->dev->caps.bf_regs_per_page;
  512. } else {
  513. resp.dev_caps = dev->dev->caps.userspace_caps;
  514. resp.qp_tab_size = dev->dev->caps.num_qps;
  515. resp.bf_reg_size = dev->dev->caps.bf_reg_size;
  516. resp.bf_regs_per_page = dev->dev->caps.bf_regs_per_page;
  517. resp.cqe_size = dev->dev->caps.cqe_size;
  518. }
  519. context = kmalloc(sizeof *context, GFP_KERNEL);
  520. if (!context)
  521. return ERR_PTR(-ENOMEM);
  522. err = mlx4_uar_alloc(to_mdev(ibdev)->dev, &context->uar);
  523. if (err) {
  524. kfree(context);
  525. return ERR_PTR(err);
  526. }
  527. INIT_LIST_HEAD(&context->db_page_list);
  528. mutex_init(&context->db_page_mutex);
  529. if (ibdev->uverbs_abi_ver == MLX4_IB_UVERBS_NO_DEV_CAPS_ABI_VERSION)
  530. err = ib_copy_to_udata(udata, &resp_v3, sizeof(resp_v3));
  531. else
  532. err = ib_copy_to_udata(udata, &resp, sizeof(resp));
  533. if (err) {
  534. mlx4_uar_free(to_mdev(ibdev)->dev, &context->uar);
  535. kfree(context);
  536. return ERR_PTR(-EFAULT);
  537. }
  538. return &context->ibucontext;
  539. }
  540. static int mlx4_ib_dealloc_ucontext(struct ib_ucontext *ibcontext)
  541. {
  542. struct mlx4_ib_ucontext *context = to_mucontext(ibcontext);
  543. mlx4_uar_free(to_mdev(ibcontext->device)->dev, &context->uar);
  544. kfree(context);
  545. return 0;
  546. }
  547. static int mlx4_ib_mmap(struct ib_ucontext *context, struct vm_area_struct *vma)
  548. {
  549. struct mlx4_ib_dev *dev = to_mdev(context->device);
  550. if (vma->vm_end - vma->vm_start != PAGE_SIZE)
  551. return -EINVAL;
  552. if (vma->vm_pgoff == 0) {
  553. vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
  554. if (io_remap_pfn_range(vma, vma->vm_start,
  555. to_mucontext(context)->uar.pfn,
  556. PAGE_SIZE, vma->vm_page_prot))
  557. return -EAGAIN;
  558. } else if (vma->vm_pgoff == 1 && dev->dev->caps.bf_reg_size != 0) {
  559. vma->vm_page_prot = pgprot_writecombine(vma->vm_page_prot);
  560. if (io_remap_pfn_range(vma, vma->vm_start,
  561. to_mucontext(context)->uar.pfn +
  562. dev->dev->caps.num_uars,
  563. PAGE_SIZE, vma->vm_page_prot))
  564. return -EAGAIN;
  565. } else
  566. return -EINVAL;
  567. return 0;
  568. }
  569. static struct ib_pd *mlx4_ib_alloc_pd(struct ib_device *ibdev,
  570. struct ib_ucontext *context,
  571. struct ib_udata *udata)
  572. {
  573. struct mlx4_ib_pd *pd;
  574. int err;
  575. pd = kmalloc(sizeof *pd, GFP_KERNEL);
  576. if (!pd)
  577. return ERR_PTR(-ENOMEM);
  578. err = mlx4_pd_alloc(to_mdev(ibdev)->dev, &pd->pdn);
  579. if (err) {
  580. kfree(pd);
  581. return ERR_PTR(err);
  582. }
  583. if (context)
  584. if (ib_copy_to_udata(udata, &pd->pdn, sizeof (__u32))) {
  585. mlx4_pd_free(to_mdev(ibdev)->dev, pd->pdn);
  586. kfree(pd);
  587. return ERR_PTR(-EFAULT);
  588. }
  589. return &pd->ibpd;
  590. }
  591. static int mlx4_ib_dealloc_pd(struct ib_pd *pd)
  592. {
  593. mlx4_pd_free(to_mdev(pd->device)->dev, to_mpd(pd)->pdn);
  594. kfree(pd);
  595. return 0;
  596. }
  597. static struct ib_xrcd *mlx4_ib_alloc_xrcd(struct ib_device *ibdev,
  598. struct ib_ucontext *context,
  599. struct ib_udata *udata)
  600. {
  601. struct mlx4_ib_xrcd *xrcd;
  602. int err;
  603. if (!(to_mdev(ibdev)->dev->caps.flags & MLX4_DEV_CAP_FLAG_XRC))
  604. return ERR_PTR(-ENOSYS);
  605. xrcd = kmalloc(sizeof *xrcd, GFP_KERNEL);
  606. if (!xrcd)
  607. return ERR_PTR(-ENOMEM);
  608. err = mlx4_xrcd_alloc(to_mdev(ibdev)->dev, &xrcd->xrcdn);
  609. if (err)
  610. goto err1;
  611. xrcd->pd = ib_alloc_pd(ibdev);
  612. if (IS_ERR(xrcd->pd)) {
  613. err = PTR_ERR(xrcd->pd);
  614. goto err2;
  615. }
  616. xrcd->cq = ib_create_cq(ibdev, NULL, NULL, xrcd, 1, 0);
  617. if (IS_ERR(xrcd->cq)) {
  618. err = PTR_ERR(xrcd->cq);
  619. goto err3;
  620. }
  621. return &xrcd->ibxrcd;
  622. err3:
  623. ib_dealloc_pd(xrcd->pd);
  624. err2:
  625. mlx4_xrcd_free(to_mdev(ibdev)->dev, xrcd->xrcdn);
  626. err1:
  627. kfree(xrcd);
  628. return ERR_PTR(err);
  629. }
  630. static int mlx4_ib_dealloc_xrcd(struct ib_xrcd *xrcd)
  631. {
  632. ib_destroy_cq(to_mxrcd(xrcd)->cq);
  633. ib_dealloc_pd(to_mxrcd(xrcd)->pd);
  634. mlx4_xrcd_free(to_mdev(xrcd->device)->dev, to_mxrcd(xrcd)->xrcdn);
  635. kfree(xrcd);
  636. return 0;
  637. }
  638. static int add_gid_entry(struct ib_qp *ibqp, union ib_gid *gid)
  639. {
  640. struct mlx4_ib_qp *mqp = to_mqp(ibqp);
  641. struct mlx4_ib_dev *mdev = to_mdev(ibqp->device);
  642. struct mlx4_ib_gid_entry *ge;
  643. ge = kzalloc(sizeof *ge, GFP_KERNEL);
  644. if (!ge)
  645. return -ENOMEM;
  646. ge->gid = *gid;
  647. if (mlx4_ib_add_mc(mdev, mqp, gid)) {
  648. ge->port = mqp->port;
  649. ge->added = 1;
  650. }
  651. mutex_lock(&mqp->mutex);
  652. list_add_tail(&ge->list, &mqp->gid_list);
  653. mutex_unlock(&mqp->mutex);
  654. return 0;
  655. }
  656. int mlx4_ib_add_mc(struct mlx4_ib_dev *mdev, struct mlx4_ib_qp *mqp,
  657. union ib_gid *gid)
  658. {
  659. struct net_device *ndev;
  660. int ret = 0;
  661. if (!mqp->port)
  662. return 0;
  663. spin_lock(&mdev->iboe.lock);
  664. ndev = mdev->iboe.netdevs[mqp->port - 1];
  665. if (ndev)
  666. dev_hold(ndev);
  667. spin_unlock(&mdev->iboe.lock);
  668. if (ndev) {
  669. ret = 1;
  670. dev_put(ndev);
  671. }
  672. return ret;
  673. }
  674. struct mlx4_ib_steering {
  675. struct list_head list;
  676. u64 reg_id;
  677. union ib_gid gid;
  678. };
  679. static int parse_flow_attr(struct mlx4_dev *dev,
  680. u32 qp_num,
  681. union ib_flow_spec *ib_spec,
  682. struct _rule_hw *mlx4_spec)
  683. {
  684. enum mlx4_net_trans_rule_id type;
  685. switch (ib_spec->type) {
  686. case IB_FLOW_SPEC_ETH:
  687. type = MLX4_NET_TRANS_RULE_ID_ETH;
  688. memcpy(mlx4_spec->eth.dst_mac, ib_spec->eth.val.dst_mac,
  689. ETH_ALEN);
  690. memcpy(mlx4_spec->eth.dst_mac_msk, ib_spec->eth.mask.dst_mac,
  691. ETH_ALEN);
  692. mlx4_spec->eth.vlan_tag = ib_spec->eth.val.vlan_tag;
  693. mlx4_spec->eth.vlan_tag_msk = ib_spec->eth.mask.vlan_tag;
  694. break;
  695. case IB_FLOW_SPEC_IB:
  696. type = MLX4_NET_TRANS_RULE_ID_IB;
  697. mlx4_spec->ib.l3_qpn =
  698. cpu_to_be32(qp_num);
  699. mlx4_spec->ib.qpn_mask =
  700. cpu_to_be32(MLX4_IB_FLOW_QPN_MASK);
  701. break;
  702. case IB_FLOW_SPEC_IPV4:
  703. type = MLX4_NET_TRANS_RULE_ID_IPV4;
  704. mlx4_spec->ipv4.src_ip = ib_spec->ipv4.val.src_ip;
  705. mlx4_spec->ipv4.src_ip_msk = ib_spec->ipv4.mask.src_ip;
  706. mlx4_spec->ipv4.dst_ip = ib_spec->ipv4.val.dst_ip;
  707. mlx4_spec->ipv4.dst_ip_msk = ib_spec->ipv4.mask.dst_ip;
  708. break;
  709. case IB_FLOW_SPEC_TCP:
  710. case IB_FLOW_SPEC_UDP:
  711. type = ib_spec->type == IB_FLOW_SPEC_TCP ?
  712. MLX4_NET_TRANS_RULE_ID_TCP :
  713. MLX4_NET_TRANS_RULE_ID_UDP;
  714. mlx4_spec->tcp_udp.dst_port = ib_spec->tcp_udp.val.dst_port;
  715. mlx4_spec->tcp_udp.dst_port_msk = ib_spec->tcp_udp.mask.dst_port;
  716. mlx4_spec->tcp_udp.src_port = ib_spec->tcp_udp.val.src_port;
  717. mlx4_spec->tcp_udp.src_port_msk = ib_spec->tcp_udp.mask.src_port;
  718. break;
  719. default:
  720. return -EINVAL;
  721. }
  722. if (mlx4_map_sw_to_hw_steering_id(dev, type) < 0 ||
  723. mlx4_hw_rule_sz(dev, type) < 0)
  724. return -EINVAL;
  725. mlx4_spec->id = cpu_to_be16(mlx4_map_sw_to_hw_steering_id(dev, type));
  726. mlx4_spec->size = mlx4_hw_rule_sz(dev, type) >> 2;
  727. return mlx4_hw_rule_sz(dev, type);
  728. }
  729. struct default_rules {
  730. __u32 mandatory_fields[IB_FLOW_SPEC_SUPPORT_LAYERS];
  731. __u32 mandatory_not_fields[IB_FLOW_SPEC_SUPPORT_LAYERS];
  732. __u32 rules_create_list[IB_FLOW_SPEC_SUPPORT_LAYERS];
  733. __u8 link_layer;
  734. };
  735. static const struct default_rules default_table[] = {
  736. {
  737. .mandatory_fields = {IB_FLOW_SPEC_IPV4},
  738. .mandatory_not_fields = {IB_FLOW_SPEC_ETH},
  739. .rules_create_list = {IB_FLOW_SPEC_IB},
  740. .link_layer = IB_LINK_LAYER_INFINIBAND
  741. }
  742. };
  743. static int __mlx4_ib_default_rules_match(struct ib_qp *qp,
  744. struct ib_flow_attr *flow_attr)
  745. {
  746. int i, j, k;
  747. void *ib_flow;
  748. const struct default_rules *pdefault_rules = default_table;
  749. u8 link_layer = rdma_port_get_link_layer(qp->device, flow_attr->port);
  750. for (i = 0; i < sizeof(default_table)/sizeof(default_table[0]); i++,
  751. pdefault_rules++) {
  752. __u32 field_types[IB_FLOW_SPEC_SUPPORT_LAYERS];
  753. memset(&field_types, 0, sizeof(field_types));
  754. if (link_layer != pdefault_rules->link_layer)
  755. continue;
  756. ib_flow = flow_attr + 1;
  757. /* we assume the specs are sorted */
  758. for (j = 0, k = 0; k < IB_FLOW_SPEC_SUPPORT_LAYERS &&
  759. j < flow_attr->num_of_specs; k++) {
  760. union ib_flow_spec *current_flow =
  761. (union ib_flow_spec *)ib_flow;
  762. /* same layer but different type */
  763. if (((current_flow->type & IB_FLOW_SPEC_LAYER_MASK) ==
  764. (pdefault_rules->mandatory_fields[k] &
  765. IB_FLOW_SPEC_LAYER_MASK)) &&
  766. (current_flow->type !=
  767. pdefault_rules->mandatory_fields[k]))
  768. goto out;
  769. /* same layer, try match next one */
  770. if (current_flow->type ==
  771. pdefault_rules->mandatory_fields[k]) {
  772. j++;
  773. ib_flow +=
  774. ((union ib_flow_spec *)ib_flow)->size;
  775. }
  776. }
  777. ib_flow = flow_attr + 1;
  778. for (j = 0; j < flow_attr->num_of_specs;
  779. j++, ib_flow += ((union ib_flow_spec *)ib_flow)->size)
  780. for (k = 0; k < IB_FLOW_SPEC_SUPPORT_LAYERS; k++)
  781. /* same layer and same type */
  782. if (((union ib_flow_spec *)ib_flow)->type ==
  783. pdefault_rules->mandatory_not_fields[k])
  784. goto out;
  785. return i;
  786. }
  787. out:
  788. return -1;
  789. }
  790. static int __mlx4_ib_create_default_rules(
  791. struct mlx4_ib_dev *mdev,
  792. struct ib_qp *qp,
  793. const struct default_rules *pdefault_rules,
  794. struct _rule_hw *mlx4_spec) {
  795. int size = 0;
  796. int i;
  797. for (i = 0; i < sizeof(pdefault_rules->rules_create_list)/
  798. sizeof(pdefault_rules->rules_create_list[0]); i++) {
  799. int ret;
  800. union ib_flow_spec ib_spec;
  801. switch (pdefault_rules->rules_create_list[i]) {
  802. case 0:
  803. /* no rule */
  804. continue;
  805. case IB_FLOW_SPEC_IB:
  806. ib_spec.type = IB_FLOW_SPEC_IB;
  807. ib_spec.size = sizeof(struct ib_flow_spec_ib);
  808. break;
  809. default:
  810. /* invalid rule */
  811. return -EINVAL;
  812. }
  813. /* We must put empty rule, qpn is being ignored */
  814. ret = parse_flow_attr(mdev->dev, 0, &ib_spec,
  815. mlx4_spec);
  816. if (ret < 0) {
  817. pr_info("invalid parsing\n");
  818. return -EINVAL;
  819. }
  820. mlx4_spec = (void *)mlx4_spec + ret;
  821. size += ret;
  822. }
  823. return size;
  824. }
  825. static int __mlx4_ib_create_flow(struct ib_qp *qp, struct ib_flow_attr *flow_attr,
  826. int domain,
  827. enum mlx4_net_trans_promisc_mode flow_type,
  828. u64 *reg_id)
  829. {
  830. int ret, i;
  831. int size = 0;
  832. void *ib_flow;
  833. struct mlx4_ib_dev *mdev = to_mdev(qp->device);
  834. struct mlx4_cmd_mailbox *mailbox;
  835. struct mlx4_net_trans_rule_hw_ctrl *ctrl;
  836. int default_flow;
  837. static const u16 __mlx4_domain[] = {
  838. [IB_FLOW_DOMAIN_USER] = MLX4_DOMAIN_UVERBS,
  839. [IB_FLOW_DOMAIN_ETHTOOL] = MLX4_DOMAIN_ETHTOOL,
  840. [IB_FLOW_DOMAIN_RFS] = MLX4_DOMAIN_RFS,
  841. [IB_FLOW_DOMAIN_NIC] = MLX4_DOMAIN_NIC,
  842. };
  843. if (flow_attr->priority > MLX4_IB_FLOW_MAX_PRIO) {
  844. pr_err("Invalid priority value %d\n", flow_attr->priority);
  845. return -EINVAL;
  846. }
  847. if (domain >= IB_FLOW_DOMAIN_NUM) {
  848. pr_err("Invalid domain value %d\n", domain);
  849. return -EINVAL;
  850. }
  851. if (mlx4_map_sw_to_hw_steering_mode(mdev->dev, flow_type) < 0)
  852. return -EINVAL;
  853. mailbox = mlx4_alloc_cmd_mailbox(mdev->dev);
  854. if (IS_ERR(mailbox))
  855. return PTR_ERR(mailbox);
  856. ctrl = mailbox->buf;
  857. ctrl->prio = cpu_to_be16(__mlx4_domain[domain] |
  858. flow_attr->priority);
  859. ctrl->type = mlx4_map_sw_to_hw_steering_mode(mdev->dev, flow_type);
  860. ctrl->port = flow_attr->port;
  861. ctrl->qpn = cpu_to_be32(qp->qp_num);
  862. ib_flow = flow_attr + 1;
  863. size += sizeof(struct mlx4_net_trans_rule_hw_ctrl);
  864. /* Add default flows */
  865. default_flow = __mlx4_ib_default_rules_match(qp, flow_attr);
  866. if (default_flow >= 0) {
  867. ret = __mlx4_ib_create_default_rules(
  868. mdev, qp, default_table + default_flow,
  869. mailbox->buf + size);
  870. if (ret < 0) {
  871. mlx4_free_cmd_mailbox(mdev->dev, mailbox);
  872. return -EINVAL;
  873. }
  874. size += ret;
  875. }
  876. for (i = 0; i < flow_attr->num_of_specs; i++) {
  877. ret = parse_flow_attr(mdev->dev, qp->qp_num, ib_flow,
  878. mailbox->buf + size);
  879. if (ret < 0) {
  880. mlx4_free_cmd_mailbox(mdev->dev, mailbox);
  881. return -EINVAL;
  882. }
  883. ib_flow += ((union ib_flow_spec *) ib_flow)->size;
  884. size += ret;
  885. }
  886. ret = mlx4_cmd_imm(mdev->dev, mailbox->dma, reg_id, size >> 2, 0,
  887. MLX4_QP_FLOW_STEERING_ATTACH, MLX4_CMD_TIME_CLASS_A,
  888. MLX4_CMD_NATIVE);
  889. if (ret == -ENOMEM)
  890. pr_err("mcg table is full. Fail to register network rule.\n");
  891. else if (ret == -ENXIO)
  892. pr_err("Device managed flow steering is disabled. Fail to register network rule.\n");
  893. else if (ret)
  894. pr_err("Invalid argumant. Fail to register network rule.\n");
  895. mlx4_free_cmd_mailbox(mdev->dev, mailbox);
  896. return ret;
  897. }
  898. static int __mlx4_ib_destroy_flow(struct mlx4_dev *dev, u64 reg_id)
  899. {
  900. int err;
  901. err = mlx4_cmd(dev, reg_id, 0, 0,
  902. MLX4_QP_FLOW_STEERING_DETACH, MLX4_CMD_TIME_CLASS_A,
  903. MLX4_CMD_NATIVE);
  904. if (err)
  905. pr_err("Fail to detach network rule. registration id = 0x%llx\n",
  906. reg_id);
  907. return err;
  908. }
  909. static struct ib_flow *mlx4_ib_create_flow(struct ib_qp *qp,
  910. struct ib_flow_attr *flow_attr,
  911. int domain)
  912. {
  913. int err = 0, i = 0;
  914. struct mlx4_ib_flow *mflow;
  915. enum mlx4_net_trans_promisc_mode type[2];
  916. memset(type, 0, sizeof(type));
  917. mflow = kzalloc(sizeof(*mflow), GFP_KERNEL);
  918. if (!mflow) {
  919. err = -ENOMEM;
  920. goto err_free;
  921. }
  922. switch (flow_attr->type) {
  923. case IB_FLOW_ATTR_NORMAL:
  924. type[0] = MLX4_FS_REGULAR;
  925. break;
  926. case IB_FLOW_ATTR_ALL_DEFAULT:
  927. type[0] = MLX4_FS_ALL_DEFAULT;
  928. break;
  929. case IB_FLOW_ATTR_MC_DEFAULT:
  930. type[0] = MLX4_FS_MC_DEFAULT;
  931. break;
  932. case IB_FLOW_ATTR_SNIFFER:
  933. type[0] = MLX4_FS_UC_SNIFFER;
  934. type[1] = MLX4_FS_MC_SNIFFER;
  935. break;
  936. default:
  937. err = -EINVAL;
  938. goto err_free;
  939. }
  940. while (i < ARRAY_SIZE(type) && type[i]) {
  941. err = __mlx4_ib_create_flow(qp, flow_attr, domain, type[i],
  942. &mflow->reg_id[i]);
  943. if (err)
  944. goto err_free;
  945. i++;
  946. }
  947. return &mflow->ibflow;
  948. err_free:
  949. kfree(mflow);
  950. return ERR_PTR(err);
  951. }
  952. static int mlx4_ib_destroy_flow(struct ib_flow *flow_id)
  953. {
  954. int err, ret = 0;
  955. int i = 0;
  956. struct mlx4_ib_dev *mdev = to_mdev(flow_id->qp->device);
  957. struct mlx4_ib_flow *mflow = to_mflow(flow_id);
  958. while (i < ARRAY_SIZE(mflow->reg_id) && mflow->reg_id[i]) {
  959. err = __mlx4_ib_destroy_flow(mdev->dev, mflow->reg_id[i]);
  960. if (err)
  961. ret = err;
  962. i++;
  963. }
  964. kfree(mflow);
  965. return ret;
  966. }
  967. static int mlx4_ib_mcg_attach(struct ib_qp *ibqp, union ib_gid *gid, u16 lid)
  968. {
  969. int err;
  970. struct mlx4_ib_dev *mdev = to_mdev(ibqp->device);
  971. struct mlx4_ib_qp *mqp = to_mqp(ibqp);
  972. u64 reg_id;
  973. struct mlx4_ib_steering *ib_steering = NULL;
  974. enum mlx4_protocol prot = (gid->raw[1] == 0x0e) ?
  975. MLX4_PROT_IB_IPV4 : MLX4_PROT_IB_IPV6;
  976. if (mdev->dev->caps.steering_mode ==
  977. MLX4_STEERING_MODE_DEVICE_MANAGED) {
  978. ib_steering = kmalloc(sizeof(*ib_steering), GFP_KERNEL);
  979. if (!ib_steering)
  980. return -ENOMEM;
  981. }
  982. err = mlx4_multicast_attach(mdev->dev, &mqp->mqp, gid->raw, mqp->port,
  983. !!(mqp->flags &
  984. MLX4_IB_QP_BLOCK_MULTICAST_LOOPBACK),
  985. prot, &reg_id);
  986. if (err)
  987. goto err_malloc;
  988. err = add_gid_entry(ibqp, gid);
  989. if (err)
  990. goto err_add;
  991. if (ib_steering) {
  992. memcpy(ib_steering->gid.raw, gid->raw, 16);
  993. ib_steering->reg_id = reg_id;
  994. mutex_lock(&mqp->mutex);
  995. list_add(&ib_steering->list, &mqp->steering_rules);
  996. mutex_unlock(&mqp->mutex);
  997. }
  998. return 0;
  999. err_add:
  1000. mlx4_multicast_detach(mdev->dev, &mqp->mqp, gid->raw,
  1001. prot, reg_id);
  1002. err_malloc:
  1003. kfree(ib_steering);
  1004. return err;
  1005. }
  1006. static struct mlx4_ib_gid_entry *find_gid_entry(struct mlx4_ib_qp *qp, u8 *raw)
  1007. {
  1008. struct mlx4_ib_gid_entry *ge;
  1009. struct mlx4_ib_gid_entry *tmp;
  1010. struct mlx4_ib_gid_entry *ret = NULL;
  1011. list_for_each_entry_safe(ge, tmp, &qp->gid_list, list) {
  1012. if (!memcmp(raw, ge->gid.raw, 16)) {
  1013. ret = ge;
  1014. break;
  1015. }
  1016. }
  1017. return ret;
  1018. }
  1019. static int mlx4_ib_mcg_detach(struct ib_qp *ibqp, union ib_gid *gid, u16 lid)
  1020. {
  1021. int err;
  1022. struct mlx4_ib_dev *mdev = to_mdev(ibqp->device);
  1023. struct mlx4_ib_qp *mqp = to_mqp(ibqp);
  1024. struct net_device *ndev;
  1025. struct mlx4_ib_gid_entry *ge;
  1026. u64 reg_id = 0;
  1027. enum mlx4_protocol prot = (gid->raw[1] == 0x0e) ?
  1028. MLX4_PROT_IB_IPV4 : MLX4_PROT_IB_IPV6;
  1029. if (mdev->dev->caps.steering_mode ==
  1030. MLX4_STEERING_MODE_DEVICE_MANAGED) {
  1031. struct mlx4_ib_steering *ib_steering;
  1032. mutex_lock(&mqp->mutex);
  1033. list_for_each_entry(ib_steering, &mqp->steering_rules, list) {
  1034. if (!memcmp(ib_steering->gid.raw, gid->raw, 16)) {
  1035. list_del(&ib_steering->list);
  1036. break;
  1037. }
  1038. }
  1039. mutex_unlock(&mqp->mutex);
  1040. if (&ib_steering->list == &mqp->steering_rules) {
  1041. pr_err("Couldn't find reg_id for mgid. Steering rule is left attached\n");
  1042. return -EINVAL;
  1043. }
  1044. reg_id = ib_steering->reg_id;
  1045. kfree(ib_steering);
  1046. }
  1047. err = mlx4_multicast_detach(mdev->dev, &mqp->mqp, gid->raw,
  1048. prot, reg_id);
  1049. if (err)
  1050. return err;
  1051. mutex_lock(&mqp->mutex);
  1052. ge = find_gid_entry(mqp, gid->raw);
  1053. if (ge) {
  1054. spin_lock(&mdev->iboe.lock);
  1055. ndev = ge->added ? mdev->iboe.netdevs[ge->port - 1] : NULL;
  1056. if (ndev)
  1057. dev_hold(ndev);
  1058. spin_unlock(&mdev->iboe.lock);
  1059. if (ndev)
  1060. dev_put(ndev);
  1061. list_del(&ge->list);
  1062. kfree(ge);
  1063. } else
  1064. pr_warn("could not find mgid entry\n");
  1065. mutex_unlock(&mqp->mutex);
  1066. return 0;
  1067. }
  1068. static int init_node_data(struct mlx4_ib_dev *dev)
  1069. {
  1070. struct ib_smp *in_mad = NULL;
  1071. struct ib_smp *out_mad = NULL;
  1072. int mad_ifc_flags = MLX4_MAD_IFC_IGNORE_KEYS;
  1073. int err = -ENOMEM;
  1074. in_mad = kzalloc(sizeof *in_mad, GFP_KERNEL);
  1075. out_mad = kmalloc(sizeof *out_mad, GFP_KERNEL);
  1076. if (!in_mad || !out_mad)
  1077. goto out;
  1078. init_query_mad(in_mad);
  1079. in_mad->attr_id = IB_SMP_ATTR_NODE_DESC;
  1080. if (mlx4_is_master(dev->dev))
  1081. mad_ifc_flags |= MLX4_MAD_IFC_NET_VIEW;
  1082. err = mlx4_MAD_IFC(dev, mad_ifc_flags, 1, NULL, NULL, in_mad, out_mad);
  1083. if (err)
  1084. goto out;
  1085. memcpy(dev->ib_dev.node_desc, out_mad->data, 64);
  1086. in_mad->attr_id = IB_SMP_ATTR_NODE_INFO;
  1087. err = mlx4_MAD_IFC(dev, mad_ifc_flags, 1, NULL, NULL, in_mad, out_mad);
  1088. if (err)
  1089. goto out;
  1090. dev->dev->rev_id = be32_to_cpup((__be32 *) (out_mad->data + 32));
  1091. memcpy(&dev->ib_dev.node_guid, out_mad->data + 12, 8);
  1092. out:
  1093. kfree(in_mad);
  1094. kfree(out_mad);
  1095. return err;
  1096. }
  1097. static ssize_t show_hca(struct device *device, struct device_attribute *attr,
  1098. char *buf)
  1099. {
  1100. struct mlx4_ib_dev *dev =
  1101. container_of(device, struct mlx4_ib_dev, ib_dev.dev);
  1102. return sprintf(buf, "MT%d\n", dev->dev->pdev->device);
  1103. }
  1104. static ssize_t show_fw_ver(struct device *device, struct device_attribute *attr,
  1105. char *buf)
  1106. {
  1107. struct mlx4_ib_dev *dev =
  1108. container_of(device, struct mlx4_ib_dev, ib_dev.dev);
  1109. return sprintf(buf, "%d.%d.%d\n", (int) (dev->dev->caps.fw_ver >> 32),
  1110. (int) (dev->dev->caps.fw_ver >> 16) & 0xffff,
  1111. (int) dev->dev->caps.fw_ver & 0xffff);
  1112. }
  1113. static ssize_t show_rev(struct device *device, struct device_attribute *attr,
  1114. char *buf)
  1115. {
  1116. struct mlx4_ib_dev *dev =
  1117. container_of(device, struct mlx4_ib_dev, ib_dev.dev);
  1118. return sprintf(buf, "%x\n", dev->dev->rev_id);
  1119. }
  1120. static ssize_t show_board(struct device *device, struct device_attribute *attr,
  1121. char *buf)
  1122. {
  1123. struct mlx4_ib_dev *dev =
  1124. container_of(device, struct mlx4_ib_dev, ib_dev.dev);
  1125. return sprintf(buf, "%.*s\n", MLX4_BOARD_ID_LEN,
  1126. dev->dev->board_id);
  1127. }
  1128. static DEVICE_ATTR(hw_rev, S_IRUGO, show_rev, NULL);
  1129. static DEVICE_ATTR(fw_ver, S_IRUGO, show_fw_ver, NULL);
  1130. static DEVICE_ATTR(hca_type, S_IRUGO, show_hca, NULL);
  1131. static DEVICE_ATTR(board_id, S_IRUGO, show_board, NULL);
  1132. static struct device_attribute *mlx4_class_attributes[] = {
  1133. &dev_attr_hw_rev,
  1134. &dev_attr_fw_ver,
  1135. &dev_attr_hca_type,
  1136. &dev_attr_board_id
  1137. };
  1138. static void mlx4_addrconf_ifid_eui48(u8 *eui, u16 vlan_id,
  1139. struct net_device *dev)
  1140. {
  1141. memcpy(eui, dev->dev_addr, 3);
  1142. memcpy(eui + 5, dev->dev_addr + 3, 3);
  1143. if (vlan_id < 0x1000) {
  1144. eui[3] = vlan_id >> 8;
  1145. eui[4] = vlan_id & 0xff;
  1146. } else {
  1147. eui[3] = 0xff;
  1148. eui[4] = 0xfe;
  1149. }
  1150. eui[0] ^= 2;
  1151. }
  1152. static void update_gids_task(struct work_struct *work)
  1153. {
  1154. struct update_gid_work *gw = container_of(work, struct update_gid_work, work);
  1155. struct mlx4_cmd_mailbox *mailbox;
  1156. union ib_gid *gids;
  1157. int err;
  1158. struct mlx4_dev *dev = gw->dev->dev;
  1159. mailbox = mlx4_alloc_cmd_mailbox(dev);
  1160. if (IS_ERR(mailbox)) {
  1161. pr_warn("update gid table failed %ld\n", PTR_ERR(mailbox));
  1162. return;
  1163. }
  1164. gids = mailbox->buf;
  1165. memcpy(gids, gw->gids, sizeof gw->gids);
  1166. err = mlx4_cmd(dev, mailbox->dma, MLX4_SET_PORT_GID_TABLE << 8 | gw->port,
  1167. 1, MLX4_CMD_SET_PORT, MLX4_CMD_TIME_CLASS_B,
  1168. MLX4_CMD_WRAPPED);
  1169. if (err)
  1170. pr_warn("set port command failed\n");
  1171. else
  1172. mlx4_ib_dispatch_event(gw->dev, gw->port, IB_EVENT_GID_CHANGE);
  1173. mlx4_free_cmd_mailbox(dev, mailbox);
  1174. kfree(gw);
  1175. }
  1176. static void reset_gids_task(struct work_struct *work)
  1177. {
  1178. struct update_gid_work *gw =
  1179. container_of(work, struct update_gid_work, work);
  1180. struct mlx4_cmd_mailbox *mailbox;
  1181. union ib_gid *gids;
  1182. int err;
  1183. struct mlx4_dev *dev = gw->dev->dev;
  1184. mailbox = mlx4_alloc_cmd_mailbox(dev);
  1185. if (IS_ERR(mailbox)) {
  1186. pr_warn("reset gid table failed\n");
  1187. goto free;
  1188. }
  1189. gids = mailbox->buf;
  1190. memcpy(gids, gw->gids, sizeof(gw->gids));
  1191. if (mlx4_ib_port_link_layer(&gw->dev->ib_dev, gw->port) ==
  1192. IB_LINK_LAYER_ETHERNET) {
  1193. err = mlx4_cmd(dev, mailbox->dma,
  1194. MLX4_SET_PORT_GID_TABLE << 8 | gw->port,
  1195. 1, MLX4_CMD_SET_PORT,
  1196. MLX4_CMD_TIME_CLASS_B,
  1197. MLX4_CMD_WRAPPED);
  1198. if (err)
  1199. pr_warn(KERN_WARNING
  1200. "set port %d command failed\n", gw->port);
  1201. }
  1202. mlx4_free_cmd_mailbox(dev, mailbox);
  1203. free:
  1204. kfree(gw);
  1205. }
  1206. static int update_gid_table(struct mlx4_ib_dev *dev, int port,
  1207. union ib_gid *gid, int clear,
  1208. int default_gid)
  1209. {
  1210. struct update_gid_work *work;
  1211. int i;
  1212. int need_update = 0;
  1213. int free = -1;
  1214. int found = -1;
  1215. int max_gids;
  1216. if (default_gid) {
  1217. free = 0;
  1218. } else {
  1219. max_gids = dev->dev->caps.gid_table_len[port];
  1220. for (i = 1; i < max_gids; ++i) {
  1221. if (!memcmp(&dev->iboe.gid_table[port - 1][i], gid,
  1222. sizeof(*gid)))
  1223. found = i;
  1224. if (clear) {
  1225. if (found >= 0) {
  1226. need_update = 1;
  1227. dev->iboe.gid_table[port - 1][found] =
  1228. zgid;
  1229. break;
  1230. }
  1231. } else {
  1232. if (found >= 0)
  1233. break;
  1234. if (free < 0 &&
  1235. !memcmp(&dev->iboe.gid_table[port - 1][i],
  1236. &zgid, sizeof(*gid)))
  1237. free = i;
  1238. }
  1239. }
  1240. }
  1241. if (found == -1 && !clear && free >= 0) {
  1242. dev->iboe.gid_table[port - 1][free] = *gid;
  1243. need_update = 1;
  1244. }
  1245. if (!need_update)
  1246. return 0;
  1247. work = kzalloc(sizeof(*work), GFP_ATOMIC);
  1248. if (!work)
  1249. return -ENOMEM;
  1250. memcpy(work->gids, dev->iboe.gid_table[port - 1], sizeof(work->gids));
  1251. INIT_WORK(&work->work, update_gids_task);
  1252. work->port = port;
  1253. work->dev = dev;
  1254. queue_work(wq, &work->work);
  1255. return 0;
  1256. }
  1257. static void mlx4_make_default_gid(struct net_device *dev, union ib_gid *gid)
  1258. {
  1259. gid->global.subnet_prefix = cpu_to_be64(0xfe80000000000000LL);
  1260. mlx4_addrconf_ifid_eui48(&gid->raw[8], 0xffff, dev);
  1261. }
  1262. static int reset_gid_table(struct mlx4_ib_dev *dev, u8 port)
  1263. {
  1264. struct update_gid_work *work;
  1265. work = kzalloc(sizeof(*work), GFP_ATOMIC);
  1266. if (!work)
  1267. return -ENOMEM;
  1268. memset(dev->iboe.gid_table[port - 1], 0, sizeof(work->gids));
  1269. memset(work->gids, 0, sizeof(work->gids));
  1270. INIT_WORK(&work->work, reset_gids_task);
  1271. work->dev = dev;
  1272. work->port = port;
  1273. queue_work(wq, &work->work);
  1274. return 0;
  1275. }
  1276. static int mlx4_ib_addr_event(int event, struct net_device *event_netdev,
  1277. struct mlx4_ib_dev *ibdev, union ib_gid *gid)
  1278. {
  1279. struct mlx4_ib_iboe *iboe;
  1280. int port = 0;
  1281. struct net_device *real_dev = rdma_vlan_dev_real_dev(event_netdev) ?
  1282. rdma_vlan_dev_real_dev(event_netdev) :
  1283. event_netdev;
  1284. union ib_gid default_gid;
  1285. mlx4_make_default_gid(real_dev, &default_gid);
  1286. if (!memcmp(gid, &default_gid, sizeof(*gid)))
  1287. return 0;
  1288. if (event != NETDEV_DOWN && event != NETDEV_UP)
  1289. return 0;
  1290. if ((real_dev != event_netdev) &&
  1291. (event == NETDEV_DOWN) &&
  1292. rdma_link_local_addr((struct in6_addr *)gid))
  1293. return 0;
  1294. iboe = &ibdev->iboe;
  1295. spin_lock(&iboe->lock);
  1296. for (port = 1; port <= MLX4_MAX_PORTS; ++port)
  1297. if ((netif_is_bond_master(real_dev) &&
  1298. (real_dev == iboe->masters[port - 1])) ||
  1299. (!netif_is_bond_master(real_dev) &&
  1300. (real_dev == iboe->netdevs[port - 1])))
  1301. update_gid_table(ibdev, port, gid,
  1302. event == NETDEV_DOWN, 0);
  1303. spin_unlock(&iboe->lock);
  1304. return 0;
  1305. }
  1306. static u8 mlx4_ib_get_dev_port(struct net_device *dev,
  1307. struct mlx4_ib_dev *ibdev)
  1308. {
  1309. u8 port = 0;
  1310. struct mlx4_ib_iboe *iboe;
  1311. struct net_device *real_dev = rdma_vlan_dev_real_dev(dev) ?
  1312. rdma_vlan_dev_real_dev(dev) : dev;
  1313. iboe = &ibdev->iboe;
  1314. for (port = 1; port <= MLX4_MAX_PORTS; ++port)
  1315. if ((netif_is_bond_master(real_dev) &&
  1316. (real_dev == iboe->masters[port - 1])) ||
  1317. (!netif_is_bond_master(real_dev) &&
  1318. (real_dev == iboe->netdevs[port - 1])))
  1319. break;
  1320. if ((port == 0) || (port > MLX4_MAX_PORTS))
  1321. return 0;
  1322. else
  1323. return port;
  1324. }
  1325. static int mlx4_ib_inet_event(struct notifier_block *this, unsigned long event,
  1326. void *ptr)
  1327. {
  1328. struct mlx4_ib_dev *ibdev;
  1329. struct in_ifaddr *ifa = ptr;
  1330. union ib_gid gid;
  1331. struct net_device *event_netdev = ifa->ifa_dev->dev;
  1332. ipv6_addr_set_v4mapped(ifa->ifa_address, (struct in6_addr *)&gid);
  1333. ibdev = container_of(this, struct mlx4_ib_dev, iboe.nb_inet);
  1334. mlx4_ib_addr_event(event, event_netdev, ibdev, &gid);
  1335. return NOTIFY_DONE;
  1336. }
  1337. #if IS_ENABLED(CONFIG_IPV6)
  1338. static int mlx4_ib_inet6_event(struct notifier_block *this, unsigned long event,
  1339. void *ptr)
  1340. {
  1341. struct mlx4_ib_dev *ibdev;
  1342. struct inet6_ifaddr *ifa = ptr;
  1343. union ib_gid *gid = (union ib_gid *)&ifa->addr;
  1344. struct net_device *event_netdev = ifa->idev->dev;
  1345. ibdev = container_of(this, struct mlx4_ib_dev, iboe.nb_inet6);
  1346. mlx4_ib_addr_event(event, event_netdev, ibdev, gid);
  1347. return NOTIFY_DONE;
  1348. }
  1349. #endif
  1350. static void mlx4_ib_get_dev_addr(struct net_device *dev,
  1351. struct mlx4_ib_dev *ibdev, u8 port)
  1352. {
  1353. struct in_device *in_dev;
  1354. #if IS_ENABLED(CONFIG_IPV6)
  1355. struct inet6_dev *in6_dev;
  1356. union ib_gid *pgid;
  1357. struct inet6_ifaddr *ifp;
  1358. #endif
  1359. union ib_gid gid;
  1360. if ((port == 0) || (port > MLX4_MAX_PORTS))
  1361. return;
  1362. /* IPv4 gids */
  1363. in_dev = in_dev_get(dev);
  1364. if (in_dev) {
  1365. for_ifa(in_dev) {
  1366. /*ifa->ifa_address;*/
  1367. ipv6_addr_set_v4mapped(ifa->ifa_address,
  1368. (struct in6_addr *)&gid);
  1369. update_gid_table(ibdev, port, &gid, 0, 0);
  1370. }
  1371. endfor_ifa(in_dev);
  1372. in_dev_put(in_dev);
  1373. }
  1374. #if IS_ENABLED(CONFIG_IPV6)
  1375. /* IPv6 gids */
  1376. in6_dev = in6_dev_get(dev);
  1377. if (in6_dev) {
  1378. read_lock_bh(&in6_dev->lock);
  1379. list_for_each_entry(ifp, &in6_dev->addr_list, if_list) {
  1380. pgid = (union ib_gid *)&ifp->addr;
  1381. update_gid_table(ibdev, port, pgid, 0, 0);
  1382. }
  1383. read_unlock_bh(&in6_dev->lock);
  1384. in6_dev_put(in6_dev);
  1385. }
  1386. #endif
  1387. }
  1388. static void mlx4_ib_set_default_gid(struct mlx4_ib_dev *ibdev,
  1389. struct net_device *dev, u8 port)
  1390. {
  1391. union ib_gid gid;
  1392. mlx4_make_default_gid(dev, &gid);
  1393. update_gid_table(ibdev, port, &gid, 0, 1);
  1394. }
  1395. static int mlx4_ib_init_gid_table(struct mlx4_ib_dev *ibdev)
  1396. {
  1397. struct net_device *dev;
  1398. struct mlx4_ib_iboe *iboe = &ibdev->iboe;
  1399. int i;
  1400. for (i = 1; i <= ibdev->num_ports; ++i)
  1401. if (reset_gid_table(ibdev, i))
  1402. return -1;
  1403. read_lock(&dev_base_lock);
  1404. spin_lock(&iboe->lock);
  1405. for_each_netdev(&init_net, dev) {
  1406. u8 port = mlx4_ib_get_dev_port(dev, ibdev);
  1407. if (port)
  1408. mlx4_ib_get_dev_addr(dev, ibdev, port);
  1409. }
  1410. spin_unlock(&iboe->lock);
  1411. read_unlock(&dev_base_lock);
  1412. return 0;
  1413. }
  1414. static void mlx4_ib_scan_netdevs(struct mlx4_ib_dev *ibdev)
  1415. {
  1416. struct mlx4_ib_iboe *iboe;
  1417. int port;
  1418. iboe = &ibdev->iboe;
  1419. spin_lock(&iboe->lock);
  1420. mlx4_foreach_ib_transport_port(port, ibdev->dev) {
  1421. enum ib_port_state port_state = IB_PORT_NOP;
  1422. struct net_device *old_master = iboe->masters[port - 1];
  1423. struct net_device *curr_netdev;
  1424. struct net_device *curr_master;
  1425. iboe->netdevs[port - 1] =
  1426. mlx4_get_protocol_dev(ibdev->dev, MLX4_PROT_ETH, port);
  1427. if (iboe->netdevs[port - 1])
  1428. mlx4_ib_set_default_gid(ibdev,
  1429. iboe->netdevs[port - 1], port);
  1430. curr_netdev = iboe->netdevs[port - 1];
  1431. if (iboe->netdevs[port - 1] &&
  1432. netif_is_bond_slave(iboe->netdevs[port - 1])) {
  1433. iboe->masters[port - 1] = netdev_master_upper_dev_get(
  1434. iboe->netdevs[port - 1]);
  1435. } else {
  1436. iboe->masters[port - 1] = NULL;
  1437. }
  1438. curr_master = iboe->masters[port - 1];
  1439. if (curr_netdev) {
  1440. port_state = (netif_running(curr_netdev) && netif_carrier_ok(curr_netdev)) ?
  1441. IB_PORT_ACTIVE : IB_PORT_DOWN;
  1442. mlx4_ib_set_default_gid(ibdev, curr_netdev, port);
  1443. } else {
  1444. reset_gid_table(ibdev, port);
  1445. }
  1446. /* if using bonding/team and a slave port is down, we don't the bond IP
  1447. * based gids in the table since flows that select port by gid may get
  1448. * the down port.
  1449. */
  1450. if (curr_master && (port_state == IB_PORT_DOWN)) {
  1451. reset_gid_table(ibdev, port);
  1452. mlx4_ib_set_default_gid(ibdev, curr_netdev, port);
  1453. }
  1454. /* if bonding is used it is possible that we add it to masters
  1455. * only after IP address is assigned to the net bonding
  1456. * interface.
  1457. */
  1458. if (curr_master && (old_master != curr_master)) {
  1459. reset_gid_table(ibdev, port);
  1460. mlx4_ib_set_default_gid(ibdev, curr_netdev, port);
  1461. mlx4_ib_get_dev_addr(curr_master, ibdev, port);
  1462. }
  1463. if (!curr_master && (old_master != curr_master)) {
  1464. reset_gid_table(ibdev, port);
  1465. mlx4_ib_set_default_gid(ibdev, curr_netdev, port);
  1466. mlx4_ib_get_dev_addr(curr_netdev, ibdev, port);
  1467. }
  1468. }
  1469. spin_unlock(&iboe->lock);
  1470. }
  1471. static int mlx4_ib_netdev_event(struct notifier_block *this,
  1472. unsigned long event, void *ptr)
  1473. {
  1474. struct net_device *dev = netdev_notifier_info_to_dev(ptr);
  1475. struct mlx4_ib_dev *ibdev;
  1476. if (!net_eq(dev_net(dev), &init_net))
  1477. return NOTIFY_DONE;
  1478. ibdev = container_of(this, struct mlx4_ib_dev, iboe.nb);
  1479. mlx4_ib_scan_netdevs(ibdev);
  1480. return NOTIFY_DONE;
  1481. }
  1482. static void init_pkeys(struct mlx4_ib_dev *ibdev)
  1483. {
  1484. int port;
  1485. int slave;
  1486. int i;
  1487. if (mlx4_is_master(ibdev->dev)) {
  1488. for (slave = 0; slave <= ibdev->dev->num_vfs; ++slave) {
  1489. for (port = 1; port <= ibdev->dev->caps.num_ports; ++port) {
  1490. for (i = 0;
  1491. i < ibdev->dev->phys_caps.pkey_phys_table_len[port];
  1492. ++i) {
  1493. ibdev->pkeys.virt2phys_pkey[slave][port - 1][i] =
  1494. /* master has the identity virt2phys pkey mapping */
  1495. (slave == mlx4_master_func_num(ibdev->dev) || !i) ? i :
  1496. ibdev->dev->phys_caps.pkey_phys_table_len[port] - 1;
  1497. mlx4_sync_pkey_table(ibdev->dev, slave, port, i,
  1498. ibdev->pkeys.virt2phys_pkey[slave][port - 1][i]);
  1499. }
  1500. }
  1501. }
  1502. /* initialize pkey cache */
  1503. for (port = 1; port <= ibdev->dev->caps.num_ports; ++port) {
  1504. for (i = 0;
  1505. i < ibdev->dev->phys_caps.pkey_phys_table_len[port];
  1506. ++i)
  1507. ibdev->pkeys.phys_pkey_cache[port-1][i] =
  1508. (i) ? 0 : 0xFFFF;
  1509. }
  1510. }
  1511. }
  1512. static void mlx4_ib_alloc_eqs(struct mlx4_dev *dev, struct mlx4_ib_dev *ibdev)
  1513. {
  1514. char name[32];
  1515. int eq_per_port = 0;
  1516. int added_eqs = 0;
  1517. int total_eqs = 0;
  1518. int i, j, eq;
  1519. /* Legacy mode or comp_pool is not large enough */
  1520. if (dev->caps.comp_pool == 0 ||
  1521. dev->caps.num_ports > dev->caps.comp_pool)
  1522. return;
  1523. eq_per_port = rounddown_pow_of_two(dev->caps.comp_pool/
  1524. dev->caps.num_ports);
  1525. /* Init eq table */
  1526. added_eqs = 0;
  1527. mlx4_foreach_port(i, dev, MLX4_PORT_TYPE_IB)
  1528. added_eqs += eq_per_port;
  1529. total_eqs = dev->caps.num_comp_vectors + added_eqs;
  1530. ibdev->eq_table = kzalloc(total_eqs * sizeof(int), GFP_KERNEL);
  1531. if (!ibdev->eq_table)
  1532. return;
  1533. ibdev->eq_added = added_eqs;
  1534. eq = 0;
  1535. mlx4_foreach_port(i, dev, MLX4_PORT_TYPE_IB) {
  1536. for (j = 0; j < eq_per_port; j++) {
  1537. sprintf(name, "mlx4-ib-%d-%d@%s",
  1538. i, j, dev->pdev->bus->name);
  1539. /* Set IRQ for specific name (per ring) */
  1540. if (mlx4_assign_eq(dev, name, NULL,
  1541. &ibdev->eq_table[eq])) {
  1542. /* Use legacy (same as mlx4_en driver) */
  1543. pr_warn("Can't allocate EQ %d; reverting to legacy\n", eq);
  1544. ibdev->eq_table[eq] =
  1545. (eq % dev->caps.num_comp_vectors);
  1546. }
  1547. eq++;
  1548. }
  1549. }
  1550. /* Fill the reset of the vector with legacy EQ */
  1551. for (i = 0, eq = added_eqs; i < dev->caps.num_comp_vectors; i++)
  1552. ibdev->eq_table[eq++] = i;
  1553. /* Advertise the new number of EQs to clients */
  1554. ibdev->ib_dev.num_comp_vectors = total_eqs;
  1555. }
  1556. static void mlx4_ib_free_eqs(struct mlx4_dev *dev, struct mlx4_ib_dev *ibdev)
  1557. {
  1558. int i;
  1559. /* no additional eqs were added */
  1560. if (!ibdev->eq_table)
  1561. return;
  1562. /* Reset the advertised EQ number */
  1563. ibdev->ib_dev.num_comp_vectors = dev->caps.num_comp_vectors;
  1564. /* Free only the added eqs */
  1565. for (i = 0; i < ibdev->eq_added; i++) {
  1566. /* Don't free legacy eqs if used */
  1567. if (ibdev->eq_table[i] <= dev->caps.num_comp_vectors)
  1568. continue;
  1569. mlx4_release_eq(dev, ibdev->eq_table[i]);
  1570. }
  1571. kfree(ibdev->eq_table);
  1572. }
  1573. static void *mlx4_ib_add(struct mlx4_dev *dev)
  1574. {
  1575. struct mlx4_ib_dev *ibdev;
  1576. int num_ports = 0;
  1577. int i, j;
  1578. int err;
  1579. struct mlx4_ib_iboe *iboe;
  1580. int ib_num_ports = 0;
  1581. pr_info_once("%s", mlx4_ib_version);
  1582. num_ports = 0;
  1583. mlx4_foreach_ib_transport_port(i, dev)
  1584. num_ports++;
  1585. /* No point in registering a device with no ports... */
  1586. if (num_ports == 0)
  1587. return NULL;
  1588. ibdev = (struct mlx4_ib_dev *) ib_alloc_device(sizeof *ibdev);
  1589. if (!ibdev) {
  1590. dev_err(&dev->pdev->dev, "Device struct alloc failed\n");
  1591. return NULL;
  1592. }
  1593. iboe = &ibdev->iboe;
  1594. if (mlx4_pd_alloc(dev, &ibdev->priv_pdn))
  1595. goto err_dealloc;
  1596. if (mlx4_uar_alloc(dev, &ibdev->priv_uar))
  1597. goto err_pd;
  1598. ibdev->uar_map = ioremap((phys_addr_t) ibdev->priv_uar.pfn << PAGE_SHIFT,
  1599. PAGE_SIZE);
  1600. if (!ibdev->uar_map)
  1601. goto err_uar;
  1602. MLX4_INIT_DOORBELL_LOCK(&ibdev->uar_lock);
  1603. ibdev->dev = dev;
  1604. strlcpy(ibdev->ib_dev.name, "mlx4_%d", IB_DEVICE_NAME_MAX);
  1605. ibdev->ib_dev.owner = THIS_MODULE;
  1606. ibdev->ib_dev.node_type = RDMA_NODE_IB_CA;
  1607. ibdev->ib_dev.local_dma_lkey = dev->caps.reserved_lkey;
  1608. ibdev->num_ports = num_ports;
  1609. ibdev->ib_dev.phys_port_cnt = ibdev->num_ports;
  1610. ibdev->ib_dev.num_comp_vectors = dev->caps.num_comp_vectors;
  1611. ibdev->ib_dev.dma_device = &dev->pdev->dev;
  1612. if (dev->caps.userspace_caps)
  1613. ibdev->ib_dev.uverbs_abi_ver = MLX4_IB_UVERBS_ABI_VERSION;
  1614. else
  1615. ibdev->ib_dev.uverbs_abi_ver = MLX4_IB_UVERBS_NO_DEV_CAPS_ABI_VERSION;
  1616. ibdev->ib_dev.uverbs_cmd_mask =
  1617. (1ull << IB_USER_VERBS_CMD_GET_CONTEXT) |
  1618. (1ull << IB_USER_VERBS_CMD_QUERY_DEVICE) |
  1619. (1ull << IB_USER_VERBS_CMD_QUERY_PORT) |
  1620. (1ull << IB_USER_VERBS_CMD_ALLOC_PD) |
  1621. (1ull << IB_USER_VERBS_CMD_DEALLOC_PD) |
  1622. (1ull << IB_USER_VERBS_CMD_REG_MR) |
  1623. (1ull << IB_USER_VERBS_CMD_DEREG_MR) |
  1624. (1ull << IB_USER_VERBS_CMD_CREATE_COMP_CHANNEL) |
  1625. (1ull << IB_USER_VERBS_CMD_CREATE_CQ) |
  1626. (1ull << IB_USER_VERBS_CMD_RESIZE_CQ) |
  1627. (1ull << IB_USER_VERBS_CMD_DESTROY_CQ) |
  1628. (1ull << IB_USER_VERBS_CMD_CREATE_QP) |
  1629. (1ull << IB_USER_VERBS_CMD_MODIFY_QP) |
  1630. (1ull << IB_USER_VERBS_CMD_QUERY_QP) |
  1631. (1ull << IB_USER_VERBS_CMD_DESTROY_QP) |
  1632. (1ull << IB_USER_VERBS_CMD_ATTACH_MCAST) |
  1633. (1ull << IB_USER_VERBS_CMD_DETACH_MCAST) |
  1634. (1ull << IB_USER_VERBS_CMD_CREATE_SRQ) |
  1635. (1ull << IB_USER_VERBS_CMD_MODIFY_SRQ) |
  1636. (1ull << IB_USER_VERBS_CMD_QUERY_SRQ) |
  1637. (1ull << IB_USER_VERBS_CMD_DESTROY_SRQ) |
  1638. (1ull << IB_USER_VERBS_CMD_CREATE_XSRQ) |
  1639. (1ull << IB_USER_VERBS_CMD_OPEN_QP);
  1640. ibdev->ib_dev.query_device = mlx4_ib_query_device;
  1641. ibdev->ib_dev.query_port = mlx4_ib_query_port;
  1642. ibdev->ib_dev.get_link_layer = mlx4_ib_port_link_layer;
  1643. ibdev->ib_dev.query_gid = mlx4_ib_query_gid;
  1644. ibdev->ib_dev.query_pkey = mlx4_ib_query_pkey;
  1645. ibdev->ib_dev.modify_device = mlx4_ib_modify_device;
  1646. ibdev->ib_dev.modify_port = mlx4_ib_modify_port;
  1647. ibdev->ib_dev.alloc_ucontext = mlx4_ib_alloc_ucontext;
  1648. ibdev->ib_dev.dealloc_ucontext = mlx4_ib_dealloc_ucontext;
  1649. ibdev->ib_dev.mmap = mlx4_ib_mmap;
  1650. ibdev->ib_dev.alloc_pd = mlx4_ib_alloc_pd;
  1651. ibdev->ib_dev.dealloc_pd = mlx4_ib_dealloc_pd;
  1652. ibdev->ib_dev.create_ah = mlx4_ib_create_ah;
  1653. ibdev->ib_dev.query_ah = mlx4_ib_query_ah;
  1654. ibdev->ib_dev.destroy_ah = mlx4_ib_destroy_ah;
  1655. ibdev->ib_dev.create_srq = mlx4_ib_create_srq;
  1656. ibdev->ib_dev.modify_srq = mlx4_ib_modify_srq;
  1657. ibdev->ib_dev.query_srq = mlx4_ib_query_srq;
  1658. ibdev->ib_dev.destroy_srq = mlx4_ib_destroy_srq;
  1659. ibdev->ib_dev.post_srq_recv = mlx4_ib_post_srq_recv;
  1660. ibdev->ib_dev.create_qp = mlx4_ib_create_qp;
  1661. ibdev->ib_dev.modify_qp = mlx4_ib_modify_qp;
  1662. ibdev->ib_dev.query_qp = mlx4_ib_query_qp;
  1663. ibdev->ib_dev.destroy_qp = mlx4_ib_destroy_qp;
  1664. ibdev->ib_dev.post_send = mlx4_ib_post_send;
  1665. ibdev->ib_dev.post_recv = mlx4_ib_post_recv;
  1666. ibdev->ib_dev.create_cq = mlx4_ib_create_cq;
  1667. ibdev->ib_dev.modify_cq = mlx4_ib_modify_cq;
  1668. ibdev->ib_dev.resize_cq = mlx4_ib_resize_cq;
  1669. ibdev->ib_dev.destroy_cq = mlx4_ib_destroy_cq;
  1670. ibdev->ib_dev.poll_cq = mlx4_ib_poll_cq;
  1671. ibdev->ib_dev.req_notify_cq = mlx4_ib_arm_cq;
  1672. ibdev->ib_dev.get_dma_mr = mlx4_ib_get_dma_mr;
  1673. ibdev->ib_dev.reg_user_mr = mlx4_ib_reg_user_mr;
  1674. ibdev->ib_dev.dereg_mr = mlx4_ib_dereg_mr;
  1675. ibdev->ib_dev.alloc_fast_reg_mr = mlx4_ib_alloc_fast_reg_mr;
  1676. ibdev->ib_dev.alloc_fast_reg_page_list = mlx4_ib_alloc_fast_reg_page_list;
  1677. ibdev->ib_dev.free_fast_reg_page_list = mlx4_ib_free_fast_reg_page_list;
  1678. ibdev->ib_dev.attach_mcast = mlx4_ib_mcg_attach;
  1679. ibdev->ib_dev.detach_mcast = mlx4_ib_mcg_detach;
  1680. ibdev->ib_dev.process_mad = mlx4_ib_process_mad;
  1681. if (!mlx4_is_slave(ibdev->dev)) {
  1682. ibdev->ib_dev.alloc_fmr = mlx4_ib_fmr_alloc;
  1683. ibdev->ib_dev.map_phys_fmr = mlx4_ib_map_phys_fmr;
  1684. ibdev->ib_dev.unmap_fmr = mlx4_ib_unmap_fmr;
  1685. ibdev->ib_dev.dealloc_fmr = mlx4_ib_fmr_dealloc;
  1686. }
  1687. if (dev->caps.flags & MLX4_DEV_CAP_FLAG_MEM_WINDOW ||
  1688. dev->caps.bmme_flags & MLX4_BMME_FLAG_TYPE_2_WIN) {
  1689. ibdev->ib_dev.alloc_mw = mlx4_ib_alloc_mw;
  1690. ibdev->ib_dev.bind_mw = mlx4_ib_bind_mw;
  1691. ibdev->ib_dev.dealloc_mw = mlx4_ib_dealloc_mw;
  1692. ibdev->ib_dev.uverbs_cmd_mask |=
  1693. (1ull << IB_USER_VERBS_CMD_ALLOC_MW) |
  1694. (1ull << IB_USER_VERBS_CMD_DEALLOC_MW);
  1695. }
  1696. if (dev->caps.flags & MLX4_DEV_CAP_FLAG_XRC) {
  1697. ibdev->ib_dev.alloc_xrcd = mlx4_ib_alloc_xrcd;
  1698. ibdev->ib_dev.dealloc_xrcd = mlx4_ib_dealloc_xrcd;
  1699. ibdev->ib_dev.uverbs_cmd_mask |=
  1700. (1ull << IB_USER_VERBS_CMD_OPEN_XRCD) |
  1701. (1ull << IB_USER_VERBS_CMD_CLOSE_XRCD);
  1702. }
  1703. if (check_flow_steering_support(dev)) {
  1704. ibdev->steering_support = MLX4_STEERING_MODE_DEVICE_MANAGED;
  1705. ibdev->ib_dev.create_flow = mlx4_ib_create_flow;
  1706. ibdev->ib_dev.destroy_flow = mlx4_ib_destroy_flow;
  1707. ibdev->ib_dev.uverbs_ex_cmd_mask |=
  1708. (1ull << IB_USER_VERBS_EX_CMD_CREATE_FLOW) |
  1709. (1ull << IB_USER_VERBS_EX_CMD_DESTROY_FLOW);
  1710. }
  1711. mlx4_ib_alloc_eqs(dev, ibdev);
  1712. spin_lock_init(&iboe->lock);
  1713. if (init_node_data(ibdev))
  1714. goto err_map;
  1715. for (i = 0; i < ibdev->num_ports; ++i) {
  1716. if (mlx4_ib_port_link_layer(&ibdev->ib_dev, i + 1) ==
  1717. IB_LINK_LAYER_ETHERNET) {
  1718. err = mlx4_counter_alloc(ibdev->dev, &ibdev->counters[i]);
  1719. if (err)
  1720. ibdev->counters[i] = -1;
  1721. } else
  1722. ibdev->counters[i] = -1;
  1723. }
  1724. mlx4_foreach_port(i, dev, MLX4_PORT_TYPE_IB)
  1725. ib_num_ports++;
  1726. spin_lock_init(&ibdev->sm_lock);
  1727. mutex_init(&ibdev->cap_mask_mutex);
  1728. if (ibdev->steering_support == MLX4_STEERING_MODE_DEVICE_MANAGED &&
  1729. ib_num_ports) {
  1730. ibdev->steer_qpn_count = MLX4_IB_UC_MAX_NUM_QPS;
  1731. err = mlx4_qp_reserve_range(dev, ibdev->steer_qpn_count,
  1732. MLX4_IB_UC_STEER_QPN_ALIGN,
  1733. &ibdev->steer_qpn_base);
  1734. if (err)
  1735. goto err_counter;
  1736. ibdev->ib_uc_qpns_bitmap =
  1737. kmalloc(BITS_TO_LONGS(ibdev->steer_qpn_count) *
  1738. sizeof(long),
  1739. GFP_KERNEL);
  1740. if (!ibdev->ib_uc_qpns_bitmap) {
  1741. dev_err(&dev->pdev->dev, "bit map alloc failed\n");
  1742. goto err_steer_qp_release;
  1743. }
  1744. bitmap_zero(ibdev->ib_uc_qpns_bitmap, ibdev->steer_qpn_count);
  1745. err = mlx4_FLOW_STEERING_IB_UC_QP_RANGE(
  1746. dev, ibdev->steer_qpn_base,
  1747. ibdev->steer_qpn_base +
  1748. ibdev->steer_qpn_count - 1);
  1749. if (err)
  1750. goto err_steer_free_bitmap;
  1751. }
  1752. if (ib_register_device(&ibdev->ib_dev, NULL))
  1753. goto err_steer_free_bitmap;
  1754. if (mlx4_ib_mad_init(ibdev))
  1755. goto err_reg;
  1756. if (mlx4_ib_init_sriov(ibdev))
  1757. goto err_mad;
  1758. if (dev->caps.flags & MLX4_DEV_CAP_FLAG_IBOE) {
  1759. if (!iboe->nb.notifier_call) {
  1760. iboe->nb.notifier_call = mlx4_ib_netdev_event;
  1761. err = register_netdevice_notifier(&iboe->nb);
  1762. if (err) {
  1763. iboe->nb.notifier_call = NULL;
  1764. goto err_notif;
  1765. }
  1766. }
  1767. if (!iboe->nb_inet.notifier_call) {
  1768. iboe->nb_inet.notifier_call = mlx4_ib_inet_event;
  1769. err = register_inetaddr_notifier(&iboe->nb_inet);
  1770. if (err) {
  1771. iboe->nb_inet.notifier_call = NULL;
  1772. goto err_notif;
  1773. }
  1774. }
  1775. #if IS_ENABLED(CONFIG_IPV6)
  1776. if (!iboe->nb_inet6.notifier_call) {
  1777. iboe->nb_inet6.notifier_call = mlx4_ib_inet6_event;
  1778. err = register_inet6addr_notifier(&iboe->nb_inet6);
  1779. if (err) {
  1780. iboe->nb_inet6.notifier_call = NULL;
  1781. goto err_notif;
  1782. }
  1783. }
  1784. #endif
  1785. for (i = 1 ; i <= ibdev->num_ports ; ++i)
  1786. reset_gid_table(ibdev, i);
  1787. rtnl_lock();
  1788. mlx4_ib_scan_netdevs(ibdev);
  1789. rtnl_unlock();
  1790. mlx4_ib_init_gid_table(ibdev);
  1791. }
  1792. for (j = 0; j < ARRAY_SIZE(mlx4_class_attributes); ++j) {
  1793. if (device_create_file(&ibdev->ib_dev.dev,
  1794. mlx4_class_attributes[j]))
  1795. goto err_notif;
  1796. }
  1797. ibdev->ib_active = true;
  1798. if (mlx4_is_mfunc(ibdev->dev))
  1799. init_pkeys(ibdev);
  1800. /* create paravirt contexts for any VFs which are active */
  1801. if (mlx4_is_master(ibdev->dev)) {
  1802. for (j = 0; j < MLX4_MFUNC_MAX; j++) {
  1803. if (j == mlx4_master_func_num(ibdev->dev))
  1804. continue;
  1805. if (mlx4_is_slave_active(ibdev->dev, j))
  1806. do_slave_init(ibdev, j, 1);
  1807. }
  1808. }
  1809. return ibdev;
  1810. err_notif:
  1811. if (ibdev->iboe.nb.notifier_call) {
  1812. if (unregister_netdevice_notifier(&ibdev->iboe.nb))
  1813. pr_warn("failure unregistering notifier\n");
  1814. ibdev->iboe.nb.notifier_call = NULL;
  1815. }
  1816. if (ibdev->iboe.nb_inet.notifier_call) {
  1817. if (unregister_inetaddr_notifier(&ibdev->iboe.nb_inet))
  1818. pr_warn("failure unregistering notifier\n");
  1819. ibdev->iboe.nb_inet.notifier_call = NULL;
  1820. }
  1821. #if IS_ENABLED(CONFIG_IPV6)
  1822. if (ibdev->iboe.nb_inet6.notifier_call) {
  1823. if (unregister_inet6addr_notifier(&ibdev->iboe.nb_inet6))
  1824. pr_warn("failure unregistering notifier\n");
  1825. ibdev->iboe.nb_inet6.notifier_call = NULL;
  1826. }
  1827. #endif
  1828. flush_workqueue(wq);
  1829. mlx4_ib_close_sriov(ibdev);
  1830. err_mad:
  1831. mlx4_ib_mad_cleanup(ibdev);
  1832. err_reg:
  1833. ib_unregister_device(&ibdev->ib_dev);
  1834. err_steer_free_bitmap:
  1835. kfree(ibdev->ib_uc_qpns_bitmap);
  1836. err_steer_qp_release:
  1837. if (ibdev->steering_support == MLX4_STEERING_MODE_DEVICE_MANAGED)
  1838. mlx4_qp_release_range(dev, ibdev->steer_qpn_base,
  1839. ibdev->steer_qpn_count);
  1840. err_counter:
  1841. for (; i; --i)
  1842. if (ibdev->counters[i - 1] != -1)
  1843. mlx4_counter_free(ibdev->dev, ibdev->counters[i - 1]);
  1844. err_map:
  1845. iounmap(ibdev->uar_map);
  1846. err_uar:
  1847. mlx4_uar_free(dev, &ibdev->priv_uar);
  1848. err_pd:
  1849. mlx4_pd_free(dev, ibdev->priv_pdn);
  1850. err_dealloc:
  1851. ib_dealloc_device(&ibdev->ib_dev);
  1852. return NULL;
  1853. }
  1854. int mlx4_ib_steer_qp_alloc(struct mlx4_ib_dev *dev, int count, int *qpn)
  1855. {
  1856. int offset;
  1857. WARN_ON(!dev->ib_uc_qpns_bitmap);
  1858. offset = bitmap_find_free_region(dev->ib_uc_qpns_bitmap,
  1859. dev->steer_qpn_count,
  1860. get_count_order(count));
  1861. if (offset < 0)
  1862. return offset;
  1863. *qpn = dev->steer_qpn_base + offset;
  1864. return 0;
  1865. }
  1866. void mlx4_ib_steer_qp_free(struct mlx4_ib_dev *dev, u32 qpn, int count)
  1867. {
  1868. if (!qpn ||
  1869. dev->steering_support != MLX4_STEERING_MODE_DEVICE_MANAGED)
  1870. return;
  1871. BUG_ON(qpn < dev->steer_qpn_base);
  1872. bitmap_release_region(dev->ib_uc_qpns_bitmap,
  1873. qpn - dev->steer_qpn_base,
  1874. get_count_order(count));
  1875. }
  1876. int mlx4_ib_steer_qp_reg(struct mlx4_ib_dev *mdev, struct mlx4_ib_qp *mqp,
  1877. int is_attach)
  1878. {
  1879. int err;
  1880. size_t flow_size;
  1881. struct ib_flow_attr *flow = NULL;
  1882. struct ib_flow_spec_ib *ib_spec;
  1883. if (is_attach) {
  1884. flow_size = sizeof(struct ib_flow_attr) +
  1885. sizeof(struct ib_flow_spec_ib);
  1886. flow = kzalloc(flow_size, GFP_KERNEL);
  1887. if (!flow)
  1888. return -ENOMEM;
  1889. flow->port = mqp->port;
  1890. flow->num_of_specs = 1;
  1891. flow->size = flow_size;
  1892. ib_spec = (struct ib_flow_spec_ib *)(flow + 1);
  1893. ib_spec->type = IB_FLOW_SPEC_IB;
  1894. ib_spec->size = sizeof(struct ib_flow_spec_ib);
  1895. /* Add an empty rule for IB L2 */
  1896. memset(&ib_spec->mask, 0, sizeof(ib_spec->mask));
  1897. err = __mlx4_ib_create_flow(&mqp->ibqp, flow,
  1898. IB_FLOW_DOMAIN_NIC,
  1899. MLX4_FS_REGULAR,
  1900. &mqp->reg_id);
  1901. } else {
  1902. err = __mlx4_ib_destroy_flow(mdev->dev, mqp->reg_id);
  1903. }
  1904. kfree(flow);
  1905. return err;
  1906. }
  1907. static void mlx4_ib_remove(struct mlx4_dev *dev, void *ibdev_ptr)
  1908. {
  1909. struct mlx4_ib_dev *ibdev = ibdev_ptr;
  1910. int p;
  1911. mlx4_ib_close_sriov(ibdev);
  1912. mlx4_ib_mad_cleanup(ibdev);
  1913. ib_unregister_device(&ibdev->ib_dev);
  1914. if (ibdev->iboe.nb.notifier_call) {
  1915. if (unregister_netdevice_notifier(&ibdev->iboe.nb))
  1916. pr_warn("failure unregistering notifier\n");
  1917. ibdev->iboe.nb.notifier_call = NULL;
  1918. }
  1919. if (ibdev->steering_support == MLX4_STEERING_MODE_DEVICE_MANAGED) {
  1920. mlx4_qp_release_range(dev, ibdev->steer_qpn_base,
  1921. ibdev->steer_qpn_count);
  1922. kfree(ibdev->ib_uc_qpns_bitmap);
  1923. }
  1924. if (ibdev->iboe.nb_inet.notifier_call) {
  1925. if (unregister_inetaddr_notifier(&ibdev->iboe.nb_inet))
  1926. pr_warn("failure unregistering notifier\n");
  1927. ibdev->iboe.nb_inet.notifier_call = NULL;
  1928. }
  1929. #if IS_ENABLED(CONFIG_IPV6)
  1930. if (ibdev->iboe.nb_inet6.notifier_call) {
  1931. if (unregister_inet6addr_notifier(&ibdev->iboe.nb_inet6))
  1932. pr_warn("failure unregistering notifier\n");
  1933. ibdev->iboe.nb_inet6.notifier_call = NULL;
  1934. }
  1935. #endif
  1936. iounmap(ibdev->uar_map);
  1937. for (p = 0; p < ibdev->num_ports; ++p)
  1938. if (ibdev->counters[p] != -1)
  1939. mlx4_counter_free(ibdev->dev, ibdev->counters[p]);
  1940. mlx4_foreach_port(p, dev, MLX4_PORT_TYPE_IB)
  1941. mlx4_CLOSE_PORT(dev, p);
  1942. mlx4_ib_free_eqs(dev, ibdev);
  1943. mlx4_uar_free(dev, &ibdev->priv_uar);
  1944. mlx4_pd_free(dev, ibdev->priv_pdn);
  1945. ib_dealloc_device(&ibdev->ib_dev);
  1946. }
  1947. static void do_slave_init(struct mlx4_ib_dev *ibdev, int slave, int do_init)
  1948. {
  1949. struct mlx4_ib_demux_work **dm = NULL;
  1950. struct mlx4_dev *dev = ibdev->dev;
  1951. int i;
  1952. unsigned long flags;
  1953. if (!mlx4_is_master(dev))
  1954. return;
  1955. dm = kcalloc(dev->caps.num_ports, sizeof *dm, GFP_ATOMIC);
  1956. if (!dm) {
  1957. pr_err("failed to allocate memory for tunneling qp update\n");
  1958. goto out;
  1959. }
  1960. for (i = 0; i < dev->caps.num_ports; i++) {
  1961. dm[i] = kmalloc(sizeof (struct mlx4_ib_demux_work), GFP_ATOMIC);
  1962. if (!dm[i]) {
  1963. pr_err("failed to allocate memory for tunneling qp update work struct\n");
  1964. for (i = 0; i < dev->caps.num_ports; i++) {
  1965. if (dm[i])
  1966. kfree(dm[i]);
  1967. }
  1968. goto out;
  1969. }
  1970. }
  1971. /* initialize or tear down tunnel QPs for the slave */
  1972. for (i = 0; i < dev->caps.num_ports; i++) {
  1973. INIT_WORK(&dm[i]->work, mlx4_ib_tunnels_update_work);
  1974. dm[i]->port = i + 1;
  1975. dm[i]->slave = slave;
  1976. dm[i]->do_init = do_init;
  1977. dm[i]->dev = ibdev;
  1978. spin_lock_irqsave(&ibdev->sriov.going_down_lock, flags);
  1979. if (!ibdev->sriov.is_going_down)
  1980. queue_work(ibdev->sriov.demux[i].ud_wq, &dm[i]->work);
  1981. spin_unlock_irqrestore(&ibdev->sriov.going_down_lock, flags);
  1982. }
  1983. out:
  1984. kfree(dm);
  1985. return;
  1986. }
  1987. static void mlx4_ib_event(struct mlx4_dev *dev, void *ibdev_ptr,
  1988. enum mlx4_dev_event event, unsigned long param)
  1989. {
  1990. struct ib_event ibev;
  1991. struct mlx4_ib_dev *ibdev = to_mdev((struct ib_device *) ibdev_ptr);
  1992. struct mlx4_eqe *eqe = NULL;
  1993. struct ib_event_work *ew;
  1994. int p = 0;
  1995. if (event == MLX4_DEV_EVENT_PORT_MGMT_CHANGE)
  1996. eqe = (struct mlx4_eqe *)param;
  1997. else
  1998. p = (int) param;
  1999. switch (event) {
  2000. case MLX4_DEV_EVENT_PORT_UP:
  2001. if (p > ibdev->num_ports)
  2002. return;
  2003. if (mlx4_is_master(dev) &&
  2004. rdma_port_get_link_layer(&ibdev->ib_dev, p) ==
  2005. IB_LINK_LAYER_INFINIBAND) {
  2006. mlx4_ib_invalidate_all_guid_record(ibdev, p);
  2007. }
  2008. ibev.event = IB_EVENT_PORT_ACTIVE;
  2009. break;
  2010. case MLX4_DEV_EVENT_PORT_DOWN:
  2011. if (p > ibdev->num_ports)
  2012. return;
  2013. ibev.event = IB_EVENT_PORT_ERR;
  2014. break;
  2015. case MLX4_DEV_EVENT_CATASTROPHIC_ERROR:
  2016. ibdev->ib_active = false;
  2017. ibev.event = IB_EVENT_DEVICE_FATAL;
  2018. break;
  2019. case MLX4_DEV_EVENT_PORT_MGMT_CHANGE:
  2020. ew = kmalloc(sizeof *ew, GFP_ATOMIC);
  2021. if (!ew) {
  2022. pr_err("failed to allocate memory for events work\n");
  2023. break;
  2024. }
  2025. INIT_WORK(&ew->work, handle_port_mgmt_change_event);
  2026. memcpy(&ew->ib_eqe, eqe, sizeof *eqe);
  2027. ew->ib_dev = ibdev;
  2028. /* need to queue only for port owner, which uses GEN_EQE */
  2029. if (mlx4_is_master(dev))
  2030. queue_work(wq, &ew->work);
  2031. else
  2032. handle_port_mgmt_change_event(&ew->work);
  2033. return;
  2034. case MLX4_DEV_EVENT_SLAVE_INIT:
  2035. /* here, p is the slave id */
  2036. do_slave_init(ibdev, p, 1);
  2037. return;
  2038. case MLX4_DEV_EVENT_SLAVE_SHUTDOWN:
  2039. /* here, p is the slave id */
  2040. do_slave_init(ibdev, p, 0);
  2041. return;
  2042. default:
  2043. return;
  2044. }
  2045. ibev.device = ibdev_ptr;
  2046. ibev.element.port_num = (u8) p;
  2047. ib_dispatch_event(&ibev);
  2048. }
  2049. static struct mlx4_interface mlx4_ib_interface = {
  2050. .add = mlx4_ib_add,
  2051. .remove = mlx4_ib_remove,
  2052. .event = mlx4_ib_event,
  2053. .protocol = MLX4_PROT_IB_IPV6
  2054. };
  2055. static int __init mlx4_ib_init(void)
  2056. {
  2057. int err;
  2058. wq = create_singlethread_workqueue("mlx4_ib");
  2059. if (!wq)
  2060. return -ENOMEM;
  2061. err = mlx4_ib_mcg_init();
  2062. if (err)
  2063. goto clean_wq;
  2064. err = mlx4_register_interface(&mlx4_ib_interface);
  2065. if (err)
  2066. goto clean_mcg;
  2067. return 0;
  2068. clean_mcg:
  2069. mlx4_ib_mcg_destroy();
  2070. clean_wq:
  2071. destroy_workqueue(wq);
  2072. return err;
  2073. }
  2074. static void __exit mlx4_ib_cleanup(void)
  2075. {
  2076. mlx4_unregister_interface(&mlx4_ib_interface);
  2077. mlx4_ib_mcg_destroy();
  2078. destroy_workqueue(wq);
  2079. }
  2080. module_init(mlx4_ib_init);
  2081. module_exit(mlx4_ib_cleanup);