intel_dp_mst.c 19 KB

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  1. /*
  2. * Copyright © 2008 Intel Corporation
  3. * 2014 Red Hat Inc.
  4. *
  5. * Permission is hereby granted, free of charge, to any person obtaining a
  6. * copy of this software and associated documentation files (the "Software"),
  7. * to deal in the Software without restriction, including without limitation
  8. * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  9. * and/or sell copies of the Software, and to permit persons to whom the
  10. * Software is furnished to do so, subject to the following conditions:
  11. *
  12. * The above copyright notice and this permission notice (including the next
  13. * paragraph) shall be included in all copies or substantial portions of the
  14. * Software.
  15. *
  16. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18. * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  19. * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  20. * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  21. * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  22. * IN THE SOFTWARE.
  23. *
  24. */
  25. #include <drm/drmP.h>
  26. #include "i915_drv.h"
  27. #include "intel_drv.h"
  28. #include <drm/drm_atomic_helper.h>
  29. #include <drm/drm_crtc_helper.h>
  30. #include <drm/drm_edid.h>
  31. static bool intel_dp_mst_compute_config(struct intel_encoder *encoder,
  32. struct intel_crtc_state *pipe_config,
  33. struct drm_connector_state *conn_state)
  34. {
  35. struct intel_dp_mst_encoder *intel_mst = enc_to_mst(&encoder->base);
  36. struct intel_digital_port *intel_dig_port = intel_mst->primary;
  37. struct intel_dp *intel_dp = &intel_dig_port->dp;
  38. struct intel_connector *connector =
  39. to_intel_connector(conn_state->connector);
  40. struct drm_atomic_state *state;
  41. int bpp;
  42. int lane_count, slots;
  43. const struct drm_display_mode *adjusted_mode = &pipe_config->base.adjusted_mode;
  44. int mst_pbn;
  45. pipe_config->has_pch_encoder = false;
  46. bpp = 24;
  47. if (intel_dp->compliance.test_data.bpc) {
  48. bpp = intel_dp->compliance.test_data.bpc * 3;
  49. DRM_DEBUG_KMS("Setting pipe bpp to %d\n",
  50. bpp);
  51. }
  52. /*
  53. * for MST we always configure max link bw - the spec doesn't
  54. * seem to suggest we should do otherwise.
  55. */
  56. lane_count = drm_dp_max_lane_count(intel_dp->dpcd);
  57. pipe_config->lane_count = lane_count;
  58. pipe_config->pipe_bpp = bpp;
  59. pipe_config->port_clock = intel_dp_max_link_rate(intel_dp);
  60. state = pipe_config->base.state;
  61. if (drm_dp_mst_port_has_audio(&intel_dp->mst_mgr, connector->port))
  62. pipe_config->has_audio = true;
  63. mst_pbn = drm_dp_calc_pbn_mode(adjusted_mode->crtc_clock, bpp);
  64. pipe_config->pbn = mst_pbn;
  65. slots = drm_dp_find_vcpi_slots(&intel_dp->mst_mgr, mst_pbn);
  66. intel_link_compute_m_n(bpp, lane_count,
  67. adjusted_mode->crtc_clock,
  68. pipe_config->port_clock,
  69. &pipe_config->dp_m_n);
  70. pipe_config->dp_m_n.tu = slots;
  71. return true;
  72. }
  73. static void intel_mst_disable_dp(struct intel_encoder *encoder,
  74. struct intel_crtc_state *old_crtc_state,
  75. struct drm_connector_state *old_conn_state)
  76. {
  77. struct intel_dp_mst_encoder *intel_mst = enc_to_mst(&encoder->base);
  78. struct intel_digital_port *intel_dig_port = intel_mst->primary;
  79. struct intel_dp *intel_dp = &intel_dig_port->dp;
  80. struct intel_connector *connector =
  81. to_intel_connector(old_conn_state->connector);
  82. int ret;
  83. DRM_DEBUG_KMS("%d\n", intel_dp->active_mst_links);
  84. drm_dp_mst_reset_vcpi_slots(&intel_dp->mst_mgr, connector->port);
  85. ret = drm_dp_update_payload_part1(&intel_dp->mst_mgr);
  86. if (ret) {
  87. DRM_ERROR("failed to update payload %d\n", ret);
  88. }
  89. if (old_crtc_state->has_audio)
  90. intel_audio_codec_disable(encoder);
  91. }
  92. static void intel_mst_post_disable_dp(struct intel_encoder *encoder,
  93. struct intel_crtc_state *old_crtc_state,
  94. struct drm_connector_state *old_conn_state)
  95. {
  96. struct intel_dp_mst_encoder *intel_mst = enc_to_mst(&encoder->base);
  97. struct intel_digital_port *intel_dig_port = intel_mst->primary;
  98. struct intel_dp *intel_dp = &intel_dig_port->dp;
  99. struct intel_connector *connector =
  100. to_intel_connector(old_conn_state->connector);
  101. DRM_DEBUG_KMS("%d\n", intel_dp->active_mst_links);
  102. /* this can fail */
  103. drm_dp_check_act_status(&intel_dp->mst_mgr);
  104. /* and this can also fail */
  105. drm_dp_update_payload_part2(&intel_dp->mst_mgr);
  106. drm_dp_mst_deallocate_vcpi(&intel_dp->mst_mgr, connector->port);
  107. intel_dp->active_mst_links--;
  108. intel_mst->connector = NULL;
  109. if (intel_dp->active_mst_links == 0) {
  110. intel_dig_port->base.post_disable(&intel_dig_port->base,
  111. NULL, NULL);
  112. intel_dp_sink_dpms(intel_dp, DRM_MODE_DPMS_OFF);
  113. }
  114. }
  115. static void intel_mst_pre_enable_dp(struct intel_encoder *encoder,
  116. struct intel_crtc_state *pipe_config,
  117. struct drm_connector_state *conn_state)
  118. {
  119. struct intel_dp_mst_encoder *intel_mst = enc_to_mst(&encoder->base);
  120. struct intel_digital_port *intel_dig_port = intel_mst->primary;
  121. struct intel_dp *intel_dp = &intel_dig_port->dp;
  122. struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
  123. enum port port = intel_dig_port->port;
  124. struct intel_connector *connector =
  125. to_intel_connector(conn_state->connector);
  126. int ret;
  127. uint32_t temp;
  128. int slots;
  129. /* MST encoders are bound to a crtc, not to a connector,
  130. * force the mapping here for get_hw_state.
  131. */
  132. connector->encoder = encoder;
  133. intel_mst->connector = connector;
  134. DRM_DEBUG_KMS("%d\n", intel_dp->active_mst_links);
  135. if (intel_dp->active_mst_links == 0) {
  136. intel_ddi_clk_select(&intel_dig_port->base,
  137. pipe_config->shared_dpll);
  138. intel_display_power_get(dev_priv,
  139. intel_dig_port->ddi_io_power_domain);
  140. intel_prepare_dp_ddi_buffers(&intel_dig_port->base);
  141. intel_dp_set_link_params(intel_dp,
  142. pipe_config->port_clock,
  143. pipe_config->lane_count,
  144. true);
  145. intel_ddi_init_dp_buf_reg(&intel_dig_port->base);
  146. intel_dp_sink_dpms(intel_dp, DRM_MODE_DPMS_ON);
  147. intel_dp_start_link_train(intel_dp);
  148. intel_dp_stop_link_train(intel_dp);
  149. }
  150. ret = drm_dp_mst_allocate_vcpi(&intel_dp->mst_mgr,
  151. connector->port,
  152. pipe_config->pbn, &slots);
  153. if (ret == false) {
  154. DRM_ERROR("failed to allocate vcpi\n");
  155. return;
  156. }
  157. intel_dp->active_mst_links++;
  158. temp = I915_READ(DP_TP_STATUS(port));
  159. I915_WRITE(DP_TP_STATUS(port), temp);
  160. ret = drm_dp_update_payload_part1(&intel_dp->mst_mgr);
  161. }
  162. static void intel_mst_enable_dp(struct intel_encoder *encoder,
  163. struct intel_crtc_state *pipe_config,
  164. struct drm_connector_state *conn_state)
  165. {
  166. struct intel_dp_mst_encoder *intel_mst = enc_to_mst(&encoder->base);
  167. struct intel_digital_port *intel_dig_port = intel_mst->primary;
  168. struct intel_dp *intel_dp = &intel_dig_port->dp;
  169. struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
  170. enum port port = intel_dig_port->port;
  171. int ret;
  172. DRM_DEBUG_KMS("%d\n", intel_dp->active_mst_links);
  173. if (intel_wait_for_register(dev_priv,
  174. DP_TP_STATUS(port),
  175. DP_TP_STATUS_ACT_SENT,
  176. DP_TP_STATUS_ACT_SENT,
  177. 1))
  178. DRM_ERROR("Timed out waiting for ACT sent\n");
  179. ret = drm_dp_check_act_status(&intel_dp->mst_mgr);
  180. ret = drm_dp_update_payload_part2(&intel_dp->mst_mgr);
  181. if (pipe_config->has_audio)
  182. intel_audio_codec_enable(encoder, pipe_config, conn_state);
  183. }
  184. static bool intel_dp_mst_enc_get_hw_state(struct intel_encoder *encoder,
  185. enum pipe *pipe)
  186. {
  187. struct intel_dp_mst_encoder *intel_mst = enc_to_mst(&encoder->base);
  188. *pipe = intel_mst->pipe;
  189. if (intel_mst->connector)
  190. return true;
  191. return false;
  192. }
  193. static void intel_dp_mst_enc_get_config(struct intel_encoder *encoder,
  194. struct intel_crtc_state *pipe_config)
  195. {
  196. struct intel_dp_mst_encoder *intel_mst = enc_to_mst(&encoder->base);
  197. struct intel_digital_port *intel_dig_port = intel_mst->primary;
  198. struct intel_crtc *crtc = to_intel_crtc(pipe_config->base.crtc);
  199. struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
  200. enum transcoder cpu_transcoder = pipe_config->cpu_transcoder;
  201. u32 temp, flags = 0;
  202. pipe_config->has_audio =
  203. intel_ddi_is_audio_enabled(dev_priv, crtc);
  204. temp = I915_READ(TRANS_DDI_FUNC_CTL(cpu_transcoder));
  205. if (temp & TRANS_DDI_PHSYNC)
  206. flags |= DRM_MODE_FLAG_PHSYNC;
  207. else
  208. flags |= DRM_MODE_FLAG_NHSYNC;
  209. if (temp & TRANS_DDI_PVSYNC)
  210. flags |= DRM_MODE_FLAG_PVSYNC;
  211. else
  212. flags |= DRM_MODE_FLAG_NVSYNC;
  213. switch (temp & TRANS_DDI_BPC_MASK) {
  214. case TRANS_DDI_BPC_6:
  215. pipe_config->pipe_bpp = 18;
  216. break;
  217. case TRANS_DDI_BPC_8:
  218. pipe_config->pipe_bpp = 24;
  219. break;
  220. case TRANS_DDI_BPC_10:
  221. pipe_config->pipe_bpp = 30;
  222. break;
  223. case TRANS_DDI_BPC_12:
  224. pipe_config->pipe_bpp = 36;
  225. break;
  226. default:
  227. break;
  228. }
  229. pipe_config->base.adjusted_mode.flags |= flags;
  230. pipe_config->lane_count =
  231. ((temp & DDI_PORT_WIDTH_MASK) >> DDI_PORT_WIDTH_SHIFT) + 1;
  232. intel_dp_get_m_n(crtc, pipe_config);
  233. intel_ddi_clock_get(&intel_dig_port->base, pipe_config);
  234. }
  235. static int intel_dp_mst_get_ddc_modes(struct drm_connector *connector)
  236. {
  237. struct intel_connector *intel_connector = to_intel_connector(connector);
  238. struct intel_dp *intel_dp = intel_connector->mst_port;
  239. struct edid *edid;
  240. int ret;
  241. if (!intel_dp) {
  242. return intel_connector_update_modes(connector, NULL);
  243. }
  244. edid = drm_dp_mst_get_edid(connector, &intel_dp->mst_mgr, intel_connector->port);
  245. ret = intel_connector_update_modes(connector, edid);
  246. kfree(edid);
  247. return ret;
  248. }
  249. static enum drm_connector_status
  250. intel_dp_mst_detect(struct drm_connector *connector, bool force)
  251. {
  252. struct intel_connector *intel_connector = to_intel_connector(connector);
  253. struct intel_dp *intel_dp = intel_connector->mst_port;
  254. if (!intel_dp)
  255. return connector_status_disconnected;
  256. return drm_dp_mst_detect_port(connector, &intel_dp->mst_mgr, intel_connector->port);
  257. }
  258. static int
  259. intel_dp_mst_set_property(struct drm_connector *connector,
  260. struct drm_property *property,
  261. uint64_t val)
  262. {
  263. return 0;
  264. }
  265. static void
  266. intel_dp_mst_connector_destroy(struct drm_connector *connector)
  267. {
  268. struct intel_connector *intel_connector = to_intel_connector(connector);
  269. if (!IS_ERR_OR_NULL(intel_connector->edid))
  270. kfree(intel_connector->edid);
  271. drm_connector_cleanup(connector);
  272. kfree(connector);
  273. }
  274. static const struct drm_connector_funcs intel_dp_mst_connector_funcs = {
  275. .dpms = drm_atomic_helper_connector_dpms,
  276. .detect = intel_dp_mst_detect,
  277. .fill_modes = drm_helper_probe_single_connector_modes,
  278. .set_property = intel_dp_mst_set_property,
  279. .atomic_get_property = intel_connector_atomic_get_property,
  280. .late_register = intel_connector_register,
  281. .early_unregister = intel_connector_unregister,
  282. .destroy = intel_dp_mst_connector_destroy,
  283. .atomic_destroy_state = drm_atomic_helper_connector_destroy_state,
  284. .atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state,
  285. };
  286. static int intel_dp_mst_get_modes(struct drm_connector *connector)
  287. {
  288. return intel_dp_mst_get_ddc_modes(connector);
  289. }
  290. static enum drm_mode_status
  291. intel_dp_mst_mode_valid(struct drm_connector *connector,
  292. struct drm_display_mode *mode)
  293. {
  294. struct intel_connector *intel_connector = to_intel_connector(connector);
  295. struct intel_dp *intel_dp = intel_connector->mst_port;
  296. int max_dotclk = to_i915(connector->dev)->max_dotclk_freq;
  297. int bpp = 24; /* MST uses fixed bpp */
  298. int max_rate, mode_rate, max_lanes, max_link_clock;
  299. max_link_clock = intel_dp_max_link_rate(intel_dp);
  300. max_lanes = drm_dp_max_lane_count(intel_dp->dpcd);
  301. max_rate = intel_dp_max_data_rate(max_link_clock, max_lanes);
  302. mode_rate = intel_dp_link_required(mode->clock, bpp);
  303. /* TODO - validate mode against available PBN for link */
  304. if (mode->clock < 10000)
  305. return MODE_CLOCK_LOW;
  306. if (mode->flags & DRM_MODE_FLAG_DBLCLK)
  307. return MODE_H_ILLEGAL;
  308. if (mode_rate > max_rate || mode->clock > max_dotclk)
  309. return MODE_CLOCK_HIGH;
  310. return MODE_OK;
  311. }
  312. static struct drm_encoder *intel_mst_atomic_best_encoder(struct drm_connector *connector,
  313. struct drm_connector_state *state)
  314. {
  315. struct intel_connector *intel_connector = to_intel_connector(connector);
  316. struct intel_dp *intel_dp = intel_connector->mst_port;
  317. struct intel_crtc *crtc = to_intel_crtc(state->crtc);
  318. if (!intel_dp)
  319. return NULL;
  320. return &intel_dp->mst_encoders[crtc->pipe]->base.base;
  321. }
  322. static struct drm_encoder *intel_mst_best_encoder(struct drm_connector *connector)
  323. {
  324. struct intel_connector *intel_connector = to_intel_connector(connector);
  325. struct intel_dp *intel_dp = intel_connector->mst_port;
  326. if (!intel_dp)
  327. return NULL;
  328. return &intel_dp->mst_encoders[0]->base.base;
  329. }
  330. static const struct drm_connector_helper_funcs intel_dp_mst_connector_helper_funcs = {
  331. .get_modes = intel_dp_mst_get_modes,
  332. .mode_valid = intel_dp_mst_mode_valid,
  333. .atomic_best_encoder = intel_mst_atomic_best_encoder,
  334. .best_encoder = intel_mst_best_encoder,
  335. };
  336. static void intel_dp_mst_encoder_destroy(struct drm_encoder *encoder)
  337. {
  338. struct intel_dp_mst_encoder *intel_mst = enc_to_mst(encoder);
  339. drm_encoder_cleanup(encoder);
  340. kfree(intel_mst);
  341. }
  342. static const struct drm_encoder_funcs intel_dp_mst_enc_funcs = {
  343. .destroy = intel_dp_mst_encoder_destroy,
  344. };
  345. static bool intel_dp_mst_get_hw_state(struct intel_connector *connector)
  346. {
  347. if (connector->encoder && connector->base.state->crtc) {
  348. enum pipe pipe;
  349. if (!connector->encoder->get_hw_state(connector->encoder, &pipe))
  350. return false;
  351. return true;
  352. }
  353. return false;
  354. }
  355. static void intel_connector_add_to_fbdev(struct intel_connector *connector)
  356. {
  357. #ifdef CONFIG_DRM_FBDEV_EMULATION
  358. struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
  359. if (dev_priv->fbdev)
  360. drm_fb_helper_add_one_connector(&dev_priv->fbdev->helper,
  361. &connector->base);
  362. #endif
  363. }
  364. static void intel_connector_remove_from_fbdev(struct intel_connector *connector)
  365. {
  366. #ifdef CONFIG_DRM_FBDEV_EMULATION
  367. struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
  368. if (dev_priv->fbdev)
  369. drm_fb_helper_remove_one_connector(&dev_priv->fbdev->helper,
  370. &connector->base);
  371. #endif
  372. }
  373. static struct drm_connector *intel_dp_add_mst_connector(struct drm_dp_mst_topology_mgr *mgr, struct drm_dp_mst_port *port, const char *pathprop)
  374. {
  375. struct intel_dp *intel_dp = container_of(mgr, struct intel_dp, mst_mgr);
  376. struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp);
  377. struct drm_device *dev = intel_dig_port->base.base.dev;
  378. struct intel_connector *intel_connector;
  379. struct drm_connector *connector;
  380. int i;
  381. intel_connector = intel_connector_alloc();
  382. if (!intel_connector)
  383. return NULL;
  384. connector = &intel_connector->base;
  385. drm_connector_init(dev, connector, &intel_dp_mst_connector_funcs, DRM_MODE_CONNECTOR_DisplayPort);
  386. drm_connector_helper_add(connector, &intel_dp_mst_connector_helper_funcs);
  387. intel_connector->get_hw_state = intel_dp_mst_get_hw_state;
  388. intel_connector->mst_port = intel_dp;
  389. intel_connector->port = port;
  390. for (i = PIPE_A; i <= PIPE_C; i++) {
  391. drm_mode_connector_attach_encoder(&intel_connector->base,
  392. &intel_dp->mst_encoders[i]->base.base);
  393. }
  394. intel_dp_add_properties(intel_dp, connector);
  395. drm_object_attach_property(&connector->base, dev->mode_config.path_property, 0);
  396. drm_object_attach_property(&connector->base, dev->mode_config.tile_property, 0);
  397. drm_mode_connector_set_path_property(connector, pathprop);
  398. return connector;
  399. }
  400. static void intel_dp_register_mst_connector(struct drm_connector *connector)
  401. {
  402. struct intel_connector *intel_connector = to_intel_connector(connector);
  403. struct drm_device *dev = connector->dev;
  404. drm_modeset_lock_all(dev);
  405. intel_connector_add_to_fbdev(intel_connector);
  406. drm_modeset_unlock_all(dev);
  407. drm_connector_register(&intel_connector->base);
  408. }
  409. static void intel_dp_destroy_mst_connector(struct drm_dp_mst_topology_mgr *mgr,
  410. struct drm_connector *connector)
  411. {
  412. struct intel_connector *intel_connector = to_intel_connector(connector);
  413. struct drm_device *dev = connector->dev;
  414. drm_connector_unregister(connector);
  415. /* need to nuke the connector */
  416. drm_modeset_lock_all(dev);
  417. intel_connector_remove_from_fbdev(intel_connector);
  418. intel_connector->mst_port = NULL;
  419. drm_modeset_unlock_all(dev);
  420. drm_connector_unreference(&intel_connector->base);
  421. DRM_DEBUG_KMS("\n");
  422. }
  423. static void intel_dp_mst_hotplug(struct drm_dp_mst_topology_mgr *mgr)
  424. {
  425. struct intel_dp *intel_dp = container_of(mgr, struct intel_dp, mst_mgr);
  426. struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp);
  427. struct drm_device *dev = intel_dig_port->base.base.dev;
  428. drm_kms_helper_hotplug_event(dev);
  429. }
  430. static const struct drm_dp_mst_topology_cbs mst_cbs = {
  431. .add_connector = intel_dp_add_mst_connector,
  432. .register_connector = intel_dp_register_mst_connector,
  433. .destroy_connector = intel_dp_destroy_mst_connector,
  434. .hotplug = intel_dp_mst_hotplug,
  435. };
  436. static struct intel_dp_mst_encoder *
  437. intel_dp_create_fake_mst_encoder(struct intel_digital_port *intel_dig_port, enum pipe pipe)
  438. {
  439. struct intel_dp_mst_encoder *intel_mst;
  440. struct intel_encoder *intel_encoder;
  441. struct drm_device *dev = intel_dig_port->base.base.dev;
  442. intel_mst = kzalloc(sizeof(*intel_mst), GFP_KERNEL);
  443. if (!intel_mst)
  444. return NULL;
  445. intel_mst->pipe = pipe;
  446. intel_encoder = &intel_mst->base;
  447. intel_mst->primary = intel_dig_port;
  448. drm_encoder_init(dev, &intel_encoder->base, &intel_dp_mst_enc_funcs,
  449. DRM_MODE_ENCODER_DPMST, "DP-MST %c", pipe_name(pipe));
  450. intel_encoder->type = INTEL_OUTPUT_DP_MST;
  451. intel_encoder->power_domain = intel_dig_port->base.power_domain;
  452. intel_encoder->port = intel_dig_port->port;
  453. intel_encoder->crtc_mask = 0x7;
  454. intel_encoder->cloneable = 0;
  455. intel_encoder->compute_config = intel_dp_mst_compute_config;
  456. intel_encoder->disable = intel_mst_disable_dp;
  457. intel_encoder->post_disable = intel_mst_post_disable_dp;
  458. intel_encoder->pre_enable = intel_mst_pre_enable_dp;
  459. intel_encoder->enable = intel_mst_enable_dp;
  460. intel_encoder->get_hw_state = intel_dp_mst_enc_get_hw_state;
  461. intel_encoder->get_config = intel_dp_mst_enc_get_config;
  462. return intel_mst;
  463. }
  464. static bool
  465. intel_dp_create_fake_mst_encoders(struct intel_digital_port *intel_dig_port)
  466. {
  467. int i;
  468. struct intel_dp *intel_dp = &intel_dig_port->dp;
  469. for (i = PIPE_A; i <= PIPE_C; i++)
  470. intel_dp->mst_encoders[i] = intel_dp_create_fake_mst_encoder(intel_dig_port, i);
  471. return true;
  472. }
  473. int
  474. intel_dp_mst_encoder_init(struct intel_digital_port *intel_dig_port, int conn_base_id)
  475. {
  476. struct intel_dp *intel_dp = &intel_dig_port->dp;
  477. struct drm_device *dev = intel_dig_port->base.base.dev;
  478. int ret;
  479. intel_dp->can_mst = true;
  480. intel_dp->mst_mgr.cbs = &mst_cbs;
  481. /* create encoders */
  482. intel_dp_create_fake_mst_encoders(intel_dig_port);
  483. ret = drm_dp_mst_topology_mgr_init(&intel_dp->mst_mgr, dev,
  484. &intel_dp->aux, 16, 3, conn_base_id);
  485. if (ret) {
  486. intel_dp->can_mst = false;
  487. return ret;
  488. }
  489. return 0;
  490. }
  491. void
  492. intel_dp_mst_encoder_cleanup(struct intel_digital_port *intel_dig_port)
  493. {
  494. struct intel_dp *intel_dp = &intel_dig_port->dp;
  495. if (!intel_dp->can_mst)
  496. return;
  497. drm_dp_mst_topology_mgr_destroy(&intel_dp->mst_mgr);
  498. /* encoders will get killed by normal cleanup */
  499. }