wmi.c 298 KB

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  1. /*
  2. * Copyright (c) 2005-2011 Atheros Communications Inc.
  3. * Copyright (c) 2011-2017 Qualcomm Atheros, Inc.
  4. * Copyright (c) 2018, The Linux Foundation. All rights reserved.
  5. *
  6. * Permission to use, copy, modify, and/or distribute this software for any
  7. * purpose with or without fee is hereby granted, provided that the above
  8. * copyright notice and this permission notice appear in all copies.
  9. *
  10. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
  11. * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  12. * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  13. * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  14. * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  15. * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  16. * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  17. */
  18. #include <linux/skbuff.h>
  19. #include <linux/ctype.h>
  20. #include "core.h"
  21. #include "htc.h"
  22. #include "debug.h"
  23. #include "wmi.h"
  24. #include "wmi-tlv.h"
  25. #include "mac.h"
  26. #include "testmode.h"
  27. #include "wmi-ops.h"
  28. #include "p2p.h"
  29. #include "hw.h"
  30. #include "hif.h"
  31. #include "txrx.h"
  32. #define ATH10K_WMI_BARRIER_ECHO_ID 0xBA991E9
  33. #define ATH10K_WMI_BARRIER_TIMEOUT_HZ (3 * HZ)
  34. #define ATH10K_WMI_DFS_CONF_TIMEOUT_HZ (HZ / 6)
  35. /* MAIN WMI cmd track */
  36. static struct wmi_cmd_map wmi_cmd_map = {
  37. .init_cmdid = WMI_INIT_CMDID,
  38. .start_scan_cmdid = WMI_START_SCAN_CMDID,
  39. .stop_scan_cmdid = WMI_STOP_SCAN_CMDID,
  40. .scan_chan_list_cmdid = WMI_SCAN_CHAN_LIST_CMDID,
  41. .scan_sch_prio_tbl_cmdid = WMI_SCAN_SCH_PRIO_TBL_CMDID,
  42. .scan_prob_req_oui_cmdid = WMI_CMD_UNSUPPORTED,
  43. .pdev_set_regdomain_cmdid = WMI_PDEV_SET_REGDOMAIN_CMDID,
  44. .pdev_set_channel_cmdid = WMI_PDEV_SET_CHANNEL_CMDID,
  45. .pdev_set_param_cmdid = WMI_PDEV_SET_PARAM_CMDID,
  46. .pdev_pktlog_enable_cmdid = WMI_PDEV_PKTLOG_ENABLE_CMDID,
  47. .pdev_pktlog_disable_cmdid = WMI_PDEV_PKTLOG_DISABLE_CMDID,
  48. .pdev_set_wmm_params_cmdid = WMI_PDEV_SET_WMM_PARAMS_CMDID,
  49. .pdev_set_ht_cap_ie_cmdid = WMI_PDEV_SET_HT_CAP_IE_CMDID,
  50. .pdev_set_vht_cap_ie_cmdid = WMI_PDEV_SET_VHT_CAP_IE_CMDID,
  51. .pdev_set_dscp_tid_map_cmdid = WMI_PDEV_SET_DSCP_TID_MAP_CMDID,
  52. .pdev_set_quiet_mode_cmdid = WMI_PDEV_SET_QUIET_MODE_CMDID,
  53. .pdev_green_ap_ps_enable_cmdid = WMI_PDEV_GREEN_AP_PS_ENABLE_CMDID,
  54. .pdev_get_tpc_config_cmdid = WMI_PDEV_GET_TPC_CONFIG_CMDID,
  55. .pdev_set_base_macaddr_cmdid = WMI_PDEV_SET_BASE_MACADDR_CMDID,
  56. .vdev_create_cmdid = WMI_VDEV_CREATE_CMDID,
  57. .vdev_delete_cmdid = WMI_VDEV_DELETE_CMDID,
  58. .vdev_start_request_cmdid = WMI_VDEV_START_REQUEST_CMDID,
  59. .vdev_restart_request_cmdid = WMI_VDEV_RESTART_REQUEST_CMDID,
  60. .vdev_up_cmdid = WMI_VDEV_UP_CMDID,
  61. .vdev_stop_cmdid = WMI_VDEV_STOP_CMDID,
  62. .vdev_down_cmdid = WMI_VDEV_DOWN_CMDID,
  63. .vdev_set_param_cmdid = WMI_VDEV_SET_PARAM_CMDID,
  64. .vdev_install_key_cmdid = WMI_VDEV_INSTALL_KEY_CMDID,
  65. .peer_create_cmdid = WMI_PEER_CREATE_CMDID,
  66. .peer_delete_cmdid = WMI_PEER_DELETE_CMDID,
  67. .peer_flush_tids_cmdid = WMI_PEER_FLUSH_TIDS_CMDID,
  68. .peer_set_param_cmdid = WMI_PEER_SET_PARAM_CMDID,
  69. .peer_assoc_cmdid = WMI_PEER_ASSOC_CMDID,
  70. .peer_add_wds_entry_cmdid = WMI_PEER_ADD_WDS_ENTRY_CMDID,
  71. .peer_remove_wds_entry_cmdid = WMI_PEER_REMOVE_WDS_ENTRY_CMDID,
  72. .peer_mcast_group_cmdid = WMI_PEER_MCAST_GROUP_CMDID,
  73. .bcn_tx_cmdid = WMI_BCN_TX_CMDID,
  74. .pdev_send_bcn_cmdid = WMI_PDEV_SEND_BCN_CMDID,
  75. .bcn_tmpl_cmdid = WMI_BCN_TMPL_CMDID,
  76. .bcn_filter_rx_cmdid = WMI_BCN_FILTER_RX_CMDID,
  77. .prb_req_filter_rx_cmdid = WMI_PRB_REQ_FILTER_RX_CMDID,
  78. .mgmt_tx_cmdid = WMI_MGMT_TX_CMDID,
  79. .prb_tmpl_cmdid = WMI_PRB_TMPL_CMDID,
  80. .addba_clear_resp_cmdid = WMI_ADDBA_CLEAR_RESP_CMDID,
  81. .addba_send_cmdid = WMI_ADDBA_SEND_CMDID,
  82. .addba_status_cmdid = WMI_ADDBA_STATUS_CMDID,
  83. .delba_send_cmdid = WMI_DELBA_SEND_CMDID,
  84. .addba_set_resp_cmdid = WMI_ADDBA_SET_RESP_CMDID,
  85. .send_singleamsdu_cmdid = WMI_SEND_SINGLEAMSDU_CMDID,
  86. .sta_powersave_mode_cmdid = WMI_STA_POWERSAVE_MODE_CMDID,
  87. .sta_powersave_param_cmdid = WMI_STA_POWERSAVE_PARAM_CMDID,
  88. .sta_mimo_ps_mode_cmdid = WMI_STA_MIMO_PS_MODE_CMDID,
  89. .pdev_dfs_enable_cmdid = WMI_PDEV_DFS_ENABLE_CMDID,
  90. .pdev_dfs_disable_cmdid = WMI_PDEV_DFS_DISABLE_CMDID,
  91. .roam_scan_mode = WMI_ROAM_SCAN_MODE,
  92. .roam_scan_rssi_threshold = WMI_ROAM_SCAN_RSSI_THRESHOLD,
  93. .roam_scan_period = WMI_ROAM_SCAN_PERIOD,
  94. .roam_scan_rssi_change_threshold = WMI_ROAM_SCAN_RSSI_CHANGE_THRESHOLD,
  95. .roam_ap_profile = WMI_ROAM_AP_PROFILE,
  96. .ofl_scan_add_ap_profile = WMI_ROAM_AP_PROFILE,
  97. .ofl_scan_remove_ap_profile = WMI_OFL_SCAN_REMOVE_AP_PROFILE,
  98. .ofl_scan_period = WMI_OFL_SCAN_PERIOD,
  99. .p2p_dev_set_device_info = WMI_P2P_DEV_SET_DEVICE_INFO,
  100. .p2p_dev_set_discoverability = WMI_P2P_DEV_SET_DISCOVERABILITY,
  101. .p2p_go_set_beacon_ie = WMI_P2P_GO_SET_BEACON_IE,
  102. .p2p_go_set_probe_resp_ie = WMI_P2P_GO_SET_PROBE_RESP_IE,
  103. .p2p_set_vendor_ie_data_cmdid = WMI_P2P_SET_VENDOR_IE_DATA_CMDID,
  104. .ap_ps_peer_param_cmdid = WMI_AP_PS_PEER_PARAM_CMDID,
  105. .ap_ps_peer_uapsd_coex_cmdid = WMI_AP_PS_PEER_UAPSD_COEX_CMDID,
  106. .peer_rate_retry_sched_cmdid = WMI_PEER_RATE_RETRY_SCHED_CMDID,
  107. .wlan_profile_trigger_cmdid = WMI_WLAN_PROFILE_TRIGGER_CMDID,
  108. .wlan_profile_set_hist_intvl_cmdid =
  109. WMI_WLAN_PROFILE_SET_HIST_INTVL_CMDID,
  110. .wlan_profile_get_profile_data_cmdid =
  111. WMI_WLAN_PROFILE_GET_PROFILE_DATA_CMDID,
  112. .wlan_profile_enable_profile_id_cmdid =
  113. WMI_WLAN_PROFILE_ENABLE_PROFILE_ID_CMDID,
  114. .wlan_profile_list_profile_id_cmdid =
  115. WMI_WLAN_PROFILE_LIST_PROFILE_ID_CMDID,
  116. .pdev_suspend_cmdid = WMI_PDEV_SUSPEND_CMDID,
  117. .pdev_resume_cmdid = WMI_PDEV_RESUME_CMDID,
  118. .add_bcn_filter_cmdid = WMI_ADD_BCN_FILTER_CMDID,
  119. .rmv_bcn_filter_cmdid = WMI_RMV_BCN_FILTER_CMDID,
  120. .wow_add_wake_pattern_cmdid = WMI_WOW_ADD_WAKE_PATTERN_CMDID,
  121. .wow_del_wake_pattern_cmdid = WMI_WOW_DEL_WAKE_PATTERN_CMDID,
  122. .wow_enable_disable_wake_event_cmdid =
  123. WMI_WOW_ENABLE_DISABLE_WAKE_EVENT_CMDID,
  124. .wow_enable_cmdid = WMI_WOW_ENABLE_CMDID,
  125. .wow_hostwakeup_from_sleep_cmdid = WMI_WOW_HOSTWAKEUP_FROM_SLEEP_CMDID,
  126. .rtt_measreq_cmdid = WMI_RTT_MEASREQ_CMDID,
  127. .rtt_tsf_cmdid = WMI_RTT_TSF_CMDID,
  128. .vdev_spectral_scan_configure_cmdid =
  129. WMI_VDEV_SPECTRAL_SCAN_CONFIGURE_CMDID,
  130. .vdev_spectral_scan_enable_cmdid = WMI_VDEV_SPECTRAL_SCAN_ENABLE_CMDID,
  131. .request_stats_cmdid = WMI_REQUEST_STATS_CMDID,
  132. .set_arp_ns_offload_cmdid = WMI_SET_ARP_NS_OFFLOAD_CMDID,
  133. .network_list_offload_config_cmdid =
  134. WMI_NETWORK_LIST_OFFLOAD_CONFIG_CMDID,
  135. .gtk_offload_cmdid = WMI_GTK_OFFLOAD_CMDID,
  136. .csa_offload_enable_cmdid = WMI_CSA_OFFLOAD_ENABLE_CMDID,
  137. .csa_offload_chanswitch_cmdid = WMI_CSA_OFFLOAD_CHANSWITCH_CMDID,
  138. .chatter_set_mode_cmdid = WMI_CHATTER_SET_MODE_CMDID,
  139. .peer_tid_addba_cmdid = WMI_PEER_TID_ADDBA_CMDID,
  140. .peer_tid_delba_cmdid = WMI_PEER_TID_DELBA_CMDID,
  141. .sta_dtim_ps_method_cmdid = WMI_STA_DTIM_PS_METHOD_CMDID,
  142. .sta_uapsd_auto_trig_cmdid = WMI_STA_UAPSD_AUTO_TRIG_CMDID,
  143. .sta_keepalive_cmd = WMI_STA_KEEPALIVE_CMD,
  144. .echo_cmdid = WMI_ECHO_CMDID,
  145. .pdev_utf_cmdid = WMI_PDEV_UTF_CMDID,
  146. .dbglog_cfg_cmdid = WMI_DBGLOG_CFG_CMDID,
  147. .pdev_qvit_cmdid = WMI_PDEV_QVIT_CMDID,
  148. .pdev_ftm_intg_cmdid = WMI_PDEV_FTM_INTG_CMDID,
  149. .vdev_set_keepalive_cmdid = WMI_VDEV_SET_KEEPALIVE_CMDID,
  150. .vdev_get_keepalive_cmdid = WMI_VDEV_GET_KEEPALIVE_CMDID,
  151. .force_fw_hang_cmdid = WMI_FORCE_FW_HANG_CMDID,
  152. .gpio_config_cmdid = WMI_GPIO_CONFIG_CMDID,
  153. .gpio_output_cmdid = WMI_GPIO_OUTPUT_CMDID,
  154. .pdev_get_temperature_cmdid = WMI_CMD_UNSUPPORTED,
  155. .pdev_enable_adaptive_cca_cmdid = WMI_CMD_UNSUPPORTED,
  156. .scan_update_request_cmdid = WMI_CMD_UNSUPPORTED,
  157. .vdev_standby_response_cmdid = WMI_CMD_UNSUPPORTED,
  158. .vdev_resume_response_cmdid = WMI_CMD_UNSUPPORTED,
  159. .wlan_peer_caching_add_peer_cmdid = WMI_CMD_UNSUPPORTED,
  160. .wlan_peer_caching_evict_peer_cmdid = WMI_CMD_UNSUPPORTED,
  161. .wlan_peer_caching_restore_peer_cmdid = WMI_CMD_UNSUPPORTED,
  162. .wlan_peer_caching_print_all_peers_info_cmdid = WMI_CMD_UNSUPPORTED,
  163. .peer_update_wds_entry_cmdid = WMI_CMD_UNSUPPORTED,
  164. .peer_add_proxy_sta_entry_cmdid = WMI_CMD_UNSUPPORTED,
  165. .rtt_keepalive_cmdid = WMI_CMD_UNSUPPORTED,
  166. .oem_req_cmdid = WMI_CMD_UNSUPPORTED,
  167. .nan_cmdid = WMI_CMD_UNSUPPORTED,
  168. .vdev_ratemask_cmdid = WMI_CMD_UNSUPPORTED,
  169. .qboost_cfg_cmdid = WMI_CMD_UNSUPPORTED,
  170. .pdev_smart_ant_enable_cmdid = WMI_CMD_UNSUPPORTED,
  171. .pdev_smart_ant_set_rx_antenna_cmdid = WMI_CMD_UNSUPPORTED,
  172. .peer_smart_ant_set_tx_antenna_cmdid = WMI_CMD_UNSUPPORTED,
  173. .peer_smart_ant_set_train_info_cmdid = WMI_CMD_UNSUPPORTED,
  174. .peer_smart_ant_set_node_config_ops_cmdid = WMI_CMD_UNSUPPORTED,
  175. .pdev_set_antenna_switch_table_cmdid = WMI_CMD_UNSUPPORTED,
  176. .pdev_set_ctl_table_cmdid = WMI_CMD_UNSUPPORTED,
  177. .pdev_set_mimogain_table_cmdid = WMI_CMD_UNSUPPORTED,
  178. .pdev_ratepwr_table_cmdid = WMI_CMD_UNSUPPORTED,
  179. .pdev_ratepwr_chainmsk_table_cmdid = WMI_CMD_UNSUPPORTED,
  180. .pdev_fips_cmdid = WMI_CMD_UNSUPPORTED,
  181. .tt_set_conf_cmdid = WMI_CMD_UNSUPPORTED,
  182. .fwtest_cmdid = WMI_CMD_UNSUPPORTED,
  183. .vdev_atf_request_cmdid = WMI_CMD_UNSUPPORTED,
  184. .peer_atf_request_cmdid = WMI_CMD_UNSUPPORTED,
  185. .pdev_get_ani_cck_config_cmdid = WMI_CMD_UNSUPPORTED,
  186. .pdev_get_ani_ofdm_config_cmdid = WMI_CMD_UNSUPPORTED,
  187. .pdev_reserve_ast_entry_cmdid = WMI_CMD_UNSUPPORTED,
  188. .pdev_get_nfcal_power_cmdid = WMI_CMD_UNSUPPORTED,
  189. .pdev_get_tpc_cmdid = WMI_CMD_UNSUPPORTED,
  190. .pdev_get_ast_info_cmdid = WMI_CMD_UNSUPPORTED,
  191. .vdev_set_dscp_tid_map_cmdid = WMI_CMD_UNSUPPORTED,
  192. .pdev_get_info_cmdid = WMI_CMD_UNSUPPORTED,
  193. .vdev_get_info_cmdid = WMI_CMD_UNSUPPORTED,
  194. .vdev_filter_neighbor_rx_packets_cmdid = WMI_CMD_UNSUPPORTED,
  195. .mu_cal_start_cmdid = WMI_CMD_UNSUPPORTED,
  196. .set_cca_params_cmdid = WMI_CMD_UNSUPPORTED,
  197. .pdev_bss_chan_info_request_cmdid = WMI_CMD_UNSUPPORTED,
  198. .pdev_get_tpc_table_cmdid = WMI_CMD_UNSUPPORTED,
  199. .radar_found_cmdid = WMI_CMD_UNSUPPORTED,
  200. };
  201. /* 10.X WMI cmd track */
  202. static struct wmi_cmd_map wmi_10x_cmd_map = {
  203. .init_cmdid = WMI_10X_INIT_CMDID,
  204. .start_scan_cmdid = WMI_10X_START_SCAN_CMDID,
  205. .stop_scan_cmdid = WMI_10X_STOP_SCAN_CMDID,
  206. .scan_chan_list_cmdid = WMI_10X_SCAN_CHAN_LIST_CMDID,
  207. .scan_sch_prio_tbl_cmdid = WMI_CMD_UNSUPPORTED,
  208. .scan_prob_req_oui_cmdid = WMI_CMD_UNSUPPORTED,
  209. .pdev_set_regdomain_cmdid = WMI_10X_PDEV_SET_REGDOMAIN_CMDID,
  210. .pdev_set_channel_cmdid = WMI_10X_PDEV_SET_CHANNEL_CMDID,
  211. .pdev_set_param_cmdid = WMI_10X_PDEV_SET_PARAM_CMDID,
  212. .pdev_pktlog_enable_cmdid = WMI_10X_PDEV_PKTLOG_ENABLE_CMDID,
  213. .pdev_pktlog_disable_cmdid = WMI_10X_PDEV_PKTLOG_DISABLE_CMDID,
  214. .pdev_set_wmm_params_cmdid = WMI_10X_PDEV_SET_WMM_PARAMS_CMDID,
  215. .pdev_set_ht_cap_ie_cmdid = WMI_10X_PDEV_SET_HT_CAP_IE_CMDID,
  216. .pdev_set_vht_cap_ie_cmdid = WMI_10X_PDEV_SET_VHT_CAP_IE_CMDID,
  217. .pdev_set_dscp_tid_map_cmdid = WMI_10X_PDEV_SET_DSCP_TID_MAP_CMDID,
  218. .pdev_set_quiet_mode_cmdid = WMI_10X_PDEV_SET_QUIET_MODE_CMDID,
  219. .pdev_green_ap_ps_enable_cmdid = WMI_10X_PDEV_GREEN_AP_PS_ENABLE_CMDID,
  220. .pdev_get_tpc_config_cmdid = WMI_10X_PDEV_GET_TPC_CONFIG_CMDID,
  221. .pdev_set_base_macaddr_cmdid = WMI_10X_PDEV_SET_BASE_MACADDR_CMDID,
  222. .vdev_create_cmdid = WMI_10X_VDEV_CREATE_CMDID,
  223. .vdev_delete_cmdid = WMI_10X_VDEV_DELETE_CMDID,
  224. .vdev_start_request_cmdid = WMI_10X_VDEV_START_REQUEST_CMDID,
  225. .vdev_restart_request_cmdid = WMI_10X_VDEV_RESTART_REQUEST_CMDID,
  226. .vdev_up_cmdid = WMI_10X_VDEV_UP_CMDID,
  227. .vdev_stop_cmdid = WMI_10X_VDEV_STOP_CMDID,
  228. .vdev_down_cmdid = WMI_10X_VDEV_DOWN_CMDID,
  229. .vdev_set_param_cmdid = WMI_10X_VDEV_SET_PARAM_CMDID,
  230. .vdev_install_key_cmdid = WMI_10X_VDEV_INSTALL_KEY_CMDID,
  231. .peer_create_cmdid = WMI_10X_PEER_CREATE_CMDID,
  232. .peer_delete_cmdid = WMI_10X_PEER_DELETE_CMDID,
  233. .peer_flush_tids_cmdid = WMI_10X_PEER_FLUSH_TIDS_CMDID,
  234. .peer_set_param_cmdid = WMI_10X_PEER_SET_PARAM_CMDID,
  235. .peer_assoc_cmdid = WMI_10X_PEER_ASSOC_CMDID,
  236. .peer_add_wds_entry_cmdid = WMI_10X_PEER_ADD_WDS_ENTRY_CMDID,
  237. .peer_remove_wds_entry_cmdid = WMI_10X_PEER_REMOVE_WDS_ENTRY_CMDID,
  238. .peer_mcast_group_cmdid = WMI_10X_PEER_MCAST_GROUP_CMDID,
  239. .bcn_tx_cmdid = WMI_10X_BCN_TX_CMDID,
  240. .pdev_send_bcn_cmdid = WMI_10X_PDEV_SEND_BCN_CMDID,
  241. .bcn_tmpl_cmdid = WMI_CMD_UNSUPPORTED,
  242. .bcn_filter_rx_cmdid = WMI_10X_BCN_FILTER_RX_CMDID,
  243. .prb_req_filter_rx_cmdid = WMI_10X_PRB_REQ_FILTER_RX_CMDID,
  244. .mgmt_tx_cmdid = WMI_10X_MGMT_TX_CMDID,
  245. .prb_tmpl_cmdid = WMI_CMD_UNSUPPORTED,
  246. .addba_clear_resp_cmdid = WMI_10X_ADDBA_CLEAR_RESP_CMDID,
  247. .addba_send_cmdid = WMI_10X_ADDBA_SEND_CMDID,
  248. .addba_status_cmdid = WMI_10X_ADDBA_STATUS_CMDID,
  249. .delba_send_cmdid = WMI_10X_DELBA_SEND_CMDID,
  250. .addba_set_resp_cmdid = WMI_10X_ADDBA_SET_RESP_CMDID,
  251. .send_singleamsdu_cmdid = WMI_10X_SEND_SINGLEAMSDU_CMDID,
  252. .sta_powersave_mode_cmdid = WMI_10X_STA_POWERSAVE_MODE_CMDID,
  253. .sta_powersave_param_cmdid = WMI_10X_STA_POWERSAVE_PARAM_CMDID,
  254. .sta_mimo_ps_mode_cmdid = WMI_10X_STA_MIMO_PS_MODE_CMDID,
  255. .pdev_dfs_enable_cmdid = WMI_10X_PDEV_DFS_ENABLE_CMDID,
  256. .pdev_dfs_disable_cmdid = WMI_10X_PDEV_DFS_DISABLE_CMDID,
  257. .roam_scan_mode = WMI_10X_ROAM_SCAN_MODE,
  258. .roam_scan_rssi_threshold = WMI_10X_ROAM_SCAN_RSSI_THRESHOLD,
  259. .roam_scan_period = WMI_10X_ROAM_SCAN_PERIOD,
  260. .roam_scan_rssi_change_threshold =
  261. WMI_10X_ROAM_SCAN_RSSI_CHANGE_THRESHOLD,
  262. .roam_ap_profile = WMI_10X_ROAM_AP_PROFILE,
  263. .ofl_scan_add_ap_profile = WMI_10X_OFL_SCAN_ADD_AP_PROFILE,
  264. .ofl_scan_remove_ap_profile = WMI_10X_OFL_SCAN_REMOVE_AP_PROFILE,
  265. .ofl_scan_period = WMI_10X_OFL_SCAN_PERIOD,
  266. .p2p_dev_set_device_info = WMI_10X_P2P_DEV_SET_DEVICE_INFO,
  267. .p2p_dev_set_discoverability = WMI_10X_P2P_DEV_SET_DISCOVERABILITY,
  268. .p2p_go_set_beacon_ie = WMI_10X_P2P_GO_SET_BEACON_IE,
  269. .p2p_go_set_probe_resp_ie = WMI_10X_P2P_GO_SET_PROBE_RESP_IE,
  270. .p2p_set_vendor_ie_data_cmdid = WMI_CMD_UNSUPPORTED,
  271. .ap_ps_peer_param_cmdid = WMI_10X_AP_PS_PEER_PARAM_CMDID,
  272. .ap_ps_peer_uapsd_coex_cmdid = WMI_CMD_UNSUPPORTED,
  273. .peer_rate_retry_sched_cmdid = WMI_10X_PEER_RATE_RETRY_SCHED_CMDID,
  274. .wlan_profile_trigger_cmdid = WMI_10X_WLAN_PROFILE_TRIGGER_CMDID,
  275. .wlan_profile_set_hist_intvl_cmdid =
  276. WMI_10X_WLAN_PROFILE_SET_HIST_INTVL_CMDID,
  277. .wlan_profile_get_profile_data_cmdid =
  278. WMI_10X_WLAN_PROFILE_GET_PROFILE_DATA_CMDID,
  279. .wlan_profile_enable_profile_id_cmdid =
  280. WMI_10X_WLAN_PROFILE_ENABLE_PROFILE_ID_CMDID,
  281. .wlan_profile_list_profile_id_cmdid =
  282. WMI_10X_WLAN_PROFILE_LIST_PROFILE_ID_CMDID,
  283. .pdev_suspend_cmdid = WMI_10X_PDEV_SUSPEND_CMDID,
  284. .pdev_resume_cmdid = WMI_10X_PDEV_RESUME_CMDID,
  285. .add_bcn_filter_cmdid = WMI_10X_ADD_BCN_FILTER_CMDID,
  286. .rmv_bcn_filter_cmdid = WMI_10X_RMV_BCN_FILTER_CMDID,
  287. .wow_add_wake_pattern_cmdid = WMI_10X_WOW_ADD_WAKE_PATTERN_CMDID,
  288. .wow_del_wake_pattern_cmdid = WMI_10X_WOW_DEL_WAKE_PATTERN_CMDID,
  289. .wow_enable_disable_wake_event_cmdid =
  290. WMI_10X_WOW_ENABLE_DISABLE_WAKE_EVENT_CMDID,
  291. .wow_enable_cmdid = WMI_10X_WOW_ENABLE_CMDID,
  292. .wow_hostwakeup_from_sleep_cmdid =
  293. WMI_10X_WOW_HOSTWAKEUP_FROM_SLEEP_CMDID,
  294. .rtt_measreq_cmdid = WMI_10X_RTT_MEASREQ_CMDID,
  295. .rtt_tsf_cmdid = WMI_10X_RTT_TSF_CMDID,
  296. .vdev_spectral_scan_configure_cmdid =
  297. WMI_10X_VDEV_SPECTRAL_SCAN_CONFIGURE_CMDID,
  298. .vdev_spectral_scan_enable_cmdid =
  299. WMI_10X_VDEV_SPECTRAL_SCAN_ENABLE_CMDID,
  300. .request_stats_cmdid = WMI_10X_REQUEST_STATS_CMDID,
  301. .set_arp_ns_offload_cmdid = WMI_CMD_UNSUPPORTED,
  302. .network_list_offload_config_cmdid = WMI_CMD_UNSUPPORTED,
  303. .gtk_offload_cmdid = WMI_CMD_UNSUPPORTED,
  304. .csa_offload_enable_cmdid = WMI_CMD_UNSUPPORTED,
  305. .csa_offload_chanswitch_cmdid = WMI_CMD_UNSUPPORTED,
  306. .chatter_set_mode_cmdid = WMI_CMD_UNSUPPORTED,
  307. .peer_tid_addba_cmdid = WMI_CMD_UNSUPPORTED,
  308. .peer_tid_delba_cmdid = WMI_CMD_UNSUPPORTED,
  309. .sta_dtim_ps_method_cmdid = WMI_CMD_UNSUPPORTED,
  310. .sta_uapsd_auto_trig_cmdid = WMI_CMD_UNSUPPORTED,
  311. .sta_keepalive_cmd = WMI_CMD_UNSUPPORTED,
  312. .echo_cmdid = WMI_10X_ECHO_CMDID,
  313. .pdev_utf_cmdid = WMI_10X_PDEV_UTF_CMDID,
  314. .dbglog_cfg_cmdid = WMI_10X_DBGLOG_CFG_CMDID,
  315. .pdev_qvit_cmdid = WMI_10X_PDEV_QVIT_CMDID,
  316. .pdev_ftm_intg_cmdid = WMI_CMD_UNSUPPORTED,
  317. .vdev_set_keepalive_cmdid = WMI_CMD_UNSUPPORTED,
  318. .vdev_get_keepalive_cmdid = WMI_CMD_UNSUPPORTED,
  319. .force_fw_hang_cmdid = WMI_CMD_UNSUPPORTED,
  320. .gpio_config_cmdid = WMI_10X_GPIO_CONFIG_CMDID,
  321. .gpio_output_cmdid = WMI_10X_GPIO_OUTPUT_CMDID,
  322. .pdev_get_temperature_cmdid = WMI_CMD_UNSUPPORTED,
  323. .pdev_enable_adaptive_cca_cmdid = WMI_CMD_UNSUPPORTED,
  324. .scan_update_request_cmdid = WMI_CMD_UNSUPPORTED,
  325. .vdev_standby_response_cmdid = WMI_CMD_UNSUPPORTED,
  326. .vdev_resume_response_cmdid = WMI_CMD_UNSUPPORTED,
  327. .wlan_peer_caching_add_peer_cmdid = WMI_CMD_UNSUPPORTED,
  328. .wlan_peer_caching_evict_peer_cmdid = WMI_CMD_UNSUPPORTED,
  329. .wlan_peer_caching_restore_peer_cmdid = WMI_CMD_UNSUPPORTED,
  330. .wlan_peer_caching_print_all_peers_info_cmdid = WMI_CMD_UNSUPPORTED,
  331. .peer_update_wds_entry_cmdid = WMI_CMD_UNSUPPORTED,
  332. .peer_add_proxy_sta_entry_cmdid = WMI_CMD_UNSUPPORTED,
  333. .rtt_keepalive_cmdid = WMI_CMD_UNSUPPORTED,
  334. .oem_req_cmdid = WMI_CMD_UNSUPPORTED,
  335. .nan_cmdid = WMI_CMD_UNSUPPORTED,
  336. .vdev_ratemask_cmdid = WMI_CMD_UNSUPPORTED,
  337. .qboost_cfg_cmdid = WMI_CMD_UNSUPPORTED,
  338. .pdev_smart_ant_enable_cmdid = WMI_CMD_UNSUPPORTED,
  339. .pdev_smart_ant_set_rx_antenna_cmdid = WMI_CMD_UNSUPPORTED,
  340. .peer_smart_ant_set_tx_antenna_cmdid = WMI_CMD_UNSUPPORTED,
  341. .peer_smart_ant_set_train_info_cmdid = WMI_CMD_UNSUPPORTED,
  342. .peer_smart_ant_set_node_config_ops_cmdid = WMI_CMD_UNSUPPORTED,
  343. .pdev_set_antenna_switch_table_cmdid = WMI_CMD_UNSUPPORTED,
  344. .pdev_set_ctl_table_cmdid = WMI_CMD_UNSUPPORTED,
  345. .pdev_set_mimogain_table_cmdid = WMI_CMD_UNSUPPORTED,
  346. .pdev_ratepwr_table_cmdid = WMI_CMD_UNSUPPORTED,
  347. .pdev_ratepwr_chainmsk_table_cmdid = WMI_CMD_UNSUPPORTED,
  348. .pdev_fips_cmdid = WMI_CMD_UNSUPPORTED,
  349. .tt_set_conf_cmdid = WMI_CMD_UNSUPPORTED,
  350. .fwtest_cmdid = WMI_CMD_UNSUPPORTED,
  351. .vdev_atf_request_cmdid = WMI_CMD_UNSUPPORTED,
  352. .peer_atf_request_cmdid = WMI_CMD_UNSUPPORTED,
  353. .pdev_get_ani_cck_config_cmdid = WMI_CMD_UNSUPPORTED,
  354. .pdev_get_ani_ofdm_config_cmdid = WMI_CMD_UNSUPPORTED,
  355. .pdev_reserve_ast_entry_cmdid = WMI_CMD_UNSUPPORTED,
  356. .pdev_get_nfcal_power_cmdid = WMI_CMD_UNSUPPORTED,
  357. .pdev_get_tpc_cmdid = WMI_CMD_UNSUPPORTED,
  358. .pdev_get_ast_info_cmdid = WMI_CMD_UNSUPPORTED,
  359. .vdev_set_dscp_tid_map_cmdid = WMI_CMD_UNSUPPORTED,
  360. .pdev_get_info_cmdid = WMI_CMD_UNSUPPORTED,
  361. .vdev_get_info_cmdid = WMI_CMD_UNSUPPORTED,
  362. .vdev_filter_neighbor_rx_packets_cmdid = WMI_CMD_UNSUPPORTED,
  363. .mu_cal_start_cmdid = WMI_CMD_UNSUPPORTED,
  364. .set_cca_params_cmdid = WMI_CMD_UNSUPPORTED,
  365. .pdev_bss_chan_info_request_cmdid = WMI_CMD_UNSUPPORTED,
  366. .pdev_get_tpc_table_cmdid = WMI_CMD_UNSUPPORTED,
  367. .radar_found_cmdid = WMI_CMD_UNSUPPORTED,
  368. };
  369. /* 10.2.4 WMI cmd track */
  370. static struct wmi_cmd_map wmi_10_2_4_cmd_map = {
  371. .init_cmdid = WMI_10_2_INIT_CMDID,
  372. .start_scan_cmdid = WMI_10_2_START_SCAN_CMDID,
  373. .stop_scan_cmdid = WMI_10_2_STOP_SCAN_CMDID,
  374. .scan_chan_list_cmdid = WMI_10_2_SCAN_CHAN_LIST_CMDID,
  375. .scan_sch_prio_tbl_cmdid = WMI_CMD_UNSUPPORTED,
  376. .scan_prob_req_oui_cmdid = WMI_CMD_UNSUPPORTED,
  377. .pdev_set_regdomain_cmdid = WMI_10_2_PDEV_SET_REGDOMAIN_CMDID,
  378. .pdev_set_channel_cmdid = WMI_10_2_PDEV_SET_CHANNEL_CMDID,
  379. .pdev_set_param_cmdid = WMI_10_2_PDEV_SET_PARAM_CMDID,
  380. .pdev_pktlog_enable_cmdid = WMI_10_2_PDEV_PKTLOG_ENABLE_CMDID,
  381. .pdev_pktlog_disable_cmdid = WMI_10_2_PDEV_PKTLOG_DISABLE_CMDID,
  382. .pdev_set_wmm_params_cmdid = WMI_10_2_PDEV_SET_WMM_PARAMS_CMDID,
  383. .pdev_set_ht_cap_ie_cmdid = WMI_10_2_PDEV_SET_HT_CAP_IE_CMDID,
  384. .pdev_set_vht_cap_ie_cmdid = WMI_10_2_PDEV_SET_VHT_CAP_IE_CMDID,
  385. .pdev_set_quiet_mode_cmdid = WMI_10_2_PDEV_SET_QUIET_MODE_CMDID,
  386. .pdev_green_ap_ps_enable_cmdid = WMI_10_2_PDEV_GREEN_AP_PS_ENABLE_CMDID,
  387. .pdev_get_tpc_config_cmdid = WMI_10_2_PDEV_GET_TPC_CONFIG_CMDID,
  388. .pdev_set_base_macaddr_cmdid = WMI_10_2_PDEV_SET_BASE_MACADDR_CMDID,
  389. .vdev_create_cmdid = WMI_10_2_VDEV_CREATE_CMDID,
  390. .vdev_delete_cmdid = WMI_10_2_VDEV_DELETE_CMDID,
  391. .vdev_start_request_cmdid = WMI_10_2_VDEV_START_REQUEST_CMDID,
  392. .vdev_restart_request_cmdid = WMI_10_2_VDEV_RESTART_REQUEST_CMDID,
  393. .vdev_up_cmdid = WMI_10_2_VDEV_UP_CMDID,
  394. .vdev_stop_cmdid = WMI_10_2_VDEV_STOP_CMDID,
  395. .vdev_down_cmdid = WMI_10_2_VDEV_DOWN_CMDID,
  396. .vdev_set_param_cmdid = WMI_10_2_VDEV_SET_PARAM_CMDID,
  397. .vdev_install_key_cmdid = WMI_10_2_VDEV_INSTALL_KEY_CMDID,
  398. .peer_create_cmdid = WMI_10_2_PEER_CREATE_CMDID,
  399. .peer_delete_cmdid = WMI_10_2_PEER_DELETE_CMDID,
  400. .peer_flush_tids_cmdid = WMI_10_2_PEER_FLUSH_TIDS_CMDID,
  401. .peer_set_param_cmdid = WMI_10_2_PEER_SET_PARAM_CMDID,
  402. .peer_assoc_cmdid = WMI_10_2_PEER_ASSOC_CMDID,
  403. .peer_add_wds_entry_cmdid = WMI_10_2_PEER_ADD_WDS_ENTRY_CMDID,
  404. .peer_remove_wds_entry_cmdid = WMI_10_2_PEER_REMOVE_WDS_ENTRY_CMDID,
  405. .peer_mcast_group_cmdid = WMI_10_2_PEER_MCAST_GROUP_CMDID,
  406. .bcn_tx_cmdid = WMI_10_2_BCN_TX_CMDID,
  407. .pdev_send_bcn_cmdid = WMI_10_2_PDEV_SEND_BCN_CMDID,
  408. .bcn_tmpl_cmdid = WMI_CMD_UNSUPPORTED,
  409. .bcn_filter_rx_cmdid = WMI_10_2_BCN_FILTER_RX_CMDID,
  410. .prb_req_filter_rx_cmdid = WMI_10_2_PRB_REQ_FILTER_RX_CMDID,
  411. .mgmt_tx_cmdid = WMI_10_2_MGMT_TX_CMDID,
  412. .prb_tmpl_cmdid = WMI_CMD_UNSUPPORTED,
  413. .addba_clear_resp_cmdid = WMI_10_2_ADDBA_CLEAR_RESP_CMDID,
  414. .addba_send_cmdid = WMI_10_2_ADDBA_SEND_CMDID,
  415. .addba_status_cmdid = WMI_10_2_ADDBA_STATUS_CMDID,
  416. .delba_send_cmdid = WMI_10_2_DELBA_SEND_CMDID,
  417. .addba_set_resp_cmdid = WMI_10_2_ADDBA_SET_RESP_CMDID,
  418. .send_singleamsdu_cmdid = WMI_10_2_SEND_SINGLEAMSDU_CMDID,
  419. .sta_powersave_mode_cmdid = WMI_10_2_STA_POWERSAVE_MODE_CMDID,
  420. .sta_powersave_param_cmdid = WMI_10_2_STA_POWERSAVE_PARAM_CMDID,
  421. .sta_mimo_ps_mode_cmdid = WMI_10_2_STA_MIMO_PS_MODE_CMDID,
  422. .pdev_dfs_enable_cmdid = WMI_10_2_PDEV_DFS_ENABLE_CMDID,
  423. .pdev_dfs_disable_cmdid = WMI_10_2_PDEV_DFS_DISABLE_CMDID,
  424. .roam_scan_mode = WMI_10_2_ROAM_SCAN_MODE,
  425. .roam_scan_rssi_threshold = WMI_10_2_ROAM_SCAN_RSSI_THRESHOLD,
  426. .roam_scan_period = WMI_10_2_ROAM_SCAN_PERIOD,
  427. .roam_scan_rssi_change_threshold =
  428. WMI_10_2_ROAM_SCAN_RSSI_CHANGE_THRESHOLD,
  429. .roam_ap_profile = WMI_10_2_ROAM_AP_PROFILE,
  430. .ofl_scan_add_ap_profile = WMI_10_2_OFL_SCAN_ADD_AP_PROFILE,
  431. .ofl_scan_remove_ap_profile = WMI_10_2_OFL_SCAN_REMOVE_AP_PROFILE,
  432. .ofl_scan_period = WMI_10_2_OFL_SCAN_PERIOD,
  433. .p2p_dev_set_device_info = WMI_10_2_P2P_DEV_SET_DEVICE_INFO,
  434. .p2p_dev_set_discoverability = WMI_10_2_P2P_DEV_SET_DISCOVERABILITY,
  435. .p2p_go_set_beacon_ie = WMI_10_2_P2P_GO_SET_BEACON_IE,
  436. .p2p_go_set_probe_resp_ie = WMI_10_2_P2P_GO_SET_PROBE_RESP_IE,
  437. .p2p_set_vendor_ie_data_cmdid = WMI_CMD_UNSUPPORTED,
  438. .ap_ps_peer_param_cmdid = WMI_10_2_AP_PS_PEER_PARAM_CMDID,
  439. .ap_ps_peer_uapsd_coex_cmdid = WMI_CMD_UNSUPPORTED,
  440. .peer_rate_retry_sched_cmdid = WMI_10_2_PEER_RATE_RETRY_SCHED_CMDID,
  441. .wlan_profile_trigger_cmdid = WMI_10_2_WLAN_PROFILE_TRIGGER_CMDID,
  442. .wlan_profile_set_hist_intvl_cmdid =
  443. WMI_10_2_WLAN_PROFILE_SET_HIST_INTVL_CMDID,
  444. .wlan_profile_get_profile_data_cmdid =
  445. WMI_10_2_WLAN_PROFILE_GET_PROFILE_DATA_CMDID,
  446. .wlan_profile_enable_profile_id_cmdid =
  447. WMI_10_2_WLAN_PROFILE_ENABLE_PROFILE_ID_CMDID,
  448. .wlan_profile_list_profile_id_cmdid =
  449. WMI_10_2_WLAN_PROFILE_LIST_PROFILE_ID_CMDID,
  450. .pdev_suspend_cmdid = WMI_10_2_PDEV_SUSPEND_CMDID,
  451. .pdev_resume_cmdid = WMI_10_2_PDEV_RESUME_CMDID,
  452. .add_bcn_filter_cmdid = WMI_10_2_ADD_BCN_FILTER_CMDID,
  453. .rmv_bcn_filter_cmdid = WMI_10_2_RMV_BCN_FILTER_CMDID,
  454. .wow_add_wake_pattern_cmdid = WMI_10_2_WOW_ADD_WAKE_PATTERN_CMDID,
  455. .wow_del_wake_pattern_cmdid = WMI_10_2_WOW_DEL_WAKE_PATTERN_CMDID,
  456. .wow_enable_disable_wake_event_cmdid =
  457. WMI_10_2_WOW_ENABLE_DISABLE_WAKE_EVENT_CMDID,
  458. .wow_enable_cmdid = WMI_10_2_WOW_ENABLE_CMDID,
  459. .wow_hostwakeup_from_sleep_cmdid =
  460. WMI_10_2_WOW_HOSTWAKEUP_FROM_SLEEP_CMDID,
  461. .rtt_measreq_cmdid = WMI_10_2_RTT_MEASREQ_CMDID,
  462. .rtt_tsf_cmdid = WMI_10_2_RTT_TSF_CMDID,
  463. .vdev_spectral_scan_configure_cmdid =
  464. WMI_10_2_VDEV_SPECTRAL_SCAN_CONFIGURE_CMDID,
  465. .vdev_spectral_scan_enable_cmdid =
  466. WMI_10_2_VDEV_SPECTRAL_SCAN_ENABLE_CMDID,
  467. .request_stats_cmdid = WMI_10_2_REQUEST_STATS_CMDID,
  468. .set_arp_ns_offload_cmdid = WMI_CMD_UNSUPPORTED,
  469. .network_list_offload_config_cmdid = WMI_CMD_UNSUPPORTED,
  470. .gtk_offload_cmdid = WMI_CMD_UNSUPPORTED,
  471. .csa_offload_enable_cmdid = WMI_CMD_UNSUPPORTED,
  472. .csa_offload_chanswitch_cmdid = WMI_CMD_UNSUPPORTED,
  473. .chatter_set_mode_cmdid = WMI_CMD_UNSUPPORTED,
  474. .peer_tid_addba_cmdid = WMI_CMD_UNSUPPORTED,
  475. .peer_tid_delba_cmdid = WMI_CMD_UNSUPPORTED,
  476. .sta_dtim_ps_method_cmdid = WMI_CMD_UNSUPPORTED,
  477. .sta_uapsd_auto_trig_cmdid = WMI_CMD_UNSUPPORTED,
  478. .sta_keepalive_cmd = WMI_CMD_UNSUPPORTED,
  479. .echo_cmdid = WMI_10_2_ECHO_CMDID,
  480. .pdev_utf_cmdid = WMI_10_2_PDEV_UTF_CMDID,
  481. .dbglog_cfg_cmdid = WMI_10_2_DBGLOG_CFG_CMDID,
  482. .pdev_qvit_cmdid = WMI_10_2_PDEV_QVIT_CMDID,
  483. .pdev_ftm_intg_cmdid = WMI_CMD_UNSUPPORTED,
  484. .vdev_set_keepalive_cmdid = WMI_CMD_UNSUPPORTED,
  485. .vdev_get_keepalive_cmdid = WMI_CMD_UNSUPPORTED,
  486. .force_fw_hang_cmdid = WMI_CMD_UNSUPPORTED,
  487. .gpio_config_cmdid = WMI_10_2_GPIO_CONFIG_CMDID,
  488. .gpio_output_cmdid = WMI_10_2_GPIO_OUTPUT_CMDID,
  489. .pdev_get_temperature_cmdid = WMI_10_2_PDEV_GET_TEMPERATURE_CMDID,
  490. .pdev_enable_adaptive_cca_cmdid = WMI_10_2_SET_CCA_PARAMS,
  491. .scan_update_request_cmdid = WMI_CMD_UNSUPPORTED,
  492. .vdev_standby_response_cmdid = WMI_CMD_UNSUPPORTED,
  493. .vdev_resume_response_cmdid = WMI_CMD_UNSUPPORTED,
  494. .wlan_peer_caching_add_peer_cmdid = WMI_CMD_UNSUPPORTED,
  495. .wlan_peer_caching_evict_peer_cmdid = WMI_CMD_UNSUPPORTED,
  496. .wlan_peer_caching_restore_peer_cmdid = WMI_CMD_UNSUPPORTED,
  497. .wlan_peer_caching_print_all_peers_info_cmdid = WMI_CMD_UNSUPPORTED,
  498. .peer_update_wds_entry_cmdid = WMI_CMD_UNSUPPORTED,
  499. .peer_add_proxy_sta_entry_cmdid = WMI_CMD_UNSUPPORTED,
  500. .rtt_keepalive_cmdid = WMI_CMD_UNSUPPORTED,
  501. .oem_req_cmdid = WMI_CMD_UNSUPPORTED,
  502. .nan_cmdid = WMI_CMD_UNSUPPORTED,
  503. .vdev_ratemask_cmdid = WMI_CMD_UNSUPPORTED,
  504. .qboost_cfg_cmdid = WMI_CMD_UNSUPPORTED,
  505. .pdev_smart_ant_enable_cmdid = WMI_CMD_UNSUPPORTED,
  506. .pdev_smart_ant_set_rx_antenna_cmdid = WMI_CMD_UNSUPPORTED,
  507. .peer_smart_ant_set_tx_antenna_cmdid = WMI_CMD_UNSUPPORTED,
  508. .peer_smart_ant_set_train_info_cmdid = WMI_CMD_UNSUPPORTED,
  509. .peer_smart_ant_set_node_config_ops_cmdid = WMI_CMD_UNSUPPORTED,
  510. .pdev_set_antenna_switch_table_cmdid = WMI_CMD_UNSUPPORTED,
  511. .pdev_set_ctl_table_cmdid = WMI_CMD_UNSUPPORTED,
  512. .pdev_set_mimogain_table_cmdid = WMI_CMD_UNSUPPORTED,
  513. .pdev_ratepwr_table_cmdid = WMI_CMD_UNSUPPORTED,
  514. .pdev_ratepwr_chainmsk_table_cmdid = WMI_CMD_UNSUPPORTED,
  515. .pdev_fips_cmdid = WMI_CMD_UNSUPPORTED,
  516. .tt_set_conf_cmdid = WMI_CMD_UNSUPPORTED,
  517. .fwtest_cmdid = WMI_CMD_UNSUPPORTED,
  518. .vdev_atf_request_cmdid = WMI_CMD_UNSUPPORTED,
  519. .peer_atf_request_cmdid = WMI_CMD_UNSUPPORTED,
  520. .pdev_get_ani_cck_config_cmdid = WMI_CMD_UNSUPPORTED,
  521. .pdev_get_ani_ofdm_config_cmdid = WMI_CMD_UNSUPPORTED,
  522. .pdev_reserve_ast_entry_cmdid = WMI_CMD_UNSUPPORTED,
  523. .pdev_get_nfcal_power_cmdid = WMI_CMD_UNSUPPORTED,
  524. .pdev_get_tpc_cmdid = WMI_CMD_UNSUPPORTED,
  525. .pdev_get_ast_info_cmdid = WMI_CMD_UNSUPPORTED,
  526. .vdev_set_dscp_tid_map_cmdid = WMI_CMD_UNSUPPORTED,
  527. .pdev_get_info_cmdid = WMI_CMD_UNSUPPORTED,
  528. .vdev_get_info_cmdid = WMI_CMD_UNSUPPORTED,
  529. .vdev_filter_neighbor_rx_packets_cmdid = WMI_CMD_UNSUPPORTED,
  530. .mu_cal_start_cmdid = WMI_CMD_UNSUPPORTED,
  531. .set_cca_params_cmdid = WMI_CMD_UNSUPPORTED,
  532. .pdev_bss_chan_info_request_cmdid =
  533. WMI_10_2_PDEV_BSS_CHAN_INFO_REQUEST_CMDID,
  534. .pdev_get_tpc_table_cmdid = WMI_CMD_UNSUPPORTED,
  535. .radar_found_cmdid = WMI_CMD_UNSUPPORTED,
  536. };
  537. /* 10.4 WMI cmd track */
  538. static struct wmi_cmd_map wmi_10_4_cmd_map = {
  539. .init_cmdid = WMI_10_4_INIT_CMDID,
  540. .start_scan_cmdid = WMI_10_4_START_SCAN_CMDID,
  541. .stop_scan_cmdid = WMI_10_4_STOP_SCAN_CMDID,
  542. .scan_chan_list_cmdid = WMI_10_4_SCAN_CHAN_LIST_CMDID,
  543. .scan_sch_prio_tbl_cmdid = WMI_10_4_SCAN_SCH_PRIO_TBL_CMDID,
  544. .scan_prob_req_oui_cmdid = WMI_CMD_UNSUPPORTED,
  545. .pdev_set_regdomain_cmdid = WMI_10_4_PDEV_SET_REGDOMAIN_CMDID,
  546. .pdev_set_channel_cmdid = WMI_10_4_PDEV_SET_CHANNEL_CMDID,
  547. .pdev_set_param_cmdid = WMI_10_4_PDEV_SET_PARAM_CMDID,
  548. .pdev_pktlog_enable_cmdid = WMI_10_4_PDEV_PKTLOG_ENABLE_CMDID,
  549. .pdev_pktlog_disable_cmdid = WMI_10_4_PDEV_PKTLOG_DISABLE_CMDID,
  550. .pdev_set_wmm_params_cmdid = WMI_10_4_PDEV_SET_WMM_PARAMS_CMDID,
  551. .pdev_set_ht_cap_ie_cmdid = WMI_10_4_PDEV_SET_HT_CAP_IE_CMDID,
  552. .pdev_set_vht_cap_ie_cmdid = WMI_10_4_PDEV_SET_VHT_CAP_IE_CMDID,
  553. .pdev_set_dscp_tid_map_cmdid = WMI_10_4_PDEV_SET_DSCP_TID_MAP_CMDID,
  554. .pdev_set_quiet_mode_cmdid = WMI_10_4_PDEV_SET_QUIET_MODE_CMDID,
  555. .pdev_green_ap_ps_enable_cmdid = WMI_10_4_PDEV_GREEN_AP_PS_ENABLE_CMDID,
  556. .pdev_get_tpc_config_cmdid = WMI_10_4_PDEV_GET_TPC_CONFIG_CMDID,
  557. .pdev_set_base_macaddr_cmdid = WMI_10_4_PDEV_SET_BASE_MACADDR_CMDID,
  558. .vdev_create_cmdid = WMI_10_4_VDEV_CREATE_CMDID,
  559. .vdev_delete_cmdid = WMI_10_4_VDEV_DELETE_CMDID,
  560. .vdev_start_request_cmdid = WMI_10_4_VDEV_START_REQUEST_CMDID,
  561. .vdev_restart_request_cmdid = WMI_10_4_VDEV_RESTART_REQUEST_CMDID,
  562. .vdev_up_cmdid = WMI_10_4_VDEV_UP_CMDID,
  563. .vdev_stop_cmdid = WMI_10_4_VDEV_STOP_CMDID,
  564. .vdev_down_cmdid = WMI_10_4_VDEV_DOWN_CMDID,
  565. .vdev_set_param_cmdid = WMI_10_4_VDEV_SET_PARAM_CMDID,
  566. .vdev_install_key_cmdid = WMI_10_4_VDEV_INSTALL_KEY_CMDID,
  567. .peer_create_cmdid = WMI_10_4_PEER_CREATE_CMDID,
  568. .peer_delete_cmdid = WMI_10_4_PEER_DELETE_CMDID,
  569. .peer_flush_tids_cmdid = WMI_10_4_PEER_FLUSH_TIDS_CMDID,
  570. .peer_set_param_cmdid = WMI_10_4_PEER_SET_PARAM_CMDID,
  571. .peer_assoc_cmdid = WMI_10_4_PEER_ASSOC_CMDID,
  572. .peer_add_wds_entry_cmdid = WMI_10_4_PEER_ADD_WDS_ENTRY_CMDID,
  573. .peer_remove_wds_entry_cmdid = WMI_10_4_PEER_REMOVE_WDS_ENTRY_CMDID,
  574. .peer_mcast_group_cmdid = WMI_10_4_PEER_MCAST_GROUP_CMDID,
  575. .bcn_tx_cmdid = WMI_10_4_BCN_TX_CMDID,
  576. .pdev_send_bcn_cmdid = WMI_10_4_PDEV_SEND_BCN_CMDID,
  577. .bcn_tmpl_cmdid = WMI_10_4_BCN_PRB_TMPL_CMDID,
  578. .bcn_filter_rx_cmdid = WMI_10_4_BCN_FILTER_RX_CMDID,
  579. .prb_req_filter_rx_cmdid = WMI_10_4_PRB_REQ_FILTER_RX_CMDID,
  580. .mgmt_tx_cmdid = WMI_10_4_MGMT_TX_CMDID,
  581. .prb_tmpl_cmdid = WMI_10_4_PRB_TMPL_CMDID,
  582. .addba_clear_resp_cmdid = WMI_10_4_ADDBA_CLEAR_RESP_CMDID,
  583. .addba_send_cmdid = WMI_10_4_ADDBA_SEND_CMDID,
  584. .addba_status_cmdid = WMI_10_4_ADDBA_STATUS_CMDID,
  585. .delba_send_cmdid = WMI_10_4_DELBA_SEND_CMDID,
  586. .addba_set_resp_cmdid = WMI_10_4_ADDBA_SET_RESP_CMDID,
  587. .send_singleamsdu_cmdid = WMI_10_4_SEND_SINGLEAMSDU_CMDID,
  588. .sta_powersave_mode_cmdid = WMI_10_4_STA_POWERSAVE_MODE_CMDID,
  589. .sta_powersave_param_cmdid = WMI_10_4_STA_POWERSAVE_PARAM_CMDID,
  590. .sta_mimo_ps_mode_cmdid = WMI_10_4_STA_MIMO_PS_MODE_CMDID,
  591. .pdev_dfs_enable_cmdid = WMI_10_4_PDEV_DFS_ENABLE_CMDID,
  592. .pdev_dfs_disable_cmdid = WMI_10_4_PDEV_DFS_DISABLE_CMDID,
  593. .roam_scan_mode = WMI_10_4_ROAM_SCAN_MODE,
  594. .roam_scan_rssi_threshold = WMI_10_4_ROAM_SCAN_RSSI_THRESHOLD,
  595. .roam_scan_period = WMI_10_4_ROAM_SCAN_PERIOD,
  596. .roam_scan_rssi_change_threshold =
  597. WMI_10_4_ROAM_SCAN_RSSI_CHANGE_THRESHOLD,
  598. .roam_ap_profile = WMI_10_4_ROAM_AP_PROFILE,
  599. .ofl_scan_add_ap_profile = WMI_10_4_OFL_SCAN_ADD_AP_PROFILE,
  600. .ofl_scan_remove_ap_profile = WMI_10_4_OFL_SCAN_REMOVE_AP_PROFILE,
  601. .ofl_scan_period = WMI_10_4_OFL_SCAN_PERIOD,
  602. .p2p_dev_set_device_info = WMI_10_4_P2P_DEV_SET_DEVICE_INFO,
  603. .p2p_dev_set_discoverability = WMI_10_4_P2P_DEV_SET_DISCOVERABILITY,
  604. .p2p_go_set_beacon_ie = WMI_10_4_P2P_GO_SET_BEACON_IE,
  605. .p2p_go_set_probe_resp_ie = WMI_10_4_P2P_GO_SET_PROBE_RESP_IE,
  606. .p2p_set_vendor_ie_data_cmdid = WMI_10_4_P2P_SET_VENDOR_IE_DATA_CMDID,
  607. .ap_ps_peer_param_cmdid = WMI_10_4_AP_PS_PEER_PARAM_CMDID,
  608. .ap_ps_peer_uapsd_coex_cmdid = WMI_10_4_AP_PS_PEER_UAPSD_COEX_CMDID,
  609. .peer_rate_retry_sched_cmdid = WMI_10_4_PEER_RATE_RETRY_SCHED_CMDID,
  610. .wlan_profile_trigger_cmdid = WMI_10_4_WLAN_PROFILE_TRIGGER_CMDID,
  611. .wlan_profile_set_hist_intvl_cmdid =
  612. WMI_10_4_WLAN_PROFILE_SET_HIST_INTVL_CMDID,
  613. .wlan_profile_get_profile_data_cmdid =
  614. WMI_10_4_WLAN_PROFILE_GET_PROFILE_DATA_CMDID,
  615. .wlan_profile_enable_profile_id_cmdid =
  616. WMI_10_4_WLAN_PROFILE_ENABLE_PROFILE_ID_CMDID,
  617. .wlan_profile_list_profile_id_cmdid =
  618. WMI_10_4_WLAN_PROFILE_LIST_PROFILE_ID_CMDID,
  619. .pdev_suspend_cmdid = WMI_10_4_PDEV_SUSPEND_CMDID,
  620. .pdev_resume_cmdid = WMI_10_4_PDEV_RESUME_CMDID,
  621. .add_bcn_filter_cmdid = WMI_10_4_ADD_BCN_FILTER_CMDID,
  622. .rmv_bcn_filter_cmdid = WMI_10_4_RMV_BCN_FILTER_CMDID,
  623. .wow_add_wake_pattern_cmdid = WMI_10_4_WOW_ADD_WAKE_PATTERN_CMDID,
  624. .wow_del_wake_pattern_cmdid = WMI_10_4_WOW_DEL_WAKE_PATTERN_CMDID,
  625. .wow_enable_disable_wake_event_cmdid =
  626. WMI_10_4_WOW_ENABLE_DISABLE_WAKE_EVENT_CMDID,
  627. .wow_enable_cmdid = WMI_10_4_WOW_ENABLE_CMDID,
  628. .wow_hostwakeup_from_sleep_cmdid =
  629. WMI_10_4_WOW_HOSTWAKEUP_FROM_SLEEP_CMDID,
  630. .rtt_measreq_cmdid = WMI_10_4_RTT_MEASREQ_CMDID,
  631. .rtt_tsf_cmdid = WMI_10_4_RTT_TSF_CMDID,
  632. .vdev_spectral_scan_configure_cmdid =
  633. WMI_10_4_VDEV_SPECTRAL_SCAN_CONFIGURE_CMDID,
  634. .vdev_spectral_scan_enable_cmdid =
  635. WMI_10_4_VDEV_SPECTRAL_SCAN_ENABLE_CMDID,
  636. .request_stats_cmdid = WMI_10_4_REQUEST_STATS_CMDID,
  637. .set_arp_ns_offload_cmdid = WMI_CMD_UNSUPPORTED,
  638. .network_list_offload_config_cmdid = WMI_CMD_UNSUPPORTED,
  639. .gtk_offload_cmdid = WMI_10_4_GTK_OFFLOAD_CMDID,
  640. .csa_offload_enable_cmdid = WMI_10_4_CSA_OFFLOAD_ENABLE_CMDID,
  641. .csa_offload_chanswitch_cmdid = WMI_10_4_CSA_OFFLOAD_CHANSWITCH_CMDID,
  642. .chatter_set_mode_cmdid = WMI_CMD_UNSUPPORTED,
  643. .peer_tid_addba_cmdid = WMI_CMD_UNSUPPORTED,
  644. .peer_tid_delba_cmdid = WMI_CMD_UNSUPPORTED,
  645. .sta_dtim_ps_method_cmdid = WMI_CMD_UNSUPPORTED,
  646. .sta_uapsd_auto_trig_cmdid = WMI_CMD_UNSUPPORTED,
  647. .sta_keepalive_cmd = WMI_CMD_UNSUPPORTED,
  648. .echo_cmdid = WMI_10_4_ECHO_CMDID,
  649. .pdev_utf_cmdid = WMI_10_4_PDEV_UTF_CMDID,
  650. .dbglog_cfg_cmdid = WMI_10_4_DBGLOG_CFG_CMDID,
  651. .pdev_qvit_cmdid = WMI_10_4_PDEV_QVIT_CMDID,
  652. .pdev_ftm_intg_cmdid = WMI_CMD_UNSUPPORTED,
  653. .vdev_set_keepalive_cmdid = WMI_10_4_VDEV_SET_KEEPALIVE_CMDID,
  654. .vdev_get_keepalive_cmdid = WMI_10_4_VDEV_GET_KEEPALIVE_CMDID,
  655. .force_fw_hang_cmdid = WMI_10_4_FORCE_FW_HANG_CMDID,
  656. .gpio_config_cmdid = WMI_10_4_GPIO_CONFIG_CMDID,
  657. .gpio_output_cmdid = WMI_10_4_GPIO_OUTPUT_CMDID,
  658. .pdev_get_temperature_cmdid = WMI_10_4_PDEV_GET_TEMPERATURE_CMDID,
  659. .vdev_set_wmm_params_cmdid = WMI_CMD_UNSUPPORTED,
  660. .adaptive_qcs_cmdid = WMI_CMD_UNSUPPORTED,
  661. .scan_update_request_cmdid = WMI_10_4_SCAN_UPDATE_REQUEST_CMDID,
  662. .vdev_standby_response_cmdid = WMI_10_4_VDEV_STANDBY_RESPONSE_CMDID,
  663. .vdev_resume_response_cmdid = WMI_10_4_VDEV_RESUME_RESPONSE_CMDID,
  664. .wlan_peer_caching_add_peer_cmdid =
  665. WMI_10_4_WLAN_PEER_CACHING_ADD_PEER_CMDID,
  666. .wlan_peer_caching_evict_peer_cmdid =
  667. WMI_10_4_WLAN_PEER_CACHING_EVICT_PEER_CMDID,
  668. .wlan_peer_caching_restore_peer_cmdid =
  669. WMI_10_4_WLAN_PEER_CACHING_RESTORE_PEER_CMDID,
  670. .wlan_peer_caching_print_all_peers_info_cmdid =
  671. WMI_10_4_WLAN_PEER_CACHING_PRINT_ALL_PEERS_INFO_CMDID,
  672. .peer_update_wds_entry_cmdid = WMI_10_4_PEER_UPDATE_WDS_ENTRY_CMDID,
  673. .peer_add_proxy_sta_entry_cmdid =
  674. WMI_10_4_PEER_ADD_PROXY_STA_ENTRY_CMDID,
  675. .rtt_keepalive_cmdid = WMI_10_4_RTT_KEEPALIVE_CMDID,
  676. .oem_req_cmdid = WMI_10_4_OEM_REQ_CMDID,
  677. .nan_cmdid = WMI_10_4_NAN_CMDID,
  678. .vdev_ratemask_cmdid = WMI_10_4_VDEV_RATEMASK_CMDID,
  679. .qboost_cfg_cmdid = WMI_10_4_QBOOST_CFG_CMDID,
  680. .pdev_smart_ant_enable_cmdid = WMI_10_4_PDEV_SMART_ANT_ENABLE_CMDID,
  681. .pdev_smart_ant_set_rx_antenna_cmdid =
  682. WMI_10_4_PDEV_SMART_ANT_SET_RX_ANTENNA_CMDID,
  683. .peer_smart_ant_set_tx_antenna_cmdid =
  684. WMI_10_4_PEER_SMART_ANT_SET_TX_ANTENNA_CMDID,
  685. .peer_smart_ant_set_train_info_cmdid =
  686. WMI_10_4_PEER_SMART_ANT_SET_TRAIN_INFO_CMDID,
  687. .peer_smart_ant_set_node_config_ops_cmdid =
  688. WMI_10_4_PEER_SMART_ANT_SET_NODE_CONFIG_OPS_CMDID,
  689. .pdev_set_antenna_switch_table_cmdid =
  690. WMI_10_4_PDEV_SET_ANTENNA_SWITCH_TABLE_CMDID,
  691. .pdev_set_ctl_table_cmdid = WMI_10_4_PDEV_SET_CTL_TABLE_CMDID,
  692. .pdev_set_mimogain_table_cmdid = WMI_10_4_PDEV_SET_MIMOGAIN_TABLE_CMDID,
  693. .pdev_ratepwr_table_cmdid = WMI_10_4_PDEV_RATEPWR_TABLE_CMDID,
  694. .pdev_ratepwr_chainmsk_table_cmdid =
  695. WMI_10_4_PDEV_RATEPWR_CHAINMSK_TABLE_CMDID,
  696. .pdev_fips_cmdid = WMI_10_4_PDEV_FIPS_CMDID,
  697. .tt_set_conf_cmdid = WMI_10_4_TT_SET_CONF_CMDID,
  698. .fwtest_cmdid = WMI_10_4_FWTEST_CMDID,
  699. .vdev_atf_request_cmdid = WMI_10_4_VDEV_ATF_REQUEST_CMDID,
  700. .peer_atf_request_cmdid = WMI_10_4_PEER_ATF_REQUEST_CMDID,
  701. .pdev_get_ani_cck_config_cmdid = WMI_10_4_PDEV_GET_ANI_CCK_CONFIG_CMDID,
  702. .pdev_get_ani_ofdm_config_cmdid =
  703. WMI_10_4_PDEV_GET_ANI_OFDM_CONFIG_CMDID,
  704. .pdev_reserve_ast_entry_cmdid = WMI_10_4_PDEV_RESERVE_AST_ENTRY_CMDID,
  705. .pdev_get_nfcal_power_cmdid = WMI_10_4_PDEV_GET_NFCAL_POWER_CMDID,
  706. .pdev_get_tpc_cmdid = WMI_10_4_PDEV_GET_TPC_CMDID,
  707. .pdev_get_ast_info_cmdid = WMI_10_4_PDEV_GET_AST_INFO_CMDID,
  708. .vdev_set_dscp_tid_map_cmdid = WMI_10_4_VDEV_SET_DSCP_TID_MAP_CMDID,
  709. .pdev_get_info_cmdid = WMI_10_4_PDEV_GET_INFO_CMDID,
  710. .vdev_get_info_cmdid = WMI_10_4_VDEV_GET_INFO_CMDID,
  711. .vdev_filter_neighbor_rx_packets_cmdid =
  712. WMI_10_4_VDEV_FILTER_NEIGHBOR_RX_PACKETS_CMDID,
  713. .mu_cal_start_cmdid = WMI_10_4_MU_CAL_START_CMDID,
  714. .set_cca_params_cmdid = WMI_10_4_SET_CCA_PARAMS_CMDID,
  715. .pdev_bss_chan_info_request_cmdid =
  716. WMI_10_4_PDEV_BSS_CHAN_INFO_REQUEST_CMDID,
  717. .ext_resource_cfg_cmdid = WMI_10_4_EXT_RESOURCE_CFG_CMDID,
  718. .vdev_set_ie_cmdid = WMI_10_4_VDEV_SET_IE_CMDID,
  719. .set_lteu_config_cmdid = WMI_10_4_SET_LTEU_CONFIG_CMDID,
  720. .atf_ssid_grouping_request_cmdid =
  721. WMI_10_4_ATF_SSID_GROUPING_REQUEST_CMDID,
  722. .peer_atf_ext_request_cmdid = WMI_10_4_PEER_ATF_EXT_REQUEST_CMDID,
  723. .set_periodic_channel_stats_cfg_cmdid =
  724. WMI_10_4_SET_PERIODIC_CHANNEL_STATS_CONFIG,
  725. .peer_bwf_request_cmdid = WMI_10_4_PEER_BWF_REQUEST_CMDID,
  726. .btcoex_cfg_cmdid = WMI_10_4_BTCOEX_CFG_CMDID,
  727. .peer_tx_mu_txmit_count_cmdid = WMI_10_4_PEER_TX_MU_TXMIT_COUNT_CMDID,
  728. .peer_tx_mu_txmit_rstcnt_cmdid = WMI_10_4_PEER_TX_MU_TXMIT_RSTCNT_CMDID,
  729. .peer_gid_userpos_list_cmdid = WMI_10_4_PEER_GID_USERPOS_LIST_CMDID,
  730. .pdev_check_cal_version_cmdid = WMI_10_4_PDEV_CHECK_CAL_VERSION_CMDID,
  731. .coex_version_cfg_cmid = WMI_10_4_COEX_VERSION_CFG_CMID,
  732. .pdev_get_rx_filter_cmdid = WMI_10_4_PDEV_GET_RX_FILTER_CMDID,
  733. .pdev_extended_nss_cfg_cmdid = WMI_10_4_PDEV_EXTENDED_NSS_CFG_CMDID,
  734. .vdev_set_scan_nac_rssi_cmdid = WMI_10_4_VDEV_SET_SCAN_NAC_RSSI_CMDID,
  735. .prog_gpio_band_select_cmdid = WMI_10_4_PROG_GPIO_BAND_SELECT_CMDID,
  736. .config_smart_logging_cmdid = WMI_10_4_CONFIG_SMART_LOGGING_CMDID,
  737. .debug_fatal_condition_cmdid = WMI_10_4_DEBUG_FATAL_CONDITION_CMDID,
  738. .get_tsf_timer_cmdid = WMI_10_4_GET_TSF_TIMER_CMDID,
  739. .pdev_get_tpc_table_cmdid = WMI_10_4_PDEV_GET_TPC_TABLE_CMDID,
  740. .vdev_sifs_trigger_time_cmdid = WMI_10_4_VDEV_SIFS_TRIGGER_TIME_CMDID,
  741. .pdev_wds_entry_list_cmdid = WMI_10_4_PDEV_WDS_ENTRY_LIST_CMDID,
  742. .tdls_set_state_cmdid = WMI_10_4_TDLS_SET_STATE_CMDID,
  743. .tdls_peer_update_cmdid = WMI_10_4_TDLS_PEER_UPDATE_CMDID,
  744. .tdls_set_offchan_mode_cmdid = WMI_10_4_TDLS_SET_OFFCHAN_MODE_CMDID,
  745. .radar_found_cmdid = WMI_10_4_RADAR_FOUND_CMDID,
  746. };
  747. /* MAIN WMI VDEV param map */
  748. static struct wmi_vdev_param_map wmi_vdev_param_map = {
  749. .rts_threshold = WMI_VDEV_PARAM_RTS_THRESHOLD,
  750. .fragmentation_threshold = WMI_VDEV_PARAM_FRAGMENTATION_THRESHOLD,
  751. .beacon_interval = WMI_VDEV_PARAM_BEACON_INTERVAL,
  752. .listen_interval = WMI_VDEV_PARAM_LISTEN_INTERVAL,
  753. .multicast_rate = WMI_VDEV_PARAM_MULTICAST_RATE,
  754. .mgmt_tx_rate = WMI_VDEV_PARAM_MGMT_TX_RATE,
  755. .slot_time = WMI_VDEV_PARAM_SLOT_TIME,
  756. .preamble = WMI_VDEV_PARAM_PREAMBLE,
  757. .swba_time = WMI_VDEV_PARAM_SWBA_TIME,
  758. .wmi_vdev_stats_update_period = WMI_VDEV_STATS_UPDATE_PERIOD,
  759. .wmi_vdev_pwrsave_ageout_time = WMI_VDEV_PWRSAVE_AGEOUT_TIME,
  760. .wmi_vdev_host_swba_interval = WMI_VDEV_HOST_SWBA_INTERVAL,
  761. .dtim_period = WMI_VDEV_PARAM_DTIM_PERIOD,
  762. .wmi_vdev_oc_scheduler_air_time_limit =
  763. WMI_VDEV_OC_SCHEDULER_AIR_TIME_LIMIT,
  764. .wds = WMI_VDEV_PARAM_WDS,
  765. .atim_window = WMI_VDEV_PARAM_ATIM_WINDOW,
  766. .bmiss_count_max = WMI_VDEV_PARAM_BMISS_COUNT_MAX,
  767. .bmiss_first_bcnt = WMI_VDEV_PARAM_BMISS_FIRST_BCNT,
  768. .bmiss_final_bcnt = WMI_VDEV_PARAM_BMISS_FINAL_BCNT,
  769. .feature_wmm = WMI_VDEV_PARAM_FEATURE_WMM,
  770. .chwidth = WMI_VDEV_PARAM_CHWIDTH,
  771. .chextoffset = WMI_VDEV_PARAM_CHEXTOFFSET,
  772. .disable_htprotection = WMI_VDEV_PARAM_DISABLE_HTPROTECTION,
  773. .sta_quickkickout = WMI_VDEV_PARAM_STA_QUICKKICKOUT,
  774. .mgmt_rate = WMI_VDEV_PARAM_MGMT_RATE,
  775. .protection_mode = WMI_VDEV_PARAM_PROTECTION_MODE,
  776. .fixed_rate = WMI_VDEV_PARAM_FIXED_RATE,
  777. .sgi = WMI_VDEV_PARAM_SGI,
  778. .ldpc = WMI_VDEV_PARAM_LDPC,
  779. .tx_stbc = WMI_VDEV_PARAM_TX_STBC,
  780. .rx_stbc = WMI_VDEV_PARAM_RX_STBC,
  781. .intra_bss_fwd = WMI_VDEV_PARAM_INTRA_BSS_FWD,
  782. .def_keyid = WMI_VDEV_PARAM_DEF_KEYID,
  783. .nss = WMI_VDEV_PARAM_NSS,
  784. .bcast_data_rate = WMI_VDEV_PARAM_BCAST_DATA_RATE,
  785. .mcast_data_rate = WMI_VDEV_PARAM_MCAST_DATA_RATE,
  786. .mcast_indicate = WMI_VDEV_PARAM_MCAST_INDICATE,
  787. .dhcp_indicate = WMI_VDEV_PARAM_DHCP_INDICATE,
  788. .unknown_dest_indicate = WMI_VDEV_PARAM_UNKNOWN_DEST_INDICATE,
  789. .ap_keepalive_min_idle_inactive_time_secs =
  790. WMI_VDEV_PARAM_AP_KEEPALIVE_MIN_IDLE_INACTIVE_TIME_SECS,
  791. .ap_keepalive_max_idle_inactive_time_secs =
  792. WMI_VDEV_PARAM_AP_KEEPALIVE_MAX_IDLE_INACTIVE_TIME_SECS,
  793. .ap_keepalive_max_unresponsive_time_secs =
  794. WMI_VDEV_PARAM_AP_KEEPALIVE_MAX_UNRESPONSIVE_TIME_SECS,
  795. .ap_enable_nawds = WMI_VDEV_PARAM_AP_ENABLE_NAWDS,
  796. .mcast2ucast_set = WMI_VDEV_PARAM_UNSUPPORTED,
  797. .enable_rtscts = WMI_VDEV_PARAM_ENABLE_RTSCTS,
  798. .txbf = WMI_VDEV_PARAM_TXBF,
  799. .packet_powersave = WMI_VDEV_PARAM_PACKET_POWERSAVE,
  800. .drop_unencry = WMI_VDEV_PARAM_DROP_UNENCRY,
  801. .tx_encap_type = WMI_VDEV_PARAM_TX_ENCAP_TYPE,
  802. .ap_detect_out_of_sync_sleeping_sta_time_secs =
  803. WMI_VDEV_PARAM_UNSUPPORTED,
  804. .rc_num_retries = WMI_VDEV_PARAM_UNSUPPORTED,
  805. .cabq_maxdur = WMI_VDEV_PARAM_UNSUPPORTED,
  806. .mfptest_set = WMI_VDEV_PARAM_UNSUPPORTED,
  807. .rts_fixed_rate = WMI_VDEV_PARAM_UNSUPPORTED,
  808. .vht_sgimask = WMI_VDEV_PARAM_UNSUPPORTED,
  809. .vht80_ratemask = WMI_VDEV_PARAM_UNSUPPORTED,
  810. .early_rx_adjust_enable = WMI_VDEV_PARAM_UNSUPPORTED,
  811. .early_rx_tgt_bmiss_num = WMI_VDEV_PARAM_UNSUPPORTED,
  812. .early_rx_bmiss_sample_cycle = WMI_VDEV_PARAM_UNSUPPORTED,
  813. .early_rx_slop_step = WMI_VDEV_PARAM_UNSUPPORTED,
  814. .early_rx_init_slop = WMI_VDEV_PARAM_UNSUPPORTED,
  815. .early_rx_adjust_pause = WMI_VDEV_PARAM_UNSUPPORTED,
  816. .proxy_sta = WMI_VDEV_PARAM_UNSUPPORTED,
  817. .meru_vc = WMI_VDEV_PARAM_UNSUPPORTED,
  818. .rx_decap_type = WMI_VDEV_PARAM_UNSUPPORTED,
  819. .bw_nss_ratemask = WMI_VDEV_PARAM_UNSUPPORTED,
  820. };
  821. /* 10.X WMI VDEV param map */
  822. static struct wmi_vdev_param_map wmi_10x_vdev_param_map = {
  823. .rts_threshold = WMI_10X_VDEV_PARAM_RTS_THRESHOLD,
  824. .fragmentation_threshold = WMI_10X_VDEV_PARAM_FRAGMENTATION_THRESHOLD,
  825. .beacon_interval = WMI_10X_VDEV_PARAM_BEACON_INTERVAL,
  826. .listen_interval = WMI_10X_VDEV_PARAM_LISTEN_INTERVAL,
  827. .multicast_rate = WMI_10X_VDEV_PARAM_MULTICAST_RATE,
  828. .mgmt_tx_rate = WMI_10X_VDEV_PARAM_MGMT_TX_RATE,
  829. .slot_time = WMI_10X_VDEV_PARAM_SLOT_TIME,
  830. .preamble = WMI_10X_VDEV_PARAM_PREAMBLE,
  831. .swba_time = WMI_10X_VDEV_PARAM_SWBA_TIME,
  832. .wmi_vdev_stats_update_period = WMI_10X_VDEV_STATS_UPDATE_PERIOD,
  833. .wmi_vdev_pwrsave_ageout_time = WMI_10X_VDEV_PWRSAVE_AGEOUT_TIME,
  834. .wmi_vdev_host_swba_interval = WMI_10X_VDEV_HOST_SWBA_INTERVAL,
  835. .dtim_period = WMI_10X_VDEV_PARAM_DTIM_PERIOD,
  836. .wmi_vdev_oc_scheduler_air_time_limit =
  837. WMI_10X_VDEV_OC_SCHEDULER_AIR_TIME_LIMIT,
  838. .wds = WMI_10X_VDEV_PARAM_WDS,
  839. .atim_window = WMI_10X_VDEV_PARAM_ATIM_WINDOW,
  840. .bmiss_count_max = WMI_10X_VDEV_PARAM_BMISS_COUNT_MAX,
  841. .bmiss_first_bcnt = WMI_VDEV_PARAM_UNSUPPORTED,
  842. .bmiss_final_bcnt = WMI_VDEV_PARAM_UNSUPPORTED,
  843. .feature_wmm = WMI_10X_VDEV_PARAM_FEATURE_WMM,
  844. .chwidth = WMI_10X_VDEV_PARAM_CHWIDTH,
  845. .chextoffset = WMI_10X_VDEV_PARAM_CHEXTOFFSET,
  846. .disable_htprotection = WMI_10X_VDEV_PARAM_DISABLE_HTPROTECTION,
  847. .sta_quickkickout = WMI_10X_VDEV_PARAM_STA_QUICKKICKOUT,
  848. .mgmt_rate = WMI_10X_VDEV_PARAM_MGMT_RATE,
  849. .protection_mode = WMI_10X_VDEV_PARAM_PROTECTION_MODE,
  850. .fixed_rate = WMI_10X_VDEV_PARAM_FIXED_RATE,
  851. .sgi = WMI_10X_VDEV_PARAM_SGI,
  852. .ldpc = WMI_10X_VDEV_PARAM_LDPC,
  853. .tx_stbc = WMI_10X_VDEV_PARAM_TX_STBC,
  854. .rx_stbc = WMI_10X_VDEV_PARAM_RX_STBC,
  855. .intra_bss_fwd = WMI_10X_VDEV_PARAM_INTRA_BSS_FWD,
  856. .def_keyid = WMI_10X_VDEV_PARAM_DEF_KEYID,
  857. .nss = WMI_10X_VDEV_PARAM_NSS,
  858. .bcast_data_rate = WMI_10X_VDEV_PARAM_BCAST_DATA_RATE,
  859. .mcast_data_rate = WMI_10X_VDEV_PARAM_MCAST_DATA_RATE,
  860. .mcast_indicate = WMI_10X_VDEV_PARAM_MCAST_INDICATE,
  861. .dhcp_indicate = WMI_10X_VDEV_PARAM_DHCP_INDICATE,
  862. .unknown_dest_indicate = WMI_10X_VDEV_PARAM_UNKNOWN_DEST_INDICATE,
  863. .ap_keepalive_min_idle_inactive_time_secs =
  864. WMI_10X_VDEV_PARAM_AP_KEEPALIVE_MIN_IDLE_INACTIVE_TIME_SECS,
  865. .ap_keepalive_max_idle_inactive_time_secs =
  866. WMI_10X_VDEV_PARAM_AP_KEEPALIVE_MAX_IDLE_INACTIVE_TIME_SECS,
  867. .ap_keepalive_max_unresponsive_time_secs =
  868. WMI_10X_VDEV_PARAM_AP_KEEPALIVE_MAX_UNRESPONSIVE_TIME_SECS,
  869. .ap_enable_nawds = WMI_10X_VDEV_PARAM_AP_ENABLE_NAWDS,
  870. .mcast2ucast_set = WMI_10X_VDEV_PARAM_MCAST2UCAST_SET,
  871. .enable_rtscts = WMI_10X_VDEV_PARAM_ENABLE_RTSCTS,
  872. .txbf = WMI_VDEV_PARAM_UNSUPPORTED,
  873. .packet_powersave = WMI_VDEV_PARAM_UNSUPPORTED,
  874. .drop_unencry = WMI_VDEV_PARAM_UNSUPPORTED,
  875. .tx_encap_type = WMI_VDEV_PARAM_UNSUPPORTED,
  876. .ap_detect_out_of_sync_sleeping_sta_time_secs =
  877. WMI_10X_VDEV_PARAM_AP_DETECT_OUT_OF_SYNC_SLEEPING_STA_TIME_SECS,
  878. .rc_num_retries = WMI_VDEV_PARAM_UNSUPPORTED,
  879. .cabq_maxdur = WMI_VDEV_PARAM_UNSUPPORTED,
  880. .mfptest_set = WMI_VDEV_PARAM_UNSUPPORTED,
  881. .rts_fixed_rate = WMI_VDEV_PARAM_UNSUPPORTED,
  882. .vht_sgimask = WMI_VDEV_PARAM_UNSUPPORTED,
  883. .vht80_ratemask = WMI_VDEV_PARAM_UNSUPPORTED,
  884. .early_rx_adjust_enable = WMI_VDEV_PARAM_UNSUPPORTED,
  885. .early_rx_tgt_bmiss_num = WMI_VDEV_PARAM_UNSUPPORTED,
  886. .early_rx_bmiss_sample_cycle = WMI_VDEV_PARAM_UNSUPPORTED,
  887. .early_rx_slop_step = WMI_VDEV_PARAM_UNSUPPORTED,
  888. .early_rx_init_slop = WMI_VDEV_PARAM_UNSUPPORTED,
  889. .early_rx_adjust_pause = WMI_VDEV_PARAM_UNSUPPORTED,
  890. .proxy_sta = WMI_VDEV_PARAM_UNSUPPORTED,
  891. .meru_vc = WMI_VDEV_PARAM_UNSUPPORTED,
  892. .rx_decap_type = WMI_VDEV_PARAM_UNSUPPORTED,
  893. .bw_nss_ratemask = WMI_VDEV_PARAM_UNSUPPORTED,
  894. };
  895. static struct wmi_vdev_param_map wmi_10_2_4_vdev_param_map = {
  896. .rts_threshold = WMI_10X_VDEV_PARAM_RTS_THRESHOLD,
  897. .fragmentation_threshold = WMI_10X_VDEV_PARAM_FRAGMENTATION_THRESHOLD,
  898. .beacon_interval = WMI_10X_VDEV_PARAM_BEACON_INTERVAL,
  899. .listen_interval = WMI_10X_VDEV_PARAM_LISTEN_INTERVAL,
  900. .multicast_rate = WMI_10X_VDEV_PARAM_MULTICAST_RATE,
  901. .mgmt_tx_rate = WMI_10X_VDEV_PARAM_MGMT_TX_RATE,
  902. .slot_time = WMI_10X_VDEV_PARAM_SLOT_TIME,
  903. .preamble = WMI_10X_VDEV_PARAM_PREAMBLE,
  904. .swba_time = WMI_10X_VDEV_PARAM_SWBA_TIME,
  905. .wmi_vdev_stats_update_period = WMI_10X_VDEV_STATS_UPDATE_PERIOD,
  906. .wmi_vdev_pwrsave_ageout_time = WMI_10X_VDEV_PWRSAVE_AGEOUT_TIME,
  907. .wmi_vdev_host_swba_interval = WMI_10X_VDEV_HOST_SWBA_INTERVAL,
  908. .dtim_period = WMI_10X_VDEV_PARAM_DTIM_PERIOD,
  909. .wmi_vdev_oc_scheduler_air_time_limit =
  910. WMI_10X_VDEV_OC_SCHEDULER_AIR_TIME_LIMIT,
  911. .wds = WMI_10X_VDEV_PARAM_WDS,
  912. .atim_window = WMI_10X_VDEV_PARAM_ATIM_WINDOW,
  913. .bmiss_count_max = WMI_10X_VDEV_PARAM_BMISS_COUNT_MAX,
  914. .bmiss_first_bcnt = WMI_VDEV_PARAM_UNSUPPORTED,
  915. .bmiss_final_bcnt = WMI_VDEV_PARAM_UNSUPPORTED,
  916. .feature_wmm = WMI_10X_VDEV_PARAM_FEATURE_WMM,
  917. .chwidth = WMI_10X_VDEV_PARAM_CHWIDTH,
  918. .chextoffset = WMI_10X_VDEV_PARAM_CHEXTOFFSET,
  919. .disable_htprotection = WMI_10X_VDEV_PARAM_DISABLE_HTPROTECTION,
  920. .sta_quickkickout = WMI_10X_VDEV_PARAM_STA_QUICKKICKOUT,
  921. .mgmt_rate = WMI_10X_VDEV_PARAM_MGMT_RATE,
  922. .protection_mode = WMI_10X_VDEV_PARAM_PROTECTION_MODE,
  923. .fixed_rate = WMI_10X_VDEV_PARAM_FIXED_RATE,
  924. .sgi = WMI_10X_VDEV_PARAM_SGI,
  925. .ldpc = WMI_10X_VDEV_PARAM_LDPC,
  926. .tx_stbc = WMI_10X_VDEV_PARAM_TX_STBC,
  927. .rx_stbc = WMI_10X_VDEV_PARAM_RX_STBC,
  928. .intra_bss_fwd = WMI_10X_VDEV_PARAM_INTRA_BSS_FWD,
  929. .def_keyid = WMI_10X_VDEV_PARAM_DEF_KEYID,
  930. .nss = WMI_10X_VDEV_PARAM_NSS,
  931. .bcast_data_rate = WMI_10X_VDEV_PARAM_BCAST_DATA_RATE,
  932. .mcast_data_rate = WMI_10X_VDEV_PARAM_MCAST_DATA_RATE,
  933. .mcast_indicate = WMI_10X_VDEV_PARAM_MCAST_INDICATE,
  934. .dhcp_indicate = WMI_10X_VDEV_PARAM_DHCP_INDICATE,
  935. .unknown_dest_indicate = WMI_10X_VDEV_PARAM_UNKNOWN_DEST_INDICATE,
  936. .ap_keepalive_min_idle_inactive_time_secs =
  937. WMI_10X_VDEV_PARAM_AP_KEEPALIVE_MIN_IDLE_INACTIVE_TIME_SECS,
  938. .ap_keepalive_max_idle_inactive_time_secs =
  939. WMI_10X_VDEV_PARAM_AP_KEEPALIVE_MAX_IDLE_INACTIVE_TIME_SECS,
  940. .ap_keepalive_max_unresponsive_time_secs =
  941. WMI_10X_VDEV_PARAM_AP_KEEPALIVE_MAX_UNRESPONSIVE_TIME_SECS,
  942. .ap_enable_nawds = WMI_10X_VDEV_PARAM_AP_ENABLE_NAWDS,
  943. .mcast2ucast_set = WMI_10X_VDEV_PARAM_MCAST2UCAST_SET,
  944. .enable_rtscts = WMI_10X_VDEV_PARAM_ENABLE_RTSCTS,
  945. .txbf = WMI_VDEV_PARAM_UNSUPPORTED,
  946. .packet_powersave = WMI_VDEV_PARAM_UNSUPPORTED,
  947. .drop_unencry = WMI_VDEV_PARAM_UNSUPPORTED,
  948. .tx_encap_type = WMI_VDEV_PARAM_UNSUPPORTED,
  949. .ap_detect_out_of_sync_sleeping_sta_time_secs =
  950. WMI_10X_VDEV_PARAM_AP_DETECT_OUT_OF_SYNC_SLEEPING_STA_TIME_SECS,
  951. .rc_num_retries = WMI_VDEV_PARAM_UNSUPPORTED,
  952. .cabq_maxdur = WMI_VDEV_PARAM_UNSUPPORTED,
  953. .mfptest_set = WMI_VDEV_PARAM_UNSUPPORTED,
  954. .rts_fixed_rate = WMI_VDEV_PARAM_UNSUPPORTED,
  955. .vht_sgimask = WMI_VDEV_PARAM_UNSUPPORTED,
  956. .vht80_ratemask = WMI_VDEV_PARAM_UNSUPPORTED,
  957. .early_rx_adjust_enable = WMI_VDEV_PARAM_UNSUPPORTED,
  958. .early_rx_tgt_bmiss_num = WMI_VDEV_PARAM_UNSUPPORTED,
  959. .early_rx_bmiss_sample_cycle = WMI_VDEV_PARAM_UNSUPPORTED,
  960. .early_rx_slop_step = WMI_VDEV_PARAM_UNSUPPORTED,
  961. .early_rx_init_slop = WMI_VDEV_PARAM_UNSUPPORTED,
  962. .early_rx_adjust_pause = WMI_VDEV_PARAM_UNSUPPORTED,
  963. .proxy_sta = WMI_VDEV_PARAM_UNSUPPORTED,
  964. .meru_vc = WMI_VDEV_PARAM_UNSUPPORTED,
  965. .rx_decap_type = WMI_VDEV_PARAM_UNSUPPORTED,
  966. .bw_nss_ratemask = WMI_VDEV_PARAM_UNSUPPORTED,
  967. };
  968. static struct wmi_vdev_param_map wmi_10_4_vdev_param_map = {
  969. .rts_threshold = WMI_10_4_VDEV_PARAM_RTS_THRESHOLD,
  970. .fragmentation_threshold = WMI_10_4_VDEV_PARAM_FRAGMENTATION_THRESHOLD,
  971. .beacon_interval = WMI_10_4_VDEV_PARAM_BEACON_INTERVAL,
  972. .listen_interval = WMI_10_4_VDEV_PARAM_LISTEN_INTERVAL,
  973. .multicast_rate = WMI_10_4_VDEV_PARAM_MULTICAST_RATE,
  974. .mgmt_tx_rate = WMI_10_4_VDEV_PARAM_MGMT_TX_RATE,
  975. .slot_time = WMI_10_4_VDEV_PARAM_SLOT_TIME,
  976. .preamble = WMI_10_4_VDEV_PARAM_PREAMBLE,
  977. .swba_time = WMI_10_4_VDEV_PARAM_SWBA_TIME,
  978. .wmi_vdev_stats_update_period = WMI_10_4_VDEV_STATS_UPDATE_PERIOD,
  979. .wmi_vdev_pwrsave_ageout_time = WMI_10_4_VDEV_PWRSAVE_AGEOUT_TIME,
  980. .wmi_vdev_host_swba_interval = WMI_10_4_VDEV_HOST_SWBA_INTERVAL,
  981. .dtim_period = WMI_10_4_VDEV_PARAM_DTIM_PERIOD,
  982. .wmi_vdev_oc_scheduler_air_time_limit =
  983. WMI_10_4_VDEV_OC_SCHEDULER_AIR_TIME_LIMIT,
  984. .wds = WMI_10_4_VDEV_PARAM_WDS,
  985. .atim_window = WMI_10_4_VDEV_PARAM_ATIM_WINDOW,
  986. .bmiss_count_max = WMI_10_4_VDEV_PARAM_BMISS_COUNT_MAX,
  987. .bmiss_first_bcnt = WMI_10_4_VDEV_PARAM_BMISS_FIRST_BCNT,
  988. .bmiss_final_bcnt = WMI_10_4_VDEV_PARAM_BMISS_FINAL_BCNT,
  989. .feature_wmm = WMI_10_4_VDEV_PARAM_FEATURE_WMM,
  990. .chwidth = WMI_10_4_VDEV_PARAM_CHWIDTH,
  991. .chextoffset = WMI_10_4_VDEV_PARAM_CHEXTOFFSET,
  992. .disable_htprotection = WMI_10_4_VDEV_PARAM_DISABLE_HTPROTECTION,
  993. .sta_quickkickout = WMI_10_4_VDEV_PARAM_STA_QUICKKICKOUT,
  994. .mgmt_rate = WMI_10_4_VDEV_PARAM_MGMT_RATE,
  995. .protection_mode = WMI_10_4_VDEV_PARAM_PROTECTION_MODE,
  996. .fixed_rate = WMI_10_4_VDEV_PARAM_FIXED_RATE,
  997. .sgi = WMI_10_4_VDEV_PARAM_SGI,
  998. .ldpc = WMI_10_4_VDEV_PARAM_LDPC,
  999. .tx_stbc = WMI_10_4_VDEV_PARAM_TX_STBC,
  1000. .rx_stbc = WMI_10_4_VDEV_PARAM_RX_STBC,
  1001. .intra_bss_fwd = WMI_10_4_VDEV_PARAM_INTRA_BSS_FWD,
  1002. .def_keyid = WMI_10_4_VDEV_PARAM_DEF_KEYID,
  1003. .nss = WMI_10_4_VDEV_PARAM_NSS,
  1004. .bcast_data_rate = WMI_10_4_VDEV_PARAM_BCAST_DATA_RATE,
  1005. .mcast_data_rate = WMI_10_4_VDEV_PARAM_MCAST_DATA_RATE,
  1006. .mcast_indicate = WMI_10_4_VDEV_PARAM_MCAST_INDICATE,
  1007. .dhcp_indicate = WMI_10_4_VDEV_PARAM_DHCP_INDICATE,
  1008. .unknown_dest_indicate = WMI_10_4_VDEV_PARAM_UNKNOWN_DEST_INDICATE,
  1009. .ap_keepalive_min_idle_inactive_time_secs =
  1010. WMI_10_4_VDEV_PARAM_AP_KEEPALIVE_MIN_IDLE_INACTIVE_TIME_SECS,
  1011. .ap_keepalive_max_idle_inactive_time_secs =
  1012. WMI_10_4_VDEV_PARAM_AP_KEEPALIVE_MAX_IDLE_INACTIVE_TIME_SECS,
  1013. .ap_keepalive_max_unresponsive_time_secs =
  1014. WMI_10_4_VDEV_PARAM_AP_KEEPALIVE_MAX_UNRESPONSIVE_TIME_SECS,
  1015. .ap_enable_nawds = WMI_10_4_VDEV_PARAM_AP_ENABLE_NAWDS,
  1016. .mcast2ucast_set = WMI_10_4_VDEV_PARAM_MCAST2UCAST_SET,
  1017. .enable_rtscts = WMI_10_4_VDEV_PARAM_ENABLE_RTSCTS,
  1018. .txbf = WMI_10_4_VDEV_PARAM_TXBF,
  1019. .packet_powersave = WMI_10_4_VDEV_PARAM_PACKET_POWERSAVE,
  1020. .drop_unencry = WMI_10_4_VDEV_PARAM_DROP_UNENCRY,
  1021. .tx_encap_type = WMI_10_4_VDEV_PARAM_TX_ENCAP_TYPE,
  1022. .ap_detect_out_of_sync_sleeping_sta_time_secs =
  1023. WMI_10_4_VDEV_PARAM_AP_DETECT_OUT_OF_SYNC_SLEEPING_STA_TIME_SECS,
  1024. .rc_num_retries = WMI_10_4_VDEV_PARAM_RC_NUM_RETRIES,
  1025. .cabq_maxdur = WMI_10_4_VDEV_PARAM_CABQ_MAXDUR,
  1026. .mfptest_set = WMI_10_4_VDEV_PARAM_MFPTEST_SET,
  1027. .rts_fixed_rate = WMI_10_4_VDEV_PARAM_RTS_FIXED_RATE,
  1028. .vht_sgimask = WMI_10_4_VDEV_PARAM_VHT_SGIMASK,
  1029. .vht80_ratemask = WMI_10_4_VDEV_PARAM_VHT80_RATEMASK,
  1030. .early_rx_adjust_enable = WMI_10_4_VDEV_PARAM_EARLY_RX_ADJUST_ENABLE,
  1031. .early_rx_tgt_bmiss_num = WMI_10_4_VDEV_PARAM_EARLY_RX_TGT_BMISS_NUM,
  1032. .early_rx_bmiss_sample_cycle =
  1033. WMI_10_4_VDEV_PARAM_EARLY_RX_BMISS_SAMPLE_CYCLE,
  1034. .early_rx_slop_step = WMI_10_4_VDEV_PARAM_EARLY_RX_SLOP_STEP,
  1035. .early_rx_init_slop = WMI_10_4_VDEV_PARAM_EARLY_RX_INIT_SLOP,
  1036. .early_rx_adjust_pause = WMI_10_4_VDEV_PARAM_EARLY_RX_ADJUST_PAUSE,
  1037. .proxy_sta = WMI_10_4_VDEV_PARAM_PROXY_STA,
  1038. .meru_vc = WMI_10_4_VDEV_PARAM_MERU_VC,
  1039. .rx_decap_type = WMI_10_4_VDEV_PARAM_RX_DECAP_TYPE,
  1040. .bw_nss_ratemask = WMI_10_4_VDEV_PARAM_BW_NSS_RATEMASK,
  1041. .inc_tsf = WMI_10_4_VDEV_PARAM_TSF_INCREMENT,
  1042. .dec_tsf = WMI_10_4_VDEV_PARAM_TSF_DECREMENT,
  1043. };
  1044. static struct wmi_pdev_param_map wmi_pdev_param_map = {
  1045. .tx_chain_mask = WMI_PDEV_PARAM_TX_CHAIN_MASK,
  1046. .rx_chain_mask = WMI_PDEV_PARAM_RX_CHAIN_MASK,
  1047. .txpower_limit2g = WMI_PDEV_PARAM_TXPOWER_LIMIT2G,
  1048. .txpower_limit5g = WMI_PDEV_PARAM_TXPOWER_LIMIT5G,
  1049. .txpower_scale = WMI_PDEV_PARAM_TXPOWER_SCALE,
  1050. .beacon_gen_mode = WMI_PDEV_PARAM_BEACON_GEN_MODE,
  1051. .beacon_tx_mode = WMI_PDEV_PARAM_BEACON_TX_MODE,
  1052. .resmgr_offchan_mode = WMI_PDEV_PARAM_RESMGR_OFFCHAN_MODE,
  1053. .protection_mode = WMI_PDEV_PARAM_PROTECTION_MODE,
  1054. .dynamic_bw = WMI_PDEV_PARAM_DYNAMIC_BW,
  1055. .non_agg_sw_retry_th = WMI_PDEV_PARAM_NON_AGG_SW_RETRY_TH,
  1056. .agg_sw_retry_th = WMI_PDEV_PARAM_AGG_SW_RETRY_TH,
  1057. .sta_kickout_th = WMI_PDEV_PARAM_STA_KICKOUT_TH,
  1058. .ac_aggrsize_scaling = WMI_PDEV_PARAM_AC_AGGRSIZE_SCALING,
  1059. .ltr_enable = WMI_PDEV_PARAM_LTR_ENABLE,
  1060. .ltr_ac_latency_be = WMI_PDEV_PARAM_LTR_AC_LATENCY_BE,
  1061. .ltr_ac_latency_bk = WMI_PDEV_PARAM_LTR_AC_LATENCY_BK,
  1062. .ltr_ac_latency_vi = WMI_PDEV_PARAM_LTR_AC_LATENCY_VI,
  1063. .ltr_ac_latency_vo = WMI_PDEV_PARAM_LTR_AC_LATENCY_VO,
  1064. .ltr_ac_latency_timeout = WMI_PDEV_PARAM_LTR_AC_LATENCY_TIMEOUT,
  1065. .ltr_sleep_override = WMI_PDEV_PARAM_LTR_SLEEP_OVERRIDE,
  1066. .ltr_rx_override = WMI_PDEV_PARAM_LTR_RX_OVERRIDE,
  1067. .ltr_tx_activity_timeout = WMI_PDEV_PARAM_LTR_TX_ACTIVITY_TIMEOUT,
  1068. .l1ss_enable = WMI_PDEV_PARAM_L1SS_ENABLE,
  1069. .dsleep_enable = WMI_PDEV_PARAM_DSLEEP_ENABLE,
  1070. .pcielp_txbuf_flush = WMI_PDEV_PARAM_PCIELP_TXBUF_FLUSH,
  1071. .pcielp_txbuf_watermark = WMI_PDEV_PARAM_PCIELP_TXBUF_TMO_EN,
  1072. .pcielp_txbuf_tmo_en = WMI_PDEV_PARAM_PCIELP_TXBUF_TMO_EN,
  1073. .pcielp_txbuf_tmo_value = WMI_PDEV_PARAM_PCIELP_TXBUF_TMO_VALUE,
  1074. .pdev_stats_update_period = WMI_PDEV_PARAM_PDEV_STATS_UPDATE_PERIOD,
  1075. .vdev_stats_update_period = WMI_PDEV_PARAM_VDEV_STATS_UPDATE_PERIOD,
  1076. .peer_stats_update_period = WMI_PDEV_PARAM_PEER_STATS_UPDATE_PERIOD,
  1077. .bcnflt_stats_update_period = WMI_PDEV_PARAM_BCNFLT_STATS_UPDATE_PERIOD,
  1078. .pmf_qos = WMI_PDEV_PARAM_PMF_QOS,
  1079. .arp_ac_override = WMI_PDEV_PARAM_ARP_AC_OVERRIDE,
  1080. .dcs = WMI_PDEV_PARAM_DCS,
  1081. .ani_enable = WMI_PDEV_PARAM_ANI_ENABLE,
  1082. .ani_poll_period = WMI_PDEV_PARAM_ANI_POLL_PERIOD,
  1083. .ani_listen_period = WMI_PDEV_PARAM_ANI_LISTEN_PERIOD,
  1084. .ani_ofdm_level = WMI_PDEV_PARAM_ANI_OFDM_LEVEL,
  1085. .ani_cck_level = WMI_PDEV_PARAM_ANI_CCK_LEVEL,
  1086. .dyntxchain = WMI_PDEV_PARAM_DYNTXCHAIN,
  1087. .proxy_sta = WMI_PDEV_PARAM_PROXY_STA,
  1088. .idle_ps_config = WMI_PDEV_PARAM_IDLE_PS_CONFIG,
  1089. .power_gating_sleep = WMI_PDEV_PARAM_POWER_GATING_SLEEP,
  1090. .fast_channel_reset = WMI_PDEV_PARAM_UNSUPPORTED,
  1091. .burst_dur = WMI_PDEV_PARAM_UNSUPPORTED,
  1092. .burst_enable = WMI_PDEV_PARAM_UNSUPPORTED,
  1093. .cal_period = WMI_PDEV_PARAM_UNSUPPORTED,
  1094. .aggr_burst = WMI_PDEV_PARAM_UNSUPPORTED,
  1095. .rx_decap_mode = WMI_PDEV_PARAM_UNSUPPORTED,
  1096. .smart_antenna_default_antenna = WMI_PDEV_PARAM_UNSUPPORTED,
  1097. .igmpmld_override = WMI_PDEV_PARAM_UNSUPPORTED,
  1098. .igmpmld_tid = WMI_PDEV_PARAM_UNSUPPORTED,
  1099. .antenna_gain = WMI_PDEV_PARAM_UNSUPPORTED,
  1100. .rx_filter = WMI_PDEV_PARAM_UNSUPPORTED,
  1101. .set_mcast_to_ucast_tid = WMI_PDEV_PARAM_UNSUPPORTED,
  1102. .proxy_sta_mode = WMI_PDEV_PARAM_UNSUPPORTED,
  1103. .set_mcast2ucast_mode = WMI_PDEV_PARAM_UNSUPPORTED,
  1104. .set_mcast2ucast_buffer = WMI_PDEV_PARAM_UNSUPPORTED,
  1105. .remove_mcast2ucast_buffer = WMI_PDEV_PARAM_UNSUPPORTED,
  1106. .peer_sta_ps_statechg_enable = WMI_PDEV_PARAM_UNSUPPORTED,
  1107. .igmpmld_ac_override = WMI_PDEV_PARAM_UNSUPPORTED,
  1108. .block_interbss = WMI_PDEV_PARAM_UNSUPPORTED,
  1109. .set_disable_reset_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
  1110. .set_msdu_ttl_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
  1111. .set_ppdu_duration_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
  1112. .txbf_sound_period_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
  1113. .set_promisc_mode_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
  1114. .set_burst_mode_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
  1115. .en_stats = WMI_PDEV_PARAM_UNSUPPORTED,
  1116. .mu_group_policy = WMI_PDEV_PARAM_UNSUPPORTED,
  1117. .noise_detection = WMI_PDEV_PARAM_UNSUPPORTED,
  1118. .noise_threshold = WMI_PDEV_PARAM_UNSUPPORTED,
  1119. .dpd_enable = WMI_PDEV_PARAM_UNSUPPORTED,
  1120. .set_mcast_bcast_echo = WMI_PDEV_PARAM_UNSUPPORTED,
  1121. .atf_strict_sch = WMI_PDEV_PARAM_UNSUPPORTED,
  1122. .atf_sched_duration = WMI_PDEV_PARAM_UNSUPPORTED,
  1123. .ant_plzn = WMI_PDEV_PARAM_UNSUPPORTED,
  1124. .mgmt_retry_limit = WMI_PDEV_PARAM_UNSUPPORTED,
  1125. .sensitivity_level = WMI_PDEV_PARAM_UNSUPPORTED,
  1126. .signed_txpower_2g = WMI_PDEV_PARAM_UNSUPPORTED,
  1127. .signed_txpower_5g = WMI_PDEV_PARAM_UNSUPPORTED,
  1128. .enable_per_tid_amsdu = WMI_PDEV_PARAM_UNSUPPORTED,
  1129. .enable_per_tid_ampdu = WMI_PDEV_PARAM_UNSUPPORTED,
  1130. .cca_threshold = WMI_PDEV_PARAM_UNSUPPORTED,
  1131. .rts_fixed_rate = WMI_PDEV_PARAM_UNSUPPORTED,
  1132. .pdev_reset = WMI_PDEV_PARAM_UNSUPPORTED,
  1133. .wapi_mbssid_offset = WMI_PDEV_PARAM_UNSUPPORTED,
  1134. .arp_srcaddr = WMI_PDEV_PARAM_UNSUPPORTED,
  1135. .arp_dstaddr = WMI_PDEV_PARAM_UNSUPPORTED,
  1136. .enable_btcoex = WMI_PDEV_PARAM_UNSUPPORTED,
  1137. };
  1138. static struct wmi_pdev_param_map wmi_10x_pdev_param_map = {
  1139. .tx_chain_mask = WMI_10X_PDEV_PARAM_TX_CHAIN_MASK,
  1140. .rx_chain_mask = WMI_10X_PDEV_PARAM_RX_CHAIN_MASK,
  1141. .txpower_limit2g = WMI_10X_PDEV_PARAM_TXPOWER_LIMIT2G,
  1142. .txpower_limit5g = WMI_10X_PDEV_PARAM_TXPOWER_LIMIT5G,
  1143. .txpower_scale = WMI_10X_PDEV_PARAM_TXPOWER_SCALE,
  1144. .beacon_gen_mode = WMI_10X_PDEV_PARAM_BEACON_GEN_MODE,
  1145. .beacon_tx_mode = WMI_10X_PDEV_PARAM_BEACON_TX_MODE,
  1146. .resmgr_offchan_mode = WMI_10X_PDEV_PARAM_RESMGR_OFFCHAN_MODE,
  1147. .protection_mode = WMI_10X_PDEV_PARAM_PROTECTION_MODE,
  1148. .dynamic_bw = WMI_10X_PDEV_PARAM_DYNAMIC_BW,
  1149. .non_agg_sw_retry_th = WMI_10X_PDEV_PARAM_NON_AGG_SW_RETRY_TH,
  1150. .agg_sw_retry_th = WMI_10X_PDEV_PARAM_AGG_SW_RETRY_TH,
  1151. .sta_kickout_th = WMI_10X_PDEV_PARAM_STA_KICKOUT_TH,
  1152. .ac_aggrsize_scaling = WMI_10X_PDEV_PARAM_AC_AGGRSIZE_SCALING,
  1153. .ltr_enable = WMI_10X_PDEV_PARAM_LTR_ENABLE,
  1154. .ltr_ac_latency_be = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_BE,
  1155. .ltr_ac_latency_bk = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_BK,
  1156. .ltr_ac_latency_vi = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_VI,
  1157. .ltr_ac_latency_vo = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_VO,
  1158. .ltr_ac_latency_timeout = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_TIMEOUT,
  1159. .ltr_sleep_override = WMI_10X_PDEV_PARAM_LTR_SLEEP_OVERRIDE,
  1160. .ltr_rx_override = WMI_10X_PDEV_PARAM_LTR_RX_OVERRIDE,
  1161. .ltr_tx_activity_timeout = WMI_10X_PDEV_PARAM_LTR_TX_ACTIVITY_TIMEOUT,
  1162. .l1ss_enable = WMI_10X_PDEV_PARAM_L1SS_ENABLE,
  1163. .dsleep_enable = WMI_10X_PDEV_PARAM_DSLEEP_ENABLE,
  1164. .pcielp_txbuf_flush = WMI_PDEV_PARAM_UNSUPPORTED,
  1165. .pcielp_txbuf_watermark = WMI_PDEV_PARAM_UNSUPPORTED,
  1166. .pcielp_txbuf_tmo_en = WMI_PDEV_PARAM_UNSUPPORTED,
  1167. .pcielp_txbuf_tmo_value = WMI_PDEV_PARAM_UNSUPPORTED,
  1168. .pdev_stats_update_period = WMI_10X_PDEV_PARAM_PDEV_STATS_UPDATE_PERIOD,
  1169. .vdev_stats_update_period = WMI_10X_PDEV_PARAM_VDEV_STATS_UPDATE_PERIOD,
  1170. .peer_stats_update_period = WMI_10X_PDEV_PARAM_PEER_STATS_UPDATE_PERIOD,
  1171. .bcnflt_stats_update_period =
  1172. WMI_10X_PDEV_PARAM_BCNFLT_STATS_UPDATE_PERIOD,
  1173. .pmf_qos = WMI_10X_PDEV_PARAM_PMF_QOS,
  1174. .arp_ac_override = WMI_10X_PDEV_PARAM_ARPDHCP_AC_OVERRIDE,
  1175. .dcs = WMI_10X_PDEV_PARAM_DCS,
  1176. .ani_enable = WMI_10X_PDEV_PARAM_ANI_ENABLE,
  1177. .ani_poll_period = WMI_10X_PDEV_PARAM_ANI_POLL_PERIOD,
  1178. .ani_listen_period = WMI_10X_PDEV_PARAM_ANI_LISTEN_PERIOD,
  1179. .ani_ofdm_level = WMI_10X_PDEV_PARAM_ANI_OFDM_LEVEL,
  1180. .ani_cck_level = WMI_10X_PDEV_PARAM_ANI_CCK_LEVEL,
  1181. .dyntxchain = WMI_10X_PDEV_PARAM_DYNTXCHAIN,
  1182. .proxy_sta = WMI_PDEV_PARAM_UNSUPPORTED,
  1183. .idle_ps_config = WMI_PDEV_PARAM_UNSUPPORTED,
  1184. .power_gating_sleep = WMI_PDEV_PARAM_UNSUPPORTED,
  1185. .fast_channel_reset = WMI_10X_PDEV_PARAM_FAST_CHANNEL_RESET,
  1186. .burst_dur = WMI_10X_PDEV_PARAM_BURST_DUR,
  1187. .burst_enable = WMI_10X_PDEV_PARAM_BURST_ENABLE,
  1188. .cal_period = WMI_10X_PDEV_PARAM_CAL_PERIOD,
  1189. .aggr_burst = WMI_PDEV_PARAM_UNSUPPORTED,
  1190. .rx_decap_mode = WMI_PDEV_PARAM_UNSUPPORTED,
  1191. .smart_antenna_default_antenna = WMI_PDEV_PARAM_UNSUPPORTED,
  1192. .igmpmld_override = WMI_PDEV_PARAM_UNSUPPORTED,
  1193. .igmpmld_tid = WMI_PDEV_PARAM_UNSUPPORTED,
  1194. .antenna_gain = WMI_PDEV_PARAM_UNSUPPORTED,
  1195. .rx_filter = WMI_PDEV_PARAM_UNSUPPORTED,
  1196. .set_mcast_to_ucast_tid = WMI_PDEV_PARAM_UNSUPPORTED,
  1197. .proxy_sta_mode = WMI_PDEV_PARAM_UNSUPPORTED,
  1198. .set_mcast2ucast_mode = WMI_PDEV_PARAM_UNSUPPORTED,
  1199. .set_mcast2ucast_buffer = WMI_PDEV_PARAM_UNSUPPORTED,
  1200. .remove_mcast2ucast_buffer = WMI_PDEV_PARAM_UNSUPPORTED,
  1201. .peer_sta_ps_statechg_enable = WMI_PDEV_PARAM_UNSUPPORTED,
  1202. .igmpmld_ac_override = WMI_PDEV_PARAM_UNSUPPORTED,
  1203. .block_interbss = WMI_PDEV_PARAM_UNSUPPORTED,
  1204. .set_disable_reset_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
  1205. .set_msdu_ttl_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
  1206. .set_ppdu_duration_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
  1207. .txbf_sound_period_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
  1208. .set_promisc_mode_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
  1209. .set_burst_mode_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
  1210. .en_stats = WMI_PDEV_PARAM_UNSUPPORTED,
  1211. .mu_group_policy = WMI_PDEV_PARAM_UNSUPPORTED,
  1212. .noise_detection = WMI_PDEV_PARAM_UNSUPPORTED,
  1213. .noise_threshold = WMI_PDEV_PARAM_UNSUPPORTED,
  1214. .dpd_enable = WMI_PDEV_PARAM_UNSUPPORTED,
  1215. .set_mcast_bcast_echo = WMI_PDEV_PARAM_UNSUPPORTED,
  1216. .atf_strict_sch = WMI_PDEV_PARAM_UNSUPPORTED,
  1217. .atf_sched_duration = WMI_PDEV_PARAM_UNSUPPORTED,
  1218. .ant_plzn = WMI_PDEV_PARAM_UNSUPPORTED,
  1219. .mgmt_retry_limit = WMI_PDEV_PARAM_UNSUPPORTED,
  1220. .sensitivity_level = WMI_PDEV_PARAM_UNSUPPORTED,
  1221. .signed_txpower_2g = WMI_PDEV_PARAM_UNSUPPORTED,
  1222. .signed_txpower_5g = WMI_PDEV_PARAM_UNSUPPORTED,
  1223. .enable_per_tid_amsdu = WMI_PDEV_PARAM_UNSUPPORTED,
  1224. .enable_per_tid_ampdu = WMI_PDEV_PARAM_UNSUPPORTED,
  1225. .cca_threshold = WMI_PDEV_PARAM_UNSUPPORTED,
  1226. .rts_fixed_rate = WMI_PDEV_PARAM_UNSUPPORTED,
  1227. .pdev_reset = WMI_PDEV_PARAM_UNSUPPORTED,
  1228. .wapi_mbssid_offset = WMI_PDEV_PARAM_UNSUPPORTED,
  1229. .arp_srcaddr = WMI_PDEV_PARAM_UNSUPPORTED,
  1230. .arp_dstaddr = WMI_PDEV_PARAM_UNSUPPORTED,
  1231. .enable_btcoex = WMI_PDEV_PARAM_UNSUPPORTED,
  1232. };
  1233. static struct wmi_pdev_param_map wmi_10_2_4_pdev_param_map = {
  1234. .tx_chain_mask = WMI_10X_PDEV_PARAM_TX_CHAIN_MASK,
  1235. .rx_chain_mask = WMI_10X_PDEV_PARAM_RX_CHAIN_MASK,
  1236. .txpower_limit2g = WMI_10X_PDEV_PARAM_TXPOWER_LIMIT2G,
  1237. .txpower_limit5g = WMI_10X_PDEV_PARAM_TXPOWER_LIMIT5G,
  1238. .txpower_scale = WMI_10X_PDEV_PARAM_TXPOWER_SCALE,
  1239. .beacon_gen_mode = WMI_10X_PDEV_PARAM_BEACON_GEN_MODE,
  1240. .beacon_tx_mode = WMI_10X_PDEV_PARAM_BEACON_TX_MODE,
  1241. .resmgr_offchan_mode = WMI_10X_PDEV_PARAM_RESMGR_OFFCHAN_MODE,
  1242. .protection_mode = WMI_10X_PDEV_PARAM_PROTECTION_MODE,
  1243. .dynamic_bw = WMI_10X_PDEV_PARAM_DYNAMIC_BW,
  1244. .non_agg_sw_retry_th = WMI_10X_PDEV_PARAM_NON_AGG_SW_RETRY_TH,
  1245. .agg_sw_retry_th = WMI_10X_PDEV_PARAM_AGG_SW_RETRY_TH,
  1246. .sta_kickout_th = WMI_10X_PDEV_PARAM_STA_KICKOUT_TH,
  1247. .ac_aggrsize_scaling = WMI_10X_PDEV_PARAM_AC_AGGRSIZE_SCALING,
  1248. .ltr_enable = WMI_10X_PDEV_PARAM_LTR_ENABLE,
  1249. .ltr_ac_latency_be = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_BE,
  1250. .ltr_ac_latency_bk = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_BK,
  1251. .ltr_ac_latency_vi = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_VI,
  1252. .ltr_ac_latency_vo = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_VO,
  1253. .ltr_ac_latency_timeout = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_TIMEOUT,
  1254. .ltr_sleep_override = WMI_10X_PDEV_PARAM_LTR_SLEEP_OVERRIDE,
  1255. .ltr_rx_override = WMI_10X_PDEV_PARAM_LTR_RX_OVERRIDE,
  1256. .ltr_tx_activity_timeout = WMI_10X_PDEV_PARAM_LTR_TX_ACTIVITY_TIMEOUT,
  1257. .l1ss_enable = WMI_10X_PDEV_PARAM_L1SS_ENABLE,
  1258. .dsleep_enable = WMI_10X_PDEV_PARAM_DSLEEP_ENABLE,
  1259. .pcielp_txbuf_flush = WMI_PDEV_PARAM_UNSUPPORTED,
  1260. .pcielp_txbuf_watermark = WMI_PDEV_PARAM_UNSUPPORTED,
  1261. .pcielp_txbuf_tmo_en = WMI_PDEV_PARAM_UNSUPPORTED,
  1262. .pcielp_txbuf_tmo_value = WMI_PDEV_PARAM_UNSUPPORTED,
  1263. .pdev_stats_update_period = WMI_10X_PDEV_PARAM_PDEV_STATS_UPDATE_PERIOD,
  1264. .vdev_stats_update_period = WMI_10X_PDEV_PARAM_VDEV_STATS_UPDATE_PERIOD,
  1265. .peer_stats_update_period = WMI_10X_PDEV_PARAM_PEER_STATS_UPDATE_PERIOD,
  1266. .bcnflt_stats_update_period =
  1267. WMI_10X_PDEV_PARAM_BCNFLT_STATS_UPDATE_PERIOD,
  1268. .pmf_qos = WMI_10X_PDEV_PARAM_PMF_QOS,
  1269. .arp_ac_override = WMI_10X_PDEV_PARAM_ARPDHCP_AC_OVERRIDE,
  1270. .dcs = WMI_10X_PDEV_PARAM_DCS,
  1271. .ani_enable = WMI_10X_PDEV_PARAM_ANI_ENABLE,
  1272. .ani_poll_period = WMI_10X_PDEV_PARAM_ANI_POLL_PERIOD,
  1273. .ani_listen_period = WMI_10X_PDEV_PARAM_ANI_LISTEN_PERIOD,
  1274. .ani_ofdm_level = WMI_10X_PDEV_PARAM_ANI_OFDM_LEVEL,
  1275. .ani_cck_level = WMI_10X_PDEV_PARAM_ANI_CCK_LEVEL,
  1276. .dyntxchain = WMI_10X_PDEV_PARAM_DYNTXCHAIN,
  1277. .proxy_sta = WMI_PDEV_PARAM_UNSUPPORTED,
  1278. .idle_ps_config = WMI_PDEV_PARAM_UNSUPPORTED,
  1279. .power_gating_sleep = WMI_PDEV_PARAM_UNSUPPORTED,
  1280. .fast_channel_reset = WMI_10X_PDEV_PARAM_FAST_CHANNEL_RESET,
  1281. .burst_dur = WMI_10X_PDEV_PARAM_BURST_DUR,
  1282. .burst_enable = WMI_10X_PDEV_PARAM_BURST_ENABLE,
  1283. .cal_period = WMI_10X_PDEV_PARAM_CAL_PERIOD,
  1284. .aggr_burst = WMI_PDEV_PARAM_UNSUPPORTED,
  1285. .rx_decap_mode = WMI_PDEV_PARAM_UNSUPPORTED,
  1286. .smart_antenna_default_antenna = WMI_PDEV_PARAM_UNSUPPORTED,
  1287. .igmpmld_override = WMI_PDEV_PARAM_UNSUPPORTED,
  1288. .igmpmld_tid = WMI_PDEV_PARAM_UNSUPPORTED,
  1289. .antenna_gain = WMI_PDEV_PARAM_UNSUPPORTED,
  1290. .rx_filter = WMI_PDEV_PARAM_UNSUPPORTED,
  1291. .set_mcast_to_ucast_tid = WMI_PDEV_PARAM_UNSUPPORTED,
  1292. .proxy_sta_mode = WMI_PDEV_PARAM_UNSUPPORTED,
  1293. .set_mcast2ucast_mode = WMI_PDEV_PARAM_UNSUPPORTED,
  1294. .set_mcast2ucast_buffer = WMI_PDEV_PARAM_UNSUPPORTED,
  1295. .remove_mcast2ucast_buffer = WMI_PDEV_PARAM_UNSUPPORTED,
  1296. .peer_sta_ps_statechg_enable = WMI_PDEV_PARAM_UNSUPPORTED,
  1297. .igmpmld_ac_override = WMI_PDEV_PARAM_UNSUPPORTED,
  1298. .block_interbss = WMI_PDEV_PARAM_UNSUPPORTED,
  1299. .set_disable_reset_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
  1300. .set_msdu_ttl_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
  1301. .set_ppdu_duration_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
  1302. .txbf_sound_period_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
  1303. .set_promisc_mode_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
  1304. .set_burst_mode_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
  1305. .en_stats = WMI_PDEV_PARAM_UNSUPPORTED,
  1306. .mu_group_policy = WMI_PDEV_PARAM_UNSUPPORTED,
  1307. .noise_detection = WMI_PDEV_PARAM_UNSUPPORTED,
  1308. .noise_threshold = WMI_PDEV_PARAM_UNSUPPORTED,
  1309. .dpd_enable = WMI_PDEV_PARAM_UNSUPPORTED,
  1310. .set_mcast_bcast_echo = WMI_PDEV_PARAM_UNSUPPORTED,
  1311. .atf_strict_sch = WMI_PDEV_PARAM_UNSUPPORTED,
  1312. .atf_sched_duration = WMI_PDEV_PARAM_UNSUPPORTED,
  1313. .ant_plzn = WMI_PDEV_PARAM_UNSUPPORTED,
  1314. .mgmt_retry_limit = WMI_PDEV_PARAM_UNSUPPORTED,
  1315. .sensitivity_level = WMI_PDEV_PARAM_UNSUPPORTED,
  1316. .signed_txpower_2g = WMI_PDEV_PARAM_UNSUPPORTED,
  1317. .signed_txpower_5g = WMI_PDEV_PARAM_UNSUPPORTED,
  1318. .enable_per_tid_amsdu = WMI_PDEV_PARAM_UNSUPPORTED,
  1319. .enable_per_tid_ampdu = WMI_PDEV_PARAM_UNSUPPORTED,
  1320. .cca_threshold = WMI_PDEV_PARAM_UNSUPPORTED,
  1321. .rts_fixed_rate = WMI_PDEV_PARAM_UNSUPPORTED,
  1322. .pdev_reset = WMI_PDEV_PARAM_UNSUPPORTED,
  1323. .wapi_mbssid_offset = WMI_PDEV_PARAM_UNSUPPORTED,
  1324. .arp_srcaddr = WMI_PDEV_PARAM_UNSUPPORTED,
  1325. .arp_dstaddr = WMI_PDEV_PARAM_UNSUPPORTED,
  1326. .enable_btcoex = WMI_PDEV_PARAM_UNSUPPORTED,
  1327. };
  1328. /* firmware 10.2 specific mappings */
  1329. static struct wmi_cmd_map wmi_10_2_cmd_map = {
  1330. .init_cmdid = WMI_10_2_INIT_CMDID,
  1331. .start_scan_cmdid = WMI_10_2_START_SCAN_CMDID,
  1332. .stop_scan_cmdid = WMI_10_2_STOP_SCAN_CMDID,
  1333. .scan_chan_list_cmdid = WMI_10_2_SCAN_CHAN_LIST_CMDID,
  1334. .scan_sch_prio_tbl_cmdid = WMI_CMD_UNSUPPORTED,
  1335. .scan_prob_req_oui_cmdid = WMI_CMD_UNSUPPORTED,
  1336. .pdev_set_regdomain_cmdid = WMI_10_2_PDEV_SET_REGDOMAIN_CMDID,
  1337. .pdev_set_channel_cmdid = WMI_10_2_PDEV_SET_CHANNEL_CMDID,
  1338. .pdev_set_param_cmdid = WMI_10_2_PDEV_SET_PARAM_CMDID,
  1339. .pdev_pktlog_enable_cmdid = WMI_10_2_PDEV_PKTLOG_ENABLE_CMDID,
  1340. .pdev_pktlog_disable_cmdid = WMI_10_2_PDEV_PKTLOG_DISABLE_CMDID,
  1341. .pdev_set_wmm_params_cmdid = WMI_10_2_PDEV_SET_WMM_PARAMS_CMDID,
  1342. .pdev_set_ht_cap_ie_cmdid = WMI_10_2_PDEV_SET_HT_CAP_IE_CMDID,
  1343. .pdev_set_vht_cap_ie_cmdid = WMI_10_2_PDEV_SET_VHT_CAP_IE_CMDID,
  1344. .pdev_set_quiet_mode_cmdid = WMI_10_2_PDEV_SET_QUIET_MODE_CMDID,
  1345. .pdev_green_ap_ps_enable_cmdid = WMI_10_2_PDEV_GREEN_AP_PS_ENABLE_CMDID,
  1346. .pdev_get_tpc_config_cmdid = WMI_10_2_PDEV_GET_TPC_CONFIG_CMDID,
  1347. .pdev_set_base_macaddr_cmdid = WMI_10_2_PDEV_SET_BASE_MACADDR_CMDID,
  1348. .vdev_create_cmdid = WMI_10_2_VDEV_CREATE_CMDID,
  1349. .vdev_delete_cmdid = WMI_10_2_VDEV_DELETE_CMDID,
  1350. .vdev_start_request_cmdid = WMI_10_2_VDEV_START_REQUEST_CMDID,
  1351. .vdev_restart_request_cmdid = WMI_10_2_VDEV_RESTART_REQUEST_CMDID,
  1352. .vdev_up_cmdid = WMI_10_2_VDEV_UP_CMDID,
  1353. .vdev_stop_cmdid = WMI_10_2_VDEV_STOP_CMDID,
  1354. .vdev_down_cmdid = WMI_10_2_VDEV_DOWN_CMDID,
  1355. .vdev_set_param_cmdid = WMI_10_2_VDEV_SET_PARAM_CMDID,
  1356. .vdev_install_key_cmdid = WMI_10_2_VDEV_INSTALL_KEY_CMDID,
  1357. .peer_create_cmdid = WMI_10_2_PEER_CREATE_CMDID,
  1358. .peer_delete_cmdid = WMI_10_2_PEER_DELETE_CMDID,
  1359. .peer_flush_tids_cmdid = WMI_10_2_PEER_FLUSH_TIDS_CMDID,
  1360. .peer_set_param_cmdid = WMI_10_2_PEER_SET_PARAM_CMDID,
  1361. .peer_assoc_cmdid = WMI_10_2_PEER_ASSOC_CMDID,
  1362. .peer_add_wds_entry_cmdid = WMI_10_2_PEER_ADD_WDS_ENTRY_CMDID,
  1363. .peer_remove_wds_entry_cmdid = WMI_10_2_PEER_REMOVE_WDS_ENTRY_CMDID,
  1364. .peer_mcast_group_cmdid = WMI_10_2_PEER_MCAST_GROUP_CMDID,
  1365. .bcn_tx_cmdid = WMI_10_2_BCN_TX_CMDID,
  1366. .pdev_send_bcn_cmdid = WMI_10_2_PDEV_SEND_BCN_CMDID,
  1367. .bcn_tmpl_cmdid = WMI_CMD_UNSUPPORTED,
  1368. .bcn_filter_rx_cmdid = WMI_10_2_BCN_FILTER_RX_CMDID,
  1369. .prb_req_filter_rx_cmdid = WMI_10_2_PRB_REQ_FILTER_RX_CMDID,
  1370. .mgmt_tx_cmdid = WMI_10_2_MGMT_TX_CMDID,
  1371. .prb_tmpl_cmdid = WMI_CMD_UNSUPPORTED,
  1372. .addba_clear_resp_cmdid = WMI_10_2_ADDBA_CLEAR_RESP_CMDID,
  1373. .addba_send_cmdid = WMI_10_2_ADDBA_SEND_CMDID,
  1374. .addba_status_cmdid = WMI_10_2_ADDBA_STATUS_CMDID,
  1375. .delba_send_cmdid = WMI_10_2_DELBA_SEND_CMDID,
  1376. .addba_set_resp_cmdid = WMI_10_2_ADDBA_SET_RESP_CMDID,
  1377. .send_singleamsdu_cmdid = WMI_10_2_SEND_SINGLEAMSDU_CMDID,
  1378. .sta_powersave_mode_cmdid = WMI_10_2_STA_POWERSAVE_MODE_CMDID,
  1379. .sta_powersave_param_cmdid = WMI_10_2_STA_POWERSAVE_PARAM_CMDID,
  1380. .sta_mimo_ps_mode_cmdid = WMI_10_2_STA_MIMO_PS_MODE_CMDID,
  1381. .pdev_dfs_enable_cmdid = WMI_10_2_PDEV_DFS_ENABLE_CMDID,
  1382. .pdev_dfs_disable_cmdid = WMI_10_2_PDEV_DFS_DISABLE_CMDID,
  1383. .roam_scan_mode = WMI_10_2_ROAM_SCAN_MODE,
  1384. .roam_scan_rssi_threshold = WMI_10_2_ROAM_SCAN_RSSI_THRESHOLD,
  1385. .roam_scan_period = WMI_10_2_ROAM_SCAN_PERIOD,
  1386. .roam_scan_rssi_change_threshold =
  1387. WMI_10_2_ROAM_SCAN_RSSI_CHANGE_THRESHOLD,
  1388. .roam_ap_profile = WMI_10_2_ROAM_AP_PROFILE,
  1389. .ofl_scan_add_ap_profile = WMI_10_2_OFL_SCAN_ADD_AP_PROFILE,
  1390. .ofl_scan_remove_ap_profile = WMI_10_2_OFL_SCAN_REMOVE_AP_PROFILE,
  1391. .ofl_scan_period = WMI_10_2_OFL_SCAN_PERIOD,
  1392. .p2p_dev_set_device_info = WMI_10_2_P2P_DEV_SET_DEVICE_INFO,
  1393. .p2p_dev_set_discoverability = WMI_10_2_P2P_DEV_SET_DISCOVERABILITY,
  1394. .p2p_go_set_beacon_ie = WMI_10_2_P2P_GO_SET_BEACON_IE,
  1395. .p2p_go_set_probe_resp_ie = WMI_10_2_P2P_GO_SET_PROBE_RESP_IE,
  1396. .p2p_set_vendor_ie_data_cmdid = WMI_CMD_UNSUPPORTED,
  1397. .ap_ps_peer_param_cmdid = WMI_10_2_AP_PS_PEER_PARAM_CMDID,
  1398. .ap_ps_peer_uapsd_coex_cmdid = WMI_CMD_UNSUPPORTED,
  1399. .peer_rate_retry_sched_cmdid = WMI_10_2_PEER_RATE_RETRY_SCHED_CMDID,
  1400. .wlan_profile_trigger_cmdid = WMI_10_2_WLAN_PROFILE_TRIGGER_CMDID,
  1401. .wlan_profile_set_hist_intvl_cmdid =
  1402. WMI_10_2_WLAN_PROFILE_SET_HIST_INTVL_CMDID,
  1403. .wlan_profile_get_profile_data_cmdid =
  1404. WMI_10_2_WLAN_PROFILE_GET_PROFILE_DATA_CMDID,
  1405. .wlan_profile_enable_profile_id_cmdid =
  1406. WMI_10_2_WLAN_PROFILE_ENABLE_PROFILE_ID_CMDID,
  1407. .wlan_profile_list_profile_id_cmdid =
  1408. WMI_10_2_WLAN_PROFILE_LIST_PROFILE_ID_CMDID,
  1409. .pdev_suspend_cmdid = WMI_10_2_PDEV_SUSPEND_CMDID,
  1410. .pdev_resume_cmdid = WMI_10_2_PDEV_RESUME_CMDID,
  1411. .add_bcn_filter_cmdid = WMI_10_2_ADD_BCN_FILTER_CMDID,
  1412. .rmv_bcn_filter_cmdid = WMI_10_2_RMV_BCN_FILTER_CMDID,
  1413. .wow_add_wake_pattern_cmdid = WMI_10_2_WOW_ADD_WAKE_PATTERN_CMDID,
  1414. .wow_del_wake_pattern_cmdid = WMI_10_2_WOW_DEL_WAKE_PATTERN_CMDID,
  1415. .wow_enable_disable_wake_event_cmdid =
  1416. WMI_10_2_WOW_ENABLE_DISABLE_WAKE_EVENT_CMDID,
  1417. .wow_enable_cmdid = WMI_10_2_WOW_ENABLE_CMDID,
  1418. .wow_hostwakeup_from_sleep_cmdid =
  1419. WMI_10_2_WOW_HOSTWAKEUP_FROM_SLEEP_CMDID,
  1420. .rtt_measreq_cmdid = WMI_10_2_RTT_MEASREQ_CMDID,
  1421. .rtt_tsf_cmdid = WMI_10_2_RTT_TSF_CMDID,
  1422. .vdev_spectral_scan_configure_cmdid =
  1423. WMI_10_2_VDEV_SPECTRAL_SCAN_CONFIGURE_CMDID,
  1424. .vdev_spectral_scan_enable_cmdid =
  1425. WMI_10_2_VDEV_SPECTRAL_SCAN_ENABLE_CMDID,
  1426. .request_stats_cmdid = WMI_10_2_REQUEST_STATS_CMDID,
  1427. .set_arp_ns_offload_cmdid = WMI_CMD_UNSUPPORTED,
  1428. .network_list_offload_config_cmdid = WMI_CMD_UNSUPPORTED,
  1429. .gtk_offload_cmdid = WMI_CMD_UNSUPPORTED,
  1430. .csa_offload_enable_cmdid = WMI_CMD_UNSUPPORTED,
  1431. .csa_offload_chanswitch_cmdid = WMI_CMD_UNSUPPORTED,
  1432. .chatter_set_mode_cmdid = WMI_CMD_UNSUPPORTED,
  1433. .peer_tid_addba_cmdid = WMI_CMD_UNSUPPORTED,
  1434. .peer_tid_delba_cmdid = WMI_CMD_UNSUPPORTED,
  1435. .sta_dtim_ps_method_cmdid = WMI_CMD_UNSUPPORTED,
  1436. .sta_uapsd_auto_trig_cmdid = WMI_CMD_UNSUPPORTED,
  1437. .sta_keepalive_cmd = WMI_CMD_UNSUPPORTED,
  1438. .echo_cmdid = WMI_10_2_ECHO_CMDID,
  1439. .pdev_utf_cmdid = WMI_10_2_PDEV_UTF_CMDID,
  1440. .dbglog_cfg_cmdid = WMI_10_2_DBGLOG_CFG_CMDID,
  1441. .pdev_qvit_cmdid = WMI_10_2_PDEV_QVIT_CMDID,
  1442. .pdev_ftm_intg_cmdid = WMI_CMD_UNSUPPORTED,
  1443. .vdev_set_keepalive_cmdid = WMI_CMD_UNSUPPORTED,
  1444. .vdev_get_keepalive_cmdid = WMI_CMD_UNSUPPORTED,
  1445. .force_fw_hang_cmdid = WMI_CMD_UNSUPPORTED,
  1446. .gpio_config_cmdid = WMI_10_2_GPIO_CONFIG_CMDID,
  1447. .gpio_output_cmdid = WMI_10_2_GPIO_OUTPUT_CMDID,
  1448. .pdev_get_temperature_cmdid = WMI_CMD_UNSUPPORTED,
  1449. .pdev_enable_adaptive_cca_cmdid = WMI_CMD_UNSUPPORTED,
  1450. .scan_update_request_cmdid = WMI_CMD_UNSUPPORTED,
  1451. .vdev_standby_response_cmdid = WMI_CMD_UNSUPPORTED,
  1452. .vdev_resume_response_cmdid = WMI_CMD_UNSUPPORTED,
  1453. .wlan_peer_caching_add_peer_cmdid = WMI_CMD_UNSUPPORTED,
  1454. .wlan_peer_caching_evict_peer_cmdid = WMI_CMD_UNSUPPORTED,
  1455. .wlan_peer_caching_restore_peer_cmdid = WMI_CMD_UNSUPPORTED,
  1456. .wlan_peer_caching_print_all_peers_info_cmdid = WMI_CMD_UNSUPPORTED,
  1457. .peer_update_wds_entry_cmdid = WMI_CMD_UNSUPPORTED,
  1458. .peer_add_proxy_sta_entry_cmdid = WMI_CMD_UNSUPPORTED,
  1459. .rtt_keepalive_cmdid = WMI_CMD_UNSUPPORTED,
  1460. .oem_req_cmdid = WMI_CMD_UNSUPPORTED,
  1461. .nan_cmdid = WMI_CMD_UNSUPPORTED,
  1462. .vdev_ratemask_cmdid = WMI_CMD_UNSUPPORTED,
  1463. .qboost_cfg_cmdid = WMI_CMD_UNSUPPORTED,
  1464. .pdev_smart_ant_enable_cmdid = WMI_CMD_UNSUPPORTED,
  1465. .pdev_smart_ant_set_rx_antenna_cmdid = WMI_CMD_UNSUPPORTED,
  1466. .peer_smart_ant_set_tx_antenna_cmdid = WMI_CMD_UNSUPPORTED,
  1467. .peer_smart_ant_set_train_info_cmdid = WMI_CMD_UNSUPPORTED,
  1468. .peer_smart_ant_set_node_config_ops_cmdid = WMI_CMD_UNSUPPORTED,
  1469. .pdev_set_antenna_switch_table_cmdid = WMI_CMD_UNSUPPORTED,
  1470. .pdev_set_ctl_table_cmdid = WMI_CMD_UNSUPPORTED,
  1471. .pdev_set_mimogain_table_cmdid = WMI_CMD_UNSUPPORTED,
  1472. .pdev_ratepwr_table_cmdid = WMI_CMD_UNSUPPORTED,
  1473. .pdev_ratepwr_chainmsk_table_cmdid = WMI_CMD_UNSUPPORTED,
  1474. .pdev_fips_cmdid = WMI_CMD_UNSUPPORTED,
  1475. .tt_set_conf_cmdid = WMI_CMD_UNSUPPORTED,
  1476. .fwtest_cmdid = WMI_CMD_UNSUPPORTED,
  1477. .vdev_atf_request_cmdid = WMI_CMD_UNSUPPORTED,
  1478. .peer_atf_request_cmdid = WMI_CMD_UNSUPPORTED,
  1479. .pdev_get_ani_cck_config_cmdid = WMI_CMD_UNSUPPORTED,
  1480. .pdev_get_ani_ofdm_config_cmdid = WMI_CMD_UNSUPPORTED,
  1481. .pdev_reserve_ast_entry_cmdid = WMI_CMD_UNSUPPORTED,
  1482. .pdev_get_tpc_table_cmdid = WMI_CMD_UNSUPPORTED,
  1483. .radar_found_cmdid = WMI_CMD_UNSUPPORTED,
  1484. };
  1485. static struct wmi_pdev_param_map wmi_10_4_pdev_param_map = {
  1486. .tx_chain_mask = WMI_10_4_PDEV_PARAM_TX_CHAIN_MASK,
  1487. .rx_chain_mask = WMI_10_4_PDEV_PARAM_RX_CHAIN_MASK,
  1488. .txpower_limit2g = WMI_10_4_PDEV_PARAM_TXPOWER_LIMIT2G,
  1489. .txpower_limit5g = WMI_10_4_PDEV_PARAM_TXPOWER_LIMIT5G,
  1490. .txpower_scale = WMI_10_4_PDEV_PARAM_TXPOWER_SCALE,
  1491. .beacon_gen_mode = WMI_10_4_PDEV_PARAM_BEACON_GEN_MODE,
  1492. .beacon_tx_mode = WMI_10_4_PDEV_PARAM_BEACON_TX_MODE,
  1493. .resmgr_offchan_mode = WMI_10_4_PDEV_PARAM_RESMGR_OFFCHAN_MODE,
  1494. .protection_mode = WMI_10_4_PDEV_PARAM_PROTECTION_MODE,
  1495. .dynamic_bw = WMI_10_4_PDEV_PARAM_DYNAMIC_BW,
  1496. .non_agg_sw_retry_th = WMI_10_4_PDEV_PARAM_NON_AGG_SW_RETRY_TH,
  1497. .agg_sw_retry_th = WMI_10_4_PDEV_PARAM_AGG_SW_RETRY_TH,
  1498. .sta_kickout_th = WMI_10_4_PDEV_PARAM_STA_KICKOUT_TH,
  1499. .ac_aggrsize_scaling = WMI_10_4_PDEV_PARAM_AC_AGGRSIZE_SCALING,
  1500. .ltr_enable = WMI_10_4_PDEV_PARAM_LTR_ENABLE,
  1501. .ltr_ac_latency_be = WMI_10_4_PDEV_PARAM_LTR_AC_LATENCY_BE,
  1502. .ltr_ac_latency_bk = WMI_10_4_PDEV_PARAM_LTR_AC_LATENCY_BK,
  1503. .ltr_ac_latency_vi = WMI_10_4_PDEV_PARAM_LTR_AC_LATENCY_VI,
  1504. .ltr_ac_latency_vo = WMI_10_4_PDEV_PARAM_LTR_AC_LATENCY_VO,
  1505. .ltr_ac_latency_timeout = WMI_10_4_PDEV_PARAM_LTR_AC_LATENCY_TIMEOUT,
  1506. .ltr_sleep_override = WMI_10_4_PDEV_PARAM_LTR_SLEEP_OVERRIDE,
  1507. .ltr_rx_override = WMI_10_4_PDEV_PARAM_LTR_RX_OVERRIDE,
  1508. .ltr_tx_activity_timeout = WMI_10_4_PDEV_PARAM_LTR_TX_ACTIVITY_TIMEOUT,
  1509. .l1ss_enable = WMI_10_4_PDEV_PARAM_L1SS_ENABLE,
  1510. .dsleep_enable = WMI_10_4_PDEV_PARAM_DSLEEP_ENABLE,
  1511. .pcielp_txbuf_flush = WMI_10_4_PDEV_PARAM_PCIELP_TXBUF_FLUSH,
  1512. .pcielp_txbuf_watermark = WMI_10_4_PDEV_PARAM_PCIELP_TXBUF_WATERMARK,
  1513. .pcielp_txbuf_tmo_en = WMI_10_4_PDEV_PARAM_PCIELP_TXBUF_TMO_EN,
  1514. .pcielp_txbuf_tmo_value = WMI_10_4_PDEV_PARAM_PCIELP_TXBUF_TMO_VALUE,
  1515. .pdev_stats_update_period =
  1516. WMI_10_4_PDEV_PARAM_PDEV_STATS_UPDATE_PERIOD,
  1517. .vdev_stats_update_period =
  1518. WMI_10_4_PDEV_PARAM_VDEV_STATS_UPDATE_PERIOD,
  1519. .peer_stats_update_period =
  1520. WMI_10_4_PDEV_PARAM_PEER_STATS_UPDATE_PERIOD,
  1521. .bcnflt_stats_update_period =
  1522. WMI_10_4_PDEV_PARAM_BCNFLT_STATS_UPDATE_PERIOD,
  1523. .pmf_qos = WMI_10_4_PDEV_PARAM_PMF_QOS,
  1524. .arp_ac_override = WMI_10_4_PDEV_PARAM_ARP_AC_OVERRIDE,
  1525. .dcs = WMI_10_4_PDEV_PARAM_DCS,
  1526. .ani_enable = WMI_10_4_PDEV_PARAM_ANI_ENABLE,
  1527. .ani_poll_period = WMI_10_4_PDEV_PARAM_ANI_POLL_PERIOD,
  1528. .ani_listen_period = WMI_10_4_PDEV_PARAM_ANI_LISTEN_PERIOD,
  1529. .ani_ofdm_level = WMI_10_4_PDEV_PARAM_ANI_OFDM_LEVEL,
  1530. .ani_cck_level = WMI_10_4_PDEV_PARAM_ANI_CCK_LEVEL,
  1531. .dyntxchain = WMI_10_4_PDEV_PARAM_DYNTXCHAIN,
  1532. .proxy_sta = WMI_10_4_PDEV_PARAM_PROXY_STA,
  1533. .idle_ps_config = WMI_10_4_PDEV_PARAM_IDLE_PS_CONFIG,
  1534. .power_gating_sleep = WMI_10_4_PDEV_PARAM_POWER_GATING_SLEEP,
  1535. .fast_channel_reset = WMI_10_4_PDEV_PARAM_FAST_CHANNEL_RESET,
  1536. .burst_dur = WMI_10_4_PDEV_PARAM_BURST_DUR,
  1537. .burst_enable = WMI_10_4_PDEV_PARAM_BURST_ENABLE,
  1538. .cal_period = WMI_10_4_PDEV_PARAM_CAL_PERIOD,
  1539. .aggr_burst = WMI_10_4_PDEV_PARAM_AGGR_BURST,
  1540. .rx_decap_mode = WMI_10_4_PDEV_PARAM_RX_DECAP_MODE,
  1541. .smart_antenna_default_antenna =
  1542. WMI_10_4_PDEV_PARAM_SMART_ANTENNA_DEFAULT_ANTENNA,
  1543. .igmpmld_override = WMI_10_4_PDEV_PARAM_IGMPMLD_OVERRIDE,
  1544. .igmpmld_tid = WMI_10_4_PDEV_PARAM_IGMPMLD_TID,
  1545. .antenna_gain = WMI_10_4_PDEV_PARAM_ANTENNA_GAIN,
  1546. .rx_filter = WMI_10_4_PDEV_PARAM_RX_FILTER,
  1547. .set_mcast_to_ucast_tid = WMI_10_4_PDEV_SET_MCAST_TO_UCAST_TID,
  1548. .proxy_sta_mode = WMI_10_4_PDEV_PARAM_PROXY_STA_MODE,
  1549. .set_mcast2ucast_mode = WMI_10_4_PDEV_PARAM_SET_MCAST2UCAST_MODE,
  1550. .set_mcast2ucast_buffer = WMI_10_4_PDEV_PARAM_SET_MCAST2UCAST_BUFFER,
  1551. .remove_mcast2ucast_buffer =
  1552. WMI_10_4_PDEV_PARAM_REMOVE_MCAST2UCAST_BUFFER,
  1553. .peer_sta_ps_statechg_enable =
  1554. WMI_10_4_PDEV_PEER_STA_PS_STATECHG_ENABLE,
  1555. .igmpmld_ac_override = WMI_10_4_PDEV_PARAM_IGMPMLD_AC_OVERRIDE,
  1556. .block_interbss = WMI_10_4_PDEV_PARAM_BLOCK_INTERBSS,
  1557. .set_disable_reset_cmdid = WMI_10_4_PDEV_PARAM_SET_DISABLE_RESET_CMDID,
  1558. .set_msdu_ttl_cmdid = WMI_10_4_PDEV_PARAM_SET_MSDU_TTL_CMDID,
  1559. .set_ppdu_duration_cmdid = WMI_10_4_PDEV_PARAM_SET_PPDU_DURATION_CMDID,
  1560. .txbf_sound_period_cmdid = WMI_10_4_PDEV_PARAM_TXBF_SOUND_PERIOD_CMDID,
  1561. .set_promisc_mode_cmdid = WMI_10_4_PDEV_PARAM_SET_PROMISC_MODE_CMDID,
  1562. .set_burst_mode_cmdid = WMI_10_4_PDEV_PARAM_SET_BURST_MODE_CMDID,
  1563. .en_stats = WMI_10_4_PDEV_PARAM_EN_STATS,
  1564. .mu_group_policy = WMI_10_4_PDEV_PARAM_MU_GROUP_POLICY,
  1565. .noise_detection = WMI_10_4_PDEV_PARAM_NOISE_DETECTION,
  1566. .noise_threshold = WMI_10_4_PDEV_PARAM_NOISE_THRESHOLD,
  1567. .dpd_enable = WMI_10_4_PDEV_PARAM_DPD_ENABLE,
  1568. .set_mcast_bcast_echo = WMI_10_4_PDEV_PARAM_SET_MCAST_BCAST_ECHO,
  1569. .atf_strict_sch = WMI_10_4_PDEV_PARAM_ATF_STRICT_SCH,
  1570. .atf_sched_duration = WMI_10_4_PDEV_PARAM_ATF_SCHED_DURATION,
  1571. .ant_plzn = WMI_10_4_PDEV_PARAM_ANT_PLZN,
  1572. .mgmt_retry_limit = WMI_10_4_PDEV_PARAM_MGMT_RETRY_LIMIT,
  1573. .sensitivity_level = WMI_10_4_PDEV_PARAM_SENSITIVITY_LEVEL,
  1574. .signed_txpower_2g = WMI_10_4_PDEV_PARAM_SIGNED_TXPOWER_2G,
  1575. .signed_txpower_5g = WMI_10_4_PDEV_PARAM_SIGNED_TXPOWER_5G,
  1576. .enable_per_tid_amsdu = WMI_10_4_PDEV_PARAM_ENABLE_PER_TID_AMSDU,
  1577. .enable_per_tid_ampdu = WMI_10_4_PDEV_PARAM_ENABLE_PER_TID_AMPDU,
  1578. .cca_threshold = WMI_10_4_PDEV_PARAM_CCA_THRESHOLD,
  1579. .rts_fixed_rate = WMI_10_4_PDEV_PARAM_RTS_FIXED_RATE,
  1580. .pdev_reset = WMI_10_4_PDEV_PARAM_PDEV_RESET,
  1581. .wapi_mbssid_offset = WMI_10_4_PDEV_PARAM_WAPI_MBSSID_OFFSET,
  1582. .arp_srcaddr = WMI_10_4_PDEV_PARAM_ARP_SRCADDR,
  1583. .arp_dstaddr = WMI_10_4_PDEV_PARAM_ARP_DSTADDR,
  1584. .enable_btcoex = WMI_10_4_PDEV_PARAM_ENABLE_BTCOEX,
  1585. };
  1586. static const struct wmi_peer_flags_map wmi_peer_flags_map = {
  1587. .auth = WMI_PEER_AUTH,
  1588. .qos = WMI_PEER_QOS,
  1589. .need_ptk_4_way = WMI_PEER_NEED_PTK_4_WAY,
  1590. .need_gtk_2_way = WMI_PEER_NEED_GTK_2_WAY,
  1591. .apsd = WMI_PEER_APSD,
  1592. .ht = WMI_PEER_HT,
  1593. .bw40 = WMI_PEER_40MHZ,
  1594. .stbc = WMI_PEER_STBC,
  1595. .ldbc = WMI_PEER_LDPC,
  1596. .dyn_mimops = WMI_PEER_DYN_MIMOPS,
  1597. .static_mimops = WMI_PEER_STATIC_MIMOPS,
  1598. .spatial_mux = WMI_PEER_SPATIAL_MUX,
  1599. .vht = WMI_PEER_VHT,
  1600. .bw80 = WMI_PEER_80MHZ,
  1601. .vht_2g = WMI_PEER_VHT_2G,
  1602. .pmf = WMI_PEER_PMF,
  1603. .bw160 = WMI_PEER_160MHZ,
  1604. };
  1605. static const struct wmi_peer_flags_map wmi_10x_peer_flags_map = {
  1606. .auth = WMI_10X_PEER_AUTH,
  1607. .qos = WMI_10X_PEER_QOS,
  1608. .need_ptk_4_way = WMI_10X_PEER_NEED_PTK_4_WAY,
  1609. .need_gtk_2_way = WMI_10X_PEER_NEED_GTK_2_WAY,
  1610. .apsd = WMI_10X_PEER_APSD,
  1611. .ht = WMI_10X_PEER_HT,
  1612. .bw40 = WMI_10X_PEER_40MHZ,
  1613. .stbc = WMI_10X_PEER_STBC,
  1614. .ldbc = WMI_10X_PEER_LDPC,
  1615. .dyn_mimops = WMI_10X_PEER_DYN_MIMOPS,
  1616. .static_mimops = WMI_10X_PEER_STATIC_MIMOPS,
  1617. .spatial_mux = WMI_10X_PEER_SPATIAL_MUX,
  1618. .vht = WMI_10X_PEER_VHT,
  1619. .bw80 = WMI_10X_PEER_80MHZ,
  1620. .bw160 = WMI_10X_PEER_160MHZ,
  1621. };
  1622. static const struct wmi_peer_flags_map wmi_10_2_peer_flags_map = {
  1623. .auth = WMI_10_2_PEER_AUTH,
  1624. .qos = WMI_10_2_PEER_QOS,
  1625. .need_ptk_4_way = WMI_10_2_PEER_NEED_PTK_4_WAY,
  1626. .need_gtk_2_way = WMI_10_2_PEER_NEED_GTK_2_WAY,
  1627. .apsd = WMI_10_2_PEER_APSD,
  1628. .ht = WMI_10_2_PEER_HT,
  1629. .bw40 = WMI_10_2_PEER_40MHZ,
  1630. .stbc = WMI_10_2_PEER_STBC,
  1631. .ldbc = WMI_10_2_PEER_LDPC,
  1632. .dyn_mimops = WMI_10_2_PEER_DYN_MIMOPS,
  1633. .static_mimops = WMI_10_2_PEER_STATIC_MIMOPS,
  1634. .spatial_mux = WMI_10_2_PEER_SPATIAL_MUX,
  1635. .vht = WMI_10_2_PEER_VHT,
  1636. .bw80 = WMI_10_2_PEER_80MHZ,
  1637. .vht_2g = WMI_10_2_PEER_VHT_2G,
  1638. .pmf = WMI_10_2_PEER_PMF,
  1639. .bw160 = WMI_10_2_PEER_160MHZ,
  1640. };
  1641. void ath10k_wmi_put_wmi_channel(struct wmi_channel *ch,
  1642. const struct wmi_channel_arg *arg)
  1643. {
  1644. u32 flags = 0;
  1645. memset(ch, 0, sizeof(*ch));
  1646. if (arg->passive)
  1647. flags |= WMI_CHAN_FLAG_PASSIVE;
  1648. if (arg->allow_ibss)
  1649. flags |= WMI_CHAN_FLAG_ADHOC_ALLOWED;
  1650. if (arg->allow_ht)
  1651. flags |= WMI_CHAN_FLAG_ALLOW_HT;
  1652. if (arg->allow_vht)
  1653. flags |= WMI_CHAN_FLAG_ALLOW_VHT;
  1654. if (arg->ht40plus)
  1655. flags |= WMI_CHAN_FLAG_HT40_PLUS;
  1656. if (arg->chan_radar)
  1657. flags |= WMI_CHAN_FLAG_DFS;
  1658. ch->mhz = __cpu_to_le32(arg->freq);
  1659. ch->band_center_freq1 = __cpu_to_le32(arg->band_center_freq1);
  1660. if (arg->mode == MODE_11AC_VHT80_80)
  1661. ch->band_center_freq2 = __cpu_to_le32(arg->band_center_freq2);
  1662. else
  1663. ch->band_center_freq2 = 0;
  1664. ch->min_power = arg->min_power;
  1665. ch->max_power = arg->max_power;
  1666. ch->reg_power = arg->max_reg_power;
  1667. ch->antenna_max = arg->max_antenna_gain;
  1668. ch->max_tx_power = arg->max_power;
  1669. /* mode & flags share storage */
  1670. ch->mode = arg->mode;
  1671. ch->flags |= __cpu_to_le32(flags);
  1672. }
  1673. int ath10k_wmi_wait_for_service_ready(struct ath10k *ar)
  1674. {
  1675. unsigned long time_left;
  1676. time_left = wait_for_completion_timeout(&ar->wmi.service_ready,
  1677. WMI_SERVICE_READY_TIMEOUT_HZ);
  1678. if (!time_left)
  1679. return -ETIMEDOUT;
  1680. return 0;
  1681. }
  1682. int ath10k_wmi_wait_for_unified_ready(struct ath10k *ar)
  1683. {
  1684. unsigned long time_left;
  1685. time_left = wait_for_completion_timeout(&ar->wmi.unified_ready,
  1686. WMI_UNIFIED_READY_TIMEOUT_HZ);
  1687. if (!time_left)
  1688. return -ETIMEDOUT;
  1689. return 0;
  1690. }
  1691. struct sk_buff *ath10k_wmi_alloc_skb(struct ath10k *ar, u32 len)
  1692. {
  1693. struct sk_buff *skb;
  1694. u32 round_len = roundup(len, 4);
  1695. skb = ath10k_htc_alloc_skb(ar, WMI_SKB_HEADROOM + round_len);
  1696. if (!skb)
  1697. return NULL;
  1698. skb_reserve(skb, WMI_SKB_HEADROOM);
  1699. if (!IS_ALIGNED((unsigned long)skb->data, 4))
  1700. ath10k_warn(ar, "Unaligned WMI skb\n");
  1701. skb_put(skb, round_len);
  1702. memset(skb->data, 0, round_len);
  1703. return skb;
  1704. }
  1705. static void ath10k_wmi_htc_tx_complete(struct ath10k *ar, struct sk_buff *skb)
  1706. {
  1707. dev_kfree_skb(skb);
  1708. }
  1709. int ath10k_wmi_cmd_send_nowait(struct ath10k *ar, struct sk_buff *skb,
  1710. u32 cmd_id)
  1711. {
  1712. struct ath10k_skb_cb *skb_cb = ATH10K_SKB_CB(skb);
  1713. struct wmi_cmd_hdr *cmd_hdr;
  1714. int ret;
  1715. u32 cmd = 0;
  1716. if (skb_push(skb, sizeof(struct wmi_cmd_hdr)) == NULL)
  1717. return -ENOMEM;
  1718. cmd |= SM(cmd_id, WMI_CMD_HDR_CMD_ID);
  1719. cmd_hdr = (struct wmi_cmd_hdr *)skb->data;
  1720. cmd_hdr->cmd_id = __cpu_to_le32(cmd);
  1721. memset(skb_cb, 0, sizeof(*skb_cb));
  1722. trace_ath10k_wmi_cmd(ar, cmd_id, skb->data, skb->len);
  1723. ret = ath10k_htc_send(&ar->htc, ar->wmi.eid, skb);
  1724. if (ret)
  1725. goto err_pull;
  1726. return 0;
  1727. err_pull:
  1728. skb_pull(skb, sizeof(struct wmi_cmd_hdr));
  1729. return ret;
  1730. }
  1731. static void ath10k_wmi_tx_beacon_nowait(struct ath10k_vif *arvif)
  1732. {
  1733. struct ath10k *ar = arvif->ar;
  1734. struct ath10k_skb_cb *cb;
  1735. struct sk_buff *bcn;
  1736. bool dtim_zero;
  1737. bool deliver_cab;
  1738. int ret;
  1739. spin_lock_bh(&ar->data_lock);
  1740. bcn = arvif->beacon;
  1741. if (!bcn)
  1742. goto unlock;
  1743. cb = ATH10K_SKB_CB(bcn);
  1744. switch (arvif->beacon_state) {
  1745. case ATH10K_BEACON_SENDING:
  1746. case ATH10K_BEACON_SENT:
  1747. break;
  1748. case ATH10K_BEACON_SCHEDULED:
  1749. arvif->beacon_state = ATH10K_BEACON_SENDING;
  1750. spin_unlock_bh(&ar->data_lock);
  1751. dtim_zero = !!(cb->flags & ATH10K_SKB_F_DTIM_ZERO);
  1752. deliver_cab = !!(cb->flags & ATH10K_SKB_F_DELIVER_CAB);
  1753. ret = ath10k_wmi_beacon_send_ref_nowait(arvif->ar,
  1754. arvif->vdev_id,
  1755. bcn->data, bcn->len,
  1756. cb->paddr,
  1757. dtim_zero,
  1758. deliver_cab);
  1759. spin_lock_bh(&ar->data_lock);
  1760. if (ret == 0)
  1761. arvif->beacon_state = ATH10K_BEACON_SENT;
  1762. else
  1763. arvif->beacon_state = ATH10K_BEACON_SCHEDULED;
  1764. }
  1765. unlock:
  1766. spin_unlock_bh(&ar->data_lock);
  1767. }
  1768. static void ath10k_wmi_tx_beacons_iter(void *data, u8 *mac,
  1769. struct ieee80211_vif *vif)
  1770. {
  1771. struct ath10k_vif *arvif = (void *)vif->drv_priv;
  1772. ath10k_wmi_tx_beacon_nowait(arvif);
  1773. }
  1774. static void ath10k_wmi_tx_beacons_nowait(struct ath10k *ar)
  1775. {
  1776. ieee80211_iterate_active_interfaces_atomic(ar->hw,
  1777. IEEE80211_IFACE_ITER_NORMAL,
  1778. ath10k_wmi_tx_beacons_iter,
  1779. NULL);
  1780. }
  1781. static void ath10k_wmi_op_ep_tx_credits(struct ath10k *ar)
  1782. {
  1783. /* try to send pending beacons first. they take priority */
  1784. ath10k_wmi_tx_beacons_nowait(ar);
  1785. wake_up(&ar->wmi.tx_credits_wq);
  1786. }
  1787. int ath10k_wmi_cmd_send(struct ath10k *ar, struct sk_buff *skb, u32 cmd_id)
  1788. {
  1789. int ret = -EOPNOTSUPP;
  1790. might_sleep();
  1791. if (cmd_id == WMI_CMD_UNSUPPORTED) {
  1792. ath10k_warn(ar, "wmi command %d is not supported by firmware\n",
  1793. cmd_id);
  1794. return ret;
  1795. }
  1796. wait_event_timeout(ar->wmi.tx_credits_wq, ({
  1797. /* try to send pending beacons first. they take priority */
  1798. ath10k_wmi_tx_beacons_nowait(ar);
  1799. ret = ath10k_wmi_cmd_send_nowait(ar, skb, cmd_id);
  1800. if (ret && test_bit(ATH10K_FLAG_CRASH_FLUSH, &ar->dev_flags))
  1801. ret = -ESHUTDOWN;
  1802. (ret != -EAGAIN);
  1803. }), 3 * HZ);
  1804. if (ret)
  1805. dev_kfree_skb_any(skb);
  1806. return ret;
  1807. }
  1808. static struct sk_buff *
  1809. ath10k_wmi_op_gen_mgmt_tx(struct ath10k *ar, struct sk_buff *msdu)
  1810. {
  1811. struct ath10k_skb_cb *cb = ATH10K_SKB_CB(msdu);
  1812. struct ath10k_vif *arvif;
  1813. struct wmi_mgmt_tx_cmd *cmd;
  1814. struct ieee80211_hdr *hdr;
  1815. struct sk_buff *skb;
  1816. int len;
  1817. u32 vdev_id;
  1818. u32 buf_len = msdu->len;
  1819. u16 fc;
  1820. hdr = (struct ieee80211_hdr *)msdu->data;
  1821. fc = le16_to_cpu(hdr->frame_control);
  1822. if (cb->vif) {
  1823. arvif = (void *)cb->vif->drv_priv;
  1824. vdev_id = arvif->vdev_id;
  1825. } else {
  1826. vdev_id = 0;
  1827. }
  1828. if (WARN_ON_ONCE(!ieee80211_is_mgmt(hdr->frame_control)))
  1829. return ERR_PTR(-EINVAL);
  1830. len = sizeof(cmd->hdr) + msdu->len;
  1831. if ((ieee80211_is_action(hdr->frame_control) ||
  1832. ieee80211_is_deauth(hdr->frame_control) ||
  1833. ieee80211_is_disassoc(hdr->frame_control)) &&
  1834. ieee80211_has_protected(hdr->frame_control)) {
  1835. len += IEEE80211_CCMP_MIC_LEN;
  1836. buf_len += IEEE80211_CCMP_MIC_LEN;
  1837. }
  1838. len = round_up(len, 4);
  1839. skb = ath10k_wmi_alloc_skb(ar, len);
  1840. if (!skb)
  1841. return ERR_PTR(-ENOMEM);
  1842. cmd = (struct wmi_mgmt_tx_cmd *)skb->data;
  1843. cmd->hdr.vdev_id = __cpu_to_le32(vdev_id);
  1844. cmd->hdr.tx_rate = 0;
  1845. cmd->hdr.tx_power = 0;
  1846. cmd->hdr.buf_len = __cpu_to_le32(buf_len);
  1847. ether_addr_copy(cmd->hdr.peer_macaddr.addr, ieee80211_get_DA(hdr));
  1848. memcpy(cmd->buf, msdu->data, msdu->len);
  1849. ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi mgmt tx skb %pK len %d ftype %02x stype %02x\n",
  1850. msdu, skb->len, fc & IEEE80211_FCTL_FTYPE,
  1851. fc & IEEE80211_FCTL_STYPE);
  1852. trace_ath10k_tx_hdr(ar, skb->data, skb->len);
  1853. trace_ath10k_tx_payload(ar, skb->data, skb->len);
  1854. return skb;
  1855. }
  1856. static void ath10k_wmi_event_scan_started(struct ath10k *ar)
  1857. {
  1858. lockdep_assert_held(&ar->data_lock);
  1859. switch (ar->scan.state) {
  1860. case ATH10K_SCAN_IDLE:
  1861. case ATH10K_SCAN_RUNNING:
  1862. case ATH10K_SCAN_ABORTING:
  1863. ath10k_warn(ar, "received scan started event in an invalid scan state: %s (%d)\n",
  1864. ath10k_scan_state_str(ar->scan.state),
  1865. ar->scan.state);
  1866. break;
  1867. case ATH10K_SCAN_STARTING:
  1868. ar->scan.state = ATH10K_SCAN_RUNNING;
  1869. if (ar->scan.is_roc)
  1870. ieee80211_ready_on_channel(ar->hw);
  1871. complete(&ar->scan.started);
  1872. break;
  1873. }
  1874. }
  1875. static void ath10k_wmi_event_scan_start_failed(struct ath10k *ar)
  1876. {
  1877. lockdep_assert_held(&ar->data_lock);
  1878. switch (ar->scan.state) {
  1879. case ATH10K_SCAN_IDLE:
  1880. case ATH10K_SCAN_RUNNING:
  1881. case ATH10K_SCAN_ABORTING:
  1882. ath10k_warn(ar, "received scan start failed event in an invalid scan state: %s (%d)\n",
  1883. ath10k_scan_state_str(ar->scan.state),
  1884. ar->scan.state);
  1885. break;
  1886. case ATH10K_SCAN_STARTING:
  1887. complete(&ar->scan.started);
  1888. __ath10k_scan_finish(ar);
  1889. break;
  1890. }
  1891. }
  1892. static void ath10k_wmi_event_scan_completed(struct ath10k *ar)
  1893. {
  1894. lockdep_assert_held(&ar->data_lock);
  1895. switch (ar->scan.state) {
  1896. case ATH10K_SCAN_IDLE:
  1897. case ATH10K_SCAN_STARTING:
  1898. /* One suspected reason scan can be completed while starting is
  1899. * if firmware fails to deliver all scan events to the host,
  1900. * e.g. when transport pipe is full. This has been observed
  1901. * with spectral scan phyerr events starving wmi transport
  1902. * pipe. In such case the "scan completed" event should be (and
  1903. * is) ignored by the host as it may be just firmware's scan
  1904. * state machine recovering.
  1905. */
  1906. ath10k_warn(ar, "received scan completed event in an invalid scan state: %s (%d)\n",
  1907. ath10k_scan_state_str(ar->scan.state),
  1908. ar->scan.state);
  1909. break;
  1910. case ATH10K_SCAN_RUNNING:
  1911. case ATH10K_SCAN_ABORTING:
  1912. __ath10k_scan_finish(ar);
  1913. break;
  1914. }
  1915. }
  1916. static void ath10k_wmi_event_scan_bss_chan(struct ath10k *ar)
  1917. {
  1918. lockdep_assert_held(&ar->data_lock);
  1919. switch (ar->scan.state) {
  1920. case ATH10K_SCAN_IDLE:
  1921. case ATH10K_SCAN_STARTING:
  1922. ath10k_warn(ar, "received scan bss chan event in an invalid scan state: %s (%d)\n",
  1923. ath10k_scan_state_str(ar->scan.state),
  1924. ar->scan.state);
  1925. break;
  1926. case ATH10K_SCAN_RUNNING:
  1927. case ATH10K_SCAN_ABORTING:
  1928. ar->scan_channel = NULL;
  1929. break;
  1930. }
  1931. }
  1932. static void ath10k_wmi_event_scan_foreign_chan(struct ath10k *ar, u32 freq)
  1933. {
  1934. lockdep_assert_held(&ar->data_lock);
  1935. switch (ar->scan.state) {
  1936. case ATH10K_SCAN_IDLE:
  1937. case ATH10K_SCAN_STARTING:
  1938. ath10k_warn(ar, "received scan foreign chan event in an invalid scan state: %s (%d)\n",
  1939. ath10k_scan_state_str(ar->scan.state),
  1940. ar->scan.state);
  1941. break;
  1942. case ATH10K_SCAN_RUNNING:
  1943. case ATH10K_SCAN_ABORTING:
  1944. ar->scan_channel = ieee80211_get_channel(ar->hw->wiphy, freq);
  1945. if (ar->scan.is_roc && ar->scan.roc_freq == freq)
  1946. complete(&ar->scan.on_channel);
  1947. break;
  1948. }
  1949. }
  1950. static const char *
  1951. ath10k_wmi_event_scan_type_str(enum wmi_scan_event_type type,
  1952. enum wmi_scan_completion_reason reason)
  1953. {
  1954. switch (type) {
  1955. case WMI_SCAN_EVENT_STARTED:
  1956. return "started";
  1957. case WMI_SCAN_EVENT_COMPLETED:
  1958. switch (reason) {
  1959. case WMI_SCAN_REASON_COMPLETED:
  1960. return "completed";
  1961. case WMI_SCAN_REASON_CANCELLED:
  1962. return "completed [cancelled]";
  1963. case WMI_SCAN_REASON_PREEMPTED:
  1964. return "completed [preempted]";
  1965. case WMI_SCAN_REASON_TIMEDOUT:
  1966. return "completed [timedout]";
  1967. case WMI_SCAN_REASON_INTERNAL_FAILURE:
  1968. return "completed [internal err]";
  1969. case WMI_SCAN_REASON_MAX:
  1970. break;
  1971. }
  1972. return "completed [unknown]";
  1973. case WMI_SCAN_EVENT_BSS_CHANNEL:
  1974. return "bss channel";
  1975. case WMI_SCAN_EVENT_FOREIGN_CHANNEL:
  1976. return "foreign channel";
  1977. case WMI_SCAN_EVENT_DEQUEUED:
  1978. return "dequeued";
  1979. case WMI_SCAN_EVENT_PREEMPTED:
  1980. return "preempted";
  1981. case WMI_SCAN_EVENT_START_FAILED:
  1982. return "start failed";
  1983. case WMI_SCAN_EVENT_RESTARTED:
  1984. return "restarted";
  1985. case WMI_SCAN_EVENT_FOREIGN_CHANNEL_EXIT:
  1986. return "foreign channel exit";
  1987. default:
  1988. return "unknown";
  1989. }
  1990. }
  1991. static int ath10k_wmi_op_pull_scan_ev(struct ath10k *ar, struct sk_buff *skb,
  1992. struct wmi_scan_ev_arg *arg)
  1993. {
  1994. struct wmi_scan_event *ev = (void *)skb->data;
  1995. if (skb->len < sizeof(*ev))
  1996. return -EPROTO;
  1997. skb_pull(skb, sizeof(*ev));
  1998. arg->event_type = ev->event_type;
  1999. arg->reason = ev->reason;
  2000. arg->channel_freq = ev->channel_freq;
  2001. arg->scan_req_id = ev->scan_req_id;
  2002. arg->scan_id = ev->scan_id;
  2003. arg->vdev_id = ev->vdev_id;
  2004. return 0;
  2005. }
  2006. int ath10k_wmi_event_scan(struct ath10k *ar, struct sk_buff *skb)
  2007. {
  2008. struct wmi_scan_ev_arg arg = {};
  2009. enum wmi_scan_event_type event_type;
  2010. enum wmi_scan_completion_reason reason;
  2011. u32 freq;
  2012. u32 req_id;
  2013. u32 scan_id;
  2014. u32 vdev_id;
  2015. int ret;
  2016. ret = ath10k_wmi_pull_scan(ar, skb, &arg);
  2017. if (ret) {
  2018. ath10k_warn(ar, "failed to parse scan event: %d\n", ret);
  2019. return ret;
  2020. }
  2021. event_type = __le32_to_cpu(arg.event_type);
  2022. reason = __le32_to_cpu(arg.reason);
  2023. freq = __le32_to_cpu(arg.channel_freq);
  2024. req_id = __le32_to_cpu(arg.scan_req_id);
  2025. scan_id = __le32_to_cpu(arg.scan_id);
  2026. vdev_id = __le32_to_cpu(arg.vdev_id);
  2027. spin_lock_bh(&ar->data_lock);
  2028. ath10k_dbg(ar, ATH10K_DBG_WMI,
  2029. "scan event %s type %d reason %d freq %d req_id %d scan_id %d vdev_id %d state %s (%d)\n",
  2030. ath10k_wmi_event_scan_type_str(event_type, reason),
  2031. event_type, reason, freq, req_id, scan_id, vdev_id,
  2032. ath10k_scan_state_str(ar->scan.state), ar->scan.state);
  2033. switch (event_type) {
  2034. case WMI_SCAN_EVENT_STARTED:
  2035. ath10k_wmi_event_scan_started(ar);
  2036. break;
  2037. case WMI_SCAN_EVENT_COMPLETED:
  2038. ath10k_wmi_event_scan_completed(ar);
  2039. break;
  2040. case WMI_SCAN_EVENT_BSS_CHANNEL:
  2041. ath10k_wmi_event_scan_bss_chan(ar);
  2042. break;
  2043. case WMI_SCAN_EVENT_FOREIGN_CHANNEL:
  2044. ath10k_wmi_event_scan_foreign_chan(ar, freq);
  2045. break;
  2046. case WMI_SCAN_EVENT_START_FAILED:
  2047. ath10k_warn(ar, "received scan start failure event\n");
  2048. ath10k_wmi_event_scan_start_failed(ar);
  2049. break;
  2050. case WMI_SCAN_EVENT_DEQUEUED:
  2051. case WMI_SCAN_EVENT_PREEMPTED:
  2052. case WMI_SCAN_EVENT_RESTARTED:
  2053. case WMI_SCAN_EVENT_FOREIGN_CHANNEL_EXIT:
  2054. default:
  2055. break;
  2056. }
  2057. spin_unlock_bh(&ar->data_lock);
  2058. return 0;
  2059. }
  2060. /* If keys are configured, HW decrypts all frames
  2061. * with protected bit set. Mark such frames as decrypted.
  2062. */
  2063. static void ath10k_wmi_handle_wep_reauth(struct ath10k *ar,
  2064. struct sk_buff *skb,
  2065. struct ieee80211_rx_status *status)
  2066. {
  2067. struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
  2068. unsigned int hdrlen;
  2069. bool peer_key;
  2070. u8 *addr, keyidx;
  2071. if (!ieee80211_is_auth(hdr->frame_control) ||
  2072. !ieee80211_has_protected(hdr->frame_control))
  2073. return;
  2074. hdrlen = ieee80211_hdrlen(hdr->frame_control);
  2075. if (skb->len < (hdrlen + IEEE80211_WEP_IV_LEN))
  2076. return;
  2077. keyidx = skb->data[hdrlen + (IEEE80211_WEP_IV_LEN - 1)] >> WEP_KEYID_SHIFT;
  2078. addr = ieee80211_get_SA(hdr);
  2079. spin_lock_bh(&ar->data_lock);
  2080. peer_key = ath10k_mac_is_peer_wep_key_set(ar, addr, keyidx);
  2081. spin_unlock_bh(&ar->data_lock);
  2082. if (peer_key) {
  2083. ath10k_dbg(ar, ATH10K_DBG_MAC,
  2084. "mac wep key present for peer %pM\n", addr);
  2085. status->flag |= RX_FLAG_DECRYPTED;
  2086. }
  2087. }
  2088. static int ath10k_wmi_op_pull_mgmt_rx_ev(struct ath10k *ar, struct sk_buff *skb,
  2089. struct wmi_mgmt_rx_ev_arg *arg)
  2090. {
  2091. struct wmi_mgmt_rx_event_v1 *ev_v1;
  2092. struct wmi_mgmt_rx_event_v2 *ev_v2;
  2093. struct wmi_mgmt_rx_hdr_v1 *ev_hdr;
  2094. struct wmi_mgmt_rx_ext_info *ext_info;
  2095. size_t pull_len;
  2096. u32 msdu_len;
  2097. u32 len;
  2098. if (test_bit(ATH10K_FW_FEATURE_EXT_WMI_MGMT_RX,
  2099. ar->running_fw->fw_file.fw_features)) {
  2100. ev_v2 = (struct wmi_mgmt_rx_event_v2 *)skb->data;
  2101. ev_hdr = &ev_v2->hdr.v1;
  2102. pull_len = sizeof(*ev_v2);
  2103. } else {
  2104. ev_v1 = (struct wmi_mgmt_rx_event_v1 *)skb->data;
  2105. ev_hdr = &ev_v1->hdr;
  2106. pull_len = sizeof(*ev_v1);
  2107. }
  2108. if (skb->len < pull_len)
  2109. return -EPROTO;
  2110. skb_pull(skb, pull_len);
  2111. arg->channel = ev_hdr->channel;
  2112. arg->buf_len = ev_hdr->buf_len;
  2113. arg->status = ev_hdr->status;
  2114. arg->snr = ev_hdr->snr;
  2115. arg->phy_mode = ev_hdr->phy_mode;
  2116. arg->rate = ev_hdr->rate;
  2117. msdu_len = __le32_to_cpu(arg->buf_len);
  2118. if (skb->len < msdu_len)
  2119. return -EPROTO;
  2120. if (le32_to_cpu(arg->status) & WMI_RX_STATUS_EXT_INFO) {
  2121. len = ALIGN(le32_to_cpu(arg->buf_len), 4);
  2122. ext_info = (struct wmi_mgmt_rx_ext_info *)(skb->data + len);
  2123. memcpy(&arg->ext_info, ext_info,
  2124. sizeof(struct wmi_mgmt_rx_ext_info));
  2125. }
  2126. /* the WMI buffer might've ended up being padded to 4 bytes due to HTC
  2127. * trailer with credit update. Trim the excess garbage.
  2128. */
  2129. skb_trim(skb, msdu_len);
  2130. return 0;
  2131. }
  2132. static int ath10k_wmi_10_4_op_pull_mgmt_rx_ev(struct ath10k *ar,
  2133. struct sk_buff *skb,
  2134. struct wmi_mgmt_rx_ev_arg *arg)
  2135. {
  2136. struct wmi_10_4_mgmt_rx_event *ev;
  2137. struct wmi_10_4_mgmt_rx_hdr *ev_hdr;
  2138. size_t pull_len;
  2139. u32 msdu_len;
  2140. struct wmi_mgmt_rx_ext_info *ext_info;
  2141. u32 len;
  2142. ev = (struct wmi_10_4_mgmt_rx_event *)skb->data;
  2143. ev_hdr = &ev->hdr;
  2144. pull_len = sizeof(*ev);
  2145. if (skb->len < pull_len)
  2146. return -EPROTO;
  2147. skb_pull(skb, pull_len);
  2148. arg->channel = ev_hdr->channel;
  2149. arg->buf_len = ev_hdr->buf_len;
  2150. arg->status = ev_hdr->status;
  2151. arg->snr = ev_hdr->snr;
  2152. arg->phy_mode = ev_hdr->phy_mode;
  2153. arg->rate = ev_hdr->rate;
  2154. msdu_len = __le32_to_cpu(arg->buf_len);
  2155. if (skb->len < msdu_len)
  2156. return -EPROTO;
  2157. if (le32_to_cpu(arg->status) & WMI_RX_STATUS_EXT_INFO) {
  2158. len = ALIGN(le32_to_cpu(arg->buf_len), 4);
  2159. ext_info = (struct wmi_mgmt_rx_ext_info *)(skb->data + len);
  2160. memcpy(&arg->ext_info, ext_info,
  2161. sizeof(struct wmi_mgmt_rx_ext_info));
  2162. }
  2163. /* Make sure bytes added for padding are removed. */
  2164. skb_trim(skb, msdu_len);
  2165. return 0;
  2166. }
  2167. static bool ath10k_wmi_rx_is_decrypted(struct ath10k *ar,
  2168. struct ieee80211_hdr *hdr)
  2169. {
  2170. if (!ieee80211_has_protected(hdr->frame_control))
  2171. return false;
  2172. /* FW delivers WEP Shared Auth frame with Protected Bit set and
  2173. * encrypted payload. However in case of PMF it delivers decrypted
  2174. * frames with Protected Bit set.
  2175. */
  2176. if (ieee80211_is_auth(hdr->frame_control))
  2177. return false;
  2178. /* qca99x0 based FW delivers broadcast or multicast management frames
  2179. * (ex: group privacy action frames in mesh) as encrypted payload.
  2180. */
  2181. if (is_multicast_ether_addr(ieee80211_get_DA(hdr)) &&
  2182. ar->hw_params.sw_decrypt_mcast_mgmt)
  2183. return false;
  2184. return true;
  2185. }
  2186. int ath10k_wmi_event_mgmt_rx(struct ath10k *ar, struct sk_buff *skb)
  2187. {
  2188. struct wmi_mgmt_rx_ev_arg arg = {};
  2189. struct ieee80211_rx_status *status = IEEE80211_SKB_RXCB(skb);
  2190. struct ieee80211_hdr *hdr;
  2191. struct ieee80211_supported_band *sband;
  2192. u32 rx_status;
  2193. u32 channel;
  2194. u32 phy_mode;
  2195. u32 snr;
  2196. u32 rate;
  2197. u16 fc;
  2198. int ret;
  2199. ret = ath10k_wmi_pull_mgmt_rx(ar, skb, &arg);
  2200. if (ret) {
  2201. ath10k_warn(ar, "failed to parse mgmt rx event: %d\n", ret);
  2202. dev_kfree_skb(skb);
  2203. return ret;
  2204. }
  2205. channel = __le32_to_cpu(arg.channel);
  2206. rx_status = __le32_to_cpu(arg.status);
  2207. snr = __le32_to_cpu(arg.snr);
  2208. phy_mode = __le32_to_cpu(arg.phy_mode);
  2209. rate = __le32_to_cpu(arg.rate);
  2210. memset(status, 0, sizeof(*status));
  2211. ath10k_dbg(ar, ATH10K_DBG_MGMT,
  2212. "event mgmt rx status %08x\n", rx_status);
  2213. if ((test_bit(ATH10K_CAC_RUNNING, &ar->dev_flags)) ||
  2214. (rx_status & (WMI_RX_STATUS_ERR_DECRYPT |
  2215. WMI_RX_STATUS_ERR_KEY_CACHE_MISS | WMI_RX_STATUS_ERR_CRC))) {
  2216. dev_kfree_skb(skb);
  2217. return 0;
  2218. }
  2219. if (rx_status & WMI_RX_STATUS_ERR_MIC)
  2220. status->flag |= RX_FLAG_MMIC_ERROR;
  2221. if (rx_status & WMI_RX_STATUS_EXT_INFO) {
  2222. status->mactime =
  2223. __le64_to_cpu(arg.ext_info.rx_mac_timestamp);
  2224. status->flag |= RX_FLAG_MACTIME_END;
  2225. }
  2226. /* Hardware can Rx CCK rates on 5GHz. In that case phy_mode is set to
  2227. * MODE_11B. This means phy_mode is not a reliable source for the band
  2228. * of mgmt rx.
  2229. */
  2230. if (channel >= 1 && channel <= 14) {
  2231. status->band = NL80211_BAND_2GHZ;
  2232. } else if (channel >= 36 && channel <= ATH10K_MAX_5G_CHAN) {
  2233. status->band = NL80211_BAND_5GHZ;
  2234. } else {
  2235. /* Shouldn't happen unless list of advertised channels to
  2236. * mac80211 has been changed.
  2237. */
  2238. WARN_ON_ONCE(1);
  2239. dev_kfree_skb(skb);
  2240. return 0;
  2241. }
  2242. if (phy_mode == MODE_11B && status->band == NL80211_BAND_5GHZ)
  2243. ath10k_dbg(ar, ATH10K_DBG_MGMT, "wmi mgmt rx 11b (CCK) on 5GHz\n");
  2244. sband = &ar->mac.sbands[status->band];
  2245. status->freq = ieee80211_channel_to_frequency(channel, status->band);
  2246. status->signal = snr + ATH10K_DEFAULT_NOISE_FLOOR;
  2247. status->rate_idx = ath10k_mac_bitrate_to_idx(sband, rate / 100);
  2248. hdr = (struct ieee80211_hdr *)skb->data;
  2249. fc = le16_to_cpu(hdr->frame_control);
  2250. /* Firmware is guaranteed to report all essential management frames via
  2251. * WMI while it can deliver some extra via HTT. Since there can be
  2252. * duplicates split the reporting wrt monitor/sniffing.
  2253. */
  2254. status->flag |= RX_FLAG_SKIP_MONITOR;
  2255. ath10k_wmi_handle_wep_reauth(ar, skb, status);
  2256. if (ath10k_wmi_rx_is_decrypted(ar, hdr)) {
  2257. status->flag |= RX_FLAG_DECRYPTED;
  2258. if (!ieee80211_is_action(hdr->frame_control) &&
  2259. !ieee80211_is_deauth(hdr->frame_control) &&
  2260. !ieee80211_is_disassoc(hdr->frame_control)) {
  2261. status->flag |= RX_FLAG_IV_STRIPPED |
  2262. RX_FLAG_MMIC_STRIPPED;
  2263. hdr->frame_control = __cpu_to_le16(fc &
  2264. ~IEEE80211_FCTL_PROTECTED);
  2265. }
  2266. }
  2267. if (ieee80211_is_beacon(hdr->frame_control))
  2268. ath10k_mac_handle_beacon(ar, skb);
  2269. ath10k_dbg(ar, ATH10K_DBG_MGMT,
  2270. "event mgmt rx skb %pK len %d ftype %02x stype %02x\n",
  2271. skb, skb->len,
  2272. fc & IEEE80211_FCTL_FTYPE, fc & IEEE80211_FCTL_STYPE);
  2273. ath10k_dbg(ar, ATH10K_DBG_MGMT,
  2274. "event mgmt rx freq %d band %d snr %d, rate_idx %d\n",
  2275. status->freq, status->band, status->signal,
  2276. status->rate_idx);
  2277. ieee80211_rx(ar->hw, skb);
  2278. return 0;
  2279. }
  2280. static int freq_to_idx(struct ath10k *ar, int freq)
  2281. {
  2282. struct ieee80211_supported_band *sband;
  2283. int band, ch, idx = 0;
  2284. for (band = NL80211_BAND_2GHZ; band < NUM_NL80211_BANDS; band++) {
  2285. sband = ar->hw->wiphy->bands[band];
  2286. if (!sband)
  2287. continue;
  2288. for (ch = 0; ch < sband->n_channels; ch++, idx++)
  2289. if (sband->channels[ch].center_freq == freq)
  2290. goto exit;
  2291. }
  2292. exit:
  2293. return idx;
  2294. }
  2295. static int ath10k_wmi_op_pull_ch_info_ev(struct ath10k *ar, struct sk_buff *skb,
  2296. struct wmi_ch_info_ev_arg *arg)
  2297. {
  2298. struct wmi_chan_info_event *ev = (void *)skb->data;
  2299. if (skb->len < sizeof(*ev))
  2300. return -EPROTO;
  2301. skb_pull(skb, sizeof(*ev));
  2302. arg->err_code = ev->err_code;
  2303. arg->freq = ev->freq;
  2304. arg->cmd_flags = ev->cmd_flags;
  2305. arg->noise_floor = ev->noise_floor;
  2306. arg->rx_clear_count = ev->rx_clear_count;
  2307. arg->cycle_count = ev->cycle_count;
  2308. return 0;
  2309. }
  2310. static int ath10k_wmi_10_4_op_pull_ch_info_ev(struct ath10k *ar,
  2311. struct sk_buff *skb,
  2312. struct wmi_ch_info_ev_arg *arg)
  2313. {
  2314. struct wmi_10_4_chan_info_event *ev = (void *)skb->data;
  2315. if (skb->len < sizeof(*ev))
  2316. return -EPROTO;
  2317. skb_pull(skb, sizeof(*ev));
  2318. arg->err_code = ev->err_code;
  2319. arg->freq = ev->freq;
  2320. arg->cmd_flags = ev->cmd_flags;
  2321. arg->noise_floor = ev->noise_floor;
  2322. arg->rx_clear_count = ev->rx_clear_count;
  2323. arg->cycle_count = ev->cycle_count;
  2324. arg->chan_tx_pwr_range = ev->chan_tx_pwr_range;
  2325. arg->chan_tx_pwr_tp = ev->chan_tx_pwr_tp;
  2326. arg->rx_frame_count = ev->rx_frame_count;
  2327. return 0;
  2328. }
  2329. void ath10k_wmi_event_chan_info(struct ath10k *ar, struct sk_buff *skb)
  2330. {
  2331. struct wmi_ch_info_ev_arg arg = {};
  2332. struct survey_info *survey;
  2333. u32 err_code, freq, cmd_flags, noise_floor, rx_clear_count, cycle_count;
  2334. int idx, ret;
  2335. ret = ath10k_wmi_pull_ch_info(ar, skb, &arg);
  2336. if (ret) {
  2337. ath10k_warn(ar, "failed to parse chan info event: %d\n", ret);
  2338. return;
  2339. }
  2340. err_code = __le32_to_cpu(arg.err_code);
  2341. freq = __le32_to_cpu(arg.freq);
  2342. cmd_flags = __le32_to_cpu(arg.cmd_flags);
  2343. noise_floor = __le32_to_cpu(arg.noise_floor);
  2344. rx_clear_count = __le32_to_cpu(arg.rx_clear_count);
  2345. cycle_count = __le32_to_cpu(arg.cycle_count);
  2346. ath10k_dbg(ar, ATH10K_DBG_WMI,
  2347. "chan info err_code %d freq %d cmd_flags %d noise_floor %d rx_clear_count %d cycle_count %d\n",
  2348. err_code, freq, cmd_flags, noise_floor, rx_clear_count,
  2349. cycle_count);
  2350. spin_lock_bh(&ar->data_lock);
  2351. switch (ar->scan.state) {
  2352. case ATH10K_SCAN_IDLE:
  2353. case ATH10K_SCAN_STARTING:
  2354. ath10k_warn(ar, "received chan info event without a scan request, ignoring\n");
  2355. goto exit;
  2356. case ATH10K_SCAN_RUNNING:
  2357. case ATH10K_SCAN_ABORTING:
  2358. break;
  2359. }
  2360. idx = freq_to_idx(ar, freq);
  2361. if (idx >= ARRAY_SIZE(ar->survey)) {
  2362. ath10k_warn(ar, "chan info: invalid frequency %d (idx %d out of bounds)\n",
  2363. freq, idx);
  2364. goto exit;
  2365. }
  2366. if (cmd_flags & WMI_CHAN_INFO_FLAG_COMPLETE) {
  2367. if (ar->ch_info_can_report_survey) {
  2368. survey = &ar->survey[idx];
  2369. survey->noise = noise_floor;
  2370. survey->filled = SURVEY_INFO_NOISE_DBM;
  2371. ath10k_hw_fill_survey_time(ar,
  2372. survey,
  2373. cycle_count,
  2374. rx_clear_count,
  2375. ar->survey_last_cycle_count,
  2376. ar->survey_last_rx_clear_count);
  2377. }
  2378. ar->ch_info_can_report_survey = false;
  2379. } else {
  2380. ar->ch_info_can_report_survey = true;
  2381. }
  2382. if (!(cmd_flags & WMI_CHAN_INFO_FLAG_PRE_COMPLETE)) {
  2383. ar->survey_last_rx_clear_count = rx_clear_count;
  2384. ar->survey_last_cycle_count = cycle_count;
  2385. }
  2386. exit:
  2387. spin_unlock_bh(&ar->data_lock);
  2388. }
  2389. void ath10k_wmi_event_echo(struct ath10k *ar, struct sk_buff *skb)
  2390. {
  2391. struct wmi_echo_ev_arg arg = {};
  2392. int ret;
  2393. ret = ath10k_wmi_pull_echo_ev(ar, skb, &arg);
  2394. if (ret) {
  2395. ath10k_warn(ar, "failed to parse echo: %d\n", ret);
  2396. return;
  2397. }
  2398. ath10k_dbg(ar, ATH10K_DBG_WMI,
  2399. "wmi event echo value 0x%08x\n",
  2400. le32_to_cpu(arg.value));
  2401. if (le32_to_cpu(arg.value) == ATH10K_WMI_BARRIER_ECHO_ID)
  2402. complete(&ar->wmi.barrier);
  2403. }
  2404. int ath10k_wmi_event_debug_mesg(struct ath10k *ar, struct sk_buff *skb)
  2405. {
  2406. ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi event debug mesg len %d\n",
  2407. skb->len);
  2408. trace_ath10k_wmi_dbglog(ar, skb->data, skb->len);
  2409. return 0;
  2410. }
  2411. void ath10k_wmi_pull_pdev_stats_base(const struct wmi_pdev_stats_base *src,
  2412. struct ath10k_fw_stats_pdev *dst)
  2413. {
  2414. dst->ch_noise_floor = __le32_to_cpu(src->chan_nf);
  2415. dst->tx_frame_count = __le32_to_cpu(src->tx_frame_count);
  2416. dst->rx_frame_count = __le32_to_cpu(src->rx_frame_count);
  2417. dst->rx_clear_count = __le32_to_cpu(src->rx_clear_count);
  2418. dst->cycle_count = __le32_to_cpu(src->cycle_count);
  2419. dst->phy_err_count = __le32_to_cpu(src->phy_err_count);
  2420. dst->chan_tx_power = __le32_to_cpu(src->chan_tx_pwr);
  2421. }
  2422. void ath10k_wmi_pull_pdev_stats_tx(const struct wmi_pdev_stats_tx *src,
  2423. struct ath10k_fw_stats_pdev *dst)
  2424. {
  2425. dst->comp_queued = __le32_to_cpu(src->comp_queued);
  2426. dst->comp_delivered = __le32_to_cpu(src->comp_delivered);
  2427. dst->msdu_enqued = __le32_to_cpu(src->msdu_enqued);
  2428. dst->mpdu_enqued = __le32_to_cpu(src->mpdu_enqued);
  2429. dst->wmm_drop = __le32_to_cpu(src->wmm_drop);
  2430. dst->local_enqued = __le32_to_cpu(src->local_enqued);
  2431. dst->local_freed = __le32_to_cpu(src->local_freed);
  2432. dst->hw_queued = __le32_to_cpu(src->hw_queued);
  2433. dst->hw_reaped = __le32_to_cpu(src->hw_reaped);
  2434. dst->underrun = __le32_to_cpu(src->underrun);
  2435. dst->tx_abort = __le32_to_cpu(src->tx_abort);
  2436. dst->mpdus_requed = __le32_to_cpu(src->mpdus_requed);
  2437. dst->tx_ko = __le32_to_cpu(src->tx_ko);
  2438. dst->data_rc = __le32_to_cpu(src->data_rc);
  2439. dst->self_triggers = __le32_to_cpu(src->self_triggers);
  2440. dst->sw_retry_failure = __le32_to_cpu(src->sw_retry_failure);
  2441. dst->illgl_rate_phy_err = __le32_to_cpu(src->illgl_rate_phy_err);
  2442. dst->pdev_cont_xretry = __le32_to_cpu(src->pdev_cont_xretry);
  2443. dst->pdev_tx_timeout = __le32_to_cpu(src->pdev_tx_timeout);
  2444. dst->pdev_resets = __le32_to_cpu(src->pdev_resets);
  2445. dst->phy_underrun = __le32_to_cpu(src->phy_underrun);
  2446. dst->txop_ovf = __le32_to_cpu(src->txop_ovf);
  2447. }
  2448. static void
  2449. ath10k_wmi_10_4_pull_pdev_stats_tx(const struct wmi_10_4_pdev_stats_tx *src,
  2450. struct ath10k_fw_stats_pdev *dst)
  2451. {
  2452. dst->comp_queued = __le32_to_cpu(src->comp_queued);
  2453. dst->comp_delivered = __le32_to_cpu(src->comp_delivered);
  2454. dst->msdu_enqued = __le32_to_cpu(src->msdu_enqued);
  2455. dst->mpdu_enqued = __le32_to_cpu(src->mpdu_enqued);
  2456. dst->wmm_drop = __le32_to_cpu(src->wmm_drop);
  2457. dst->local_enqued = __le32_to_cpu(src->local_enqued);
  2458. dst->local_freed = __le32_to_cpu(src->local_freed);
  2459. dst->hw_queued = __le32_to_cpu(src->hw_queued);
  2460. dst->hw_reaped = __le32_to_cpu(src->hw_reaped);
  2461. dst->underrun = __le32_to_cpu(src->underrun);
  2462. dst->tx_abort = __le32_to_cpu(src->tx_abort);
  2463. dst->mpdus_requed = __le32_to_cpu(src->mpdus_requed);
  2464. dst->tx_ko = __le32_to_cpu(src->tx_ko);
  2465. dst->data_rc = __le32_to_cpu(src->data_rc);
  2466. dst->self_triggers = __le32_to_cpu(src->self_triggers);
  2467. dst->sw_retry_failure = __le32_to_cpu(src->sw_retry_failure);
  2468. dst->illgl_rate_phy_err = __le32_to_cpu(src->illgl_rate_phy_err);
  2469. dst->pdev_cont_xretry = __le32_to_cpu(src->pdev_cont_xretry);
  2470. dst->pdev_tx_timeout = __le32_to_cpu(src->pdev_tx_timeout);
  2471. dst->pdev_resets = __le32_to_cpu(src->pdev_resets);
  2472. dst->phy_underrun = __le32_to_cpu(src->phy_underrun);
  2473. dst->txop_ovf = __le32_to_cpu(src->txop_ovf);
  2474. dst->hw_paused = __le32_to_cpu(src->hw_paused);
  2475. dst->seq_posted = __le32_to_cpu(src->seq_posted);
  2476. dst->seq_failed_queueing =
  2477. __le32_to_cpu(src->seq_failed_queueing);
  2478. dst->seq_completed = __le32_to_cpu(src->seq_completed);
  2479. dst->seq_restarted = __le32_to_cpu(src->seq_restarted);
  2480. dst->mu_seq_posted = __le32_to_cpu(src->mu_seq_posted);
  2481. dst->mpdus_sw_flush = __le32_to_cpu(src->mpdus_sw_flush);
  2482. dst->mpdus_hw_filter = __le32_to_cpu(src->mpdus_hw_filter);
  2483. dst->mpdus_truncated = __le32_to_cpu(src->mpdus_truncated);
  2484. dst->mpdus_ack_failed = __le32_to_cpu(src->mpdus_ack_failed);
  2485. dst->mpdus_hw_filter = __le32_to_cpu(src->mpdus_hw_filter);
  2486. dst->mpdus_expired = __le32_to_cpu(src->mpdus_expired);
  2487. }
  2488. void ath10k_wmi_pull_pdev_stats_rx(const struct wmi_pdev_stats_rx *src,
  2489. struct ath10k_fw_stats_pdev *dst)
  2490. {
  2491. dst->mid_ppdu_route_change = __le32_to_cpu(src->mid_ppdu_route_change);
  2492. dst->status_rcvd = __le32_to_cpu(src->status_rcvd);
  2493. dst->r0_frags = __le32_to_cpu(src->r0_frags);
  2494. dst->r1_frags = __le32_to_cpu(src->r1_frags);
  2495. dst->r2_frags = __le32_to_cpu(src->r2_frags);
  2496. dst->r3_frags = __le32_to_cpu(src->r3_frags);
  2497. dst->htt_msdus = __le32_to_cpu(src->htt_msdus);
  2498. dst->htt_mpdus = __le32_to_cpu(src->htt_mpdus);
  2499. dst->loc_msdus = __le32_to_cpu(src->loc_msdus);
  2500. dst->loc_mpdus = __le32_to_cpu(src->loc_mpdus);
  2501. dst->oversize_amsdu = __le32_to_cpu(src->oversize_amsdu);
  2502. dst->phy_errs = __le32_to_cpu(src->phy_errs);
  2503. dst->phy_err_drop = __le32_to_cpu(src->phy_err_drop);
  2504. dst->mpdu_errs = __le32_to_cpu(src->mpdu_errs);
  2505. }
  2506. void ath10k_wmi_pull_pdev_stats_extra(const struct wmi_pdev_stats_extra *src,
  2507. struct ath10k_fw_stats_pdev *dst)
  2508. {
  2509. dst->ack_rx_bad = __le32_to_cpu(src->ack_rx_bad);
  2510. dst->rts_bad = __le32_to_cpu(src->rts_bad);
  2511. dst->rts_good = __le32_to_cpu(src->rts_good);
  2512. dst->fcs_bad = __le32_to_cpu(src->fcs_bad);
  2513. dst->no_beacons = __le32_to_cpu(src->no_beacons);
  2514. dst->mib_int_count = __le32_to_cpu(src->mib_int_count);
  2515. }
  2516. void ath10k_wmi_pull_peer_stats(const struct wmi_peer_stats *src,
  2517. struct ath10k_fw_stats_peer *dst)
  2518. {
  2519. ether_addr_copy(dst->peer_macaddr, src->peer_macaddr.addr);
  2520. dst->peer_rssi = __le32_to_cpu(src->peer_rssi);
  2521. dst->peer_tx_rate = __le32_to_cpu(src->peer_tx_rate);
  2522. }
  2523. static void
  2524. ath10k_wmi_10_4_pull_peer_stats(const struct wmi_10_4_peer_stats *src,
  2525. struct ath10k_fw_stats_peer *dst)
  2526. {
  2527. ether_addr_copy(dst->peer_macaddr, src->peer_macaddr.addr);
  2528. dst->peer_rssi = __le32_to_cpu(src->peer_rssi);
  2529. dst->peer_tx_rate = __le32_to_cpu(src->peer_tx_rate);
  2530. dst->peer_rx_rate = __le32_to_cpu(src->peer_rx_rate);
  2531. }
  2532. static void
  2533. ath10k_wmi_10_4_pull_vdev_stats(const struct wmi_vdev_stats_extd *src,
  2534. struct ath10k_fw_stats_vdev_extd *dst)
  2535. {
  2536. dst->vdev_id = __le32_to_cpu(src->vdev_id);
  2537. dst->ppdu_aggr_cnt = __le32_to_cpu(src->ppdu_aggr_cnt);
  2538. dst->ppdu_noack = __le32_to_cpu(src->ppdu_noack);
  2539. dst->mpdu_queued = __le32_to_cpu(src->mpdu_queued);
  2540. dst->ppdu_nonaggr_cnt = __le32_to_cpu(src->ppdu_nonaggr_cnt);
  2541. dst->mpdu_sw_requeued = __le32_to_cpu(src->mpdu_sw_requeued);
  2542. dst->mpdu_suc_retry = __le32_to_cpu(src->mpdu_suc_retry);
  2543. dst->mpdu_suc_multitry = __le32_to_cpu(src->mpdu_suc_multitry);
  2544. dst->mpdu_fail_retry = __le32_to_cpu(src->mpdu_fail_retry);
  2545. dst->tx_ftm_suc = __le32_to_cpu(src->tx_ftm_suc);
  2546. dst->tx_ftm_suc_retry = __le32_to_cpu(src->tx_ftm_suc_retry);
  2547. dst->tx_ftm_fail = __le32_to_cpu(src->tx_ftm_fail);
  2548. dst->rx_ftmr_cnt = __le32_to_cpu(src->rx_ftmr_cnt);
  2549. dst->rx_ftmr_dup_cnt = __le32_to_cpu(src->rx_ftmr_dup_cnt);
  2550. dst->rx_iftmr_cnt = __le32_to_cpu(src->rx_iftmr_cnt);
  2551. dst->rx_iftmr_dup_cnt = __le32_to_cpu(src->rx_iftmr_dup_cnt);
  2552. }
  2553. static int ath10k_wmi_main_op_pull_fw_stats(struct ath10k *ar,
  2554. struct sk_buff *skb,
  2555. struct ath10k_fw_stats *stats)
  2556. {
  2557. const struct wmi_stats_event *ev = (void *)skb->data;
  2558. u32 num_pdev_stats, num_peer_stats;
  2559. int i;
  2560. if (!skb_pull(skb, sizeof(*ev)))
  2561. return -EPROTO;
  2562. num_pdev_stats = __le32_to_cpu(ev->num_pdev_stats);
  2563. num_peer_stats = __le32_to_cpu(ev->num_peer_stats);
  2564. for (i = 0; i < num_pdev_stats; i++) {
  2565. const struct wmi_pdev_stats *src;
  2566. struct ath10k_fw_stats_pdev *dst;
  2567. src = (void *)skb->data;
  2568. if (!skb_pull(skb, sizeof(*src)))
  2569. return -EPROTO;
  2570. dst = kzalloc(sizeof(*dst), GFP_ATOMIC);
  2571. if (!dst)
  2572. continue;
  2573. ath10k_wmi_pull_pdev_stats_base(&src->base, dst);
  2574. ath10k_wmi_pull_pdev_stats_tx(&src->tx, dst);
  2575. ath10k_wmi_pull_pdev_stats_rx(&src->rx, dst);
  2576. list_add_tail(&dst->list, &stats->pdevs);
  2577. }
  2578. /* fw doesn't implement vdev stats */
  2579. for (i = 0; i < num_peer_stats; i++) {
  2580. const struct wmi_peer_stats *src;
  2581. struct ath10k_fw_stats_peer *dst;
  2582. src = (void *)skb->data;
  2583. if (!skb_pull(skb, sizeof(*src)))
  2584. return -EPROTO;
  2585. dst = kzalloc(sizeof(*dst), GFP_ATOMIC);
  2586. if (!dst)
  2587. continue;
  2588. ath10k_wmi_pull_peer_stats(src, dst);
  2589. list_add_tail(&dst->list, &stats->peers);
  2590. }
  2591. return 0;
  2592. }
  2593. static int ath10k_wmi_10x_op_pull_fw_stats(struct ath10k *ar,
  2594. struct sk_buff *skb,
  2595. struct ath10k_fw_stats *stats)
  2596. {
  2597. const struct wmi_stats_event *ev = (void *)skb->data;
  2598. u32 num_pdev_stats, num_peer_stats;
  2599. int i;
  2600. if (!skb_pull(skb, sizeof(*ev)))
  2601. return -EPROTO;
  2602. num_pdev_stats = __le32_to_cpu(ev->num_pdev_stats);
  2603. num_peer_stats = __le32_to_cpu(ev->num_peer_stats);
  2604. for (i = 0; i < num_pdev_stats; i++) {
  2605. const struct wmi_10x_pdev_stats *src;
  2606. struct ath10k_fw_stats_pdev *dst;
  2607. src = (void *)skb->data;
  2608. if (!skb_pull(skb, sizeof(*src)))
  2609. return -EPROTO;
  2610. dst = kzalloc(sizeof(*dst), GFP_ATOMIC);
  2611. if (!dst)
  2612. continue;
  2613. ath10k_wmi_pull_pdev_stats_base(&src->base, dst);
  2614. ath10k_wmi_pull_pdev_stats_tx(&src->tx, dst);
  2615. ath10k_wmi_pull_pdev_stats_rx(&src->rx, dst);
  2616. ath10k_wmi_pull_pdev_stats_extra(&src->extra, dst);
  2617. list_add_tail(&dst->list, &stats->pdevs);
  2618. }
  2619. /* fw doesn't implement vdev stats */
  2620. for (i = 0; i < num_peer_stats; i++) {
  2621. const struct wmi_10x_peer_stats *src;
  2622. struct ath10k_fw_stats_peer *dst;
  2623. src = (void *)skb->data;
  2624. if (!skb_pull(skb, sizeof(*src)))
  2625. return -EPROTO;
  2626. dst = kzalloc(sizeof(*dst), GFP_ATOMIC);
  2627. if (!dst)
  2628. continue;
  2629. ath10k_wmi_pull_peer_stats(&src->old, dst);
  2630. dst->peer_rx_rate = __le32_to_cpu(src->peer_rx_rate);
  2631. list_add_tail(&dst->list, &stats->peers);
  2632. }
  2633. return 0;
  2634. }
  2635. static int ath10k_wmi_10_2_op_pull_fw_stats(struct ath10k *ar,
  2636. struct sk_buff *skb,
  2637. struct ath10k_fw_stats *stats)
  2638. {
  2639. const struct wmi_10_2_stats_event *ev = (void *)skb->data;
  2640. u32 num_pdev_stats;
  2641. u32 num_pdev_ext_stats;
  2642. u32 num_peer_stats;
  2643. int i;
  2644. if (!skb_pull(skb, sizeof(*ev)))
  2645. return -EPROTO;
  2646. num_pdev_stats = __le32_to_cpu(ev->num_pdev_stats);
  2647. num_pdev_ext_stats = __le32_to_cpu(ev->num_pdev_ext_stats);
  2648. num_peer_stats = __le32_to_cpu(ev->num_peer_stats);
  2649. for (i = 0; i < num_pdev_stats; i++) {
  2650. const struct wmi_10_2_pdev_stats *src;
  2651. struct ath10k_fw_stats_pdev *dst;
  2652. src = (void *)skb->data;
  2653. if (!skb_pull(skb, sizeof(*src)))
  2654. return -EPROTO;
  2655. dst = kzalloc(sizeof(*dst), GFP_ATOMIC);
  2656. if (!dst)
  2657. continue;
  2658. ath10k_wmi_pull_pdev_stats_base(&src->base, dst);
  2659. ath10k_wmi_pull_pdev_stats_tx(&src->tx, dst);
  2660. ath10k_wmi_pull_pdev_stats_rx(&src->rx, dst);
  2661. ath10k_wmi_pull_pdev_stats_extra(&src->extra, dst);
  2662. /* FIXME: expose 10.2 specific values */
  2663. list_add_tail(&dst->list, &stats->pdevs);
  2664. }
  2665. for (i = 0; i < num_pdev_ext_stats; i++) {
  2666. const struct wmi_10_2_pdev_ext_stats *src;
  2667. src = (void *)skb->data;
  2668. if (!skb_pull(skb, sizeof(*src)))
  2669. return -EPROTO;
  2670. /* FIXME: expose values to userspace
  2671. *
  2672. * Note: Even though this loop seems to do nothing it is
  2673. * required to parse following sub-structures properly.
  2674. */
  2675. }
  2676. /* fw doesn't implement vdev stats */
  2677. for (i = 0; i < num_peer_stats; i++) {
  2678. const struct wmi_10_2_peer_stats *src;
  2679. struct ath10k_fw_stats_peer *dst;
  2680. src = (void *)skb->data;
  2681. if (!skb_pull(skb, sizeof(*src)))
  2682. return -EPROTO;
  2683. dst = kzalloc(sizeof(*dst), GFP_ATOMIC);
  2684. if (!dst)
  2685. continue;
  2686. ath10k_wmi_pull_peer_stats(&src->old, dst);
  2687. dst->peer_rx_rate = __le32_to_cpu(src->peer_rx_rate);
  2688. /* FIXME: expose 10.2 specific values */
  2689. list_add_tail(&dst->list, &stats->peers);
  2690. }
  2691. return 0;
  2692. }
  2693. static int ath10k_wmi_10_2_4_op_pull_fw_stats(struct ath10k *ar,
  2694. struct sk_buff *skb,
  2695. struct ath10k_fw_stats *stats)
  2696. {
  2697. const struct wmi_10_2_stats_event *ev = (void *)skb->data;
  2698. u32 num_pdev_stats;
  2699. u32 num_pdev_ext_stats;
  2700. u32 num_peer_stats;
  2701. int i;
  2702. if (!skb_pull(skb, sizeof(*ev)))
  2703. return -EPROTO;
  2704. num_pdev_stats = __le32_to_cpu(ev->num_pdev_stats);
  2705. num_pdev_ext_stats = __le32_to_cpu(ev->num_pdev_ext_stats);
  2706. num_peer_stats = __le32_to_cpu(ev->num_peer_stats);
  2707. for (i = 0; i < num_pdev_stats; i++) {
  2708. const struct wmi_10_2_pdev_stats *src;
  2709. struct ath10k_fw_stats_pdev *dst;
  2710. src = (void *)skb->data;
  2711. if (!skb_pull(skb, sizeof(*src)))
  2712. return -EPROTO;
  2713. dst = kzalloc(sizeof(*dst), GFP_ATOMIC);
  2714. if (!dst)
  2715. continue;
  2716. ath10k_wmi_pull_pdev_stats_base(&src->base, dst);
  2717. ath10k_wmi_pull_pdev_stats_tx(&src->tx, dst);
  2718. ath10k_wmi_pull_pdev_stats_rx(&src->rx, dst);
  2719. ath10k_wmi_pull_pdev_stats_extra(&src->extra, dst);
  2720. /* FIXME: expose 10.2 specific values */
  2721. list_add_tail(&dst->list, &stats->pdevs);
  2722. }
  2723. for (i = 0; i < num_pdev_ext_stats; i++) {
  2724. const struct wmi_10_2_pdev_ext_stats *src;
  2725. src = (void *)skb->data;
  2726. if (!skb_pull(skb, sizeof(*src)))
  2727. return -EPROTO;
  2728. /* FIXME: expose values to userspace
  2729. *
  2730. * Note: Even though this loop seems to do nothing it is
  2731. * required to parse following sub-structures properly.
  2732. */
  2733. }
  2734. /* fw doesn't implement vdev stats */
  2735. for (i = 0; i < num_peer_stats; i++) {
  2736. const struct wmi_10_2_4_ext_peer_stats *src;
  2737. struct ath10k_fw_stats_peer *dst;
  2738. int stats_len;
  2739. if (test_bit(WMI_SERVICE_PEER_STATS, ar->wmi.svc_map))
  2740. stats_len = sizeof(struct wmi_10_2_4_ext_peer_stats);
  2741. else
  2742. stats_len = sizeof(struct wmi_10_2_4_peer_stats);
  2743. src = (void *)skb->data;
  2744. if (!skb_pull(skb, stats_len))
  2745. return -EPROTO;
  2746. dst = kzalloc(sizeof(*dst), GFP_ATOMIC);
  2747. if (!dst)
  2748. continue;
  2749. ath10k_wmi_pull_peer_stats(&src->common.old, dst);
  2750. dst->peer_rx_rate = __le32_to_cpu(src->common.peer_rx_rate);
  2751. if (ath10k_peer_stats_enabled(ar))
  2752. dst->rx_duration = __le32_to_cpu(src->rx_duration);
  2753. /* FIXME: expose 10.2 specific values */
  2754. list_add_tail(&dst->list, &stats->peers);
  2755. }
  2756. return 0;
  2757. }
  2758. static int ath10k_wmi_10_4_op_pull_fw_stats(struct ath10k *ar,
  2759. struct sk_buff *skb,
  2760. struct ath10k_fw_stats *stats)
  2761. {
  2762. const struct wmi_10_2_stats_event *ev = (void *)skb->data;
  2763. u32 num_pdev_stats;
  2764. u32 num_pdev_ext_stats;
  2765. u32 num_vdev_stats;
  2766. u32 num_peer_stats;
  2767. u32 num_bcnflt_stats;
  2768. u32 stats_id;
  2769. int i;
  2770. if (!skb_pull(skb, sizeof(*ev)))
  2771. return -EPROTO;
  2772. num_pdev_stats = __le32_to_cpu(ev->num_pdev_stats);
  2773. num_pdev_ext_stats = __le32_to_cpu(ev->num_pdev_ext_stats);
  2774. num_vdev_stats = __le32_to_cpu(ev->num_vdev_stats);
  2775. num_peer_stats = __le32_to_cpu(ev->num_peer_stats);
  2776. num_bcnflt_stats = __le32_to_cpu(ev->num_bcnflt_stats);
  2777. stats_id = __le32_to_cpu(ev->stats_id);
  2778. for (i = 0; i < num_pdev_stats; i++) {
  2779. const struct wmi_10_4_pdev_stats *src;
  2780. struct ath10k_fw_stats_pdev *dst;
  2781. src = (void *)skb->data;
  2782. if (!skb_pull(skb, sizeof(*src)))
  2783. return -EPROTO;
  2784. dst = kzalloc(sizeof(*dst), GFP_ATOMIC);
  2785. if (!dst)
  2786. continue;
  2787. ath10k_wmi_pull_pdev_stats_base(&src->base, dst);
  2788. ath10k_wmi_10_4_pull_pdev_stats_tx(&src->tx, dst);
  2789. ath10k_wmi_pull_pdev_stats_rx(&src->rx, dst);
  2790. dst->rx_ovfl_errs = __le32_to_cpu(src->rx_ovfl_errs);
  2791. ath10k_wmi_pull_pdev_stats_extra(&src->extra, dst);
  2792. list_add_tail(&dst->list, &stats->pdevs);
  2793. }
  2794. for (i = 0; i < num_pdev_ext_stats; i++) {
  2795. const struct wmi_10_2_pdev_ext_stats *src;
  2796. src = (void *)skb->data;
  2797. if (!skb_pull(skb, sizeof(*src)))
  2798. return -EPROTO;
  2799. /* FIXME: expose values to userspace
  2800. *
  2801. * Note: Even though this loop seems to do nothing it is
  2802. * required to parse following sub-structures properly.
  2803. */
  2804. }
  2805. for (i = 0; i < num_vdev_stats; i++) {
  2806. const struct wmi_vdev_stats *src;
  2807. /* Ignore vdev stats here as it has only vdev id. Actual vdev
  2808. * stats will be retrieved from vdev extended stats.
  2809. */
  2810. src = (void *)skb->data;
  2811. if (!skb_pull(skb, sizeof(*src)))
  2812. return -EPROTO;
  2813. }
  2814. for (i = 0; i < num_peer_stats; i++) {
  2815. const struct wmi_10_4_peer_stats *src;
  2816. struct ath10k_fw_stats_peer *dst;
  2817. src = (void *)skb->data;
  2818. if (!skb_pull(skb, sizeof(*src)))
  2819. return -EPROTO;
  2820. dst = kzalloc(sizeof(*dst), GFP_ATOMIC);
  2821. if (!dst)
  2822. continue;
  2823. ath10k_wmi_10_4_pull_peer_stats(src, dst);
  2824. list_add_tail(&dst->list, &stats->peers);
  2825. }
  2826. for (i = 0; i < num_bcnflt_stats; i++) {
  2827. const struct wmi_10_4_bss_bcn_filter_stats *src;
  2828. src = (void *)skb->data;
  2829. if (!skb_pull(skb, sizeof(*src)))
  2830. return -EPROTO;
  2831. /* FIXME: expose values to userspace
  2832. *
  2833. * Note: Even though this loop seems to do nothing it is
  2834. * required to parse following sub-structures properly.
  2835. */
  2836. }
  2837. if (stats_id & WMI_10_4_STAT_PEER_EXTD) {
  2838. stats->extended = true;
  2839. for (i = 0; i < num_peer_stats; i++) {
  2840. const struct wmi_10_4_peer_extd_stats *src;
  2841. struct ath10k_fw_extd_stats_peer *dst;
  2842. src = (void *)skb->data;
  2843. if (!skb_pull(skb, sizeof(*src)))
  2844. return -EPROTO;
  2845. dst = kzalloc(sizeof(*dst), GFP_ATOMIC);
  2846. if (!dst)
  2847. continue;
  2848. ether_addr_copy(dst->peer_macaddr,
  2849. src->peer_macaddr.addr);
  2850. dst->rx_duration = __le32_to_cpu(src->rx_duration);
  2851. list_add_tail(&dst->list, &stats->peers_extd);
  2852. }
  2853. }
  2854. if (stats_id & WMI_10_4_STAT_VDEV_EXTD) {
  2855. for (i = 0; i < num_vdev_stats; i++) {
  2856. const struct wmi_vdev_stats_extd *src;
  2857. struct ath10k_fw_stats_vdev_extd *dst;
  2858. src = (void *)skb->data;
  2859. if (!skb_pull(skb, sizeof(*src)))
  2860. return -EPROTO;
  2861. dst = kzalloc(sizeof(*dst), GFP_ATOMIC);
  2862. if (!dst)
  2863. continue;
  2864. ath10k_wmi_10_4_pull_vdev_stats(src, dst);
  2865. list_add_tail(&dst->list, &stats->vdevs);
  2866. }
  2867. }
  2868. return 0;
  2869. }
  2870. void ath10k_wmi_event_update_stats(struct ath10k *ar, struct sk_buff *skb)
  2871. {
  2872. ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_UPDATE_STATS_EVENTID\n");
  2873. ath10k_debug_fw_stats_process(ar, skb);
  2874. }
  2875. static int
  2876. ath10k_wmi_op_pull_vdev_start_ev(struct ath10k *ar, struct sk_buff *skb,
  2877. struct wmi_vdev_start_ev_arg *arg)
  2878. {
  2879. struct wmi_vdev_start_response_event *ev = (void *)skb->data;
  2880. if (skb->len < sizeof(*ev))
  2881. return -EPROTO;
  2882. skb_pull(skb, sizeof(*ev));
  2883. arg->vdev_id = ev->vdev_id;
  2884. arg->req_id = ev->req_id;
  2885. arg->resp_type = ev->resp_type;
  2886. arg->status = ev->status;
  2887. return 0;
  2888. }
  2889. void ath10k_wmi_event_vdev_start_resp(struct ath10k *ar, struct sk_buff *skb)
  2890. {
  2891. struct wmi_vdev_start_ev_arg arg = {};
  2892. int ret;
  2893. ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_VDEV_START_RESP_EVENTID\n");
  2894. ret = ath10k_wmi_pull_vdev_start(ar, skb, &arg);
  2895. if (ret) {
  2896. ath10k_warn(ar, "failed to parse vdev start event: %d\n", ret);
  2897. return;
  2898. }
  2899. if (WARN_ON(__le32_to_cpu(arg.status)))
  2900. return;
  2901. complete(&ar->vdev_setup_done);
  2902. }
  2903. void ath10k_wmi_event_vdev_stopped(struct ath10k *ar, struct sk_buff *skb)
  2904. {
  2905. ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_VDEV_STOPPED_EVENTID\n");
  2906. complete(&ar->vdev_setup_done);
  2907. }
  2908. static int
  2909. ath10k_wmi_op_pull_peer_kick_ev(struct ath10k *ar, struct sk_buff *skb,
  2910. struct wmi_peer_kick_ev_arg *arg)
  2911. {
  2912. struct wmi_peer_sta_kickout_event *ev = (void *)skb->data;
  2913. if (skb->len < sizeof(*ev))
  2914. return -EPROTO;
  2915. skb_pull(skb, sizeof(*ev));
  2916. arg->mac_addr = ev->peer_macaddr.addr;
  2917. return 0;
  2918. }
  2919. void ath10k_wmi_event_peer_sta_kickout(struct ath10k *ar, struct sk_buff *skb)
  2920. {
  2921. struct wmi_peer_kick_ev_arg arg = {};
  2922. struct ieee80211_sta *sta;
  2923. int ret;
  2924. ret = ath10k_wmi_pull_peer_kick(ar, skb, &arg);
  2925. if (ret) {
  2926. ath10k_warn(ar, "failed to parse peer kickout event: %d\n",
  2927. ret);
  2928. return;
  2929. }
  2930. ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi event peer sta kickout %pM\n",
  2931. arg.mac_addr);
  2932. rcu_read_lock();
  2933. sta = ieee80211_find_sta_by_ifaddr(ar->hw, arg.mac_addr, NULL);
  2934. if (!sta) {
  2935. ath10k_warn(ar, "Spurious quick kickout for STA %pM\n",
  2936. arg.mac_addr);
  2937. goto exit;
  2938. }
  2939. ieee80211_report_low_ack(sta, 10);
  2940. exit:
  2941. rcu_read_unlock();
  2942. }
  2943. /*
  2944. * FIXME
  2945. *
  2946. * We don't report to mac80211 sleep state of connected
  2947. * stations. Due to this mac80211 can't fill in TIM IE
  2948. * correctly.
  2949. *
  2950. * I know of no way of getting nullfunc frames that contain
  2951. * sleep transition from connected stations - these do not
  2952. * seem to be sent from the target to the host. There also
  2953. * doesn't seem to be a dedicated event for that. So the
  2954. * only way left to do this would be to read tim_bitmap
  2955. * during SWBA.
  2956. *
  2957. * We could probably try using tim_bitmap from SWBA to tell
  2958. * mac80211 which stations are asleep and which are not. The
  2959. * problem here is calling mac80211 functions so many times
  2960. * could take too long and make us miss the time to submit
  2961. * the beacon to the target.
  2962. *
  2963. * So as a workaround we try to extend the TIM IE if there
  2964. * is unicast buffered for stations with aid > 7 and fill it
  2965. * in ourselves.
  2966. */
  2967. static void ath10k_wmi_update_tim(struct ath10k *ar,
  2968. struct ath10k_vif *arvif,
  2969. struct sk_buff *bcn,
  2970. const struct wmi_tim_info_arg *tim_info)
  2971. {
  2972. struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)bcn->data;
  2973. struct ieee80211_tim_ie *tim;
  2974. u8 *ies, *ie;
  2975. u8 ie_len, pvm_len;
  2976. __le32 t;
  2977. u32 v, tim_len;
  2978. /* When FW reports 0 in tim_len, ensure atleast first byte
  2979. * in tim_bitmap is considered for pvm calculation.
  2980. */
  2981. tim_len = tim_info->tim_len ? __le32_to_cpu(tim_info->tim_len) : 1;
  2982. /* if next SWBA has no tim_changed the tim_bitmap is garbage.
  2983. * we must copy the bitmap upon change and reuse it later
  2984. */
  2985. if (__le32_to_cpu(tim_info->tim_changed)) {
  2986. int i;
  2987. if (sizeof(arvif->u.ap.tim_bitmap) < tim_len) {
  2988. ath10k_warn(ar, "SWBA TIM field is too big (%u), truncated it to %zu",
  2989. tim_len, sizeof(arvif->u.ap.tim_bitmap));
  2990. tim_len = sizeof(arvif->u.ap.tim_bitmap);
  2991. }
  2992. for (i = 0; i < tim_len; i++) {
  2993. t = tim_info->tim_bitmap[i / 4];
  2994. v = __le32_to_cpu(t);
  2995. arvif->u.ap.tim_bitmap[i] = (v >> ((i % 4) * 8)) & 0xFF;
  2996. }
  2997. /* FW reports either length 0 or length based on max supported
  2998. * station. so we calculate this on our own
  2999. */
  3000. arvif->u.ap.tim_len = 0;
  3001. for (i = 0; i < tim_len; i++)
  3002. if (arvif->u.ap.tim_bitmap[i])
  3003. arvif->u.ap.tim_len = i;
  3004. arvif->u.ap.tim_len++;
  3005. }
  3006. ies = bcn->data;
  3007. ies += ieee80211_hdrlen(hdr->frame_control);
  3008. ies += 12; /* fixed parameters */
  3009. ie = (u8 *)cfg80211_find_ie(WLAN_EID_TIM, ies,
  3010. (u8 *)skb_tail_pointer(bcn) - ies);
  3011. if (!ie) {
  3012. if (arvif->vdev_type != WMI_VDEV_TYPE_IBSS)
  3013. ath10k_warn(ar, "no tim ie found;\n");
  3014. return;
  3015. }
  3016. tim = (void *)ie + 2;
  3017. ie_len = ie[1];
  3018. pvm_len = ie_len - 3; /* exclude dtim count, dtim period, bmap ctl */
  3019. if (pvm_len < arvif->u.ap.tim_len) {
  3020. int expand_size = tim_len - pvm_len;
  3021. int move_size = skb_tail_pointer(bcn) - (ie + 2 + ie_len);
  3022. void *next_ie = ie + 2 + ie_len;
  3023. if (skb_put(bcn, expand_size)) {
  3024. memmove(next_ie + expand_size, next_ie, move_size);
  3025. ie[1] += expand_size;
  3026. ie_len += expand_size;
  3027. pvm_len += expand_size;
  3028. } else {
  3029. ath10k_warn(ar, "tim expansion failed\n");
  3030. }
  3031. }
  3032. if (pvm_len > tim_len) {
  3033. ath10k_warn(ar, "tim pvm length is too great (%d)\n", pvm_len);
  3034. return;
  3035. }
  3036. tim->bitmap_ctrl = !!__le32_to_cpu(tim_info->tim_mcast);
  3037. memcpy(tim->virtual_map, arvif->u.ap.tim_bitmap, pvm_len);
  3038. if (tim->dtim_count == 0) {
  3039. ATH10K_SKB_CB(bcn)->flags |= ATH10K_SKB_F_DTIM_ZERO;
  3040. if (__le32_to_cpu(tim_info->tim_mcast) == 1)
  3041. ATH10K_SKB_CB(bcn)->flags |= ATH10K_SKB_F_DELIVER_CAB;
  3042. }
  3043. ath10k_dbg(ar, ATH10K_DBG_MGMT, "dtim %d/%d mcast %d pvmlen %d\n",
  3044. tim->dtim_count, tim->dtim_period,
  3045. tim->bitmap_ctrl, pvm_len);
  3046. }
  3047. static void ath10k_wmi_update_noa(struct ath10k *ar, struct ath10k_vif *arvif,
  3048. struct sk_buff *bcn,
  3049. const struct wmi_p2p_noa_info *noa)
  3050. {
  3051. if (!arvif->vif->p2p)
  3052. return;
  3053. ath10k_dbg(ar, ATH10K_DBG_MGMT, "noa changed: %d\n", noa->changed);
  3054. if (noa->changed & WMI_P2P_NOA_CHANGED_BIT)
  3055. ath10k_p2p_noa_update(arvif, noa);
  3056. if (arvif->u.ap.noa_data)
  3057. if (!pskb_expand_head(bcn, 0, arvif->u.ap.noa_len, GFP_ATOMIC))
  3058. skb_put_data(bcn, arvif->u.ap.noa_data,
  3059. arvif->u.ap.noa_len);
  3060. }
  3061. static int ath10k_wmi_op_pull_swba_ev(struct ath10k *ar, struct sk_buff *skb,
  3062. struct wmi_swba_ev_arg *arg)
  3063. {
  3064. struct wmi_host_swba_event *ev = (void *)skb->data;
  3065. u32 map;
  3066. size_t i;
  3067. if (skb->len < sizeof(*ev))
  3068. return -EPROTO;
  3069. skb_pull(skb, sizeof(*ev));
  3070. arg->vdev_map = ev->vdev_map;
  3071. for (i = 0, map = __le32_to_cpu(ev->vdev_map); map; map >>= 1) {
  3072. if (!(map & BIT(0)))
  3073. continue;
  3074. /* If this happens there were some changes in firmware and
  3075. * ath10k should update the max size of tim_info array.
  3076. */
  3077. if (WARN_ON_ONCE(i == ARRAY_SIZE(arg->tim_info)))
  3078. break;
  3079. if (__le32_to_cpu(ev->bcn_info[i].tim_info.tim_len) >
  3080. sizeof(ev->bcn_info[i].tim_info.tim_bitmap)) {
  3081. ath10k_warn(ar, "refusing to parse invalid swba structure\n");
  3082. return -EPROTO;
  3083. }
  3084. arg->tim_info[i].tim_len = ev->bcn_info[i].tim_info.tim_len;
  3085. arg->tim_info[i].tim_mcast = ev->bcn_info[i].tim_info.tim_mcast;
  3086. arg->tim_info[i].tim_bitmap =
  3087. ev->bcn_info[i].tim_info.tim_bitmap;
  3088. arg->tim_info[i].tim_changed =
  3089. ev->bcn_info[i].tim_info.tim_changed;
  3090. arg->tim_info[i].tim_num_ps_pending =
  3091. ev->bcn_info[i].tim_info.tim_num_ps_pending;
  3092. arg->noa_info[i] = &ev->bcn_info[i].p2p_noa_info;
  3093. i++;
  3094. }
  3095. return 0;
  3096. }
  3097. static int ath10k_wmi_10_2_4_op_pull_swba_ev(struct ath10k *ar,
  3098. struct sk_buff *skb,
  3099. struct wmi_swba_ev_arg *arg)
  3100. {
  3101. struct wmi_10_2_4_host_swba_event *ev = (void *)skb->data;
  3102. u32 map;
  3103. size_t i;
  3104. if (skb->len < sizeof(*ev))
  3105. return -EPROTO;
  3106. skb_pull(skb, sizeof(*ev));
  3107. arg->vdev_map = ev->vdev_map;
  3108. for (i = 0, map = __le32_to_cpu(ev->vdev_map); map; map >>= 1) {
  3109. if (!(map & BIT(0)))
  3110. continue;
  3111. /* If this happens there were some changes in firmware and
  3112. * ath10k should update the max size of tim_info array.
  3113. */
  3114. if (WARN_ON_ONCE(i == ARRAY_SIZE(arg->tim_info)))
  3115. break;
  3116. if (__le32_to_cpu(ev->bcn_info[i].tim_info.tim_len) >
  3117. sizeof(ev->bcn_info[i].tim_info.tim_bitmap)) {
  3118. ath10k_warn(ar, "refusing to parse invalid swba structure\n");
  3119. return -EPROTO;
  3120. }
  3121. arg->tim_info[i].tim_len = ev->bcn_info[i].tim_info.tim_len;
  3122. arg->tim_info[i].tim_mcast = ev->bcn_info[i].tim_info.tim_mcast;
  3123. arg->tim_info[i].tim_bitmap =
  3124. ev->bcn_info[i].tim_info.tim_bitmap;
  3125. arg->tim_info[i].tim_changed =
  3126. ev->bcn_info[i].tim_info.tim_changed;
  3127. arg->tim_info[i].tim_num_ps_pending =
  3128. ev->bcn_info[i].tim_info.tim_num_ps_pending;
  3129. i++;
  3130. }
  3131. return 0;
  3132. }
  3133. static int ath10k_wmi_10_4_op_pull_swba_ev(struct ath10k *ar,
  3134. struct sk_buff *skb,
  3135. struct wmi_swba_ev_arg *arg)
  3136. {
  3137. struct wmi_10_4_host_swba_event *ev = (void *)skb->data;
  3138. u32 map, tim_len;
  3139. size_t i;
  3140. if (skb->len < sizeof(*ev))
  3141. return -EPROTO;
  3142. skb_pull(skb, sizeof(*ev));
  3143. arg->vdev_map = ev->vdev_map;
  3144. for (i = 0, map = __le32_to_cpu(ev->vdev_map); map; map >>= 1) {
  3145. if (!(map & BIT(0)))
  3146. continue;
  3147. /* If this happens there were some changes in firmware and
  3148. * ath10k should update the max size of tim_info array.
  3149. */
  3150. if (WARN_ON_ONCE(i == ARRAY_SIZE(arg->tim_info)))
  3151. break;
  3152. if (__le32_to_cpu(ev->bcn_info[i].tim_info.tim_len) >
  3153. sizeof(ev->bcn_info[i].tim_info.tim_bitmap)) {
  3154. ath10k_warn(ar, "refusing to parse invalid swba structure\n");
  3155. return -EPROTO;
  3156. }
  3157. tim_len = __le32_to_cpu(ev->bcn_info[i].tim_info.tim_len);
  3158. if (tim_len) {
  3159. /* Exclude 4 byte guard length */
  3160. tim_len -= 4;
  3161. arg->tim_info[i].tim_len = __cpu_to_le32(tim_len);
  3162. } else {
  3163. arg->tim_info[i].tim_len = 0;
  3164. }
  3165. arg->tim_info[i].tim_mcast = ev->bcn_info[i].tim_info.tim_mcast;
  3166. arg->tim_info[i].tim_bitmap =
  3167. ev->bcn_info[i].tim_info.tim_bitmap;
  3168. arg->tim_info[i].tim_changed =
  3169. ev->bcn_info[i].tim_info.tim_changed;
  3170. arg->tim_info[i].tim_num_ps_pending =
  3171. ev->bcn_info[i].tim_info.tim_num_ps_pending;
  3172. /* 10.4 firmware doesn't have p2p support. notice of absence
  3173. * info can be ignored for now.
  3174. */
  3175. i++;
  3176. }
  3177. return 0;
  3178. }
  3179. static enum wmi_txbf_conf ath10k_wmi_10_4_txbf_conf_scheme(struct ath10k *ar)
  3180. {
  3181. return WMI_TXBF_CONF_BEFORE_ASSOC;
  3182. }
  3183. void ath10k_wmi_event_host_swba(struct ath10k *ar, struct sk_buff *skb)
  3184. {
  3185. struct wmi_swba_ev_arg arg = {};
  3186. u32 map;
  3187. int i = -1;
  3188. const struct wmi_tim_info_arg *tim_info;
  3189. const struct wmi_p2p_noa_info *noa_info;
  3190. struct ath10k_vif *arvif;
  3191. struct sk_buff *bcn;
  3192. dma_addr_t paddr;
  3193. int ret, vdev_id = 0;
  3194. ret = ath10k_wmi_pull_swba(ar, skb, &arg);
  3195. if (ret) {
  3196. ath10k_warn(ar, "failed to parse swba event: %d\n", ret);
  3197. return;
  3198. }
  3199. map = __le32_to_cpu(arg.vdev_map);
  3200. ath10k_dbg(ar, ATH10K_DBG_MGMT, "mgmt swba vdev_map 0x%x\n",
  3201. map);
  3202. for (; map; map >>= 1, vdev_id++) {
  3203. if (!(map & 0x1))
  3204. continue;
  3205. i++;
  3206. if (i >= WMI_MAX_AP_VDEV) {
  3207. ath10k_warn(ar, "swba has corrupted vdev map\n");
  3208. break;
  3209. }
  3210. tim_info = &arg.tim_info[i];
  3211. noa_info = arg.noa_info[i];
  3212. ath10k_dbg(ar, ATH10K_DBG_MGMT,
  3213. "mgmt event bcn_info %d tim_len %d mcast %d changed %d num_ps_pending %d bitmap 0x%08x%08x%08x%08x\n",
  3214. i,
  3215. __le32_to_cpu(tim_info->tim_len),
  3216. __le32_to_cpu(tim_info->tim_mcast),
  3217. __le32_to_cpu(tim_info->tim_changed),
  3218. __le32_to_cpu(tim_info->tim_num_ps_pending),
  3219. __le32_to_cpu(tim_info->tim_bitmap[3]),
  3220. __le32_to_cpu(tim_info->tim_bitmap[2]),
  3221. __le32_to_cpu(tim_info->tim_bitmap[1]),
  3222. __le32_to_cpu(tim_info->tim_bitmap[0]));
  3223. /* TODO: Only first 4 word from tim_bitmap is dumped.
  3224. * Extend debug code to dump full tim_bitmap.
  3225. */
  3226. arvif = ath10k_get_arvif(ar, vdev_id);
  3227. if (arvif == NULL) {
  3228. ath10k_warn(ar, "no vif for vdev_id %d found\n",
  3229. vdev_id);
  3230. continue;
  3231. }
  3232. /* mac80211 would have already asked us to stop beaconing and
  3233. * bring the vdev down, so continue in that case
  3234. */
  3235. if (!arvif->is_up)
  3236. continue;
  3237. /* There are no completions for beacons so wait for next SWBA
  3238. * before telling mac80211 to decrement CSA counter
  3239. *
  3240. * Once CSA counter is completed stop sending beacons until
  3241. * actual channel switch is done
  3242. */
  3243. if (arvif->vif->csa_active &&
  3244. ieee80211_csa_is_complete(arvif->vif)) {
  3245. ieee80211_csa_finish(arvif->vif);
  3246. continue;
  3247. }
  3248. bcn = ieee80211_beacon_get(ar->hw, arvif->vif);
  3249. if (!bcn) {
  3250. ath10k_warn(ar, "could not get mac80211 beacon\n");
  3251. continue;
  3252. }
  3253. ath10k_tx_h_seq_no(arvif->vif, bcn);
  3254. ath10k_wmi_update_tim(ar, arvif, bcn, tim_info);
  3255. ath10k_wmi_update_noa(ar, arvif, bcn, noa_info);
  3256. spin_lock_bh(&ar->data_lock);
  3257. if (arvif->beacon) {
  3258. switch (arvif->beacon_state) {
  3259. case ATH10K_BEACON_SENT:
  3260. break;
  3261. case ATH10K_BEACON_SCHEDULED:
  3262. ath10k_warn(ar, "SWBA overrun on vdev %d, skipped old beacon\n",
  3263. arvif->vdev_id);
  3264. break;
  3265. case ATH10K_BEACON_SENDING:
  3266. ath10k_warn(ar, "SWBA overrun on vdev %d, skipped new beacon\n",
  3267. arvif->vdev_id);
  3268. dev_kfree_skb(bcn);
  3269. goto skip;
  3270. }
  3271. ath10k_mac_vif_beacon_free(arvif);
  3272. }
  3273. if (!arvif->beacon_buf) {
  3274. paddr = dma_map_single(arvif->ar->dev, bcn->data,
  3275. bcn->len, DMA_TO_DEVICE);
  3276. ret = dma_mapping_error(arvif->ar->dev, paddr);
  3277. if (ret) {
  3278. ath10k_warn(ar, "failed to map beacon: %d\n",
  3279. ret);
  3280. dev_kfree_skb_any(bcn);
  3281. goto skip;
  3282. }
  3283. ATH10K_SKB_CB(bcn)->paddr = paddr;
  3284. } else {
  3285. if (bcn->len > IEEE80211_MAX_FRAME_LEN) {
  3286. ath10k_warn(ar, "trimming beacon %d -> %d bytes!\n",
  3287. bcn->len, IEEE80211_MAX_FRAME_LEN);
  3288. skb_trim(bcn, IEEE80211_MAX_FRAME_LEN);
  3289. }
  3290. memcpy(arvif->beacon_buf, bcn->data, bcn->len);
  3291. ATH10K_SKB_CB(bcn)->paddr = arvif->beacon_paddr;
  3292. }
  3293. arvif->beacon = bcn;
  3294. arvif->beacon_state = ATH10K_BEACON_SCHEDULED;
  3295. trace_ath10k_tx_hdr(ar, bcn->data, bcn->len);
  3296. trace_ath10k_tx_payload(ar, bcn->data, bcn->len);
  3297. skip:
  3298. spin_unlock_bh(&ar->data_lock);
  3299. }
  3300. ath10k_wmi_tx_beacons_nowait(ar);
  3301. }
  3302. void ath10k_wmi_event_tbttoffset_update(struct ath10k *ar, struct sk_buff *skb)
  3303. {
  3304. ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_TBTTOFFSET_UPDATE_EVENTID\n");
  3305. }
  3306. static void ath10k_radar_detected(struct ath10k *ar)
  3307. {
  3308. ath10k_dbg(ar, ATH10K_DBG_REGULATORY, "dfs radar detected\n");
  3309. ATH10K_DFS_STAT_INC(ar, radar_detected);
  3310. /* Control radar events reporting in debugfs file
  3311. * dfs_block_radar_events
  3312. */
  3313. if (ar->dfs_block_radar_events)
  3314. ath10k_info(ar, "DFS Radar detected, but ignored as requested\n");
  3315. else
  3316. ieee80211_radar_detected(ar->hw);
  3317. }
  3318. static void ath10k_radar_confirmation_work(struct work_struct *work)
  3319. {
  3320. struct ath10k *ar = container_of(work, struct ath10k,
  3321. radar_confirmation_work);
  3322. struct ath10k_radar_found_info radar_info;
  3323. int ret, time_left;
  3324. reinit_completion(&ar->wmi.radar_confirm);
  3325. spin_lock_bh(&ar->data_lock);
  3326. memcpy(&radar_info, &ar->last_radar_info, sizeof(radar_info));
  3327. spin_unlock_bh(&ar->data_lock);
  3328. ret = ath10k_wmi_report_radar_found(ar, &radar_info);
  3329. if (ret) {
  3330. ath10k_warn(ar, "failed to send radar found %d\n", ret);
  3331. goto wait_complete;
  3332. }
  3333. time_left = wait_for_completion_timeout(&ar->wmi.radar_confirm,
  3334. ATH10K_WMI_DFS_CONF_TIMEOUT_HZ);
  3335. if (time_left) {
  3336. /* DFS Confirmation status event received and
  3337. * necessary action completed.
  3338. */
  3339. goto wait_complete;
  3340. } else {
  3341. /* DFS Confirmation event not received from FW.Considering this
  3342. * as real radar.
  3343. */
  3344. ath10k_dbg(ar, ATH10K_DBG_REGULATORY,
  3345. "dfs confirmation not received from fw, considering as radar\n");
  3346. goto radar_detected;
  3347. }
  3348. radar_detected:
  3349. ath10k_radar_detected(ar);
  3350. /* Reset state to allow sending confirmation on consecutive radar
  3351. * detections, unless radar confirmation is disabled/stopped.
  3352. */
  3353. wait_complete:
  3354. spin_lock_bh(&ar->data_lock);
  3355. if (ar->radar_conf_state != ATH10K_RADAR_CONFIRMATION_STOPPED)
  3356. ar->radar_conf_state = ATH10K_RADAR_CONFIRMATION_IDLE;
  3357. spin_unlock_bh(&ar->data_lock);
  3358. }
  3359. static void ath10k_dfs_radar_report(struct ath10k *ar,
  3360. struct wmi_phyerr_ev_arg *phyerr,
  3361. const struct phyerr_radar_report *rr,
  3362. u64 tsf)
  3363. {
  3364. u32 reg0, reg1, tsf32l;
  3365. struct ieee80211_channel *ch;
  3366. struct pulse_event pe;
  3367. struct radar_detector_specs rs;
  3368. u64 tsf64;
  3369. u8 rssi, width;
  3370. struct ath10k_radar_found_info *radar_info;
  3371. reg0 = __le32_to_cpu(rr->reg0);
  3372. reg1 = __le32_to_cpu(rr->reg1);
  3373. ath10k_dbg(ar, ATH10K_DBG_REGULATORY,
  3374. "wmi phyerr radar report chirp %d max_width %d agc_total_gain %d pulse_delta_diff %d\n",
  3375. MS(reg0, RADAR_REPORT_REG0_PULSE_IS_CHIRP),
  3376. MS(reg0, RADAR_REPORT_REG0_PULSE_IS_MAX_WIDTH),
  3377. MS(reg0, RADAR_REPORT_REG0_AGC_TOTAL_GAIN),
  3378. MS(reg0, RADAR_REPORT_REG0_PULSE_DELTA_DIFF));
  3379. ath10k_dbg(ar, ATH10K_DBG_REGULATORY,
  3380. "wmi phyerr radar report pulse_delta_pean %d pulse_sidx %d fft_valid %d agc_mb_gain %d subchan_mask %d\n",
  3381. MS(reg0, RADAR_REPORT_REG0_PULSE_DELTA_PEAK),
  3382. MS(reg0, RADAR_REPORT_REG0_PULSE_SIDX),
  3383. MS(reg1, RADAR_REPORT_REG1_PULSE_SRCH_FFT_VALID),
  3384. MS(reg1, RADAR_REPORT_REG1_PULSE_AGC_MB_GAIN),
  3385. MS(reg1, RADAR_REPORT_REG1_PULSE_SUBCHAN_MASK));
  3386. ath10k_dbg(ar, ATH10K_DBG_REGULATORY,
  3387. "wmi phyerr radar report pulse_tsf_offset 0x%X pulse_dur: %d\n",
  3388. MS(reg1, RADAR_REPORT_REG1_PULSE_TSF_OFFSET),
  3389. MS(reg1, RADAR_REPORT_REG1_PULSE_DUR));
  3390. if (!ar->dfs_detector)
  3391. return;
  3392. spin_lock_bh(&ar->data_lock);
  3393. ch = ar->rx_channel;
  3394. /* fetch target operating channel during channel change */
  3395. if (!ch)
  3396. ch = ar->tgt_oper_chan;
  3397. spin_unlock_bh(&ar->data_lock);
  3398. if (!ch) {
  3399. ath10k_warn(ar, "failed to derive channel for radar pulse, treating as radar\n");
  3400. goto radar_detected;
  3401. }
  3402. /* report event to DFS pattern detector */
  3403. tsf32l = phyerr->tsf_timestamp;
  3404. tsf64 = tsf & (~0xFFFFFFFFULL);
  3405. tsf64 |= tsf32l;
  3406. width = MS(reg1, RADAR_REPORT_REG1_PULSE_DUR);
  3407. rssi = phyerr->rssi_combined;
  3408. /* hardware store this as 8 bit signed value,
  3409. * set to zero if negative number
  3410. */
  3411. if (rssi & 0x80)
  3412. rssi = 0;
  3413. pe.ts = tsf64;
  3414. pe.freq = ch->center_freq;
  3415. pe.width = width;
  3416. pe.rssi = rssi;
  3417. pe.chirp = (MS(reg0, RADAR_REPORT_REG0_PULSE_IS_CHIRP) != 0);
  3418. ath10k_dbg(ar, ATH10K_DBG_REGULATORY,
  3419. "dfs add pulse freq: %d, width: %d, rssi %d, tsf: %llX\n",
  3420. pe.freq, pe.width, pe.rssi, pe.ts);
  3421. ATH10K_DFS_STAT_INC(ar, pulses_detected);
  3422. if (!ar->dfs_detector->add_pulse(ar->dfs_detector, &pe, &rs)) {
  3423. ath10k_dbg(ar, ATH10K_DBG_REGULATORY,
  3424. "dfs no pulse pattern detected, yet\n");
  3425. return;
  3426. }
  3427. if ((test_bit(WMI_SERVICE_HOST_DFS_CHECK_SUPPORT, ar->wmi.svc_map)) &&
  3428. ar->dfs_detector->region == NL80211_DFS_FCC) {
  3429. /* Consecutive radar indications need not be
  3430. * sent to the firmware until we get confirmation
  3431. * for the previous detected radar.
  3432. */
  3433. spin_lock_bh(&ar->data_lock);
  3434. if (ar->radar_conf_state != ATH10K_RADAR_CONFIRMATION_IDLE) {
  3435. spin_unlock_bh(&ar->data_lock);
  3436. return;
  3437. }
  3438. ar->radar_conf_state = ATH10K_RADAR_CONFIRMATION_INPROGRESS;
  3439. radar_info = &ar->last_radar_info;
  3440. radar_info->pri_min = rs.pri_min;
  3441. radar_info->pri_max = rs.pri_max;
  3442. radar_info->width_min = rs.width_min;
  3443. radar_info->width_max = rs.width_max;
  3444. /*TODO Find sidx_min and sidx_max */
  3445. radar_info->sidx_min = MS(reg0, RADAR_REPORT_REG0_PULSE_SIDX);
  3446. radar_info->sidx_max = MS(reg0, RADAR_REPORT_REG0_PULSE_SIDX);
  3447. ath10k_dbg(ar, ATH10K_DBG_REGULATORY,
  3448. "sending wmi radar found cmd pri_min %d pri_max %d width_min %d width_max %d sidx_min %d sidx_max %d\n",
  3449. radar_info->pri_min, radar_info->pri_max,
  3450. radar_info->width_min, radar_info->width_max,
  3451. radar_info->sidx_min, radar_info->sidx_max);
  3452. ieee80211_queue_work(ar->hw, &ar->radar_confirmation_work);
  3453. spin_unlock_bh(&ar->data_lock);
  3454. return;
  3455. }
  3456. radar_detected:
  3457. ath10k_radar_detected(ar);
  3458. }
  3459. static int ath10k_dfs_fft_report(struct ath10k *ar,
  3460. struct wmi_phyerr_ev_arg *phyerr,
  3461. const struct phyerr_fft_report *fftr,
  3462. u64 tsf)
  3463. {
  3464. u32 reg0, reg1;
  3465. u8 rssi, peak_mag;
  3466. reg0 = __le32_to_cpu(fftr->reg0);
  3467. reg1 = __le32_to_cpu(fftr->reg1);
  3468. rssi = phyerr->rssi_combined;
  3469. ath10k_dbg(ar, ATH10K_DBG_REGULATORY,
  3470. "wmi phyerr fft report total_gain_db %d base_pwr_db %d fft_chn_idx %d peak_sidx %d\n",
  3471. MS(reg0, SEARCH_FFT_REPORT_REG0_TOTAL_GAIN_DB),
  3472. MS(reg0, SEARCH_FFT_REPORT_REG0_BASE_PWR_DB),
  3473. MS(reg0, SEARCH_FFT_REPORT_REG0_FFT_CHN_IDX),
  3474. MS(reg0, SEARCH_FFT_REPORT_REG0_PEAK_SIDX));
  3475. ath10k_dbg(ar, ATH10K_DBG_REGULATORY,
  3476. "wmi phyerr fft report rel_pwr_db %d avgpwr_db %d peak_mag %d num_store_bin %d\n",
  3477. MS(reg1, SEARCH_FFT_REPORT_REG1_RELPWR_DB),
  3478. MS(reg1, SEARCH_FFT_REPORT_REG1_AVGPWR_DB),
  3479. MS(reg1, SEARCH_FFT_REPORT_REG1_PEAK_MAG),
  3480. MS(reg1, SEARCH_FFT_REPORT_REG1_NUM_STR_BINS_IB));
  3481. peak_mag = MS(reg1, SEARCH_FFT_REPORT_REG1_PEAK_MAG);
  3482. /* false event detection */
  3483. if (rssi == DFS_RSSI_POSSIBLY_FALSE &&
  3484. peak_mag < 2 * DFS_PEAK_MAG_THOLD_POSSIBLY_FALSE) {
  3485. ath10k_dbg(ar, ATH10K_DBG_REGULATORY, "dfs false pulse detected\n");
  3486. ATH10K_DFS_STAT_INC(ar, pulses_discarded);
  3487. return -EINVAL;
  3488. }
  3489. return 0;
  3490. }
  3491. void ath10k_wmi_event_dfs(struct ath10k *ar,
  3492. struct wmi_phyerr_ev_arg *phyerr,
  3493. u64 tsf)
  3494. {
  3495. int buf_len, tlv_len, res, i = 0;
  3496. const struct phyerr_tlv *tlv;
  3497. const struct phyerr_radar_report *rr;
  3498. const struct phyerr_fft_report *fftr;
  3499. const u8 *tlv_buf;
  3500. buf_len = phyerr->buf_len;
  3501. ath10k_dbg(ar, ATH10K_DBG_REGULATORY,
  3502. "wmi event dfs err_code %d rssi %d tsfl 0x%X tsf64 0x%llX len %d\n",
  3503. phyerr->phy_err_code, phyerr->rssi_combined,
  3504. phyerr->tsf_timestamp, tsf, buf_len);
  3505. /* Skip event if DFS disabled */
  3506. if (!IS_ENABLED(CONFIG_ATH10K_DFS_CERTIFIED))
  3507. return;
  3508. ATH10K_DFS_STAT_INC(ar, pulses_total);
  3509. while (i < buf_len) {
  3510. if (i + sizeof(*tlv) > buf_len) {
  3511. ath10k_warn(ar, "too short buf for tlv header (%d)\n",
  3512. i);
  3513. return;
  3514. }
  3515. tlv = (struct phyerr_tlv *)&phyerr->buf[i];
  3516. tlv_len = __le16_to_cpu(tlv->len);
  3517. tlv_buf = &phyerr->buf[i + sizeof(*tlv)];
  3518. ath10k_dbg(ar, ATH10K_DBG_REGULATORY,
  3519. "wmi event dfs tlv_len %d tlv_tag 0x%02X tlv_sig 0x%02X\n",
  3520. tlv_len, tlv->tag, tlv->sig);
  3521. switch (tlv->tag) {
  3522. case PHYERR_TLV_TAG_RADAR_PULSE_SUMMARY:
  3523. if (i + sizeof(*tlv) + sizeof(*rr) > buf_len) {
  3524. ath10k_warn(ar, "too short radar pulse summary (%d)\n",
  3525. i);
  3526. return;
  3527. }
  3528. rr = (struct phyerr_radar_report *)tlv_buf;
  3529. ath10k_dfs_radar_report(ar, phyerr, rr, tsf);
  3530. break;
  3531. case PHYERR_TLV_TAG_SEARCH_FFT_REPORT:
  3532. if (i + sizeof(*tlv) + sizeof(*fftr) > buf_len) {
  3533. ath10k_warn(ar, "too short fft report (%d)\n",
  3534. i);
  3535. return;
  3536. }
  3537. fftr = (struct phyerr_fft_report *)tlv_buf;
  3538. res = ath10k_dfs_fft_report(ar, phyerr, fftr, tsf);
  3539. if (res)
  3540. return;
  3541. break;
  3542. }
  3543. i += sizeof(*tlv) + tlv_len;
  3544. }
  3545. }
  3546. void ath10k_wmi_event_spectral_scan(struct ath10k *ar,
  3547. struct wmi_phyerr_ev_arg *phyerr,
  3548. u64 tsf)
  3549. {
  3550. int buf_len, tlv_len, res, i = 0;
  3551. struct phyerr_tlv *tlv;
  3552. const void *tlv_buf;
  3553. const struct phyerr_fft_report *fftr;
  3554. size_t fftr_len;
  3555. buf_len = phyerr->buf_len;
  3556. while (i < buf_len) {
  3557. if (i + sizeof(*tlv) > buf_len) {
  3558. ath10k_warn(ar, "failed to parse phyerr tlv header at byte %d\n",
  3559. i);
  3560. return;
  3561. }
  3562. tlv = (struct phyerr_tlv *)&phyerr->buf[i];
  3563. tlv_len = __le16_to_cpu(tlv->len);
  3564. tlv_buf = &phyerr->buf[i + sizeof(*tlv)];
  3565. if (i + sizeof(*tlv) + tlv_len > buf_len) {
  3566. ath10k_warn(ar, "failed to parse phyerr tlv payload at byte %d\n",
  3567. i);
  3568. return;
  3569. }
  3570. switch (tlv->tag) {
  3571. case PHYERR_TLV_TAG_SEARCH_FFT_REPORT:
  3572. if (sizeof(*fftr) > tlv_len) {
  3573. ath10k_warn(ar, "failed to parse fft report at byte %d\n",
  3574. i);
  3575. return;
  3576. }
  3577. fftr_len = tlv_len - sizeof(*fftr);
  3578. fftr = tlv_buf;
  3579. res = ath10k_spectral_process_fft(ar, phyerr,
  3580. fftr, fftr_len,
  3581. tsf);
  3582. if (res < 0) {
  3583. ath10k_dbg(ar, ATH10K_DBG_WMI, "failed to process fft report: %d\n",
  3584. res);
  3585. return;
  3586. }
  3587. break;
  3588. }
  3589. i += sizeof(*tlv) + tlv_len;
  3590. }
  3591. }
  3592. static int ath10k_wmi_op_pull_phyerr_ev_hdr(struct ath10k *ar,
  3593. struct sk_buff *skb,
  3594. struct wmi_phyerr_hdr_arg *arg)
  3595. {
  3596. struct wmi_phyerr_event *ev = (void *)skb->data;
  3597. if (skb->len < sizeof(*ev))
  3598. return -EPROTO;
  3599. arg->num_phyerrs = __le32_to_cpu(ev->num_phyerrs);
  3600. arg->tsf_l32 = __le32_to_cpu(ev->tsf_l32);
  3601. arg->tsf_u32 = __le32_to_cpu(ev->tsf_u32);
  3602. arg->buf_len = skb->len - sizeof(*ev);
  3603. arg->phyerrs = ev->phyerrs;
  3604. return 0;
  3605. }
  3606. static int ath10k_wmi_10_4_op_pull_phyerr_ev_hdr(struct ath10k *ar,
  3607. struct sk_buff *skb,
  3608. struct wmi_phyerr_hdr_arg *arg)
  3609. {
  3610. struct wmi_10_4_phyerr_event *ev = (void *)skb->data;
  3611. if (skb->len < sizeof(*ev))
  3612. return -EPROTO;
  3613. /* 10.4 firmware always reports only one phyerr */
  3614. arg->num_phyerrs = 1;
  3615. arg->tsf_l32 = __le32_to_cpu(ev->tsf_l32);
  3616. arg->tsf_u32 = __le32_to_cpu(ev->tsf_u32);
  3617. arg->buf_len = skb->len;
  3618. arg->phyerrs = skb->data;
  3619. return 0;
  3620. }
  3621. int ath10k_wmi_op_pull_phyerr_ev(struct ath10k *ar,
  3622. const void *phyerr_buf,
  3623. int left_len,
  3624. struct wmi_phyerr_ev_arg *arg)
  3625. {
  3626. const struct wmi_phyerr *phyerr = phyerr_buf;
  3627. int i;
  3628. if (left_len < sizeof(*phyerr)) {
  3629. ath10k_warn(ar, "wrong phyerr event head len %d (need: >=%zd)\n",
  3630. left_len, sizeof(*phyerr));
  3631. return -EINVAL;
  3632. }
  3633. arg->tsf_timestamp = __le32_to_cpu(phyerr->tsf_timestamp);
  3634. arg->freq1 = __le16_to_cpu(phyerr->freq1);
  3635. arg->freq2 = __le16_to_cpu(phyerr->freq2);
  3636. arg->rssi_combined = phyerr->rssi_combined;
  3637. arg->chan_width_mhz = phyerr->chan_width_mhz;
  3638. arg->buf_len = __le32_to_cpu(phyerr->buf_len);
  3639. arg->buf = phyerr->buf;
  3640. arg->hdr_len = sizeof(*phyerr);
  3641. for (i = 0; i < 4; i++)
  3642. arg->nf_chains[i] = __le16_to_cpu(phyerr->nf_chains[i]);
  3643. switch (phyerr->phy_err_code) {
  3644. case PHY_ERROR_GEN_SPECTRAL_SCAN:
  3645. arg->phy_err_code = PHY_ERROR_SPECTRAL_SCAN;
  3646. break;
  3647. case PHY_ERROR_GEN_FALSE_RADAR_EXT:
  3648. arg->phy_err_code = PHY_ERROR_FALSE_RADAR_EXT;
  3649. break;
  3650. case PHY_ERROR_GEN_RADAR:
  3651. arg->phy_err_code = PHY_ERROR_RADAR;
  3652. break;
  3653. default:
  3654. arg->phy_err_code = PHY_ERROR_UNKNOWN;
  3655. break;
  3656. }
  3657. return 0;
  3658. }
  3659. static int ath10k_wmi_10_4_op_pull_phyerr_ev(struct ath10k *ar,
  3660. const void *phyerr_buf,
  3661. int left_len,
  3662. struct wmi_phyerr_ev_arg *arg)
  3663. {
  3664. const struct wmi_10_4_phyerr_event *phyerr = phyerr_buf;
  3665. u32 phy_err_mask;
  3666. int i;
  3667. if (left_len < sizeof(*phyerr)) {
  3668. ath10k_warn(ar, "wrong phyerr event head len %d (need: >=%zd)\n",
  3669. left_len, sizeof(*phyerr));
  3670. return -EINVAL;
  3671. }
  3672. arg->tsf_timestamp = __le32_to_cpu(phyerr->tsf_timestamp);
  3673. arg->freq1 = __le16_to_cpu(phyerr->freq1);
  3674. arg->freq2 = __le16_to_cpu(phyerr->freq2);
  3675. arg->rssi_combined = phyerr->rssi_combined;
  3676. arg->chan_width_mhz = phyerr->chan_width_mhz;
  3677. arg->buf_len = __le32_to_cpu(phyerr->buf_len);
  3678. arg->buf = phyerr->buf;
  3679. arg->hdr_len = sizeof(*phyerr);
  3680. for (i = 0; i < 4; i++)
  3681. arg->nf_chains[i] = __le16_to_cpu(phyerr->nf_chains[i]);
  3682. phy_err_mask = __le32_to_cpu(phyerr->phy_err_mask[0]);
  3683. if (phy_err_mask & PHY_ERROR_10_4_SPECTRAL_SCAN_MASK)
  3684. arg->phy_err_code = PHY_ERROR_SPECTRAL_SCAN;
  3685. else if (phy_err_mask & PHY_ERROR_10_4_RADAR_MASK)
  3686. arg->phy_err_code = PHY_ERROR_RADAR;
  3687. else
  3688. arg->phy_err_code = PHY_ERROR_UNKNOWN;
  3689. return 0;
  3690. }
  3691. void ath10k_wmi_event_phyerr(struct ath10k *ar, struct sk_buff *skb)
  3692. {
  3693. struct wmi_phyerr_hdr_arg hdr_arg = {};
  3694. struct wmi_phyerr_ev_arg phyerr_arg = {};
  3695. const void *phyerr;
  3696. u32 count, i, buf_len, phy_err_code;
  3697. u64 tsf;
  3698. int left_len, ret;
  3699. ATH10K_DFS_STAT_INC(ar, phy_errors);
  3700. ret = ath10k_wmi_pull_phyerr_hdr(ar, skb, &hdr_arg);
  3701. if (ret) {
  3702. ath10k_warn(ar, "failed to parse phyerr event hdr: %d\n", ret);
  3703. return;
  3704. }
  3705. /* Check number of included events */
  3706. count = hdr_arg.num_phyerrs;
  3707. left_len = hdr_arg.buf_len;
  3708. tsf = hdr_arg.tsf_u32;
  3709. tsf <<= 32;
  3710. tsf |= hdr_arg.tsf_l32;
  3711. ath10k_dbg(ar, ATH10K_DBG_WMI,
  3712. "wmi event phyerr count %d tsf64 0x%llX\n",
  3713. count, tsf);
  3714. phyerr = hdr_arg.phyerrs;
  3715. for (i = 0; i < count; i++) {
  3716. ret = ath10k_wmi_pull_phyerr(ar, phyerr, left_len, &phyerr_arg);
  3717. if (ret) {
  3718. ath10k_warn(ar, "failed to parse phyerr event (%d)\n",
  3719. i);
  3720. return;
  3721. }
  3722. left_len -= phyerr_arg.hdr_len;
  3723. buf_len = phyerr_arg.buf_len;
  3724. phy_err_code = phyerr_arg.phy_err_code;
  3725. if (left_len < buf_len) {
  3726. ath10k_warn(ar, "single event (%d) wrong buf len\n", i);
  3727. return;
  3728. }
  3729. left_len -= buf_len;
  3730. switch (phy_err_code) {
  3731. case PHY_ERROR_RADAR:
  3732. ath10k_wmi_event_dfs(ar, &phyerr_arg, tsf);
  3733. break;
  3734. case PHY_ERROR_SPECTRAL_SCAN:
  3735. ath10k_wmi_event_spectral_scan(ar, &phyerr_arg, tsf);
  3736. break;
  3737. case PHY_ERROR_FALSE_RADAR_EXT:
  3738. ath10k_wmi_event_dfs(ar, &phyerr_arg, tsf);
  3739. ath10k_wmi_event_spectral_scan(ar, &phyerr_arg, tsf);
  3740. break;
  3741. default:
  3742. break;
  3743. }
  3744. phyerr = phyerr + phyerr_arg.hdr_len + buf_len;
  3745. }
  3746. }
  3747. static int
  3748. ath10k_wmi_10_4_op_pull_dfs_status_ev(struct ath10k *ar, struct sk_buff *skb,
  3749. struct wmi_dfs_status_ev_arg *arg)
  3750. {
  3751. struct wmi_dfs_status_ev_arg *ev = (void *)skb->data;
  3752. if (skb->len < sizeof(*ev))
  3753. return -EPROTO;
  3754. arg->status = ev->status;
  3755. return 0;
  3756. }
  3757. static void
  3758. ath10k_wmi_event_dfs_status_check(struct ath10k *ar, struct sk_buff *skb)
  3759. {
  3760. struct wmi_dfs_status_ev_arg status_arg = {};
  3761. int ret;
  3762. ret = ath10k_wmi_pull_dfs_status(ar, skb, &status_arg);
  3763. if (ret) {
  3764. ath10k_warn(ar, "failed to parse dfs status event: %d\n", ret);
  3765. return;
  3766. }
  3767. ath10k_dbg(ar, ATH10K_DBG_REGULATORY,
  3768. "dfs status event received from fw: %d\n",
  3769. status_arg.status);
  3770. /* Even in case of radar detection failure we follow the same
  3771. * behaviour as if radar is detected i.e to switch to a different
  3772. * channel.
  3773. */
  3774. if (status_arg.status == WMI_HW_RADAR_DETECTED ||
  3775. status_arg.status == WMI_RADAR_DETECTION_FAIL)
  3776. ath10k_radar_detected(ar);
  3777. complete(&ar->wmi.radar_confirm);
  3778. }
  3779. void ath10k_wmi_event_roam(struct ath10k *ar, struct sk_buff *skb)
  3780. {
  3781. struct wmi_roam_ev_arg arg = {};
  3782. int ret;
  3783. u32 vdev_id;
  3784. u32 reason;
  3785. s32 rssi;
  3786. ret = ath10k_wmi_pull_roam_ev(ar, skb, &arg);
  3787. if (ret) {
  3788. ath10k_warn(ar, "failed to parse roam event: %d\n", ret);
  3789. return;
  3790. }
  3791. vdev_id = __le32_to_cpu(arg.vdev_id);
  3792. reason = __le32_to_cpu(arg.reason);
  3793. rssi = __le32_to_cpu(arg.rssi);
  3794. rssi += WMI_SPECTRAL_NOISE_FLOOR_REF_DEFAULT;
  3795. ath10k_dbg(ar, ATH10K_DBG_WMI,
  3796. "wmi roam event vdev %u reason 0x%08x rssi %d\n",
  3797. vdev_id, reason, rssi);
  3798. if (reason >= WMI_ROAM_REASON_MAX)
  3799. ath10k_warn(ar, "ignoring unknown roam event reason %d on vdev %i\n",
  3800. reason, vdev_id);
  3801. switch (reason) {
  3802. case WMI_ROAM_REASON_BEACON_MISS:
  3803. ath10k_mac_handle_beacon_miss(ar, vdev_id);
  3804. break;
  3805. case WMI_ROAM_REASON_BETTER_AP:
  3806. case WMI_ROAM_REASON_LOW_RSSI:
  3807. case WMI_ROAM_REASON_SUITABLE_AP_FOUND:
  3808. case WMI_ROAM_REASON_HO_FAILED:
  3809. ath10k_warn(ar, "ignoring not implemented roam event reason %d on vdev %i\n",
  3810. reason, vdev_id);
  3811. break;
  3812. }
  3813. }
  3814. void ath10k_wmi_event_profile_match(struct ath10k *ar, struct sk_buff *skb)
  3815. {
  3816. ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_PROFILE_MATCH\n");
  3817. }
  3818. void ath10k_wmi_event_debug_print(struct ath10k *ar, struct sk_buff *skb)
  3819. {
  3820. char buf[101], c;
  3821. int i;
  3822. for (i = 0; i < sizeof(buf) - 1; i++) {
  3823. if (i >= skb->len)
  3824. break;
  3825. c = skb->data[i];
  3826. if (c == '\0')
  3827. break;
  3828. if (isascii(c) && isprint(c))
  3829. buf[i] = c;
  3830. else
  3831. buf[i] = '.';
  3832. }
  3833. if (i == sizeof(buf) - 1)
  3834. ath10k_warn(ar, "wmi debug print truncated: %d\n", skb->len);
  3835. /* for some reason the debug prints end with \n, remove that */
  3836. if (skb->data[i - 1] == '\n')
  3837. i--;
  3838. /* the last byte is always reserved for the null character */
  3839. buf[i] = '\0';
  3840. ath10k_dbg(ar, ATH10K_DBG_WMI_PRINT, "wmi print '%s'\n", buf);
  3841. }
  3842. void ath10k_wmi_event_pdev_qvit(struct ath10k *ar, struct sk_buff *skb)
  3843. {
  3844. ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_PDEV_QVIT_EVENTID\n");
  3845. }
  3846. void ath10k_wmi_event_wlan_profile_data(struct ath10k *ar, struct sk_buff *skb)
  3847. {
  3848. ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_WLAN_PROFILE_DATA_EVENTID\n");
  3849. }
  3850. void ath10k_wmi_event_rtt_measurement_report(struct ath10k *ar,
  3851. struct sk_buff *skb)
  3852. {
  3853. ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_RTT_MEASUREMENT_REPORT_EVENTID\n");
  3854. }
  3855. void ath10k_wmi_event_tsf_measurement_report(struct ath10k *ar,
  3856. struct sk_buff *skb)
  3857. {
  3858. ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_TSF_MEASUREMENT_REPORT_EVENTID\n");
  3859. }
  3860. void ath10k_wmi_event_rtt_error_report(struct ath10k *ar, struct sk_buff *skb)
  3861. {
  3862. ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_RTT_ERROR_REPORT_EVENTID\n");
  3863. }
  3864. void ath10k_wmi_event_wow_wakeup_host(struct ath10k *ar, struct sk_buff *skb)
  3865. {
  3866. struct wmi_wow_ev_arg ev = {};
  3867. int ret;
  3868. complete(&ar->wow.wakeup_completed);
  3869. ret = ath10k_wmi_pull_wow_event(ar, skb, &ev);
  3870. if (ret) {
  3871. ath10k_warn(ar, "failed to parse wow wakeup event: %d\n", ret);
  3872. return;
  3873. }
  3874. ath10k_dbg(ar, ATH10K_DBG_WMI, "wow wakeup host reason %s\n",
  3875. wow_reason(ev.wake_reason));
  3876. }
  3877. void ath10k_wmi_event_dcs_interference(struct ath10k *ar, struct sk_buff *skb)
  3878. {
  3879. ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_DCS_INTERFERENCE_EVENTID\n");
  3880. }
  3881. static u8 ath10k_tpc_config_get_rate(struct ath10k *ar,
  3882. struct wmi_pdev_tpc_config_event *ev,
  3883. u32 rate_idx, u32 num_chains,
  3884. u32 rate_code, u8 type)
  3885. {
  3886. u8 tpc, num_streams, preamble, ch, stm_idx;
  3887. num_streams = ATH10K_HW_NSS(rate_code);
  3888. preamble = ATH10K_HW_PREAMBLE(rate_code);
  3889. ch = num_chains - 1;
  3890. tpc = min_t(u8, ev->rates_array[rate_idx], ev->max_reg_allow_pow[ch]);
  3891. if (__le32_to_cpu(ev->num_tx_chain) <= 1)
  3892. goto out;
  3893. if (preamble == WMI_RATE_PREAMBLE_CCK)
  3894. goto out;
  3895. stm_idx = num_streams - 1;
  3896. if (num_chains <= num_streams)
  3897. goto out;
  3898. switch (type) {
  3899. case WMI_TPC_TABLE_TYPE_STBC:
  3900. tpc = min_t(u8, tpc,
  3901. ev->max_reg_allow_pow_agstbc[ch - 1][stm_idx]);
  3902. break;
  3903. case WMI_TPC_TABLE_TYPE_TXBF:
  3904. tpc = min_t(u8, tpc,
  3905. ev->max_reg_allow_pow_agtxbf[ch - 1][stm_idx]);
  3906. break;
  3907. case WMI_TPC_TABLE_TYPE_CDD:
  3908. tpc = min_t(u8, tpc,
  3909. ev->max_reg_allow_pow_agcdd[ch - 1][stm_idx]);
  3910. break;
  3911. default:
  3912. ath10k_warn(ar, "unknown wmi tpc table type: %d\n", type);
  3913. tpc = 0;
  3914. break;
  3915. }
  3916. out:
  3917. return tpc;
  3918. }
  3919. static void ath10k_tpc_config_disp_tables(struct ath10k *ar,
  3920. struct wmi_pdev_tpc_config_event *ev,
  3921. struct ath10k_tpc_stats *tpc_stats,
  3922. u8 *rate_code, u16 *pream_table, u8 type)
  3923. {
  3924. u32 i, j, pream_idx, flags;
  3925. u8 tpc[WMI_TPC_TX_N_CHAIN];
  3926. char tpc_value[WMI_TPC_TX_N_CHAIN * WMI_TPC_BUF_SIZE];
  3927. char buff[WMI_TPC_BUF_SIZE];
  3928. flags = __le32_to_cpu(ev->flags);
  3929. switch (type) {
  3930. case WMI_TPC_TABLE_TYPE_CDD:
  3931. if (!(flags & WMI_TPC_CONFIG_EVENT_FLAG_TABLE_CDD)) {
  3932. ath10k_dbg(ar, ATH10K_DBG_WMI, "CDD not supported\n");
  3933. tpc_stats->flag[type] = ATH10K_TPC_TABLE_TYPE_FLAG;
  3934. return;
  3935. }
  3936. break;
  3937. case WMI_TPC_TABLE_TYPE_STBC:
  3938. if (!(flags & WMI_TPC_CONFIG_EVENT_FLAG_TABLE_STBC)) {
  3939. ath10k_dbg(ar, ATH10K_DBG_WMI, "STBC not supported\n");
  3940. tpc_stats->flag[type] = ATH10K_TPC_TABLE_TYPE_FLAG;
  3941. return;
  3942. }
  3943. break;
  3944. case WMI_TPC_TABLE_TYPE_TXBF:
  3945. if (!(flags & WMI_TPC_CONFIG_EVENT_FLAG_TABLE_TXBF)) {
  3946. ath10k_dbg(ar, ATH10K_DBG_WMI, "TXBF not supported\n");
  3947. tpc_stats->flag[type] = ATH10K_TPC_TABLE_TYPE_FLAG;
  3948. return;
  3949. }
  3950. break;
  3951. default:
  3952. ath10k_dbg(ar, ATH10K_DBG_WMI,
  3953. "invalid table type in wmi tpc event: %d\n", type);
  3954. return;
  3955. }
  3956. pream_idx = 0;
  3957. for (i = 0; i < __le32_to_cpu(ev->rate_max); i++) {
  3958. memset(tpc_value, 0, sizeof(tpc_value));
  3959. memset(buff, 0, sizeof(buff));
  3960. if (i == pream_table[pream_idx])
  3961. pream_idx++;
  3962. for (j = 0; j < WMI_TPC_TX_N_CHAIN; j++) {
  3963. if (j >= __le32_to_cpu(ev->num_tx_chain))
  3964. break;
  3965. tpc[j] = ath10k_tpc_config_get_rate(ar, ev, i, j + 1,
  3966. rate_code[i],
  3967. type);
  3968. snprintf(buff, sizeof(buff), "%8d ", tpc[j]);
  3969. strlcat(tpc_value, buff, sizeof(tpc_value));
  3970. }
  3971. tpc_stats->tpc_table[type].pream_idx[i] = pream_idx;
  3972. tpc_stats->tpc_table[type].rate_code[i] = rate_code[i];
  3973. memcpy(tpc_stats->tpc_table[type].tpc_value[i],
  3974. tpc_value, sizeof(tpc_value));
  3975. }
  3976. }
  3977. void ath10k_wmi_tpc_config_get_rate_code(u8 *rate_code, u16 *pream_table,
  3978. u32 num_tx_chain)
  3979. {
  3980. u32 i, j, pream_idx;
  3981. u8 rate_idx;
  3982. /* Create the rate code table based on the chains supported */
  3983. rate_idx = 0;
  3984. pream_idx = 0;
  3985. /* Fill CCK rate code */
  3986. for (i = 0; i < 4; i++) {
  3987. rate_code[rate_idx] =
  3988. ATH10K_HW_RATECODE(i, 0, WMI_RATE_PREAMBLE_CCK);
  3989. rate_idx++;
  3990. }
  3991. pream_table[pream_idx] = rate_idx;
  3992. pream_idx++;
  3993. /* Fill OFDM rate code */
  3994. for (i = 0; i < 8; i++) {
  3995. rate_code[rate_idx] =
  3996. ATH10K_HW_RATECODE(i, 0, WMI_RATE_PREAMBLE_OFDM);
  3997. rate_idx++;
  3998. }
  3999. pream_table[pream_idx] = rate_idx;
  4000. pream_idx++;
  4001. /* Fill HT20 rate code */
  4002. for (i = 0; i < num_tx_chain; i++) {
  4003. for (j = 0; j < 8; j++) {
  4004. rate_code[rate_idx] =
  4005. ATH10K_HW_RATECODE(j, i, WMI_RATE_PREAMBLE_HT);
  4006. rate_idx++;
  4007. }
  4008. }
  4009. pream_table[pream_idx] = rate_idx;
  4010. pream_idx++;
  4011. /* Fill HT40 rate code */
  4012. for (i = 0; i < num_tx_chain; i++) {
  4013. for (j = 0; j < 8; j++) {
  4014. rate_code[rate_idx] =
  4015. ATH10K_HW_RATECODE(j, i, WMI_RATE_PREAMBLE_HT);
  4016. rate_idx++;
  4017. }
  4018. }
  4019. pream_table[pream_idx] = rate_idx;
  4020. pream_idx++;
  4021. /* Fill VHT20 rate code */
  4022. for (i = 0; i < num_tx_chain; i++) {
  4023. for (j = 0; j < 10; j++) {
  4024. rate_code[rate_idx] =
  4025. ATH10K_HW_RATECODE(j, i, WMI_RATE_PREAMBLE_VHT);
  4026. rate_idx++;
  4027. }
  4028. }
  4029. pream_table[pream_idx] = rate_idx;
  4030. pream_idx++;
  4031. /* Fill VHT40 rate code */
  4032. for (i = 0; i < num_tx_chain; i++) {
  4033. for (j = 0; j < 10; j++) {
  4034. rate_code[rate_idx] =
  4035. ATH10K_HW_RATECODE(j, i, WMI_RATE_PREAMBLE_VHT);
  4036. rate_idx++;
  4037. }
  4038. }
  4039. pream_table[pream_idx] = rate_idx;
  4040. pream_idx++;
  4041. /* Fill VHT80 rate code */
  4042. for (i = 0; i < num_tx_chain; i++) {
  4043. for (j = 0; j < 10; j++) {
  4044. rate_code[rate_idx] =
  4045. ATH10K_HW_RATECODE(j, i, WMI_RATE_PREAMBLE_VHT);
  4046. rate_idx++;
  4047. }
  4048. }
  4049. pream_table[pream_idx] = rate_idx;
  4050. pream_idx++;
  4051. rate_code[rate_idx++] =
  4052. ATH10K_HW_RATECODE(0, 0, WMI_RATE_PREAMBLE_CCK);
  4053. rate_code[rate_idx++] =
  4054. ATH10K_HW_RATECODE(0, 0, WMI_RATE_PREAMBLE_OFDM);
  4055. rate_code[rate_idx++] =
  4056. ATH10K_HW_RATECODE(0, 0, WMI_RATE_PREAMBLE_CCK);
  4057. rate_code[rate_idx++] =
  4058. ATH10K_HW_RATECODE(0, 0, WMI_RATE_PREAMBLE_OFDM);
  4059. rate_code[rate_idx++] =
  4060. ATH10K_HW_RATECODE(0, 0, WMI_RATE_PREAMBLE_OFDM);
  4061. pream_table[pream_idx] = ATH10K_TPC_PREAM_TABLE_END;
  4062. }
  4063. void ath10k_wmi_event_pdev_tpc_config(struct ath10k *ar, struct sk_buff *skb)
  4064. {
  4065. u32 num_tx_chain;
  4066. u8 rate_code[WMI_TPC_RATE_MAX];
  4067. u16 pream_table[WMI_TPC_PREAM_TABLE_MAX];
  4068. struct wmi_pdev_tpc_config_event *ev;
  4069. struct ath10k_tpc_stats *tpc_stats;
  4070. ev = (struct wmi_pdev_tpc_config_event *)skb->data;
  4071. num_tx_chain = __le32_to_cpu(ev->num_tx_chain);
  4072. if (num_tx_chain > WMI_TPC_TX_N_CHAIN) {
  4073. ath10k_warn(ar, "number of tx chain is %d greater than TPC configured tx chain %d\n",
  4074. num_tx_chain, WMI_TPC_TX_N_CHAIN);
  4075. return;
  4076. }
  4077. tpc_stats = kzalloc(sizeof(*tpc_stats), GFP_ATOMIC);
  4078. if (!tpc_stats)
  4079. return;
  4080. ath10k_wmi_tpc_config_get_rate_code(rate_code, pream_table,
  4081. num_tx_chain);
  4082. tpc_stats->chan_freq = __le32_to_cpu(ev->chan_freq);
  4083. tpc_stats->phy_mode = __le32_to_cpu(ev->phy_mode);
  4084. tpc_stats->ctl = __le32_to_cpu(ev->ctl);
  4085. tpc_stats->reg_domain = __le32_to_cpu(ev->reg_domain);
  4086. tpc_stats->twice_antenna_gain = a_sle32_to_cpu(ev->twice_antenna_gain);
  4087. tpc_stats->twice_antenna_reduction =
  4088. __le32_to_cpu(ev->twice_antenna_reduction);
  4089. tpc_stats->power_limit = __le32_to_cpu(ev->power_limit);
  4090. tpc_stats->twice_max_rd_power = __le32_to_cpu(ev->twice_max_rd_power);
  4091. tpc_stats->num_tx_chain = __le32_to_cpu(ev->num_tx_chain);
  4092. tpc_stats->rate_max = __le32_to_cpu(ev->rate_max);
  4093. ath10k_tpc_config_disp_tables(ar, ev, tpc_stats,
  4094. rate_code, pream_table,
  4095. WMI_TPC_TABLE_TYPE_CDD);
  4096. ath10k_tpc_config_disp_tables(ar, ev, tpc_stats,
  4097. rate_code, pream_table,
  4098. WMI_TPC_TABLE_TYPE_STBC);
  4099. ath10k_tpc_config_disp_tables(ar, ev, tpc_stats,
  4100. rate_code, pream_table,
  4101. WMI_TPC_TABLE_TYPE_TXBF);
  4102. ath10k_debug_tpc_stats_process(ar, tpc_stats);
  4103. ath10k_dbg(ar, ATH10K_DBG_WMI,
  4104. "wmi event tpc config channel %d mode %d ctl %d regd %d gain %d %d limit %d max_power %d tx_chanins %d rates %d\n",
  4105. __le32_to_cpu(ev->chan_freq),
  4106. __le32_to_cpu(ev->phy_mode),
  4107. __le32_to_cpu(ev->ctl),
  4108. __le32_to_cpu(ev->reg_domain),
  4109. a_sle32_to_cpu(ev->twice_antenna_gain),
  4110. __le32_to_cpu(ev->twice_antenna_reduction),
  4111. __le32_to_cpu(ev->power_limit),
  4112. __le32_to_cpu(ev->twice_max_rd_power) / 2,
  4113. __le32_to_cpu(ev->num_tx_chain),
  4114. __le32_to_cpu(ev->rate_max));
  4115. }
  4116. static u8
  4117. ath10k_wmi_tpc_final_get_rate(struct ath10k *ar,
  4118. struct wmi_pdev_tpc_final_table_event *ev,
  4119. u32 rate_idx, u32 num_chains,
  4120. u32 rate_code, u8 type, u32 pream_idx)
  4121. {
  4122. u8 tpc, num_streams, preamble, ch, stm_idx;
  4123. s8 pow_agcdd, pow_agstbc, pow_agtxbf;
  4124. int pream;
  4125. num_streams = ATH10K_HW_NSS(rate_code);
  4126. preamble = ATH10K_HW_PREAMBLE(rate_code);
  4127. ch = num_chains - 1;
  4128. stm_idx = num_streams - 1;
  4129. pream = -1;
  4130. if (__le32_to_cpu(ev->chan_freq) <= 2483) {
  4131. switch (pream_idx) {
  4132. case WMI_TPC_PREAM_2GHZ_CCK:
  4133. pream = 0;
  4134. break;
  4135. case WMI_TPC_PREAM_2GHZ_OFDM:
  4136. pream = 1;
  4137. break;
  4138. case WMI_TPC_PREAM_2GHZ_HT20:
  4139. case WMI_TPC_PREAM_2GHZ_VHT20:
  4140. pream = 2;
  4141. break;
  4142. case WMI_TPC_PREAM_2GHZ_HT40:
  4143. case WMI_TPC_PREAM_2GHZ_VHT40:
  4144. pream = 3;
  4145. break;
  4146. case WMI_TPC_PREAM_2GHZ_VHT80:
  4147. pream = 4;
  4148. break;
  4149. default:
  4150. pream = -1;
  4151. break;
  4152. }
  4153. }
  4154. if (__le32_to_cpu(ev->chan_freq) >= 5180) {
  4155. switch (pream_idx) {
  4156. case WMI_TPC_PREAM_5GHZ_OFDM:
  4157. pream = 0;
  4158. break;
  4159. case WMI_TPC_PREAM_5GHZ_HT20:
  4160. case WMI_TPC_PREAM_5GHZ_VHT20:
  4161. pream = 1;
  4162. break;
  4163. case WMI_TPC_PREAM_5GHZ_HT40:
  4164. case WMI_TPC_PREAM_5GHZ_VHT40:
  4165. pream = 2;
  4166. break;
  4167. case WMI_TPC_PREAM_5GHZ_VHT80:
  4168. pream = 3;
  4169. break;
  4170. case WMI_TPC_PREAM_5GHZ_HTCUP:
  4171. pream = 4;
  4172. break;
  4173. default:
  4174. pream = -1;
  4175. break;
  4176. }
  4177. }
  4178. if (pream == 4)
  4179. tpc = min_t(u8, ev->rates_array[rate_idx],
  4180. ev->max_reg_allow_pow[ch]);
  4181. else
  4182. tpc = min_t(u8, min_t(u8, ev->rates_array[rate_idx],
  4183. ev->max_reg_allow_pow[ch]),
  4184. ev->ctl_power_table[0][pream][stm_idx]);
  4185. if (__le32_to_cpu(ev->num_tx_chain) <= 1)
  4186. goto out;
  4187. if (preamble == WMI_RATE_PREAMBLE_CCK)
  4188. goto out;
  4189. if (num_chains <= num_streams)
  4190. goto out;
  4191. switch (type) {
  4192. case WMI_TPC_TABLE_TYPE_STBC:
  4193. pow_agstbc = ev->max_reg_allow_pow_agstbc[ch - 1][stm_idx];
  4194. if (pream == 4)
  4195. tpc = min_t(u8, tpc, pow_agstbc);
  4196. else
  4197. tpc = min_t(u8, min_t(u8, tpc, pow_agstbc),
  4198. ev->ctl_power_table[0][pream][stm_idx]);
  4199. break;
  4200. case WMI_TPC_TABLE_TYPE_TXBF:
  4201. pow_agtxbf = ev->max_reg_allow_pow_agtxbf[ch - 1][stm_idx];
  4202. if (pream == 4)
  4203. tpc = min_t(u8, tpc, pow_agtxbf);
  4204. else
  4205. tpc = min_t(u8, min_t(u8, tpc, pow_agtxbf),
  4206. ev->ctl_power_table[1][pream][stm_idx]);
  4207. break;
  4208. case WMI_TPC_TABLE_TYPE_CDD:
  4209. pow_agcdd = ev->max_reg_allow_pow_agcdd[ch - 1][stm_idx];
  4210. if (pream == 4)
  4211. tpc = min_t(u8, tpc, pow_agcdd);
  4212. else
  4213. tpc = min_t(u8, min_t(u8, tpc, pow_agcdd),
  4214. ev->ctl_power_table[0][pream][stm_idx]);
  4215. break;
  4216. default:
  4217. ath10k_warn(ar, "unknown wmi tpc final table type: %d\n", type);
  4218. tpc = 0;
  4219. break;
  4220. }
  4221. out:
  4222. return tpc;
  4223. }
  4224. static void
  4225. ath10k_wmi_tpc_stats_final_disp_tables(struct ath10k *ar,
  4226. struct wmi_pdev_tpc_final_table_event *ev,
  4227. struct ath10k_tpc_stats_final *tpc_stats,
  4228. u8 *rate_code, u16 *pream_table, u8 type)
  4229. {
  4230. u32 i, j, pream_idx, flags;
  4231. u8 tpc[WMI_TPC_TX_N_CHAIN];
  4232. char tpc_value[WMI_TPC_TX_N_CHAIN * WMI_TPC_BUF_SIZE];
  4233. char buff[WMI_TPC_BUF_SIZE];
  4234. flags = __le32_to_cpu(ev->flags);
  4235. switch (type) {
  4236. case WMI_TPC_TABLE_TYPE_CDD:
  4237. if (!(flags & WMI_TPC_CONFIG_EVENT_FLAG_TABLE_CDD)) {
  4238. ath10k_dbg(ar, ATH10K_DBG_WMI, "CDD not supported\n");
  4239. tpc_stats->flag[type] = ATH10K_TPC_TABLE_TYPE_FLAG;
  4240. return;
  4241. }
  4242. break;
  4243. case WMI_TPC_TABLE_TYPE_STBC:
  4244. if (!(flags & WMI_TPC_CONFIG_EVENT_FLAG_TABLE_STBC)) {
  4245. ath10k_dbg(ar, ATH10K_DBG_WMI, "STBC not supported\n");
  4246. tpc_stats->flag[type] = ATH10K_TPC_TABLE_TYPE_FLAG;
  4247. return;
  4248. }
  4249. break;
  4250. case WMI_TPC_TABLE_TYPE_TXBF:
  4251. if (!(flags & WMI_TPC_CONFIG_EVENT_FLAG_TABLE_TXBF)) {
  4252. ath10k_dbg(ar, ATH10K_DBG_WMI, "TXBF not supported\n");
  4253. tpc_stats->flag[type] = ATH10K_TPC_TABLE_TYPE_FLAG;
  4254. return;
  4255. }
  4256. break;
  4257. default:
  4258. ath10k_dbg(ar, ATH10K_DBG_WMI,
  4259. "invalid table type in wmi tpc event: %d\n", type);
  4260. return;
  4261. }
  4262. pream_idx = 0;
  4263. for (i = 0; i < __le32_to_cpu(ev->rate_max); i++) {
  4264. memset(tpc_value, 0, sizeof(tpc_value));
  4265. memset(buff, 0, sizeof(buff));
  4266. if (i == pream_table[pream_idx])
  4267. pream_idx++;
  4268. for (j = 0; j < WMI_TPC_TX_N_CHAIN; j++) {
  4269. if (j >= __le32_to_cpu(ev->num_tx_chain))
  4270. break;
  4271. tpc[j] = ath10k_wmi_tpc_final_get_rate(ar, ev, i, j + 1,
  4272. rate_code[i],
  4273. type, pream_idx);
  4274. snprintf(buff, sizeof(buff), "%8d ", tpc[j]);
  4275. strlcat(tpc_value, buff, sizeof(tpc_value));
  4276. }
  4277. tpc_stats->tpc_table_final[type].pream_idx[i] = pream_idx;
  4278. tpc_stats->tpc_table_final[type].rate_code[i] = rate_code[i];
  4279. memcpy(tpc_stats->tpc_table_final[type].tpc_value[i],
  4280. tpc_value, sizeof(tpc_value));
  4281. }
  4282. }
  4283. void ath10k_wmi_event_tpc_final_table(struct ath10k *ar, struct sk_buff *skb)
  4284. {
  4285. u32 num_tx_chain;
  4286. u8 rate_code[WMI_TPC_FINAL_RATE_MAX];
  4287. u16 pream_table[WMI_TPC_PREAM_TABLE_MAX];
  4288. struct wmi_pdev_tpc_final_table_event *ev;
  4289. struct ath10k_tpc_stats_final *tpc_stats;
  4290. ev = (struct wmi_pdev_tpc_final_table_event *)skb->data;
  4291. tpc_stats = kzalloc(sizeof(*tpc_stats), GFP_ATOMIC);
  4292. if (!tpc_stats)
  4293. return;
  4294. num_tx_chain = __le32_to_cpu(ev->num_tx_chain);
  4295. ath10k_wmi_tpc_config_get_rate_code(rate_code, pream_table,
  4296. num_tx_chain);
  4297. tpc_stats->chan_freq = __le32_to_cpu(ev->chan_freq);
  4298. tpc_stats->phy_mode = __le32_to_cpu(ev->phy_mode);
  4299. tpc_stats->ctl = __le32_to_cpu(ev->ctl);
  4300. tpc_stats->reg_domain = __le32_to_cpu(ev->reg_domain);
  4301. tpc_stats->twice_antenna_gain = a_sle32_to_cpu(ev->twice_antenna_gain);
  4302. tpc_stats->twice_antenna_reduction =
  4303. __le32_to_cpu(ev->twice_antenna_reduction);
  4304. tpc_stats->power_limit = __le32_to_cpu(ev->power_limit);
  4305. tpc_stats->twice_max_rd_power = __le32_to_cpu(ev->twice_max_rd_power);
  4306. tpc_stats->num_tx_chain = __le32_to_cpu(ev->num_tx_chain);
  4307. tpc_stats->rate_max = __le32_to_cpu(ev->rate_max);
  4308. ath10k_wmi_tpc_stats_final_disp_tables(ar, ev, tpc_stats,
  4309. rate_code, pream_table,
  4310. WMI_TPC_TABLE_TYPE_CDD);
  4311. ath10k_wmi_tpc_stats_final_disp_tables(ar, ev, tpc_stats,
  4312. rate_code, pream_table,
  4313. WMI_TPC_TABLE_TYPE_STBC);
  4314. ath10k_wmi_tpc_stats_final_disp_tables(ar, ev, tpc_stats,
  4315. rate_code, pream_table,
  4316. WMI_TPC_TABLE_TYPE_TXBF);
  4317. ath10k_debug_tpc_stats_final_process(ar, tpc_stats);
  4318. ath10k_dbg(ar, ATH10K_DBG_WMI,
  4319. "wmi event tpc final table channel %d mode %d ctl %d regd %d gain %d %d limit %d max_power %d tx_chanins %d rates %d\n",
  4320. __le32_to_cpu(ev->chan_freq),
  4321. __le32_to_cpu(ev->phy_mode),
  4322. __le32_to_cpu(ev->ctl),
  4323. __le32_to_cpu(ev->reg_domain),
  4324. a_sle32_to_cpu(ev->twice_antenna_gain),
  4325. __le32_to_cpu(ev->twice_antenna_reduction),
  4326. __le32_to_cpu(ev->power_limit),
  4327. __le32_to_cpu(ev->twice_max_rd_power) / 2,
  4328. __le32_to_cpu(ev->num_tx_chain),
  4329. __le32_to_cpu(ev->rate_max));
  4330. }
  4331. static void
  4332. ath10k_wmi_handle_tdls_peer_event(struct ath10k *ar, struct sk_buff *skb)
  4333. {
  4334. struct wmi_tdls_peer_event *ev;
  4335. struct ath10k_peer *peer;
  4336. struct ath10k_vif *arvif;
  4337. int vdev_id;
  4338. int peer_status;
  4339. int peer_reason;
  4340. u8 reason;
  4341. if (skb->len < sizeof(*ev)) {
  4342. ath10k_err(ar, "received tdls peer event with invalid size (%d bytes)\n",
  4343. skb->len);
  4344. return;
  4345. }
  4346. ev = (struct wmi_tdls_peer_event *)skb->data;
  4347. vdev_id = __le32_to_cpu(ev->vdev_id);
  4348. peer_status = __le32_to_cpu(ev->peer_status);
  4349. peer_reason = __le32_to_cpu(ev->peer_reason);
  4350. spin_lock_bh(&ar->data_lock);
  4351. peer = ath10k_peer_find(ar, vdev_id, ev->peer_macaddr.addr);
  4352. spin_unlock_bh(&ar->data_lock);
  4353. if (!peer) {
  4354. ath10k_warn(ar, "failed to find peer entry for %pM\n",
  4355. ev->peer_macaddr.addr);
  4356. return;
  4357. }
  4358. switch (peer_status) {
  4359. case WMI_TDLS_SHOULD_TEARDOWN:
  4360. switch (peer_reason) {
  4361. case WMI_TDLS_TEARDOWN_REASON_PTR_TIMEOUT:
  4362. case WMI_TDLS_TEARDOWN_REASON_NO_RESPONSE:
  4363. case WMI_TDLS_TEARDOWN_REASON_RSSI:
  4364. reason = WLAN_REASON_TDLS_TEARDOWN_UNREACHABLE;
  4365. break;
  4366. default:
  4367. reason = WLAN_REASON_TDLS_TEARDOWN_UNSPECIFIED;
  4368. break;
  4369. }
  4370. arvif = ath10k_get_arvif(ar, vdev_id);
  4371. if (!arvif) {
  4372. ath10k_warn(ar, "received tdls peer event for invalid vdev id %u\n",
  4373. vdev_id);
  4374. return;
  4375. }
  4376. ieee80211_tdls_oper_request(arvif->vif, ev->peer_macaddr.addr,
  4377. NL80211_TDLS_TEARDOWN, reason,
  4378. GFP_ATOMIC);
  4379. ath10k_dbg(ar, ATH10K_DBG_WMI,
  4380. "received tdls teardown event for peer %pM reason %u\n",
  4381. ev->peer_macaddr.addr, peer_reason);
  4382. break;
  4383. default:
  4384. ath10k_dbg(ar, ATH10K_DBG_WMI,
  4385. "received unknown tdls peer event %u\n",
  4386. peer_status);
  4387. break;
  4388. }
  4389. }
  4390. void ath10k_wmi_event_pdev_ftm_intg(struct ath10k *ar, struct sk_buff *skb)
  4391. {
  4392. ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_PDEV_FTM_INTG_EVENTID\n");
  4393. }
  4394. void ath10k_wmi_event_gtk_offload_status(struct ath10k *ar, struct sk_buff *skb)
  4395. {
  4396. ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_GTK_OFFLOAD_STATUS_EVENTID\n");
  4397. }
  4398. void ath10k_wmi_event_gtk_rekey_fail(struct ath10k *ar, struct sk_buff *skb)
  4399. {
  4400. ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_GTK_REKEY_FAIL_EVENTID\n");
  4401. }
  4402. void ath10k_wmi_event_delba_complete(struct ath10k *ar, struct sk_buff *skb)
  4403. {
  4404. ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_TX_DELBA_COMPLETE_EVENTID\n");
  4405. }
  4406. void ath10k_wmi_event_addba_complete(struct ath10k *ar, struct sk_buff *skb)
  4407. {
  4408. ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_TX_ADDBA_COMPLETE_EVENTID\n");
  4409. }
  4410. void ath10k_wmi_event_vdev_install_key_complete(struct ath10k *ar,
  4411. struct sk_buff *skb)
  4412. {
  4413. ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_VDEV_INSTALL_KEY_COMPLETE_EVENTID\n");
  4414. }
  4415. void ath10k_wmi_event_inst_rssi_stats(struct ath10k *ar, struct sk_buff *skb)
  4416. {
  4417. ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_INST_RSSI_STATS_EVENTID\n");
  4418. }
  4419. void ath10k_wmi_event_vdev_standby_req(struct ath10k *ar, struct sk_buff *skb)
  4420. {
  4421. ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_VDEV_STANDBY_REQ_EVENTID\n");
  4422. }
  4423. void ath10k_wmi_event_vdev_resume_req(struct ath10k *ar, struct sk_buff *skb)
  4424. {
  4425. ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_VDEV_RESUME_REQ_EVENTID\n");
  4426. }
  4427. static int ath10k_wmi_alloc_chunk(struct ath10k *ar, u32 req_id,
  4428. u32 num_units, u32 unit_len)
  4429. {
  4430. dma_addr_t paddr;
  4431. u32 pool_size;
  4432. int idx = ar->wmi.num_mem_chunks;
  4433. void *vaddr;
  4434. pool_size = num_units * round_up(unit_len, 4);
  4435. vaddr = dma_zalloc_coherent(ar->dev, pool_size, &paddr, GFP_KERNEL);
  4436. if (!vaddr)
  4437. return -ENOMEM;
  4438. ar->wmi.mem_chunks[idx].vaddr = vaddr;
  4439. ar->wmi.mem_chunks[idx].paddr = paddr;
  4440. ar->wmi.mem_chunks[idx].len = pool_size;
  4441. ar->wmi.mem_chunks[idx].req_id = req_id;
  4442. ar->wmi.num_mem_chunks++;
  4443. return num_units;
  4444. }
  4445. static int ath10k_wmi_alloc_host_mem(struct ath10k *ar, u32 req_id,
  4446. u32 num_units, u32 unit_len)
  4447. {
  4448. int ret;
  4449. while (num_units) {
  4450. ret = ath10k_wmi_alloc_chunk(ar, req_id, num_units, unit_len);
  4451. if (ret < 0)
  4452. return ret;
  4453. num_units -= ret;
  4454. }
  4455. return 0;
  4456. }
  4457. static bool
  4458. ath10k_wmi_is_host_mem_allocated(struct ath10k *ar,
  4459. const struct wlan_host_mem_req **mem_reqs,
  4460. u32 num_mem_reqs)
  4461. {
  4462. u32 req_id, num_units, unit_size, num_unit_info;
  4463. u32 pool_size;
  4464. int i, j;
  4465. bool found;
  4466. if (ar->wmi.num_mem_chunks != num_mem_reqs)
  4467. return false;
  4468. for (i = 0; i < num_mem_reqs; ++i) {
  4469. req_id = __le32_to_cpu(mem_reqs[i]->req_id);
  4470. num_units = __le32_to_cpu(mem_reqs[i]->num_units);
  4471. unit_size = __le32_to_cpu(mem_reqs[i]->unit_size);
  4472. num_unit_info = __le32_to_cpu(mem_reqs[i]->num_unit_info);
  4473. if (num_unit_info & NUM_UNITS_IS_NUM_ACTIVE_PEERS) {
  4474. if (ar->num_active_peers)
  4475. num_units = ar->num_active_peers + 1;
  4476. else
  4477. num_units = ar->max_num_peers + 1;
  4478. } else if (num_unit_info & NUM_UNITS_IS_NUM_PEERS) {
  4479. num_units = ar->max_num_peers + 1;
  4480. } else if (num_unit_info & NUM_UNITS_IS_NUM_VDEVS) {
  4481. num_units = ar->max_num_vdevs + 1;
  4482. }
  4483. found = false;
  4484. for (j = 0; j < ar->wmi.num_mem_chunks; j++) {
  4485. if (ar->wmi.mem_chunks[j].req_id == req_id) {
  4486. pool_size = num_units * round_up(unit_size, 4);
  4487. if (ar->wmi.mem_chunks[j].len == pool_size) {
  4488. found = true;
  4489. break;
  4490. }
  4491. }
  4492. }
  4493. if (!found)
  4494. return false;
  4495. }
  4496. return true;
  4497. }
  4498. static int
  4499. ath10k_wmi_main_op_pull_svc_rdy_ev(struct ath10k *ar, struct sk_buff *skb,
  4500. struct wmi_svc_rdy_ev_arg *arg)
  4501. {
  4502. struct wmi_service_ready_event *ev;
  4503. size_t i, n;
  4504. if (skb->len < sizeof(*ev))
  4505. return -EPROTO;
  4506. ev = (void *)skb->data;
  4507. skb_pull(skb, sizeof(*ev));
  4508. arg->min_tx_power = ev->hw_min_tx_power;
  4509. arg->max_tx_power = ev->hw_max_tx_power;
  4510. arg->ht_cap = ev->ht_cap_info;
  4511. arg->vht_cap = ev->vht_cap_info;
  4512. arg->sw_ver0 = ev->sw_version;
  4513. arg->sw_ver1 = ev->sw_version_1;
  4514. arg->phy_capab = ev->phy_capability;
  4515. arg->num_rf_chains = ev->num_rf_chains;
  4516. arg->eeprom_rd = ev->hal_reg_capabilities.eeprom_rd;
  4517. arg->low_5ghz_chan = ev->hal_reg_capabilities.low_5ghz_chan;
  4518. arg->high_5ghz_chan = ev->hal_reg_capabilities.high_5ghz_chan;
  4519. arg->num_mem_reqs = ev->num_mem_reqs;
  4520. arg->service_map = ev->wmi_service_bitmap;
  4521. arg->service_map_len = sizeof(ev->wmi_service_bitmap);
  4522. n = min_t(size_t, __le32_to_cpu(arg->num_mem_reqs),
  4523. ARRAY_SIZE(arg->mem_reqs));
  4524. for (i = 0; i < n; i++)
  4525. arg->mem_reqs[i] = &ev->mem_reqs[i];
  4526. if (skb->len <
  4527. __le32_to_cpu(arg->num_mem_reqs) * sizeof(arg->mem_reqs[0]))
  4528. return -EPROTO;
  4529. return 0;
  4530. }
  4531. static int
  4532. ath10k_wmi_10x_op_pull_svc_rdy_ev(struct ath10k *ar, struct sk_buff *skb,
  4533. struct wmi_svc_rdy_ev_arg *arg)
  4534. {
  4535. struct wmi_10x_service_ready_event *ev;
  4536. int i, n;
  4537. if (skb->len < sizeof(*ev))
  4538. return -EPROTO;
  4539. ev = (void *)skb->data;
  4540. skb_pull(skb, sizeof(*ev));
  4541. arg->min_tx_power = ev->hw_min_tx_power;
  4542. arg->max_tx_power = ev->hw_max_tx_power;
  4543. arg->ht_cap = ev->ht_cap_info;
  4544. arg->vht_cap = ev->vht_cap_info;
  4545. arg->sw_ver0 = ev->sw_version;
  4546. arg->phy_capab = ev->phy_capability;
  4547. arg->num_rf_chains = ev->num_rf_chains;
  4548. arg->eeprom_rd = ev->hal_reg_capabilities.eeprom_rd;
  4549. arg->low_5ghz_chan = ev->hal_reg_capabilities.low_5ghz_chan;
  4550. arg->high_5ghz_chan = ev->hal_reg_capabilities.high_5ghz_chan;
  4551. arg->num_mem_reqs = ev->num_mem_reqs;
  4552. arg->service_map = ev->wmi_service_bitmap;
  4553. arg->service_map_len = sizeof(ev->wmi_service_bitmap);
  4554. n = min_t(size_t, __le32_to_cpu(arg->num_mem_reqs),
  4555. ARRAY_SIZE(arg->mem_reqs));
  4556. for (i = 0; i < n; i++)
  4557. arg->mem_reqs[i] = &ev->mem_reqs[i];
  4558. if (skb->len <
  4559. __le32_to_cpu(arg->num_mem_reqs) * sizeof(arg->mem_reqs[0]))
  4560. return -EPROTO;
  4561. return 0;
  4562. }
  4563. static void ath10k_wmi_event_service_ready_work(struct work_struct *work)
  4564. {
  4565. struct ath10k *ar = container_of(work, struct ath10k, svc_rdy_work);
  4566. struct sk_buff *skb = ar->svc_rdy_skb;
  4567. struct wmi_svc_rdy_ev_arg arg = {};
  4568. u32 num_units, req_id, unit_size, num_mem_reqs, num_unit_info, i;
  4569. int ret;
  4570. bool allocated;
  4571. if (!skb) {
  4572. ath10k_warn(ar, "invalid service ready event skb\n");
  4573. return;
  4574. }
  4575. ret = ath10k_wmi_pull_svc_rdy(ar, skb, &arg);
  4576. if (ret) {
  4577. ath10k_warn(ar, "failed to parse service ready: %d\n", ret);
  4578. return;
  4579. }
  4580. ath10k_wmi_map_svc(ar, arg.service_map, ar->wmi.svc_map,
  4581. arg.service_map_len);
  4582. ar->hw_min_tx_power = __le32_to_cpu(arg.min_tx_power);
  4583. ar->hw_max_tx_power = __le32_to_cpu(arg.max_tx_power);
  4584. ar->ht_cap_info = __le32_to_cpu(arg.ht_cap);
  4585. ar->vht_cap_info = __le32_to_cpu(arg.vht_cap);
  4586. ar->fw_version_major =
  4587. (__le32_to_cpu(arg.sw_ver0) & 0xff000000) >> 24;
  4588. ar->fw_version_minor = (__le32_to_cpu(arg.sw_ver0) & 0x00ffffff);
  4589. ar->fw_version_release =
  4590. (__le32_to_cpu(arg.sw_ver1) & 0xffff0000) >> 16;
  4591. ar->fw_version_build = (__le32_to_cpu(arg.sw_ver1) & 0x0000ffff);
  4592. ar->phy_capability = __le32_to_cpu(arg.phy_capab);
  4593. ar->num_rf_chains = __le32_to_cpu(arg.num_rf_chains);
  4594. ar->hw_eeprom_rd = __le32_to_cpu(arg.eeprom_rd);
  4595. ar->low_5ghz_chan = __le32_to_cpu(arg.low_5ghz_chan);
  4596. ar->high_5ghz_chan = __le32_to_cpu(arg.high_5ghz_chan);
  4597. ath10k_dbg_dump(ar, ATH10K_DBG_WMI, NULL, "wmi svc: ",
  4598. arg.service_map, arg.service_map_len);
  4599. if (ar->num_rf_chains > ar->max_spatial_stream) {
  4600. ath10k_warn(ar, "hardware advertises support for more spatial streams than it should (%d > %d)\n",
  4601. ar->num_rf_chains, ar->max_spatial_stream);
  4602. ar->num_rf_chains = ar->max_spatial_stream;
  4603. }
  4604. if (!ar->cfg_tx_chainmask) {
  4605. ar->cfg_tx_chainmask = (1 << ar->num_rf_chains) - 1;
  4606. ar->cfg_rx_chainmask = (1 << ar->num_rf_chains) - 1;
  4607. }
  4608. if (strlen(ar->hw->wiphy->fw_version) == 0) {
  4609. snprintf(ar->hw->wiphy->fw_version,
  4610. sizeof(ar->hw->wiphy->fw_version),
  4611. "%u.%u.%u.%u",
  4612. ar->fw_version_major,
  4613. ar->fw_version_minor,
  4614. ar->fw_version_release,
  4615. ar->fw_version_build);
  4616. }
  4617. num_mem_reqs = __le32_to_cpu(arg.num_mem_reqs);
  4618. if (num_mem_reqs > WMI_MAX_MEM_REQS) {
  4619. ath10k_warn(ar, "requested memory chunks number (%d) exceeds the limit\n",
  4620. num_mem_reqs);
  4621. return;
  4622. }
  4623. if (test_bit(WMI_SERVICE_PEER_CACHING, ar->wmi.svc_map)) {
  4624. if (test_bit(ATH10K_FW_FEATURE_PEER_FLOW_CONTROL,
  4625. ar->running_fw->fw_file.fw_features))
  4626. ar->num_active_peers = TARGET_10_4_QCACHE_ACTIVE_PEERS_PFC +
  4627. ar->max_num_vdevs;
  4628. else
  4629. ar->num_active_peers = TARGET_10_4_QCACHE_ACTIVE_PEERS +
  4630. ar->max_num_vdevs;
  4631. ar->max_num_peers = TARGET_10_4_NUM_QCACHE_PEERS_MAX +
  4632. ar->max_num_vdevs;
  4633. ar->num_tids = ar->num_active_peers * 2;
  4634. ar->max_num_stations = TARGET_10_4_NUM_QCACHE_PEERS_MAX;
  4635. }
  4636. /* TODO: Adjust max peer count for cases like WMI_SERVICE_RATECTRL_CACHE
  4637. * and WMI_SERVICE_IRAM_TIDS, etc.
  4638. */
  4639. allocated = ath10k_wmi_is_host_mem_allocated(ar, arg.mem_reqs,
  4640. num_mem_reqs);
  4641. if (allocated)
  4642. goto skip_mem_alloc;
  4643. /* Either this event is received during boot time or there is a change
  4644. * in memory requirement from firmware when compared to last request.
  4645. * Free any old memory and do a fresh allocation based on the current
  4646. * memory requirement.
  4647. */
  4648. ath10k_wmi_free_host_mem(ar);
  4649. for (i = 0; i < num_mem_reqs; ++i) {
  4650. req_id = __le32_to_cpu(arg.mem_reqs[i]->req_id);
  4651. num_units = __le32_to_cpu(arg.mem_reqs[i]->num_units);
  4652. unit_size = __le32_to_cpu(arg.mem_reqs[i]->unit_size);
  4653. num_unit_info = __le32_to_cpu(arg.mem_reqs[i]->num_unit_info);
  4654. if (num_unit_info & NUM_UNITS_IS_NUM_ACTIVE_PEERS) {
  4655. if (ar->num_active_peers)
  4656. num_units = ar->num_active_peers + 1;
  4657. else
  4658. num_units = ar->max_num_peers + 1;
  4659. } else if (num_unit_info & NUM_UNITS_IS_NUM_PEERS) {
  4660. /* number of units to allocate is number of
  4661. * peers, 1 extra for self peer on target
  4662. * this needs to be tied, host and target
  4663. * can get out of sync
  4664. */
  4665. num_units = ar->max_num_peers + 1;
  4666. } else if (num_unit_info & NUM_UNITS_IS_NUM_VDEVS) {
  4667. num_units = ar->max_num_vdevs + 1;
  4668. }
  4669. ath10k_dbg(ar, ATH10K_DBG_WMI,
  4670. "wmi mem_req_id %d num_units %d num_unit_info %d unit size %d actual units %d\n",
  4671. req_id,
  4672. __le32_to_cpu(arg.mem_reqs[i]->num_units),
  4673. num_unit_info,
  4674. unit_size,
  4675. num_units);
  4676. ret = ath10k_wmi_alloc_host_mem(ar, req_id, num_units,
  4677. unit_size);
  4678. if (ret)
  4679. return;
  4680. }
  4681. skip_mem_alloc:
  4682. ath10k_dbg(ar, ATH10K_DBG_WMI,
  4683. "wmi event service ready min_tx_power 0x%08x max_tx_power 0x%08x ht_cap 0x%08x vht_cap 0x%08x sw_ver0 0x%08x sw_ver1 0x%08x fw_build 0x%08x phy_capab 0x%08x num_rf_chains 0x%08x eeprom_rd 0x%08x num_mem_reqs 0x%08x\n",
  4684. __le32_to_cpu(arg.min_tx_power),
  4685. __le32_to_cpu(arg.max_tx_power),
  4686. __le32_to_cpu(arg.ht_cap),
  4687. __le32_to_cpu(arg.vht_cap),
  4688. __le32_to_cpu(arg.sw_ver0),
  4689. __le32_to_cpu(arg.sw_ver1),
  4690. __le32_to_cpu(arg.fw_build),
  4691. __le32_to_cpu(arg.phy_capab),
  4692. __le32_to_cpu(arg.num_rf_chains),
  4693. __le32_to_cpu(arg.eeprom_rd),
  4694. __le32_to_cpu(arg.num_mem_reqs));
  4695. dev_kfree_skb(skb);
  4696. ar->svc_rdy_skb = NULL;
  4697. complete(&ar->wmi.service_ready);
  4698. }
  4699. void ath10k_wmi_event_service_ready(struct ath10k *ar, struct sk_buff *skb)
  4700. {
  4701. ar->svc_rdy_skb = skb;
  4702. queue_work(ar->workqueue_aux, &ar->svc_rdy_work);
  4703. }
  4704. static int ath10k_wmi_op_pull_rdy_ev(struct ath10k *ar, struct sk_buff *skb,
  4705. struct wmi_rdy_ev_arg *arg)
  4706. {
  4707. struct wmi_ready_event *ev = (void *)skb->data;
  4708. if (skb->len < sizeof(*ev))
  4709. return -EPROTO;
  4710. skb_pull(skb, sizeof(*ev));
  4711. arg->sw_version = ev->sw_version;
  4712. arg->abi_version = ev->abi_version;
  4713. arg->status = ev->status;
  4714. arg->mac_addr = ev->mac_addr.addr;
  4715. return 0;
  4716. }
  4717. static int ath10k_wmi_op_pull_roam_ev(struct ath10k *ar, struct sk_buff *skb,
  4718. struct wmi_roam_ev_arg *arg)
  4719. {
  4720. struct wmi_roam_ev *ev = (void *)skb->data;
  4721. if (skb->len < sizeof(*ev))
  4722. return -EPROTO;
  4723. skb_pull(skb, sizeof(*ev));
  4724. arg->vdev_id = ev->vdev_id;
  4725. arg->reason = ev->reason;
  4726. return 0;
  4727. }
  4728. static int ath10k_wmi_op_pull_echo_ev(struct ath10k *ar,
  4729. struct sk_buff *skb,
  4730. struct wmi_echo_ev_arg *arg)
  4731. {
  4732. struct wmi_echo_event *ev = (void *)skb->data;
  4733. arg->value = ev->value;
  4734. return 0;
  4735. }
  4736. int ath10k_wmi_event_ready(struct ath10k *ar, struct sk_buff *skb)
  4737. {
  4738. struct wmi_rdy_ev_arg arg = {};
  4739. int ret;
  4740. ret = ath10k_wmi_pull_rdy(ar, skb, &arg);
  4741. if (ret) {
  4742. ath10k_warn(ar, "failed to parse ready event: %d\n", ret);
  4743. return ret;
  4744. }
  4745. ath10k_dbg(ar, ATH10K_DBG_WMI,
  4746. "wmi event ready sw_version %u abi_version %u mac_addr %pM status %d\n",
  4747. __le32_to_cpu(arg.sw_version),
  4748. __le32_to_cpu(arg.abi_version),
  4749. arg.mac_addr,
  4750. __le32_to_cpu(arg.status));
  4751. ether_addr_copy(ar->mac_addr, arg.mac_addr);
  4752. complete(&ar->wmi.unified_ready);
  4753. return 0;
  4754. }
  4755. void ath10k_wmi_event_service_available(struct ath10k *ar, struct sk_buff *skb)
  4756. {
  4757. int ret;
  4758. struct wmi_svc_avail_ev_arg arg = {};
  4759. ret = ath10k_wmi_pull_svc_avail(ar, skb, &arg);
  4760. if (ret) {
  4761. ath10k_warn(ar, "failed to parse service available event: %d\n",
  4762. ret);
  4763. }
  4764. ath10k_wmi_map_svc_ext(ar, arg.service_map_ext, ar->wmi.svc_map,
  4765. __le32_to_cpu(arg.service_map_ext_len));
  4766. }
  4767. static int ath10k_wmi_event_temperature(struct ath10k *ar, struct sk_buff *skb)
  4768. {
  4769. const struct wmi_pdev_temperature_event *ev;
  4770. ev = (struct wmi_pdev_temperature_event *)skb->data;
  4771. if (WARN_ON(skb->len < sizeof(*ev)))
  4772. return -EPROTO;
  4773. ath10k_thermal_event_temperature(ar, __le32_to_cpu(ev->temperature));
  4774. return 0;
  4775. }
  4776. static int ath10k_wmi_event_pdev_bss_chan_info(struct ath10k *ar,
  4777. struct sk_buff *skb)
  4778. {
  4779. struct wmi_pdev_bss_chan_info_event *ev;
  4780. struct survey_info *survey;
  4781. u64 busy, total, tx, rx, rx_bss;
  4782. u32 freq, noise_floor;
  4783. u32 cc_freq_hz = ar->hw_params.channel_counters_freq_hz;
  4784. int idx;
  4785. ev = (struct wmi_pdev_bss_chan_info_event *)skb->data;
  4786. if (WARN_ON(skb->len < sizeof(*ev)))
  4787. return -EPROTO;
  4788. freq = __le32_to_cpu(ev->freq);
  4789. noise_floor = __le32_to_cpu(ev->noise_floor);
  4790. busy = __le64_to_cpu(ev->cycle_busy);
  4791. total = __le64_to_cpu(ev->cycle_total);
  4792. tx = __le64_to_cpu(ev->cycle_tx);
  4793. rx = __le64_to_cpu(ev->cycle_rx);
  4794. rx_bss = __le64_to_cpu(ev->cycle_rx_bss);
  4795. ath10k_dbg(ar, ATH10K_DBG_WMI,
  4796. "wmi event pdev bss chan info:\n freq: %d noise: %d cycle: busy %llu total %llu tx %llu rx %llu rx_bss %llu\n",
  4797. freq, noise_floor, busy, total, tx, rx, rx_bss);
  4798. spin_lock_bh(&ar->data_lock);
  4799. idx = freq_to_idx(ar, freq);
  4800. if (idx >= ARRAY_SIZE(ar->survey)) {
  4801. ath10k_warn(ar, "bss chan info: invalid frequency %d (idx %d out of bounds)\n",
  4802. freq, idx);
  4803. goto exit;
  4804. }
  4805. survey = &ar->survey[idx];
  4806. survey->noise = noise_floor;
  4807. survey->time = div_u64(total, cc_freq_hz);
  4808. survey->time_busy = div_u64(busy, cc_freq_hz);
  4809. survey->time_rx = div_u64(rx_bss, cc_freq_hz);
  4810. survey->time_tx = div_u64(tx, cc_freq_hz);
  4811. survey->filled |= (SURVEY_INFO_NOISE_DBM |
  4812. SURVEY_INFO_TIME |
  4813. SURVEY_INFO_TIME_BUSY |
  4814. SURVEY_INFO_TIME_RX |
  4815. SURVEY_INFO_TIME_TX);
  4816. exit:
  4817. spin_unlock_bh(&ar->data_lock);
  4818. complete(&ar->bss_survey_done);
  4819. return 0;
  4820. }
  4821. static inline void ath10k_wmi_queue_set_coverage_class_work(struct ath10k *ar)
  4822. {
  4823. if (ar->hw_params.hw_ops->set_coverage_class) {
  4824. spin_lock_bh(&ar->data_lock);
  4825. /* This call only ensures that the modified coverage class
  4826. * persists in case the firmware sets the registers back to
  4827. * their default value. So calling it is only necessary if the
  4828. * coverage class has a non-zero value.
  4829. */
  4830. if (ar->fw_coverage.coverage_class)
  4831. queue_work(ar->workqueue, &ar->set_coverage_class_work);
  4832. spin_unlock_bh(&ar->data_lock);
  4833. }
  4834. }
  4835. static void ath10k_wmi_op_rx(struct ath10k *ar, struct sk_buff *skb)
  4836. {
  4837. struct wmi_cmd_hdr *cmd_hdr;
  4838. enum wmi_event_id id;
  4839. cmd_hdr = (struct wmi_cmd_hdr *)skb->data;
  4840. id = MS(__le32_to_cpu(cmd_hdr->cmd_id), WMI_CMD_HDR_CMD_ID);
  4841. if (skb_pull(skb, sizeof(struct wmi_cmd_hdr)) == NULL)
  4842. goto out;
  4843. trace_ath10k_wmi_event(ar, id, skb->data, skb->len);
  4844. switch (id) {
  4845. case WMI_MGMT_RX_EVENTID:
  4846. ath10k_wmi_event_mgmt_rx(ar, skb);
  4847. /* mgmt_rx() owns the skb now! */
  4848. return;
  4849. case WMI_SCAN_EVENTID:
  4850. ath10k_wmi_event_scan(ar, skb);
  4851. ath10k_wmi_queue_set_coverage_class_work(ar);
  4852. break;
  4853. case WMI_CHAN_INFO_EVENTID:
  4854. ath10k_wmi_event_chan_info(ar, skb);
  4855. break;
  4856. case WMI_ECHO_EVENTID:
  4857. ath10k_wmi_event_echo(ar, skb);
  4858. break;
  4859. case WMI_DEBUG_MESG_EVENTID:
  4860. ath10k_wmi_event_debug_mesg(ar, skb);
  4861. ath10k_wmi_queue_set_coverage_class_work(ar);
  4862. break;
  4863. case WMI_UPDATE_STATS_EVENTID:
  4864. ath10k_wmi_event_update_stats(ar, skb);
  4865. break;
  4866. case WMI_VDEV_START_RESP_EVENTID:
  4867. ath10k_wmi_event_vdev_start_resp(ar, skb);
  4868. ath10k_wmi_queue_set_coverage_class_work(ar);
  4869. break;
  4870. case WMI_VDEV_STOPPED_EVENTID:
  4871. ath10k_wmi_event_vdev_stopped(ar, skb);
  4872. ath10k_wmi_queue_set_coverage_class_work(ar);
  4873. break;
  4874. case WMI_PEER_STA_KICKOUT_EVENTID:
  4875. ath10k_wmi_event_peer_sta_kickout(ar, skb);
  4876. break;
  4877. case WMI_HOST_SWBA_EVENTID:
  4878. ath10k_wmi_event_host_swba(ar, skb);
  4879. break;
  4880. case WMI_TBTTOFFSET_UPDATE_EVENTID:
  4881. ath10k_wmi_event_tbttoffset_update(ar, skb);
  4882. break;
  4883. case WMI_PHYERR_EVENTID:
  4884. ath10k_wmi_event_phyerr(ar, skb);
  4885. break;
  4886. case WMI_ROAM_EVENTID:
  4887. ath10k_wmi_event_roam(ar, skb);
  4888. ath10k_wmi_queue_set_coverage_class_work(ar);
  4889. break;
  4890. case WMI_PROFILE_MATCH:
  4891. ath10k_wmi_event_profile_match(ar, skb);
  4892. break;
  4893. case WMI_DEBUG_PRINT_EVENTID:
  4894. ath10k_wmi_event_debug_print(ar, skb);
  4895. ath10k_wmi_queue_set_coverage_class_work(ar);
  4896. break;
  4897. case WMI_PDEV_QVIT_EVENTID:
  4898. ath10k_wmi_event_pdev_qvit(ar, skb);
  4899. break;
  4900. case WMI_WLAN_PROFILE_DATA_EVENTID:
  4901. ath10k_wmi_event_wlan_profile_data(ar, skb);
  4902. break;
  4903. case WMI_RTT_MEASUREMENT_REPORT_EVENTID:
  4904. ath10k_wmi_event_rtt_measurement_report(ar, skb);
  4905. break;
  4906. case WMI_TSF_MEASUREMENT_REPORT_EVENTID:
  4907. ath10k_wmi_event_tsf_measurement_report(ar, skb);
  4908. break;
  4909. case WMI_RTT_ERROR_REPORT_EVENTID:
  4910. ath10k_wmi_event_rtt_error_report(ar, skb);
  4911. break;
  4912. case WMI_WOW_WAKEUP_HOST_EVENTID:
  4913. ath10k_wmi_event_wow_wakeup_host(ar, skb);
  4914. break;
  4915. case WMI_DCS_INTERFERENCE_EVENTID:
  4916. ath10k_wmi_event_dcs_interference(ar, skb);
  4917. break;
  4918. case WMI_PDEV_TPC_CONFIG_EVENTID:
  4919. ath10k_wmi_event_pdev_tpc_config(ar, skb);
  4920. break;
  4921. case WMI_PDEV_FTM_INTG_EVENTID:
  4922. ath10k_wmi_event_pdev_ftm_intg(ar, skb);
  4923. break;
  4924. case WMI_GTK_OFFLOAD_STATUS_EVENTID:
  4925. ath10k_wmi_event_gtk_offload_status(ar, skb);
  4926. break;
  4927. case WMI_GTK_REKEY_FAIL_EVENTID:
  4928. ath10k_wmi_event_gtk_rekey_fail(ar, skb);
  4929. break;
  4930. case WMI_TX_DELBA_COMPLETE_EVENTID:
  4931. ath10k_wmi_event_delba_complete(ar, skb);
  4932. break;
  4933. case WMI_TX_ADDBA_COMPLETE_EVENTID:
  4934. ath10k_wmi_event_addba_complete(ar, skb);
  4935. break;
  4936. case WMI_VDEV_INSTALL_KEY_COMPLETE_EVENTID:
  4937. ath10k_wmi_event_vdev_install_key_complete(ar, skb);
  4938. break;
  4939. case WMI_SERVICE_READY_EVENTID:
  4940. ath10k_wmi_event_service_ready(ar, skb);
  4941. return;
  4942. case WMI_READY_EVENTID:
  4943. ath10k_wmi_event_ready(ar, skb);
  4944. ath10k_wmi_queue_set_coverage_class_work(ar);
  4945. break;
  4946. case WMI_SERVICE_AVAILABLE_EVENTID:
  4947. ath10k_wmi_event_service_available(ar, skb);
  4948. break;
  4949. default:
  4950. ath10k_warn(ar, "Unknown eventid: %d\n", id);
  4951. break;
  4952. }
  4953. out:
  4954. dev_kfree_skb(skb);
  4955. }
  4956. static void ath10k_wmi_10_1_op_rx(struct ath10k *ar, struct sk_buff *skb)
  4957. {
  4958. struct wmi_cmd_hdr *cmd_hdr;
  4959. enum wmi_10x_event_id id;
  4960. bool consumed;
  4961. cmd_hdr = (struct wmi_cmd_hdr *)skb->data;
  4962. id = MS(__le32_to_cpu(cmd_hdr->cmd_id), WMI_CMD_HDR_CMD_ID);
  4963. if (skb_pull(skb, sizeof(struct wmi_cmd_hdr)) == NULL)
  4964. goto out;
  4965. trace_ath10k_wmi_event(ar, id, skb->data, skb->len);
  4966. consumed = ath10k_tm_event_wmi(ar, id, skb);
  4967. /* Ready event must be handled normally also in UTF mode so that we
  4968. * know the UTF firmware has booted, others we are just bypass WMI
  4969. * events to testmode.
  4970. */
  4971. if (consumed && id != WMI_10X_READY_EVENTID) {
  4972. ath10k_dbg(ar, ATH10K_DBG_WMI,
  4973. "wmi testmode consumed 0x%x\n", id);
  4974. goto out;
  4975. }
  4976. switch (id) {
  4977. case WMI_10X_MGMT_RX_EVENTID:
  4978. ath10k_wmi_event_mgmt_rx(ar, skb);
  4979. /* mgmt_rx() owns the skb now! */
  4980. return;
  4981. case WMI_10X_SCAN_EVENTID:
  4982. ath10k_wmi_event_scan(ar, skb);
  4983. ath10k_wmi_queue_set_coverage_class_work(ar);
  4984. break;
  4985. case WMI_10X_CHAN_INFO_EVENTID:
  4986. ath10k_wmi_event_chan_info(ar, skb);
  4987. break;
  4988. case WMI_10X_ECHO_EVENTID:
  4989. ath10k_wmi_event_echo(ar, skb);
  4990. break;
  4991. case WMI_10X_DEBUG_MESG_EVENTID:
  4992. ath10k_wmi_event_debug_mesg(ar, skb);
  4993. ath10k_wmi_queue_set_coverage_class_work(ar);
  4994. break;
  4995. case WMI_10X_UPDATE_STATS_EVENTID:
  4996. ath10k_wmi_event_update_stats(ar, skb);
  4997. break;
  4998. case WMI_10X_VDEV_START_RESP_EVENTID:
  4999. ath10k_wmi_event_vdev_start_resp(ar, skb);
  5000. ath10k_wmi_queue_set_coverage_class_work(ar);
  5001. break;
  5002. case WMI_10X_VDEV_STOPPED_EVENTID:
  5003. ath10k_wmi_event_vdev_stopped(ar, skb);
  5004. ath10k_wmi_queue_set_coverage_class_work(ar);
  5005. break;
  5006. case WMI_10X_PEER_STA_KICKOUT_EVENTID:
  5007. ath10k_wmi_event_peer_sta_kickout(ar, skb);
  5008. break;
  5009. case WMI_10X_HOST_SWBA_EVENTID:
  5010. ath10k_wmi_event_host_swba(ar, skb);
  5011. break;
  5012. case WMI_10X_TBTTOFFSET_UPDATE_EVENTID:
  5013. ath10k_wmi_event_tbttoffset_update(ar, skb);
  5014. break;
  5015. case WMI_10X_PHYERR_EVENTID:
  5016. ath10k_wmi_event_phyerr(ar, skb);
  5017. break;
  5018. case WMI_10X_ROAM_EVENTID:
  5019. ath10k_wmi_event_roam(ar, skb);
  5020. ath10k_wmi_queue_set_coverage_class_work(ar);
  5021. break;
  5022. case WMI_10X_PROFILE_MATCH:
  5023. ath10k_wmi_event_profile_match(ar, skb);
  5024. break;
  5025. case WMI_10X_DEBUG_PRINT_EVENTID:
  5026. ath10k_wmi_event_debug_print(ar, skb);
  5027. ath10k_wmi_queue_set_coverage_class_work(ar);
  5028. break;
  5029. case WMI_10X_PDEV_QVIT_EVENTID:
  5030. ath10k_wmi_event_pdev_qvit(ar, skb);
  5031. break;
  5032. case WMI_10X_WLAN_PROFILE_DATA_EVENTID:
  5033. ath10k_wmi_event_wlan_profile_data(ar, skb);
  5034. break;
  5035. case WMI_10X_RTT_MEASUREMENT_REPORT_EVENTID:
  5036. ath10k_wmi_event_rtt_measurement_report(ar, skb);
  5037. break;
  5038. case WMI_10X_TSF_MEASUREMENT_REPORT_EVENTID:
  5039. ath10k_wmi_event_tsf_measurement_report(ar, skb);
  5040. break;
  5041. case WMI_10X_RTT_ERROR_REPORT_EVENTID:
  5042. ath10k_wmi_event_rtt_error_report(ar, skb);
  5043. break;
  5044. case WMI_10X_WOW_WAKEUP_HOST_EVENTID:
  5045. ath10k_wmi_event_wow_wakeup_host(ar, skb);
  5046. break;
  5047. case WMI_10X_DCS_INTERFERENCE_EVENTID:
  5048. ath10k_wmi_event_dcs_interference(ar, skb);
  5049. break;
  5050. case WMI_10X_PDEV_TPC_CONFIG_EVENTID:
  5051. ath10k_wmi_event_pdev_tpc_config(ar, skb);
  5052. break;
  5053. case WMI_10X_INST_RSSI_STATS_EVENTID:
  5054. ath10k_wmi_event_inst_rssi_stats(ar, skb);
  5055. break;
  5056. case WMI_10X_VDEV_STANDBY_REQ_EVENTID:
  5057. ath10k_wmi_event_vdev_standby_req(ar, skb);
  5058. break;
  5059. case WMI_10X_VDEV_RESUME_REQ_EVENTID:
  5060. ath10k_wmi_event_vdev_resume_req(ar, skb);
  5061. break;
  5062. case WMI_10X_SERVICE_READY_EVENTID:
  5063. ath10k_wmi_event_service_ready(ar, skb);
  5064. return;
  5065. case WMI_10X_READY_EVENTID:
  5066. ath10k_wmi_event_ready(ar, skb);
  5067. ath10k_wmi_queue_set_coverage_class_work(ar);
  5068. break;
  5069. case WMI_10X_PDEV_UTF_EVENTID:
  5070. /* ignore utf events */
  5071. break;
  5072. default:
  5073. ath10k_warn(ar, "Unknown eventid: %d\n", id);
  5074. break;
  5075. }
  5076. out:
  5077. dev_kfree_skb(skb);
  5078. }
  5079. static void ath10k_wmi_10_2_op_rx(struct ath10k *ar, struct sk_buff *skb)
  5080. {
  5081. struct wmi_cmd_hdr *cmd_hdr;
  5082. enum wmi_10_2_event_id id;
  5083. bool consumed;
  5084. cmd_hdr = (struct wmi_cmd_hdr *)skb->data;
  5085. id = MS(__le32_to_cpu(cmd_hdr->cmd_id), WMI_CMD_HDR_CMD_ID);
  5086. if (skb_pull(skb, sizeof(struct wmi_cmd_hdr)) == NULL)
  5087. goto out;
  5088. trace_ath10k_wmi_event(ar, id, skb->data, skb->len);
  5089. consumed = ath10k_tm_event_wmi(ar, id, skb);
  5090. /* Ready event must be handled normally also in UTF mode so that we
  5091. * know the UTF firmware has booted, others we are just bypass WMI
  5092. * events to testmode.
  5093. */
  5094. if (consumed && id != WMI_10_2_READY_EVENTID) {
  5095. ath10k_dbg(ar, ATH10K_DBG_WMI,
  5096. "wmi testmode consumed 0x%x\n", id);
  5097. goto out;
  5098. }
  5099. switch (id) {
  5100. case WMI_10_2_MGMT_RX_EVENTID:
  5101. ath10k_wmi_event_mgmt_rx(ar, skb);
  5102. /* mgmt_rx() owns the skb now! */
  5103. return;
  5104. case WMI_10_2_SCAN_EVENTID:
  5105. ath10k_wmi_event_scan(ar, skb);
  5106. ath10k_wmi_queue_set_coverage_class_work(ar);
  5107. break;
  5108. case WMI_10_2_CHAN_INFO_EVENTID:
  5109. ath10k_wmi_event_chan_info(ar, skb);
  5110. break;
  5111. case WMI_10_2_ECHO_EVENTID:
  5112. ath10k_wmi_event_echo(ar, skb);
  5113. break;
  5114. case WMI_10_2_DEBUG_MESG_EVENTID:
  5115. ath10k_wmi_event_debug_mesg(ar, skb);
  5116. ath10k_wmi_queue_set_coverage_class_work(ar);
  5117. break;
  5118. case WMI_10_2_UPDATE_STATS_EVENTID:
  5119. ath10k_wmi_event_update_stats(ar, skb);
  5120. break;
  5121. case WMI_10_2_VDEV_START_RESP_EVENTID:
  5122. ath10k_wmi_event_vdev_start_resp(ar, skb);
  5123. ath10k_wmi_queue_set_coverage_class_work(ar);
  5124. break;
  5125. case WMI_10_2_VDEV_STOPPED_EVENTID:
  5126. ath10k_wmi_event_vdev_stopped(ar, skb);
  5127. ath10k_wmi_queue_set_coverage_class_work(ar);
  5128. break;
  5129. case WMI_10_2_PEER_STA_KICKOUT_EVENTID:
  5130. ath10k_wmi_event_peer_sta_kickout(ar, skb);
  5131. break;
  5132. case WMI_10_2_HOST_SWBA_EVENTID:
  5133. ath10k_wmi_event_host_swba(ar, skb);
  5134. break;
  5135. case WMI_10_2_TBTTOFFSET_UPDATE_EVENTID:
  5136. ath10k_wmi_event_tbttoffset_update(ar, skb);
  5137. break;
  5138. case WMI_10_2_PHYERR_EVENTID:
  5139. ath10k_wmi_event_phyerr(ar, skb);
  5140. break;
  5141. case WMI_10_2_ROAM_EVENTID:
  5142. ath10k_wmi_event_roam(ar, skb);
  5143. ath10k_wmi_queue_set_coverage_class_work(ar);
  5144. break;
  5145. case WMI_10_2_PROFILE_MATCH:
  5146. ath10k_wmi_event_profile_match(ar, skb);
  5147. break;
  5148. case WMI_10_2_DEBUG_PRINT_EVENTID:
  5149. ath10k_wmi_event_debug_print(ar, skb);
  5150. ath10k_wmi_queue_set_coverage_class_work(ar);
  5151. break;
  5152. case WMI_10_2_PDEV_QVIT_EVENTID:
  5153. ath10k_wmi_event_pdev_qvit(ar, skb);
  5154. break;
  5155. case WMI_10_2_WLAN_PROFILE_DATA_EVENTID:
  5156. ath10k_wmi_event_wlan_profile_data(ar, skb);
  5157. break;
  5158. case WMI_10_2_RTT_MEASUREMENT_REPORT_EVENTID:
  5159. ath10k_wmi_event_rtt_measurement_report(ar, skb);
  5160. break;
  5161. case WMI_10_2_TSF_MEASUREMENT_REPORT_EVENTID:
  5162. ath10k_wmi_event_tsf_measurement_report(ar, skb);
  5163. break;
  5164. case WMI_10_2_RTT_ERROR_REPORT_EVENTID:
  5165. ath10k_wmi_event_rtt_error_report(ar, skb);
  5166. break;
  5167. case WMI_10_2_WOW_WAKEUP_HOST_EVENTID:
  5168. ath10k_wmi_event_wow_wakeup_host(ar, skb);
  5169. break;
  5170. case WMI_10_2_DCS_INTERFERENCE_EVENTID:
  5171. ath10k_wmi_event_dcs_interference(ar, skb);
  5172. break;
  5173. case WMI_10_2_PDEV_TPC_CONFIG_EVENTID:
  5174. ath10k_wmi_event_pdev_tpc_config(ar, skb);
  5175. break;
  5176. case WMI_10_2_INST_RSSI_STATS_EVENTID:
  5177. ath10k_wmi_event_inst_rssi_stats(ar, skb);
  5178. break;
  5179. case WMI_10_2_VDEV_STANDBY_REQ_EVENTID:
  5180. ath10k_wmi_event_vdev_standby_req(ar, skb);
  5181. ath10k_wmi_queue_set_coverage_class_work(ar);
  5182. break;
  5183. case WMI_10_2_VDEV_RESUME_REQ_EVENTID:
  5184. ath10k_wmi_event_vdev_resume_req(ar, skb);
  5185. ath10k_wmi_queue_set_coverage_class_work(ar);
  5186. break;
  5187. case WMI_10_2_SERVICE_READY_EVENTID:
  5188. ath10k_wmi_event_service_ready(ar, skb);
  5189. return;
  5190. case WMI_10_2_READY_EVENTID:
  5191. ath10k_wmi_event_ready(ar, skb);
  5192. ath10k_wmi_queue_set_coverage_class_work(ar);
  5193. break;
  5194. case WMI_10_2_PDEV_TEMPERATURE_EVENTID:
  5195. ath10k_wmi_event_temperature(ar, skb);
  5196. break;
  5197. case WMI_10_2_PDEV_BSS_CHAN_INFO_EVENTID:
  5198. ath10k_wmi_event_pdev_bss_chan_info(ar, skb);
  5199. break;
  5200. case WMI_10_2_RTT_KEEPALIVE_EVENTID:
  5201. case WMI_10_2_GPIO_INPUT_EVENTID:
  5202. case WMI_10_2_PEER_RATECODE_LIST_EVENTID:
  5203. case WMI_10_2_GENERIC_BUFFER_EVENTID:
  5204. case WMI_10_2_MCAST_BUF_RELEASE_EVENTID:
  5205. case WMI_10_2_MCAST_LIST_AGEOUT_EVENTID:
  5206. case WMI_10_2_WDS_PEER_EVENTID:
  5207. ath10k_dbg(ar, ATH10K_DBG_WMI,
  5208. "received event id %d not implemented\n", id);
  5209. break;
  5210. default:
  5211. ath10k_warn(ar, "Unknown eventid: %d\n", id);
  5212. break;
  5213. }
  5214. out:
  5215. dev_kfree_skb(skb);
  5216. }
  5217. static void ath10k_wmi_10_4_op_rx(struct ath10k *ar, struct sk_buff *skb)
  5218. {
  5219. struct wmi_cmd_hdr *cmd_hdr;
  5220. enum wmi_10_4_event_id id;
  5221. bool consumed;
  5222. cmd_hdr = (struct wmi_cmd_hdr *)skb->data;
  5223. id = MS(__le32_to_cpu(cmd_hdr->cmd_id), WMI_CMD_HDR_CMD_ID);
  5224. if (!skb_pull(skb, sizeof(struct wmi_cmd_hdr)))
  5225. goto out;
  5226. trace_ath10k_wmi_event(ar, id, skb->data, skb->len);
  5227. consumed = ath10k_tm_event_wmi(ar, id, skb);
  5228. /* Ready event must be handled normally also in UTF mode so that we
  5229. * know the UTF firmware has booted, others we are just bypass WMI
  5230. * events to testmode.
  5231. */
  5232. if (consumed && id != WMI_10_4_READY_EVENTID) {
  5233. ath10k_dbg(ar, ATH10K_DBG_WMI,
  5234. "wmi testmode consumed 0x%x\n", id);
  5235. goto out;
  5236. }
  5237. switch (id) {
  5238. case WMI_10_4_MGMT_RX_EVENTID:
  5239. ath10k_wmi_event_mgmt_rx(ar, skb);
  5240. /* mgmt_rx() owns the skb now! */
  5241. return;
  5242. case WMI_10_4_ECHO_EVENTID:
  5243. ath10k_wmi_event_echo(ar, skb);
  5244. break;
  5245. case WMI_10_4_DEBUG_MESG_EVENTID:
  5246. ath10k_wmi_event_debug_mesg(ar, skb);
  5247. ath10k_wmi_queue_set_coverage_class_work(ar);
  5248. break;
  5249. case WMI_10_4_SERVICE_READY_EVENTID:
  5250. ath10k_wmi_event_service_ready(ar, skb);
  5251. return;
  5252. case WMI_10_4_SCAN_EVENTID:
  5253. ath10k_wmi_event_scan(ar, skb);
  5254. ath10k_wmi_queue_set_coverage_class_work(ar);
  5255. break;
  5256. case WMI_10_4_CHAN_INFO_EVENTID:
  5257. ath10k_wmi_event_chan_info(ar, skb);
  5258. break;
  5259. case WMI_10_4_PHYERR_EVENTID:
  5260. ath10k_wmi_event_phyerr(ar, skb);
  5261. break;
  5262. case WMI_10_4_READY_EVENTID:
  5263. ath10k_wmi_event_ready(ar, skb);
  5264. ath10k_wmi_queue_set_coverage_class_work(ar);
  5265. break;
  5266. case WMI_10_4_PEER_STA_KICKOUT_EVENTID:
  5267. ath10k_wmi_event_peer_sta_kickout(ar, skb);
  5268. break;
  5269. case WMI_10_4_ROAM_EVENTID:
  5270. ath10k_wmi_event_roam(ar, skb);
  5271. ath10k_wmi_queue_set_coverage_class_work(ar);
  5272. break;
  5273. case WMI_10_4_HOST_SWBA_EVENTID:
  5274. ath10k_wmi_event_host_swba(ar, skb);
  5275. break;
  5276. case WMI_10_4_TBTTOFFSET_UPDATE_EVENTID:
  5277. ath10k_wmi_event_tbttoffset_update(ar, skb);
  5278. break;
  5279. case WMI_10_4_DEBUG_PRINT_EVENTID:
  5280. ath10k_wmi_event_debug_print(ar, skb);
  5281. ath10k_wmi_queue_set_coverage_class_work(ar);
  5282. break;
  5283. case WMI_10_4_VDEV_START_RESP_EVENTID:
  5284. ath10k_wmi_event_vdev_start_resp(ar, skb);
  5285. ath10k_wmi_queue_set_coverage_class_work(ar);
  5286. break;
  5287. case WMI_10_4_VDEV_STOPPED_EVENTID:
  5288. ath10k_wmi_event_vdev_stopped(ar, skb);
  5289. ath10k_wmi_queue_set_coverage_class_work(ar);
  5290. break;
  5291. case WMI_10_4_WOW_WAKEUP_HOST_EVENTID:
  5292. case WMI_10_4_PEER_RATECODE_LIST_EVENTID:
  5293. case WMI_10_4_WDS_PEER_EVENTID:
  5294. case WMI_10_4_DEBUG_FATAL_CONDITION_EVENTID:
  5295. ath10k_dbg(ar, ATH10K_DBG_WMI,
  5296. "received event id %d not implemented\n", id);
  5297. break;
  5298. case WMI_10_4_UPDATE_STATS_EVENTID:
  5299. ath10k_wmi_event_update_stats(ar, skb);
  5300. break;
  5301. case WMI_10_4_PDEV_TEMPERATURE_EVENTID:
  5302. ath10k_wmi_event_temperature(ar, skb);
  5303. break;
  5304. case WMI_10_4_PDEV_BSS_CHAN_INFO_EVENTID:
  5305. ath10k_wmi_event_pdev_bss_chan_info(ar, skb);
  5306. break;
  5307. case WMI_10_4_PDEV_TPC_CONFIG_EVENTID:
  5308. ath10k_wmi_event_pdev_tpc_config(ar, skb);
  5309. break;
  5310. case WMI_10_4_TDLS_PEER_EVENTID:
  5311. ath10k_wmi_handle_tdls_peer_event(ar, skb);
  5312. break;
  5313. case WMI_10_4_PDEV_TPC_TABLE_EVENTID:
  5314. ath10k_wmi_event_tpc_final_table(ar, skb);
  5315. break;
  5316. case WMI_10_4_DFS_STATUS_CHECK_EVENTID:
  5317. ath10k_wmi_event_dfs_status_check(ar, skb);
  5318. break;
  5319. default:
  5320. ath10k_warn(ar, "Unknown eventid: %d\n", id);
  5321. break;
  5322. }
  5323. out:
  5324. dev_kfree_skb(skb);
  5325. }
  5326. static void ath10k_wmi_process_rx(struct ath10k *ar, struct sk_buff *skb)
  5327. {
  5328. int ret;
  5329. ret = ath10k_wmi_rx(ar, skb);
  5330. if (ret)
  5331. ath10k_warn(ar, "failed to process wmi rx: %d\n", ret);
  5332. }
  5333. int ath10k_wmi_connect(struct ath10k *ar)
  5334. {
  5335. int status;
  5336. struct ath10k_htc_svc_conn_req conn_req;
  5337. struct ath10k_htc_svc_conn_resp conn_resp;
  5338. memset(&ar->wmi.svc_map, 0, sizeof(ar->wmi.svc_map));
  5339. memset(&conn_req, 0, sizeof(conn_req));
  5340. memset(&conn_resp, 0, sizeof(conn_resp));
  5341. /* these fields are the same for all service endpoints */
  5342. conn_req.ep_ops.ep_tx_complete = ath10k_wmi_htc_tx_complete;
  5343. conn_req.ep_ops.ep_rx_complete = ath10k_wmi_process_rx;
  5344. conn_req.ep_ops.ep_tx_credits = ath10k_wmi_op_ep_tx_credits;
  5345. /* connect to control service */
  5346. conn_req.service_id = ATH10K_HTC_SVC_ID_WMI_CONTROL;
  5347. status = ath10k_htc_connect_service(&ar->htc, &conn_req, &conn_resp);
  5348. if (status) {
  5349. ath10k_warn(ar, "failed to connect to WMI CONTROL service status: %d\n",
  5350. status);
  5351. return status;
  5352. }
  5353. ar->wmi.eid = conn_resp.eid;
  5354. return 0;
  5355. }
  5356. static struct sk_buff *
  5357. ath10k_wmi_op_gen_pdev_set_rd(struct ath10k *ar, u16 rd, u16 rd2g, u16 rd5g,
  5358. u16 ctl2g, u16 ctl5g,
  5359. enum wmi_dfs_region dfs_reg)
  5360. {
  5361. struct wmi_pdev_set_regdomain_cmd *cmd;
  5362. struct sk_buff *skb;
  5363. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  5364. if (!skb)
  5365. return ERR_PTR(-ENOMEM);
  5366. cmd = (struct wmi_pdev_set_regdomain_cmd *)skb->data;
  5367. cmd->reg_domain = __cpu_to_le32(rd);
  5368. cmd->reg_domain_2G = __cpu_to_le32(rd2g);
  5369. cmd->reg_domain_5G = __cpu_to_le32(rd5g);
  5370. cmd->conformance_test_limit_2G = __cpu_to_le32(ctl2g);
  5371. cmd->conformance_test_limit_5G = __cpu_to_le32(ctl5g);
  5372. ath10k_dbg(ar, ATH10K_DBG_WMI,
  5373. "wmi pdev regdomain rd %x rd2g %x rd5g %x ctl2g %x ctl5g %x\n",
  5374. rd, rd2g, rd5g, ctl2g, ctl5g);
  5375. return skb;
  5376. }
  5377. static struct sk_buff *
  5378. ath10k_wmi_10x_op_gen_pdev_set_rd(struct ath10k *ar, u16 rd, u16 rd2g, u16
  5379. rd5g, u16 ctl2g, u16 ctl5g,
  5380. enum wmi_dfs_region dfs_reg)
  5381. {
  5382. struct wmi_pdev_set_regdomain_cmd_10x *cmd;
  5383. struct sk_buff *skb;
  5384. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  5385. if (!skb)
  5386. return ERR_PTR(-ENOMEM);
  5387. cmd = (struct wmi_pdev_set_regdomain_cmd_10x *)skb->data;
  5388. cmd->reg_domain = __cpu_to_le32(rd);
  5389. cmd->reg_domain_2G = __cpu_to_le32(rd2g);
  5390. cmd->reg_domain_5G = __cpu_to_le32(rd5g);
  5391. cmd->conformance_test_limit_2G = __cpu_to_le32(ctl2g);
  5392. cmd->conformance_test_limit_5G = __cpu_to_le32(ctl5g);
  5393. cmd->dfs_domain = __cpu_to_le32(dfs_reg);
  5394. ath10k_dbg(ar, ATH10K_DBG_WMI,
  5395. "wmi pdev regdomain rd %x rd2g %x rd5g %x ctl2g %x ctl5g %x dfs_region %x\n",
  5396. rd, rd2g, rd5g, ctl2g, ctl5g, dfs_reg);
  5397. return skb;
  5398. }
  5399. static struct sk_buff *
  5400. ath10k_wmi_op_gen_pdev_suspend(struct ath10k *ar, u32 suspend_opt)
  5401. {
  5402. struct wmi_pdev_suspend_cmd *cmd;
  5403. struct sk_buff *skb;
  5404. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  5405. if (!skb)
  5406. return ERR_PTR(-ENOMEM);
  5407. cmd = (struct wmi_pdev_suspend_cmd *)skb->data;
  5408. cmd->suspend_opt = __cpu_to_le32(suspend_opt);
  5409. return skb;
  5410. }
  5411. static struct sk_buff *
  5412. ath10k_wmi_op_gen_pdev_resume(struct ath10k *ar)
  5413. {
  5414. struct sk_buff *skb;
  5415. skb = ath10k_wmi_alloc_skb(ar, 0);
  5416. if (!skb)
  5417. return ERR_PTR(-ENOMEM);
  5418. return skb;
  5419. }
  5420. static struct sk_buff *
  5421. ath10k_wmi_op_gen_pdev_set_param(struct ath10k *ar, u32 id, u32 value)
  5422. {
  5423. struct wmi_pdev_set_param_cmd *cmd;
  5424. struct sk_buff *skb;
  5425. if (id == WMI_PDEV_PARAM_UNSUPPORTED) {
  5426. ath10k_warn(ar, "pdev param %d not supported by firmware\n",
  5427. id);
  5428. return ERR_PTR(-EOPNOTSUPP);
  5429. }
  5430. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  5431. if (!skb)
  5432. return ERR_PTR(-ENOMEM);
  5433. cmd = (struct wmi_pdev_set_param_cmd *)skb->data;
  5434. cmd->param_id = __cpu_to_le32(id);
  5435. cmd->param_value = __cpu_to_le32(value);
  5436. ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi pdev set param %d value %d\n",
  5437. id, value);
  5438. return skb;
  5439. }
  5440. void ath10k_wmi_put_host_mem_chunks(struct ath10k *ar,
  5441. struct wmi_host_mem_chunks *chunks)
  5442. {
  5443. struct host_memory_chunk *chunk;
  5444. int i;
  5445. chunks->count = __cpu_to_le32(ar->wmi.num_mem_chunks);
  5446. for (i = 0; i < ar->wmi.num_mem_chunks; i++) {
  5447. chunk = &chunks->items[i];
  5448. chunk->ptr = __cpu_to_le32(ar->wmi.mem_chunks[i].paddr);
  5449. chunk->size = __cpu_to_le32(ar->wmi.mem_chunks[i].len);
  5450. chunk->req_id = __cpu_to_le32(ar->wmi.mem_chunks[i].req_id);
  5451. ath10k_dbg(ar, ATH10K_DBG_WMI,
  5452. "wmi chunk %d len %d requested, addr 0x%llx\n",
  5453. i,
  5454. ar->wmi.mem_chunks[i].len,
  5455. (unsigned long long)ar->wmi.mem_chunks[i].paddr);
  5456. }
  5457. }
  5458. static struct sk_buff *ath10k_wmi_op_gen_init(struct ath10k *ar)
  5459. {
  5460. struct wmi_init_cmd *cmd;
  5461. struct sk_buff *buf;
  5462. struct wmi_resource_config config = {};
  5463. u32 len, val;
  5464. config.num_vdevs = __cpu_to_le32(TARGET_NUM_VDEVS);
  5465. config.num_peers = __cpu_to_le32(TARGET_NUM_PEERS);
  5466. config.num_offload_peers = __cpu_to_le32(TARGET_NUM_OFFLOAD_PEERS);
  5467. config.num_offload_reorder_bufs =
  5468. __cpu_to_le32(TARGET_NUM_OFFLOAD_REORDER_BUFS);
  5469. config.num_peer_keys = __cpu_to_le32(TARGET_NUM_PEER_KEYS);
  5470. config.num_tids = __cpu_to_le32(TARGET_NUM_TIDS);
  5471. config.ast_skid_limit = __cpu_to_le32(TARGET_AST_SKID_LIMIT);
  5472. config.tx_chain_mask = __cpu_to_le32(TARGET_TX_CHAIN_MASK);
  5473. config.rx_chain_mask = __cpu_to_le32(TARGET_RX_CHAIN_MASK);
  5474. config.rx_timeout_pri_vo = __cpu_to_le32(TARGET_RX_TIMEOUT_LO_PRI);
  5475. config.rx_timeout_pri_vi = __cpu_to_le32(TARGET_RX_TIMEOUT_LO_PRI);
  5476. config.rx_timeout_pri_be = __cpu_to_le32(TARGET_RX_TIMEOUT_LO_PRI);
  5477. config.rx_timeout_pri_bk = __cpu_to_le32(TARGET_RX_TIMEOUT_HI_PRI);
  5478. config.rx_decap_mode = __cpu_to_le32(ar->wmi.rx_decap_mode);
  5479. config.scan_max_pending_reqs =
  5480. __cpu_to_le32(TARGET_SCAN_MAX_PENDING_REQS);
  5481. config.bmiss_offload_max_vdev =
  5482. __cpu_to_le32(TARGET_BMISS_OFFLOAD_MAX_VDEV);
  5483. config.roam_offload_max_vdev =
  5484. __cpu_to_le32(TARGET_ROAM_OFFLOAD_MAX_VDEV);
  5485. config.roam_offload_max_ap_profiles =
  5486. __cpu_to_le32(TARGET_ROAM_OFFLOAD_MAX_AP_PROFILES);
  5487. config.num_mcast_groups = __cpu_to_le32(TARGET_NUM_MCAST_GROUPS);
  5488. config.num_mcast_table_elems =
  5489. __cpu_to_le32(TARGET_NUM_MCAST_TABLE_ELEMS);
  5490. config.mcast2ucast_mode = __cpu_to_le32(TARGET_MCAST2UCAST_MODE);
  5491. config.tx_dbg_log_size = __cpu_to_le32(TARGET_TX_DBG_LOG_SIZE);
  5492. config.num_wds_entries = __cpu_to_le32(TARGET_NUM_WDS_ENTRIES);
  5493. config.dma_burst_size = __cpu_to_le32(TARGET_DMA_BURST_SIZE);
  5494. config.mac_aggr_delim = __cpu_to_le32(TARGET_MAC_AGGR_DELIM);
  5495. val = TARGET_RX_SKIP_DEFRAG_TIMEOUT_DUP_DETECTION_CHECK;
  5496. config.rx_skip_defrag_timeout_dup_detection_check = __cpu_to_le32(val);
  5497. config.vow_config = __cpu_to_le32(TARGET_VOW_CONFIG);
  5498. config.gtk_offload_max_vdev =
  5499. __cpu_to_le32(TARGET_GTK_OFFLOAD_MAX_VDEV);
  5500. config.num_msdu_desc = __cpu_to_le32(TARGET_NUM_MSDU_DESC);
  5501. config.max_frag_entries = __cpu_to_le32(TARGET_MAX_FRAG_ENTRIES);
  5502. len = sizeof(*cmd) +
  5503. (sizeof(struct host_memory_chunk) * ar->wmi.num_mem_chunks);
  5504. buf = ath10k_wmi_alloc_skb(ar, len);
  5505. if (!buf)
  5506. return ERR_PTR(-ENOMEM);
  5507. cmd = (struct wmi_init_cmd *)buf->data;
  5508. memcpy(&cmd->resource_config, &config, sizeof(config));
  5509. ath10k_wmi_put_host_mem_chunks(ar, &cmd->mem_chunks);
  5510. ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi init\n");
  5511. return buf;
  5512. }
  5513. static struct sk_buff *ath10k_wmi_10_1_op_gen_init(struct ath10k *ar)
  5514. {
  5515. struct wmi_init_cmd_10x *cmd;
  5516. struct sk_buff *buf;
  5517. struct wmi_resource_config_10x config = {};
  5518. u32 len, val;
  5519. config.num_vdevs = __cpu_to_le32(TARGET_10X_NUM_VDEVS);
  5520. config.num_peers = __cpu_to_le32(TARGET_10X_NUM_PEERS);
  5521. config.num_peer_keys = __cpu_to_le32(TARGET_10X_NUM_PEER_KEYS);
  5522. config.num_tids = __cpu_to_le32(TARGET_10X_NUM_TIDS);
  5523. config.ast_skid_limit = __cpu_to_le32(TARGET_10X_AST_SKID_LIMIT);
  5524. config.tx_chain_mask = __cpu_to_le32(TARGET_10X_TX_CHAIN_MASK);
  5525. config.rx_chain_mask = __cpu_to_le32(TARGET_10X_RX_CHAIN_MASK);
  5526. config.rx_timeout_pri_vo = __cpu_to_le32(TARGET_10X_RX_TIMEOUT_LO_PRI);
  5527. config.rx_timeout_pri_vi = __cpu_to_le32(TARGET_10X_RX_TIMEOUT_LO_PRI);
  5528. config.rx_timeout_pri_be = __cpu_to_le32(TARGET_10X_RX_TIMEOUT_LO_PRI);
  5529. config.rx_timeout_pri_bk = __cpu_to_le32(TARGET_10X_RX_TIMEOUT_HI_PRI);
  5530. config.rx_decap_mode = __cpu_to_le32(ar->wmi.rx_decap_mode);
  5531. config.scan_max_pending_reqs =
  5532. __cpu_to_le32(TARGET_10X_SCAN_MAX_PENDING_REQS);
  5533. config.bmiss_offload_max_vdev =
  5534. __cpu_to_le32(TARGET_10X_BMISS_OFFLOAD_MAX_VDEV);
  5535. config.roam_offload_max_vdev =
  5536. __cpu_to_le32(TARGET_10X_ROAM_OFFLOAD_MAX_VDEV);
  5537. config.roam_offload_max_ap_profiles =
  5538. __cpu_to_le32(TARGET_10X_ROAM_OFFLOAD_MAX_AP_PROFILES);
  5539. config.num_mcast_groups = __cpu_to_le32(TARGET_10X_NUM_MCAST_GROUPS);
  5540. config.num_mcast_table_elems =
  5541. __cpu_to_le32(TARGET_10X_NUM_MCAST_TABLE_ELEMS);
  5542. config.mcast2ucast_mode = __cpu_to_le32(TARGET_10X_MCAST2UCAST_MODE);
  5543. config.tx_dbg_log_size = __cpu_to_le32(TARGET_10X_TX_DBG_LOG_SIZE);
  5544. config.num_wds_entries = __cpu_to_le32(TARGET_10X_NUM_WDS_ENTRIES);
  5545. config.dma_burst_size = __cpu_to_le32(TARGET_10X_DMA_BURST_SIZE);
  5546. config.mac_aggr_delim = __cpu_to_le32(TARGET_10X_MAC_AGGR_DELIM);
  5547. val = TARGET_10X_RX_SKIP_DEFRAG_TIMEOUT_DUP_DETECTION_CHECK;
  5548. config.rx_skip_defrag_timeout_dup_detection_check = __cpu_to_le32(val);
  5549. config.vow_config = __cpu_to_le32(TARGET_10X_VOW_CONFIG);
  5550. config.num_msdu_desc = __cpu_to_le32(TARGET_10X_NUM_MSDU_DESC);
  5551. config.max_frag_entries = __cpu_to_le32(TARGET_10X_MAX_FRAG_ENTRIES);
  5552. len = sizeof(*cmd) +
  5553. (sizeof(struct host_memory_chunk) * ar->wmi.num_mem_chunks);
  5554. buf = ath10k_wmi_alloc_skb(ar, len);
  5555. if (!buf)
  5556. return ERR_PTR(-ENOMEM);
  5557. cmd = (struct wmi_init_cmd_10x *)buf->data;
  5558. memcpy(&cmd->resource_config, &config, sizeof(config));
  5559. ath10k_wmi_put_host_mem_chunks(ar, &cmd->mem_chunks);
  5560. ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi init 10x\n");
  5561. return buf;
  5562. }
  5563. static struct sk_buff *ath10k_wmi_10_2_op_gen_init(struct ath10k *ar)
  5564. {
  5565. struct wmi_init_cmd_10_2 *cmd;
  5566. struct sk_buff *buf;
  5567. struct wmi_resource_config_10x config = {};
  5568. u32 len, val, features;
  5569. config.num_vdevs = __cpu_to_le32(TARGET_10X_NUM_VDEVS);
  5570. config.num_peer_keys = __cpu_to_le32(TARGET_10X_NUM_PEER_KEYS);
  5571. if (ath10k_peer_stats_enabled(ar)) {
  5572. config.num_peers = __cpu_to_le32(TARGET_10X_TX_STATS_NUM_PEERS);
  5573. config.num_tids = __cpu_to_le32(TARGET_10X_TX_STATS_NUM_TIDS);
  5574. } else {
  5575. config.num_peers = __cpu_to_le32(TARGET_10X_NUM_PEERS);
  5576. config.num_tids = __cpu_to_le32(TARGET_10X_NUM_TIDS);
  5577. }
  5578. config.ast_skid_limit = __cpu_to_le32(TARGET_10X_AST_SKID_LIMIT);
  5579. config.tx_chain_mask = __cpu_to_le32(TARGET_10X_TX_CHAIN_MASK);
  5580. config.rx_chain_mask = __cpu_to_le32(TARGET_10X_RX_CHAIN_MASK);
  5581. config.rx_timeout_pri_vo = __cpu_to_le32(TARGET_10X_RX_TIMEOUT_LO_PRI);
  5582. config.rx_timeout_pri_vi = __cpu_to_le32(TARGET_10X_RX_TIMEOUT_LO_PRI);
  5583. config.rx_timeout_pri_be = __cpu_to_le32(TARGET_10X_RX_TIMEOUT_LO_PRI);
  5584. config.rx_timeout_pri_bk = __cpu_to_le32(TARGET_10X_RX_TIMEOUT_HI_PRI);
  5585. config.rx_decap_mode = __cpu_to_le32(ar->wmi.rx_decap_mode);
  5586. config.scan_max_pending_reqs =
  5587. __cpu_to_le32(TARGET_10X_SCAN_MAX_PENDING_REQS);
  5588. config.bmiss_offload_max_vdev =
  5589. __cpu_to_le32(TARGET_10X_BMISS_OFFLOAD_MAX_VDEV);
  5590. config.roam_offload_max_vdev =
  5591. __cpu_to_le32(TARGET_10X_ROAM_OFFLOAD_MAX_VDEV);
  5592. config.roam_offload_max_ap_profiles =
  5593. __cpu_to_le32(TARGET_10X_ROAM_OFFLOAD_MAX_AP_PROFILES);
  5594. config.num_mcast_groups = __cpu_to_le32(TARGET_10X_NUM_MCAST_GROUPS);
  5595. config.num_mcast_table_elems =
  5596. __cpu_to_le32(TARGET_10X_NUM_MCAST_TABLE_ELEMS);
  5597. config.mcast2ucast_mode = __cpu_to_le32(TARGET_10X_MCAST2UCAST_MODE);
  5598. config.tx_dbg_log_size = __cpu_to_le32(TARGET_10X_TX_DBG_LOG_SIZE);
  5599. config.num_wds_entries = __cpu_to_le32(TARGET_10X_NUM_WDS_ENTRIES);
  5600. config.dma_burst_size = __cpu_to_le32(TARGET_10_2_DMA_BURST_SIZE);
  5601. config.mac_aggr_delim = __cpu_to_le32(TARGET_10X_MAC_AGGR_DELIM);
  5602. val = TARGET_10X_RX_SKIP_DEFRAG_TIMEOUT_DUP_DETECTION_CHECK;
  5603. config.rx_skip_defrag_timeout_dup_detection_check = __cpu_to_le32(val);
  5604. config.vow_config = __cpu_to_le32(TARGET_10X_VOW_CONFIG);
  5605. config.num_msdu_desc = __cpu_to_le32(TARGET_10X_NUM_MSDU_DESC);
  5606. config.max_frag_entries = __cpu_to_le32(TARGET_10X_MAX_FRAG_ENTRIES);
  5607. len = sizeof(*cmd) +
  5608. (sizeof(struct host_memory_chunk) * ar->wmi.num_mem_chunks);
  5609. buf = ath10k_wmi_alloc_skb(ar, len);
  5610. if (!buf)
  5611. return ERR_PTR(-ENOMEM);
  5612. cmd = (struct wmi_init_cmd_10_2 *)buf->data;
  5613. features = WMI_10_2_RX_BATCH_MODE;
  5614. if (test_bit(ATH10K_FLAG_BTCOEX, &ar->dev_flags) &&
  5615. test_bit(WMI_SERVICE_COEX_GPIO, ar->wmi.svc_map))
  5616. features |= WMI_10_2_COEX_GPIO;
  5617. if (ath10k_peer_stats_enabled(ar))
  5618. features |= WMI_10_2_PEER_STATS;
  5619. if (test_bit(WMI_SERVICE_BSS_CHANNEL_INFO_64, ar->wmi.svc_map))
  5620. features |= WMI_10_2_BSS_CHAN_INFO;
  5621. cmd->resource_config.feature_mask = __cpu_to_le32(features);
  5622. memcpy(&cmd->resource_config.common, &config, sizeof(config));
  5623. ath10k_wmi_put_host_mem_chunks(ar, &cmd->mem_chunks);
  5624. ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi init 10.2\n");
  5625. return buf;
  5626. }
  5627. static struct sk_buff *ath10k_wmi_10_4_op_gen_init(struct ath10k *ar)
  5628. {
  5629. struct wmi_init_cmd_10_4 *cmd;
  5630. struct sk_buff *buf;
  5631. struct wmi_resource_config_10_4 config = {};
  5632. u32 len;
  5633. config.num_vdevs = __cpu_to_le32(ar->max_num_vdevs);
  5634. config.num_peers = __cpu_to_le32(ar->max_num_peers);
  5635. config.num_active_peers = __cpu_to_le32(ar->num_active_peers);
  5636. config.num_tids = __cpu_to_le32(ar->num_tids);
  5637. config.num_offload_peers = __cpu_to_le32(TARGET_10_4_NUM_OFFLOAD_PEERS);
  5638. config.num_offload_reorder_buffs =
  5639. __cpu_to_le32(TARGET_10_4_NUM_OFFLOAD_REORDER_BUFFS);
  5640. config.num_peer_keys = __cpu_to_le32(TARGET_10_4_NUM_PEER_KEYS);
  5641. config.ast_skid_limit = __cpu_to_le32(TARGET_10_4_AST_SKID_LIMIT);
  5642. config.tx_chain_mask = __cpu_to_le32(ar->hw_params.tx_chain_mask);
  5643. config.rx_chain_mask = __cpu_to_le32(ar->hw_params.rx_chain_mask);
  5644. config.rx_timeout_pri[0] = __cpu_to_le32(TARGET_10_4_RX_TIMEOUT_LO_PRI);
  5645. config.rx_timeout_pri[1] = __cpu_to_le32(TARGET_10_4_RX_TIMEOUT_LO_PRI);
  5646. config.rx_timeout_pri[2] = __cpu_to_le32(TARGET_10_4_RX_TIMEOUT_LO_PRI);
  5647. config.rx_timeout_pri[3] = __cpu_to_le32(TARGET_10_4_RX_TIMEOUT_HI_PRI);
  5648. config.rx_decap_mode = __cpu_to_le32(ar->wmi.rx_decap_mode);
  5649. config.scan_max_pending_req = __cpu_to_le32(TARGET_10_4_SCAN_MAX_REQS);
  5650. config.bmiss_offload_max_vdev =
  5651. __cpu_to_le32(TARGET_10_4_BMISS_OFFLOAD_MAX_VDEV);
  5652. config.roam_offload_max_vdev =
  5653. __cpu_to_le32(TARGET_10_4_ROAM_OFFLOAD_MAX_VDEV);
  5654. config.roam_offload_max_ap_profiles =
  5655. __cpu_to_le32(TARGET_10_4_ROAM_OFFLOAD_MAX_PROFILES);
  5656. config.num_mcast_groups = __cpu_to_le32(TARGET_10_4_NUM_MCAST_GROUPS);
  5657. config.num_mcast_table_elems =
  5658. __cpu_to_le32(TARGET_10_4_NUM_MCAST_TABLE_ELEMS);
  5659. config.mcast2ucast_mode = __cpu_to_le32(TARGET_10_4_MCAST2UCAST_MODE);
  5660. config.tx_dbg_log_size = __cpu_to_le32(TARGET_10_4_TX_DBG_LOG_SIZE);
  5661. config.num_wds_entries = __cpu_to_le32(TARGET_10_4_NUM_WDS_ENTRIES);
  5662. config.dma_burst_size = __cpu_to_le32(TARGET_10_4_DMA_BURST_SIZE);
  5663. config.mac_aggr_delim = __cpu_to_le32(TARGET_10_4_MAC_AGGR_DELIM);
  5664. config.rx_skip_defrag_timeout_dup_detection_check =
  5665. __cpu_to_le32(TARGET_10_4_RX_SKIP_DEFRAG_TIMEOUT_DUP_DETECTION_CHECK);
  5666. config.vow_config = __cpu_to_le32(TARGET_10_4_VOW_CONFIG);
  5667. config.gtk_offload_max_vdev =
  5668. __cpu_to_le32(TARGET_10_4_GTK_OFFLOAD_MAX_VDEV);
  5669. config.num_msdu_desc = __cpu_to_le32(ar->htt.max_num_pending_tx);
  5670. config.max_frag_entries = __cpu_to_le32(TARGET_10_4_11AC_TX_MAX_FRAGS);
  5671. config.max_peer_ext_stats =
  5672. __cpu_to_le32(TARGET_10_4_MAX_PEER_EXT_STATS);
  5673. config.smart_ant_cap = __cpu_to_le32(TARGET_10_4_SMART_ANT_CAP);
  5674. config.bk_minfree = __cpu_to_le32(TARGET_10_4_BK_MIN_FREE);
  5675. config.be_minfree = __cpu_to_le32(TARGET_10_4_BE_MIN_FREE);
  5676. config.vi_minfree = __cpu_to_le32(TARGET_10_4_VI_MIN_FREE);
  5677. config.vo_minfree = __cpu_to_le32(TARGET_10_4_VO_MIN_FREE);
  5678. config.rx_batchmode = __cpu_to_le32(TARGET_10_4_RX_BATCH_MODE);
  5679. config.tt_support =
  5680. __cpu_to_le32(TARGET_10_4_THERMAL_THROTTLING_CONFIG);
  5681. config.atf_config = __cpu_to_le32(TARGET_10_4_ATF_CONFIG);
  5682. config.iphdr_pad_config = __cpu_to_le32(TARGET_10_4_IPHDR_PAD_CONFIG);
  5683. config.qwrap_config = __cpu_to_le32(TARGET_10_4_QWRAP_CONFIG);
  5684. len = sizeof(*cmd) +
  5685. (sizeof(struct host_memory_chunk) * ar->wmi.num_mem_chunks);
  5686. buf = ath10k_wmi_alloc_skb(ar, len);
  5687. if (!buf)
  5688. return ERR_PTR(-ENOMEM);
  5689. cmd = (struct wmi_init_cmd_10_4 *)buf->data;
  5690. memcpy(&cmd->resource_config, &config, sizeof(config));
  5691. ath10k_wmi_put_host_mem_chunks(ar, &cmd->mem_chunks);
  5692. ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi init 10.4\n");
  5693. return buf;
  5694. }
  5695. int ath10k_wmi_start_scan_verify(const struct wmi_start_scan_arg *arg)
  5696. {
  5697. if (arg->ie_len > WLAN_SCAN_PARAMS_MAX_IE_LEN)
  5698. return -EINVAL;
  5699. if (arg->n_channels > ARRAY_SIZE(arg->channels))
  5700. return -EINVAL;
  5701. if (arg->n_ssids > WLAN_SCAN_PARAMS_MAX_SSID)
  5702. return -EINVAL;
  5703. if (arg->n_bssids > WLAN_SCAN_PARAMS_MAX_BSSID)
  5704. return -EINVAL;
  5705. return 0;
  5706. }
  5707. static size_t
  5708. ath10k_wmi_start_scan_tlvs_len(const struct wmi_start_scan_arg *arg)
  5709. {
  5710. int len = 0;
  5711. if (arg->ie_len) {
  5712. len += sizeof(struct wmi_ie_data);
  5713. len += roundup(arg->ie_len, 4);
  5714. }
  5715. if (arg->n_channels) {
  5716. len += sizeof(struct wmi_chan_list);
  5717. len += sizeof(__le32) * arg->n_channels;
  5718. }
  5719. if (arg->n_ssids) {
  5720. len += sizeof(struct wmi_ssid_list);
  5721. len += sizeof(struct wmi_ssid) * arg->n_ssids;
  5722. }
  5723. if (arg->n_bssids) {
  5724. len += sizeof(struct wmi_bssid_list);
  5725. len += sizeof(struct wmi_mac_addr) * arg->n_bssids;
  5726. }
  5727. return len;
  5728. }
  5729. void ath10k_wmi_put_start_scan_common(struct wmi_start_scan_common *cmn,
  5730. const struct wmi_start_scan_arg *arg)
  5731. {
  5732. u32 scan_id;
  5733. u32 scan_req_id;
  5734. scan_id = WMI_HOST_SCAN_REQ_ID_PREFIX;
  5735. scan_id |= arg->scan_id;
  5736. scan_req_id = WMI_HOST_SCAN_REQUESTOR_ID_PREFIX;
  5737. scan_req_id |= arg->scan_req_id;
  5738. cmn->scan_id = __cpu_to_le32(scan_id);
  5739. cmn->scan_req_id = __cpu_to_le32(scan_req_id);
  5740. cmn->vdev_id = __cpu_to_le32(arg->vdev_id);
  5741. cmn->scan_priority = __cpu_to_le32(arg->scan_priority);
  5742. cmn->notify_scan_events = __cpu_to_le32(arg->notify_scan_events);
  5743. cmn->dwell_time_active = __cpu_to_le32(arg->dwell_time_active);
  5744. cmn->dwell_time_passive = __cpu_to_le32(arg->dwell_time_passive);
  5745. cmn->min_rest_time = __cpu_to_le32(arg->min_rest_time);
  5746. cmn->max_rest_time = __cpu_to_le32(arg->max_rest_time);
  5747. cmn->repeat_probe_time = __cpu_to_le32(arg->repeat_probe_time);
  5748. cmn->probe_spacing_time = __cpu_to_le32(arg->probe_spacing_time);
  5749. cmn->idle_time = __cpu_to_le32(arg->idle_time);
  5750. cmn->max_scan_time = __cpu_to_le32(arg->max_scan_time);
  5751. cmn->probe_delay = __cpu_to_le32(arg->probe_delay);
  5752. cmn->scan_ctrl_flags = __cpu_to_le32(arg->scan_ctrl_flags);
  5753. }
  5754. static void
  5755. ath10k_wmi_put_start_scan_tlvs(struct wmi_start_scan_tlvs *tlvs,
  5756. const struct wmi_start_scan_arg *arg)
  5757. {
  5758. struct wmi_ie_data *ie;
  5759. struct wmi_chan_list *channels;
  5760. struct wmi_ssid_list *ssids;
  5761. struct wmi_bssid_list *bssids;
  5762. void *ptr = tlvs->tlvs;
  5763. int i;
  5764. if (arg->n_channels) {
  5765. channels = ptr;
  5766. channels->tag = __cpu_to_le32(WMI_CHAN_LIST_TAG);
  5767. channels->num_chan = __cpu_to_le32(arg->n_channels);
  5768. for (i = 0; i < arg->n_channels; i++)
  5769. channels->channel_list[i].freq =
  5770. __cpu_to_le16(arg->channels[i]);
  5771. ptr += sizeof(*channels);
  5772. ptr += sizeof(__le32) * arg->n_channels;
  5773. }
  5774. if (arg->n_ssids) {
  5775. ssids = ptr;
  5776. ssids->tag = __cpu_to_le32(WMI_SSID_LIST_TAG);
  5777. ssids->num_ssids = __cpu_to_le32(arg->n_ssids);
  5778. for (i = 0; i < arg->n_ssids; i++) {
  5779. ssids->ssids[i].ssid_len =
  5780. __cpu_to_le32(arg->ssids[i].len);
  5781. memcpy(&ssids->ssids[i].ssid,
  5782. arg->ssids[i].ssid,
  5783. arg->ssids[i].len);
  5784. }
  5785. ptr += sizeof(*ssids);
  5786. ptr += sizeof(struct wmi_ssid) * arg->n_ssids;
  5787. }
  5788. if (arg->n_bssids) {
  5789. bssids = ptr;
  5790. bssids->tag = __cpu_to_le32(WMI_BSSID_LIST_TAG);
  5791. bssids->num_bssid = __cpu_to_le32(arg->n_bssids);
  5792. for (i = 0; i < arg->n_bssids; i++)
  5793. ether_addr_copy(bssids->bssid_list[i].addr,
  5794. arg->bssids[i].bssid);
  5795. ptr += sizeof(*bssids);
  5796. ptr += sizeof(struct wmi_mac_addr) * arg->n_bssids;
  5797. }
  5798. if (arg->ie_len) {
  5799. ie = ptr;
  5800. ie->tag = __cpu_to_le32(WMI_IE_TAG);
  5801. ie->ie_len = __cpu_to_le32(arg->ie_len);
  5802. memcpy(ie->ie_data, arg->ie, arg->ie_len);
  5803. ptr += sizeof(*ie);
  5804. ptr += roundup(arg->ie_len, 4);
  5805. }
  5806. }
  5807. static struct sk_buff *
  5808. ath10k_wmi_op_gen_start_scan(struct ath10k *ar,
  5809. const struct wmi_start_scan_arg *arg)
  5810. {
  5811. struct wmi_start_scan_cmd *cmd;
  5812. struct sk_buff *skb;
  5813. size_t len;
  5814. int ret;
  5815. ret = ath10k_wmi_start_scan_verify(arg);
  5816. if (ret)
  5817. return ERR_PTR(ret);
  5818. len = sizeof(*cmd) + ath10k_wmi_start_scan_tlvs_len(arg);
  5819. skb = ath10k_wmi_alloc_skb(ar, len);
  5820. if (!skb)
  5821. return ERR_PTR(-ENOMEM);
  5822. cmd = (struct wmi_start_scan_cmd *)skb->data;
  5823. ath10k_wmi_put_start_scan_common(&cmd->common, arg);
  5824. ath10k_wmi_put_start_scan_tlvs(&cmd->tlvs, arg);
  5825. cmd->burst_duration_ms = __cpu_to_le32(0);
  5826. ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi start scan\n");
  5827. return skb;
  5828. }
  5829. static struct sk_buff *
  5830. ath10k_wmi_10x_op_gen_start_scan(struct ath10k *ar,
  5831. const struct wmi_start_scan_arg *arg)
  5832. {
  5833. struct wmi_10x_start_scan_cmd *cmd;
  5834. struct sk_buff *skb;
  5835. size_t len;
  5836. int ret;
  5837. ret = ath10k_wmi_start_scan_verify(arg);
  5838. if (ret)
  5839. return ERR_PTR(ret);
  5840. len = sizeof(*cmd) + ath10k_wmi_start_scan_tlvs_len(arg);
  5841. skb = ath10k_wmi_alloc_skb(ar, len);
  5842. if (!skb)
  5843. return ERR_PTR(-ENOMEM);
  5844. cmd = (struct wmi_10x_start_scan_cmd *)skb->data;
  5845. ath10k_wmi_put_start_scan_common(&cmd->common, arg);
  5846. ath10k_wmi_put_start_scan_tlvs(&cmd->tlvs, arg);
  5847. ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi 10x start scan\n");
  5848. return skb;
  5849. }
  5850. void ath10k_wmi_start_scan_init(struct ath10k *ar,
  5851. struct wmi_start_scan_arg *arg)
  5852. {
  5853. /* setup commonly used values */
  5854. arg->scan_req_id = 1;
  5855. arg->scan_priority = WMI_SCAN_PRIORITY_LOW;
  5856. arg->dwell_time_active = 50;
  5857. arg->dwell_time_passive = 150;
  5858. arg->min_rest_time = 50;
  5859. arg->max_rest_time = 500;
  5860. arg->repeat_probe_time = 0;
  5861. arg->probe_spacing_time = 0;
  5862. arg->idle_time = 0;
  5863. arg->max_scan_time = 20000;
  5864. arg->probe_delay = 5;
  5865. arg->notify_scan_events = WMI_SCAN_EVENT_STARTED
  5866. | WMI_SCAN_EVENT_COMPLETED
  5867. | WMI_SCAN_EVENT_BSS_CHANNEL
  5868. | WMI_SCAN_EVENT_FOREIGN_CHANNEL
  5869. | WMI_SCAN_EVENT_FOREIGN_CHANNEL_EXIT
  5870. | WMI_SCAN_EVENT_DEQUEUED;
  5871. arg->scan_ctrl_flags |= WMI_SCAN_CHAN_STAT_EVENT;
  5872. arg->n_bssids = 1;
  5873. arg->bssids[0].bssid = "\xFF\xFF\xFF\xFF\xFF\xFF";
  5874. }
  5875. static struct sk_buff *
  5876. ath10k_wmi_op_gen_stop_scan(struct ath10k *ar,
  5877. const struct wmi_stop_scan_arg *arg)
  5878. {
  5879. struct wmi_stop_scan_cmd *cmd;
  5880. struct sk_buff *skb;
  5881. u32 scan_id;
  5882. u32 req_id;
  5883. if (arg->req_id > 0xFFF)
  5884. return ERR_PTR(-EINVAL);
  5885. if (arg->req_type == WMI_SCAN_STOP_ONE && arg->u.scan_id > 0xFFF)
  5886. return ERR_PTR(-EINVAL);
  5887. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  5888. if (!skb)
  5889. return ERR_PTR(-ENOMEM);
  5890. scan_id = arg->u.scan_id;
  5891. scan_id |= WMI_HOST_SCAN_REQ_ID_PREFIX;
  5892. req_id = arg->req_id;
  5893. req_id |= WMI_HOST_SCAN_REQUESTOR_ID_PREFIX;
  5894. cmd = (struct wmi_stop_scan_cmd *)skb->data;
  5895. cmd->req_type = __cpu_to_le32(arg->req_type);
  5896. cmd->vdev_id = __cpu_to_le32(arg->u.vdev_id);
  5897. cmd->scan_id = __cpu_to_le32(scan_id);
  5898. cmd->scan_req_id = __cpu_to_le32(req_id);
  5899. ath10k_dbg(ar, ATH10K_DBG_WMI,
  5900. "wmi stop scan reqid %d req_type %d vdev/scan_id %d\n",
  5901. arg->req_id, arg->req_type, arg->u.scan_id);
  5902. return skb;
  5903. }
  5904. static struct sk_buff *
  5905. ath10k_wmi_op_gen_vdev_create(struct ath10k *ar, u32 vdev_id,
  5906. enum wmi_vdev_type type,
  5907. enum wmi_vdev_subtype subtype,
  5908. const u8 macaddr[ETH_ALEN])
  5909. {
  5910. struct wmi_vdev_create_cmd *cmd;
  5911. struct sk_buff *skb;
  5912. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  5913. if (!skb)
  5914. return ERR_PTR(-ENOMEM);
  5915. cmd = (struct wmi_vdev_create_cmd *)skb->data;
  5916. cmd->vdev_id = __cpu_to_le32(vdev_id);
  5917. cmd->vdev_type = __cpu_to_le32(type);
  5918. cmd->vdev_subtype = __cpu_to_le32(subtype);
  5919. ether_addr_copy(cmd->vdev_macaddr.addr, macaddr);
  5920. ath10k_dbg(ar, ATH10K_DBG_WMI,
  5921. "WMI vdev create: id %d type %d subtype %d macaddr %pM\n",
  5922. vdev_id, type, subtype, macaddr);
  5923. return skb;
  5924. }
  5925. static struct sk_buff *
  5926. ath10k_wmi_op_gen_vdev_delete(struct ath10k *ar, u32 vdev_id)
  5927. {
  5928. struct wmi_vdev_delete_cmd *cmd;
  5929. struct sk_buff *skb;
  5930. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  5931. if (!skb)
  5932. return ERR_PTR(-ENOMEM);
  5933. cmd = (struct wmi_vdev_delete_cmd *)skb->data;
  5934. cmd->vdev_id = __cpu_to_le32(vdev_id);
  5935. ath10k_dbg(ar, ATH10K_DBG_WMI,
  5936. "WMI vdev delete id %d\n", vdev_id);
  5937. return skb;
  5938. }
  5939. static struct sk_buff *
  5940. ath10k_wmi_op_gen_vdev_start(struct ath10k *ar,
  5941. const struct wmi_vdev_start_request_arg *arg,
  5942. bool restart)
  5943. {
  5944. struct wmi_vdev_start_request_cmd *cmd;
  5945. struct sk_buff *skb;
  5946. const char *cmdname;
  5947. u32 flags = 0;
  5948. if (WARN_ON(arg->hidden_ssid && !arg->ssid))
  5949. return ERR_PTR(-EINVAL);
  5950. if (WARN_ON(arg->ssid_len > sizeof(cmd->ssid.ssid)))
  5951. return ERR_PTR(-EINVAL);
  5952. if (restart)
  5953. cmdname = "restart";
  5954. else
  5955. cmdname = "start";
  5956. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  5957. if (!skb)
  5958. return ERR_PTR(-ENOMEM);
  5959. if (arg->hidden_ssid)
  5960. flags |= WMI_VDEV_START_HIDDEN_SSID;
  5961. if (arg->pmf_enabled)
  5962. flags |= WMI_VDEV_START_PMF_ENABLED;
  5963. cmd = (struct wmi_vdev_start_request_cmd *)skb->data;
  5964. cmd->vdev_id = __cpu_to_le32(arg->vdev_id);
  5965. cmd->disable_hw_ack = __cpu_to_le32(arg->disable_hw_ack);
  5966. cmd->beacon_interval = __cpu_to_le32(arg->bcn_intval);
  5967. cmd->dtim_period = __cpu_to_le32(arg->dtim_period);
  5968. cmd->flags = __cpu_to_le32(flags);
  5969. cmd->bcn_tx_rate = __cpu_to_le32(arg->bcn_tx_rate);
  5970. cmd->bcn_tx_power = __cpu_to_le32(arg->bcn_tx_power);
  5971. if (arg->ssid) {
  5972. cmd->ssid.ssid_len = __cpu_to_le32(arg->ssid_len);
  5973. memcpy(cmd->ssid.ssid, arg->ssid, arg->ssid_len);
  5974. }
  5975. ath10k_wmi_put_wmi_channel(&cmd->chan, &arg->channel);
  5976. ath10k_dbg(ar, ATH10K_DBG_WMI,
  5977. "wmi vdev %s id 0x%x flags: 0x%0X, freq %d, mode %d, ch_flags: 0x%0X, max_power: %d\n",
  5978. cmdname, arg->vdev_id,
  5979. flags, arg->channel.freq, arg->channel.mode,
  5980. cmd->chan.flags, arg->channel.max_power);
  5981. return skb;
  5982. }
  5983. static struct sk_buff *
  5984. ath10k_wmi_op_gen_vdev_stop(struct ath10k *ar, u32 vdev_id)
  5985. {
  5986. struct wmi_vdev_stop_cmd *cmd;
  5987. struct sk_buff *skb;
  5988. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  5989. if (!skb)
  5990. return ERR_PTR(-ENOMEM);
  5991. cmd = (struct wmi_vdev_stop_cmd *)skb->data;
  5992. cmd->vdev_id = __cpu_to_le32(vdev_id);
  5993. ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi vdev stop id 0x%x\n", vdev_id);
  5994. return skb;
  5995. }
  5996. static struct sk_buff *
  5997. ath10k_wmi_op_gen_vdev_up(struct ath10k *ar, u32 vdev_id, u32 aid,
  5998. const u8 *bssid)
  5999. {
  6000. struct wmi_vdev_up_cmd *cmd;
  6001. struct sk_buff *skb;
  6002. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  6003. if (!skb)
  6004. return ERR_PTR(-ENOMEM);
  6005. cmd = (struct wmi_vdev_up_cmd *)skb->data;
  6006. cmd->vdev_id = __cpu_to_le32(vdev_id);
  6007. cmd->vdev_assoc_id = __cpu_to_le32(aid);
  6008. ether_addr_copy(cmd->vdev_bssid.addr, bssid);
  6009. ath10k_dbg(ar, ATH10K_DBG_WMI,
  6010. "wmi mgmt vdev up id 0x%x assoc id %d bssid %pM\n",
  6011. vdev_id, aid, bssid);
  6012. return skb;
  6013. }
  6014. static struct sk_buff *
  6015. ath10k_wmi_op_gen_vdev_down(struct ath10k *ar, u32 vdev_id)
  6016. {
  6017. struct wmi_vdev_down_cmd *cmd;
  6018. struct sk_buff *skb;
  6019. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  6020. if (!skb)
  6021. return ERR_PTR(-ENOMEM);
  6022. cmd = (struct wmi_vdev_down_cmd *)skb->data;
  6023. cmd->vdev_id = __cpu_to_le32(vdev_id);
  6024. ath10k_dbg(ar, ATH10K_DBG_WMI,
  6025. "wmi mgmt vdev down id 0x%x\n", vdev_id);
  6026. return skb;
  6027. }
  6028. static struct sk_buff *
  6029. ath10k_wmi_op_gen_vdev_set_param(struct ath10k *ar, u32 vdev_id,
  6030. u32 param_id, u32 param_value)
  6031. {
  6032. struct wmi_vdev_set_param_cmd *cmd;
  6033. struct sk_buff *skb;
  6034. if (param_id == WMI_VDEV_PARAM_UNSUPPORTED) {
  6035. ath10k_dbg(ar, ATH10K_DBG_WMI,
  6036. "vdev param %d not supported by firmware\n",
  6037. param_id);
  6038. return ERR_PTR(-EOPNOTSUPP);
  6039. }
  6040. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  6041. if (!skb)
  6042. return ERR_PTR(-ENOMEM);
  6043. cmd = (struct wmi_vdev_set_param_cmd *)skb->data;
  6044. cmd->vdev_id = __cpu_to_le32(vdev_id);
  6045. cmd->param_id = __cpu_to_le32(param_id);
  6046. cmd->param_value = __cpu_to_le32(param_value);
  6047. ath10k_dbg(ar, ATH10K_DBG_WMI,
  6048. "wmi vdev id 0x%x set param %d value %d\n",
  6049. vdev_id, param_id, param_value);
  6050. return skb;
  6051. }
  6052. static struct sk_buff *
  6053. ath10k_wmi_op_gen_vdev_install_key(struct ath10k *ar,
  6054. const struct wmi_vdev_install_key_arg *arg)
  6055. {
  6056. struct wmi_vdev_install_key_cmd *cmd;
  6057. struct sk_buff *skb;
  6058. if (arg->key_cipher == WMI_CIPHER_NONE && arg->key_data != NULL)
  6059. return ERR_PTR(-EINVAL);
  6060. if (arg->key_cipher != WMI_CIPHER_NONE && arg->key_data == NULL)
  6061. return ERR_PTR(-EINVAL);
  6062. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd) + arg->key_len);
  6063. if (!skb)
  6064. return ERR_PTR(-ENOMEM);
  6065. cmd = (struct wmi_vdev_install_key_cmd *)skb->data;
  6066. cmd->vdev_id = __cpu_to_le32(arg->vdev_id);
  6067. cmd->key_idx = __cpu_to_le32(arg->key_idx);
  6068. cmd->key_flags = __cpu_to_le32(arg->key_flags);
  6069. cmd->key_cipher = __cpu_to_le32(arg->key_cipher);
  6070. cmd->key_len = __cpu_to_le32(arg->key_len);
  6071. cmd->key_txmic_len = __cpu_to_le32(arg->key_txmic_len);
  6072. cmd->key_rxmic_len = __cpu_to_le32(arg->key_rxmic_len);
  6073. if (arg->macaddr)
  6074. ether_addr_copy(cmd->peer_macaddr.addr, arg->macaddr);
  6075. if (arg->key_data)
  6076. memcpy(cmd->key_data, arg->key_data, arg->key_len);
  6077. ath10k_dbg(ar, ATH10K_DBG_WMI,
  6078. "wmi vdev install key idx %d cipher %d len %d\n",
  6079. arg->key_idx, arg->key_cipher, arg->key_len);
  6080. return skb;
  6081. }
  6082. static struct sk_buff *
  6083. ath10k_wmi_op_gen_vdev_spectral_conf(struct ath10k *ar,
  6084. const struct wmi_vdev_spectral_conf_arg *arg)
  6085. {
  6086. struct wmi_vdev_spectral_conf_cmd *cmd;
  6087. struct sk_buff *skb;
  6088. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  6089. if (!skb)
  6090. return ERR_PTR(-ENOMEM);
  6091. cmd = (struct wmi_vdev_spectral_conf_cmd *)skb->data;
  6092. cmd->vdev_id = __cpu_to_le32(arg->vdev_id);
  6093. cmd->scan_count = __cpu_to_le32(arg->scan_count);
  6094. cmd->scan_period = __cpu_to_le32(arg->scan_period);
  6095. cmd->scan_priority = __cpu_to_le32(arg->scan_priority);
  6096. cmd->scan_fft_size = __cpu_to_le32(arg->scan_fft_size);
  6097. cmd->scan_gc_ena = __cpu_to_le32(arg->scan_gc_ena);
  6098. cmd->scan_restart_ena = __cpu_to_le32(arg->scan_restart_ena);
  6099. cmd->scan_noise_floor_ref = __cpu_to_le32(arg->scan_noise_floor_ref);
  6100. cmd->scan_init_delay = __cpu_to_le32(arg->scan_init_delay);
  6101. cmd->scan_nb_tone_thr = __cpu_to_le32(arg->scan_nb_tone_thr);
  6102. cmd->scan_str_bin_thr = __cpu_to_le32(arg->scan_str_bin_thr);
  6103. cmd->scan_wb_rpt_mode = __cpu_to_le32(arg->scan_wb_rpt_mode);
  6104. cmd->scan_rssi_rpt_mode = __cpu_to_le32(arg->scan_rssi_rpt_mode);
  6105. cmd->scan_rssi_thr = __cpu_to_le32(arg->scan_rssi_thr);
  6106. cmd->scan_pwr_format = __cpu_to_le32(arg->scan_pwr_format);
  6107. cmd->scan_rpt_mode = __cpu_to_le32(arg->scan_rpt_mode);
  6108. cmd->scan_bin_scale = __cpu_to_le32(arg->scan_bin_scale);
  6109. cmd->scan_dbm_adj = __cpu_to_le32(arg->scan_dbm_adj);
  6110. cmd->scan_chn_mask = __cpu_to_le32(arg->scan_chn_mask);
  6111. return skb;
  6112. }
  6113. static struct sk_buff *
  6114. ath10k_wmi_op_gen_vdev_spectral_enable(struct ath10k *ar, u32 vdev_id,
  6115. u32 trigger, u32 enable)
  6116. {
  6117. struct wmi_vdev_spectral_enable_cmd *cmd;
  6118. struct sk_buff *skb;
  6119. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  6120. if (!skb)
  6121. return ERR_PTR(-ENOMEM);
  6122. cmd = (struct wmi_vdev_spectral_enable_cmd *)skb->data;
  6123. cmd->vdev_id = __cpu_to_le32(vdev_id);
  6124. cmd->trigger_cmd = __cpu_to_le32(trigger);
  6125. cmd->enable_cmd = __cpu_to_le32(enable);
  6126. return skb;
  6127. }
  6128. static struct sk_buff *
  6129. ath10k_wmi_op_gen_peer_create(struct ath10k *ar, u32 vdev_id,
  6130. const u8 peer_addr[ETH_ALEN],
  6131. enum wmi_peer_type peer_type)
  6132. {
  6133. struct wmi_peer_create_cmd *cmd;
  6134. struct sk_buff *skb;
  6135. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  6136. if (!skb)
  6137. return ERR_PTR(-ENOMEM);
  6138. cmd = (struct wmi_peer_create_cmd *)skb->data;
  6139. cmd->vdev_id = __cpu_to_le32(vdev_id);
  6140. ether_addr_copy(cmd->peer_macaddr.addr, peer_addr);
  6141. cmd->peer_type = __cpu_to_le32(peer_type);
  6142. ath10k_dbg(ar, ATH10K_DBG_WMI,
  6143. "wmi peer create vdev_id %d peer_addr %pM\n",
  6144. vdev_id, peer_addr);
  6145. return skb;
  6146. }
  6147. static struct sk_buff *
  6148. ath10k_wmi_op_gen_peer_delete(struct ath10k *ar, u32 vdev_id,
  6149. const u8 peer_addr[ETH_ALEN])
  6150. {
  6151. struct wmi_peer_delete_cmd *cmd;
  6152. struct sk_buff *skb;
  6153. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  6154. if (!skb)
  6155. return ERR_PTR(-ENOMEM);
  6156. cmd = (struct wmi_peer_delete_cmd *)skb->data;
  6157. cmd->vdev_id = __cpu_to_le32(vdev_id);
  6158. ether_addr_copy(cmd->peer_macaddr.addr, peer_addr);
  6159. ath10k_dbg(ar, ATH10K_DBG_WMI,
  6160. "wmi peer delete vdev_id %d peer_addr %pM\n",
  6161. vdev_id, peer_addr);
  6162. return skb;
  6163. }
  6164. static struct sk_buff *
  6165. ath10k_wmi_op_gen_peer_flush(struct ath10k *ar, u32 vdev_id,
  6166. const u8 peer_addr[ETH_ALEN], u32 tid_bitmap)
  6167. {
  6168. struct wmi_peer_flush_tids_cmd *cmd;
  6169. struct sk_buff *skb;
  6170. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  6171. if (!skb)
  6172. return ERR_PTR(-ENOMEM);
  6173. cmd = (struct wmi_peer_flush_tids_cmd *)skb->data;
  6174. cmd->vdev_id = __cpu_to_le32(vdev_id);
  6175. cmd->peer_tid_bitmap = __cpu_to_le32(tid_bitmap);
  6176. ether_addr_copy(cmd->peer_macaddr.addr, peer_addr);
  6177. ath10k_dbg(ar, ATH10K_DBG_WMI,
  6178. "wmi peer flush vdev_id %d peer_addr %pM tids %08x\n",
  6179. vdev_id, peer_addr, tid_bitmap);
  6180. return skb;
  6181. }
  6182. static struct sk_buff *
  6183. ath10k_wmi_op_gen_peer_set_param(struct ath10k *ar, u32 vdev_id,
  6184. const u8 *peer_addr,
  6185. enum wmi_peer_param param_id,
  6186. u32 param_value)
  6187. {
  6188. struct wmi_peer_set_param_cmd *cmd;
  6189. struct sk_buff *skb;
  6190. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  6191. if (!skb)
  6192. return ERR_PTR(-ENOMEM);
  6193. cmd = (struct wmi_peer_set_param_cmd *)skb->data;
  6194. cmd->vdev_id = __cpu_to_le32(vdev_id);
  6195. cmd->param_id = __cpu_to_le32(param_id);
  6196. cmd->param_value = __cpu_to_le32(param_value);
  6197. ether_addr_copy(cmd->peer_macaddr.addr, peer_addr);
  6198. ath10k_dbg(ar, ATH10K_DBG_WMI,
  6199. "wmi vdev %d peer 0x%pM set param %d value %d\n",
  6200. vdev_id, peer_addr, param_id, param_value);
  6201. return skb;
  6202. }
  6203. static struct sk_buff *
  6204. ath10k_wmi_op_gen_set_psmode(struct ath10k *ar, u32 vdev_id,
  6205. enum wmi_sta_ps_mode psmode)
  6206. {
  6207. struct wmi_sta_powersave_mode_cmd *cmd;
  6208. struct sk_buff *skb;
  6209. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  6210. if (!skb)
  6211. return ERR_PTR(-ENOMEM);
  6212. cmd = (struct wmi_sta_powersave_mode_cmd *)skb->data;
  6213. cmd->vdev_id = __cpu_to_le32(vdev_id);
  6214. cmd->sta_ps_mode = __cpu_to_le32(psmode);
  6215. ath10k_dbg(ar, ATH10K_DBG_WMI,
  6216. "wmi set powersave id 0x%x mode %d\n",
  6217. vdev_id, psmode);
  6218. return skb;
  6219. }
  6220. static struct sk_buff *
  6221. ath10k_wmi_op_gen_set_sta_ps(struct ath10k *ar, u32 vdev_id,
  6222. enum wmi_sta_powersave_param param_id,
  6223. u32 value)
  6224. {
  6225. struct wmi_sta_powersave_param_cmd *cmd;
  6226. struct sk_buff *skb;
  6227. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  6228. if (!skb)
  6229. return ERR_PTR(-ENOMEM);
  6230. cmd = (struct wmi_sta_powersave_param_cmd *)skb->data;
  6231. cmd->vdev_id = __cpu_to_le32(vdev_id);
  6232. cmd->param_id = __cpu_to_le32(param_id);
  6233. cmd->param_value = __cpu_to_le32(value);
  6234. ath10k_dbg(ar, ATH10K_DBG_WMI,
  6235. "wmi sta ps param vdev_id 0x%x param %d value %d\n",
  6236. vdev_id, param_id, value);
  6237. return skb;
  6238. }
  6239. static struct sk_buff *
  6240. ath10k_wmi_op_gen_set_ap_ps(struct ath10k *ar, u32 vdev_id, const u8 *mac,
  6241. enum wmi_ap_ps_peer_param param_id, u32 value)
  6242. {
  6243. struct wmi_ap_ps_peer_cmd *cmd;
  6244. struct sk_buff *skb;
  6245. if (!mac)
  6246. return ERR_PTR(-EINVAL);
  6247. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  6248. if (!skb)
  6249. return ERR_PTR(-ENOMEM);
  6250. cmd = (struct wmi_ap_ps_peer_cmd *)skb->data;
  6251. cmd->vdev_id = __cpu_to_le32(vdev_id);
  6252. cmd->param_id = __cpu_to_le32(param_id);
  6253. cmd->param_value = __cpu_to_le32(value);
  6254. ether_addr_copy(cmd->peer_macaddr.addr, mac);
  6255. ath10k_dbg(ar, ATH10K_DBG_WMI,
  6256. "wmi ap ps param vdev_id 0x%X param %d value %d mac_addr %pM\n",
  6257. vdev_id, param_id, value, mac);
  6258. return skb;
  6259. }
  6260. static struct sk_buff *
  6261. ath10k_wmi_op_gen_scan_chan_list(struct ath10k *ar,
  6262. const struct wmi_scan_chan_list_arg *arg)
  6263. {
  6264. struct wmi_scan_chan_list_cmd *cmd;
  6265. struct sk_buff *skb;
  6266. struct wmi_channel_arg *ch;
  6267. struct wmi_channel *ci;
  6268. int len;
  6269. int i;
  6270. len = sizeof(*cmd) + arg->n_channels * sizeof(struct wmi_channel);
  6271. skb = ath10k_wmi_alloc_skb(ar, len);
  6272. if (!skb)
  6273. return ERR_PTR(-EINVAL);
  6274. cmd = (struct wmi_scan_chan_list_cmd *)skb->data;
  6275. cmd->num_scan_chans = __cpu_to_le32(arg->n_channels);
  6276. for (i = 0; i < arg->n_channels; i++) {
  6277. ch = &arg->channels[i];
  6278. ci = &cmd->chan_info[i];
  6279. ath10k_wmi_put_wmi_channel(ci, ch);
  6280. }
  6281. return skb;
  6282. }
  6283. static void
  6284. ath10k_wmi_peer_assoc_fill(struct ath10k *ar, void *buf,
  6285. const struct wmi_peer_assoc_complete_arg *arg)
  6286. {
  6287. struct wmi_common_peer_assoc_complete_cmd *cmd = buf;
  6288. cmd->vdev_id = __cpu_to_le32(arg->vdev_id);
  6289. cmd->peer_new_assoc = __cpu_to_le32(arg->peer_reassoc ? 0 : 1);
  6290. cmd->peer_associd = __cpu_to_le32(arg->peer_aid);
  6291. cmd->peer_flags = __cpu_to_le32(arg->peer_flags);
  6292. cmd->peer_caps = __cpu_to_le32(arg->peer_caps);
  6293. cmd->peer_listen_intval = __cpu_to_le32(arg->peer_listen_intval);
  6294. cmd->peer_ht_caps = __cpu_to_le32(arg->peer_ht_caps);
  6295. cmd->peer_max_mpdu = __cpu_to_le32(arg->peer_max_mpdu);
  6296. cmd->peer_mpdu_density = __cpu_to_le32(arg->peer_mpdu_density);
  6297. cmd->peer_rate_caps = __cpu_to_le32(arg->peer_rate_caps);
  6298. cmd->peer_nss = __cpu_to_le32(arg->peer_num_spatial_streams);
  6299. cmd->peer_vht_caps = __cpu_to_le32(arg->peer_vht_caps);
  6300. cmd->peer_phymode = __cpu_to_le32(arg->peer_phymode);
  6301. ether_addr_copy(cmd->peer_macaddr.addr, arg->addr);
  6302. cmd->peer_legacy_rates.num_rates =
  6303. __cpu_to_le32(arg->peer_legacy_rates.num_rates);
  6304. memcpy(cmd->peer_legacy_rates.rates, arg->peer_legacy_rates.rates,
  6305. arg->peer_legacy_rates.num_rates);
  6306. cmd->peer_ht_rates.num_rates =
  6307. __cpu_to_le32(arg->peer_ht_rates.num_rates);
  6308. memcpy(cmd->peer_ht_rates.rates, arg->peer_ht_rates.rates,
  6309. arg->peer_ht_rates.num_rates);
  6310. cmd->peer_vht_rates.rx_max_rate =
  6311. __cpu_to_le32(arg->peer_vht_rates.rx_max_rate);
  6312. cmd->peer_vht_rates.rx_mcs_set =
  6313. __cpu_to_le32(arg->peer_vht_rates.rx_mcs_set);
  6314. cmd->peer_vht_rates.tx_max_rate =
  6315. __cpu_to_le32(arg->peer_vht_rates.tx_max_rate);
  6316. cmd->peer_vht_rates.tx_mcs_set =
  6317. __cpu_to_le32(arg->peer_vht_rates.tx_mcs_set);
  6318. }
  6319. static void
  6320. ath10k_wmi_peer_assoc_fill_main(struct ath10k *ar, void *buf,
  6321. const struct wmi_peer_assoc_complete_arg *arg)
  6322. {
  6323. struct wmi_main_peer_assoc_complete_cmd *cmd = buf;
  6324. ath10k_wmi_peer_assoc_fill(ar, buf, arg);
  6325. memset(cmd->peer_ht_info, 0, sizeof(cmd->peer_ht_info));
  6326. }
  6327. static void
  6328. ath10k_wmi_peer_assoc_fill_10_1(struct ath10k *ar, void *buf,
  6329. const struct wmi_peer_assoc_complete_arg *arg)
  6330. {
  6331. ath10k_wmi_peer_assoc_fill(ar, buf, arg);
  6332. }
  6333. static void
  6334. ath10k_wmi_peer_assoc_fill_10_2(struct ath10k *ar, void *buf,
  6335. const struct wmi_peer_assoc_complete_arg *arg)
  6336. {
  6337. struct wmi_10_2_peer_assoc_complete_cmd *cmd = buf;
  6338. int max_mcs, max_nss;
  6339. u32 info0;
  6340. /* TODO: Is using max values okay with firmware? */
  6341. max_mcs = 0xf;
  6342. max_nss = 0xf;
  6343. info0 = SM(max_mcs, WMI_PEER_ASSOC_INFO0_MAX_MCS_IDX) |
  6344. SM(max_nss, WMI_PEER_ASSOC_INFO0_MAX_NSS);
  6345. ath10k_wmi_peer_assoc_fill(ar, buf, arg);
  6346. cmd->info0 = __cpu_to_le32(info0);
  6347. }
  6348. static void
  6349. ath10k_wmi_peer_assoc_fill_10_4(struct ath10k *ar, void *buf,
  6350. const struct wmi_peer_assoc_complete_arg *arg)
  6351. {
  6352. struct wmi_10_4_peer_assoc_complete_cmd *cmd = buf;
  6353. ath10k_wmi_peer_assoc_fill_10_2(ar, buf, arg);
  6354. if (arg->peer_bw_rxnss_override)
  6355. cmd->peer_bw_rxnss_override =
  6356. __cpu_to_le32((arg->peer_bw_rxnss_override - 1) |
  6357. BIT(PEER_BW_RXNSS_OVERRIDE_OFFSET));
  6358. else
  6359. cmd->peer_bw_rxnss_override = 0;
  6360. }
  6361. static int
  6362. ath10k_wmi_peer_assoc_check_arg(const struct wmi_peer_assoc_complete_arg *arg)
  6363. {
  6364. if (arg->peer_mpdu_density > 16)
  6365. return -EINVAL;
  6366. if (arg->peer_legacy_rates.num_rates > MAX_SUPPORTED_RATES)
  6367. return -EINVAL;
  6368. if (arg->peer_ht_rates.num_rates > MAX_SUPPORTED_RATES)
  6369. return -EINVAL;
  6370. return 0;
  6371. }
  6372. static struct sk_buff *
  6373. ath10k_wmi_op_gen_peer_assoc(struct ath10k *ar,
  6374. const struct wmi_peer_assoc_complete_arg *arg)
  6375. {
  6376. size_t len = sizeof(struct wmi_main_peer_assoc_complete_cmd);
  6377. struct sk_buff *skb;
  6378. int ret;
  6379. ret = ath10k_wmi_peer_assoc_check_arg(arg);
  6380. if (ret)
  6381. return ERR_PTR(ret);
  6382. skb = ath10k_wmi_alloc_skb(ar, len);
  6383. if (!skb)
  6384. return ERR_PTR(-ENOMEM);
  6385. ath10k_wmi_peer_assoc_fill_main(ar, skb->data, arg);
  6386. ath10k_dbg(ar, ATH10K_DBG_WMI,
  6387. "wmi peer assoc vdev %d addr %pM (%s)\n",
  6388. arg->vdev_id, arg->addr,
  6389. arg->peer_reassoc ? "reassociate" : "new");
  6390. return skb;
  6391. }
  6392. static struct sk_buff *
  6393. ath10k_wmi_10_1_op_gen_peer_assoc(struct ath10k *ar,
  6394. const struct wmi_peer_assoc_complete_arg *arg)
  6395. {
  6396. size_t len = sizeof(struct wmi_10_1_peer_assoc_complete_cmd);
  6397. struct sk_buff *skb;
  6398. int ret;
  6399. ret = ath10k_wmi_peer_assoc_check_arg(arg);
  6400. if (ret)
  6401. return ERR_PTR(ret);
  6402. skb = ath10k_wmi_alloc_skb(ar, len);
  6403. if (!skb)
  6404. return ERR_PTR(-ENOMEM);
  6405. ath10k_wmi_peer_assoc_fill_10_1(ar, skb->data, arg);
  6406. ath10k_dbg(ar, ATH10K_DBG_WMI,
  6407. "wmi peer assoc vdev %d addr %pM (%s)\n",
  6408. arg->vdev_id, arg->addr,
  6409. arg->peer_reassoc ? "reassociate" : "new");
  6410. return skb;
  6411. }
  6412. static struct sk_buff *
  6413. ath10k_wmi_10_2_op_gen_peer_assoc(struct ath10k *ar,
  6414. const struct wmi_peer_assoc_complete_arg *arg)
  6415. {
  6416. size_t len = sizeof(struct wmi_10_2_peer_assoc_complete_cmd);
  6417. struct sk_buff *skb;
  6418. int ret;
  6419. ret = ath10k_wmi_peer_assoc_check_arg(arg);
  6420. if (ret)
  6421. return ERR_PTR(ret);
  6422. skb = ath10k_wmi_alloc_skb(ar, len);
  6423. if (!skb)
  6424. return ERR_PTR(-ENOMEM);
  6425. ath10k_wmi_peer_assoc_fill_10_2(ar, skb->data, arg);
  6426. ath10k_dbg(ar, ATH10K_DBG_WMI,
  6427. "wmi peer assoc vdev %d addr %pM (%s)\n",
  6428. arg->vdev_id, arg->addr,
  6429. arg->peer_reassoc ? "reassociate" : "new");
  6430. return skb;
  6431. }
  6432. static struct sk_buff *
  6433. ath10k_wmi_10_4_op_gen_peer_assoc(struct ath10k *ar,
  6434. const struct wmi_peer_assoc_complete_arg *arg)
  6435. {
  6436. size_t len = sizeof(struct wmi_10_4_peer_assoc_complete_cmd);
  6437. struct sk_buff *skb;
  6438. int ret;
  6439. ret = ath10k_wmi_peer_assoc_check_arg(arg);
  6440. if (ret)
  6441. return ERR_PTR(ret);
  6442. skb = ath10k_wmi_alloc_skb(ar, len);
  6443. if (!skb)
  6444. return ERR_PTR(-ENOMEM);
  6445. ath10k_wmi_peer_assoc_fill_10_4(ar, skb->data, arg);
  6446. ath10k_dbg(ar, ATH10K_DBG_WMI,
  6447. "wmi peer assoc vdev %d addr %pM (%s)\n",
  6448. arg->vdev_id, arg->addr,
  6449. arg->peer_reassoc ? "reassociate" : "new");
  6450. return skb;
  6451. }
  6452. static struct sk_buff *
  6453. ath10k_wmi_10_2_op_gen_pdev_get_temperature(struct ath10k *ar)
  6454. {
  6455. struct sk_buff *skb;
  6456. skb = ath10k_wmi_alloc_skb(ar, 0);
  6457. if (!skb)
  6458. return ERR_PTR(-ENOMEM);
  6459. ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi pdev get temperature\n");
  6460. return skb;
  6461. }
  6462. static struct sk_buff *
  6463. ath10k_wmi_10_2_op_gen_pdev_bss_chan_info(struct ath10k *ar,
  6464. enum wmi_bss_survey_req_type type)
  6465. {
  6466. struct wmi_pdev_chan_info_req_cmd *cmd;
  6467. struct sk_buff *skb;
  6468. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  6469. if (!skb)
  6470. return ERR_PTR(-ENOMEM);
  6471. cmd = (struct wmi_pdev_chan_info_req_cmd *)skb->data;
  6472. cmd->type = __cpu_to_le32(type);
  6473. ath10k_dbg(ar, ATH10K_DBG_WMI,
  6474. "wmi pdev bss info request type %d\n", type);
  6475. return skb;
  6476. }
  6477. /* This function assumes the beacon is already DMA mapped */
  6478. static struct sk_buff *
  6479. ath10k_wmi_op_gen_beacon_dma(struct ath10k *ar, u32 vdev_id, const void *bcn,
  6480. size_t bcn_len, u32 bcn_paddr, bool dtim_zero,
  6481. bool deliver_cab)
  6482. {
  6483. struct wmi_bcn_tx_ref_cmd *cmd;
  6484. struct sk_buff *skb;
  6485. struct ieee80211_hdr *hdr;
  6486. u16 fc;
  6487. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  6488. if (!skb)
  6489. return ERR_PTR(-ENOMEM);
  6490. hdr = (struct ieee80211_hdr *)bcn;
  6491. fc = le16_to_cpu(hdr->frame_control);
  6492. cmd = (struct wmi_bcn_tx_ref_cmd *)skb->data;
  6493. cmd->vdev_id = __cpu_to_le32(vdev_id);
  6494. cmd->data_len = __cpu_to_le32(bcn_len);
  6495. cmd->data_ptr = __cpu_to_le32(bcn_paddr);
  6496. cmd->msdu_id = 0;
  6497. cmd->frame_control = __cpu_to_le32(fc);
  6498. cmd->flags = 0;
  6499. cmd->antenna_mask = __cpu_to_le32(WMI_BCN_TX_REF_DEF_ANTENNA);
  6500. if (dtim_zero)
  6501. cmd->flags |= __cpu_to_le32(WMI_BCN_TX_REF_FLAG_DTIM_ZERO);
  6502. if (deliver_cab)
  6503. cmd->flags |= __cpu_to_le32(WMI_BCN_TX_REF_FLAG_DELIVER_CAB);
  6504. return skb;
  6505. }
  6506. void ath10k_wmi_set_wmm_param(struct wmi_wmm_params *params,
  6507. const struct wmi_wmm_params_arg *arg)
  6508. {
  6509. params->cwmin = __cpu_to_le32(arg->cwmin);
  6510. params->cwmax = __cpu_to_le32(arg->cwmax);
  6511. params->aifs = __cpu_to_le32(arg->aifs);
  6512. params->txop = __cpu_to_le32(arg->txop);
  6513. params->acm = __cpu_to_le32(arg->acm);
  6514. params->no_ack = __cpu_to_le32(arg->no_ack);
  6515. }
  6516. static struct sk_buff *
  6517. ath10k_wmi_op_gen_pdev_set_wmm(struct ath10k *ar,
  6518. const struct wmi_wmm_params_all_arg *arg)
  6519. {
  6520. struct wmi_pdev_set_wmm_params *cmd;
  6521. struct sk_buff *skb;
  6522. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  6523. if (!skb)
  6524. return ERR_PTR(-ENOMEM);
  6525. cmd = (struct wmi_pdev_set_wmm_params *)skb->data;
  6526. ath10k_wmi_set_wmm_param(&cmd->ac_be, &arg->ac_be);
  6527. ath10k_wmi_set_wmm_param(&cmd->ac_bk, &arg->ac_bk);
  6528. ath10k_wmi_set_wmm_param(&cmd->ac_vi, &arg->ac_vi);
  6529. ath10k_wmi_set_wmm_param(&cmd->ac_vo, &arg->ac_vo);
  6530. ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi pdev set wmm params\n");
  6531. return skb;
  6532. }
  6533. static struct sk_buff *
  6534. ath10k_wmi_op_gen_request_stats(struct ath10k *ar, u32 stats_mask)
  6535. {
  6536. struct wmi_request_stats_cmd *cmd;
  6537. struct sk_buff *skb;
  6538. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  6539. if (!skb)
  6540. return ERR_PTR(-ENOMEM);
  6541. cmd = (struct wmi_request_stats_cmd *)skb->data;
  6542. cmd->stats_id = __cpu_to_le32(stats_mask);
  6543. ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi request stats 0x%08x\n",
  6544. stats_mask);
  6545. return skb;
  6546. }
  6547. static struct sk_buff *
  6548. ath10k_wmi_op_gen_force_fw_hang(struct ath10k *ar,
  6549. enum wmi_force_fw_hang_type type, u32 delay_ms)
  6550. {
  6551. struct wmi_force_fw_hang_cmd *cmd;
  6552. struct sk_buff *skb;
  6553. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  6554. if (!skb)
  6555. return ERR_PTR(-ENOMEM);
  6556. cmd = (struct wmi_force_fw_hang_cmd *)skb->data;
  6557. cmd->type = __cpu_to_le32(type);
  6558. cmd->delay_ms = __cpu_to_le32(delay_ms);
  6559. ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi force fw hang %d delay %d\n",
  6560. type, delay_ms);
  6561. return skb;
  6562. }
  6563. static struct sk_buff *
  6564. ath10k_wmi_op_gen_dbglog_cfg(struct ath10k *ar, u64 module_enable,
  6565. u32 log_level)
  6566. {
  6567. struct wmi_dbglog_cfg_cmd *cmd;
  6568. struct sk_buff *skb;
  6569. u32 cfg;
  6570. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  6571. if (!skb)
  6572. return ERR_PTR(-ENOMEM);
  6573. cmd = (struct wmi_dbglog_cfg_cmd *)skb->data;
  6574. if (module_enable) {
  6575. cfg = SM(log_level,
  6576. ATH10K_DBGLOG_CFG_LOG_LVL);
  6577. } else {
  6578. /* set back defaults, all modules with WARN level */
  6579. cfg = SM(ATH10K_DBGLOG_LEVEL_WARN,
  6580. ATH10K_DBGLOG_CFG_LOG_LVL);
  6581. module_enable = ~0;
  6582. }
  6583. cmd->module_enable = __cpu_to_le32(module_enable);
  6584. cmd->module_valid = __cpu_to_le32(~0);
  6585. cmd->config_enable = __cpu_to_le32(cfg);
  6586. cmd->config_valid = __cpu_to_le32(ATH10K_DBGLOG_CFG_LOG_LVL_MASK);
  6587. ath10k_dbg(ar, ATH10K_DBG_WMI,
  6588. "wmi dbglog cfg modules %08x %08x config %08x %08x\n",
  6589. __le32_to_cpu(cmd->module_enable),
  6590. __le32_to_cpu(cmd->module_valid),
  6591. __le32_to_cpu(cmd->config_enable),
  6592. __le32_to_cpu(cmd->config_valid));
  6593. return skb;
  6594. }
  6595. static struct sk_buff *
  6596. ath10k_wmi_10_4_op_gen_dbglog_cfg(struct ath10k *ar, u64 module_enable,
  6597. u32 log_level)
  6598. {
  6599. struct wmi_10_4_dbglog_cfg_cmd *cmd;
  6600. struct sk_buff *skb;
  6601. u32 cfg;
  6602. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  6603. if (!skb)
  6604. return ERR_PTR(-ENOMEM);
  6605. cmd = (struct wmi_10_4_dbglog_cfg_cmd *)skb->data;
  6606. if (module_enable) {
  6607. cfg = SM(log_level,
  6608. ATH10K_DBGLOG_CFG_LOG_LVL);
  6609. } else {
  6610. /* set back defaults, all modules with WARN level */
  6611. cfg = SM(ATH10K_DBGLOG_LEVEL_WARN,
  6612. ATH10K_DBGLOG_CFG_LOG_LVL);
  6613. module_enable = ~0;
  6614. }
  6615. cmd->module_enable = __cpu_to_le64(module_enable);
  6616. cmd->module_valid = __cpu_to_le64(~0);
  6617. cmd->config_enable = __cpu_to_le32(cfg);
  6618. cmd->config_valid = __cpu_to_le32(ATH10K_DBGLOG_CFG_LOG_LVL_MASK);
  6619. ath10k_dbg(ar, ATH10K_DBG_WMI,
  6620. "wmi dbglog cfg modules 0x%016llx 0x%016llx config %08x %08x\n",
  6621. __le64_to_cpu(cmd->module_enable),
  6622. __le64_to_cpu(cmd->module_valid),
  6623. __le32_to_cpu(cmd->config_enable),
  6624. __le32_to_cpu(cmd->config_valid));
  6625. return skb;
  6626. }
  6627. static struct sk_buff *
  6628. ath10k_wmi_op_gen_pktlog_enable(struct ath10k *ar, u32 ev_bitmap)
  6629. {
  6630. struct wmi_pdev_pktlog_enable_cmd *cmd;
  6631. struct sk_buff *skb;
  6632. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  6633. if (!skb)
  6634. return ERR_PTR(-ENOMEM);
  6635. ev_bitmap &= ATH10K_PKTLOG_ANY;
  6636. cmd = (struct wmi_pdev_pktlog_enable_cmd *)skb->data;
  6637. cmd->ev_bitmap = __cpu_to_le32(ev_bitmap);
  6638. ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi enable pktlog filter 0x%08x\n",
  6639. ev_bitmap);
  6640. return skb;
  6641. }
  6642. static struct sk_buff *
  6643. ath10k_wmi_op_gen_pktlog_disable(struct ath10k *ar)
  6644. {
  6645. struct sk_buff *skb;
  6646. skb = ath10k_wmi_alloc_skb(ar, 0);
  6647. if (!skb)
  6648. return ERR_PTR(-ENOMEM);
  6649. ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi disable pktlog\n");
  6650. return skb;
  6651. }
  6652. static struct sk_buff *
  6653. ath10k_wmi_op_gen_pdev_set_quiet_mode(struct ath10k *ar, u32 period,
  6654. u32 duration, u32 next_offset,
  6655. u32 enabled)
  6656. {
  6657. struct wmi_pdev_set_quiet_cmd *cmd;
  6658. struct sk_buff *skb;
  6659. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  6660. if (!skb)
  6661. return ERR_PTR(-ENOMEM);
  6662. cmd = (struct wmi_pdev_set_quiet_cmd *)skb->data;
  6663. cmd->period = __cpu_to_le32(period);
  6664. cmd->duration = __cpu_to_le32(duration);
  6665. cmd->next_start = __cpu_to_le32(next_offset);
  6666. cmd->enabled = __cpu_to_le32(enabled);
  6667. ath10k_dbg(ar, ATH10K_DBG_WMI,
  6668. "wmi quiet param: period %u duration %u enabled %d\n",
  6669. period, duration, enabled);
  6670. return skb;
  6671. }
  6672. static struct sk_buff *
  6673. ath10k_wmi_op_gen_addba_clear_resp(struct ath10k *ar, u32 vdev_id,
  6674. const u8 *mac)
  6675. {
  6676. struct wmi_addba_clear_resp_cmd *cmd;
  6677. struct sk_buff *skb;
  6678. if (!mac)
  6679. return ERR_PTR(-EINVAL);
  6680. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  6681. if (!skb)
  6682. return ERR_PTR(-ENOMEM);
  6683. cmd = (struct wmi_addba_clear_resp_cmd *)skb->data;
  6684. cmd->vdev_id = __cpu_to_le32(vdev_id);
  6685. ether_addr_copy(cmd->peer_macaddr.addr, mac);
  6686. ath10k_dbg(ar, ATH10K_DBG_WMI,
  6687. "wmi addba clear resp vdev_id 0x%X mac_addr %pM\n",
  6688. vdev_id, mac);
  6689. return skb;
  6690. }
  6691. static struct sk_buff *
  6692. ath10k_wmi_op_gen_addba_send(struct ath10k *ar, u32 vdev_id, const u8 *mac,
  6693. u32 tid, u32 buf_size)
  6694. {
  6695. struct wmi_addba_send_cmd *cmd;
  6696. struct sk_buff *skb;
  6697. if (!mac)
  6698. return ERR_PTR(-EINVAL);
  6699. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  6700. if (!skb)
  6701. return ERR_PTR(-ENOMEM);
  6702. cmd = (struct wmi_addba_send_cmd *)skb->data;
  6703. cmd->vdev_id = __cpu_to_le32(vdev_id);
  6704. ether_addr_copy(cmd->peer_macaddr.addr, mac);
  6705. cmd->tid = __cpu_to_le32(tid);
  6706. cmd->buffersize = __cpu_to_le32(buf_size);
  6707. ath10k_dbg(ar, ATH10K_DBG_WMI,
  6708. "wmi addba send vdev_id 0x%X mac_addr %pM tid %u bufsize %u\n",
  6709. vdev_id, mac, tid, buf_size);
  6710. return skb;
  6711. }
  6712. static struct sk_buff *
  6713. ath10k_wmi_op_gen_addba_set_resp(struct ath10k *ar, u32 vdev_id, const u8 *mac,
  6714. u32 tid, u32 status)
  6715. {
  6716. struct wmi_addba_setresponse_cmd *cmd;
  6717. struct sk_buff *skb;
  6718. if (!mac)
  6719. return ERR_PTR(-EINVAL);
  6720. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  6721. if (!skb)
  6722. return ERR_PTR(-ENOMEM);
  6723. cmd = (struct wmi_addba_setresponse_cmd *)skb->data;
  6724. cmd->vdev_id = __cpu_to_le32(vdev_id);
  6725. ether_addr_copy(cmd->peer_macaddr.addr, mac);
  6726. cmd->tid = __cpu_to_le32(tid);
  6727. cmd->statuscode = __cpu_to_le32(status);
  6728. ath10k_dbg(ar, ATH10K_DBG_WMI,
  6729. "wmi addba set resp vdev_id 0x%X mac_addr %pM tid %u status %u\n",
  6730. vdev_id, mac, tid, status);
  6731. return skb;
  6732. }
  6733. static struct sk_buff *
  6734. ath10k_wmi_op_gen_delba_send(struct ath10k *ar, u32 vdev_id, const u8 *mac,
  6735. u32 tid, u32 initiator, u32 reason)
  6736. {
  6737. struct wmi_delba_send_cmd *cmd;
  6738. struct sk_buff *skb;
  6739. if (!mac)
  6740. return ERR_PTR(-EINVAL);
  6741. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  6742. if (!skb)
  6743. return ERR_PTR(-ENOMEM);
  6744. cmd = (struct wmi_delba_send_cmd *)skb->data;
  6745. cmd->vdev_id = __cpu_to_le32(vdev_id);
  6746. ether_addr_copy(cmd->peer_macaddr.addr, mac);
  6747. cmd->tid = __cpu_to_le32(tid);
  6748. cmd->initiator = __cpu_to_le32(initiator);
  6749. cmd->reasoncode = __cpu_to_le32(reason);
  6750. ath10k_dbg(ar, ATH10K_DBG_WMI,
  6751. "wmi delba send vdev_id 0x%X mac_addr %pM tid %u initiator %u reason %u\n",
  6752. vdev_id, mac, tid, initiator, reason);
  6753. return skb;
  6754. }
  6755. static struct sk_buff *
  6756. ath10k_wmi_10_2_4_op_gen_pdev_get_tpc_config(struct ath10k *ar, u32 param)
  6757. {
  6758. struct wmi_pdev_get_tpc_config_cmd *cmd;
  6759. struct sk_buff *skb;
  6760. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  6761. if (!skb)
  6762. return ERR_PTR(-ENOMEM);
  6763. cmd = (struct wmi_pdev_get_tpc_config_cmd *)skb->data;
  6764. cmd->param = __cpu_to_le32(param);
  6765. ath10k_dbg(ar, ATH10K_DBG_WMI,
  6766. "wmi pdev get tpc config param %d\n", param);
  6767. return skb;
  6768. }
  6769. size_t ath10k_wmi_fw_stats_num_peers(struct list_head *head)
  6770. {
  6771. struct ath10k_fw_stats_peer *i;
  6772. size_t num = 0;
  6773. list_for_each_entry(i, head, list)
  6774. ++num;
  6775. return num;
  6776. }
  6777. size_t ath10k_wmi_fw_stats_num_vdevs(struct list_head *head)
  6778. {
  6779. struct ath10k_fw_stats_vdev *i;
  6780. size_t num = 0;
  6781. list_for_each_entry(i, head, list)
  6782. ++num;
  6783. return num;
  6784. }
  6785. static void
  6786. ath10k_wmi_fw_pdev_base_stats_fill(const struct ath10k_fw_stats_pdev *pdev,
  6787. char *buf, u32 *length)
  6788. {
  6789. u32 len = *length;
  6790. u32 buf_len = ATH10K_FW_STATS_BUF_SIZE;
  6791. len += scnprintf(buf + len, buf_len - len, "\n");
  6792. len += scnprintf(buf + len, buf_len - len, "%30s\n",
  6793. "ath10k PDEV stats");
  6794. len += scnprintf(buf + len, buf_len - len, "%30s\n\n",
  6795. "=================");
  6796. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6797. "Channel noise floor", pdev->ch_noise_floor);
  6798. len += scnprintf(buf + len, buf_len - len, "%30s %10u\n",
  6799. "Channel TX power", pdev->chan_tx_power);
  6800. len += scnprintf(buf + len, buf_len - len, "%30s %10u\n",
  6801. "TX frame count", pdev->tx_frame_count);
  6802. len += scnprintf(buf + len, buf_len - len, "%30s %10u\n",
  6803. "RX frame count", pdev->rx_frame_count);
  6804. len += scnprintf(buf + len, buf_len - len, "%30s %10u\n",
  6805. "RX clear count", pdev->rx_clear_count);
  6806. len += scnprintf(buf + len, buf_len - len, "%30s %10u\n",
  6807. "Cycle count", pdev->cycle_count);
  6808. len += scnprintf(buf + len, buf_len - len, "%30s %10u\n",
  6809. "PHY error count", pdev->phy_err_count);
  6810. *length = len;
  6811. }
  6812. static void
  6813. ath10k_wmi_fw_pdev_extra_stats_fill(const struct ath10k_fw_stats_pdev *pdev,
  6814. char *buf, u32 *length)
  6815. {
  6816. u32 len = *length;
  6817. u32 buf_len = ATH10K_FW_STATS_BUF_SIZE;
  6818. len += scnprintf(buf + len, buf_len - len, "%30s %10u\n",
  6819. "RTS bad count", pdev->rts_bad);
  6820. len += scnprintf(buf + len, buf_len - len, "%30s %10u\n",
  6821. "RTS good count", pdev->rts_good);
  6822. len += scnprintf(buf + len, buf_len - len, "%30s %10u\n",
  6823. "FCS bad count", pdev->fcs_bad);
  6824. len += scnprintf(buf + len, buf_len - len, "%30s %10u\n",
  6825. "No beacon count", pdev->no_beacons);
  6826. len += scnprintf(buf + len, buf_len - len, "%30s %10u\n",
  6827. "MIB int count", pdev->mib_int_count);
  6828. len += scnprintf(buf + len, buf_len - len, "\n");
  6829. *length = len;
  6830. }
  6831. static void
  6832. ath10k_wmi_fw_pdev_tx_stats_fill(const struct ath10k_fw_stats_pdev *pdev,
  6833. char *buf, u32 *length)
  6834. {
  6835. u32 len = *length;
  6836. u32 buf_len = ATH10K_FW_STATS_BUF_SIZE;
  6837. len += scnprintf(buf + len, buf_len - len, "\n%30s\n",
  6838. "ath10k PDEV TX stats");
  6839. len += scnprintf(buf + len, buf_len - len, "%30s\n\n",
  6840. "=================");
  6841. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6842. "HTT cookies queued", pdev->comp_queued);
  6843. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6844. "HTT cookies disp.", pdev->comp_delivered);
  6845. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6846. "MSDU queued", pdev->msdu_enqued);
  6847. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6848. "MPDU queued", pdev->mpdu_enqued);
  6849. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6850. "MSDUs dropped", pdev->wmm_drop);
  6851. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6852. "Local enqued", pdev->local_enqued);
  6853. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6854. "Local freed", pdev->local_freed);
  6855. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6856. "HW queued", pdev->hw_queued);
  6857. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6858. "PPDUs reaped", pdev->hw_reaped);
  6859. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6860. "Num underruns", pdev->underrun);
  6861. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6862. "PPDUs cleaned", pdev->tx_abort);
  6863. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6864. "MPDUs requed", pdev->mpdus_requed);
  6865. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6866. "Excessive retries", pdev->tx_ko);
  6867. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6868. "HW rate", pdev->data_rc);
  6869. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6870. "Sched self triggers", pdev->self_triggers);
  6871. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6872. "Dropped due to SW retries",
  6873. pdev->sw_retry_failure);
  6874. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6875. "Illegal rate phy errors",
  6876. pdev->illgl_rate_phy_err);
  6877. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6878. "Pdev continuous xretry", pdev->pdev_cont_xretry);
  6879. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6880. "TX timeout", pdev->pdev_tx_timeout);
  6881. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6882. "PDEV resets", pdev->pdev_resets);
  6883. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6884. "PHY underrun", pdev->phy_underrun);
  6885. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6886. "MPDU is more than txop limit", pdev->txop_ovf);
  6887. *length = len;
  6888. }
  6889. static void
  6890. ath10k_wmi_fw_pdev_rx_stats_fill(const struct ath10k_fw_stats_pdev *pdev,
  6891. char *buf, u32 *length)
  6892. {
  6893. u32 len = *length;
  6894. u32 buf_len = ATH10K_FW_STATS_BUF_SIZE;
  6895. len += scnprintf(buf + len, buf_len - len, "\n%30s\n",
  6896. "ath10k PDEV RX stats");
  6897. len += scnprintf(buf + len, buf_len - len, "%30s\n\n",
  6898. "=================");
  6899. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6900. "Mid PPDU route change",
  6901. pdev->mid_ppdu_route_change);
  6902. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6903. "Tot. number of statuses", pdev->status_rcvd);
  6904. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6905. "Extra frags on rings 0", pdev->r0_frags);
  6906. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6907. "Extra frags on rings 1", pdev->r1_frags);
  6908. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6909. "Extra frags on rings 2", pdev->r2_frags);
  6910. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6911. "Extra frags on rings 3", pdev->r3_frags);
  6912. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6913. "MSDUs delivered to HTT", pdev->htt_msdus);
  6914. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6915. "MPDUs delivered to HTT", pdev->htt_mpdus);
  6916. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6917. "MSDUs delivered to stack", pdev->loc_msdus);
  6918. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6919. "MPDUs delivered to stack", pdev->loc_mpdus);
  6920. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6921. "Oversized AMSUs", pdev->oversize_amsdu);
  6922. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6923. "PHY errors", pdev->phy_errs);
  6924. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6925. "PHY errors drops", pdev->phy_err_drop);
  6926. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6927. "MPDU errors (FCS, MIC, ENC)", pdev->mpdu_errs);
  6928. *length = len;
  6929. }
  6930. static void
  6931. ath10k_wmi_fw_vdev_stats_fill(const struct ath10k_fw_stats_vdev *vdev,
  6932. char *buf, u32 *length)
  6933. {
  6934. u32 len = *length;
  6935. u32 buf_len = ATH10K_FW_STATS_BUF_SIZE;
  6936. int i;
  6937. len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
  6938. "vdev id", vdev->vdev_id);
  6939. len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
  6940. "beacon snr", vdev->beacon_snr);
  6941. len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
  6942. "data snr", vdev->data_snr);
  6943. len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
  6944. "num rx frames", vdev->num_rx_frames);
  6945. len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
  6946. "num rts fail", vdev->num_rts_fail);
  6947. len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
  6948. "num rts success", vdev->num_rts_success);
  6949. len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
  6950. "num rx err", vdev->num_rx_err);
  6951. len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
  6952. "num rx discard", vdev->num_rx_discard);
  6953. len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
  6954. "num tx not acked", vdev->num_tx_not_acked);
  6955. for (i = 0 ; i < ARRAY_SIZE(vdev->num_tx_frames); i++)
  6956. len += scnprintf(buf + len, buf_len - len,
  6957. "%25s [%02d] %u\n",
  6958. "num tx frames", i,
  6959. vdev->num_tx_frames[i]);
  6960. for (i = 0 ; i < ARRAY_SIZE(vdev->num_tx_frames_retries); i++)
  6961. len += scnprintf(buf + len, buf_len - len,
  6962. "%25s [%02d] %u\n",
  6963. "num tx frames retries", i,
  6964. vdev->num_tx_frames_retries[i]);
  6965. for (i = 0 ; i < ARRAY_SIZE(vdev->num_tx_frames_failures); i++)
  6966. len += scnprintf(buf + len, buf_len - len,
  6967. "%25s [%02d] %u\n",
  6968. "num tx frames failures", i,
  6969. vdev->num_tx_frames_failures[i]);
  6970. for (i = 0 ; i < ARRAY_SIZE(vdev->tx_rate_history); i++)
  6971. len += scnprintf(buf + len, buf_len - len,
  6972. "%25s [%02d] 0x%08x\n",
  6973. "tx rate history", i,
  6974. vdev->tx_rate_history[i]);
  6975. for (i = 0 ; i < ARRAY_SIZE(vdev->beacon_rssi_history); i++)
  6976. len += scnprintf(buf + len, buf_len - len,
  6977. "%25s [%02d] %u\n",
  6978. "beacon rssi history", i,
  6979. vdev->beacon_rssi_history[i]);
  6980. len += scnprintf(buf + len, buf_len - len, "\n");
  6981. *length = len;
  6982. }
  6983. static void
  6984. ath10k_wmi_fw_peer_stats_fill(const struct ath10k_fw_stats_peer *peer,
  6985. char *buf, u32 *length)
  6986. {
  6987. u32 len = *length;
  6988. u32 buf_len = ATH10K_FW_STATS_BUF_SIZE;
  6989. len += scnprintf(buf + len, buf_len - len, "%30s %pM\n",
  6990. "Peer MAC address", peer->peer_macaddr);
  6991. len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
  6992. "Peer RSSI", peer->peer_rssi);
  6993. len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
  6994. "Peer TX rate", peer->peer_tx_rate);
  6995. len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
  6996. "Peer RX rate", peer->peer_rx_rate);
  6997. len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
  6998. "Peer RX duration", peer->rx_duration);
  6999. len += scnprintf(buf + len, buf_len - len, "\n");
  7000. *length = len;
  7001. }
  7002. void ath10k_wmi_main_op_fw_stats_fill(struct ath10k *ar,
  7003. struct ath10k_fw_stats *fw_stats,
  7004. char *buf)
  7005. {
  7006. u32 len = 0;
  7007. u32 buf_len = ATH10K_FW_STATS_BUF_SIZE;
  7008. const struct ath10k_fw_stats_pdev *pdev;
  7009. const struct ath10k_fw_stats_vdev *vdev;
  7010. const struct ath10k_fw_stats_peer *peer;
  7011. size_t num_peers;
  7012. size_t num_vdevs;
  7013. spin_lock_bh(&ar->data_lock);
  7014. pdev = list_first_entry_or_null(&fw_stats->pdevs,
  7015. struct ath10k_fw_stats_pdev, list);
  7016. if (!pdev) {
  7017. ath10k_warn(ar, "failed to get pdev stats\n");
  7018. goto unlock;
  7019. }
  7020. num_peers = ath10k_wmi_fw_stats_num_peers(&fw_stats->peers);
  7021. num_vdevs = ath10k_wmi_fw_stats_num_vdevs(&fw_stats->vdevs);
  7022. ath10k_wmi_fw_pdev_base_stats_fill(pdev, buf, &len);
  7023. ath10k_wmi_fw_pdev_tx_stats_fill(pdev, buf, &len);
  7024. ath10k_wmi_fw_pdev_rx_stats_fill(pdev, buf, &len);
  7025. len += scnprintf(buf + len, buf_len - len, "\n");
  7026. len += scnprintf(buf + len, buf_len - len, "%30s (%zu)\n",
  7027. "ath10k VDEV stats", num_vdevs);
  7028. len += scnprintf(buf + len, buf_len - len, "%30s\n\n",
  7029. "=================");
  7030. list_for_each_entry(vdev, &fw_stats->vdevs, list) {
  7031. ath10k_wmi_fw_vdev_stats_fill(vdev, buf, &len);
  7032. }
  7033. len += scnprintf(buf + len, buf_len - len, "\n");
  7034. len += scnprintf(buf + len, buf_len - len, "%30s (%zu)\n",
  7035. "ath10k PEER stats", num_peers);
  7036. len += scnprintf(buf + len, buf_len - len, "%30s\n\n",
  7037. "=================");
  7038. list_for_each_entry(peer, &fw_stats->peers, list) {
  7039. ath10k_wmi_fw_peer_stats_fill(peer, buf, &len);
  7040. }
  7041. unlock:
  7042. spin_unlock_bh(&ar->data_lock);
  7043. if (len >= buf_len)
  7044. buf[len - 1] = 0;
  7045. else
  7046. buf[len] = 0;
  7047. }
  7048. void ath10k_wmi_10x_op_fw_stats_fill(struct ath10k *ar,
  7049. struct ath10k_fw_stats *fw_stats,
  7050. char *buf)
  7051. {
  7052. unsigned int len = 0;
  7053. unsigned int buf_len = ATH10K_FW_STATS_BUF_SIZE;
  7054. const struct ath10k_fw_stats_pdev *pdev;
  7055. const struct ath10k_fw_stats_vdev *vdev;
  7056. const struct ath10k_fw_stats_peer *peer;
  7057. size_t num_peers;
  7058. size_t num_vdevs;
  7059. spin_lock_bh(&ar->data_lock);
  7060. pdev = list_first_entry_or_null(&fw_stats->pdevs,
  7061. struct ath10k_fw_stats_pdev, list);
  7062. if (!pdev) {
  7063. ath10k_warn(ar, "failed to get pdev stats\n");
  7064. goto unlock;
  7065. }
  7066. num_peers = ath10k_wmi_fw_stats_num_peers(&fw_stats->peers);
  7067. num_vdevs = ath10k_wmi_fw_stats_num_vdevs(&fw_stats->vdevs);
  7068. ath10k_wmi_fw_pdev_base_stats_fill(pdev, buf, &len);
  7069. ath10k_wmi_fw_pdev_extra_stats_fill(pdev, buf, &len);
  7070. ath10k_wmi_fw_pdev_tx_stats_fill(pdev, buf, &len);
  7071. ath10k_wmi_fw_pdev_rx_stats_fill(pdev, buf, &len);
  7072. len += scnprintf(buf + len, buf_len - len, "\n");
  7073. len += scnprintf(buf + len, buf_len - len, "%30s (%zu)\n",
  7074. "ath10k VDEV stats", num_vdevs);
  7075. len += scnprintf(buf + len, buf_len - len, "%30s\n\n",
  7076. "=================");
  7077. list_for_each_entry(vdev, &fw_stats->vdevs, list) {
  7078. ath10k_wmi_fw_vdev_stats_fill(vdev, buf, &len);
  7079. }
  7080. len += scnprintf(buf + len, buf_len - len, "\n");
  7081. len += scnprintf(buf + len, buf_len - len, "%30s (%zu)\n",
  7082. "ath10k PEER stats", num_peers);
  7083. len += scnprintf(buf + len, buf_len - len, "%30s\n\n",
  7084. "=================");
  7085. list_for_each_entry(peer, &fw_stats->peers, list) {
  7086. ath10k_wmi_fw_peer_stats_fill(peer, buf, &len);
  7087. }
  7088. unlock:
  7089. spin_unlock_bh(&ar->data_lock);
  7090. if (len >= buf_len)
  7091. buf[len - 1] = 0;
  7092. else
  7093. buf[len] = 0;
  7094. }
  7095. static struct sk_buff *
  7096. ath10k_wmi_op_gen_pdev_enable_adaptive_cca(struct ath10k *ar, u8 enable,
  7097. u32 detect_level, u32 detect_margin)
  7098. {
  7099. struct wmi_pdev_set_adaptive_cca_params *cmd;
  7100. struct sk_buff *skb;
  7101. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  7102. if (!skb)
  7103. return ERR_PTR(-ENOMEM);
  7104. cmd = (struct wmi_pdev_set_adaptive_cca_params *)skb->data;
  7105. cmd->enable = __cpu_to_le32(enable);
  7106. cmd->cca_detect_level = __cpu_to_le32(detect_level);
  7107. cmd->cca_detect_margin = __cpu_to_le32(detect_margin);
  7108. ath10k_dbg(ar, ATH10K_DBG_WMI,
  7109. "wmi pdev set adaptive cca params enable:%d detection level:%d detection margin:%d\n",
  7110. enable, detect_level, detect_margin);
  7111. return skb;
  7112. }
  7113. static void
  7114. ath10k_wmi_fw_vdev_stats_extd_fill(const struct ath10k_fw_stats_vdev_extd *vdev,
  7115. char *buf, u32 *length)
  7116. {
  7117. u32 len = *length;
  7118. u32 buf_len = ATH10K_FW_STATS_BUF_SIZE;
  7119. u32 val;
  7120. len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
  7121. "vdev id", vdev->vdev_id);
  7122. len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
  7123. "ppdu aggr count", vdev->ppdu_aggr_cnt);
  7124. len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
  7125. "ppdu noack", vdev->ppdu_noack);
  7126. len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
  7127. "mpdu queued", vdev->mpdu_queued);
  7128. len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
  7129. "ppdu nonaggr count", vdev->ppdu_nonaggr_cnt);
  7130. len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
  7131. "mpdu sw requeued", vdev->mpdu_sw_requeued);
  7132. len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
  7133. "mpdu success retry", vdev->mpdu_suc_retry);
  7134. len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
  7135. "mpdu success multitry", vdev->mpdu_suc_multitry);
  7136. len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
  7137. "mpdu fail retry", vdev->mpdu_fail_retry);
  7138. val = vdev->tx_ftm_suc;
  7139. if (val & WMI_VDEV_STATS_FTM_COUNT_VALID)
  7140. len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
  7141. "tx ftm success",
  7142. MS(val, WMI_VDEV_STATS_FTM_COUNT));
  7143. val = vdev->tx_ftm_suc_retry;
  7144. if (val & WMI_VDEV_STATS_FTM_COUNT_VALID)
  7145. len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
  7146. "tx ftm success retry",
  7147. MS(val, WMI_VDEV_STATS_FTM_COUNT));
  7148. val = vdev->tx_ftm_fail;
  7149. if (val & WMI_VDEV_STATS_FTM_COUNT_VALID)
  7150. len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
  7151. "tx ftm fail",
  7152. MS(val, WMI_VDEV_STATS_FTM_COUNT));
  7153. val = vdev->rx_ftmr_cnt;
  7154. if (val & WMI_VDEV_STATS_FTM_COUNT_VALID)
  7155. len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
  7156. "rx ftm request count",
  7157. MS(val, WMI_VDEV_STATS_FTM_COUNT));
  7158. val = vdev->rx_ftmr_dup_cnt;
  7159. if (val & WMI_VDEV_STATS_FTM_COUNT_VALID)
  7160. len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
  7161. "rx ftm request dup count",
  7162. MS(val, WMI_VDEV_STATS_FTM_COUNT));
  7163. val = vdev->rx_iftmr_cnt;
  7164. if (val & WMI_VDEV_STATS_FTM_COUNT_VALID)
  7165. len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
  7166. "rx initial ftm req count",
  7167. MS(val, WMI_VDEV_STATS_FTM_COUNT));
  7168. val = vdev->rx_iftmr_dup_cnt;
  7169. if (val & WMI_VDEV_STATS_FTM_COUNT_VALID)
  7170. len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
  7171. "rx initial ftm req dup cnt",
  7172. MS(val, WMI_VDEV_STATS_FTM_COUNT));
  7173. len += scnprintf(buf + len, buf_len - len, "\n");
  7174. *length = len;
  7175. }
  7176. void ath10k_wmi_10_4_op_fw_stats_fill(struct ath10k *ar,
  7177. struct ath10k_fw_stats *fw_stats,
  7178. char *buf)
  7179. {
  7180. u32 len = 0;
  7181. u32 buf_len = ATH10K_FW_STATS_BUF_SIZE;
  7182. const struct ath10k_fw_stats_pdev *pdev;
  7183. const struct ath10k_fw_stats_vdev_extd *vdev;
  7184. const struct ath10k_fw_stats_peer *peer;
  7185. size_t num_peers;
  7186. size_t num_vdevs;
  7187. spin_lock_bh(&ar->data_lock);
  7188. pdev = list_first_entry_or_null(&fw_stats->pdevs,
  7189. struct ath10k_fw_stats_pdev, list);
  7190. if (!pdev) {
  7191. ath10k_warn(ar, "failed to get pdev stats\n");
  7192. goto unlock;
  7193. }
  7194. num_peers = ath10k_wmi_fw_stats_num_peers(&fw_stats->peers);
  7195. num_vdevs = ath10k_wmi_fw_stats_num_vdevs(&fw_stats->vdevs);
  7196. ath10k_wmi_fw_pdev_base_stats_fill(pdev, buf, &len);
  7197. ath10k_wmi_fw_pdev_extra_stats_fill(pdev, buf, &len);
  7198. ath10k_wmi_fw_pdev_tx_stats_fill(pdev, buf, &len);
  7199. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  7200. "HW paused", pdev->hw_paused);
  7201. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  7202. "Seqs posted", pdev->seq_posted);
  7203. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  7204. "Seqs failed queueing", pdev->seq_failed_queueing);
  7205. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  7206. "Seqs completed", pdev->seq_completed);
  7207. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  7208. "Seqs restarted", pdev->seq_restarted);
  7209. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  7210. "MU Seqs posted", pdev->mu_seq_posted);
  7211. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  7212. "MPDUs SW flushed", pdev->mpdus_sw_flush);
  7213. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  7214. "MPDUs HW filtered", pdev->mpdus_hw_filter);
  7215. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  7216. "MPDUs truncated", pdev->mpdus_truncated);
  7217. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  7218. "MPDUs receive no ACK", pdev->mpdus_ack_failed);
  7219. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  7220. "MPDUs expired", pdev->mpdus_expired);
  7221. ath10k_wmi_fw_pdev_rx_stats_fill(pdev, buf, &len);
  7222. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  7223. "Num Rx Overflow errors", pdev->rx_ovfl_errs);
  7224. len += scnprintf(buf + len, buf_len - len, "\n");
  7225. len += scnprintf(buf + len, buf_len - len, "%30s (%zu)\n",
  7226. "ath10k VDEV stats", num_vdevs);
  7227. len += scnprintf(buf + len, buf_len - len, "%30s\n\n",
  7228. "=================");
  7229. list_for_each_entry(vdev, &fw_stats->vdevs, list) {
  7230. ath10k_wmi_fw_vdev_stats_extd_fill(vdev, buf, &len);
  7231. }
  7232. len += scnprintf(buf + len, buf_len - len, "\n");
  7233. len += scnprintf(buf + len, buf_len - len, "%30s (%zu)\n",
  7234. "ath10k PEER stats", num_peers);
  7235. len += scnprintf(buf + len, buf_len - len, "%30s\n\n",
  7236. "=================");
  7237. list_for_each_entry(peer, &fw_stats->peers, list) {
  7238. ath10k_wmi_fw_peer_stats_fill(peer, buf, &len);
  7239. }
  7240. unlock:
  7241. spin_unlock_bh(&ar->data_lock);
  7242. if (len >= buf_len)
  7243. buf[len - 1] = 0;
  7244. else
  7245. buf[len] = 0;
  7246. }
  7247. int ath10k_wmi_op_get_vdev_subtype(struct ath10k *ar,
  7248. enum wmi_vdev_subtype subtype)
  7249. {
  7250. switch (subtype) {
  7251. case WMI_VDEV_SUBTYPE_NONE:
  7252. return WMI_VDEV_SUBTYPE_LEGACY_NONE;
  7253. case WMI_VDEV_SUBTYPE_P2P_DEVICE:
  7254. return WMI_VDEV_SUBTYPE_LEGACY_P2P_DEV;
  7255. case WMI_VDEV_SUBTYPE_P2P_CLIENT:
  7256. return WMI_VDEV_SUBTYPE_LEGACY_P2P_CLI;
  7257. case WMI_VDEV_SUBTYPE_P2P_GO:
  7258. return WMI_VDEV_SUBTYPE_LEGACY_P2P_GO;
  7259. case WMI_VDEV_SUBTYPE_PROXY_STA:
  7260. return WMI_VDEV_SUBTYPE_LEGACY_PROXY_STA;
  7261. case WMI_VDEV_SUBTYPE_MESH_11S:
  7262. case WMI_VDEV_SUBTYPE_MESH_NON_11S:
  7263. return -ENOTSUPP;
  7264. }
  7265. return -ENOTSUPP;
  7266. }
  7267. static int ath10k_wmi_10_2_4_op_get_vdev_subtype(struct ath10k *ar,
  7268. enum wmi_vdev_subtype subtype)
  7269. {
  7270. switch (subtype) {
  7271. case WMI_VDEV_SUBTYPE_NONE:
  7272. return WMI_VDEV_SUBTYPE_10_2_4_NONE;
  7273. case WMI_VDEV_SUBTYPE_P2P_DEVICE:
  7274. return WMI_VDEV_SUBTYPE_10_2_4_P2P_DEV;
  7275. case WMI_VDEV_SUBTYPE_P2P_CLIENT:
  7276. return WMI_VDEV_SUBTYPE_10_2_4_P2P_CLI;
  7277. case WMI_VDEV_SUBTYPE_P2P_GO:
  7278. return WMI_VDEV_SUBTYPE_10_2_4_P2P_GO;
  7279. case WMI_VDEV_SUBTYPE_PROXY_STA:
  7280. return WMI_VDEV_SUBTYPE_10_2_4_PROXY_STA;
  7281. case WMI_VDEV_SUBTYPE_MESH_11S:
  7282. return WMI_VDEV_SUBTYPE_10_2_4_MESH_11S;
  7283. case WMI_VDEV_SUBTYPE_MESH_NON_11S:
  7284. return -ENOTSUPP;
  7285. }
  7286. return -ENOTSUPP;
  7287. }
  7288. static int ath10k_wmi_10_4_op_get_vdev_subtype(struct ath10k *ar,
  7289. enum wmi_vdev_subtype subtype)
  7290. {
  7291. switch (subtype) {
  7292. case WMI_VDEV_SUBTYPE_NONE:
  7293. return WMI_VDEV_SUBTYPE_10_4_NONE;
  7294. case WMI_VDEV_SUBTYPE_P2P_DEVICE:
  7295. return WMI_VDEV_SUBTYPE_10_4_P2P_DEV;
  7296. case WMI_VDEV_SUBTYPE_P2P_CLIENT:
  7297. return WMI_VDEV_SUBTYPE_10_4_P2P_CLI;
  7298. case WMI_VDEV_SUBTYPE_P2P_GO:
  7299. return WMI_VDEV_SUBTYPE_10_4_P2P_GO;
  7300. case WMI_VDEV_SUBTYPE_PROXY_STA:
  7301. return WMI_VDEV_SUBTYPE_10_4_PROXY_STA;
  7302. case WMI_VDEV_SUBTYPE_MESH_11S:
  7303. return WMI_VDEV_SUBTYPE_10_4_MESH_11S;
  7304. case WMI_VDEV_SUBTYPE_MESH_NON_11S:
  7305. return WMI_VDEV_SUBTYPE_10_4_MESH_NON_11S;
  7306. }
  7307. return -ENOTSUPP;
  7308. }
  7309. static struct sk_buff *
  7310. ath10k_wmi_10_4_ext_resource_config(struct ath10k *ar,
  7311. enum wmi_host_platform_type type,
  7312. u32 fw_feature_bitmap)
  7313. {
  7314. struct wmi_ext_resource_config_10_4_cmd *cmd;
  7315. struct sk_buff *skb;
  7316. u32 num_tdls_sleep_sta = 0;
  7317. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  7318. if (!skb)
  7319. return ERR_PTR(-ENOMEM);
  7320. if (test_bit(WMI_SERVICE_TDLS_UAPSD_SLEEP_STA, ar->wmi.svc_map))
  7321. num_tdls_sleep_sta = TARGET_10_4_NUM_TDLS_SLEEP_STA;
  7322. cmd = (struct wmi_ext_resource_config_10_4_cmd *)skb->data;
  7323. cmd->host_platform_config = __cpu_to_le32(type);
  7324. cmd->fw_feature_bitmap = __cpu_to_le32(fw_feature_bitmap);
  7325. cmd->wlan_gpio_priority = __cpu_to_le32(-1);
  7326. cmd->coex_version = __cpu_to_le32(WMI_NO_COEX_VERSION_SUPPORT);
  7327. cmd->coex_gpio_pin1 = __cpu_to_le32(-1);
  7328. cmd->coex_gpio_pin2 = __cpu_to_le32(-1);
  7329. cmd->coex_gpio_pin3 = __cpu_to_le32(-1);
  7330. cmd->num_tdls_vdevs = __cpu_to_le32(TARGET_10_4_NUM_TDLS_VDEVS);
  7331. cmd->num_tdls_conn_table_entries = __cpu_to_le32(20);
  7332. cmd->max_tdls_concurrent_sleep_sta = __cpu_to_le32(num_tdls_sleep_sta);
  7333. cmd->max_tdls_concurrent_buffer_sta =
  7334. __cpu_to_le32(TARGET_10_4_NUM_TDLS_BUFFER_STA);
  7335. ath10k_dbg(ar, ATH10K_DBG_WMI,
  7336. "wmi ext resource config host type %d firmware feature bitmap %08x\n",
  7337. type, fw_feature_bitmap);
  7338. return skb;
  7339. }
  7340. static struct sk_buff *
  7341. ath10k_wmi_10_4_gen_update_fw_tdls_state(struct ath10k *ar, u32 vdev_id,
  7342. enum wmi_tdls_state state)
  7343. {
  7344. struct wmi_10_4_tdls_set_state_cmd *cmd;
  7345. struct sk_buff *skb;
  7346. u32 options = 0;
  7347. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  7348. if (!skb)
  7349. return ERR_PTR(-ENOMEM);
  7350. if (test_bit(WMI_SERVICE_TDLS_EXPLICIT_MODE_ONLY, ar->wmi.svc_map) &&
  7351. state == WMI_TDLS_ENABLE_ACTIVE)
  7352. state = WMI_TDLS_ENABLE_PASSIVE;
  7353. if (test_bit(WMI_SERVICE_TDLS_UAPSD_BUFFER_STA, ar->wmi.svc_map))
  7354. options |= WMI_TDLS_BUFFER_STA_EN;
  7355. cmd = (struct wmi_10_4_tdls_set_state_cmd *)skb->data;
  7356. cmd->vdev_id = __cpu_to_le32(vdev_id);
  7357. cmd->state = __cpu_to_le32(state);
  7358. cmd->notification_interval_ms = __cpu_to_le32(5000);
  7359. cmd->tx_discovery_threshold = __cpu_to_le32(100);
  7360. cmd->tx_teardown_threshold = __cpu_to_le32(5);
  7361. cmd->rssi_teardown_threshold = __cpu_to_le32(-75);
  7362. cmd->rssi_delta = __cpu_to_le32(-20);
  7363. cmd->tdls_options = __cpu_to_le32(options);
  7364. cmd->tdls_peer_traffic_ind_window = __cpu_to_le32(2);
  7365. cmd->tdls_peer_traffic_response_timeout_ms = __cpu_to_le32(5000);
  7366. cmd->tdls_puapsd_mask = __cpu_to_le32(0xf);
  7367. cmd->tdls_puapsd_inactivity_time_ms = __cpu_to_le32(0);
  7368. cmd->tdls_puapsd_rx_frame_threshold = __cpu_to_le32(10);
  7369. cmd->teardown_notification_ms = __cpu_to_le32(10);
  7370. cmd->tdls_peer_kickout_threshold = __cpu_to_le32(96);
  7371. ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi update fw tdls state %d for vdev %i\n",
  7372. state, vdev_id);
  7373. return skb;
  7374. }
  7375. static u32 ath10k_wmi_prepare_peer_qos(u8 uapsd_queues, u8 sp)
  7376. {
  7377. u32 peer_qos = 0;
  7378. if (uapsd_queues & IEEE80211_WMM_IE_STA_QOSINFO_AC_VO)
  7379. peer_qos |= WMI_TDLS_PEER_QOS_AC_VO;
  7380. if (uapsd_queues & IEEE80211_WMM_IE_STA_QOSINFO_AC_VI)
  7381. peer_qos |= WMI_TDLS_PEER_QOS_AC_VI;
  7382. if (uapsd_queues & IEEE80211_WMM_IE_STA_QOSINFO_AC_BK)
  7383. peer_qos |= WMI_TDLS_PEER_QOS_AC_BK;
  7384. if (uapsd_queues & IEEE80211_WMM_IE_STA_QOSINFO_AC_BE)
  7385. peer_qos |= WMI_TDLS_PEER_QOS_AC_BE;
  7386. peer_qos |= SM(sp, WMI_TDLS_PEER_SP);
  7387. return peer_qos;
  7388. }
  7389. static struct sk_buff *
  7390. ath10k_wmi_10_4_op_gen_pdev_get_tpc_table_cmdid(struct ath10k *ar, u32 param)
  7391. {
  7392. struct wmi_pdev_get_tpc_table_cmd *cmd;
  7393. struct sk_buff *skb;
  7394. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  7395. if (!skb)
  7396. return ERR_PTR(-ENOMEM);
  7397. cmd = (struct wmi_pdev_get_tpc_table_cmd *)skb->data;
  7398. cmd->param = __cpu_to_le32(param);
  7399. ath10k_dbg(ar, ATH10K_DBG_WMI,
  7400. "wmi pdev get tpc table param:%d\n", param);
  7401. return skb;
  7402. }
  7403. static struct sk_buff *
  7404. ath10k_wmi_10_4_gen_tdls_peer_update(struct ath10k *ar,
  7405. const struct wmi_tdls_peer_update_cmd_arg *arg,
  7406. const struct wmi_tdls_peer_capab_arg *cap,
  7407. const struct wmi_channel_arg *chan_arg)
  7408. {
  7409. struct wmi_10_4_tdls_peer_update_cmd *cmd;
  7410. struct wmi_tdls_peer_capabilities *peer_cap;
  7411. struct wmi_channel *chan;
  7412. struct sk_buff *skb;
  7413. u32 peer_qos;
  7414. int len, chan_len;
  7415. int i;
  7416. /* tdls peer update cmd has place holder for one channel*/
  7417. chan_len = cap->peer_chan_len ? (cap->peer_chan_len - 1) : 0;
  7418. len = sizeof(*cmd) + chan_len * sizeof(*chan);
  7419. skb = ath10k_wmi_alloc_skb(ar, len);
  7420. if (!skb)
  7421. return ERR_PTR(-ENOMEM);
  7422. memset(skb->data, 0, sizeof(*cmd));
  7423. cmd = (struct wmi_10_4_tdls_peer_update_cmd *)skb->data;
  7424. cmd->vdev_id = __cpu_to_le32(arg->vdev_id);
  7425. ether_addr_copy(cmd->peer_macaddr.addr, arg->addr);
  7426. cmd->peer_state = __cpu_to_le32(arg->peer_state);
  7427. peer_qos = ath10k_wmi_prepare_peer_qos(cap->peer_uapsd_queues,
  7428. cap->peer_max_sp);
  7429. peer_cap = &cmd->peer_capab;
  7430. peer_cap->peer_qos = __cpu_to_le32(peer_qos);
  7431. peer_cap->buff_sta_support = __cpu_to_le32(cap->buff_sta_support);
  7432. peer_cap->off_chan_support = __cpu_to_le32(cap->off_chan_support);
  7433. peer_cap->peer_curr_operclass = __cpu_to_le32(cap->peer_curr_operclass);
  7434. peer_cap->self_curr_operclass = __cpu_to_le32(cap->self_curr_operclass);
  7435. peer_cap->peer_chan_len = __cpu_to_le32(cap->peer_chan_len);
  7436. peer_cap->peer_operclass_len = __cpu_to_le32(cap->peer_operclass_len);
  7437. for (i = 0; i < WMI_TDLS_MAX_SUPP_OPER_CLASSES; i++)
  7438. peer_cap->peer_operclass[i] = cap->peer_operclass[i];
  7439. peer_cap->is_peer_responder = __cpu_to_le32(cap->is_peer_responder);
  7440. peer_cap->pref_offchan_num = __cpu_to_le32(cap->pref_offchan_num);
  7441. peer_cap->pref_offchan_bw = __cpu_to_le32(cap->pref_offchan_bw);
  7442. for (i = 0; i < cap->peer_chan_len; i++) {
  7443. chan = (struct wmi_channel *)&peer_cap->peer_chan_list[i];
  7444. ath10k_wmi_put_wmi_channel(chan, &chan_arg[i]);
  7445. }
  7446. ath10k_dbg(ar, ATH10K_DBG_WMI,
  7447. "wmi tdls peer update vdev %i state %d n_chans %u\n",
  7448. arg->vdev_id, arg->peer_state, cap->peer_chan_len);
  7449. return skb;
  7450. }
  7451. static struct sk_buff *
  7452. ath10k_wmi_10_4_gen_radar_found(struct ath10k *ar,
  7453. const struct ath10k_radar_found_info *arg)
  7454. {
  7455. struct wmi_radar_found_info *cmd;
  7456. struct sk_buff *skb;
  7457. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  7458. if (!skb)
  7459. return ERR_PTR(-ENOMEM);
  7460. cmd = (struct wmi_radar_found_info *)skb->data;
  7461. cmd->pri_min = __cpu_to_le32(arg->pri_min);
  7462. cmd->pri_max = __cpu_to_le32(arg->pri_max);
  7463. cmd->width_min = __cpu_to_le32(arg->width_min);
  7464. cmd->width_max = __cpu_to_le32(arg->width_max);
  7465. cmd->sidx_min = __cpu_to_le32(arg->sidx_min);
  7466. cmd->sidx_max = __cpu_to_le32(arg->sidx_max);
  7467. ath10k_dbg(ar, ATH10K_DBG_WMI,
  7468. "wmi radar found pri_min %d pri_max %d width_min %d width_max %d sidx_min %d sidx_max %d\n",
  7469. arg->pri_min, arg->pri_max, arg->width_min,
  7470. arg->width_max, arg->sidx_min, arg->sidx_max);
  7471. return skb;
  7472. }
  7473. static struct sk_buff *
  7474. ath10k_wmi_op_gen_echo(struct ath10k *ar, u32 value)
  7475. {
  7476. struct wmi_echo_cmd *cmd;
  7477. struct sk_buff *skb;
  7478. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  7479. if (!skb)
  7480. return ERR_PTR(-ENOMEM);
  7481. cmd = (struct wmi_echo_cmd *)skb->data;
  7482. cmd->value = cpu_to_le32(value);
  7483. ath10k_dbg(ar, ATH10K_DBG_WMI,
  7484. "wmi echo value 0x%08x\n", value);
  7485. return skb;
  7486. }
  7487. int
  7488. ath10k_wmi_barrier(struct ath10k *ar)
  7489. {
  7490. int ret;
  7491. int time_left;
  7492. spin_lock_bh(&ar->data_lock);
  7493. reinit_completion(&ar->wmi.barrier);
  7494. spin_unlock_bh(&ar->data_lock);
  7495. ret = ath10k_wmi_echo(ar, ATH10K_WMI_BARRIER_ECHO_ID);
  7496. if (ret) {
  7497. ath10k_warn(ar, "failed to submit wmi echo: %d\n", ret);
  7498. return ret;
  7499. }
  7500. time_left = wait_for_completion_timeout(&ar->wmi.barrier,
  7501. ATH10K_WMI_BARRIER_TIMEOUT_HZ);
  7502. if (!time_left)
  7503. return -ETIMEDOUT;
  7504. return 0;
  7505. }
  7506. static const struct wmi_ops wmi_ops = {
  7507. .rx = ath10k_wmi_op_rx,
  7508. .map_svc = wmi_main_svc_map,
  7509. .pull_scan = ath10k_wmi_op_pull_scan_ev,
  7510. .pull_mgmt_rx = ath10k_wmi_op_pull_mgmt_rx_ev,
  7511. .pull_ch_info = ath10k_wmi_op_pull_ch_info_ev,
  7512. .pull_vdev_start = ath10k_wmi_op_pull_vdev_start_ev,
  7513. .pull_peer_kick = ath10k_wmi_op_pull_peer_kick_ev,
  7514. .pull_swba = ath10k_wmi_op_pull_swba_ev,
  7515. .pull_phyerr_hdr = ath10k_wmi_op_pull_phyerr_ev_hdr,
  7516. .pull_phyerr = ath10k_wmi_op_pull_phyerr_ev,
  7517. .pull_svc_rdy = ath10k_wmi_main_op_pull_svc_rdy_ev,
  7518. .pull_rdy = ath10k_wmi_op_pull_rdy_ev,
  7519. .pull_fw_stats = ath10k_wmi_main_op_pull_fw_stats,
  7520. .pull_roam_ev = ath10k_wmi_op_pull_roam_ev,
  7521. .pull_echo_ev = ath10k_wmi_op_pull_echo_ev,
  7522. .gen_pdev_suspend = ath10k_wmi_op_gen_pdev_suspend,
  7523. .gen_pdev_resume = ath10k_wmi_op_gen_pdev_resume,
  7524. .gen_pdev_set_rd = ath10k_wmi_op_gen_pdev_set_rd,
  7525. .gen_pdev_set_param = ath10k_wmi_op_gen_pdev_set_param,
  7526. .gen_init = ath10k_wmi_op_gen_init,
  7527. .gen_start_scan = ath10k_wmi_op_gen_start_scan,
  7528. .gen_stop_scan = ath10k_wmi_op_gen_stop_scan,
  7529. .gen_vdev_create = ath10k_wmi_op_gen_vdev_create,
  7530. .gen_vdev_delete = ath10k_wmi_op_gen_vdev_delete,
  7531. .gen_vdev_start = ath10k_wmi_op_gen_vdev_start,
  7532. .gen_vdev_stop = ath10k_wmi_op_gen_vdev_stop,
  7533. .gen_vdev_up = ath10k_wmi_op_gen_vdev_up,
  7534. .gen_vdev_down = ath10k_wmi_op_gen_vdev_down,
  7535. .gen_vdev_set_param = ath10k_wmi_op_gen_vdev_set_param,
  7536. .gen_vdev_install_key = ath10k_wmi_op_gen_vdev_install_key,
  7537. .gen_vdev_spectral_conf = ath10k_wmi_op_gen_vdev_spectral_conf,
  7538. .gen_vdev_spectral_enable = ath10k_wmi_op_gen_vdev_spectral_enable,
  7539. /* .gen_vdev_wmm_conf not implemented */
  7540. .gen_peer_create = ath10k_wmi_op_gen_peer_create,
  7541. .gen_peer_delete = ath10k_wmi_op_gen_peer_delete,
  7542. .gen_peer_flush = ath10k_wmi_op_gen_peer_flush,
  7543. .gen_peer_set_param = ath10k_wmi_op_gen_peer_set_param,
  7544. .gen_peer_assoc = ath10k_wmi_op_gen_peer_assoc,
  7545. .gen_set_psmode = ath10k_wmi_op_gen_set_psmode,
  7546. .gen_set_sta_ps = ath10k_wmi_op_gen_set_sta_ps,
  7547. .gen_set_ap_ps = ath10k_wmi_op_gen_set_ap_ps,
  7548. .gen_scan_chan_list = ath10k_wmi_op_gen_scan_chan_list,
  7549. .gen_beacon_dma = ath10k_wmi_op_gen_beacon_dma,
  7550. .gen_pdev_set_wmm = ath10k_wmi_op_gen_pdev_set_wmm,
  7551. .gen_request_stats = ath10k_wmi_op_gen_request_stats,
  7552. .gen_force_fw_hang = ath10k_wmi_op_gen_force_fw_hang,
  7553. .gen_mgmt_tx = ath10k_wmi_op_gen_mgmt_tx,
  7554. .gen_dbglog_cfg = ath10k_wmi_op_gen_dbglog_cfg,
  7555. .gen_pktlog_enable = ath10k_wmi_op_gen_pktlog_enable,
  7556. .gen_pktlog_disable = ath10k_wmi_op_gen_pktlog_disable,
  7557. .gen_pdev_set_quiet_mode = ath10k_wmi_op_gen_pdev_set_quiet_mode,
  7558. /* .gen_pdev_get_temperature not implemented */
  7559. .gen_addba_clear_resp = ath10k_wmi_op_gen_addba_clear_resp,
  7560. .gen_addba_send = ath10k_wmi_op_gen_addba_send,
  7561. .gen_addba_set_resp = ath10k_wmi_op_gen_addba_set_resp,
  7562. .gen_delba_send = ath10k_wmi_op_gen_delba_send,
  7563. .fw_stats_fill = ath10k_wmi_main_op_fw_stats_fill,
  7564. .get_vdev_subtype = ath10k_wmi_op_get_vdev_subtype,
  7565. .gen_echo = ath10k_wmi_op_gen_echo,
  7566. /* .gen_bcn_tmpl not implemented */
  7567. /* .gen_prb_tmpl not implemented */
  7568. /* .gen_p2p_go_bcn_ie not implemented */
  7569. /* .gen_adaptive_qcs not implemented */
  7570. /* .gen_pdev_enable_adaptive_cca not implemented */
  7571. };
  7572. static const struct wmi_ops wmi_10_1_ops = {
  7573. .rx = ath10k_wmi_10_1_op_rx,
  7574. .map_svc = wmi_10x_svc_map,
  7575. .pull_svc_rdy = ath10k_wmi_10x_op_pull_svc_rdy_ev,
  7576. .pull_fw_stats = ath10k_wmi_10x_op_pull_fw_stats,
  7577. .gen_init = ath10k_wmi_10_1_op_gen_init,
  7578. .gen_pdev_set_rd = ath10k_wmi_10x_op_gen_pdev_set_rd,
  7579. .gen_start_scan = ath10k_wmi_10x_op_gen_start_scan,
  7580. .gen_peer_assoc = ath10k_wmi_10_1_op_gen_peer_assoc,
  7581. /* .gen_pdev_get_temperature not implemented */
  7582. /* shared with main branch */
  7583. .pull_scan = ath10k_wmi_op_pull_scan_ev,
  7584. .pull_mgmt_rx = ath10k_wmi_op_pull_mgmt_rx_ev,
  7585. .pull_ch_info = ath10k_wmi_op_pull_ch_info_ev,
  7586. .pull_vdev_start = ath10k_wmi_op_pull_vdev_start_ev,
  7587. .pull_peer_kick = ath10k_wmi_op_pull_peer_kick_ev,
  7588. .pull_swba = ath10k_wmi_op_pull_swba_ev,
  7589. .pull_phyerr_hdr = ath10k_wmi_op_pull_phyerr_ev_hdr,
  7590. .pull_phyerr = ath10k_wmi_op_pull_phyerr_ev,
  7591. .pull_rdy = ath10k_wmi_op_pull_rdy_ev,
  7592. .pull_roam_ev = ath10k_wmi_op_pull_roam_ev,
  7593. .pull_echo_ev = ath10k_wmi_op_pull_echo_ev,
  7594. .gen_pdev_suspend = ath10k_wmi_op_gen_pdev_suspend,
  7595. .gen_pdev_resume = ath10k_wmi_op_gen_pdev_resume,
  7596. .gen_pdev_set_param = ath10k_wmi_op_gen_pdev_set_param,
  7597. .gen_stop_scan = ath10k_wmi_op_gen_stop_scan,
  7598. .gen_vdev_create = ath10k_wmi_op_gen_vdev_create,
  7599. .gen_vdev_delete = ath10k_wmi_op_gen_vdev_delete,
  7600. .gen_vdev_start = ath10k_wmi_op_gen_vdev_start,
  7601. .gen_vdev_stop = ath10k_wmi_op_gen_vdev_stop,
  7602. .gen_vdev_up = ath10k_wmi_op_gen_vdev_up,
  7603. .gen_vdev_down = ath10k_wmi_op_gen_vdev_down,
  7604. .gen_vdev_set_param = ath10k_wmi_op_gen_vdev_set_param,
  7605. .gen_vdev_install_key = ath10k_wmi_op_gen_vdev_install_key,
  7606. .gen_vdev_spectral_conf = ath10k_wmi_op_gen_vdev_spectral_conf,
  7607. .gen_vdev_spectral_enable = ath10k_wmi_op_gen_vdev_spectral_enable,
  7608. /* .gen_vdev_wmm_conf not implemented */
  7609. .gen_peer_create = ath10k_wmi_op_gen_peer_create,
  7610. .gen_peer_delete = ath10k_wmi_op_gen_peer_delete,
  7611. .gen_peer_flush = ath10k_wmi_op_gen_peer_flush,
  7612. .gen_peer_set_param = ath10k_wmi_op_gen_peer_set_param,
  7613. .gen_set_psmode = ath10k_wmi_op_gen_set_psmode,
  7614. .gen_set_sta_ps = ath10k_wmi_op_gen_set_sta_ps,
  7615. .gen_set_ap_ps = ath10k_wmi_op_gen_set_ap_ps,
  7616. .gen_scan_chan_list = ath10k_wmi_op_gen_scan_chan_list,
  7617. .gen_beacon_dma = ath10k_wmi_op_gen_beacon_dma,
  7618. .gen_pdev_set_wmm = ath10k_wmi_op_gen_pdev_set_wmm,
  7619. .gen_request_stats = ath10k_wmi_op_gen_request_stats,
  7620. .gen_force_fw_hang = ath10k_wmi_op_gen_force_fw_hang,
  7621. .gen_mgmt_tx = ath10k_wmi_op_gen_mgmt_tx,
  7622. .gen_dbglog_cfg = ath10k_wmi_op_gen_dbglog_cfg,
  7623. .gen_pktlog_enable = ath10k_wmi_op_gen_pktlog_enable,
  7624. .gen_pktlog_disable = ath10k_wmi_op_gen_pktlog_disable,
  7625. .gen_pdev_set_quiet_mode = ath10k_wmi_op_gen_pdev_set_quiet_mode,
  7626. .gen_addba_clear_resp = ath10k_wmi_op_gen_addba_clear_resp,
  7627. .gen_addba_send = ath10k_wmi_op_gen_addba_send,
  7628. .gen_addba_set_resp = ath10k_wmi_op_gen_addba_set_resp,
  7629. .gen_delba_send = ath10k_wmi_op_gen_delba_send,
  7630. .fw_stats_fill = ath10k_wmi_10x_op_fw_stats_fill,
  7631. .get_vdev_subtype = ath10k_wmi_op_get_vdev_subtype,
  7632. .gen_echo = ath10k_wmi_op_gen_echo,
  7633. /* .gen_bcn_tmpl not implemented */
  7634. /* .gen_prb_tmpl not implemented */
  7635. /* .gen_p2p_go_bcn_ie not implemented */
  7636. /* .gen_adaptive_qcs not implemented */
  7637. /* .gen_pdev_enable_adaptive_cca not implemented */
  7638. };
  7639. static const struct wmi_ops wmi_10_2_ops = {
  7640. .rx = ath10k_wmi_10_2_op_rx,
  7641. .pull_fw_stats = ath10k_wmi_10_2_op_pull_fw_stats,
  7642. .gen_init = ath10k_wmi_10_2_op_gen_init,
  7643. .gen_peer_assoc = ath10k_wmi_10_2_op_gen_peer_assoc,
  7644. /* .gen_pdev_get_temperature not implemented */
  7645. /* shared with 10.1 */
  7646. .map_svc = wmi_10x_svc_map,
  7647. .pull_svc_rdy = ath10k_wmi_10x_op_pull_svc_rdy_ev,
  7648. .gen_pdev_set_rd = ath10k_wmi_10x_op_gen_pdev_set_rd,
  7649. .gen_start_scan = ath10k_wmi_10x_op_gen_start_scan,
  7650. .gen_echo = ath10k_wmi_op_gen_echo,
  7651. .pull_scan = ath10k_wmi_op_pull_scan_ev,
  7652. .pull_mgmt_rx = ath10k_wmi_op_pull_mgmt_rx_ev,
  7653. .pull_ch_info = ath10k_wmi_op_pull_ch_info_ev,
  7654. .pull_vdev_start = ath10k_wmi_op_pull_vdev_start_ev,
  7655. .pull_peer_kick = ath10k_wmi_op_pull_peer_kick_ev,
  7656. .pull_swba = ath10k_wmi_op_pull_swba_ev,
  7657. .pull_phyerr_hdr = ath10k_wmi_op_pull_phyerr_ev_hdr,
  7658. .pull_phyerr = ath10k_wmi_op_pull_phyerr_ev,
  7659. .pull_rdy = ath10k_wmi_op_pull_rdy_ev,
  7660. .pull_roam_ev = ath10k_wmi_op_pull_roam_ev,
  7661. .pull_echo_ev = ath10k_wmi_op_pull_echo_ev,
  7662. .gen_pdev_suspend = ath10k_wmi_op_gen_pdev_suspend,
  7663. .gen_pdev_resume = ath10k_wmi_op_gen_pdev_resume,
  7664. .gen_pdev_set_param = ath10k_wmi_op_gen_pdev_set_param,
  7665. .gen_stop_scan = ath10k_wmi_op_gen_stop_scan,
  7666. .gen_vdev_create = ath10k_wmi_op_gen_vdev_create,
  7667. .gen_vdev_delete = ath10k_wmi_op_gen_vdev_delete,
  7668. .gen_vdev_start = ath10k_wmi_op_gen_vdev_start,
  7669. .gen_vdev_stop = ath10k_wmi_op_gen_vdev_stop,
  7670. .gen_vdev_up = ath10k_wmi_op_gen_vdev_up,
  7671. .gen_vdev_down = ath10k_wmi_op_gen_vdev_down,
  7672. .gen_vdev_set_param = ath10k_wmi_op_gen_vdev_set_param,
  7673. .gen_vdev_install_key = ath10k_wmi_op_gen_vdev_install_key,
  7674. .gen_vdev_spectral_conf = ath10k_wmi_op_gen_vdev_spectral_conf,
  7675. .gen_vdev_spectral_enable = ath10k_wmi_op_gen_vdev_spectral_enable,
  7676. /* .gen_vdev_wmm_conf not implemented */
  7677. .gen_peer_create = ath10k_wmi_op_gen_peer_create,
  7678. .gen_peer_delete = ath10k_wmi_op_gen_peer_delete,
  7679. .gen_peer_flush = ath10k_wmi_op_gen_peer_flush,
  7680. .gen_peer_set_param = ath10k_wmi_op_gen_peer_set_param,
  7681. .gen_set_psmode = ath10k_wmi_op_gen_set_psmode,
  7682. .gen_set_sta_ps = ath10k_wmi_op_gen_set_sta_ps,
  7683. .gen_set_ap_ps = ath10k_wmi_op_gen_set_ap_ps,
  7684. .gen_scan_chan_list = ath10k_wmi_op_gen_scan_chan_list,
  7685. .gen_beacon_dma = ath10k_wmi_op_gen_beacon_dma,
  7686. .gen_pdev_set_wmm = ath10k_wmi_op_gen_pdev_set_wmm,
  7687. .gen_request_stats = ath10k_wmi_op_gen_request_stats,
  7688. .gen_force_fw_hang = ath10k_wmi_op_gen_force_fw_hang,
  7689. .gen_mgmt_tx = ath10k_wmi_op_gen_mgmt_tx,
  7690. .gen_dbglog_cfg = ath10k_wmi_op_gen_dbglog_cfg,
  7691. .gen_pktlog_enable = ath10k_wmi_op_gen_pktlog_enable,
  7692. .gen_pktlog_disable = ath10k_wmi_op_gen_pktlog_disable,
  7693. .gen_pdev_set_quiet_mode = ath10k_wmi_op_gen_pdev_set_quiet_mode,
  7694. .gen_addba_clear_resp = ath10k_wmi_op_gen_addba_clear_resp,
  7695. .gen_addba_send = ath10k_wmi_op_gen_addba_send,
  7696. .gen_addba_set_resp = ath10k_wmi_op_gen_addba_set_resp,
  7697. .gen_delba_send = ath10k_wmi_op_gen_delba_send,
  7698. .fw_stats_fill = ath10k_wmi_10x_op_fw_stats_fill,
  7699. .get_vdev_subtype = ath10k_wmi_op_get_vdev_subtype,
  7700. /* .gen_pdev_enable_adaptive_cca not implemented */
  7701. };
  7702. static const struct wmi_ops wmi_10_2_4_ops = {
  7703. .rx = ath10k_wmi_10_2_op_rx,
  7704. .pull_fw_stats = ath10k_wmi_10_2_4_op_pull_fw_stats,
  7705. .gen_init = ath10k_wmi_10_2_op_gen_init,
  7706. .gen_peer_assoc = ath10k_wmi_10_2_op_gen_peer_assoc,
  7707. .gen_pdev_get_temperature = ath10k_wmi_10_2_op_gen_pdev_get_temperature,
  7708. .gen_pdev_bss_chan_info_req = ath10k_wmi_10_2_op_gen_pdev_bss_chan_info,
  7709. /* shared with 10.1 */
  7710. .map_svc = wmi_10x_svc_map,
  7711. .pull_svc_rdy = ath10k_wmi_10x_op_pull_svc_rdy_ev,
  7712. .gen_pdev_set_rd = ath10k_wmi_10x_op_gen_pdev_set_rd,
  7713. .gen_start_scan = ath10k_wmi_10x_op_gen_start_scan,
  7714. .gen_echo = ath10k_wmi_op_gen_echo,
  7715. .pull_scan = ath10k_wmi_op_pull_scan_ev,
  7716. .pull_mgmt_rx = ath10k_wmi_op_pull_mgmt_rx_ev,
  7717. .pull_ch_info = ath10k_wmi_op_pull_ch_info_ev,
  7718. .pull_vdev_start = ath10k_wmi_op_pull_vdev_start_ev,
  7719. .pull_peer_kick = ath10k_wmi_op_pull_peer_kick_ev,
  7720. .pull_swba = ath10k_wmi_10_2_4_op_pull_swba_ev,
  7721. .pull_phyerr_hdr = ath10k_wmi_op_pull_phyerr_ev_hdr,
  7722. .pull_phyerr = ath10k_wmi_op_pull_phyerr_ev,
  7723. .pull_rdy = ath10k_wmi_op_pull_rdy_ev,
  7724. .pull_roam_ev = ath10k_wmi_op_pull_roam_ev,
  7725. .pull_echo_ev = ath10k_wmi_op_pull_echo_ev,
  7726. .gen_pdev_suspend = ath10k_wmi_op_gen_pdev_suspend,
  7727. .gen_pdev_resume = ath10k_wmi_op_gen_pdev_resume,
  7728. .gen_pdev_set_param = ath10k_wmi_op_gen_pdev_set_param,
  7729. .gen_stop_scan = ath10k_wmi_op_gen_stop_scan,
  7730. .gen_vdev_create = ath10k_wmi_op_gen_vdev_create,
  7731. .gen_vdev_delete = ath10k_wmi_op_gen_vdev_delete,
  7732. .gen_vdev_start = ath10k_wmi_op_gen_vdev_start,
  7733. .gen_vdev_stop = ath10k_wmi_op_gen_vdev_stop,
  7734. .gen_vdev_up = ath10k_wmi_op_gen_vdev_up,
  7735. .gen_vdev_down = ath10k_wmi_op_gen_vdev_down,
  7736. .gen_vdev_set_param = ath10k_wmi_op_gen_vdev_set_param,
  7737. .gen_vdev_install_key = ath10k_wmi_op_gen_vdev_install_key,
  7738. .gen_vdev_spectral_conf = ath10k_wmi_op_gen_vdev_spectral_conf,
  7739. .gen_vdev_spectral_enable = ath10k_wmi_op_gen_vdev_spectral_enable,
  7740. .gen_peer_create = ath10k_wmi_op_gen_peer_create,
  7741. .gen_peer_delete = ath10k_wmi_op_gen_peer_delete,
  7742. .gen_peer_flush = ath10k_wmi_op_gen_peer_flush,
  7743. .gen_peer_set_param = ath10k_wmi_op_gen_peer_set_param,
  7744. .gen_set_psmode = ath10k_wmi_op_gen_set_psmode,
  7745. .gen_set_sta_ps = ath10k_wmi_op_gen_set_sta_ps,
  7746. .gen_set_ap_ps = ath10k_wmi_op_gen_set_ap_ps,
  7747. .gen_scan_chan_list = ath10k_wmi_op_gen_scan_chan_list,
  7748. .gen_beacon_dma = ath10k_wmi_op_gen_beacon_dma,
  7749. .gen_pdev_set_wmm = ath10k_wmi_op_gen_pdev_set_wmm,
  7750. .gen_request_stats = ath10k_wmi_op_gen_request_stats,
  7751. .gen_force_fw_hang = ath10k_wmi_op_gen_force_fw_hang,
  7752. .gen_mgmt_tx = ath10k_wmi_op_gen_mgmt_tx,
  7753. .gen_dbglog_cfg = ath10k_wmi_op_gen_dbglog_cfg,
  7754. .gen_pktlog_enable = ath10k_wmi_op_gen_pktlog_enable,
  7755. .gen_pktlog_disable = ath10k_wmi_op_gen_pktlog_disable,
  7756. .gen_pdev_set_quiet_mode = ath10k_wmi_op_gen_pdev_set_quiet_mode,
  7757. .gen_addba_clear_resp = ath10k_wmi_op_gen_addba_clear_resp,
  7758. .gen_addba_send = ath10k_wmi_op_gen_addba_send,
  7759. .gen_addba_set_resp = ath10k_wmi_op_gen_addba_set_resp,
  7760. .gen_delba_send = ath10k_wmi_op_gen_delba_send,
  7761. .gen_pdev_get_tpc_config = ath10k_wmi_10_2_4_op_gen_pdev_get_tpc_config,
  7762. .fw_stats_fill = ath10k_wmi_10x_op_fw_stats_fill,
  7763. .gen_pdev_enable_adaptive_cca =
  7764. ath10k_wmi_op_gen_pdev_enable_adaptive_cca,
  7765. .get_vdev_subtype = ath10k_wmi_10_2_4_op_get_vdev_subtype,
  7766. /* .gen_bcn_tmpl not implemented */
  7767. /* .gen_prb_tmpl not implemented */
  7768. /* .gen_p2p_go_bcn_ie not implemented */
  7769. /* .gen_adaptive_qcs not implemented */
  7770. };
  7771. static const struct wmi_ops wmi_10_4_ops = {
  7772. .rx = ath10k_wmi_10_4_op_rx,
  7773. .map_svc = wmi_10_4_svc_map,
  7774. .pull_fw_stats = ath10k_wmi_10_4_op_pull_fw_stats,
  7775. .pull_scan = ath10k_wmi_op_pull_scan_ev,
  7776. .pull_mgmt_rx = ath10k_wmi_10_4_op_pull_mgmt_rx_ev,
  7777. .pull_ch_info = ath10k_wmi_10_4_op_pull_ch_info_ev,
  7778. .pull_vdev_start = ath10k_wmi_op_pull_vdev_start_ev,
  7779. .pull_peer_kick = ath10k_wmi_op_pull_peer_kick_ev,
  7780. .pull_swba = ath10k_wmi_10_4_op_pull_swba_ev,
  7781. .pull_phyerr_hdr = ath10k_wmi_10_4_op_pull_phyerr_ev_hdr,
  7782. .pull_phyerr = ath10k_wmi_10_4_op_pull_phyerr_ev,
  7783. .pull_svc_rdy = ath10k_wmi_main_op_pull_svc_rdy_ev,
  7784. .pull_rdy = ath10k_wmi_op_pull_rdy_ev,
  7785. .pull_roam_ev = ath10k_wmi_op_pull_roam_ev,
  7786. .pull_dfs_status_ev = ath10k_wmi_10_4_op_pull_dfs_status_ev,
  7787. .get_txbf_conf_scheme = ath10k_wmi_10_4_txbf_conf_scheme,
  7788. .gen_pdev_suspend = ath10k_wmi_op_gen_pdev_suspend,
  7789. .gen_pdev_resume = ath10k_wmi_op_gen_pdev_resume,
  7790. .gen_pdev_set_rd = ath10k_wmi_10x_op_gen_pdev_set_rd,
  7791. .gen_pdev_set_param = ath10k_wmi_op_gen_pdev_set_param,
  7792. .gen_init = ath10k_wmi_10_4_op_gen_init,
  7793. .gen_start_scan = ath10k_wmi_op_gen_start_scan,
  7794. .gen_stop_scan = ath10k_wmi_op_gen_stop_scan,
  7795. .gen_vdev_create = ath10k_wmi_op_gen_vdev_create,
  7796. .gen_vdev_delete = ath10k_wmi_op_gen_vdev_delete,
  7797. .gen_vdev_start = ath10k_wmi_op_gen_vdev_start,
  7798. .gen_vdev_stop = ath10k_wmi_op_gen_vdev_stop,
  7799. .gen_vdev_up = ath10k_wmi_op_gen_vdev_up,
  7800. .gen_vdev_down = ath10k_wmi_op_gen_vdev_down,
  7801. .gen_vdev_set_param = ath10k_wmi_op_gen_vdev_set_param,
  7802. .gen_vdev_install_key = ath10k_wmi_op_gen_vdev_install_key,
  7803. .gen_vdev_spectral_conf = ath10k_wmi_op_gen_vdev_spectral_conf,
  7804. .gen_vdev_spectral_enable = ath10k_wmi_op_gen_vdev_spectral_enable,
  7805. .gen_peer_create = ath10k_wmi_op_gen_peer_create,
  7806. .gen_peer_delete = ath10k_wmi_op_gen_peer_delete,
  7807. .gen_peer_flush = ath10k_wmi_op_gen_peer_flush,
  7808. .gen_peer_set_param = ath10k_wmi_op_gen_peer_set_param,
  7809. .gen_peer_assoc = ath10k_wmi_10_4_op_gen_peer_assoc,
  7810. .gen_set_psmode = ath10k_wmi_op_gen_set_psmode,
  7811. .gen_set_sta_ps = ath10k_wmi_op_gen_set_sta_ps,
  7812. .gen_set_ap_ps = ath10k_wmi_op_gen_set_ap_ps,
  7813. .gen_scan_chan_list = ath10k_wmi_op_gen_scan_chan_list,
  7814. .gen_beacon_dma = ath10k_wmi_op_gen_beacon_dma,
  7815. .gen_pdev_set_wmm = ath10k_wmi_op_gen_pdev_set_wmm,
  7816. .gen_force_fw_hang = ath10k_wmi_op_gen_force_fw_hang,
  7817. .gen_mgmt_tx = ath10k_wmi_op_gen_mgmt_tx,
  7818. .gen_dbglog_cfg = ath10k_wmi_10_4_op_gen_dbglog_cfg,
  7819. .gen_pktlog_enable = ath10k_wmi_op_gen_pktlog_enable,
  7820. .gen_pktlog_disable = ath10k_wmi_op_gen_pktlog_disable,
  7821. .gen_pdev_set_quiet_mode = ath10k_wmi_op_gen_pdev_set_quiet_mode,
  7822. .gen_addba_clear_resp = ath10k_wmi_op_gen_addba_clear_resp,
  7823. .gen_addba_send = ath10k_wmi_op_gen_addba_send,
  7824. .gen_addba_set_resp = ath10k_wmi_op_gen_addba_set_resp,
  7825. .gen_delba_send = ath10k_wmi_op_gen_delba_send,
  7826. .fw_stats_fill = ath10k_wmi_10_4_op_fw_stats_fill,
  7827. .ext_resource_config = ath10k_wmi_10_4_ext_resource_config,
  7828. .gen_update_fw_tdls_state = ath10k_wmi_10_4_gen_update_fw_tdls_state,
  7829. .gen_tdls_peer_update = ath10k_wmi_10_4_gen_tdls_peer_update,
  7830. .gen_pdev_get_tpc_table_cmdid =
  7831. ath10k_wmi_10_4_op_gen_pdev_get_tpc_table_cmdid,
  7832. .gen_radar_found = ath10k_wmi_10_4_gen_radar_found,
  7833. /* shared with 10.2 */
  7834. .pull_echo_ev = ath10k_wmi_op_pull_echo_ev,
  7835. .gen_request_stats = ath10k_wmi_op_gen_request_stats,
  7836. .gen_pdev_get_temperature = ath10k_wmi_10_2_op_gen_pdev_get_temperature,
  7837. .get_vdev_subtype = ath10k_wmi_10_4_op_get_vdev_subtype,
  7838. .gen_pdev_bss_chan_info_req = ath10k_wmi_10_2_op_gen_pdev_bss_chan_info,
  7839. .gen_echo = ath10k_wmi_op_gen_echo,
  7840. .gen_pdev_get_tpc_config = ath10k_wmi_10_2_4_op_gen_pdev_get_tpc_config,
  7841. };
  7842. int ath10k_wmi_attach(struct ath10k *ar)
  7843. {
  7844. switch (ar->running_fw->fw_file.wmi_op_version) {
  7845. case ATH10K_FW_WMI_OP_VERSION_10_4:
  7846. ar->wmi.ops = &wmi_10_4_ops;
  7847. ar->wmi.cmd = &wmi_10_4_cmd_map;
  7848. ar->wmi.vdev_param = &wmi_10_4_vdev_param_map;
  7849. ar->wmi.pdev_param = &wmi_10_4_pdev_param_map;
  7850. ar->wmi.peer_flags = &wmi_10_2_peer_flags_map;
  7851. break;
  7852. case ATH10K_FW_WMI_OP_VERSION_10_2_4:
  7853. ar->wmi.cmd = &wmi_10_2_4_cmd_map;
  7854. ar->wmi.ops = &wmi_10_2_4_ops;
  7855. ar->wmi.vdev_param = &wmi_10_2_4_vdev_param_map;
  7856. ar->wmi.pdev_param = &wmi_10_2_4_pdev_param_map;
  7857. ar->wmi.peer_flags = &wmi_10_2_peer_flags_map;
  7858. break;
  7859. case ATH10K_FW_WMI_OP_VERSION_10_2:
  7860. ar->wmi.cmd = &wmi_10_2_cmd_map;
  7861. ar->wmi.ops = &wmi_10_2_ops;
  7862. ar->wmi.vdev_param = &wmi_10x_vdev_param_map;
  7863. ar->wmi.pdev_param = &wmi_10x_pdev_param_map;
  7864. ar->wmi.peer_flags = &wmi_10_2_peer_flags_map;
  7865. break;
  7866. case ATH10K_FW_WMI_OP_VERSION_10_1:
  7867. ar->wmi.cmd = &wmi_10x_cmd_map;
  7868. ar->wmi.ops = &wmi_10_1_ops;
  7869. ar->wmi.vdev_param = &wmi_10x_vdev_param_map;
  7870. ar->wmi.pdev_param = &wmi_10x_pdev_param_map;
  7871. ar->wmi.peer_flags = &wmi_10x_peer_flags_map;
  7872. break;
  7873. case ATH10K_FW_WMI_OP_VERSION_MAIN:
  7874. ar->wmi.cmd = &wmi_cmd_map;
  7875. ar->wmi.ops = &wmi_ops;
  7876. ar->wmi.vdev_param = &wmi_vdev_param_map;
  7877. ar->wmi.pdev_param = &wmi_pdev_param_map;
  7878. ar->wmi.peer_flags = &wmi_peer_flags_map;
  7879. break;
  7880. case ATH10K_FW_WMI_OP_VERSION_TLV:
  7881. ath10k_wmi_tlv_attach(ar);
  7882. break;
  7883. case ATH10K_FW_WMI_OP_VERSION_UNSET:
  7884. case ATH10K_FW_WMI_OP_VERSION_MAX:
  7885. ath10k_err(ar, "unsupported WMI op version: %d\n",
  7886. ar->running_fw->fw_file.wmi_op_version);
  7887. return -EINVAL;
  7888. }
  7889. init_completion(&ar->wmi.service_ready);
  7890. init_completion(&ar->wmi.unified_ready);
  7891. init_completion(&ar->wmi.barrier);
  7892. init_completion(&ar->wmi.radar_confirm);
  7893. INIT_WORK(&ar->svc_rdy_work, ath10k_wmi_event_service_ready_work);
  7894. INIT_WORK(&ar->radar_confirmation_work,
  7895. ath10k_radar_confirmation_work);
  7896. return 0;
  7897. }
  7898. void ath10k_wmi_free_host_mem(struct ath10k *ar)
  7899. {
  7900. int i;
  7901. /* free the host memory chunks requested by firmware */
  7902. for (i = 0; i < ar->wmi.num_mem_chunks; i++) {
  7903. dma_free_coherent(ar->dev,
  7904. ar->wmi.mem_chunks[i].len,
  7905. ar->wmi.mem_chunks[i].vaddr,
  7906. ar->wmi.mem_chunks[i].paddr);
  7907. }
  7908. ar->wmi.num_mem_chunks = 0;
  7909. }
  7910. void ath10k_wmi_detach(struct ath10k *ar)
  7911. {
  7912. cancel_work_sync(&ar->svc_rdy_work);
  7913. if (ar->svc_rdy_skb)
  7914. dev_kfree_skb(ar->svc_rdy_skb);
  7915. }