devs.c 30 KB

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  1. /* linux/arch/arm/plat-samsung/devs.c
  2. *
  3. * Copyright (c) 2011 Samsung Electronics Co., Ltd.
  4. * http://www.samsung.com
  5. *
  6. * Base SAMSUNG platform device definitions
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License version 2 as
  10. * published by the Free Software Foundation.
  11. */
  12. #include <linux/amba/pl330.h>
  13. #include <linux/kernel.h>
  14. #include <linux/types.h>
  15. #include <linux/interrupt.h>
  16. #include <linux/list.h>
  17. #include <linux/timer.h>
  18. #include <linux/init.h>
  19. #include <linux/serial_core.h>
  20. #include <linux/serial_s3c.h>
  21. #include <linux/platform_device.h>
  22. #include <linux/io.h>
  23. #include <linux/slab.h>
  24. #include <linux/string.h>
  25. #include <linux/dma-mapping.h>
  26. #include <linux/fb.h>
  27. #include <linux/gfp.h>
  28. #include <linux/mtd/mtd.h>
  29. #include <linux/mtd/onenand.h>
  30. #include <linux/mtd/partitions.h>
  31. #include <linux/mmc/host.h>
  32. #include <linux/ioport.h>
  33. #include <linux/sizes.h>
  34. #include <linux/platform_data/s3c-hsudc.h>
  35. #include <linux/platform_data/s3c-hsotg.h>
  36. #include <linux/platform_data/dma-s3c24xx.h>
  37. #include <linux/platform_data/media/s5p_hdmi.h>
  38. #include <asm/irq.h>
  39. #include <asm/mach/arch.h>
  40. #include <asm/mach/map.h>
  41. #include <asm/mach/irq.h>
  42. #include <mach/dma.h>
  43. #include <mach/irqs.h>
  44. #include <mach/map.h>
  45. #include <plat/cpu.h>
  46. #include <plat/devs.h>
  47. #include <plat/adc.h>
  48. #include <linux/platform_data/ata-samsung_cf.h>
  49. #include <plat/fb.h>
  50. #include <plat/fb-s3c2410.h>
  51. #include <linux/platform_data/hwmon-s3c.h>
  52. #include <linux/platform_data/i2c-s3c2410.h>
  53. #include <plat/keypad.h>
  54. #include <linux/platform_data/mmc-s3cmci.h>
  55. #include <linux/platform_data/mtd-nand-s3c2410.h>
  56. #include <plat/pwm-core.h>
  57. #include <plat/sdhci.h>
  58. #include <linux/platform_data/touchscreen-s3c2410.h>
  59. #include <linux/platform_data/usb-s3c2410_udc.h>
  60. #include <linux/platform_data/usb-ohci-s3c2410.h>
  61. #include <plat/usb-phy.h>
  62. #include <plat/regs-spi.h>
  63. #include <linux/platform_data/asoc-s3c.h>
  64. #include <linux/platform_data/spi-s3c64xx.h>
  65. static u64 samsung_device_dma_mask = DMA_BIT_MASK(32);
  66. /* AC97 */
  67. #ifdef CONFIG_CPU_S3C2440
  68. static struct resource s3c_ac97_resource[] = {
  69. [0] = DEFINE_RES_MEM(S3C2440_PA_AC97, S3C2440_SZ_AC97),
  70. [1] = DEFINE_RES_IRQ(IRQ_S3C244X_AC97),
  71. };
  72. static struct s3c_audio_pdata s3c_ac97_pdata = {
  73. #ifdef CONFIG_S3C24XX_DMAC
  74. .dma_filter = s3c24xx_dma_filter,
  75. #endif
  76. .dma_playback = (void *)DMACH_PCM_OUT,
  77. .dma_capture = (void *)DMACH_PCM_IN,
  78. .dma_capture_mic = (void *)DMACH_MIC_IN,
  79. };
  80. struct platform_device s3c_device_ac97 = {
  81. .name = "samsung-ac97",
  82. .id = -1,
  83. .num_resources = ARRAY_SIZE(s3c_ac97_resource),
  84. .resource = s3c_ac97_resource,
  85. .dev = {
  86. .dma_mask = &samsung_device_dma_mask,
  87. .coherent_dma_mask = DMA_BIT_MASK(32),
  88. .platform_data = &s3c_ac97_pdata,
  89. }
  90. };
  91. #endif /* CONFIG_CPU_S3C2440 */
  92. /* ADC */
  93. #ifdef CONFIG_PLAT_S3C24XX
  94. static struct resource s3c_adc_resource[] = {
  95. [0] = DEFINE_RES_MEM(S3C24XX_PA_ADC, S3C24XX_SZ_ADC),
  96. [1] = DEFINE_RES_IRQ(IRQ_TC),
  97. [2] = DEFINE_RES_IRQ(IRQ_ADC),
  98. };
  99. struct platform_device s3c_device_adc = {
  100. .name = "s3c24xx-adc",
  101. .id = -1,
  102. .num_resources = ARRAY_SIZE(s3c_adc_resource),
  103. .resource = s3c_adc_resource,
  104. };
  105. #endif /* CONFIG_PLAT_S3C24XX */
  106. #if defined(CONFIG_SAMSUNG_DEV_ADC)
  107. static struct resource s3c_adc_resource[] = {
  108. [0] = DEFINE_RES_MEM(SAMSUNG_PA_ADC, SZ_256),
  109. [1] = DEFINE_RES_IRQ(IRQ_TC),
  110. [2] = DEFINE_RES_IRQ(IRQ_ADC),
  111. };
  112. struct platform_device s3c_device_adc = {
  113. .name = "samsung-adc",
  114. .id = -1,
  115. .num_resources = ARRAY_SIZE(s3c_adc_resource),
  116. .resource = s3c_adc_resource,
  117. };
  118. #endif /* CONFIG_SAMSUNG_DEV_ADC */
  119. /* Camif Controller */
  120. #ifdef CONFIG_CPU_S3C2440
  121. static struct resource s3c_camif_resource[] = {
  122. [0] = DEFINE_RES_MEM(S3C2440_PA_CAMIF, S3C2440_SZ_CAMIF),
  123. [1] = DEFINE_RES_IRQ(IRQ_S3C2440_CAM_C),
  124. [2] = DEFINE_RES_IRQ(IRQ_S3C2440_CAM_P),
  125. };
  126. struct platform_device s3c_device_camif = {
  127. .name = "s3c2440-camif",
  128. .id = -1,
  129. .num_resources = ARRAY_SIZE(s3c_camif_resource),
  130. .resource = s3c_camif_resource,
  131. .dev = {
  132. .dma_mask = &samsung_device_dma_mask,
  133. .coherent_dma_mask = DMA_BIT_MASK(32),
  134. }
  135. };
  136. #endif /* CONFIG_CPU_S3C2440 */
  137. /* FB */
  138. #ifdef CONFIG_S3C_DEV_FB
  139. static struct resource s3c_fb_resource[] = {
  140. [0] = DEFINE_RES_MEM(S3C_PA_FB, SZ_16K),
  141. [1] = DEFINE_RES_IRQ(IRQ_LCD_VSYNC),
  142. [2] = DEFINE_RES_IRQ(IRQ_LCD_FIFO),
  143. [3] = DEFINE_RES_IRQ(IRQ_LCD_SYSTEM),
  144. };
  145. struct platform_device s3c_device_fb = {
  146. .name = "s3c-fb",
  147. .id = -1,
  148. .num_resources = ARRAY_SIZE(s3c_fb_resource),
  149. .resource = s3c_fb_resource,
  150. .dev = {
  151. .dma_mask = &samsung_device_dma_mask,
  152. .coherent_dma_mask = DMA_BIT_MASK(32),
  153. },
  154. };
  155. void __init s3c_fb_set_platdata(struct s3c_fb_platdata *pd)
  156. {
  157. s3c_set_platdata(pd, sizeof(struct s3c_fb_platdata),
  158. &s3c_device_fb);
  159. }
  160. #endif /* CONFIG_S3C_DEV_FB */
  161. /* HWMON */
  162. #ifdef CONFIG_S3C_DEV_HWMON
  163. struct platform_device s3c_device_hwmon = {
  164. .name = "s3c-hwmon",
  165. .id = -1,
  166. .dev.parent = &s3c_device_adc.dev,
  167. };
  168. void __init s3c_hwmon_set_platdata(struct s3c_hwmon_pdata *pd)
  169. {
  170. s3c_set_platdata(pd, sizeof(struct s3c_hwmon_pdata),
  171. &s3c_device_hwmon);
  172. }
  173. #endif /* CONFIG_S3C_DEV_HWMON */
  174. /* HSMMC */
  175. #ifdef CONFIG_S3C_DEV_HSMMC
  176. static struct resource s3c_hsmmc_resource[] = {
  177. [0] = DEFINE_RES_MEM(S3C_PA_HSMMC0, SZ_4K),
  178. [1] = DEFINE_RES_IRQ(IRQ_HSMMC0),
  179. };
  180. struct s3c_sdhci_platdata s3c_hsmmc0_def_platdata = {
  181. .max_width = 4,
  182. .host_caps = (MMC_CAP_4_BIT_DATA |
  183. MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED),
  184. };
  185. struct platform_device s3c_device_hsmmc0 = {
  186. .name = "s3c-sdhci",
  187. .id = 0,
  188. .num_resources = ARRAY_SIZE(s3c_hsmmc_resource),
  189. .resource = s3c_hsmmc_resource,
  190. .dev = {
  191. .dma_mask = &samsung_device_dma_mask,
  192. .coherent_dma_mask = DMA_BIT_MASK(32),
  193. .platform_data = &s3c_hsmmc0_def_platdata,
  194. },
  195. };
  196. void s3c_sdhci0_set_platdata(struct s3c_sdhci_platdata *pd)
  197. {
  198. s3c_sdhci_set_platdata(pd, &s3c_hsmmc0_def_platdata);
  199. }
  200. #endif /* CONFIG_S3C_DEV_HSMMC */
  201. #ifdef CONFIG_S3C_DEV_HSMMC1
  202. static struct resource s3c_hsmmc1_resource[] = {
  203. [0] = DEFINE_RES_MEM(S3C_PA_HSMMC1, SZ_4K),
  204. [1] = DEFINE_RES_IRQ(IRQ_HSMMC1),
  205. };
  206. struct s3c_sdhci_platdata s3c_hsmmc1_def_platdata = {
  207. .max_width = 4,
  208. .host_caps = (MMC_CAP_4_BIT_DATA |
  209. MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED),
  210. };
  211. struct platform_device s3c_device_hsmmc1 = {
  212. .name = "s3c-sdhci",
  213. .id = 1,
  214. .num_resources = ARRAY_SIZE(s3c_hsmmc1_resource),
  215. .resource = s3c_hsmmc1_resource,
  216. .dev = {
  217. .dma_mask = &samsung_device_dma_mask,
  218. .coherent_dma_mask = DMA_BIT_MASK(32),
  219. .platform_data = &s3c_hsmmc1_def_platdata,
  220. },
  221. };
  222. void s3c_sdhci1_set_platdata(struct s3c_sdhci_platdata *pd)
  223. {
  224. s3c_sdhci_set_platdata(pd, &s3c_hsmmc1_def_platdata);
  225. }
  226. #endif /* CONFIG_S3C_DEV_HSMMC1 */
  227. /* HSMMC2 */
  228. #ifdef CONFIG_S3C_DEV_HSMMC2
  229. static struct resource s3c_hsmmc2_resource[] = {
  230. [0] = DEFINE_RES_MEM(S3C_PA_HSMMC2, SZ_4K),
  231. [1] = DEFINE_RES_IRQ(IRQ_HSMMC2),
  232. };
  233. struct s3c_sdhci_platdata s3c_hsmmc2_def_platdata = {
  234. .max_width = 4,
  235. .host_caps = (MMC_CAP_4_BIT_DATA |
  236. MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED),
  237. };
  238. struct platform_device s3c_device_hsmmc2 = {
  239. .name = "s3c-sdhci",
  240. .id = 2,
  241. .num_resources = ARRAY_SIZE(s3c_hsmmc2_resource),
  242. .resource = s3c_hsmmc2_resource,
  243. .dev = {
  244. .dma_mask = &samsung_device_dma_mask,
  245. .coherent_dma_mask = DMA_BIT_MASK(32),
  246. .platform_data = &s3c_hsmmc2_def_platdata,
  247. },
  248. };
  249. void s3c_sdhci2_set_platdata(struct s3c_sdhci_platdata *pd)
  250. {
  251. s3c_sdhci_set_platdata(pd, &s3c_hsmmc2_def_platdata);
  252. }
  253. #endif /* CONFIG_S3C_DEV_HSMMC2 */
  254. #ifdef CONFIG_S3C_DEV_HSMMC3
  255. static struct resource s3c_hsmmc3_resource[] = {
  256. [0] = DEFINE_RES_MEM(S3C_PA_HSMMC3, SZ_4K),
  257. [1] = DEFINE_RES_IRQ(IRQ_HSMMC3),
  258. };
  259. struct s3c_sdhci_platdata s3c_hsmmc3_def_platdata = {
  260. .max_width = 4,
  261. .host_caps = (MMC_CAP_4_BIT_DATA |
  262. MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED),
  263. };
  264. struct platform_device s3c_device_hsmmc3 = {
  265. .name = "s3c-sdhci",
  266. .id = 3,
  267. .num_resources = ARRAY_SIZE(s3c_hsmmc3_resource),
  268. .resource = s3c_hsmmc3_resource,
  269. .dev = {
  270. .dma_mask = &samsung_device_dma_mask,
  271. .coherent_dma_mask = DMA_BIT_MASK(32),
  272. .platform_data = &s3c_hsmmc3_def_platdata,
  273. },
  274. };
  275. void s3c_sdhci3_set_platdata(struct s3c_sdhci_platdata *pd)
  276. {
  277. s3c_sdhci_set_platdata(pd, &s3c_hsmmc3_def_platdata);
  278. }
  279. #endif /* CONFIG_S3C_DEV_HSMMC3 */
  280. /* I2C */
  281. static struct resource s3c_i2c0_resource[] = {
  282. [0] = DEFINE_RES_MEM(S3C_PA_IIC, SZ_4K),
  283. [1] = DEFINE_RES_IRQ(IRQ_IIC),
  284. };
  285. struct platform_device s3c_device_i2c0 = {
  286. .name = "s3c2410-i2c",
  287. .id = 0,
  288. .num_resources = ARRAY_SIZE(s3c_i2c0_resource),
  289. .resource = s3c_i2c0_resource,
  290. };
  291. struct s3c2410_platform_i2c default_i2c_data __initdata = {
  292. .flags = 0,
  293. .slave_addr = 0x10,
  294. .frequency = 100*1000,
  295. .sda_delay = 100,
  296. };
  297. void __init s3c_i2c0_set_platdata(struct s3c2410_platform_i2c *pd)
  298. {
  299. struct s3c2410_platform_i2c *npd;
  300. if (!pd) {
  301. pd = &default_i2c_data;
  302. pd->bus_num = 0;
  303. }
  304. npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
  305. &s3c_device_i2c0);
  306. if (!npd->cfg_gpio)
  307. npd->cfg_gpio = s3c_i2c0_cfg_gpio;
  308. }
  309. #ifdef CONFIG_S3C_DEV_I2C1
  310. static struct resource s3c_i2c1_resource[] = {
  311. [0] = DEFINE_RES_MEM(S3C_PA_IIC1, SZ_4K),
  312. [1] = DEFINE_RES_IRQ(IRQ_IIC1),
  313. };
  314. struct platform_device s3c_device_i2c1 = {
  315. .name = "s3c2410-i2c",
  316. .id = 1,
  317. .num_resources = ARRAY_SIZE(s3c_i2c1_resource),
  318. .resource = s3c_i2c1_resource,
  319. };
  320. void __init s3c_i2c1_set_platdata(struct s3c2410_platform_i2c *pd)
  321. {
  322. struct s3c2410_platform_i2c *npd;
  323. if (!pd) {
  324. pd = &default_i2c_data;
  325. pd->bus_num = 1;
  326. }
  327. npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
  328. &s3c_device_i2c1);
  329. if (!npd->cfg_gpio)
  330. npd->cfg_gpio = s3c_i2c1_cfg_gpio;
  331. }
  332. #endif /* CONFIG_S3C_DEV_I2C1 */
  333. #ifdef CONFIG_S3C_DEV_I2C2
  334. static struct resource s3c_i2c2_resource[] = {
  335. [0] = DEFINE_RES_MEM(S3C_PA_IIC2, SZ_4K),
  336. [1] = DEFINE_RES_IRQ(IRQ_IIC2),
  337. };
  338. struct platform_device s3c_device_i2c2 = {
  339. .name = "s3c2410-i2c",
  340. .id = 2,
  341. .num_resources = ARRAY_SIZE(s3c_i2c2_resource),
  342. .resource = s3c_i2c2_resource,
  343. };
  344. void __init s3c_i2c2_set_platdata(struct s3c2410_platform_i2c *pd)
  345. {
  346. struct s3c2410_platform_i2c *npd;
  347. if (!pd) {
  348. pd = &default_i2c_data;
  349. pd->bus_num = 2;
  350. }
  351. npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
  352. &s3c_device_i2c2);
  353. if (!npd->cfg_gpio)
  354. npd->cfg_gpio = s3c_i2c2_cfg_gpio;
  355. }
  356. #endif /* CONFIG_S3C_DEV_I2C2 */
  357. #ifdef CONFIG_S3C_DEV_I2C3
  358. static struct resource s3c_i2c3_resource[] = {
  359. [0] = DEFINE_RES_MEM(S3C_PA_IIC3, SZ_4K),
  360. [1] = DEFINE_RES_IRQ(IRQ_IIC3),
  361. };
  362. struct platform_device s3c_device_i2c3 = {
  363. .name = "s3c2440-i2c",
  364. .id = 3,
  365. .num_resources = ARRAY_SIZE(s3c_i2c3_resource),
  366. .resource = s3c_i2c3_resource,
  367. };
  368. void __init s3c_i2c3_set_platdata(struct s3c2410_platform_i2c *pd)
  369. {
  370. struct s3c2410_platform_i2c *npd;
  371. if (!pd) {
  372. pd = &default_i2c_data;
  373. pd->bus_num = 3;
  374. }
  375. npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
  376. &s3c_device_i2c3);
  377. if (!npd->cfg_gpio)
  378. npd->cfg_gpio = s3c_i2c3_cfg_gpio;
  379. }
  380. #endif /*CONFIG_S3C_DEV_I2C3 */
  381. #ifdef CONFIG_S3C_DEV_I2C4
  382. static struct resource s3c_i2c4_resource[] = {
  383. [0] = DEFINE_RES_MEM(S3C_PA_IIC4, SZ_4K),
  384. [1] = DEFINE_RES_IRQ(IRQ_IIC4),
  385. };
  386. struct platform_device s3c_device_i2c4 = {
  387. .name = "s3c2440-i2c",
  388. .id = 4,
  389. .num_resources = ARRAY_SIZE(s3c_i2c4_resource),
  390. .resource = s3c_i2c4_resource,
  391. };
  392. void __init s3c_i2c4_set_platdata(struct s3c2410_platform_i2c *pd)
  393. {
  394. struct s3c2410_platform_i2c *npd;
  395. if (!pd) {
  396. pd = &default_i2c_data;
  397. pd->bus_num = 4;
  398. }
  399. npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
  400. &s3c_device_i2c4);
  401. if (!npd->cfg_gpio)
  402. npd->cfg_gpio = s3c_i2c4_cfg_gpio;
  403. }
  404. #endif /*CONFIG_S3C_DEV_I2C4 */
  405. #ifdef CONFIG_S3C_DEV_I2C5
  406. static struct resource s3c_i2c5_resource[] = {
  407. [0] = DEFINE_RES_MEM(S3C_PA_IIC5, SZ_4K),
  408. [1] = DEFINE_RES_IRQ(IRQ_IIC5),
  409. };
  410. struct platform_device s3c_device_i2c5 = {
  411. .name = "s3c2440-i2c",
  412. .id = 5,
  413. .num_resources = ARRAY_SIZE(s3c_i2c5_resource),
  414. .resource = s3c_i2c5_resource,
  415. };
  416. void __init s3c_i2c5_set_platdata(struct s3c2410_platform_i2c *pd)
  417. {
  418. struct s3c2410_platform_i2c *npd;
  419. if (!pd) {
  420. pd = &default_i2c_data;
  421. pd->bus_num = 5;
  422. }
  423. npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
  424. &s3c_device_i2c5);
  425. if (!npd->cfg_gpio)
  426. npd->cfg_gpio = s3c_i2c5_cfg_gpio;
  427. }
  428. #endif /*CONFIG_S3C_DEV_I2C5 */
  429. #ifdef CONFIG_S3C_DEV_I2C6
  430. static struct resource s3c_i2c6_resource[] = {
  431. [0] = DEFINE_RES_MEM(S3C_PA_IIC6, SZ_4K),
  432. [1] = DEFINE_RES_IRQ(IRQ_IIC6),
  433. };
  434. struct platform_device s3c_device_i2c6 = {
  435. .name = "s3c2440-i2c",
  436. .id = 6,
  437. .num_resources = ARRAY_SIZE(s3c_i2c6_resource),
  438. .resource = s3c_i2c6_resource,
  439. };
  440. void __init s3c_i2c6_set_platdata(struct s3c2410_platform_i2c *pd)
  441. {
  442. struct s3c2410_platform_i2c *npd;
  443. if (!pd) {
  444. pd = &default_i2c_data;
  445. pd->bus_num = 6;
  446. }
  447. npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
  448. &s3c_device_i2c6);
  449. if (!npd->cfg_gpio)
  450. npd->cfg_gpio = s3c_i2c6_cfg_gpio;
  451. }
  452. #endif /* CONFIG_S3C_DEV_I2C6 */
  453. #ifdef CONFIG_S3C_DEV_I2C7
  454. static struct resource s3c_i2c7_resource[] = {
  455. [0] = DEFINE_RES_MEM(S3C_PA_IIC7, SZ_4K),
  456. [1] = DEFINE_RES_IRQ(IRQ_IIC7),
  457. };
  458. struct platform_device s3c_device_i2c7 = {
  459. .name = "s3c2440-i2c",
  460. .id = 7,
  461. .num_resources = ARRAY_SIZE(s3c_i2c7_resource),
  462. .resource = s3c_i2c7_resource,
  463. };
  464. void __init s3c_i2c7_set_platdata(struct s3c2410_platform_i2c *pd)
  465. {
  466. struct s3c2410_platform_i2c *npd;
  467. if (!pd) {
  468. pd = &default_i2c_data;
  469. pd->bus_num = 7;
  470. }
  471. npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
  472. &s3c_device_i2c7);
  473. if (!npd->cfg_gpio)
  474. npd->cfg_gpio = s3c_i2c7_cfg_gpio;
  475. }
  476. #endif /* CONFIG_S3C_DEV_I2C7 */
  477. /* I2S */
  478. #ifdef CONFIG_PLAT_S3C24XX
  479. static struct resource s3c_iis_resource[] = {
  480. [0] = DEFINE_RES_MEM(S3C24XX_PA_IIS, S3C24XX_SZ_IIS),
  481. };
  482. static struct s3c_audio_pdata s3c_iis_platdata = {
  483. #ifdef CONFIG_S3C24XX_DMAC
  484. .dma_filter = s3c24xx_dma_filter,
  485. #endif
  486. .dma_playback = (void *)DMACH_I2S_OUT,
  487. .dma_capture = (void *)DMACH_I2S_IN,
  488. };
  489. struct platform_device s3c_device_iis = {
  490. .name = "s3c24xx-iis",
  491. .id = -1,
  492. .num_resources = ARRAY_SIZE(s3c_iis_resource),
  493. .resource = s3c_iis_resource,
  494. .dev = {
  495. .dma_mask = &samsung_device_dma_mask,
  496. .coherent_dma_mask = DMA_BIT_MASK(32),
  497. .platform_data = &s3c_iis_platdata,
  498. }
  499. };
  500. #endif /* CONFIG_PLAT_S3C24XX */
  501. /* IDE CFCON */
  502. #ifdef CONFIG_SAMSUNG_DEV_IDE
  503. static struct resource s3c_cfcon_resource[] = {
  504. [0] = DEFINE_RES_MEM(SAMSUNG_PA_CFCON, SZ_16K),
  505. [1] = DEFINE_RES_IRQ(IRQ_CFCON),
  506. };
  507. struct platform_device s3c_device_cfcon = {
  508. .id = 0,
  509. .num_resources = ARRAY_SIZE(s3c_cfcon_resource),
  510. .resource = s3c_cfcon_resource,
  511. };
  512. void __init s3c_ide_set_platdata(struct s3c_ide_platdata *pdata)
  513. {
  514. s3c_set_platdata(pdata, sizeof(struct s3c_ide_platdata),
  515. &s3c_device_cfcon);
  516. }
  517. #endif /* CONFIG_SAMSUNG_DEV_IDE */
  518. /* KEYPAD */
  519. #ifdef CONFIG_SAMSUNG_DEV_KEYPAD
  520. static struct resource samsung_keypad_resources[] = {
  521. [0] = DEFINE_RES_MEM(SAMSUNG_PA_KEYPAD, SZ_32),
  522. [1] = DEFINE_RES_IRQ(IRQ_KEYPAD),
  523. };
  524. struct platform_device samsung_device_keypad = {
  525. .name = "samsung-keypad",
  526. .id = -1,
  527. .num_resources = ARRAY_SIZE(samsung_keypad_resources),
  528. .resource = samsung_keypad_resources,
  529. };
  530. void __init samsung_keypad_set_platdata(struct samsung_keypad_platdata *pd)
  531. {
  532. struct samsung_keypad_platdata *npd;
  533. npd = s3c_set_platdata(pd, sizeof(struct samsung_keypad_platdata),
  534. &samsung_device_keypad);
  535. if (!npd->cfg_gpio)
  536. npd->cfg_gpio = samsung_keypad_cfg_gpio;
  537. }
  538. #endif /* CONFIG_SAMSUNG_DEV_KEYPAD */
  539. /* LCD Controller */
  540. #ifdef CONFIG_PLAT_S3C24XX
  541. static struct resource s3c_lcd_resource[] = {
  542. [0] = DEFINE_RES_MEM(S3C24XX_PA_LCD, S3C24XX_SZ_LCD),
  543. [1] = DEFINE_RES_IRQ(IRQ_LCD),
  544. };
  545. struct platform_device s3c_device_lcd = {
  546. .name = "s3c2410-lcd",
  547. .id = -1,
  548. .num_resources = ARRAY_SIZE(s3c_lcd_resource),
  549. .resource = s3c_lcd_resource,
  550. .dev = {
  551. .dma_mask = &samsung_device_dma_mask,
  552. .coherent_dma_mask = DMA_BIT_MASK(32),
  553. }
  554. };
  555. void __init s3c24xx_fb_set_platdata(struct s3c2410fb_mach_info *pd)
  556. {
  557. struct s3c2410fb_mach_info *npd;
  558. npd = s3c_set_platdata(pd, sizeof(*npd), &s3c_device_lcd);
  559. if (npd) {
  560. npd->displays = kmemdup(pd->displays,
  561. sizeof(struct s3c2410fb_display) * npd->num_displays,
  562. GFP_KERNEL);
  563. if (!npd->displays)
  564. printk(KERN_ERR "no memory for LCD display data\n");
  565. } else {
  566. printk(KERN_ERR "no memory for LCD platform data\n");
  567. }
  568. }
  569. #endif /* CONFIG_PLAT_S3C24XX */
  570. /* NAND */
  571. #ifdef CONFIG_S3C_DEV_NAND
  572. static struct resource s3c_nand_resource[] = {
  573. [0] = DEFINE_RES_MEM(S3C_PA_NAND, SZ_1M),
  574. };
  575. struct platform_device s3c_device_nand = {
  576. .name = "s3c2410-nand",
  577. .id = -1,
  578. .num_resources = ARRAY_SIZE(s3c_nand_resource),
  579. .resource = s3c_nand_resource,
  580. };
  581. /*
  582. * s3c_nand_copy_set() - copy nand set data
  583. * @set: The new structure, directly copied from the old.
  584. *
  585. * Copy all the fields from the NAND set field from what is probably __initdata
  586. * to new kernel memory. The code returns 0 if the copy happened correctly or
  587. * an error code for the calling function to display.
  588. *
  589. * Note, we currently do not try and look to see if we've already copied the
  590. * data in a previous set.
  591. */
  592. static int __init s3c_nand_copy_set(struct s3c2410_nand_set *set)
  593. {
  594. void *ptr;
  595. int size;
  596. size = sizeof(struct mtd_partition) * set->nr_partitions;
  597. if (size) {
  598. ptr = kmemdup(set->partitions, size, GFP_KERNEL);
  599. set->partitions = ptr;
  600. if (!ptr)
  601. return -ENOMEM;
  602. }
  603. if (set->nr_map && set->nr_chips) {
  604. size = sizeof(int) * set->nr_chips;
  605. ptr = kmemdup(set->nr_map, size, GFP_KERNEL);
  606. set->nr_map = ptr;
  607. if (!ptr)
  608. return -ENOMEM;
  609. }
  610. if (set->ecc_layout) {
  611. ptr = kmemdup(set->ecc_layout,
  612. sizeof(struct nand_ecclayout), GFP_KERNEL);
  613. set->ecc_layout = ptr;
  614. if (!ptr)
  615. return -ENOMEM;
  616. }
  617. return 0;
  618. }
  619. void __init s3c_nand_set_platdata(struct s3c2410_platform_nand *nand)
  620. {
  621. struct s3c2410_platform_nand *npd;
  622. int size;
  623. int ret;
  624. /* note, if we get a failure in allocation, we simply drop out of the
  625. * function. If there is so little memory available at initialisation
  626. * time then there is little chance the system is going to run.
  627. */
  628. npd = s3c_set_platdata(nand, sizeof(struct s3c2410_platform_nand),
  629. &s3c_device_nand);
  630. if (!npd)
  631. return;
  632. /* now see if we need to copy any of the nand set data */
  633. size = sizeof(struct s3c2410_nand_set) * npd->nr_sets;
  634. if (size) {
  635. struct s3c2410_nand_set *from = npd->sets;
  636. struct s3c2410_nand_set *to;
  637. int i;
  638. to = kmemdup(from, size, GFP_KERNEL);
  639. npd->sets = to; /* set, even if we failed */
  640. if (!to) {
  641. printk(KERN_ERR "%s: no memory for sets\n", __func__);
  642. return;
  643. }
  644. for (i = 0; i < npd->nr_sets; i++) {
  645. ret = s3c_nand_copy_set(to);
  646. if (ret) {
  647. printk(KERN_ERR "%s: failed to copy set %d\n",
  648. __func__, i);
  649. return;
  650. }
  651. to++;
  652. }
  653. }
  654. }
  655. #endif /* CONFIG_S3C_DEV_NAND */
  656. /* ONENAND */
  657. #ifdef CONFIG_S3C_DEV_ONENAND
  658. static struct resource s3c_onenand_resources[] = {
  659. [0] = DEFINE_RES_MEM(S3C_PA_ONENAND, SZ_1K),
  660. [1] = DEFINE_RES_MEM(S3C_PA_ONENAND_BUF, S3C_SZ_ONENAND_BUF),
  661. [2] = DEFINE_RES_IRQ(IRQ_ONENAND),
  662. };
  663. struct platform_device s3c_device_onenand = {
  664. .name = "samsung-onenand",
  665. .id = 0,
  666. .num_resources = ARRAY_SIZE(s3c_onenand_resources),
  667. .resource = s3c_onenand_resources,
  668. };
  669. #endif /* CONFIG_S3C_DEV_ONENAND */
  670. #ifdef CONFIG_S3C64XX_DEV_ONENAND1
  671. static struct resource s3c64xx_onenand1_resources[] = {
  672. [0] = DEFINE_RES_MEM(S3C64XX_PA_ONENAND1, SZ_1K),
  673. [1] = DEFINE_RES_MEM(S3C64XX_PA_ONENAND1_BUF, S3C64XX_SZ_ONENAND1_BUF),
  674. [2] = DEFINE_RES_IRQ(IRQ_ONENAND1),
  675. };
  676. struct platform_device s3c64xx_device_onenand1 = {
  677. .name = "samsung-onenand",
  678. .id = 1,
  679. .num_resources = ARRAY_SIZE(s3c64xx_onenand1_resources),
  680. .resource = s3c64xx_onenand1_resources,
  681. };
  682. void __init s3c64xx_onenand1_set_platdata(struct onenand_platform_data *pdata)
  683. {
  684. s3c_set_platdata(pdata, sizeof(struct onenand_platform_data),
  685. &s3c64xx_device_onenand1);
  686. }
  687. #endif /* CONFIG_S3C64XX_DEV_ONENAND1 */
  688. /* PWM Timer */
  689. #ifdef CONFIG_SAMSUNG_DEV_PWM
  690. static struct resource samsung_pwm_resource[] = {
  691. DEFINE_RES_MEM(SAMSUNG_PA_TIMER, SZ_4K),
  692. };
  693. struct platform_device samsung_device_pwm = {
  694. .name = "samsung-pwm",
  695. .id = -1,
  696. .num_resources = ARRAY_SIZE(samsung_pwm_resource),
  697. .resource = samsung_pwm_resource,
  698. };
  699. void __init samsung_pwm_set_platdata(struct samsung_pwm_variant *pd)
  700. {
  701. samsung_device_pwm.dev.platform_data = pd;
  702. }
  703. #endif /* CONFIG_SAMSUNG_DEV_PWM */
  704. /* RTC */
  705. #ifdef CONFIG_PLAT_S3C24XX
  706. static struct resource s3c_rtc_resource[] = {
  707. [0] = DEFINE_RES_MEM(S3C24XX_PA_RTC, SZ_256),
  708. [1] = DEFINE_RES_IRQ(IRQ_RTC),
  709. [2] = DEFINE_RES_IRQ(IRQ_TICK),
  710. };
  711. struct platform_device s3c_device_rtc = {
  712. .name = "s3c2410-rtc",
  713. .id = -1,
  714. .num_resources = ARRAY_SIZE(s3c_rtc_resource),
  715. .resource = s3c_rtc_resource,
  716. };
  717. #endif /* CONFIG_PLAT_S3C24XX */
  718. #ifdef CONFIG_S3C_DEV_RTC
  719. static struct resource s3c_rtc_resource[] = {
  720. [0] = DEFINE_RES_MEM(S3C_PA_RTC, SZ_256),
  721. [1] = DEFINE_RES_IRQ(IRQ_RTC_ALARM),
  722. [2] = DEFINE_RES_IRQ(IRQ_RTC_TIC),
  723. };
  724. struct platform_device s3c_device_rtc = {
  725. .name = "s3c64xx-rtc",
  726. .id = -1,
  727. .num_resources = ARRAY_SIZE(s3c_rtc_resource),
  728. .resource = s3c_rtc_resource,
  729. };
  730. #endif /* CONFIG_S3C_DEV_RTC */
  731. /* SDI */
  732. #ifdef CONFIG_PLAT_S3C24XX
  733. static struct resource s3c_sdi_resource[] = {
  734. [0] = DEFINE_RES_MEM(S3C24XX_PA_SDI, S3C24XX_SZ_SDI),
  735. [1] = DEFINE_RES_IRQ(IRQ_SDI),
  736. };
  737. struct platform_device s3c_device_sdi = {
  738. .name = "s3c2410-sdi",
  739. .id = -1,
  740. .num_resources = ARRAY_SIZE(s3c_sdi_resource),
  741. .resource = s3c_sdi_resource,
  742. };
  743. void __init s3c24xx_mci_set_platdata(struct s3c24xx_mci_pdata *pdata)
  744. {
  745. s3c_set_platdata(pdata, sizeof(struct s3c24xx_mci_pdata),
  746. &s3c_device_sdi);
  747. }
  748. #endif /* CONFIG_PLAT_S3C24XX */
  749. /* SPI */
  750. #ifdef CONFIG_PLAT_S3C24XX
  751. static struct resource s3c_spi0_resource[] = {
  752. [0] = DEFINE_RES_MEM(S3C24XX_PA_SPI, SZ_32),
  753. [1] = DEFINE_RES_IRQ(IRQ_SPI0),
  754. };
  755. struct platform_device s3c_device_spi0 = {
  756. .name = "s3c2410-spi",
  757. .id = 0,
  758. .num_resources = ARRAY_SIZE(s3c_spi0_resource),
  759. .resource = s3c_spi0_resource,
  760. .dev = {
  761. .dma_mask = &samsung_device_dma_mask,
  762. .coherent_dma_mask = DMA_BIT_MASK(32),
  763. }
  764. };
  765. static struct resource s3c_spi1_resource[] = {
  766. [0] = DEFINE_RES_MEM(S3C24XX_PA_SPI1, SZ_32),
  767. [1] = DEFINE_RES_IRQ(IRQ_SPI1),
  768. };
  769. struct platform_device s3c_device_spi1 = {
  770. .name = "s3c2410-spi",
  771. .id = 1,
  772. .num_resources = ARRAY_SIZE(s3c_spi1_resource),
  773. .resource = s3c_spi1_resource,
  774. .dev = {
  775. .dma_mask = &samsung_device_dma_mask,
  776. .coherent_dma_mask = DMA_BIT_MASK(32),
  777. }
  778. };
  779. #endif /* CONFIG_PLAT_S3C24XX */
  780. /* Touchscreen */
  781. #ifdef CONFIG_PLAT_S3C24XX
  782. static struct resource s3c_ts_resource[] = {
  783. [0] = DEFINE_RES_MEM(S3C24XX_PA_ADC, S3C24XX_SZ_ADC),
  784. [1] = DEFINE_RES_IRQ(IRQ_TC),
  785. };
  786. struct platform_device s3c_device_ts = {
  787. .name = "s3c2410-ts",
  788. .id = -1,
  789. .dev.parent = &s3c_device_adc.dev,
  790. .num_resources = ARRAY_SIZE(s3c_ts_resource),
  791. .resource = s3c_ts_resource,
  792. };
  793. void __init s3c24xx_ts_set_platdata(struct s3c2410_ts_mach_info *hard_s3c2410ts_info)
  794. {
  795. s3c_set_platdata(hard_s3c2410ts_info,
  796. sizeof(struct s3c2410_ts_mach_info), &s3c_device_ts);
  797. }
  798. #endif /* CONFIG_PLAT_S3C24XX */
  799. #ifdef CONFIG_SAMSUNG_DEV_TS
  800. static struct resource s3c_ts_resource[] = {
  801. [0] = DEFINE_RES_MEM(SAMSUNG_PA_ADC, SZ_256),
  802. [1] = DEFINE_RES_IRQ(IRQ_TC),
  803. };
  804. static struct s3c2410_ts_mach_info default_ts_data __initdata = {
  805. .delay = 10000,
  806. .presc = 49,
  807. .oversampling_shift = 2,
  808. };
  809. struct platform_device s3c_device_ts = {
  810. .name = "s3c64xx-ts",
  811. .id = -1,
  812. .num_resources = ARRAY_SIZE(s3c_ts_resource),
  813. .resource = s3c_ts_resource,
  814. };
  815. void __init s3c24xx_ts_set_platdata(struct s3c2410_ts_mach_info *pd)
  816. {
  817. if (!pd)
  818. pd = &default_ts_data;
  819. s3c_set_platdata(pd, sizeof(struct s3c2410_ts_mach_info),
  820. &s3c_device_ts);
  821. }
  822. #endif /* CONFIG_SAMSUNG_DEV_TS */
  823. /* USB */
  824. #ifdef CONFIG_S3C_DEV_USB_HOST
  825. static struct resource s3c_usb_resource[] = {
  826. [0] = DEFINE_RES_MEM(S3C_PA_USBHOST, SZ_256),
  827. [1] = DEFINE_RES_IRQ(IRQ_USBH),
  828. };
  829. struct platform_device s3c_device_ohci = {
  830. .name = "s3c2410-ohci",
  831. .id = -1,
  832. .num_resources = ARRAY_SIZE(s3c_usb_resource),
  833. .resource = s3c_usb_resource,
  834. .dev = {
  835. .dma_mask = &samsung_device_dma_mask,
  836. .coherent_dma_mask = DMA_BIT_MASK(32),
  837. }
  838. };
  839. /*
  840. * s3c_ohci_set_platdata - initialise OHCI device platform data
  841. * @info: The platform data.
  842. *
  843. * This call copies the @info passed in and sets the device .platform_data
  844. * field to that copy. The @info is copied so that the original can be marked
  845. * __initdata.
  846. */
  847. void __init s3c_ohci_set_platdata(struct s3c2410_hcd_info *info)
  848. {
  849. s3c_set_platdata(info, sizeof(struct s3c2410_hcd_info),
  850. &s3c_device_ohci);
  851. }
  852. #endif /* CONFIG_S3C_DEV_USB_HOST */
  853. /* USB Device (Gadget) */
  854. #ifdef CONFIG_PLAT_S3C24XX
  855. static struct resource s3c_usbgadget_resource[] = {
  856. [0] = DEFINE_RES_MEM(S3C24XX_PA_USBDEV, S3C24XX_SZ_USBDEV),
  857. [1] = DEFINE_RES_IRQ(IRQ_USBD),
  858. };
  859. struct platform_device s3c_device_usbgadget = {
  860. .name = "s3c2410-usbgadget",
  861. .id = -1,
  862. .num_resources = ARRAY_SIZE(s3c_usbgadget_resource),
  863. .resource = s3c_usbgadget_resource,
  864. };
  865. void __init s3c24xx_udc_set_platdata(struct s3c2410_udc_mach_info *pd)
  866. {
  867. s3c_set_platdata(pd, sizeof(*pd), &s3c_device_usbgadget);
  868. }
  869. #endif /* CONFIG_PLAT_S3C24XX */
  870. /* USB HSOTG */
  871. #ifdef CONFIG_S3C_DEV_USB_HSOTG
  872. static struct resource s3c_usb_hsotg_resources[] = {
  873. [0] = DEFINE_RES_MEM(S3C_PA_USB_HSOTG, SZ_128K),
  874. [1] = DEFINE_RES_IRQ(IRQ_OTG),
  875. };
  876. struct platform_device s3c_device_usb_hsotg = {
  877. .name = "s3c-hsotg",
  878. .id = -1,
  879. .num_resources = ARRAY_SIZE(s3c_usb_hsotg_resources),
  880. .resource = s3c_usb_hsotg_resources,
  881. .dev = {
  882. .dma_mask = &samsung_device_dma_mask,
  883. .coherent_dma_mask = DMA_BIT_MASK(32),
  884. },
  885. };
  886. void __init dwc2_hsotg_set_platdata(struct dwc2_hsotg_plat *pd)
  887. {
  888. struct dwc2_hsotg_plat *npd;
  889. npd = s3c_set_platdata(pd, sizeof(struct dwc2_hsotg_plat),
  890. &s3c_device_usb_hsotg);
  891. if (!npd->phy_init)
  892. npd->phy_init = s5p_usb_phy_init;
  893. if (!npd->phy_exit)
  894. npd->phy_exit = s5p_usb_phy_exit;
  895. }
  896. #endif /* CONFIG_S3C_DEV_USB_HSOTG */
  897. /* USB High Spped 2.0 Device (Gadget) */
  898. #ifdef CONFIG_PLAT_S3C24XX
  899. static struct resource s3c_hsudc_resource[] = {
  900. [0] = DEFINE_RES_MEM(S3C2416_PA_HSUDC, S3C2416_SZ_HSUDC),
  901. [1] = DEFINE_RES_IRQ(IRQ_USBD),
  902. };
  903. struct platform_device s3c_device_usb_hsudc = {
  904. .name = "s3c-hsudc",
  905. .id = -1,
  906. .num_resources = ARRAY_SIZE(s3c_hsudc_resource),
  907. .resource = s3c_hsudc_resource,
  908. .dev = {
  909. .dma_mask = &samsung_device_dma_mask,
  910. .coherent_dma_mask = DMA_BIT_MASK(32),
  911. },
  912. };
  913. void __init s3c24xx_hsudc_set_platdata(struct s3c24xx_hsudc_platdata *pd)
  914. {
  915. s3c_set_platdata(pd, sizeof(*pd), &s3c_device_usb_hsudc);
  916. }
  917. #endif /* CONFIG_PLAT_S3C24XX */
  918. /* WDT */
  919. #ifdef CONFIG_S3C_DEV_WDT
  920. static struct resource s3c_wdt_resource[] = {
  921. [0] = DEFINE_RES_MEM(S3C_PA_WDT, SZ_1K),
  922. [1] = DEFINE_RES_IRQ(IRQ_WDT),
  923. };
  924. struct platform_device s3c_device_wdt = {
  925. .name = "s3c2410-wdt",
  926. .id = -1,
  927. .num_resources = ARRAY_SIZE(s3c_wdt_resource),
  928. .resource = s3c_wdt_resource,
  929. };
  930. #endif /* CONFIG_S3C_DEV_WDT */
  931. #ifdef CONFIG_S3C64XX_DEV_SPI0
  932. static struct resource s3c64xx_spi0_resource[] = {
  933. [0] = DEFINE_RES_MEM(S3C_PA_SPI0, SZ_256),
  934. [1] = DEFINE_RES_IRQ(IRQ_SPI0),
  935. };
  936. struct platform_device s3c64xx_device_spi0 = {
  937. .name = "s3c6410-spi",
  938. .id = 0,
  939. .num_resources = ARRAY_SIZE(s3c64xx_spi0_resource),
  940. .resource = s3c64xx_spi0_resource,
  941. .dev = {
  942. .dma_mask = &samsung_device_dma_mask,
  943. .coherent_dma_mask = DMA_BIT_MASK(32),
  944. },
  945. };
  946. void __init s3c64xx_spi0_set_platdata(int (*cfg_gpio)(void), int src_clk_nr,
  947. int num_cs)
  948. {
  949. struct s3c64xx_spi_info pd;
  950. /* Reject invalid configuration */
  951. if (!num_cs || src_clk_nr < 0) {
  952. pr_err("%s: Invalid SPI configuration\n", __func__);
  953. return;
  954. }
  955. pd.num_cs = num_cs;
  956. pd.src_clk_nr = src_clk_nr;
  957. pd.cfg_gpio = (cfg_gpio) ? cfg_gpio : s3c64xx_spi0_cfg_gpio;
  958. pd.dma_tx = (void *)DMACH_SPI0_TX;
  959. pd.dma_rx = (void *)DMACH_SPI0_RX;
  960. #if defined(CONFIG_PL330_DMA)
  961. pd.filter = pl330_filter;
  962. #elif defined(CONFIG_S3C64XX_PL080)
  963. pd.filter = pl08x_filter_id;
  964. #elif defined(CONFIG_S3C24XX_DMAC)
  965. pd.filter = s3c24xx_dma_filter;
  966. #endif
  967. s3c_set_platdata(&pd, sizeof(pd), &s3c64xx_device_spi0);
  968. }
  969. #endif /* CONFIG_S3C64XX_DEV_SPI0 */
  970. #ifdef CONFIG_S3C64XX_DEV_SPI1
  971. static struct resource s3c64xx_spi1_resource[] = {
  972. [0] = DEFINE_RES_MEM(S3C_PA_SPI1, SZ_256),
  973. [1] = DEFINE_RES_IRQ(IRQ_SPI1),
  974. };
  975. struct platform_device s3c64xx_device_spi1 = {
  976. .name = "s3c6410-spi",
  977. .id = 1,
  978. .num_resources = ARRAY_SIZE(s3c64xx_spi1_resource),
  979. .resource = s3c64xx_spi1_resource,
  980. .dev = {
  981. .dma_mask = &samsung_device_dma_mask,
  982. .coherent_dma_mask = DMA_BIT_MASK(32),
  983. },
  984. };
  985. void __init s3c64xx_spi1_set_platdata(int (*cfg_gpio)(void), int src_clk_nr,
  986. int num_cs)
  987. {
  988. struct s3c64xx_spi_info pd;
  989. /* Reject invalid configuration */
  990. if (!num_cs || src_clk_nr < 0) {
  991. pr_err("%s: Invalid SPI configuration\n", __func__);
  992. return;
  993. }
  994. pd.num_cs = num_cs;
  995. pd.src_clk_nr = src_clk_nr;
  996. pd.cfg_gpio = (cfg_gpio) ? cfg_gpio : s3c64xx_spi1_cfg_gpio;
  997. pd.dma_tx = (void *)DMACH_SPI1_TX;
  998. pd.dma_rx = (void *)DMACH_SPI1_RX;
  999. #if defined(CONFIG_PL330_DMA)
  1000. pd.filter = pl330_filter;
  1001. #elif defined(CONFIG_S3C64XX_PL080)
  1002. pd.filter = pl08x_filter_id;
  1003. #endif
  1004. s3c_set_platdata(&pd, sizeof(pd), &s3c64xx_device_spi1);
  1005. }
  1006. #endif /* CONFIG_S3C64XX_DEV_SPI1 */
  1007. #ifdef CONFIG_S3C64XX_DEV_SPI2
  1008. static struct resource s3c64xx_spi2_resource[] = {
  1009. [0] = DEFINE_RES_MEM(S3C_PA_SPI2, SZ_256),
  1010. [1] = DEFINE_RES_IRQ(IRQ_SPI2),
  1011. };
  1012. struct platform_device s3c64xx_device_spi2 = {
  1013. .name = "s3c6410-spi",
  1014. .id = 2,
  1015. .num_resources = ARRAY_SIZE(s3c64xx_spi2_resource),
  1016. .resource = s3c64xx_spi2_resource,
  1017. .dev = {
  1018. .dma_mask = &samsung_device_dma_mask,
  1019. .coherent_dma_mask = DMA_BIT_MASK(32),
  1020. },
  1021. };
  1022. void __init s3c64xx_spi2_set_platdata(int (*cfg_gpio)(void), int src_clk_nr,
  1023. int num_cs)
  1024. {
  1025. struct s3c64xx_spi_info pd;
  1026. /* Reject invalid configuration */
  1027. if (!num_cs || src_clk_nr < 0) {
  1028. pr_err("%s: Invalid SPI configuration\n", __func__);
  1029. return;
  1030. }
  1031. pd.num_cs = num_cs;
  1032. pd.src_clk_nr = src_clk_nr;
  1033. pd.cfg_gpio = (cfg_gpio) ? cfg_gpio : s3c64xx_spi2_cfg_gpio;
  1034. pd.dma_tx = (void *)DMACH_SPI2_TX;
  1035. pd.dma_rx = (void *)DMACH_SPI2_RX;
  1036. #if defined(CONFIG_PL330_DMA)
  1037. pd.filter = pl330_filter;
  1038. #elif defined(CONFIG_S3C64XX_PL080)
  1039. pd.filter = pl08x_filter_id;
  1040. #endif
  1041. s3c_set_platdata(&pd, sizeof(pd), &s3c64xx_device_spi2);
  1042. }
  1043. #endif /* CONFIG_S3C64XX_DEV_SPI2 */