digi00x.h 4.5 KB

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  1. /*
  2. * digi00x.h - a part of driver for Digidesign Digi 002/003 family
  3. *
  4. * Copyright (c) 2014-2015 Takashi Sakamoto
  5. *
  6. * Licensed under the terms of the GNU General Public License, version 2.
  7. */
  8. #ifndef SOUND_DIGI00X_H_INCLUDED
  9. #define SOUND_DIGI00X_H_INCLUDED
  10. #include <linux/compat.h>
  11. #include <linux/device.h>
  12. #include <linux/firewire.h>
  13. #include <linux/module.h>
  14. #include <linux/mod_devicetable.h>
  15. #include <linux/delay.h>
  16. #include <linux/slab.h>
  17. #include <sound/core.h>
  18. #include <sound/initval.h>
  19. #include <sound/info.h>
  20. #include <sound/pcm.h>
  21. #include <sound/pcm_params.h>
  22. #include <sound/firewire.h>
  23. #include <sound/hwdep.h>
  24. #include <sound/rawmidi.h>
  25. #include "../lib.h"
  26. #include "../iso-resources.h"
  27. #include "../amdtp-stream.h"
  28. struct snd_dg00x {
  29. struct snd_card *card;
  30. struct fw_unit *unit;
  31. struct mutex mutex;
  32. spinlock_t lock;
  33. struct amdtp_stream tx_stream;
  34. struct fw_iso_resources tx_resources;
  35. struct amdtp_stream rx_stream;
  36. struct fw_iso_resources rx_resources;
  37. unsigned int substreams_counter;
  38. /* for uapi */
  39. int dev_lock_count;
  40. bool dev_lock_changed;
  41. wait_queue_head_t hwdep_wait;
  42. /* For asynchronous messages. */
  43. struct fw_address_handler async_handler;
  44. u32 msg;
  45. };
  46. #define DG00X_ADDR_BASE 0xffffe0000000ull
  47. #define DG00X_OFFSET_STREAMING_STATE 0x0000
  48. #define DG00X_OFFSET_STREAMING_SET 0x0004
  49. #define DG00X_OFFSET_MIDI_CTL_ADDR 0x0008
  50. /* For LSB of the address 0x000c */
  51. /* unknown 0x0010 */
  52. #define DG00X_OFFSET_MESSAGE_ADDR 0x0014
  53. /* For LSB of the address 0x0018 */
  54. /* unknown 0x001c */
  55. /* unknown 0x0020 */
  56. /* not used 0x0024--0x00ff */
  57. #define DG00X_OFFSET_ISOC_CHANNELS 0x0100
  58. /* unknown 0x0104 */
  59. /* unknown 0x0108 */
  60. /* unknown 0x010c */
  61. #define DG00X_OFFSET_LOCAL_RATE 0x0110
  62. #define DG00X_OFFSET_EXTERNAL_RATE 0x0114
  63. #define DG00X_OFFSET_CLOCK_SOURCE 0x0118
  64. #define DG00X_OFFSET_OPT_IFACE_MODE 0x011c
  65. /* unknown 0x0120 */
  66. /* Mixer control on/off 0x0124 */
  67. /* unknown 0x0128 */
  68. #define DG00X_OFFSET_DETECT_EXTERNAL 0x012c
  69. /* unknown 0x0138 */
  70. #define DG00X_OFFSET_MMC 0x0400
  71. enum snd_dg00x_rate {
  72. SND_DG00X_RATE_44100 = 0,
  73. SND_DG00X_RATE_48000,
  74. SND_DG00X_RATE_88200,
  75. SND_DG00X_RATE_96000,
  76. SND_DG00X_RATE_COUNT,
  77. };
  78. enum snd_dg00x_clock {
  79. SND_DG00X_CLOCK_INTERNAL = 0,
  80. SND_DG00X_CLOCK_SPDIF,
  81. SND_DG00X_CLOCK_ADAT,
  82. SND_DG00X_CLOCK_WORD,
  83. SND_DG00X_CLOCK_COUNT,
  84. };
  85. enum snd_dg00x_optical_mode {
  86. SND_DG00X_OPT_IFACE_MODE_ADAT = 0,
  87. SND_DG00X_OPT_IFACE_MODE_SPDIF,
  88. SND_DG00X_OPT_IFACE_MODE_COUNT,
  89. };
  90. #define DOT_MIDI_IN_PORTS 1
  91. #define DOT_MIDI_OUT_PORTS 2
  92. int amdtp_dot_init(struct amdtp_stream *s, struct fw_unit *unit,
  93. enum amdtp_stream_direction dir);
  94. int amdtp_dot_set_parameters(struct amdtp_stream *s, unsigned int rate,
  95. unsigned int pcm_channels);
  96. void amdtp_dot_reset(struct amdtp_stream *s);
  97. int amdtp_dot_add_pcm_hw_constraints(struct amdtp_stream *s,
  98. struct snd_pcm_runtime *runtime);
  99. void amdtp_dot_set_pcm_format(struct amdtp_stream *s, snd_pcm_format_t format);
  100. void amdtp_dot_midi_trigger(struct amdtp_stream *s, unsigned int port,
  101. struct snd_rawmidi_substream *midi);
  102. int snd_dg00x_transaction_register(struct snd_dg00x *dg00x);
  103. int snd_dg00x_transaction_reregister(struct snd_dg00x *dg00x);
  104. void snd_dg00x_transaction_unregister(struct snd_dg00x *dg00x);
  105. extern const unsigned int snd_dg00x_stream_rates[SND_DG00X_RATE_COUNT];
  106. extern const unsigned int snd_dg00x_stream_pcm_channels[SND_DG00X_RATE_COUNT];
  107. int snd_dg00x_stream_get_external_rate(struct snd_dg00x *dg00x,
  108. unsigned int *rate);
  109. int snd_dg00x_stream_get_local_rate(struct snd_dg00x *dg00x,
  110. unsigned int *rate);
  111. int snd_dg00x_stream_set_local_rate(struct snd_dg00x *dg00x, unsigned int rate);
  112. int snd_dg00x_stream_get_clock(struct snd_dg00x *dg00x,
  113. enum snd_dg00x_clock *clock);
  114. int snd_dg00x_stream_check_external_clock(struct snd_dg00x *dg00x,
  115. bool *detect);
  116. int snd_dg00x_stream_init_duplex(struct snd_dg00x *dg00x);
  117. int snd_dg00x_stream_start_duplex(struct snd_dg00x *dg00x, unsigned int rate);
  118. void snd_dg00x_stream_stop_duplex(struct snd_dg00x *dg00x);
  119. void snd_dg00x_stream_update_duplex(struct snd_dg00x *dg00x);
  120. void snd_dg00x_stream_destroy_duplex(struct snd_dg00x *dg00x);
  121. void snd_dg00x_stream_lock_changed(struct snd_dg00x *dg00x);
  122. int snd_dg00x_stream_lock_try(struct snd_dg00x *dg00x);
  123. void snd_dg00x_stream_lock_release(struct snd_dg00x *dg00x);
  124. void snd_dg00x_proc_init(struct snd_dg00x *dg00x);
  125. int snd_dg00x_create_pcm_devices(struct snd_dg00x *dg00x);
  126. int snd_dg00x_create_hwdep_device(struct snd_dg00x *dg00x);
  127. #endif