dw_hdmi.h 2.6 KB

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  1. /*
  2. * Copyright (C) 2011 Freescale Semiconductor, Inc.
  3. *
  4. * This program is free software; you can redistribute it and/or modify
  5. * it under the terms of the GNU General Public License as published by
  6. * the Free Software Foundation; either version 2 of the License, or
  7. * (at your option) any later version.
  8. */
  9. #ifndef __DW_HDMI__
  10. #define __DW_HDMI__
  11. #include <drm/drmP.h>
  12. struct dw_hdmi;
  13. enum {
  14. DW_HDMI_RES_8,
  15. DW_HDMI_RES_10,
  16. DW_HDMI_RES_12,
  17. DW_HDMI_RES_MAX,
  18. };
  19. enum dw_hdmi_phy_type {
  20. DW_HDMI_PHY_DWC_HDMI_TX_PHY = 0x00,
  21. DW_HDMI_PHY_DWC_MHL_PHY_HEAC = 0xb2,
  22. DW_HDMI_PHY_DWC_MHL_PHY = 0xc2,
  23. DW_HDMI_PHY_DWC_HDMI_3D_TX_PHY_HEAC = 0xe2,
  24. DW_HDMI_PHY_DWC_HDMI_3D_TX_PHY = 0xf2,
  25. DW_HDMI_PHY_DWC_HDMI20_TX_PHY = 0xf3,
  26. DW_HDMI_PHY_VENDOR_PHY = 0xfe,
  27. };
  28. struct dw_hdmi_mpll_config {
  29. unsigned long mpixelclock;
  30. struct {
  31. u16 cpce;
  32. u16 gmp;
  33. } res[DW_HDMI_RES_MAX];
  34. };
  35. struct dw_hdmi_curr_ctrl {
  36. unsigned long mpixelclock;
  37. u16 curr[DW_HDMI_RES_MAX];
  38. };
  39. struct dw_hdmi_phy_config {
  40. unsigned long mpixelclock;
  41. u16 sym_ctr; /*clock symbol and transmitter control*/
  42. u16 term; /*transmission termination value*/
  43. u16 vlev_ctr; /* voltage level control */
  44. };
  45. struct dw_hdmi_phy_ops {
  46. int (*init)(struct dw_hdmi *hdmi, void *data,
  47. struct drm_display_mode *mode);
  48. void (*disable)(struct dw_hdmi *hdmi, void *data);
  49. enum drm_connector_status (*read_hpd)(struct dw_hdmi *hdmi, void *data);
  50. };
  51. struct dw_hdmi_plat_data {
  52. struct regmap *regm;
  53. enum drm_mode_status (*mode_valid)(struct drm_connector *connector,
  54. struct drm_display_mode *mode);
  55. /* Vendor PHY support */
  56. const struct dw_hdmi_phy_ops *phy_ops;
  57. const char *phy_name;
  58. void *phy_data;
  59. /* Synopsys PHY support */
  60. const struct dw_hdmi_mpll_config *mpll_cfg;
  61. const struct dw_hdmi_curr_ctrl *cur_ctr;
  62. const struct dw_hdmi_phy_config *phy_config;
  63. int (*configure_phy)(struct dw_hdmi *hdmi,
  64. const struct dw_hdmi_plat_data *pdata,
  65. unsigned long mpixelclock);
  66. };
  67. int dw_hdmi_probe(struct platform_device *pdev,
  68. const struct dw_hdmi_plat_data *plat_data);
  69. void dw_hdmi_remove(struct platform_device *pdev);
  70. void dw_hdmi_unbind(struct device *dev);
  71. int dw_hdmi_bind(struct platform_device *pdev, struct drm_encoder *encoder,
  72. const struct dw_hdmi_plat_data *plat_data);
  73. void dw_hdmi_set_sample_rate(struct dw_hdmi *hdmi, unsigned int rate);
  74. void dw_hdmi_audio_enable(struct dw_hdmi *hdmi);
  75. void dw_hdmi_audio_disable(struct dw_hdmi *hdmi);
  76. /* PHY configuration */
  77. void dw_hdmi_phy_i2c_write(struct dw_hdmi *hdmi, unsigned short data,
  78. unsigned char addr);
  79. #endif /* __IMX_HDMI_H__ */