at91sam9261.dtsi 18 KB

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  1. /*
  2. * at91sam9261.dtsi - Device Tree Include file for AT91SAM9261 SoC
  3. *
  4. * Copyright (C) 2013 Jean-Jacques Hiblot <jjhiblot@traphandler.com>
  5. *
  6. * Licensed under GPLv2 only.
  7. */
  8. #include "skeleton.dtsi"
  9. #include <dt-bindings/pinctrl/at91.h>
  10. #include <dt-bindings/interrupt-controller/irq.h>
  11. #include <dt-bindings/gpio/gpio.h>
  12. #include <dt-bindings/clock/at91.h>
  13. / {
  14. model = "Atmel AT91SAM9261 family SoC";
  15. compatible = "atmel,at91sam9261";
  16. interrupt-parent = <&aic>;
  17. aliases {
  18. serial0 = &dbgu;
  19. serial1 = &usart0;
  20. serial2 = &usart1;
  21. serial3 = &usart2;
  22. gpio0 = &pioA;
  23. gpio1 = &pioB;
  24. gpio2 = &pioC;
  25. tcb0 = &tcb0;
  26. i2c0 = &i2c0;
  27. ssc0 = &ssc0;
  28. ssc1 = &ssc1;
  29. };
  30. cpus {
  31. #address-cells = <0>;
  32. #size-cells = <0>;
  33. cpu {
  34. compatible = "arm,arm926ej-s";
  35. device_type = "cpu";
  36. };
  37. };
  38. memory {
  39. reg = <0x20000000 0x08000000>;
  40. };
  41. ahb {
  42. compatible = "simple-bus";
  43. #address-cells = <1>;
  44. #size-cells = <1>;
  45. ranges;
  46. usb0: ohci@00500000 {
  47. compatible = "atmel,at91rm9200-ohci", "usb-ohci";
  48. reg = <0x00500000 0x100000>;
  49. interrupts = <20 IRQ_TYPE_LEVEL_HIGH 2>;
  50. clocks = <&usb>, <&ohci_clk>, <&hclk0>, <&uhpck>;
  51. clock-names = "usb_clk", "ohci_clk", "hclk", "uhpck";
  52. status = "disabled";
  53. };
  54. fb0: fb@0x00600000 {
  55. compatible = "atmel,at91sam9261-lcdc";
  56. reg = <0x00600000 0x1000>;
  57. interrupts = <21 IRQ_TYPE_LEVEL_HIGH 3>;
  58. pinctrl-names = "default";
  59. pinctrl-0 = <&pinctrl_fb>;
  60. clocks = <&lcd_clk>, <&hclk1>;
  61. clock-names = "lcdc_clk", "hclk";
  62. status = "disabled";
  63. };
  64. nand0: nand@40000000 {
  65. compatible = "atmel,at91rm9200-nand";
  66. #address-cells = <1>;
  67. #size-cells = <1>;
  68. reg = <0x40000000 0x10000000>;
  69. atmel,nand-addr-offset = <22>;
  70. atmel,nand-cmd-offset = <21>;
  71. pinctrl-names = "default";
  72. pinctrl-0 = <&pinctrl_nand>;
  73. gpios = <&pioC 15 GPIO_ACTIVE_HIGH>,
  74. <&pioC 14 GPIO_ACTIVE_HIGH>,
  75. <0>;
  76. status = "disabled";
  77. };
  78. apb {
  79. compatible = "simple-bus";
  80. #address-cells = <1>;
  81. #size-cells = <1>;
  82. ranges;
  83. tcb0: timer@fffa0000 {
  84. compatible = "atmel,at91rm9200-tcb";
  85. reg = <0xfffa0000 0x100>;
  86. interrupts = <17 IRQ_TYPE_LEVEL_HIGH 0>,
  87. <18 IRQ_TYPE_LEVEL_HIGH 0>,
  88. <19 IRQ_TYPE_LEVEL_HIGH 0>;
  89. clocks = <&tc0_clk>, <&tc1_clk>, <&tc2_clk>;
  90. clock-names = "t0_clk", "t1_clk", "t2_clk";
  91. };
  92. usb1: gadget@fffa4000 {
  93. compatible = "atmel,at91rm9200-udc";
  94. reg = <0xfffa4000 0x4000>;
  95. interrupts = <10 IRQ_TYPE_LEVEL_HIGH 2>;
  96. clocks = <&usb>, <&udc_clk>, <&udpck>;
  97. clock-names = "usb_clk", "udc_clk", "udpck";
  98. status = "disabled";
  99. };
  100. mmc0: mmc@fffa8000 {
  101. compatible = "atmel,hsmci";
  102. reg = <0xfffa8000 0x600>;
  103. interrupts = <9 IRQ_TYPE_LEVEL_HIGH 0>;
  104. pinctrl-names = "default";
  105. pinctrl-0 = <&pinctrl_mmc0_clk>, <&pinctrl_mmc0_slot0_cmd_dat0>, <&pinctrl_mmc0_slot0_dat1_3>;
  106. #address-cells = <1>;
  107. #size-cells = <0>;
  108. clocks = <&mci0_clk>;
  109. clock-names = "mci_clk";
  110. status = "disabled";
  111. };
  112. i2c0: i2c@fffac000 {
  113. compatible = "atmel,at91sam9261-i2c";
  114. pinctrl-names = "default";
  115. pinctrl-0 = <&pinctrl_i2c_twi>;
  116. reg = <0xfffac000 0x100>;
  117. interrupts = <11 IRQ_TYPE_LEVEL_HIGH 6>;
  118. #address-cells = <1>;
  119. #size-cells = <0>;
  120. clocks = <&twi0_clk>;
  121. status = "disabled";
  122. };
  123. usart0: serial@fffb0000 {
  124. compatible = "atmel,at91sam9260-usart";
  125. reg = <0xfffb0000 0x200>;
  126. interrupts = <6 IRQ_TYPE_LEVEL_HIGH 5>;
  127. atmel,use-dma-rx;
  128. atmel,use-dma-tx;
  129. pinctrl-names = "default";
  130. pinctrl-0 = <&pinctrl_usart0>;
  131. clocks = <&usart0_clk>;
  132. clock-names = "usart";
  133. status = "disabled";
  134. };
  135. usart1: serial@fffb4000 {
  136. compatible = "atmel,at91sam9260-usart";
  137. reg = <0xfffb4000 0x200>;
  138. interrupts = <7 IRQ_TYPE_LEVEL_HIGH 5>;
  139. atmel,use-dma-rx;
  140. atmel,use-dma-tx;
  141. pinctrl-names = "default";
  142. pinctrl-0 = <&pinctrl_usart1>;
  143. clocks = <&usart1_clk>;
  144. clock-names = "usart";
  145. status = "disabled";
  146. };
  147. usart2: serial@fffb8000{
  148. compatible = "atmel,at91sam9260-usart";
  149. reg = <0xfffb8000 0x200>;
  150. interrupts = <8 IRQ_TYPE_LEVEL_HIGH 5>;
  151. atmel,use-dma-rx;
  152. atmel,use-dma-tx;
  153. pinctrl-names = "default";
  154. pinctrl-0 = <&pinctrl_usart2>;
  155. clocks = <&usart2_clk>;
  156. clock-names = "usart";
  157. status = "disabled";
  158. };
  159. ssc0: ssc@fffbc000 {
  160. compatible = "atmel,at91rm9200-ssc";
  161. reg = <0xfffbc000 0x4000>;
  162. interrupts = <14 IRQ_TYPE_LEVEL_HIGH 5>;
  163. pinctrl-names = "default";
  164. pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
  165. status = "disabled";
  166. };
  167. ssc1: ssc@fffc0000 {
  168. compatible = "atmel,at91rm9200-ssc";
  169. reg = <0xfffc0000 0x4000>;
  170. interrupts = <15 IRQ_TYPE_LEVEL_HIGH 5>;
  171. pinctrl-names = "default";
  172. pinctrl-0 = <&pinctrl_ssc1_tx &pinctrl_ssc1_rx>;
  173. status = "disabled";
  174. };
  175. spi0: spi@fffc8000 {
  176. #address-cells = <1>;
  177. #size-cells = <0>;
  178. compatible = "atmel,at91rm9200-spi";
  179. reg = <0xfffc8000 0x200>;
  180. cs-gpios = <0>, <0>, <0>, <0>;
  181. interrupts = <12 IRQ_TYPE_LEVEL_HIGH 3>;
  182. pinctrl-names = "default";
  183. pinctrl-0 = <&pinctrl_spi0>;
  184. clocks = <&spi0_clk>;
  185. clock-names = "spi_clk";
  186. status = "disabled";
  187. };
  188. spi1: spi@fffcc000 {
  189. #address-cells = <1>;
  190. #size-cells = <0>;
  191. compatible = "atmel,at91rm9200-spi";
  192. reg = <0xfffcc000 0x200>;
  193. interrupts = <13 IRQ_TYPE_LEVEL_HIGH 3>;
  194. pinctrl-names = "default";
  195. pinctrl-0 = <&pinctrl_spi1>;
  196. clocks = <&spi1_clk>;
  197. clock-names = "spi_clk";
  198. status = "disabled";
  199. };
  200. ramc: ramc@ffffea00 {
  201. compatible = "atmel,at91sam9260-sdramc";
  202. reg = <0xffffea00 0x200>;
  203. };
  204. matrix: matrix@ffffee00 {
  205. compatible = "atmel,at91sam9260-bus-matrix";
  206. reg = <0xffffee00 0x200>;
  207. };
  208. aic: interrupt-controller@fffff000 {
  209. #interrupt-cells = <3>;
  210. compatible = "atmel,at91rm9200-aic";
  211. interrupt-controller;
  212. reg = <0xfffff000 0x200>;
  213. atmel,external-irqs = <29 30 31>;
  214. };
  215. dbgu: serial@fffff200 {
  216. compatible = "atmel,at91sam9260-usart";
  217. reg = <0xfffff200 0x200>;
  218. interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
  219. pinctrl-names = "default";
  220. pinctrl-0 = <&pinctrl_dbgu>;
  221. clocks = <&mck>;
  222. clock-names = "usart";
  223. status = "disabled";
  224. };
  225. pinctrl@fffff400 {
  226. #address-cells = <1>;
  227. #size-cells = <1>;
  228. compatible = "atmel,at91rm9200-pinctrl", "simple-bus";
  229. ranges = <0xfffff400 0xfffff400 0x600>;
  230. atmel,mux-mask =
  231. /* A B */
  232. <0xffffffff 0xfffffff7>, /* pioA */
  233. <0xffffffff 0xfffffff4>, /* pioB */
  234. <0xffffffff 0xffffff07>; /* pioC */
  235. /* shared pinctrl settings */
  236. dbgu {
  237. pinctrl_dbgu: dbgu-0 {
  238. atmel,pins =
  239. <AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_NONE>,
  240. <AT91_PIOA 10 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
  241. };
  242. };
  243. usart0 {
  244. pinctrl_usart0: usart0-0 {
  245. atmel,pins =
  246. <AT91_PIOC 8 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>,
  247. <AT91_PIOC 9 AT91_PERIPH_A AT91_PINCTRL_NONE>;
  248. };
  249. pinctrl_usart0_rts: usart0_rts-0 {
  250. atmel,pins =
  251. <AT91_PIOC 10 AT91_PERIPH_A AT91_PINCTRL_NONE>;
  252. };
  253. pinctrl_usart0_cts: usart0_cts-0 {
  254. atmel,pins =
  255. <AT91_PIOC 11 AT91_PERIPH_A AT91_PINCTRL_NONE>;
  256. };
  257. };
  258. usart1 {
  259. pinctrl_usart1: usart1-0 {
  260. atmel,pins =
  261. <AT91_PIOC 12 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>,
  262. <AT91_PIOC 13 AT91_PERIPH_A AT91_PINCTRL_NONE>;
  263. };
  264. pinctrl_usart1_rts: usart1_rts-0 {
  265. atmel,pins =
  266. <AT91_PIOA 12 AT91_PERIPH_B AT91_PINCTRL_NONE>;
  267. };
  268. pinctrl_usart1_cts: usart1_cts-0 {
  269. atmel,pins =
  270. <AT91_PIOA 13 AT91_PERIPH_B AT91_PINCTRL_NONE>;
  271. };
  272. };
  273. usart2 {
  274. pinctrl_usart2: usart2-0 {
  275. atmel,pins =
  276. <AT91_PIOC 14 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>,
  277. <AT91_PIOC 15 AT91_PERIPH_A AT91_PINCTRL_NONE>;
  278. };
  279. pinctrl_usart2_rts: usart2_rts-0 {
  280. atmel,pins =
  281. <AT91_PIOA 15 AT91_PERIPH_B AT91_PINCTRL_NONE>;
  282. };
  283. pinctrl_usart2_cts: usart2_cts-0 {
  284. atmel,pins =
  285. <AT91_PIOA 16 AT91_PERIPH_B AT91_PINCTRL_NONE>;
  286. };
  287. };
  288. nand {
  289. pinctrl_nand: nand-0 {
  290. atmel,pins =
  291. <AT91_PIOC 15 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>,
  292. <AT91_PIOC 14 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>;
  293. };
  294. };
  295. mmc0 {
  296. pinctrl_mmc0_clk: mmc0_clk-0 {
  297. atmel,pins =
  298. <AT91_PIOA 2 AT91_PERIPH_B AT91_PINCTRL_NONE>;
  299. };
  300. pinctrl_mmc0_slot0_cmd_dat0: mmc0_slot0_cmd_dat0-0 {
  301. atmel,pins =
  302. <AT91_PIOA 1 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>,
  303. <AT91_PIOA 0 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>;
  304. };
  305. pinctrl_mmc0_slot0_dat1_3: mmc0_slot0_dat1_3-0 {
  306. atmel,pins =
  307. <AT91_PIOA 4 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>,
  308. <AT91_PIOA 5 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>,
  309. <AT91_PIOA 6 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>;
  310. };
  311. };
  312. ssc0 {
  313. pinctrl_ssc0_tx: ssc0_tx-0 {
  314. atmel,pins =
  315. <AT91_PIOB 21 AT91_PERIPH_A AT91_PINCTRL_NONE>,
  316. <AT91_PIOB 22 AT91_PERIPH_A AT91_PINCTRL_NONE>,
  317. <AT91_PIOB 23 AT91_PERIPH_A AT91_PINCTRL_NONE>;
  318. };
  319. pinctrl_ssc0_rx: ssc0_rx-0 {
  320. atmel,pins =
  321. <AT91_PIOB 24 AT91_PERIPH_A AT91_PINCTRL_NONE>,
  322. <AT91_PIOB 25 AT91_PERIPH_A AT91_PINCTRL_NONE>,
  323. <AT91_PIOB 26 AT91_PERIPH_A AT91_PINCTRL_NONE>;
  324. };
  325. };
  326. ssc1 {
  327. pinctrl_ssc1_tx: ssc1_tx-0 {
  328. atmel,pins =
  329. <AT91_PIOA 17 AT91_PERIPH_B AT91_PINCTRL_NONE>,
  330. <AT91_PIOA 18 AT91_PERIPH_B AT91_PINCTRL_NONE>,
  331. <AT91_PIOA 19 AT91_PERIPH_B AT91_PINCTRL_NONE>;
  332. };
  333. pinctrl_ssc1_rx: ssc1_rx-0 {
  334. atmel,pins =
  335. <AT91_PIOA 20 AT91_PERIPH_B AT91_PINCTRL_NONE>,
  336. <AT91_PIOA 21 AT91_PERIPH_B AT91_PINCTRL_NONE>,
  337. <AT91_PIOA 22 AT91_PERIPH_B AT91_PINCTRL_NONE>;
  338. };
  339. };
  340. spi0 {
  341. pinctrl_spi0: spi0-0 {
  342. atmel,pins =
  343. <AT91_PIOA 0 AT91_PERIPH_A AT91_PINCTRL_NONE>,
  344. <AT91_PIOA 1 AT91_PERIPH_A AT91_PINCTRL_NONE>,
  345. <AT91_PIOA 2 AT91_PERIPH_A AT91_PINCTRL_NONE>;
  346. };
  347. };
  348. spi1 {
  349. pinctrl_spi1: spi1-0 {
  350. atmel,pins =
  351. <AT91_PIOB 30 AT91_PERIPH_A AT91_PINCTRL_NONE>,
  352. <AT91_PIOB 31 AT91_PERIPH_A AT91_PINCTRL_NONE>,
  353. <AT91_PIOB 29 AT91_PERIPH_A AT91_PINCTRL_NONE>;
  354. };
  355. };
  356. tcb0 {
  357. pinctrl_tcb0_tclk0: tcb0_tclk0-0 {
  358. atmel,pins = <AT91_PIOC 16 AT91_PERIPH_B AT91_PINCTRL_NONE>;
  359. };
  360. pinctrl_tcb0_tclk1: tcb0_tclk1-0 {
  361. atmel,pins = <AT91_PIOC 17 AT91_PERIPH_B AT91_PINCTRL_NONE>;
  362. };
  363. pinctrl_tcb0_tclk2: tcb0_tclk2-0 {
  364. atmel,pins = <AT91_PIOC 18 AT91_PERIPH_B AT91_PINCTRL_NONE>;
  365. };
  366. pinctrl_tcb0_tioa0: tcb0_tioa0-0 {
  367. atmel,pins = <AT91_PIOC 19 AT91_PERIPH_B AT91_PINCTRL_NONE>;
  368. };
  369. pinctrl_tcb0_tioa1: tcb0_tioa1-0 {
  370. atmel,pins = <AT91_PIOC 21 AT91_PERIPH_B AT91_PINCTRL_NONE>;
  371. };
  372. pinctrl_tcb0_tioa2: tcb0_tioa2-0 {
  373. atmel,pins = <AT91_PIOC 23 AT91_PERIPH_B AT91_PINCTRL_NONE>;
  374. };
  375. pinctrl_tcb0_tiob0: tcb0_tiob0-0 {
  376. atmel,pins = <AT91_PIOC 20 AT91_PERIPH_B AT91_PINCTRL_NONE>;
  377. };
  378. pinctrl_tcb0_tiob1: tcb0_tiob1-0 {
  379. atmel,pins = <AT91_PIOC 22 AT91_PERIPH_B AT91_PINCTRL_NONE>;
  380. };
  381. pinctrl_tcb0_tiob2: tcb0_tiob2-0 {
  382. atmel,pins = <AT91_PIOC 24 AT91_PERIPH_B AT91_PINCTRL_NONE>;
  383. };
  384. };
  385. i2c0 {
  386. pinctrl_i2c_bitbang: i2c-0-bitbang {
  387. atmel,pins =
  388. <AT91_PIOA 7 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>,
  389. <AT91_PIOA 8 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>;
  390. };
  391. pinctrl_i2c_twi: i2c-0-twi {
  392. atmel,pins =
  393. <AT91_PIOA 7 AT91_PERIPH_A AT91_PINCTRL_NONE>,
  394. <AT91_PIOA 8 AT91_PERIPH_A AT91_PINCTRL_NONE>;
  395. };
  396. };
  397. fb {
  398. pinctrl_fb: fb-0 {
  399. atmel,pins =
  400. <AT91_PIOB 1 AT91_PERIPH_A AT91_PINCTRL_NONE>,
  401. <AT91_PIOB 2 AT91_PERIPH_A AT91_PINCTRL_NONE>,
  402. <AT91_PIOB 3 AT91_PERIPH_A AT91_PINCTRL_NONE>,
  403. <AT91_PIOB 7 AT91_PERIPH_A AT91_PINCTRL_NONE>,
  404. <AT91_PIOB 8 AT91_PERIPH_A AT91_PINCTRL_NONE>,
  405. <AT91_PIOB 9 AT91_PERIPH_A AT91_PINCTRL_NONE>,
  406. <AT91_PIOB 10 AT91_PERIPH_A AT91_PINCTRL_NONE>,
  407. <AT91_PIOB 11 AT91_PERIPH_A AT91_PINCTRL_NONE>,
  408. <AT91_PIOB 12 AT91_PERIPH_A AT91_PINCTRL_NONE>,
  409. <AT91_PIOB 15 AT91_PERIPH_A AT91_PINCTRL_NONE>,
  410. <AT91_PIOB 16 AT91_PERIPH_A AT91_PINCTRL_NONE>,
  411. <AT91_PIOB 17 AT91_PERIPH_A AT91_PINCTRL_NONE>,
  412. <AT91_PIOB 18 AT91_PERIPH_A AT91_PINCTRL_NONE>,
  413. <AT91_PIOB 19 AT91_PERIPH_A AT91_PINCTRL_NONE>,
  414. <AT91_PIOB 20 AT91_PERIPH_A AT91_PINCTRL_NONE>,
  415. <AT91_PIOB 23 AT91_PERIPH_B AT91_PINCTRL_NONE>,
  416. <AT91_PIOB 24 AT91_PERIPH_B AT91_PINCTRL_NONE>,
  417. <AT91_PIOB 25 AT91_PERIPH_B AT91_PINCTRL_NONE>,
  418. <AT91_PIOB 26 AT91_PERIPH_B AT91_PINCTRL_NONE>,
  419. <AT91_PIOB 27 AT91_PERIPH_B AT91_PINCTRL_NONE>,
  420. <AT91_PIOB 28 AT91_PERIPH_B AT91_PINCTRL_NONE>;
  421. };
  422. };
  423. pioA: gpio@fffff400 {
  424. compatible = "atmel,at91rm9200-gpio";
  425. reg = <0xfffff400 0x200>;
  426. interrupts = <2 IRQ_TYPE_LEVEL_HIGH 1>;
  427. #gpio-cells = <2>;
  428. gpio-controller;
  429. interrupt-controller;
  430. #interrupt-cells = <2>;
  431. clocks = <&pioA_clk>;
  432. };
  433. pioB: gpio@fffff600 {
  434. compatible = "atmel,at91rm9200-gpio";
  435. reg = <0xfffff600 0x200>;
  436. interrupts = <3 IRQ_TYPE_LEVEL_HIGH 1>;
  437. #gpio-cells = <2>;
  438. gpio-controller;
  439. interrupt-controller;
  440. #interrupt-cells = <2>;
  441. clocks = <&pioB_clk>;
  442. };
  443. pioC: gpio@fffff800 {
  444. compatible = "atmel,at91rm9200-gpio";
  445. reg = <0xfffff800 0x200>;
  446. interrupts = <4 IRQ_TYPE_LEVEL_HIGH 1>;
  447. #gpio-cells = <2>;
  448. gpio-controller;
  449. interrupt-controller;
  450. #interrupt-cells = <2>;
  451. clocks = <&pioC_clk>;
  452. };
  453. };
  454. pmc: pmc@fffffc00 {
  455. compatible = "atmel,at91rm9200-pmc";
  456. reg = <0xfffffc00 0x100>;
  457. interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
  458. interrupt-controller;
  459. #address-cells = <1>;
  460. #size-cells = <0>;
  461. #interrupt-cells = <1>;
  462. clk32k: slck {
  463. compatible = "fixed-clock";
  464. #clock-cells = <0>;
  465. clock-frequency = <32768>;
  466. };
  467. main: mainck {
  468. compatible = "atmel,at91rm9200-clk-main";
  469. #clock-cells = <0>;
  470. interrupts-extended = <&pmc AT91_PMC_MOSCS>;
  471. clocks = <&clk32k>;
  472. };
  473. plla: pllack {
  474. compatible = "atmel,at91rm9200-clk-pll";
  475. #clock-cells = <0>;
  476. interrupts-extended = <&pmc AT91_PMC_LOCKA>;
  477. clocks = <&main>;
  478. reg = <0>;
  479. atmel,clk-input-range = <1000000 32000000>;
  480. #atmel,pll-clk-output-range-cells = <4>;
  481. atmel,pll-clk-output-ranges = <80000000 200000000 190000000 240000000>;
  482. };
  483. pllb: pllbck {
  484. compatible = "atmel,at91rm9200-clk-pll";
  485. #clock-cells = <0>;
  486. interrupts-extended = <&pmc AT91_PMC_LOCKB>;
  487. clocks = <&main>;
  488. reg = <1>;
  489. atmel,clk-input-range = <1000000 32000000>;
  490. #atmel,pll-clk-output-range-cells = <4>;
  491. atmel,pll-clk-output-ranges = <80000000 200000000 190000000 240000000>;
  492. };
  493. mck: masterck {
  494. compatible = "atmel,at91rm9200-clk-master";
  495. #clock-cells = <0>;
  496. interrupts-extended = <&pmc AT91_PMC_MCKRDY>;
  497. clocks = <&clk32k>, <&main>, <&plla>, <&pllb>;
  498. atmel,clk-output-range = <0 94000000>;
  499. atmel,clk-divisors = <1 2 4 3>;
  500. };
  501. usb: usbck {
  502. compatible = "atmel,at91rm9200-clk-usb";
  503. #clock-cells = <0>;
  504. atmel,clk-divisors = <1 2 4 3>;
  505. clocks = <&pllb>;
  506. };
  507. systemck {
  508. compatible = "atmel,at91rm9200-clk-system";
  509. #address-cells = <1>;
  510. #size-cells = <0>;
  511. uhpck: uhpck {
  512. #clock-cells = <0>;
  513. reg = <6>;
  514. clocks = <&usb>;
  515. };
  516. udpck: udpck {
  517. #clock-cells = <0>;
  518. reg = <7>;
  519. clocks = <&usb>;
  520. };
  521. hclk0: hclk0 {
  522. #clock-cells = <0>;
  523. reg = <16>;
  524. clocks = <&mck>;
  525. };
  526. hclk1: hclk1 {
  527. #clock-cells = <0>;
  528. reg = <17>;
  529. clocks = <&mck>;
  530. };
  531. };
  532. periphck {
  533. compatible = "atmel,at91rm9200-clk-peripheral";
  534. #address-cells = <1>;
  535. #size-cells = <0>;
  536. clocks = <&mck>;
  537. pioA_clk: pioA_clk {
  538. #clock-cells = <0>;
  539. reg = <2>;
  540. };
  541. pioB_clk: pioB_clk {
  542. #clock-cells = <0>;
  543. reg = <3>;
  544. };
  545. pioC_clk: pioC_clk {
  546. #clock-cells = <0>;
  547. reg = <4>;
  548. };
  549. usart0_clk: usart0_clk {
  550. #clock-cells = <0>;
  551. reg = <6>;
  552. };
  553. usart1_clk: usart1_clk {
  554. #clock-cells = <0>;
  555. reg = <7>;
  556. };
  557. usart2_clk: usart2_clk {
  558. #clock-cells = <0>;
  559. reg = <8>;
  560. };
  561. mci0_clk: mci0_clk {
  562. #clock-cells = <0>;
  563. reg = <9>;
  564. };
  565. udc_clk: udc_clk {
  566. #clock-cells = <0>;
  567. reg = <10>;
  568. };
  569. twi0_clk: twi0_clk {
  570. reg = <11>;
  571. #clock-cells = <0>;
  572. };
  573. spi0_clk: spi0_clk {
  574. #clock-cells = <0>;
  575. reg = <12>;
  576. };
  577. spi1_clk: spi1_clk {
  578. #clock-cells = <0>;
  579. reg = <13>;
  580. };
  581. tc0_clk: tc0_clk {
  582. #clock-cells = <0>;
  583. reg = <17>;
  584. };
  585. tc1_clk: tc1_clk {
  586. #clock-cells = <0>;
  587. reg = <18>;
  588. };
  589. tc2_clk: tc2_clk {
  590. #clock-cells = <0>;
  591. reg = <19>;
  592. };
  593. ohci_clk: ohci_clk {
  594. #clock-cells = <0>;
  595. reg = <20>;
  596. };
  597. lcd_clk: lcd_clk {
  598. #clock-cells = <0>;
  599. reg = <21>;
  600. };
  601. };
  602. };
  603. rstc@fffffd00 {
  604. compatible = "atmel,at91sam9260-rstc";
  605. reg = <0xfffffd00 0x10>;
  606. };
  607. shdwc@fffffd10 {
  608. compatible = "atmel,at91sam9260-shdwc";
  609. reg = <0xfffffd10 0x10>;
  610. };
  611. pit: timer@fffffd30 {
  612. compatible = "atmel,at91sam9260-pit";
  613. reg = <0xfffffd30 0xf>;
  614. interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
  615. clocks = <&mck>;
  616. };
  617. watchdog@fffffd40 {
  618. compatible = "atmel,at91sam9260-wdt";
  619. reg = <0xfffffd40 0x10>;
  620. interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
  621. status = "disabled";
  622. };
  623. };
  624. };
  625. i2c@0 {
  626. compatible = "i2c-gpio";
  627. pinctrl-names = "default";
  628. pinctrl-0 = <&pinctrl_i2c_bitbang>;
  629. gpios = <&pioA 7 GPIO_ACTIVE_HIGH>, /* sda */
  630. <&pioA 8 GPIO_ACTIVE_HIGH>; /* scl */
  631. i2c-gpio,sda-open-drain;
  632. i2c-gpio,scl-open-drain;
  633. i2c-gpio,delay-us = <2>; /* ~100 kHz */
  634. #address-cells = <1>;
  635. #size-cells = <0>;
  636. status = "disabled";
  637. };
  638. };