htt_rx.c 46 KB

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  1. /*
  2. * Copyright (c) 2005-2011 Atheros Communications Inc.
  3. * Copyright (c) 2011-2013 Qualcomm Atheros, Inc.
  4. *
  5. * Permission to use, copy, modify, and/or distribute this software for any
  6. * purpose with or without fee is hereby granted, provided that the above
  7. * copyright notice and this permission notice appear in all copies.
  8. *
  9. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
  10. * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  11. * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  12. * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  13. * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  14. * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  15. * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  16. */
  17. #include "core.h"
  18. #include "htc.h"
  19. #include "htt.h"
  20. #include "txrx.h"
  21. #include "debug.h"
  22. #include "trace.h"
  23. #include "mac.h"
  24. #include <linux/log2.h>
  25. /* slightly larger than one large A-MPDU */
  26. #define HTT_RX_RING_SIZE_MIN 128
  27. /* roughly 20 ms @ 1 Gbps of 1500B MSDUs */
  28. #define HTT_RX_RING_SIZE_MAX 2048
  29. #define HTT_RX_AVG_FRM_BYTES 1000
  30. /* ms, very conservative */
  31. #define HTT_RX_HOST_LATENCY_MAX_MS 20
  32. /* ms, conservative */
  33. #define HTT_RX_HOST_LATENCY_WORST_LIKELY_MS 10
  34. /* when under memory pressure rx ring refill may fail and needs a retry */
  35. #define HTT_RX_RING_REFILL_RETRY_MS 50
  36. static int ath10k_htt_rx_get_csum_state(struct sk_buff *skb);
  37. static void ath10k_htt_txrx_compl_task(unsigned long ptr);
  38. static int ath10k_htt_rx_ring_size(struct ath10k_htt *htt)
  39. {
  40. int size;
  41. /*
  42. * It is expected that the host CPU will typically be able to
  43. * service the rx indication from one A-MPDU before the rx
  44. * indication from the subsequent A-MPDU happens, roughly 1-2 ms
  45. * later. However, the rx ring should be sized very conservatively,
  46. * to accomodate the worst reasonable delay before the host CPU
  47. * services a rx indication interrupt.
  48. *
  49. * The rx ring need not be kept full of empty buffers. In theory,
  50. * the htt host SW can dynamically track the low-water mark in the
  51. * rx ring, and dynamically adjust the level to which the rx ring
  52. * is filled with empty buffers, to dynamically meet the desired
  53. * low-water mark.
  54. *
  55. * In contrast, it's difficult to resize the rx ring itself, once
  56. * it's in use. Thus, the ring itself should be sized very
  57. * conservatively, while the degree to which the ring is filled
  58. * with empty buffers should be sized moderately conservatively.
  59. */
  60. /* 1e6 bps/mbps / 1e3 ms per sec = 1000 */
  61. size =
  62. htt->max_throughput_mbps +
  63. 1000 /
  64. (8 * HTT_RX_AVG_FRM_BYTES) * HTT_RX_HOST_LATENCY_MAX_MS;
  65. if (size < HTT_RX_RING_SIZE_MIN)
  66. size = HTT_RX_RING_SIZE_MIN;
  67. if (size > HTT_RX_RING_SIZE_MAX)
  68. size = HTT_RX_RING_SIZE_MAX;
  69. size = roundup_pow_of_two(size);
  70. return size;
  71. }
  72. static int ath10k_htt_rx_ring_fill_level(struct ath10k_htt *htt)
  73. {
  74. int size;
  75. /* 1e6 bps/mbps / 1e3 ms per sec = 1000 */
  76. size =
  77. htt->max_throughput_mbps *
  78. 1000 /
  79. (8 * HTT_RX_AVG_FRM_BYTES) * HTT_RX_HOST_LATENCY_WORST_LIKELY_MS;
  80. /*
  81. * Make sure the fill level is at least 1 less than the ring size.
  82. * Leaving 1 element empty allows the SW to easily distinguish
  83. * between a full ring vs. an empty ring.
  84. */
  85. if (size >= htt->rx_ring.size)
  86. size = htt->rx_ring.size - 1;
  87. return size;
  88. }
  89. static void ath10k_htt_rx_ring_free(struct ath10k_htt *htt)
  90. {
  91. struct sk_buff *skb;
  92. struct ath10k_skb_cb *cb;
  93. int i;
  94. for (i = 0; i < htt->rx_ring.fill_cnt; i++) {
  95. skb = htt->rx_ring.netbufs_ring[i];
  96. cb = ATH10K_SKB_CB(skb);
  97. dma_unmap_single(htt->ar->dev, cb->paddr,
  98. skb->len + skb_tailroom(skb),
  99. DMA_FROM_DEVICE);
  100. dev_kfree_skb_any(skb);
  101. }
  102. htt->rx_ring.fill_cnt = 0;
  103. }
  104. static int __ath10k_htt_rx_ring_fill_n(struct ath10k_htt *htt, int num)
  105. {
  106. struct htt_rx_desc *rx_desc;
  107. struct sk_buff *skb;
  108. dma_addr_t paddr;
  109. int ret = 0, idx;
  110. idx = __le32_to_cpu(*htt->rx_ring.alloc_idx.vaddr);
  111. while (num > 0) {
  112. skb = dev_alloc_skb(HTT_RX_BUF_SIZE + HTT_RX_DESC_ALIGN);
  113. if (!skb) {
  114. ret = -ENOMEM;
  115. goto fail;
  116. }
  117. if (!IS_ALIGNED((unsigned long)skb->data, HTT_RX_DESC_ALIGN))
  118. skb_pull(skb,
  119. PTR_ALIGN(skb->data, HTT_RX_DESC_ALIGN) -
  120. skb->data);
  121. /* Clear rx_desc attention word before posting to Rx ring */
  122. rx_desc = (struct htt_rx_desc *)skb->data;
  123. rx_desc->attention.flags = __cpu_to_le32(0);
  124. paddr = dma_map_single(htt->ar->dev, skb->data,
  125. skb->len + skb_tailroom(skb),
  126. DMA_FROM_DEVICE);
  127. if (unlikely(dma_mapping_error(htt->ar->dev, paddr))) {
  128. dev_kfree_skb_any(skb);
  129. ret = -ENOMEM;
  130. goto fail;
  131. }
  132. ATH10K_SKB_CB(skb)->paddr = paddr;
  133. htt->rx_ring.netbufs_ring[idx] = skb;
  134. htt->rx_ring.paddrs_ring[idx] = __cpu_to_le32(paddr);
  135. htt->rx_ring.fill_cnt++;
  136. num--;
  137. idx++;
  138. idx &= htt->rx_ring.size_mask;
  139. }
  140. fail:
  141. *htt->rx_ring.alloc_idx.vaddr = __cpu_to_le32(idx);
  142. return ret;
  143. }
  144. static int ath10k_htt_rx_ring_fill_n(struct ath10k_htt *htt, int num)
  145. {
  146. lockdep_assert_held(&htt->rx_ring.lock);
  147. return __ath10k_htt_rx_ring_fill_n(htt, num);
  148. }
  149. static void ath10k_htt_rx_msdu_buff_replenish(struct ath10k_htt *htt)
  150. {
  151. int ret, num_deficit, num_to_fill;
  152. /* Refilling the whole RX ring buffer proves to be a bad idea. The
  153. * reason is RX may take up significant amount of CPU cycles and starve
  154. * other tasks, e.g. TX on an ethernet device while acting as a bridge
  155. * with ath10k wlan interface. This ended up with very poor performance
  156. * once CPU the host system was overwhelmed with RX on ath10k.
  157. *
  158. * By limiting the number of refills the replenishing occurs
  159. * progressively. This in turns makes use of the fact tasklets are
  160. * processed in FIFO order. This means actual RX processing can starve
  161. * out refilling. If there's not enough buffers on RX ring FW will not
  162. * report RX until it is refilled with enough buffers. This
  163. * automatically balances load wrt to CPU power.
  164. *
  165. * This probably comes at a cost of lower maximum throughput but
  166. * improves the avarage and stability. */
  167. spin_lock_bh(&htt->rx_ring.lock);
  168. num_deficit = htt->rx_ring.fill_level - htt->rx_ring.fill_cnt;
  169. num_to_fill = min(ATH10K_HTT_MAX_NUM_REFILL, num_deficit);
  170. num_deficit -= num_to_fill;
  171. ret = ath10k_htt_rx_ring_fill_n(htt, num_to_fill);
  172. if (ret == -ENOMEM) {
  173. /*
  174. * Failed to fill it to the desired level -
  175. * we'll start a timer and try again next time.
  176. * As long as enough buffers are left in the ring for
  177. * another A-MPDU rx, no special recovery is needed.
  178. */
  179. mod_timer(&htt->rx_ring.refill_retry_timer, jiffies +
  180. msecs_to_jiffies(HTT_RX_RING_REFILL_RETRY_MS));
  181. } else if (num_deficit > 0) {
  182. tasklet_schedule(&htt->rx_replenish_task);
  183. }
  184. spin_unlock_bh(&htt->rx_ring.lock);
  185. }
  186. static void ath10k_htt_rx_ring_refill_retry(unsigned long arg)
  187. {
  188. struct ath10k_htt *htt = (struct ath10k_htt *)arg;
  189. ath10k_htt_rx_msdu_buff_replenish(htt);
  190. }
  191. static void ath10k_htt_rx_ring_clean_up(struct ath10k_htt *htt)
  192. {
  193. struct sk_buff *skb;
  194. int i;
  195. for (i = 0; i < htt->rx_ring.size; i++) {
  196. skb = htt->rx_ring.netbufs_ring[i];
  197. if (!skb)
  198. continue;
  199. dma_unmap_single(htt->ar->dev, ATH10K_SKB_CB(skb)->paddr,
  200. skb->len + skb_tailroom(skb),
  201. DMA_FROM_DEVICE);
  202. dev_kfree_skb_any(skb);
  203. htt->rx_ring.netbufs_ring[i] = NULL;
  204. }
  205. }
  206. void ath10k_htt_rx_free(struct ath10k_htt *htt)
  207. {
  208. del_timer_sync(&htt->rx_ring.refill_retry_timer);
  209. tasklet_kill(&htt->rx_replenish_task);
  210. tasklet_kill(&htt->txrx_compl_task);
  211. skb_queue_purge(&htt->tx_compl_q);
  212. skb_queue_purge(&htt->rx_compl_q);
  213. ath10k_htt_rx_ring_clean_up(htt);
  214. dma_free_coherent(htt->ar->dev,
  215. (htt->rx_ring.size *
  216. sizeof(htt->rx_ring.paddrs_ring)),
  217. htt->rx_ring.paddrs_ring,
  218. htt->rx_ring.base_paddr);
  219. dma_free_coherent(htt->ar->dev,
  220. sizeof(*htt->rx_ring.alloc_idx.vaddr),
  221. htt->rx_ring.alloc_idx.vaddr,
  222. htt->rx_ring.alloc_idx.paddr);
  223. kfree(htt->rx_ring.netbufs_ring);
  224. }
  225. static inline struct sk_buff *ath10k_htt_rx_netbuf_pop(struct ath10k_htt *htt)
  226. {
  227. struct ath10k *ar = htt->ar;
  228. int idx;
  229. struct sk_buff *msdu;
  230. lockdep_assert_held(&htt->rx_ring.lock);
  231. if (htt->rx_ring.fill_cnt == 0) {
  232. ath10k_warn(ar, "tried to pop sk_buff from an empty rx ring\n");
  233. return NULL;
  234. }
  235. idx = htt->rx_ring.sw_rd_idx.msdu_payld;
  236. msdu = htt->rx_ring.netbufs_ring[idx];
  237. htt->rx_ring.netbufs_ring[idx] = NULL;
  238. idx++;
  239. idx &= htt->rx_ring.size_mask;
  240. htt->rx_ring.sw_rd_idx.msdu_payld = idx;
  241. htt->rx_ring.fill_cnt--;
  242. dma_unmap_single(htt->ar->dev,
  243. ATH10K_SKB_CB(msdu)->paddr,
  244. msdu->len + skb_tailroom(msdu),
  245. DMA_FROM_DEVICE);
  246. ath10k_dbg_dump(ar, ATH10K_DBG_HTT_DUMP, NULL, "htt rx netbuf pop: ",
  247. msdu->data, msdu->len + skb_tailroom(msdu));
  248. return msdu;
  249. }
  250. static void ath10k_htt_rx_free_msdu_chain(struct sk_buff *skb)
  251. {
  252. struct sk_buff *next;
  253. while (skb) {
  254. next = skb->next;
  255. dev_kfree_skb_any(skb);
  256. skb = next;
  257. }
  258. }
  259. /* return: < 0 fatal error, 0 - non chained msdu, 1 chained msdu */
  260. static int ath10k_htt_rx_amsdu_pop(struct ath10k_htt *htt,
  261. u8 **fw_desc, int *fw_desc_len,
  262. struct sk_buff **head_msdu,
  263. struct sk_buff **tail_msdu,
  264. u32 *attention)
  265. {
  266. struct ath10k *ar = htt->ar;
  267. int msdu_len, msdu_chaining = 0;
  268. struct sk_buff *msdu, *next;
  269. struct htt_rx_desc *rx_desc;
  270. lockdep_assert_held(&htt->rx_ring.lock);
  271. if (htt->rx_confused) {
  272. ath10k_warn(ar, "htt is confused. refusing rx\n");
  273. return -1;
  274. }
  275. msdu = *head_msdu = ath10k_htt_rx_netbuf_pop(htt);
  276. while (msdu) {
  277. int last_msdu, msdu_len_invalid, msdu_chained;
  278. rx_desc = (struct htt_rx_desc *)msdu->data;
  279. /* FIXME: we must report msdu payload since this is what caller
  280. * expects now */
  281. skb_put(msdu, offsetof(struct htt_rx_desc, msdu_payload));
  282. skb_pull(msdu, offsetof(struct htt_rx_desc, msdu_payload));
  283. /*
  284. * Sanity check - confirm the HW is finished filling in the
  285. * rx data.
  286. * If the HW and SW are working correctly, then it's guaranteed
  287. * that the HW's MAC DMA is done before this point in the SW.
  288. * To prevent the case that we handle a stale Rx descriptor,
  289. * just assert for now until we have a way to recover.
  290. */
  291. if (!(__le32_to_cpu(rx_desc->attention.flags)
  292. & RX_ATTENTION_FLAGS_MSDU_DONE)) {
  293. ath10k_htt_rx_free_msdu_chain(*head_msdu);
  294. *head_msdu = NULL;
  295. msdu = NULL;
  296. ath10k_err(ar, "htt rx stopped. cannot recover\n");
  297. htt->rx_confused = true;
  298. break;
  299. }
  300. *attention |= __le32_to_cpu(rx_desc->attention.flags) &
  301. (RX_ATTENTION_FLAGS_TKIP_MIC_ERR |
  302. RX_ATTENTION_FLAGS_DECRYPT_ERR |
  303. RX_ATTENTION_FLAGS_FCS_ERR |
  304. RX_ATTENTION_FLAGS_MGMT_TYPE);
  305. /*
  306. * Copy the FW rx descriptor for this MSDU from the rx
  307. * indication message into the MSDU's netbuf. HL uses the
  308. * same rx indication message definition as LL, and simply
  309. * appends new info (fields from the HW rx desc, and the
  310. * MSDU payload itself). So, the offset into the rx
  311. * indication message only has to account for the standard
  312. * offset of the per-MSDU FW rx desc info within the
  313. * message, and how many bytes of the per-MSDU FW rx desc
  314. * info have already been consumed. (And the endianness of
  315. * the host, since for a big-endian host, the rx ind
  316. * message contents, including the per-MSDU rx desc bytes,
  317. * were byteswapped during upload.)
  318. */
  319. if (*fw_desc_len > 0) {
  320. rx_desc->fw_desc.info0 = **fw_desc;
  321. /*
  322. * The target is expected to only provide the basic
  323. * per-MSDU rx descriptors. Just to be sure, verify
  324. * that the target has not attached extension data
  325. * (e.g. LRO flow ID).
  326. */
  327. /* or more, if there's extension data */
  328. (*fw_desc)++;
  329. (*fw_desc_len)--;
  330. } else {
  331. /*
  332. * When an oversized AMSDU happened, FW will lost
  333. * some of MSDU status - in this case, the FW
  334. * descriptors provided will be less than the
  335. * actual MSDUs inside this MPDU. Mark the FW
  336. * descriptors so that it will still deliver to
  337. * upper stack, if no CRC error for this MPDU.
  338. *
  339. * FIX THIS - the FW descriptors are actually for
  340. * MSDUs in the end of this A-MSDU instead of the
  341. * beginning.
  342. */
  343. rx_desc->fw_desc.info0 = 0;
  344. }
  345. msdu_len_invalid = !!(__le32_to_cpu(rx_desc->attention.flags)
  346. & (RX_ATTENTION_FLAGS_MPDU_LENGTH_ERR |
  347. RX_ATTENTION_FLAGS_MSDU_LENGTH_ERR));
  348. msdu_len = MS(__le32_to_cpu(rx_desc->msdu_start.info0),
  349. RX_MSDU_START_INFO0_MSDU_LENGTH);
  350. msdu_chained = rx_desc->frag_info.ring2_more_count;
  351. if (msdu_len_invalid)
  352. msdu_len = 0;
  353. skb_trim(msdu, 0);
  354. skb_put(msdu, min(msdu_len, HTT_RX_MSDU_SIZE));
  355. msdu_len -= msdu->len;
  356. /* FIXME: Do chained buffers include htt_rx_desc or not? */
  357. while (msdu_chained--) {
  358. struct sk_buff *next = ath10k_htt_rx_netbuf_pop(htt);
  359. if (!next) {
  360. ath10k_warn(ar, "failed to pop chained msdu\n");
  361. ath10k_htt_rx_free_msdu_chain(*head_msdu);
  362. *head_msdu = NULL;
  363. msdu = NULL;
  364. htt->rx_confused = true;
  365. break;
  366. }
  367. skb_trim(next, 0);
  368. skb_put(next, min(msdu_len, HTT_RX_BUF_SIZE));
  369. msdu_len -= next->len;
  370. msdu->next = next;
  371. msdu = next;
  372. msdu_chaining = 1;
  373. }
  374. last_msdu = __le32_to_cpu(rx_desc->msdu_end.info0) &
  375. RX_MSDU_END_INFO0_LAST_MSDU;
  376. trace_ath10k_htt_rx_desc(ar, &rx_desc->attention,
  377. sizeof(*rx_desc) - sizeof(u32));
  378. if (last_msdu) {
  379. msdu->next = NULL;
  380. break;
  381. }
  382. next = ath10k_htt_rx_netbuf_pop(htt);
  383. msdu->next = next;
  384. msdu = next;
  385. }
  386. *tail_msdu = msdu;
  387. if (*head_msdu == NULL)
  388. msdu_chaining = -1;
  389. /*
  390. * Don't refill the ring yet.
  391. *
  392. * First, the elements popped here are still in use - it is not
  393. * safe to overwrite them until the matching call to
  394. * mpdu_desc_list_next. Second, for efficiency it is preferable to
  395. * refill the rx ring with 1 PPDU's worth of rx buffers (something
  396. * like 32 x 3 buffers), rather than one MPDU's worth of rx buffers
  397. * (something like 3 buffers). Consequently, we'll rely on the txrx
  398. * SW to tell us when it is done pulling all the PPDU's rx buffers
  399. * out of the rx ring, and then refill it just once.
  400. */
  401. return msdu_chaining;
  402. }
  403. static void ath10k_htt_rx_replenish_task(unsigned long ptr)
  404. {
  405. struct ath10k_htt *htt = (struct ath10k_htt *)ptr;
  406. ath10k_htt_rx_msdu_buff_replenish(htt);
  407. }
  408. int ath10k_htt_rx_alloc(struct ath10k_htt *htt)
  409. {
  410. struct ath10k *ar = htt->ar;
  411. dma_addr_t paddr;
  412. void *vaddr;
  413. size_t size;
  414. struct timer_list *timer = &htt->rx_ring.refill_retry_timer;
  415. htt->rx_confused = false;
  416. htt->rx_ring.size = ath10k_htt_rx_ring_size(htt);
  417. if (!is_power_of_2(htt->rx_ring.size)) {
  418. ath10k_warn(ar, "htt rx ring size is not power of 2\n");
  419. return -EINVAL;
  420. }
  421. htt->rx_ring.size_mask = htt->rx_ring.size - 1;
  422. /*
  423. * Set the initial value for the level to which the rx ring
  424. * should be filled, based on the max throughput and the
  425. * worst likely latency for the host to fill the rx ring
  426. * with new buffers. In theory, this fill level can be
  427. * dynamically adjusted from the initial value set here, to
  428. * reflect the actual host latency rather than a
  429. * conservative assumption about the host latency.
  430. */
  431. htt->rx_ring.fill_level = ath10k_htt_rx_ring_fill_level(htt);
  432. htt->rx_ring.netbufs_ring =
  433. kzalloc(htt->rx_ring.size * sizeof(struct sk_buff *),
  434. GFP_KERNEL);
  435. if (!htt->rx_ring.netbufs_ring)
  436. goto err_netbuf;
  437. size = htt->rx_ring.size * sizeof(htt->rx_ring.paddrs_ring);
  438. vaddr = dma_alloc_coherent(htt->ar->dev, size, &paddr, GFP_DMA);
  439. if (!vaddr)
  440. goto err_dma_ring;
  441. htt->rx_ring.paddrs_ring = vaddr;
  442. htt->rx_ring.base_paddr = paddr;
  443. vaddr = dma_alloc_coherent(htt->ar->dev,
  444. sizeof(*htt->rx_ring.alloc_idx.vaddr),
  445. &paddr, GFP_DMA);
  446. if (!vaddr)
  447. goto err_dma_idx;
  448. htt->rx_ring.alloc_idx.vaddr = vaddr;
  449. htt->rx_ring.alloc_idx.paddr = paddr;
  450. htt->rx_ring.sw_rd_idx.msdu_payld = 0;
  451. *htt->rx_ring.alloc_idx.vaddr = 0;
  452. /* Initialize the Rx refill retry timer */
  453. setup_timer(timer, ath10k_htt_rx_ring_refill_retry, (unsigned long)htt);
  454. spin_lock_init(&htt->rx_ring.lock);
  455. htt->rx_ring.fill_cnt = 0;
  456. if (__ath10k_htt_rx_ring_fill_n(htt, htt->rx_ring.fill_level))
  457. goto err_fill_ring;
  458. tasklet_init(&htt->rx_replenish_task, ath10k_htt_rx_replenish_task,
  459. (unsigned long)htt);
  460. skb_queue_head_init(&htt->tx_compl_q);
  461. skb_queue_head_init(&htt->rx_compl_q);
  462. tasklet_init(&htt->txrx_compl_task, ath10k_htt_txrx_compl_task,
  463. (unsigned long)htt);
  464. ath10k_dbg(ar, ATH10K_DBG_BOOT, "htt rx ring size %d fill_level %d\n",
  465. htt->rx_ring.size, htt->rx_ring.fill_level);
  466. return 0;
  467. err_fill_ring:
  468. ath10k_htt_rx_ring_free(htt);
  469. dma_free_coherent(htt->ar->dev,
  470. sizeof(*htt->rx_ring.alloc_idx.vaddr),
  471. htt->rx_ring.alloc_idx.vaddr,
  472. htt->rx_ring.alloc_idx.paddr);
  473. err_dma_idx:
  474. dma_free_coherent(htt->ar->dev,
  475. (htt->rx_ring.size *
  476. sizeof(htt->rx_ring.paddrs_ring)),
  477. htt->rx_ring.paddrs_ring,
  478. htt->rx_ring.base_paddr);
  479. err_dma_ring:
  480. kfree(htt->rx_ring.netbufs_ring);
  481. err_netbuf:
  482. return -ENOMEM;
  483. }
  484. static int ath10k_htt_rx_crypto_param_len(struct ath10k *ar,
  485. enum htt_rx_mpdu_encrypt_type type)
  486. {
  487. switch (type) {
  488. case HTT_RX_MPDU_ENCRYPT_NONE:
  489. return 0;
  490. case HTT_RX_MPDU_ENCRYPT_WEP40:
  491. case HTT_RX_MPDU_ENCRYPT_WEP104:
  492. return IEEE80211_WEP_IV_LEN;
  493. case HTT_RX_MPDU_ENCRYPT_TKIP_WITHOUT_MIC:
  494. case HTT_RX_MPDU_ENCRYPT_TKIP_WPA:
  495. return IEEE80211_TKIP_IV_LEN;
  496. case HTT_RX_MPDU_ENCRYPT_AES_CCM_WPA2:
  497. return IEEE80211_CCMP_HDR_LEN;
  498. case HTT_RX_MPDU_ENCRYPT_WEP128:
  499. case HTT_RX_MPDU_ENCRYPT_WAPI:
  500. break;
  501. }
  502. ath10k_warn(ar, "unsupported encryption type %d\n", type);
  503. return 0;
  504. }
  505. #define MICHAEL_MIC_LEN 8
  506. static int ath10k_htt_rx_crypto_tail_len(struct ath10k *ar,
  507. enum htt_rx_mpdu_encrypt_type type)
  508. {
  509. switch (type) {
  510. case HTT_RX_MPDU_ENCRYPT_NONE:
  511. return 0;
  512. case HTT_RX_MPDU_ENCRYPT_WEP40:
  513. case HTT_RX_MPDU_ENCRYPT_WEP104:
  514. return IEEE80211_WEP_ICV_LEN;
  515. case HTT_RX_MPDU_ENCRYPT_TKIP_WITHOUT_MIC:
  516. case HTT_RX_MPDU_ENCRYPT_TKIP_WPA:
  517. return IEEE80211_TKIP_ICV_LEN;
  518. case HTT_RX_MPDU_ENCRYPT_AES_CCM_WPA2:
  519. return IEEE80211_CCMP_MIC_LEN;
  520. case HTT_RX_MPDU_ENCRYPT_WEP128:
  521. case HTT_RX_MPDU_ENCRYPT_WAPI:
  522. break;
  523. }
  524. ath10k_warn(ar, "unsupported encryption type %d\n", type);
  525. return 0;
  526. }
  527. /* Applies for first msdu in chain, before altering it. */
  528. static struct ieee80211_hdr *ath10k_htt_rx_skb_get_hdr(struct sk_buff *skb)
  529. {
  530. struct htt_rx_desc *rxd;
  531. enum rx_msdu_decap_format fmt;
  532. rxd = (void *)skb->data - sizeof(*rxd);
  533. fmt = MS(__le32_to_cpu(rxd->msdu_start.info1),
  534. RX_MSDU_START_INFO1_DECAP_FORMAT);
  535. if (fmt == RX_MSDU_DECAP_RAW)
  536. return (void *)skb->data;
  537. return (void *)skb->data - RX_HTT_HDR_STATUS_LEN;
  538. }
  539. /* This function only applies for first msdu in an msdu chain */
  540. static bool ath10k_htt_rx_hdr_is_amsdu(struct ieee80211_hdr *hdr)
  541. {
  542. u8 *qc;
  543. if (ieee80211_is_data_qos(hdr->frame_control)) {
  544. qc = ieee80211_get_qos_ctl(hdr);
  545. if (qc[0] & 0x80)
  546. return true;
  547. }
  548. return false;
  549. }
  550. struct rfc1042_hdr {
  551. u8 llc_dsap;
  552. u8 llc_ssap;
  553. u8 llc_ctrl;
  554. u8 snap_oui[3];
  555. __be16 snap_type;
  556. } __packed;
  557. struct amsdu_subframe_hdr {
  558. u8 dst[ETH_ALEN];
  559. u8 src[ETH_ALEN];
  560. __be16 len;
  561. } __packed;
  562. static const u8 rx_legacy_rate_idx[] = {
  563. 3, /* 0x00 - 11Mbps */
  564. 2, /* 0x01 - 5.5Mbps */
  565. 1, /* 0x02 - 2Mbps */
  566. 0, /* 0x03 - 1Mbps */
  567. 3, /* 0x04 - 11Mbps */
  568. 2, /* 0x05 - 5.5Mbps */
  569. 1, /* 0x06 - 2Mbps */
  570. 0, /* 0x07 - 1Mbps */
  571. 10, /* 0x08 - 48Mbps */
  572. 8, /* 0x09 - 24Mbps */
  573. 6, /* 0x0A - 12Mbps */
  574. 4, /* 0x0B - 6Mbps */
  575. 11, /* 0x0C - 54Mbps */
  576. 9, /* 0x0D - 36Mbps */
  577. 7, /* 0x0E - 18Mbps */
  578. 5, /* 0x0F - 9Mbps */
  579. };
  580. static void ath10k_htt_rx_h_rates(struct ath10k *ar,
  581. enum ieee80211_band band,
  582. u8 info0, u32 info1, u32 info2,
  583. struct ieee80211_rx_status *status)
  584. {
  585. u8 cck, rate, rate_idx, bw, sgi, mcs, nss;
  586. u8 preamble = 0;
  587. /* Check if valid fields */
  588. if (!(info0 & HTT_RX_INDICATION_INFO0_START_VALID))
  589. return;
  590. preamble = MS(info1, HTT_RX_INDICATION_INFO1_PREAMBLE_TYPE);
  591. switch (preamble) {
  592. case HTT_RX_LEGACY:
  593. cck = info0 & HTT_RX_INDICATION_INFO0_LEGACY_RATE_CCK;
  594. rate = MS(info0, HTT_RX_INDICATION_INFO0_LEGACY_RATE);
  595. rate_idx = 0;
  596. if (rate < 0x08 || rate > 0x0F)
  597. break;
  598. switch (band) {
  599. case IEEE80211_BAND_2GHZ:
  600. if (cck)
  601. rate &= ~BIT(3);
  602. rate_idx = rx_legacy_rate_idx[rate];
  603. break;
  604. case IEEE80211_BAND_5GHZ:
  605. rate_idx = rx_legacy_rate_idx[rate];
  606. /* We are using same rate table registering
  607. HW - ath10k_rates[]. In case of 5GHz skip
  608. CCK rates, so -4 here */
  609. rate_idx -= 4;
  610. break;
  611. default:
  612. break;
  613. }
  614. status->rate_idx = rate_idx;
  615. break;
  616. case HTT_RX_HT:
  617. case HTT_RX_HT_WITH_TXBF:
  618. /* HT-SIG - Table 20-11 in info1 and info2 */
  619. mcs = info1 & 0x1F;
  620. nss = mcs >> 3;
  621. bw = (info1 >> 7) & 1;
  622. sgi = (info2 >> 7) & 1;
  623. status->rate_idx = mcs;
  624. status->flag |= RX_FLAG_HT;
  625. if (sgi)
  626. status->flag |= RX_FLAG_SHORT_GI;
  627. if (bw)
  628. status->flag |= RX_FLAG_40MHZ;
  629. break;
  630. case HTT_RX_VHT:
  631. case HTT_RX_VHT_WITH_TXBF:
  632. /* VHT-SIG-A1 in info 1, VHT-SIG-A2 in info2
  633. TODO check this */
  634. mcs = (info2 >> 4) & 0x0F;
  635. nss = ((info1 >> 10) & 0x07) + 1;
  636. bw = info1 & 3;
  637. sgi = info2 & 1;
  638. status->rate_idx = mcs;
  639. status->vht_nss = nss;
  640. if (sgi)
  641. status->flag |= RX_FLAG_SHORT_GI;
  642. switch (bw) {
  643. /* 20MHZ */
  644. case 0:
  645. break;
  646. /* 40MHZ */
  647. case 1:
  648. status->flag |= RX_FLAG_40MHZ;
  649. break;
  650. /* 80MHZ */
  651. case 2:
  652. status->vht_flag |= RX_VHT_FLAG_80MHZ;
  653. }
  654. status->flag |= RX_FLAG_VHT;
  655. break;
  656. default:
  657. break;
  658. }
  659. }
  660. static void ath10k_htt_rx_h_protected(struct ath10k_htt *htt,
  661. struct ieee80211_rx_status *rx_status,
  662. struct sk_buff *skb,
  663. enum htt_rx_mpdu_encrypt_type enctype,
  664. enum rx_msdu_decap_format fmt,
  665. bool dot11frag)
  666. {
  667. struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
  668. rx_status->flag &= ~(RX_FLAG_DECRYPTED |
  669. RX_FLAG_IV_STRIPPED |
  670. RX_FLAG_MMIC_STRIPPED);
  671. if (enctype == HTT_RX_MPDU_ENCRYPT_NONE)
  672. return;
  673. /*
  674. * There's no explicit rx descriptor flag to indicate whether a given
  675. * frame has been decrypted or not. We're forced to use the decap
  676. * format as an implicit indication. However fragmentation rx is always
  677. * raw and it probably never reports undecrypted raws.
  678. *
  679. * This makes sure sniffed frames are reported as-is without stripping
  680. * the protected flag.
  681. */
  682. if (fmt == RX_MSDU_DECAP_RAW && !dot11frag)
  683. return;
  684. rx_status->flag |= RX_FLAG_DECRYPTED |
  685. RX_FLAG_IV_STRIPPED |
  686. RX_FLAG_MMIC_STRIPPED;
  687. hdr->frame_control = __cpu_to_le16(__le16_to_cpu(hdr->frame_control) &
  688. ~IEEE80211_FCTL_PROTECTED);
  689. }
  690. static bool ath10k_htt_rx_h_channel(struct ath10k *ar,
  691. struct ieee80211_rx_status *status)
  692. {
  693. struct ieee80211_channel *ch;
  694. spin_lock_bh(&ar->data_lock);
  695. ch = ar->scan_channel;
  696. if (!ch)
  697. ch = ar->rx_channel;
  698. spin_unlock_bh(&ar->data_lock);
  699. if (!ch)
  700. return false;
  701. status->band = ch->band;
  702. status->freq = ch->center_freq;
  703. return true;
  704. }
  705. static const char * const tid_to_ac[] = {
  706. "BE",
  707. "BK",
  708. "BK",
  709. "BE",
  710. "VI",
  711. "VI",
  712. "VO",
  713. "VO",
  714. };
  715. static char *ath10k_get_tid(struct ieee80211_hdr *hdr, char *out, size_t size)
  716. {
  717. u8 *qc;
  718. int tid;
  719. if (!ieee80211_is_data_qos(hdr->frame_control))
  720. return "";
  721. qc = ieee80211_get_qos_ctl(hdr);
  722. tid = *qc & IEEE80211_QOS_CTL_TID_MASK;
  723. if (tid < 8)
  724. snprintf(out, size, "tid %d (%s)", tid, tid_to_ac[tid]);
  725. else
  726. snprintf(out, size, "tid %d", tid);
  727. return out;
  728. }
  729. static void ath10k_process_rx(struct ath10k *ar,
  730. struct ieee80211_rx_status *rx_status,
  731. struct sk_buff *skb)
  732. {
  733. struct ieee80211_rx_status *status;
  734. struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
  735. char tid[32];
  736. status = IEEE80211_SKB_RXCB(skb);
  737. *status = *rx_status;
  738. ath10k_dbg(ar, ATH10K_DBG_DATA,
  739. "rx skb %p len %u peer %pM %s %s sn %u %s%s%s%s%s %srate_idx %u vht_nss %u freq %u band %u flag 0x%x fcs-err %i mic-err %i amsdu-more %i\n",
  740. skb,
  741. skb->len,
  742. ieee80211_get_SA(hdr),
  743. ath10k_get_tid(hdr, tid, sizeof(tid)),
  744. is_multicast_ether_addr(ieee80211_get_DA(hdr)) ?
  745. "mcast" : "ucast",
  746. (__le16_to_cpu(hdr->seq_ctrl) & IEEE80211_SCTL_SEQ) >> 4,
  747. status->flag == 0 ? "legacy" : "",
  748. status->flag & RX_FLAG_HT ? "ht" : "",
  749. status->flag & RX_FLAG_VHT ? "vht" : "",
  750. status->flag & RX_FLAG_40MHZ ? "40" : "",
  751. status->vht_flag & RX_VHT_FLAG_80MHZ ? "80" : "",
  752. status->flag & RX_FLAG_SHORT_GI ? "sgi " : "",
  753. status->rate_idx,
  754. status->vht_nss,
  755. status->freq,
  756. status->band, status->flag,
  757. !!(status->flag & RX_FLAG_FAILED_FCS_CRC),
  758. !!(status->flag & RX_FLAG_MMIC_ERROR),
  759. !!(status->flag & RX_FLAG_AMSDU_MORE));
  760. ath10k_dbg_dump(ar, ATH10K_DBG_HTT_DUMP, NULL, "rx skb: ",
  761. skb->data, skb->len);
  762. trace_ath10k_rx_hdr(ar, skb->data, skb->len);
  763. trace_ath10k_rx_payload(ar, skb->data, skb->len);
  764. ieee80211_rx(ar->hw, skb);
  765. }
  766. static int ath10k_htt_rx_nwifi_hdrlen(struct ieee80211_hdr *hdr)
  767. {
  768. /* nwifi header is padded to 4 bytes. this fixes 4addr rx */
  769. return round_up(ieee80211_hdrlen(hdr->frame_control), 4);
  770. }
  771. static void ath10k_htt_rx_amsdu(struct ath10k_htt *htt,
  772. struct ieee80211_rx_status *rx_status,
  773. struct sk_buff *skb_in)
  774. {
  775. struct ath10k *ar = htt->ar;
  776. struct htt_rx_desc *rxd;
  777. struct sk_buff *skb = skb_in;
  778. struct sk_buff *first;
  779. enum rx_msdu_decap_format fmt;
  780. enum htt_rx_mpdu_encrypt_type enctype;
  781. struct ieee80211_hdr *hdr;
  782. u8 hdr_buf[64], da[ETH_ALEN], sa[ETH_ALEN], *qos;
  783. unsigned int hdr_len;
  784. rxd = (void *)skb->data - sizeof(*rxd);
  785. enctype = MS(__le32_to_cpu(rxd->mpdu_start.info0),
  786. RX_MPDU_START_INFO0_ENCRYPT_TYPE);
  787. hdr = (struct ieee80211_hdr *)rxd->rx_hdr_status;
  788. hdr_len = ieee80211_hdrlen(hdr->frame_control);
  789. memcpy(hdr_buf, hdr, hdr_len);
  790. hdr = (struct ieee80211_hdr *)hdr_buf;
  791. first = skb;
  792. while (skb) {
  793. void *decap_hdr;
  794. int len;
  795. rxd = (void *)skb->data - sizeof(*rxd);
  796. fmt = MS(__le32_to_cpu(rxd->msdu_start.info1),
  797. RX_MSDU_START_INFO1_DECAP_FORMAT);
  798. decap_hdr = (void *)rxd->rx_hdr_status;
  799. skb->ip_summed = ath10k_htt_rx_get_csum_state(skb);
  800. /* First frame in an A-MSDU chain has more decapped data. */
  801. if (skb == first) {
  802. len = round_up(ieee80211_hdrlen(hdr->frame_control), 4);
  803. len += round_up(ath10k_htt_rx_crypto_param_len(ar,
  804. enctype), 4);
  805. decap_hdr += len;
  806. }
  807. switch (fmt) {
  808. case RX_MSDU_DECAP_RAW:
  809. /* remove trailing FCS */
  810. skb_trim(skb, skb->len - FCS_LEN);
  811. break;
  812. case RX_MSDU_DECAP_NATIVE_WIFI:
  813. /* pull decapped header and copy SA & DA */
  814. hdr = (struct ieee80211_hdr *)skb->data;
  815. hdr_len = ath10k_htt_rx_nwifi_hdrlen(hdr);
  816. ether_addr_copy(da, ieee80211_get_DA(hdr));
  817. ether_addr_copy(sa, ieee80211_get_SA(hdr));
  818. skb_pull(skb, hdr_len);
  819. /* push original 802.11 header */
  820. hdr = (struct ieee80211_hdr *)hdr_buf;
  821. hdr_len = ieee80211_hdrlen(hdr->frame_control);
  822. memcpy(skb_push(skb, hdr_len), hdr, hdr_len);
  823. /* original A-MSDU header has the bit set but we're
  824. * not including A-MSDU subframe header */
  825. hdr = (struct ieee80211_hdr *)skb->data;
  826. qos = ieee80211_get_qos_ctl(hdr);
  827. qos[0] &= ~IEEE80211_QOS_CTL_A_MSDU_PRESENT;
  828. /* original 802.11 header has a different DA and in
  829. * case of 4addr it may also have different SA
  830. */
  831. ether_addr_copy(ieee80211_get_DA(hdr), da);
  832. ether_addr_copy(ieee80211_get_SA(hdr), sa);
  833. break;
  834. case RX_MSDU_DECAP_ETHERNET2_DIX:
  835. /* strip ethernet header and insert decapped 802.11
  836. * header, amsdu subframe header and rfc1042 header */
  837. len = 0;
  838. len += sizeof(struct rfc1042_hdr);
  839. len += sizeof(struct amsdu_subframe_hdr);
  840. skb_pull(skb, sizeof(struct ethhdr));
  841. memcpy(skb_push(skb, len), decap_hdr, len);
  842. memcpy(skb_push(skb, hdr_len), hdr, hdr_len);
  843. break;
  844. case RX_MSDU_DECAP_8023_SNAP_LLC:
  845. /* insert decapped 802.11 header making a singly
  846. * A-MSDU */
  847. memcpy(skb_push(skb, hdr_len), hdr, hdr_len);
  848. break;
  849. }
  850. skb_in = skb;
  851. ath10k_htt_rx_h_protected(htt, rx_status, skb_in, enctype, fmt,
  852. false);
  853. skb = skb->next;
  854. skb_in->next = NULL;
  855. if (skb)
  856. rx_status->flag |= RX_FLAG_AMSDU_MORE;
  857. else
  858. rx_status->flag &= ~RX_FLAG_AMSDU_MORE;
  859. ath10k_process_rx(htt->ar, rx_status, skb_in);
  860. }
  861. /* FIXME: It might be nice to re-assemble the A-MSDU when there's a
  862. * monitor interface active for sniffing purposes. */
  863. }
  864. static void ath10k_htt_rx_msdu(struct ath10k_htt *htt,
  865. struct ieee80211_rx_status *rx_status,
  866. struct sk_buff *skb)
  867. {
  868. struct ath10k *ar = htt->ar;
  869. struct htt_rx_desc *rxd;
  870. struct ieee80211_hdr *hdr;
  871. enum rx_msdu_decap_format fmt;
  872. enum htt_rx_mpdu_encrypt_type enctype;
  873. int hdr_len;
  874. void *rfc1042;
  875. /* This shouldn't happen. If it does than it may be a FW bug. */
  876. if (skb->next) {
  877. ath10k_warn(ar, "htt rx received chained non A-MSDU frame\n");
  878. ath10k_htt_rx_free_msdu_chain(skb->next);
  879. skb->next = NULL;
  880. }
  881. rxd = (void *)skb->data - sizeof(*rxd);
  882. fmt = MS(__le32_to_cpu(rxd->msdu_start.info1),
  883. RX_MSDU_START_INFO1_DECAP_FORMAT);
  884. enctype = MS(__le32_to_cpu(rxd->mpdu_start.info0),
  885. RX_MPDU_START_INFO0_ENCRYPT_TYPE);
  886. hdr = (struct ieee80211_hdr *)rxd->rx_hdr_status;
  887. hdr_len = ieee80211_hdrlen(hdr->frame_control);
  888. skb->ip_summed = ath10k_htt_rx_get_csum_state(skb);
  889. switch (fmt) {
  890. case RX_MSDU_DECAP_RAW:
  891. /* remove trailing FCS */
  892. skb_trim(skb, skb->len - FCS_LEN);
  893. break;
  894. case RX_MSDU_DECAP_NATIVE_WIFI:
  895. /* Pull decapped header */
  896. hdr = (struct ieee80211_hdr *)skb->data;
  897. hdr_len = ath10k_htt_rx_nwifi_hdrlen(hdr);
  898. skb_pull(skb, hdr_len);
  899. /* Push original header */
  900. hdr = (struct ieee80211_hdr *)rxd->rx_hdr_status;
  901. hdr_len = ieee80211_hdrlen(hdr->frame_control);
  902. memcpy(skb_push(skb, hdr_len), hdr, hdr_len);
  903. break;
  904. case RX_MSDU_DECAP_ETHERNET2_DIX:
  905. /* strip ethernet header and insert decapped 802.11 header and
  906. * rfc1042 header */
  907. rfc1042 = hdr;
  908. rfc1042 += roundup(hdr_len, 4);
  909. rfc1042 += roundup(ath10k_htt_rx_crypto_param_len(ar,
  910. enctype), 4);
  911. skb_pull(skb, sizeof(struct ethhdr));
  912. memcpy(skb_push(skb, sizeof(struct rfc1042_hdr)),
  913. rfc1042, sizeof(struct rfc1042_hdr));
  914. memcpy(skb_push(skb, hdr_len), hdr, hdr_len);
  915. break;
  916. case RX_MSDU_DECAP_8023_SNAP_LLC:
  917. /* remove A-MSDU subframe header and insert
  918. * decapped 802.11 header. rfc1042 header is already there */
  919. skb_pull(skb, sizeof(struct amsdu_subframe_hdr));
  920. memcpy(skb_push(skb, hdr_len), hdr, hdr_len);
  921. break;
  922. }
  923. ath10k_htt_rx_h_protected(htt, rx_status, skb, enctype, fmt, false);
  924. ath10k_process_rx(htt->ar, rx_status, skb);
  925. }
  926. static int ath10k_htt_rx_get_csum_state(struct sk_buff *skb)
  927. {
  928. struct htt_rx_desc *rxd;
  929. u32 flags, info;
  930. bool is_ip4, is_ip6;
  931. bool is_tcp, is_udp;
  932. bool ip_csum_ok, tcpudp_csum_ok;
  933. rxd = (void *)skb->data - sizeof(*rxd);
  934. flags = __le32_to_cpu(rxd->attention.flags);
  935. info = __le32_to_cpu(rxd->msdu_start.info1);
  936. is_ip4 = !!(info & RX_MSDU_START_INFO1_IPV4_PROTO);
  937. is_ip6 = !!(info & RX_MSDU_START_INFO1_IPV6_PROTO);
  938. is_tcp = !!(info & RX_MSDU_START_INFO1_TCP_PROTO);
  939. is_udp = !!(info & RX_MSDU_START_INFO1_UDP_PROTO);
  940. ip_csum_ok = !(flags & RX_ATTENTION_FLAGS_IP_CHKSUM_FAIL);
  941. tcpudp_csum_ok = !(flags & RX_ATTENTION_FLAGS_TCP_UDP_CHKSUM_FAIL);
  942. if (!is_ip4 && !is_ip6)
  943. return CHECKSUM_NONE;
  944. if (!is_tcp && !is_udp)
  945. return CHECKSUM_NONE;
  946. if (!ip_csum_ok)
  947. return CHECKSUM_NONE;
  948. if (!tcpudp_csum_ok)
  949. return CHECKSUM_NONE;
  950. return CHECKSUM_UNNECESSARY;
  951. }
  952. static int ath10k_unchain_msdu(struct sk_buff *msdu_head)
  953. {
  954. struct sk_buff *next = msdu_head->next;
  955. struct sk_buff *to_free = next;
  956. int space;
  957. int total_len = 0;
  958. /* TODO: Might could optimize this by using
  959. * skb_try_coalesce or similar method to
  960. * decrease copying, or maybe get mac80211 to
  961. * provide a way to just receive a list of
  962. * skb?
  963. */
  964. msdu_head->next = NULL;
  965. /* Allocate total length all at once. */
  966. while (next) {
  967. total_len += next->len;
  968. next = next->next;
  969. }
  970. space = total_len - skb_tailroom(msdu_head);
  971. if ((space > 0) &&
  972. (pskb_expand_head(msdu_head, 0, space, GFP_ATOMIC) < 0)) {
  973. /* TODO: bump some rx-oom error stat */
  974. /* put it back together so we can free the
  975. * whole list at once.
  976. */
  977. msdu_head->next = to_free;
  978. return -1;
  979. }
  980. /* Walk list again, copying contents into
  981. * msdu_head
  982. */
  983. next = to_free;
  984. while (next) {
  985. skb_copy_from_linear_data(next, skb_put(msdu_head, next->len),
  986. next->len);
  987. next = next->next;
  988. }
  989. /* If here, we have consolidated skb. Free the
  990. * fragments and pass the main skb on up the
  991. * stack.
  992. */
  993. ath10k_htt_rx_free_msdu_chain(to_free);
  994. return 0;
  995. }
  996. static bool ath10k_htt_rx_amsdu_allowed(struct ath10k_htt *htt,
  997. struct sk_buff *head,
  998. bool channel_set,
  999. u32 attention)
  1000. {
  1001. struct ath10k *ar = htt->ar;
  1002. if (head->len == 0) {
  1003. ath10k_dbg(ar, ATH10K_DBG_HTT,
  1004. "htt rx dropping due to zero-len\n");
  1005. return false;
  1006. }
  1007. if (attention & RX_ATTENTION_FLAGS_DECRYPT_ERR) {
  1008. ath10k_dbg(ar, ATH10K_DBG_HTT,
  1009. "htt rx dropping due to decrypt-err\n");
  1010. return false;
  1011. }
  1012. if (!channel_set) {
  1013. ath10k_warn(ar, "no channel configured; ignoring frame!\n");
  1014. return false;
  1015. }
  1016. /* Skip mgmt frames while we handle this in WMI */
  1017. if (attention & RX_ATTENTION_FLAGS_MGMT_TYPE) {
  1018. ath10k_dbg(ar, ATH10K_DBG_HTT, "htt rx mgmt ctrl\n");
  1019. return false;
  1020. }
  1021. if (test_bit(ATH10K_CAC_RUNNING, &htt->ar->dev_flags)) {
  1022. ath10k_dbg(ar, ATH10K_DBG_HTT,
  1023. "htt rx CAC running\n");
  1024. return false;
  1025. }
  1026. return true;
  1027. }
  1028. static void ath10k_htt_rx_handler(struct ath10k_htt *htt,
  1029. struct htt_rx_indication *rx)
  1030. {
  1031. struct ath10k *ar = htt->ar;
  1032. struct ieee80211_rx_status *rx_status = &htt->rx_status;
  1033. struct htt_rx_indication_mpdu_range *mpdu_ranges;
  1034. struct ieee80211_hdr *hdr;
  1035. int num_mpdu_ranges;
  1036. u32 attention;
  1037. int fw_desc_len;
  1038. u8 *fw_desc;
  1039. bool channel_set;
  1040. int i, j;
  1041. int ret;
  1042. lockdep_assert_held(&htt->rx_ring.lock);
  1043. fw_desc_len = __le16_to_cpu(rx->prefix.fw_rx_desc_bytes);
  1044. fw_desc = (u8 *)&rx->fw_desc;
  1045. num_mpdu_ranges = MS(__le32_to_cpu(rx->hdr.info1),
  1046. HTT_RX_INDICATION_INFO1_NUM_MPDU_RANGES);
  1047. mpdu_ranges = htt_rx_ind_get_mpdu_ranges(rx);
  1048. /* Fill this once, while this is per-ppdu */
  1049. if (rx->ppdu.info0 & HTT_RX_INDICATION_INFO0_START_VALID) {
  1050. memset(rx_status, 0, sizeof(*rx_status));
  1051. rx_status->signal = ATH10K_DEFAULT_NOISE_FLOOR +
  1052. rx->ppdu.combined_rssi;
  1053. }
  1054. if (rx->ppdu.info0 & HTT_RX_INDICATION_INFO0_END_VALID) {
  1055. /* TSF available only in 32-bit */
  1056. rx_status->mactime = __le32_to_cpu(rx->ppdu.tsf) & 0xffffffff;
  1057. rx_status->flag |= RX_FLAG_MACTIME_END;
  1058. }
  1059. channel_set = ath10k_htt_rx_h_channel(htt->ar, rx_status);
  1060. if (channel_set) {
  1061. ath10k_htt_rx_h_rates(htt->ar, rx_status->band,
  1062. rx->ppdu.info0,
  1063. __le32_to_cpu(rx->ppdu.info1),
  1064. __le32_to_cpu(rx->ppdu.info2),
  1065. rx_status);
  1066. }
  1067. ath10k_dbg_dump(ar, ATH10K_DBG_HTT_DUMP, NULL, "htt rx ind: ",
  1068. rx, sizeof(*rx) +
  1069. (sizeof(struct htt_rx_indication_mpdu_range) *
  1070. num_mpdu_ranges));
  1071. for (i = 0; i < num_mpdu_ranges; i++) {
  1072. for (j = 0; j < mpdu_ranges[i].mpdu_count; j++) {
  1073. struct sk_buff *msdu_head, *msdu_tail;
  1074. attention = 0;
  1075. msdu_head = NULL;
  1076. msdu_tail = NULL;
  1077. ret = ath10k_htt_rx_amsdu_pop(htt,
  1078. &fw_desc,
  1079. &fw_desc_len,
  1080. &msdu_head,
  1081. &msdu_tail,
  1082. &attention);
  1083. if (ret < 0) {
  1084. ath10k_warn(ar, "failed to pop amsdu from htt rx ring %d\n",
  1085. ret);
  1086. ath10k_htt_rx_free_msdu_chain(msdu_head);
  1087. continue;
  1088. }
  1089. if (!ath10k_htt_rx_amsdu_allowed(htt, msdu_head,
  1090. channel_set,
  1091. attention)) {
  1092. ath10k_htt_rx_free_msdu_chain(msdu_head);
  1093. continue;
  1094. }
  1095. if (ret > 0 &&
  1096. ath10k_unchain_msdu(msdu_head) < 0) {
  1097. ath10k_htt_rx_free_msdu_chain(msdu_head);
  1098. continue;
  1099. }
  1100. if (attention & RX_ATTENTION_FLAGS_FCS_ERR)
  1101. rx_status->flag |= RX_FLAG_FAILED_FCS_CRC;
  1102. else
  1103. rx_status->flag &= ~RX_FLAG_FAILED_FCS_CRC;
  1104. if (attention & RX_ATTENTION_FLAGS_TKIP_MIC_ERR)
  1105. rx_status->flag |= RX_FLAG_MMIC_ERROR;
  1106. else
  1107. rx_status->flag &= ~RX_FLAG_MMIC_ERROR;
  1108. hdr = ath10k_htt_rx_skb_get_hdr(msdu_head);
  1109. if (ath10k_htt_rx_hdr_is_amsdu(hdr))
  1110. ath10k_htt_rx_amsdu(htt, rx_status, msdu_head);
  1111. else
  1112. ath10k_htt_rx_msdu(htt, rx_status, msdu_head);
  1113. }
  1114. }
  1115. tasklet_schedule(&htt->rx_replenish_task);
  1116. }
  1117. static void ath10k_htt_rx_frag_handler(struct ath10k_htt *htt,
  1118. struct htt_rx_fragment_indication *frag)
  1119. {
  1120. struct ath10k *ar = htt->ar;
  1121. struct sk_buff *msdu_head, *msdu_tail;
  1122. enum htt_rx_mpdu_encrypt_type enctype;
  1123. struct htt_rx_desc *rxd;
  1124. enum rx_msdu_decap_format fmt;
  1125. struct ieee80211_rx_status *rx_status = &htt->rx_status;
  1126. struct ieee80211_hdr *hdr;
  1127. int ret;
  1128. bool tkip_mic_err;
  1129. bool decrypt_err;
  1130. u8 *fw_desc;
  1131. int fw_desc_len, hdrlen, paramlen;
  1132. int trim;
  1133. u32 attention = 0;
  1134. fw_desc_len = __le16_to_cpu(frag->fw_rx_desc_bytes);
  1135. fw_desc = (u8 *)frag->fw_msdu_rx_desc;
  1136. msdu_head = NULL;
  1137. msdu_tail = NULL;
  1138. spin_lock_bh(&htt->rx_ring.lock);
  1139. ret = ath10k_htt_rx_amsdu_pop(htt, &fw_desc, &fw_desc_len,
  1140. &msdu_head, &msdu_tail,
  1141. &attention);
  1142. spin_unlock_bh(&htt->rx_ring.lock);
  1143. tasklet_schedule(&htt->rx_replenish_task);
  1144. ath10k_dbg(ar, ATH10K_DBG_HTT_DUMP, "htt rx frag ahead\n");
  1145. if (ret) {
  1146. ath10k_warn(ar, "failed to pop amsdu from httr rx ring for fragmented rx %d\n",
  1147. ret);
  1148. ath10k_htt_rx_free_msdu_chain(msdu_head);
  1149. return;
  1150. }
  1151. /* FIXME: implement signal strength */
  1152. rx_status->flag |= RX_FLAG_NO_SIGNAL_VAL;
  1153. hdr = (struct ieee80211_hdr *)msdu_head->data;
  1154. rxd = (void *)msdu_head->data - sizeof(*rxd);
  1155. tkip_mic_err = !!(attention & RX_ATTENTION_FLAGS_TKIP_MIC_ERR);
  1156. decrypt_err = !!(attention & RX_ATTENTION_FLAGS_DECRYPT_ERR);
  1157. fmt = MS(__le32_to_cpu(rxd->msdu_start.info1),
  1158. RX_MSDU_START_INFO1_DECAP_FORMAT);
  1159. if (fmt != RX_MSDU_DECAP_RAW) {
  1160. ath10k_warn(ar, "we dont support non-raw fragmented rx yet\n");
  1161. dev_kfree_skb_any(msdu_head);
  1162. goto end;
  1163. }
  1164. enctype = MS(__le32_to_cpu(rxd->mpdu_start.info0),
  1165. RX_MPDU_START_INFO0_ENCRYPT_TYPE);
  1166. ath10k_htt_rx_h_protected(htt, rx_status, msdu_head, enctype, fmt,
  1167. true);
  1168. msdu_head->ip_summed = ath10k_htt_rx_get_csum_state(msdu_head);
  1169. if (tkip_mic_err)
  1170. ath10k_warn(ar, "tkip mic error\n");
  1171. if (decrypt_err) {
  1172. ath10k_warn(ar, "decryption err in fragmented rx\n");
  1173. dev_kfree_skb_any(msdu_head);
  1174. goto end;
  1175. }
  1176. if (enctype != HTT_RX_MPDU_ENCRYPT_NONE) {
  1177. hdrlen = ieee80211_hdrlen(hdr->frame_control);
  1178. paramlen = ath10k_htt_rx_crypto_param_len(ar, enctype);
  1179. /* It is more efficient to move the header than the payload */
  1180. memmove((void *)msdu_head->data + paramlen,
  1181. (void *)msdu_head->data,
  1182. hdrlen);
  1183. skb_pull(msdu_head, paramlen);
  1184. hdr = (struct ieee80211_hdr *)msdu_head->data;
  1185. }
  1186. /* remove trailing FCS */
  1187. trim = 4;
  1188. /* remove crypto trailer */
  1189. trim += ath10k_htt_rx_crypto_tail_len(ar, enctype);
  1190. /* last fragment of TKIP frags has MIC */
  1191. if (!ieee80211_has_morefrags(hdr->frame_control) &&
  1192. enctype == HTT_RX_MPDU_ENCRYPT_TKIP_WPA)
  1193. trim += MICHAEL_MIC_LEN;
  1194. if (trim > msdu_head->len) {
  1195. ath10k_warn(ar, "htt rx fragment: trailer longer than the frame itself? drop\n");
  1196. dev_kfree_skb_any(msdu_head);
  1197. goto end;
  1198. }
  1199. skb_trim(msdu_head, msdu_head->len - trim);
  1200. ath10k_dbg_dump(ar, ATH10K_DBG_HTT_DUMP, NULL, "htt rx frag mpdu: ",
  1201. msdu_head->data, msdu_head->len);
  1202. ath10k_process_rx(htt->ar, rx_status, msdu_head);
  1203. end:
  1204. if (fw_desc_len > 0) {
  1205. ath10k_dbg(ar, ATH10K_DBG_HTT,
  1206. "expecting more fragmented rx in one indication %d\n",
  1207. fw_desc_len);
  1208. }
  1209. }
  1210. static void ath10k_htt_rx_frm_tx_compl(struct ath10k *ar,
  1211. struct sk_buff *skb)
  1212. {
  1213. struct ath10k_htt *htt = &ar->htt;
  1214. struct htt_resp *resp = (struct htt_resp *)skb->data;
  1215. struct htt_tx_done tx_done = {};
  1216. int status = MS(resp->data_tx_completion.flags, HTT_DATA_TX_STATUS);
  1217. __le16 msdu_id;
  1218. int i;
  1219. lockdep_assert_held(&htt->tx_lock);
  1220. switch (status) {
  1221. case HTT_DATA_TX_STATUS_NO_ACK:
  1222. tx_done.no_ack = true;
  1223. break;
  1224. case HTT_DATA_TX_STATUS_OK:
  1225. break;
  1226. case HTT_DATA_TX_STATUS_DISCARD:
  1227. case HTT_DATA_TX_STATUS_POSTPONE:
  1228. case HTT_DATA_TX_STATUS_DOWNLOAD_FAIL:
  1229. tx_done.discard = true;
  1230. break;
  1231. default:
  1232. ath10k_warn(ar, "unhandled tx completion status %d\n", status);
  1233. tx_done.discard = true;
  1234. break;
  1235. }
  1236. ath10k_dbg(ar, ATH10K_DBG_HTT, "htt tx completion num_msdus %d\n",
  1237. resp->data_tx_completion.num_msdus);
  1238. for (i = 0; i < resp->data_tx_completion.num_msdus; i++) {
  1239. msdu_id = resp->data_tx_completion.msdus[i];
  1240. tx_done.msdu_id = __le16_to_cpu(msdu_id);
  1241. ath10k_txrx_tx_unref(htt, &tx_done);
  1242. }
  1243. }
  1244. static void ath10k_htt_rx_addba(struct ath10k *ar, struct htt_resp *resp)
  1245. {
  1246. struct htt_rx_addba *ev = &resp->rx_addba;
  1247. struct ath10k_peer *peer;
  1248. struct ath10k_vif *arvif;
  1249. u16 info0, tid, peer_id;
  1250. info0 = __le16_to_cpu(ev->info0);
  1251. tid = MS(info0, HTT_RX_BA_INFO0_TID);
  1252. peer_id = MS(info0, HTT_RX_BA_INFO0_PEER_ID);
  1253. ath10k_dbg(ar, ATH10K_DBG_HTT,
  1254. "htt rx addba tid %hu peer_id %hu size %hhu\n",
  1255. tid, peer_id, ev->window_size);
  1256. spin_lock_bh(&ar->data_lock);
  1257. peer = ath10k_peer_find_by_id(ar, peer_id);
  1258. if (!peer) {
  1259. ath10k_warn(ar, "received addba event for invalid peer_id: %hu\n",
  1260. peer_id);
  1261. spin_unlock_bh(&ar->data_lock);
  1262. return;
  1263. }
  1264. arvif = ath10k_get_arvif(ar, peer->vdev_id);
  1265. if (!arvif) {
  1266. ath10k_warn(ar, "received addba event for invalid vdev_id: %u\n",
  1267. peer->vdev_id);
  1268. spin_unlock_bh(&ar->data_lock);
  1269. return;
  1270. }
  1271. ath10k_dbg(ar, ATH10K_DBG_HTT,
  1272. "htt rx start rx ba session sta %pM tid %hu size %hhu\n",
  1273. peer->addr, tid, ev->window_size);
  1274. ieee80211_start_rx_ba_session_offl(arvif->vif, peer->addr, tid);
  1275. spin_unlock_bh(&ar->data_lock);
  1276. }
  1277. static void ath10k_htt_rx_delba(struct ath10k *ar, struct htt_resp *resp)
  1278. {
  1279. struct htt_rx_delba *ev = &resp->rx_delba;
  1280. struct ath10k_peer *peer;
  1281. struct ath10k_vif *arvif;
  1282. u16 info0, tid, peer_id;
  1283. info0 = __le16_to_cpu(ev->info0);
  1284. tid = MS(info0, HTT_RX_BA_INFO0_TID);
  1285. peer_id = MS(info0, HTT_RX_BA_INFO0_PEER_ID);
  1286. ath10k_dbg(ar, ATH10K_DBG_HTT,
  1287. "htt rx delba tid %hu peer_id %hu\n",
  1288. tid, peer_id);
  1289. spin_lock_bh(&ar->data_lock);
  1290. peer = ath10k_peer_find_by_id(ar, peer_id);
  1291. if (!peer) {
  1292. ath10k_warn(ar, "received addba event for invalid peer_id: %hu\n",
  1293. peer_id);
  1294. spin_unlock_bh(&ar->data_lock);
  1295. return;
  1296. }
  1297. arvif = ath10k_get_arvif(ar, peer->vdev_id);
  1298. if (!arvif) {
  1299. ath10k_warn(ar, "received addba event for invalid vdev_id: %u\n",
  1300. peer->vdev_id);
  1301. spin_unlock_bh(&ar->data_lock);
  1302. return;
  1303. }
  1304. ath10k_dbg(ar, ATH10K_DBG_HTT,
  1305. "htt rx stop rx ba session sta %pM tid %hu\n",
  1306. peer->addr, tid);
  1307. ieee80211_stop_rx_ba_session_offl(arvif->vif, peer->addr, tid);
  1308. spin_unlock_bh(&ar->data_lock);
  1309. }
  1310. void ath10k_htt_t2h_msg_handler(struct ath10k *ar, struct sk_buff *skb)
  1311. {
  1312. struct ath10k_htt *htt = &ar->htt;
  1313. struct htt_resp *resp = (struct htt_resp *)skb->data;
  1314. /* confirm alignment */
  1315. if (!IS_ALIGNED((unsigned long)skb->data, 4))
  1316. ath10k_warn(ar, "unaligned htt message, expect trouble\n");
  1317. ath10k_dbg(ar, ATH10K_DBG_HTT, "htt rx, msg_type: 0x%0X\n",
  1318. resp->hdr.msg_type);
  1319. switch (resp->hdr.msg_type) {
  1320. case HTT_T2H_MSG_TYPE_VERSION_CONF: {
  1321. htt->target_version_major = resp->ver_resp.major;
  1322. htt->target_version_minor = resp->ver_resp.minor;
  1323. complete(&htt->target_version_received);
  1324. break;
  1325. }
  1326. case HTT_T2H_MSG_TYPE_RX_IND:
  1327. spin_lock_bh(&htt->rx_ring.lock);
  1328. __skb_queue_tail(&htt->rx_compl_q, skb);
  1329. spin_unlock_bh(&htt->rx_ring.lock);
  1330. tasklet_schedule(&htt->txrx_compl_task);
  1331. return;
  1332. case HTT_T2H_MSG_TYPE_PEER_MAP: {
  1333. struct htt_peer_map_event ev = {
  1334. .vdev_id = resp->peer_map.vdev_id,
  1335. .peer_id = __le16_to_cpu(resp->peer_map.peer_id),
  1336. };
  1337. memcpy(ev.addr, resp->peer_map.addr, sizeof(ev.addr));
  1338. ath10k_peer_map_event(htt, &ev);
  1339. break;
  1340. }
  1341. case HTT_T2H_MSG_TYPE_PEER_UNMAP: {
  1342. struct htt_peer_unmap_event ev = {
  1343. .peer_id = __le16_to_cpu(resp->peer_unmap.peer_id),
  1344. };
  1345. ath10k_peer_unmap_event(htt, &ev);
  1346. break;
  1347. }
  1348. case HTT_T2H_MSG_TYPE_MGMT_TX_COMPLETION: {
  1349. struct htt_tx_done tx_done = {};
  1350. int status = __le32_to_cpu(resp->mgmt_tx_completion.status);
  1351. tx_done.msdu_id =
  1352. __le32_to_cpu(resp->mgmt_tx_completion.desc_id);
  1353. switch (status) {
  1354. case HTT_MGMT_TX_STATUS_OK:
  1355. break;
  1356. case HTT_MGMT_TX_STATUS_RETRY:
  1357. tx_done.no_ack = true;
  1358. break;
  1359. case HTT_MGMT_TX_STATUS_DROP:
  1360. tx_done.discard = true;
  1361. break;
  1362. }
  1363. spin_lock_bh(&htt->tx_lock);
  1364. ath10k_txrx_tx_unref(htt, &tx_done);
  1365. spin_unlock_bh(&htt->tx_lock);
  1366. break;
  1367. }
  1368. case HTT_T2H_MSG_TYPE_TX_COMPL_IND:
  1369. spin_lock_bh(&htt->tx_lock);
  1370. __skb_queue_tail(&htt->tx_compl_q, skb);
  1371. spin_unlock_bh(&htt->tx_lock);
  1372. tasklet_schedule(&htt->txrx_compl_task);
  1373. return;
  1374. case HTT_T2H_MSG_TYPE_SEC_IND: {
  1375. struct ath10k *ar = htt->ar;
  1376. struct htt_security_indication *ev = &resp->security_indication;
  1377. ath10k_dbg(ar, ATH10K_DBG_HTT,
  1378. "sec ind peer_id %d unicast %d type %d\n",
  1379. __le16_to_cpu(ev->peer_id),
  1380. !!(ev->flags & HTT_SECURITY_IS_UNICAST),
  1381. MS(ev->flags, HTT_SECURITY_TYPE));
  1382. complete(&ar->install_key_done);
  1383. break;
  1384. }
  1385. case HTT_T2H_MSG_TYPE_RX_FRAG_IND: {
  1386. ath10k_dbg_dump(ar, ATH10K_DBG_HTT_DUMP, NULL, "htt event: ",
  1387. skb->data, skb->len);
  1388. ath10k_htt_rx_frag_handler(htt, &resp->rx_frag_ind);
  1389. break;
  1390. }
  1391. case HTT_T2H_MSG_TYPE_TEST:
  1392. /* FIX THIS */
  1393. break;
  1394. case HTT_T2H_MSG_TYPE_STATS_CONF:
  1395. trace_ath10k_htt_stats(ar, skb->data, skb->len);
  1396. break;
  1397. case HTT_T2H_MSG_TYPE_TX_INSPECT_IND:
  1398. /* Firmware can return tx frames if it's unable to fully
  1399. * process them and suspects host may be able to fix it. ath10k
  1400. * sends all tx frames as already inspected so this shouldn't
  1401. * happen unless fw has a bug.
  1402. */
  1403. ath10k_warn(ar, "received an unexpected htt tx inspect event\n");
  1404. break;
  1405. case HTT_T2H_MSG_TYPE_RX_ADDBA:
  1406. ath10k_htt_rx_addba(ar, resp);
  1407. break;
  1408. case HTT_T2H_MSG_TYPE_RX_DELBA:
  1409. ath10k_htt_rx_delba(ar, resp);
  1410. break;
  1411. case HTT_T2H_MSG_TYPE_PKTLOG: {
  1412. struct ath10k_pktlog_hdr *hdr =
  1413. (struct ath10k_pktlog_hdr *)resp->pktlog_msg.payload;
  1414. trace_ath10k_htt_pktlog(ar, resp->pktlog_msg.payload,
  1415. sizeof(*hdr) +
  1416. __le16_to_cpu(hdr->size));
  1417. break;
  1418. }
  1419. case HTT_T2H_MSG_TYPE_RX_FLUSH: {
  1420. /* Ignore this event because mac80211 takes care of Rx
  1421. * aggregation reordering.
  1422. */
  1423. break;
  1424. }
  1425. default:
  1426. ath10k_warn(ar, "htt event (%d) not handled\n",
  1427. resp->hdr.msg_type);
  1428. ath10k_dbg_dump(ar, ATH10K_DBG_HTT_DUMP, NULL, "htt event: ",
  1429. skb->data, skb->len);
  1430. break;
  1431. };
  1432. /* Free the indication buffer */
  1433. dev_kfree_skb_any(skb);
  1434. }
  1435. static void ath10k_htt_txrx_compl_task(unsigned long ptr)
  1436. {
  1437. struct ath10k_htt *htt = (struct ath10k_htt *)ptr;
  1438. struct htt_resp *resp;
  1439. struct sk_buff *skb;
  1440. spin_lock_bh(&htt->tx_lock);
  1441. while ((skb = __skb_dequeue(&htt->tx_compl_q))) {
  1442. ath10k_htt_rx_frm_tx_compl(htt->ar, skb);
  1443. dev_kfree_skb_any(skb);
  1444. }
  1445. spin_unlock_bh(&htt->tx_lock);
  1446. spin_lock_bh(&htt->rx_ring.lock);
  1447. while ((skb = __skb_dequeue(&htt->rx_compl_q))) {
  1448. resp = (struct htt_resp *)skb->data;
  1449. ath10k_htt_rx_handler(htt, &resp->rx_ind);
  1450. dev_kfree_skb_any(skb);
  1451. }
  1452. spin_unlock_bh(&htt->rx_ring.lock);
  1453. }