jz4780.dtsi 4.7 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. #include <dt-bindings/clock/jz4780-cgu.h>
  3. / {
  4. #address-cells = <1>;
  5. #size-cells = <1>;
  6. compatible = "ingenic,jz4780";
  7. cpuintc: interrupt-controller {
  8. #address-cells = <0>;
  9. #interrupt-cells = <1>;
  10. interrupt-controller;
  11. compatible = "mti,cpu-interrupt-controller";
  12. };
  13. intc: interrupt-controller@10001000 {
  14. compatible = "ingenic,jz4780-intc";
  15. reg = <0x10001000 0x50>;
  16. interrupt-controller;
  17. #interrupt-cells = <1>;
  18. interrupt-parent = <&cpuintc>;
  19. interrupts = <2>;
  20. };
  21. ext: ext {
  22. compatible = "fixed-clock";
  23. #clock-cells = <0>;
  24. };
  25. rtc: rtc {
  26. compatible = "fixed-clock";
  27. #clock-cells = <0>;
  28. clock-frequency = <32768>;
  29. };
  30. cgu: jz4780-cgu@10000000 {
  31. compatible = "ingenic,jz4780-cgu";
  32. reg = <0x10000000 0x100>;
  33. clocks = <&ext>, <&rtc>;
  34. clock-names = "ext", "rtc";
  35. #clock-cells = <1>;
  36. };
  37. rtc_dev: rtc@10003000 {
  38. compatible = "ingenic,jz4780-rtc";
  39. reg = <0x10003000 0x4c>;
  40. interrupt-parent = <&intc>;
  41. interrupts = <32>;
  42. clocks = <&cgu JZ4780_CLK_RTCLK>;
  43. clock-names = "rtc";
  44. };
  45. pinctrl: pin-controller@10010000 {
  46. compatible = "ingenic,jz4780-pinctrl";
  47. reg = <0x10010000 0x600>;
  48. #address-cells = <1>;
  49. #size-cells = <0>;
  50. gpa: gpio@0 {
  51. compatible = "ingenic,jz4780-gpio";
  52. reg = <0>;
  53. gpio-controller;
  54. gpio-ranges = <&pinctrl 0 0 32>;
  55. #gpio-cells = <2>;
  56. interrupt-controller;
  57. #interrupt-cells = <2>;
  58. interrupt-parent = <&intc>;
  59. interrupts = <17>;
  60. };
  61. gpb: gpio@1 {
  62. compatible = "ingenic,jz4780-gpio";
  63. reg = <1>;
  64. gpio-controller;
  65. gpio-ranges = <&pinctrl 0 32 32>;
  66. #gpio-cells = <2>;
  67. interrupt-controller;
  68. #interrupt-cells = <2>;
  69. interrupt-parent = <&intc>;
  70. interrupts = <16>;
  71. };
  72. gpc: gpio@2 {
  73. compatible = "ingenic,jz4780-gpio";
  74. reg = <2>;
  75. gpio-controller;
  76. gpio-ranges = <&pinctrl 0 64 32>;
  77. #gpio-cells = <2>;
  78. interrupt-controller;
  79. #interrupt-cells = <2>;
  80. interrupt-parent = <&intc>;
  81. interrupts = <15>;
  82. };
  83. gpd: gpio@3 {
  84. compatible = "ingenic,jz4780-gpio";
  85. reg = <3>;
  86. gpio-controller;
  87. gpio-ranges = <&pinctrl 0 96 32>;
  88. #gpio-cells = <2>;
  89. interrupt-controller;
  90. #interrupt-cells = <2>;
  91. interrupt-parent = <&intc>;
  92. interrupts = <14>;
  93. };
  94. gpe: gpio@4 {
  95. compatible = "ingenic,jz4780-gpio";
  96. reg = <4>;
  97. gpio-controller;
  98. gpio-ranges = <&pinctrl 0 128 32>;
  99. #gpio-cells = <2>;
  100. interrupt-controller;
  101. #interrupt-cells = <2>;
  102. interrupt-parent = <&intc>;
  103. interrupts = <13>;
  104. };
  105. gpf: gpio@5 {
  106. compatible = "ingenic,jz4780-gpio";
  107. reg = <5>;
  108. gpio-controller;
  109. gpio-ranges = <&pinctrl 0 160 32>;
  110. #gpio-cells = <2>;
  111. interrupt-controller;
  112. #interrupt-cells = <2>;
  113. interrupt-parent = <&intc>;
  114. interrupts = <12>;
  115. };
  116. };
  117. uart0: serial@10030000 {
  118. compatible = "ingenic,jz4780-uart";
  119. reg = <0x10030000 0x100>;
  120. interrupt-parent = <&intc>;
  121. interrupts = <51>;
  122. clocks = <&ext>, <&cgu JZ4780_CLK_UART0>;
  123. clock-names = "baud", "module";
  124. status = "disabled";
  125. };
  126. uart1: serial@10031000 {
  127. compatible = "ingenic,jz4780-uart";
  128. reg = <0x10031000 0x100>;
  129. interrupt-parent = <&intc>;
  130. interrupts = <50>;
  131. clocks = <&ext>, <&cgu JZ4780_CLK_UART1>;
  132. clock-names = "baud", "module";
  133. status = "disabled";
  134. };
  135. uart2: serial@10032000 {
  136. compatible = "ingenic,jz4780-uart";
  137. reg = <0x10032000 0x100>;
  138. interrupt-parent = <&intc>;
  139. interrupts = <49>;
  140. clocks = <&ext>, <&cgu JZ4780_CLK_UART2>;
  141. clock-names = "baud", "module";
  142. status = "disabled";
  143. };
  144. uart3: serial@10033000 {
  145. compatible = "ingenic,jz4780-uart";
  146. reg = <0x10033000 0x100>;
  147. interrupt-parent = <&intc>;
  148. interrupts = <48>;
  149. clocks = <&ext>, <&cgu JZ4780_CLK_UART3>;
  150. clock-names = "baud", "module";
  151. status = "disabled";
  152. };
  153. uart4: serial@10034000 {
  154. compatible = "ingenic,jz4780-uart";
  155. reg = <0x10034000 0x100>;
  156. interrupt-parent = <&intc>;
  157. interrupts = <34>;
  158. clocks = <&ext>, <&cgu JZ4780_CLK_UART4>;
  159. clock-names = "baud", "module";
  160. status = "disabled";
  161. };
  162. watchdog: watchdog@10002000 {
  163. compatible = "ingenic,jz4780-watchdog";
  164. reg = <0x10002000 0x10>;
  165. clocks = <&cgu JZ4780_CLK_RTCLK>;
  166. clock-names = "rtc";
  167. };
  168. nemc: nemc@13410000 {
  169. compatible = "ingenic,jz4780-nemc";
  170. reg = <0x13410000 0x10000>;
  171. #address-cells = <2>;
  172. #size-cells = <1>;
  173. ranges = <1 0 0x1b000000 0x1000000
  174. 2 0 0x1a000000 0x1000000
  175. 3 0 0x19000000 0x1000000
  176. 4 0 0x18000000 0x1000000
  177. 5 0 0x17000000 0x1000000
  178. 6 0 0x16000000 0x1000000>;
  179. clocks = <&cgu JZ4780_CLK_NEMC>;
  180. status = "disabled";
  181. };
  182. bch: bch@134d0000 {
  183. compatible = "ingenic,jz4780-bch";
  184. reg = <0x134d0000 0x10000>;
  185. clocks = <&cgu JZ4780_CLK_BCH>;
  186. status = "disabled";
  187. };
  188. };