vmwgfx_execbuf.c 50 KB

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  1. /**************************************************************************
  2. *
  3. * Copyright © 2009 VMware, Inc., Palo Alto, CA., USA
  4. * All Rights Reserved.
  5. *
  6. * Permission is hereby granted, free of charge, to any person obtaining a
  7. * copy of this software and associated documentation files (the
  8. * "Software"), to deal in the Software without restriction, including
  9. * without limitation the rights to use, copy, modify, merge, publish,
  10. * distribute, sub license, and/or sell copies of the Software, and to
  11. * permit persons to whom the Software is furnished to do so, subject to
  12. * the following conditions:
  13. *
  14. * The above copyright notice and this permission notice (including the
  15. * next paragraph) shall be included in all copies or substantial portions
  16. * of the Software.
  17. *
  18. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  19. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  20. * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
  21. * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
  22. * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
  23. * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
  24. * USE OR OTHER DEALINGS IN THE SOFTWARE.
  25. *
  26. **************************************************************************/
  27. #include "vmwgfx_drv.h"
  28. #include "vmwgfx_reg.h"
  29. #include <drm/ttm/ttm_bo_api.h>
  30. #include <drm/ttm/ttm_placement.h>
  31. #define VMW_RES_HT_ORDER 12
  32. /**
  33. * struct vmw_resource_relocation - Relocation info for resources
  34. *
  35. * @head: List head for the software context's relocation list.
  36. * @res: Non-ref-counted pointer to the resource.
  37. * @offset: Offset of 4 byte entries into the command buffer where the
  38. * id that needs fixup is located.
  39. */
  40. struct vmw_resource_relocation {
  41. struct list_head head;
  42. const struct vmw_resource *res;
  43. unsigned long offset;
  44. };
  45. /**
  46. * struct vmw_resource_val_node - Validation info for resources
  47. *
  48. * @head: List head for the software context's resource list.
  49. * @hash: Hash entry for quick resouce to val_node lookup.
  50. * @res: Ref-counted pointer to the resource.
  51. * @switch_backup: Boolean whether to switch backup buffer on unreserve.
  52. * @new_backup: Refcounted pointer to the new backup buffer.
  53. * @new_backup_offset: New backup buffer offset if @new_backup is non-NUll.
  54. * @first_usage: Set to true the first time the resource is referenced in
  55. * the command stream.
  56. * @no_buffer_needed: Resources do not need to allocate buffer backup on
  57. * reservation. The command stream will provide one.
  58. */
  59. struct vmw_resource_val_node {
  60. struct list_head head;
  61. struct drm_hash_item hash;
  62. struct vmw_resource *res;
  63. struct vmw_dma_buffer *new_backup;
  64. unsigned long new_backup_offset;
  65. bool first_usage;
  66. bool no_buffer_needed;
  67. };
  68. /**
  69. * vmw_resource_unreserve - unreserve resources previously reserved for
  70. * command submission.
  71. *
  72. * @list_head: list of resources to unreserve.
  73. * @backoff: Whether command submission failed.
  74. */
  75. static void vmw_resource_list_unreserve(struct list_head *list,
  76. bool backoff)
  77. {
  78. struct vmw_resource_val_node *val;
  79. list_for_each_entry(val, list, head) {
  80. struct vmw_resource *res = val->res;
  81. struct vmw_dma_buffer *new_backup =
  82. backoff ? NULL : val->new_backup;
  83. vmw_resource_unreserve(res, new_backup,
  84. val->new_backup_offset);
  85. vmw_dmabuf_unreference(&val->new_backup);
  86. }
  87. }
  88. /**
  89. * vmw_resource_val_add - Add a resource to the software context's
  90. * resource list if it's not already on it.
  91. *
  92. * @sw_context: Pointer to the software context.
  93. * @res: Pointer to the resource.
  94. * @p_node On successful return points to a valid pointer to a
  95. * struct vmw_resource_val_node, if non-NULL on entry.
  96. */
  97. static int vmw_resource_val_add(struct vmw_sw_context *sw_context,
  98. struct vmw_resource *res,
  99. struct vmw_resource_val_node **p_node)
  100. {
  101. struct vmw_resource_val_node *node;
  102. struct drm_hash_item *hash;
  103. int ret;
  104. if (likely(drm_ht_find_item(&sw_context->res_ht, (unsigned long) res,
  105. &hash) == 0)) {
  106. node = container_of(hash, struct vmw_resource_val_node, hash);
  107. node->first_usage = false;
  108. if (unlikely(p_node != NULL))
  109. *p_node = node;
  110. return 0;
  111. }
  112. node = kzalloc(sizeof(*node), GFP_KERNEL);
  113. if (unlikely(node == NULL)) {
  114. DRM_ERROR("Failed to allocate a resource validation "
  115. "entry.\n");
  116. return -ENOMEM;
  117. }
  118. node->hash.key = (unsigned long) res;
  119. ret = drm_ht_insert_item(&sw_context->res_ht, &node->hash);
  120. if (unlikely(ret != 0)) {
  121. DRM_ERROR("Failed to initialize a resource validation "
  122. "entry.\n");
  123. kfree(node);
  124. return ret;
  125. }
  126. list_add_tail(&node->head, &sw_context->resource_list);
  127. node->res = vmw_resource_reference(res);
  128. node->first_usage = true;
  129. if (unlikely(p_node != NULL))
  130. *p_node = node;
  131. return 0;
  132. }
  133. /**
  134. * vmw_resource_relocation_add - Add a relocation to the relocation list
  135. *
  136. * @list: Pointer to head of relocation list.
  137. * @res: The resource.
  138. * @offset: Offset into the command buffer currently being parsed where the
  139. * id that needs fixup is located. Granularity is 4 bytes.
  140. */
  141. static int vmw_resource_relocation_add(struct list_head *list,
  142. const struct vmw_resource *res,
  143. unsigned long offset)
  144. {
  145. struct vmw_resource_relocation *rel;
  146. rel = kmalloc(sizeof(*rel), GFP_KERNEL);
  147. if (unlikely(rel == NULL)) {
  148. DRM_ERROR("Failed to allocate a resource relocation.\n");
  149. return -ENOMEM;
  150. }
  151. rel->res = res;
  152. rel->offset = offset;
  153. list_add_tail(&rel->head, list);
  154. return 0;
  155. }
  156. /**
  157. * vmw_resource_relocations_free - Free all relocations on a list
  158. *
  159. * @list: Pointer to the head of the relocation list.
  160. */
  161. static void vmw_resource_relocations_free(struct list_head *list)
  162. {
  163. struct vmw_resource_relocation *rel, *n;
  164. list_for_each_entry_safe(rel, n, list, head) {
  165. list_del(&rel->head);
  166. kfree(rel);
  167. }
  168. }
  169. /**
  170. * vmw_resource_relocations_apply - Apply all relocations on a list
  171. *
  172. * @cb: Pointer to the start of the command buffer bein patch. This need
  173. * not be the same buffer as the one being parsed when the relocation
  174. * list was built, but the contents must be the same modulo the
  175. * resource ids.
  176. * @list: Pointer to the head of the relocation list.
  177. */
  178. static void vmw_resource_relocations_apply(uint32_t *cb,
  179. struct list_head *list)
  180. {
  181. struct vmw_resource_relocation *rel;
  182. list_for_each_entry(rel, list, head)
  183. cb[rel->offset] = rel->res->id;
  184. }
  185. static int vmw_cmd_invalid(struct vmw_private *dev_priv,
  186. struct vmw_sw_context *sw_context,
  187. SVGA3dCmdHeader *header)
  188. {
  189. return capable(CAP_SYS_ADMIN) ? : -EINVAL;
  190. }
  191. static int vmw_cmd_ok(struct vmw_private *dev_priv,
  192. struct vmw_sw_context *sw_context,
  193. SVGA3dCmdHeader *header)
  194. {
  195. return 0;
  196. }
  197. /**
  198. * vmw_bo_to_validate_list - add a bo to a validate list
  199. *
  200. * @sw_context: The software context used for this command submission batch.
  201. * @bo: The buffer object to add.
  202. * @validate_as_mob: Validate this buffer as a MOB.
  203. * @p_val_node: If non-NULL Will be updated with the validate node number
  204. * on return.
  205. *
  206. * Returns -EINVAL if the limit of number of buffer objects per command
  207. * submission is reached.
  208. */
  209. static int vmw_bo_to_validate_list(struct vmw_sw_context *sw_context,
  210. struct ttm_buffer_object *bo,
  211. bool validate_as_mob,
  212. uint32_t *p_val_node)
  213. {
  214. uint32_t val_node;
  215. struct vmw_validate_buffer *vval_buf;
  216. struct ttm_validate_buffer *val_buf;
  217. struct drm_hash_item *hash;
  218. int ret;
  219. if (likely(drm_ht_find_item(&sw_context->res_ht, (unsigned long) bo,
  220. &hash) == 0)) {
  221. vval_buf = container_of(hash, struct vmw_validate_buffer,
  222. hash);
  223. if (unlikely(vval_buf->validate_as_mob != validate_as_mob)) {
  224. DRM_ERROR("Inconsistent buffer usage.\n");
  225. return -EINVAL;
  226. }
  227. val_buf = &vval_buf->base;
  228. val_node = vval_buf - sw_context->val_bufs;
  229. } else {
  230. val_node = sw_context->cur_val_buf;
  231. if (unlikely(val_node >= VMWGFX_MAX_VALIDATIONS)) {
  232. DRM_ERROR("Max number of DMA buffers per submission "
  233. "exceeded.\n");
  234. return -EINVAL;
  235. }
  236. vval_buf = &sw_context->val_bufs[val_node];
  237. vval_buf->hash.key = (unsigned long) bo;
  238. ret = drm_ht_insert_item(&sw_context->res_ht, &vval_buf->hash);
  239. if (unlikely(ret != 0)) {
  240. DRM_ERROR("Failed to initialize a buffer validation "
  241. "entry.\n");
  242. return ret;
  243. }
  244. ++sw_context->cur_val_buf;
  245. val_buf = &vval_buf->base;
  246. val_buf->bo = ttm_bo_reference(bo);
  247. val_buf->reserved = false;
  248. list_add_tail(&val_buf->head, &sw_context->validate_nodes);
  249. vval_buf->validate_as_mob = validate_as_mob;
  250. }
  251. sw_context->fence_flags |= DRM_VMW_FENCE_FLAG_EXEC;
  252. if (p_val_node)
  253. *p_val_node = val_node;
  254. return 0;
  255. }
  256. /**
  257. * vmw_resources_reserve - Reserve all resources on the sw_context's
  258. * resource list.
  259. *
  260. * @sw_context: Pointer to the software context.
  261. *
  262. * Note that since vmware's command submission currently is protected by
  263. * the cmdbuf mutex, no fancy deadlock avoidance is required for resources,
  264. * since only a single thread at once will attempt this.
  265. */
  266. static int vmw_resources_reserve(struct vmw_sw_context *sw_context)
  267. {
  268. struct vmw_resource_val_node *val;
  269. int ret;
  270. list_for_each_entry(val, &sw_context->resource_list, head) {
  271. struct vmw_resource *res = val->res;
  272. ret = vmw_resource_reserve(res, val->no_buffer_needed);
  273. if (unlikely(ret != 0))
  274. return ret;
  275. if (res->backup) {
  276. struct ttm_buffer_object *bo = &res->backup->base;
  277. ret = vmw_bo_to_validate_list
  278. (sw_context, bo,
  279. vmw_resource_needs_backup(res), NULL);
  280. if (unlikely(ret != 0))
  281. return ret;
  282. }
  283. }
  284. return 0;
  285. }
  286. /**
  287. * vmw_resources_validate - Validate all resources on the sw_context's
  288. * resource list.
  289. *
  290. * @sw_context: Pointer to the software context.
  291. *
  292. * Before this function is called, all resource backup buffers must have
  293. * been validated.
  294. */
  295. static int vmw_resources_validate(struct vmw_sw_context *sw_context)
  296. {
  297. struct vmw_resource_val_node *val;
  298. int ret;
  299. list_for_each_entry(val, &sw_context->resource_list, head) {
  300. struct vmw_resource *res = val->res;
  301. ret = vmw_resource_validate(res);
  302. if (unlikely(ret != 0)) {
  303. if (ret != -ERESTARTSYS)
  304. DRM_ERROR("Failed to validate resource.\n");
  305. return ret;
  306. }
  307. }
  308. return 0;
  309. }
  310. /**
  311. * vmw_cmd_res_check - Check that a resource is present and if so, put it
  312. * on the resource validate list unless it's already there.
  313. *
  314. * @dev_priv: Pointer to a device private structure.
  315. * @sw_context: Pointer to the software context.
  316. * @res_type: Resource type.
  317. * @converter: User-space visisble type specific information.
  318. * @id: Pointer to the location in the command buffer currently being
  319. * parsed from where the user-space resource id handle is located.
  320. */
  321. static int vmw_cmd_res_check(struct vmw_private *dev_priv,
  322. struct vmw_sw_context *sw_context,
  323. enum vmw_res_type res_type,
  324. const struct vmw_user_resource_conv *converter,
  325. uint32_t *id,
  326. struct vmw_resource_val_node **p_val)
  327. {
  328. struct vmw_res_cache_entry *rcache =
  329. &sw_context->res_cache[res_type];
  330. struct vmw_resource *res;
  331. struct vmw_resource_val_node *node;
  332. int ret;
  333. if (*id == SVGA3D_INVALID_ID)
  334. return 0;
  335. /*
  336. * Fastpath in case of repeated commands referencing the same
  337. * resource
  338. */
  339. if (likely(rcache->valid && *id == rcache->handle)) {
  340. const struct vmw_resource *res = rcache->res;
  341. rcache->node->first_usage = false;
  342. if (p_val)
  343. *p_val = rcache->node;
  344. return vmw_resource_relocation_add
  345. (&sw_context->res_relocations, res,
  346. id - sw_context->buf_start);
  347. }
  348. ret = vmw_user_resource_lookup_handle(dev_priv,
  349. sw_context->tfile,
  350. *id,
  351. converter,
  352. &res);
  353. if (unlikely(ret != 0)) {
  354. DRM_ERROR("Could not find or use resource 0x%08x.\n",
  355. (unsigned) *id);
  356. dump_stack();
  357. return ret;
  358. }
  359. rcache->valid = true;
  360. rcache->res = res;
  361. rcache->handle = *id;
  362. ret = vmw_resource_relocation_add(&sw_context->res_relocations,
  363. res,
  364. id - sw_context->buf_start);
  365. if (unlikely(ret != 0))
  366. goto out_no_reloc;
  367. ret = vmw_resource_val_add(sw_context, res, &node);
  368. if (unlikely(ret != 0))
  369. goto out_no_reloc;
  370. rcache->node = node;
  371. if (p_val)
  372. *p_val = node;
  373. vmw_resource_unreference(&res);
  374. return 0;
  375. out_no_reloc:
  376. BUG_ON(sw_context->error_resource != NULL);
  377. sw_context->error_resource = res;
  378. return ret;
  379. }
  380. /**
  381. * vmw_cmd_cid_check - Check a command header for valid context information.
  382. *
  383. * @dev_priv: Pointer to a device private structure.
  384. * @sw_context: Pointer to the software context.
  385. * @header: A command header with an embedded user-space context handle.
  386. *
  387. * Convenience function: Call vmw_cmd_res_check with the user-space context
  388. * handle embedded in @header.
  389. */
  390. static int vmw_cmd_cid_check(struct vmw_private *dev_priv,
  391. struct vmw_sw_context *sw_context,
  392. SVGA3dCmdHeader *header)
  393. {
  394. struct vmw_cid_cmd {
  395. SVGA3dCmdHeader header;
  396. __le32 cid;
  397. } *cmd;
  398. cmd = container_of(header, struct vmw_cid_cmd, header);
  399. return vmw_cmd_res_check(dev_priv, sw_context, vmw_res_context,
  400. user_context_converter, &cmd->cid, NULL);
  401. }
  402. static int vmw_cmd_set_render_target_check(struct vmw_private *dev_priv,
  403. struct vmw_sw_context *sw_context,
  404. SVGA3dCmdHeader *header)
  405. {
  406. struct vmw_sid_cmd {
  407. SVGA3dCmdHeader header;
  408. SVGA3dCmdSetRenderTarget body;
  409. } *cmd;
  410. int ret;
  411. ret = vmw_cmd_cid_check(dev_priv, sw_context, header);
  412. if (unlikely(ret != 0))
  413. return ret;
  414. cmd = container_of(header, struct vmw_sid_cmd, header);
  415. ret = vmw_cmd_res_check(dev_priv, sw_context, vmw_res_surface,
  416. user_surface_converter,
  417. &cmd->body.target.sid, NULL);
  418. return ret;
  419. }
  420. static int vmw_cmd_surface_copy_check(struct vmw_private *dev_priv,
  421. struct vmw_sw_context *sw_context,
  422. SVGA3dCmdHeader *header)
  423. {
  424. struct vmw_sid_cmd {
  425. SVGA3dCmdHeader header;
  426. SVGA3dCmdSurfaceCopy body;
  427. } *cmd;
  428. int ret;
  429. cmd = container_of(header, struct vmw_sid_cmd, header);
  430. ret = vmw_cmd_res_check(dev_priv, sw_context, vmw_res_surface,
  431. user_surface_converter,
  432. &cmd->body.src.sid, NULL);
  433. if (unlikely(ret != 0))
  434. return ret;
  435. return vmw_cmd_res_check(dev_priv, sw_context, vmw_res_surface,
  436. user_surface_converter,
  437. &cmd->body.dest.sid, NULL);
  438. }
  439. static int vmw_cmd_stretch_blt_check(struct vmw_private *dev_priv,
  440. struct vmw_sw_context *sw_context,
  441. SVGA3dCmdHeader *header)
  442. {
  443. struct vmw_sid_cmd {
  444. SVGA3dCmdHeader header;
  445. SVGA3dCmdSurfaceStretchBlt body;
  446. } *cmd;
  447. int ret;
  448. cmd = container_of(header, struct vmw_sid_cmd, header);
  449. ret = vmw_cmd_res_check(dev_priv, sw_context, vmw_res_surface,
  450. user_surface_converter,
  451. &cmd->body.src.sid, NULL);
  452. if (unlikely(ret != 0))
  453. return ret;
  454. return vmw_cmd_res_check(dev_priv, sw_context, vmw_res_surface,
  455. user_surface_converter,
  456. &cmd->body.dest.sid, NULL);
  457. }
  458. static int vmw_cmd_blt_surf_screen_check(struct vmw_private *dev_priv,
  459. struct vmw_sw_context *sw_context,
  460. SVGA3dCmdHeader *header)
  461. {
  462. struct vmw_sid_cmd {
  463. SVGA3dCmdHeader header;
  464. SVGA3dCmdBlitSurfaceToScreen body;
  465. } *cmd;
  466. cmd = container_of(header, struct vmw_sid_cmd, header);
  467. if (unlikely(!sw_context->kernel)) {
  468. DRM_ERROR("Kernel only SVGA3d command: %u.\n", cmd->header.id);
  469. return -EPERM;
  470. }
  471. return vmw_cmd_res_check(dev_priv, sw_context, vmw_res_surface,
  472. user_surface_converter,
  473. &cmd->body.srcImage.sid, NULL);
  474. }
  475. static int vmw_cmd_present_check(struct vmw_private *dev_priv,
  476. struct vmw_sw_context *sw_context,
  477. SVGA3dCmdHeader *header)
  478. {
  479. struct vmw_sid_cmd {
  480. SVGA3dCmdHeader header;
  481. SVGA3dCmdPresent body;
  482. } *cmd;
  483. cmd = container_of(header, struct vmw_sid_cmd, header);
  484. if (unlikely(!sw_context->kernel)) {
  485. DRM_ERROR("Kernel only SVGA3d command: %u.\n", cmd->header.id);
  486. return -EPERM;
  487. }
  488. return vmw_cmd_res_check(dev_priv, sw_context, vmw_res_surface,
  489. user_surface_converter, &cmd->body.sid,
  490. NULL);
  491. }
  492. /**
  493. * vmw_query_bo_switch_prepare - Prepare to switch pinned buffer for queries.
  494. *
  495. * @dev_priv: The device private structure.
  496. * @new_query_bo: The new buffer holding query results.
  497. * @sw_context: The software context used for this command submission.
  498. *
  499. * This function checks whether @new_query_bo is suitable for holding
  500. * query results, and if another buffer currently is pinned for query
  501. * results. If so, the function prepares the state of @sw_context for
  502. * switching pinned buffers after successful submission of the current
  503. * command batch.
  504. */
  505. static int vmw_query_bo_switch_prepare(struct vmw_private *dev_priv,
  506. struct ttm_buffer_object *new_query_bo,
  507. struct vmw_sw_context *sw_context)
  508. {
  509. struct vmw_res_cache_entry *ctx_entry =
  510. &sw_context->res_cache[vmw_res_context];
  511. int ret;
  512. BUG_ON(!ctx_entry->valid);
  513. sw_context->last_query_ctx = ctx_entry->res;
  514. if (unlikely(new_query_bo != sw_context->cur_query_bo)) {
  515. if (unlikely(new_query_bo->num_pages > 4)) {
  516. DRM_ERROR("Query buffer too large.\n");
  517. return -EINVAL;
  518. }
  519. if (unlikely(sw_context->cur_query_bo != NULL)) {
  520. sw_context->needs_post_query_barrier = true;
  521. ret = vmw_bo_to_validate_list(sw_context,
  522. sw_context->cur_query_bo,
  523. dev_priv->has_mob, NULL);
  524. if (unlikely(ret != 0))
  525. return ret;
  526. }
  527. sw_context->cur_query_bo = new_query_bo;
  528. ret = vmw_bo_to_validate_list(sw_context,
  529. dev_priv->dummy_query_bo,
  530. dev_priv->has_mob, NULL);
  531. if (unlikely(ret != 0))
  532. return ret;
  533. }
  534. return 0;
  535. }
  536. /**
  537. * vmw_query_bo_switch_commit - Finalize switching pinned query buffer
  538. *
  539. * @dev_priv: The device private structure.
  540. * @sw_context: The software context used for this command submission batch.
  541. *
  542. * This function will check if we're switching query buffers, and will then,
  543. * issue a dummy occlusion query wait used as a query barrier. When the fence
  544. * object following that query wait has signaled, we are sure that all
  545. * preceding queries have finished, and the old query buffer can be unpinned.
  546. * However, since both the new query buffer and the old one are fenced with
  547. * that fence, we can do an asynchronus unpin now, and be sure that the
  548. * old query buffer won't be moved until the fence has signaled.
  549. *
  550. * As mentioned above, both the new - and old query buffers need to be fenced
  551. * using a sequence emitted *after* calling this function.
  552. */
  553. static void vmw_query_bo_switch_commit(struct vmw_private *dev_priv,
  554. struct vmw_sw_context *sw_context)
  555. {
  556. /*
  557. * The validate list should still hold references to all
  558. * contexts here.
  559. */
  560. if (sw_context->needs_post_query_barrier) {
  561. struct vmw_res_cache_entry *ctx_entry =
  562. &sw_context->res_cache[vmw_res_context];
  563. struct vmw_resource *ctx;
  564. int ret;
  565. BUG_ON(!ctx_entry->valid);
  566. ctx = ctx_entry->res;
  567. ret = vmw_fifo_emit_dummy_query(dev_priv, ctx->id);
  568. if (unlikely(ret != 0))
  569. DRM_ERROR("Out of fifo space for dummy query.\n");
  570. }
  571. if (dev_priv->pinned_bo != sw_context->cur_query_bo) {
  572. if (dev_priv->pinned_bo) {
  573. vmw_bo_pin(dev_priv->pinned_bo, false);
  574. ttm_bo_unref(&dev_priv->pinned_bo);
  575. }
  576. if (!sw_context->needs_post_query_barrier) {
  577. vmw_bo_pin(sw_context->cur_query_bo, true);
  578. /*
  579. * We pin also the dummy_query_bo buffer so that we
  580. * don't need to validate it when emitting
  581. * dummy queries in context destroy paths.
  582. */
  583. vmw_bo_pin(dev_priv->dummy_query_bo, true);
  584. dev_priv->dummy_query_bo_pinned = true;
  585. BUG_ON(sw_context->last_query_ctx == NULL);
  586. dev_priv->query_cid = sw_context->last_query_ctx->id;
  587. dev_priv->query_cid_valid = true;
  588. dev_priv->pinned_bo =
  589. ttm_bo_reference(sw_context->cur_query_bo);
  590. }
  591. }
  592. }
  593. /**
  594. * vmw_translate_guest_pointer - Prepare to translate a user-space buffer
  595. * handle to a valid SVGAGuestPtr
  596. *
  597. * @dev_priv: Pointer to a device private structure.
  598. * @sw_context: The software context used for this command batch validation.
  599. * @ptr: Pointer to the user-space handle to be translated.
  600. * @vmw_bo_p: Points to a location that, on successful return will carry
  601. * a reference-counted pointer to the DMA buffer identified by the
  602. * user-space handle in @id.
  603. *
  604. * This function saves information needed to translate a user-space buffer
  605. * handle to a valid SVGAGuestPtr. The translation does not take place
  606. * immediately, but during a call to vmw_apply_relocations().
  607. * This function builds a relocation list and a list of buffers to validate.
  608. * The former needs to be freed using either vmw_apply_relocations() or
  609. * vmw_free_relocations(). The latter needs to be freed using
  610. * vmw_clear_validations.
  611. */
  612. static int vmw_translate_guest_ptr(struct vmw_private *dev_priv,
  613. struct vmw_sw_context *sw_context,
  614. SVGAGuestPtr *ptr,
  615. struct vmw_dma_buffer **vmw_bo_p)
  616. {
  617. struct vmw_dma_buffer *vmw_bo = NULL;
  618. struct ttm_buffer_object *bo;
  619. uint32_t handle = ptr->gmrId;
  620. struct vmw_relocation *reloc;
  621. int ret;
  622. ret = vmw_user_dmabuf_lookup(sw_context->tfile, handle, &vmw_bo);
  623. if (unlikely(ret != 0)) {
  624. DRM_ERROR("Could not find or use GMR region.\n");
  625. return -EINVAL;
  626. }
  627. bo = &vmw_bo->base;
  628. if (unlikely(sw_context->cur_reloc >= VMWGFX_MAX_RELOCATIONS)) {
  629. DRM_ERROR("Max number relocations per submission"
  630. " exceeded\n");
  631. ret = -EINVAL;
  632. goto out_no_reloc;
  633. }
  634. reloc = &sw_context->relocs[sw_context->cur_reloc++];
  635. reloc->location = ptr;
  636. ret = vmw_bo_to_validate_list(sw_context, bo, false, &reloc->index);
  637. if (unlikely(ret != 0))
  638. goto out_no_reloc;
  639. *vmw_bo_p = vmw_bo;
  640. return 0;
  641. out_no_reloc:
  642. vmw_dmabuf_unreference(&vmw_bo);
  643. vmw_bo_p = NULL;
  644. return ret;
  645. }
  646. /**
  647. * vmw_cmd_begin_query - validate a SVGA_3D_CMD_BEGIN_QUERY command.
  648. *
  649. * @dev_priv: Pointer to a device private struct.
  650. * @sw_context: The software context used for this command submission.
  651. * @header: Pointer to the command header in the command stream.
  652. */
  653. static int vmw_cmd_begin_query(struct vmw_private *dev_priv,
  654. struct vmw_sw_context *sw_context,
  655. SVGA3dCmdHeader *header)
  656. {
  657. struct vmw_begin_query_cmd {
  658. SVGA3dCmdHeader header;
  659. SVGA3dCmdBeginQuery q;
  660. } *cmd;
  661. cmd = container_of(header, struct vmw_begin_query_cmd,
  662. header);
  663. return vmw_cmd_res_check(dev_priv, sw_context, vmw_res_context,
  664. user_context_converter, &cmd->q.cid,
  665. NULL);
  666. }
  667. /**
  668. * vmw_cmd_end_query - validate a SVGA_3D_CMD_END_QUERY command.
  669. *
  670. * @dev_priv: Pointer to a device private struct.
  671. * @sw_context: The software context used for this command submission.
  672. * @header: Pointer to the command header in the command stream.
  673. */
  674. static int vmw_cmd_end_query(struct vmw_private *dev_priv,
  675. struct vmw_sw_context *sw_context,
  676. SVGA3dCmdHeader *header)
  677. {
  678. struct vmw_dma_buffer *vmw_bo;
  679. struct vmw_query_cmd {
  680. SVGA3dCmdHeader header;
  681. SVGA3dCmdEndQuery q;
  682. } *cmd;
  683. int ret;
  684. cmd = container_of(header, struct vmw_query_cmd, header);
  685. ret = vmw_cmd_cid_check(dev_priv, sw_context, header);
  686. if (unlikely(ret != 0))
  687. return ret;
  688. ret = vmw_translate_guest_ptr(dev_priv, sw_context,
  689. &cmd->q.guestResult,
  690. &vmw_bo);
  691. if (unlikely(ret != 0))
  692. return ret;
  693. ret = vmw_query_bo_switch_prepare(dev_priv, &vmw_bo->base, sw_context);
  694. vmw_dmabuf_unreference(&vmw_bo);
  695. return ret;
  696. }
  697. /*
  698. * vmw_cmd_wait_query - validate a SVGA_3D_CMD_WAIT_QUERY command.
  699. *
  700. * @dev_priv: Pointer to a device private struct.
  701. * @sw_context: The software context used for this command submission.
  702. * @header: Pointer to the command header in the command stream.
  703. */
  704. static int vmw_cmd_wait_query(struct vmw_private *dev_priv,
  705. struct vmw_sw_context *sw_context,
  706. SVGA3dCmdHeader *header)
  707. {
  708. struct vmw_dma_buffer *vmw_bo;
  709. struct vmw_query_cmd {
  710. SVGA3dCmdHeader header;
  711. SVGA3dCmdWaitForQuery q;
  712. } *cmd;
  713. int ret;
  714. cmd = container_of(header, struct vmw_query_cmd, header);
  715. ret = vmw_cmd_cid_check(dev_priv, sw_context, header);
  716. if (unlikely(ret != 0))
  717. return ret;
  718. ret = vmw_translate_guest_ptr(dev_priv, sw_context,
  719. &cmd->q.guestResult,
  720. &vmw_bo);
  721. if (unlikely(ret != 0))
  722. return ret;
  723. vmw_dmabuf_unreference(&vmw_bo);
  724. return 0;
  725. }
  726. static int vmw_cmd_dma(struct vmw_private *dev_priv,
  727. struct vmw_sw_context *sw_context,
  728. SVGA3dCmdHeader *header)
  729. {
  730. struct vmw_dma_buffer *vmw_bo = NULL;
  731. struct vmw_surface *srf = NULL;
  732. struct vmw_dma_cmd {
  733. SVGA3dCmdHeader header;
  734. SVGA3dCmdSurfaceDMA dma;
  735. } *cmd;
  736. int ret;
  737. cmd = container_of(header, struct vmw_dma_cmd, header);
  738. ret = vmw_translate_guest_ptr(dev_priv, sw_context,
  739. &cmd->dma.guest.ptr,
  740. &vmw_bo);
  741. if (unlikely(ret != 0))
  742. return ret;
  743. ret = vmw_cmd_res_check(dev_priv, sw_context, vmw_res_surface,
  744. user_surface_converter, &cmd->dma.host.sid,
  745. NULL);
  746. if (unlikely(ret != 0)) {
  747. if (unlikely(ret != -ERESTARTSYS))
  748. DRM_ERROR("could not find surface for DMA.\n");
  749. goto out_no_surface;
  750. }
  751. srf = vmw_res_to_srf(sw_context->res_cache[vmw_res_surface].res);
  752. vmw_kms_cursor_snoop(srf, sw_context->tfile, &vmw_bo->base, header);
  753. out_no_surface:
  754. vmw_dmabuf_unreference(&vmw_bo);
  755. return ret;
  756. }
  757. static int vmw_cmd_draw(struct vmw_private *dev_priv,
  758. struct vmw_sw_context *sw_context,
  759. SVGA3dCmdHeader *header)
  760. {
  761. struct vmw_draw_cmd {
  762. SVGA3dCmdHeader header;
  763. SVGA3dCmdDrawPrimitives body;
  764. } *cmd;
  765. SVGA3dVertexDecl *decl = (SVGA3dVertexDecl *)(
  766. (unsigned long)header + sizeof(*cmd));
  767. SVGA3dPrimitiveRange *range;
  768. uint32_t i;
  769. uint32_t maxnum;
  770. int ret;
  771. ret = vmw_cmd_cid_check(dev_priv, sw_context, header);
  772. if (unlikely(ret != 0))
  773. return ret;
  774. cmd = container_of(header, struct vmw_draw_cmd, header);
  775. maxnum = (header->size - sizeof(cmd->body)) / sizeof(*decl);
  776. if (unlikely(cmd->body.numVertexDecls > maxnum)) {
  777. DRM_ERROR("Illegal number of vertex declarations.\n");
  778. return -EINVAL;
  779. }
  780. for (i = 0; i < cmd->body.numVertexDecls; ++i, ++decl) {
  781. ret = vmw_cmd_res_check(dev_priv, sw_context, vmw_res_surface,
  782. user_surface_converter,
  783. &decl->array.surfaceId, NULL);
  784. if (unlikely(ret != 0))
  785. return ret;
  786. }
  787. maxnum = (header->size - sizeof(cmd->body) -
  788. cmd->body.numVertexDecls * sizeof(*decl)) / sizeof(*range);
  789. if (unlikely(cmd->body.numRanges > maxnum)) {
  790. DRM_ERROR("Illegal number of index ranges.\n");
  791. return -EINVAL;
  792. }
  793. range = (SVGA3dPrimitiveRange *) decl;
  794. for (i = 0; i < cmd->body.numRanges; ++i, ++range) {
  795. ret = vmw_cmd_res_check(dev_priv, sw_context, vmw_res_surface,
  796. user_surface_converter,
  797. &range->indexArray.surfaceId, NULL);
  798. if (unlikely(ret != 0))
  799. return ret;
  800. }
  801. return 0;
  802. }
  803. static int vmw_cmd_tex_state(struct vmw_private *dev_priv,
  804. struct vmw_sw_context *sw_context,
  805. SVGA3dCmdHeader *header)
  806. {
  807. struct vmw_tex_state_cmd {
  808. SVGA3dCmdHeader header;
  809. SVGA3dCmdSetTextureState state;
  810. };
  811. SVGA3dTextureState *last_state = (SVGA3dTextureState *)
  812. ((unsigned long) header + header->size + sizeof(header));
  813. SVGA3dTextureState *cur_state = (SVGA3dTextureState *)
  814. ((unsigned long) header + sizeof(struct vmw_tex_state_cmd));
  815. int ret;
  816. ret = vmw_cmd_cid_check(dev_priv, sw_context, header);
  817. if (unlikely(ret != 0))
  818. return ret;
  819. for (; cur_state < last_state; ++cur_state) {
  820. if (likely(cur_state->name != SVGA3D_TS_BIND_TEXTURE))
  821. continue;
  822. ret = vmw_cmd_res_check(dev_priv, sw_context, vmw_res_surface,
  823. user_surface_converter,
  824. &cur_state->value, NULL);
  825. if (unlikely(ret != 0))
  826. return ret;
  827. }
  828. return 0;
  829. }
  830. static int vmw_cmd_check_define_gmrfb(struct vmw_private *dev_priv,
  831. struct vmw_sw_context *sw_context,
  832. void *buf)
  833. {
  834. struct vmw_dma_buffer *vmw_bo;
  835. int ret;
  836. struct {
  837. uint32_t header;
  838. SVGAFifoCmdDefineGMRFB body;
  839. } *cmd = buf;
  840. ret = vmw_translate_guest_ptr(dev_priv, sw_context,
  841. &cmd->body.ptr,
  842. &vmw_bo);
  843. if (unlikely(ret != 0))
  844. return ret;
  845. vmw_dmabuf_unreference(&vmw_bo);
  846. return ret;
  847. }
  848. /**
  849. * vmw_cmd_set_shader - Validate an SVGA_3D_CMD_SET_SHADER
  850. * command
  851. *
  852. * @dev_priv: Pointer to a device private struct.
  853. * @sw_context: The software context being used for this batch.
  854. * @header: Pointer to the command header in the command stream.
  855. */
  856. static int vmw_cmd_set_shader(struct vmw_private *dev_priv,
  857. struct vmw_sw_context *sw_context,
  858. SVGA3dCmdHeader *header)
  859. {
  860. struct vmw_set_shader_cmd {
  861. SVGA3dCmdHeader header;
  862. SVGA3dCmdSetShader body;
  863. } *cmd;
  864. int ret;
  865. cmd = container_of(header, struct vmw_set_shader_cmd,
  866. header);
  867. ret = vmw_cmd_cid_check(dev_priv, sw_context, header);
  868. if (unlikely(ret != 0))
  869. return ret;
  870. return 0;
  871. }
  872. static int vmw_cmd_check_not_3d(struct vmw_private *dev_priv,
  873. struct vmw_sw_context *sw_context,
  874. void *buf, uint32_t *size)
  875. {
  876. uint32_t size_remaining = *size;
  877. uint32_t cmd_id;
  878. cmd_id = le32_to_cpu(((uint32_t *)buf)[0]);
  879. switch (cmd_id) {
  880. case SVGA_CMD_UPDATE:
  881. *size = sizeof(uint32_t) + sizeof(SVGAFifoCmdUpdate);
  882. break;
  883. case SVGA_CMD_DEFINE_GMRFB:
  884. *size = sizeof(uint32_t) + sizeof(SVGAFifoCmdDefineGMRFB);
  885. break;
  886. case SVGA_CMD_BLIT_GMRFB_TO_SCREEN:
  887. *size = sizeof(uint32_t) + sizeof(SVGAFifoCmdBlitGMRFBToScreen);
  888. break;
  889. case SVGA_CMD_BLIT_SCREEN_TO_GMRFB:
  890. *size = sizeof(uint32_t) + sizeof(SVGAFifoCmdBlitGMRFBToScreen);
  891. break;
  892. default:
  893. DRM_ERROR("Unsupported SVGA command: %u.\n", cmd_id);
  894. return -EINVAL;
  895. }
  896. if (*size > size_remaining) {
  897. DRM_ERROR("Invalid SVGA command (size mismatch):"
  898. " %u.\n", cmd_id);
  899. return -EINVAL;
  900. }
  901. if (unlikely(!sw_context->kernel)) {
  902. DRM_ERROR("Kernel only SVGA command: %u.\n", cmd_id);
  903. return -EPERM;
  904. }
  905. if (cmd_id == SVGA_CMD_DEFINE_GMRFB)
  906. return vmw_cmd_check_define_gmrfb(dev_priv, sw_context, buf);
  907. return 0;
  908. }
  909. typedef int (*vmw_cmd_func) (struct vmw_private *,
  910. struct vmw_sw_context *,
  911. SVGA3dCmdHeader *);
  912. #define VMW_CMD_DEF(cmd, func) \
  913. [cmd - SVGA_3D_CMD_BASE] = func
  914. static vmw_cmd_func vmw_cmd_funcs[SVGA_3D_CMD_MAX] = {
  915. VMW_CMD_DEF(SVGA_3D_CMD_SURFACE_DEFINE, &vmw_cmd_invalid),
  916. VMW_CMD_DEF(SVGA_3D_CMD_SURFACE_DESTROY, &vmw_cmd_invalid),
  917. VMW_CMD_DEF(SVGA_3D_CMD_SURFACE_COPY, &vmw_cmd_surface_copy_check),
  918. VMW_CMD_DEF(SVGA_3D_CMD_SURFACE_STRETCHBLT, &vmw_cmd_stretch_blt_check),
  919. VMW_CMD_DEF(SVGA_3D_CMD_SURFACE_DMA, &vmw_cmd_dma),
  920. VMW_CMD_DEF(SVGA_3D_CMD_CONTEXT_DEFINE, &vmw_cmd_invalid),
  921. VMW_CMD_DEF(SVGA_3D_CMD_CONTEXT_DESTROY, &vmw_cmd_invalid),
  922. VMW_CMD_DEF(SVGA_3D_CMD_SETTRANSFORM, &vmw_cmd_cid_check),
  923. VMW_CMD_DEF(SVGA_3D_CMD_SETZRANGE, &vmw_cmd_cid_check),
  924. VMW_CMD_DEF(SVGA_3D_CMD_SETRENDERSTATE, &vmw_cmd_cid_check),
  925. VMW_CMD_DEF(SVGA_3D_CMD_SETRENDERTARGET,
  926. &vmw_cmd_set_render_target_check),
  927. VMW_CMD_DEF(SVGA_3D_CMD_SETTEXTURESTATE, &vmw_cmd_tex_state),
  928. VMW_CMD_DEF(SVGA_3D_CMD_SETMATERIAL, &vmw_cmd_cid_check),
  929. VMW_CMD_DEF(SVGA_3D_CMD_SETLIGHTDATA, &vmw_cmd_cid_check),
  930. VMW_CMD_DEF(SVGA_3D_CMD_SETLIGHTENABLED, &vmw_cmd_cid_check),
  931. VMW_CMD_DEF(SVGA_3D_CMD_SETVIEWPORT, &vmw_cmd_cid_check),
  932. VMW_CMD_DEF(SVGA_3D_CMD_SETCLIPPLANE, &vmw_cmd_cid_check),
  933. VMW_CMD_DEF(SVGA_3D_CMD_CLEAR, &vmw_cmd_cid_check),
  934. VMW_CMD_DEF(SVGA_3D_CMD_PRESENT, &vmw_cmd_present_check),
  935. VMW_CMD_DEF(SVGA_3D_CMD_SHADER_DEFINE, &vmw_cmd_cid_check),
  936. VMW_CMD_DEF(SVGA_3D_CMD_SHADER_DESTROY, &vmw_cmd_cid_check),
  937. VMW_CMD_DEF(SVGA_3D_CMD_SET_SHADER, &vmw_cmd_set_shader),
  938. VMW_CMD_DEF(SVGA_3D_CMD_SET_SHADER_CONST, &vmw_cmd_cid_check),
  939. VMW_CMD_DEF(SVGA_3D_CMD_DRAW_PRIMITIVES, &vmw_cmd_draw),
  940. VMW_CMD_DEF(SVGA_3D_CMD_SETSCISSORRECT, &vmw_cmd_cid_check),
  941. VMW_CMD_DEF(SVGA_3D_CMD_BEGIN_QUERY, &vmw_cmd_begin_query),
  942. VMW_CMD_DEF(SVGA_3D_CMD_END_QUERY, &vmw_cmd_end_query),
  943. VMW_CMD_DEF(SVGA_3D_CMD_WAIT_FOR_QUERY, &vmw_cmd_wait_query),
  944. VMW_CMD_DEF(SVGA_3D_CMD_PRESENT_READBACK, &vmw_cmd_ok),
  945. VMW_CMD_DEF(SVGA_3D_CMD_BLIT_SURFACE_TO_SCREEN,
  946. &vmw_cmd_blt_surf_screen_check),
  947. VMW_CMD_DEF(SVGA_3D_CMD_SURFACE_DEFINE_V2, &vmw_cmd_invalid),
  948. VMW_CMD_DEF(SVGA_3D_CMD_GENERATE_MIPMAPS, &vmw_cmd_invalid),
  949. VMW_CMD_DEF(SVGA_3D_CMD_ACTIVATE_SURFACE, &vmw_cmd_invalid),
  950. VMW_CMD_DEF(SVGA_3D_CMD_DEACTIVATE_SURFACE, &vmw_cmd_invalid),
  951. };
  952. static int vmw_cmd_check(struct vmw_private *dev_priv,
  953. struct vmw_sw_context *sw_context,
  954. void *buf, uint32_t *size)
  955. {
  956. uint32_t cmd_id;
  957. uint32_t size_remaining = *size;
  958. SVGA3dCmdHeader *header = (SVGA3dCmdHeader *) buf;
  959. int ret;
  960. cmd_id = le32_to_cpu(((uint32_t *)buf)[0]);
  961. /* Handle any none 3D commands */
  962. if (unlikely(cmd_id < SVGA_CMD_MAX))
  963. return vmw_cmd_check_not_3d(dev_priv, sw_context, buf, size);
  964. cmd_id = le32_to_cpu(header->id);
  965. *size = le32_to_cpu(header->size) + sizeof(SVGA3dCmdHeader);
  966. cmd_id -= SVGA_3D_CMD_BASE;
  967. if (unlikely(*size > size_remaining))
  968. goto out_err;
  969. if (unlikely(cmd_id >= SVGA_3D_CMD_MAX - SVGA_3D_CMD_BASE))
  970. goto out_err;
  971. ret = vmw_cmd_funcs[cmd_id](dev_priv, sw_context, header);
  972. if (unlikely(ret != 0))
  973. goto out_err;
  974. return 0;
  975. out_err:
  976. DRM_ERROR("Illegal / Invalid SVGA3D command: %d\n",
  977. cmd_id + SVGA_3D_CMD_BASE);
  978. return -EINVAL;
  979. }
  980. static int vmw_cmd_check_all(struct vmw_private *dev_priv,
  981. struct vmw_sw_context *sw_context,
  982. void *buf,
  983. uint32_t size)
  984. {
  985. int32_t cur_size = size;
  986. int ret;
  987. sw_context->buf_start = buf;
  988. while (cur_size > 0) {
  989. size = cur_size;
  990. ret = vmw_cmd_check(dev_priv, sw_context, buf, &size);
  991. if (unlikely(ret != 0))
  992. return ret;
  993. buf = (void *)((unsigned long) buf + size);
  994. cur_size -= size;
  995. }
  996. if (unlikely(cur_size != 0)) {
  997. DRM_ERROR("Command verifier out of sync.\n");
  998. return -EINVAL;
  999. }
  1000. return 0;
  1001. }
  1002. static void vmw_free_relocations(struct vmw_sw_context *sw_context)
  1003. {
  1004. sw_context->cur_reloc = 0;
  1005. }
  1006. static void vmw_apply_relocations(struct vmw_sw_context *sw_context)
  1007. {
  1008. uint32_t i;
  1009. struct vmw_relocation *reloc;
  1010. struct ttm_validate_buffer *validate;
  1011. struct ttm_buffer_object *bo;
  1012. for (i = 0; i < sw_context->cur_reloc; ++i) {
  1013. reloc = &sw_context->relocs[i];
  1014. validate = &sw_context->val_bufs[reloc->index].base;
  1015. bo = validate->bo;
  1016. switch (bo->mem.mem_type) {
  1017. case TTM_PL_VRAM:
  1018. reloc->location->offset += bo->offset;
  1019. reloc->location->gmrId = SVGA_GMR_FRAMEBUFFER;
  1020. break;
  1021. case VMW_PL_GMR:
  1022. reloc->location->gmrId = bo->mem.start;
  1023. break;
  1024. default:
  1025. BUG();
  1026. }
  1027. }
  1028. vmw_free_relocations(sw_context);
  1029. }
  1030. /**
  1031. * vmw_resource_list_unrefererence - Free up a resource list and unreference
  1032. * all resources referenced by it.
  1033. *
  1034. * @list: The resource list.
  1035. */
  1036. static void vmw_resource_list_unreference(struct list_head *list)
  1037. {
  1038. struct vmw_resource_val_node *val, *val_next;
  1039. /*
  1040. * Drop references to resources held during command submission.
  1041. */
  1042. list_for_each_entry_safe(val, val_next, list, head) {
  1043. list_del_init(&val->head);
  1044. vmw_resource_unreference(&val->res);
  1045. kfree(val);
  1046. }
  1047. }
  1048. static void vmw_clear_validations(struct vmw_sw_context *sw_context)
  1049. {
  1050. struct vmw_validate_buffer *entry, *next;
  1051. struct vmw_resource_val_node *val;
  1052. /*
  1053. * Drop references to DMA buffers held during command submission.
  1054. */
  1055. list_for_each_entry_safe(entry, next, &sw_context->validate_nodes,
  1056. base.head) {
  1057. list_del(&entry->base.head);
  1058. ttm_bo_unref(&entry->base.bo);
  1059. (void) drm_ht_remove_item(&sw_context->res_ht, &entry->hash);
  1060. sw_context->cur_val_buf--;
  1061. }
  1062. BUG_ON(sw_context->cur_val_buf != 0);
  1063. list_for_each_entry(val, &sw_context->resource_list, head)
  1064. (void) drm_ht_remove_item(&sw_context->res_ht, &val->hash);
  1065. }
  1066. static int vmw_validate_single_buffer(struct vmw_private *dev_priv,
  1067. struct ttm_buffer_object *bo,
  1068. bool validate_as_mob)
  1069. {
  1070. int ret;
  1071. /*
  1072. * Don't validate pinned buffers.
  1073. */
  1074. if (bo == dev_priv->pinned_bo ||
  1075. (bo == dev_priv->dummy_query_bo &&
  1076. dev_priv->dummy_query_bo_pinned))
  1077. return 0;
  1078. if (validate_as_mob)
  1079. return ttm_bo_validate(bo, &vmw_mob_placement, true, false);
  1080. /**
  1081. * Put BO in VRAM if there is space, otherwise as a GMR.
  1082. * If there is no space in VRAM and GMR ids are all used up,
  1083. * start evicting GMRs to make room. If the DMA buffer can't be
  1084. * used as a GMR, this will return -ENOMEM.
  1085. */
  1086. ret = ttm_bo_validate(bo, &vmw_vram_gmr_placement, true, false);
  1087. if (likely(ret == 0 || ret == -ERESTARTSYS))
  1088. return ret;
  1089. /**
  1090. * If that failed, try VRAM again, this time evicting
  1091. * previous contents.
  1092. */
  1093. DRM_INFO("Falling through to VRAM.\n");
  1094. ret = ttm_bo_validate(bo, &vmw_vram_placement, true, false);
  1095. return ret;
  1096. }
  1097. static int vmw_validate_buffers(struct vmw_private *dev_priv,
  1098. struct vmw_sw_context *sw_context)
  1099. {
  1100. struct vmw_validate_buffer *entry;
  1101. int ret;
  1102. list_for_each_entry(entry, &sw_context->validate_nodes, base.head) {
  1103. ret = vmw_validate_single_buffer(dev_priv, entry->base.bo,
  1104. entry->validate_as_mob);
  1105. if (unlikely(ret != 0))
  1106. return ret;
  1107. }
  1108. return 0;
  1109. }
  1110. static int vmw_resize_cmd_bounce(struct vmw_sw_context *sw_context,
  1111. uint32_t size)
  1112. {
  1113. if (likely(sw_context->cmd_bounce_size >= size))
  1114. return 0;
  1115. if (sw_context->cmd_bounce_size == 0)
  1116. sw_context->cmd_bounce_size = VMWGFX_CMD_BOUNCE_INIT_SIZE;
  1117. while (sw_context->cmd_bounce_size < size) {
  1118. sw_context->cmd_bounce_size =
  1119. PAGE_ALIGN(sw_context->cmd_bounce_size +
  1120. (sw_context->cmd_bounce_size >> 1));
  1121. }
  1122. if (sw_context->cmd_bounce != NULL)
  1123. vfree(sw_context->cmd_bounce);
  1124. sw_context->cmd_bounce = vmalloc(sw_context->cmd_bounce_size);
  1125. if (sw_context->cmd_bounce == NULL) {
  1126. DRM_ERROR("Failed to allocate command bounce buffer.\n");
  1127. sw_context->cmd_bounce_size = 0;
  1128. return -ENOMEM;
  1129. }
  1130. return 0;
  1131. }
  1132. /**
  1133. * vmw_execbuf_fence_commands - create and submit a command stream fence
  1134. *
  1135. * Creates a fence object and submits a command stream marker.
  1136. * If this fails for some reason, We sync the fifo and return NULL.
  1137. * It is then safe to fence buffers with a NULL pointer.
  1138. *
  1139. * If @p_handle is not NULL @file_priv must also not be NULL. Creates
  1140. * a userspace handle if @p_handle is not NULL, otherwise not.
  1141. */
  1142. int vmw_execbuf_fence_commands(struct drm_file *file_priv,
  1143. struct vmw_private *dev_priv,
  1144. struct vmw_fence_obj **p_fence,
  1145. uint32_t *p_handle)
  1146. {
  1147. uint32_t sequence;
  1148. int ret;
  1149. bool synced = false;
  1150. /* p_handle implies file_priv. */
  1151. BUG_ON(p_handle != NULL && file_priv == NULL);
  1152. ret = vmw_fifo_send_fence(dev_priv, &sequence);
  1153. if (unlikely(ret != 0)) {
  1154. DRM_ERROR("Fence submission error. Syncing.\n");
  1155. synced = true;
  1156. }
  1157. if (p_handle != NULL)
  1158. ret = vmw_user_fence_create(file_priv, dev_priv->fman,
  1159. sequence,
  1160. DRM_VMW_FENCE_FLAG_EXEC,
  1161. p_fence, p_handle);
  1162. else
  1163. ret = vmw_fence_create(dev_priv->fman, sequence,
  1164. DRM_VMW_FENCE_FLAG_EXEC,
  1165. p_fence);
  1166. if (unlikely(ret != 0 && !synced)) {
  1167. (void) vmw_fallback_wait(dev_priv, false, false,
  1168. sequence, false,
  1169. VMW_FENCE_WAIT_TIMEOUT);
  1170. *p_fence = NULL;
  1171. }
  1172. return 0;
  1173. }
  1174. /**
  1175. * vmw_execbuf_copy_fence_user - copy fence object information to
  1176. * user-space.
  1177. *
  1178. * @dev_priv: Pointer to a vmw_private struct.
  1179. * @vmw_fp: Pointer to the struct vmw_fpriv representing the calling file.
  1180. * @ret: Return value from fence object creation.
  1181. * @user_fence_rep: User space address of a struct drm_vmw_fence_rep to
  1182. * which the information should be copied.
  1183. * @fence: Pointer to the fenc object.
  1184. * @fence_handle: User-space fence handle.
  1185. *
  1186. * This function copies fence information to user-space. If copying fails,
  1187. * The user-space struct drm_vmw_fence_rep::error member is hopefully
  1188. * left untouched, and if it's preloaded with an -EFAULT by user-space,
  1189. * the error will hopefully be detected.
  1190. * Also if copying fails, user-space will be unable to signal the fence
  1191. * object so we wait for it immediately, and then unreference the
  1192. * user-space reference.
  1193. */
  1194. void
  1195. vmw_execbuf_copy_fence_user(struct vmw_private *dev_priv,
  1196. struct vmw_fpriv *vmw_fp,
  1197. int ret,
  1198. struct drm_vmw_fence_rep __user *user_fence_rep,
  1199. struct vmw_fence_obj *fence,
  1200. uint32_t fence_handle)
  1201. {
  1202. struct drm_vmw_fence_rep fence_rep;
  1203. if (user_fence_rep == NULL)
  1204. return;
  1205. memset(&fence_rep, 0, sizeof(fence_rep));
  1206. fence_rep.error = ret;
  1207. if (ret == 0) {
  1208. BUG_ON(fence == NULL);
  1209. fence_rep.handle = fence_handle;
  1210. fence_rep.seqno = fence->seqno;
  1211. vmw_update_seqno(dev_priv, &dev_priv->fifo);
  1212. fence_rep.passed_seqno = dev_priv->last_read_seqno;
  1213. }
  1214. /*
  1215. * copy_to_user errors will be detected by user space not
  1216. * seeing fence_rep::error filled in. Typically
  1217. * user-space would have pre-set that member to -EFAULT.
  1218. */
  1219. ret = copy_to_user(user_fence_rep, &fence_rep,
  1220. sizeof(fence_rep));
  1221. /*
  1222. * User-space lost the fence object. We need to sync
  1223. * and unreference the handle.
  1224. */
  1225. if (unlikely(ret != 0) && (fence_rep.error == 0)) {
  1226. ttm_ref_object_base_unref(vmw_fp->tfile,
  1227. fence_handle, TTM_REF_USAGE);
  1228. DRM_ERROR("Fence copy error. Syncing.\n");
  1229. (void) vmw_fence_obj_wait(fence, fence->signal_mask,
  1230. false, false,
  1231. VMW_FENCE_WAIT_TIMEOUT);
  1232. }
  1233. }
  1234. int vmw_execbuf_process(struct drm_file *file_priv,
  1235. struct vmw_private *dev_priv,
  1236. void __user *user_commands,
  1237. void *kernel_commands,
  1238. uint32_t command_size,
  1239. uint64_t throttle_us,
  1240. struct drm_vmw_fence_rep __user *user_fence_rep,
  1241. struct vmw_fence_obj **out_fence)
  1242. {
  1243. struct vmw_sw_context *sw_context = &dev_priv->ctx;
  1244. struct vmw_fence_obj *fence = NULL;
  1245. struct vmw_resource *error_resource;
  1246. struct list_head resource_list;
  1247. struct ww_acquire_ctx ticket;
  1248. uint32_t handle;
  1249. void *cmd;
  1250. int ret;
  1251. ret = mutex_lock_interruptible(&dev_priv->cmdbuf_mutex);
  1252. if (unlikely(ret != 0))
  1253. return -ERESTARTSYS;
  1254. if (kernel_commands == NULL) {
  1255. sw_context->kernel = false;
  1256. ret = vmw_resize_cmd_bounce(sw_context, command_size);
  1257. if (unlikely(ret != 0))
  1258. goto out_unlock;
  1259. ret = copy_from_user(sw_context->cmd_bounce,
  1260. user_commands, command_size);
  1261. if (unlikely(ret != 0)) {
  1262. ret = -EFAULT;
  1263. DRM_ERROR("Failed copying commands.\n");
  1264. goto out_unlock;
  1265. }
  1266. kernel_commands = sw_context->cmd_bounce;
  1267. } else
  1268. sw_context->kernel = true;
  1269. sw_context->tfile = vmw_fpriv(file_priv)->tfile;
  1270. sw_context->cur_reloc = 0;
  1271. sw_context->cur_val_buf = 0;
  1272. sw_context->fence_flags = 0;
  1273. INIT_LIST_HEAD(&sw_context->resource_list);
  1274. sw_context->cur_query_bo = dev_priv->pinned_bo;
  1275. sw_context->last_query_ctx = NULL;
  1276. sw_context->needs_post_query_barrier = false;
  1277. memset(sw_context->res_cache, 0, sizeof(sw_context->res_cache));
  1278. INIT_LIST_HEAD(&sw_context->validate_nodes);
  1279. INIT_LIST_HEAD(&sw_context->res_relocations);
  1280. if (!sw_context->res_ht_initialized) {
  1281. ret = drm_ht_create(&sw_context->res_ht, VMW_RES_HT_ORDER);
  1282. if (unlikely(ret != 0))
  1283. goto out_unlock;
  1284. sw_context->res_ht_initialized = true;
  1285. }
  1286. INIT_LIST_HEAD(&resource_list);
  1287. ret = vmw_cmd_check_all(dev_priv, sw_context, kernel_commands,
  1288. command_size);
  1289. if (unlikely(ret != 0))
  1290. goto out_err;
  1291. ret = vmw_resources_reserve(sw_context);
  1292. if (unlikely(ret != 0))
  1293. goto out_err;
  1294. ret = ttm_eu_reserve_buffers(&ticket, &sw_context->validate_nodes);
  1295. if (unlikely(ret != 0))
  1296. goto out_err;
  1297. ret = vmw_validate_buffers(dev_priv, sw_context);
  1298. if (unlikely(ret != 0))
  1299. goto out_err;
  1300. ret = vmw_resources_validate(sw_context);
  1301. if (unlikely(ret != 0))
  1302. goto out_err;
  1303. if (throttle_us) {
  1304. ret = vmw_wait_lag(dev_priv, &dev_priv->fifo.marker_queue,
  1305. throttle_us);
  1306. if (unlikely(ret != 0))
  1307. goto out_err;
  1308. }
  1309. cmd = vmw_fifo_reserve(dev_priv, command_size);
  1310. if (unlikely(cmd == NULL)) {
  1311. DRM_ERROR("Failed reserving fifo space for commands.\n");
  1312. ret = -ENOMEM;
  1313. goto out_err;
  1314. }
  1315. vmw_apply_relocations(sw_context);
  1316. memcpy(cmd, kernel_commands, command_size);
  1317. vmw_resource_relocations_apply(cmd, &sw_context->res_relocations);
  1318. vmw_resource_relocations_free(&sw_context->res_relocations);
  1319. vmw_fifo_commit(dev_priv, command_size);
  1320. vmw_query_bo_switch_commit(dev_priv, sw_context);
  1321. ret = vmw_execbuf_fence_commands(file_priv, dev_priv,
  1322. &fence,
  1323. (user_fence_rep) ? &handle : NULL);
  1324. /*
  1325. * This error is harmless, because if fence submission fails,
  1326. * vmw_fifo_send_fence will sync. The error will be propagated to
  1327. * user-space in @fence_rep
  1328. */
  1329. if (ret != 0)
  1330. DRM_ERROR("Fence submission error. Syncing.\n");
  1331. vmw_resource_list_unreserve(&sw_context->resource_list, false);
  1332. ttm_eu_fence_buffer_objects(&ticket, &sw_context->validate_nodes,
  1333. (void *) fence);
  1334. if (unlikely(dev_priv->pinned_bo != NULL &&
  1335. !dev_priv->query_cid_valid))
  1336. __vmw_execbuf_release_pinned_bo(dev_priv, fence);
  1337. vmw_clear_validations(sw_context);
  1338. vmw_execbuf_copy_fence_user(dev_priv, vmw_fpriv(file_priv), ret,
  1339. user_fence_rep, fence, handle);
  1340. /* Don't unreference when handing fence out */
  1341. if (unlikely(out_fence != NULL)) {
  1342. *out_fence = fence;
  1343. fence = NULL;
  1344. } else if (likely(fence != NULL)) {
  1345. vmw_fence_obj_unreference(&fence);
  1346. }
  1347. list_splice_init(&sw_context->resource_list, &resource_list);
  1348. mutex_unlock(&dev_priv->cmdbuf_mutex);
  1349. /*
  1350. * Unreference resources outside of the cmdbuf_mutex to
  1351. * avoid deadlocks in resource destruction paths.
  1352. */
  1353. vmw_resource_list_unreference(&resource_list);
  1354. return 0;
  1355. out_err:
  1356. vmw_resource_relocations_free(&sw_context->res_relocations);
  1357. vmw_free_relocations(sw_context);
  1358. ttm_eu_backoff_reservation(&ticket, &sw_context->validate_nodes);
  1359. vmw_resource_list_unreserve(&sw_context->resource_list, true);
  1360. vmw_clear_validations(sw_context);
  1361. if (unlikely(dev_priv->pinned_bo != NULL &&
  1362. !dev_priv->query_cid_valid))
  1363. __vmw_execbuf_release_pinned_bo(dev_priv, NULL);
  1364. out_unlock:
  1365. list_splice_init(&sw_context->resource_list, &resource_list);
  1366. error_resource = sw_context->error_resource;
  1367. sw_context->error_resource = NULL;
  1368. mutex_unlock(&dev_priv->cmdbuf_mutex);
  1369. /*
  1370. * Unreference resources outside of the cmdbuf_mutex to
  1371. * avoid deadlocks in resource destruction paths.
  1372. */
  1373. vmw_resource_list_unreference(&resource_list);
  1374. if (unlikely(error_resource != NULL))
  1375. vmw_resource_unreference(&error_resource);
  1376. return ret;
  1377. }
  1378. /**
  1379. * vmw_execbuf_unpin_panic - Idle the fifo and unpin the query buffer.
  1380. *
  1381. * @dev_priv: The device private structure.
  1382. *
  1383. * This function is called to idle the fifo and unpin the query buffer
  1384. * if the normal way to do this hits an error, which should typically be
  1385. * extremely rare.
  1386. */
  1387. static void vmw_execbuf_unpin_panic(struct vmw_private *dev_priv)
  1388. {
  1389. DRM_ERROR("Can't unpin query buffer. Trying to recover.\n");
  1390. (void) vmw_fallback_wait(dev_priv, false, true, 0, false, 10*HZ);
  1391. vmw_bo_pin(dev_priv->pinned_bo, false);
  1392. vmw_bo_pin(dev_priv->dummy_query_bo, false);
  1393. dev_priv->dummy_query_bo_pinned = false;
  1394. }
  1395. /**
  1396. * __vmw_execbuf_release_pinned_bo - Flush queries and unpin the pinned
  1397. * query bo.
  1398. *
  1399. * @dev_priv: The device private structure.
  1400. * @fence: If non-NULL should point to a struct vmw_fence_obj issued
  1401. * _after_ a query barrier that flushes all queries touching the current
  1402. * buffer pointed to by @dev_priv->pinned_bo
  1403. *
  1404. * This function should be used to unpin the pinned query bo, or
  1405. * as a query barrier when we need to make sure that all queries have
  1406. * finished before the next fifo command. (For example on hardware
  1407. * context destructions where the hardware may otherwise leak unfinished
  1408. * queries).
  1409. *
  1410. * This function does not return any failure codes, but make attempts
  1411. * to do safe unpinning in case of errors.
  1412. *
  1413. * The function will synchronize on the previous query barrier, and will
  1414. * thus not finish until that barrier has executed.
  1415. *
  1416. * the @dev_priv->cmdbuf_mutex needs to be held by the current thread
  1417. * before calling this function.
  1418. */
  1419. void __vmw_execbuf_release_pinned_bo(struct vmw_private *dev_priv,
  1420. struct vmw_fence_obj *fence)
  1421. {
  1422. int ret = 0;
  1423. struct list_head validate_list;
  1424. struct ttm_validate_buffer pinned_val, query_val;
  1425. struct vmw_fence_obj *lfence = NULL;
  1426. struct ww_acquire_ctx ticket;
  1427. if (dev_priv->pinned_bo == NULL)
  1428. goto out_unlock;
  1429. INIT_LIST_HEAD(&validate_list);
  1430. pinned_val.bo = ttm_bo_reference(dev_priv->pinned_bo);
  1431. list_add_tail(&pinned_val.head, &validate_list);
  1432. query_val.bo = ttm_bo_reference(dev_priv->dummy_query_bo);
  1433. list_add_tail(&query_val.head, &validate_list);
  1434. do {
  1435. ret = ttm_eu_reserve_buffers(&ticket, &validate_list);
  1436. } while (ret == -ERESTARTSYS);
  1437. if (unlikely(ret != 0)) {
  1438. vmw_execbuf_unpin_panic(dev_priv);
  1439. goto out_no_reserve;
  1440. }
  1441. if (dev_priv->query_cid_valid) {
  1442. BUG_ON(fence != NULL);
  1443. ret = vmw_fifo_emit_dummy_query(dev_priv, dev_priv->query_cid);
  1444. if (unlikely(ret != 0)) {
  1445. vmw_execbuf_unpin_panic(dev_priv);
  1446. goto out_no_emit;
  1447. }
  1448. dev_priv->query_cid_valid = false;
  1449. }
  1450. vmw_bo_pin(dev_priv->pinned_bo, false);
  1451. vmw_bo_pin(dev_priv->dummy_query_bo, false);
  1452. dev_priv->dummy_query_bo_pinned = false;
  1453. if (fence == NULL) {
  1454. (void) vmw_execbuf_fence_commands(NULL, dev_priv, &lfence,
  1455. NULL);
  1456. fence = lfence;
  1457. }
  1458. ttm_eu_fence_buffer_objects(&ticket, &validate_list, (void *) fence);
  1459. if (lfence != NULL)
  1460. vmw_fence_obj_unreference(&lfence);
  1461. ttm_bo_unref(&query_val.bo);
  1462. ttm_bo_unref(&pinned_val.bo);
  1463. ttm_bo_unref(&dev_priv->pinned_bo);
  1464. out_unlock:
  1465. return;
  1466. out_no_emit:
  1467. ttm_eu_backoff_reservation(&ticket, &validate_list);
  1468. out_no_reserve:
  1469. ttm_bo_unref(&query_val.bo);
  1470. ttm_bo_unref(&pinned_val.bo);
  1471. ttm_bo_unref(&dev_priv->pinned_bo);
  1472. }
  1473. /**
  1474. * vmw_execbuf_release_pinned_bo - Flush queries and unpin the pinned
  1475. * query bo.
  1476. *
  1477. * @dev_priv: The device private structure.
  1478. *
  1479. * This function should be used to unpin the pinned query bo, or
  1480. * as a query barrier when we need to make sure that all queries have
  1481. * finished before the next fifo command. (For example on hardware
  1482. * context destructions where the hardware may otherwise leak unfinished
  1483. * queries).
  1484. *
  1485. * This function does not return any failure codes, but make attempts
  1486. * to do safe unpinning in case of errors.
  1487. *
  1488. * The function will synchronize on the previous query barrier, and will
  1489. * thus not finish until that barrier has executed.
  1490. */
  1491. void vmw_execbuf_release_pinned_bo(struct vmw_private *dev_priv)
  1492. {
  1493. mutex_lock(&dev_priv->cmdbuf_mutex);
  1494. if (dev_priv->query_cid_valid)
  1495. __vmw_execbuf_release_pinned_bo(dev_priv, NULL);
  1496. mutex_unlock(&dev_priv->cmdbuf_mutex);
  1497. }
  1498. int vmw_execbuf_ioctl(struct drm_device *dev, void *data,
  1499. struct drm_file *file_priv)
  1500. {
  1501. struct vmw_private *dev_priv = vmw_priv(dev);
  1502. struct drm_vmw_execbuf_arg *arg = (struct drm_vmw_execbuf_arg *)data;
  1503. struct vmw_master *vmaster = vmw_master(file_priv->master);
  1504. int ret;
  1505. /*
  1506. * This will allow us to extend the ioctl argument while
  1507. * maintaining backwards compatibility:
  1508. * We take different code paths depending on the value of
  1509. * arg->version.
  1510. */
  1511. if (unlikely(arg->version != DRM_VMW_EXECBUF_VERSION)) {
  1512. DRM_ERROR("Incorrect execbuf version.\n");
  1513. DRM_ERROR("You're running outdated experimental "
  1514. "vmwgfx user-space drivers.");
  1515. return -EINVAL;
  1516. }
  1517. ret = ttm_read_lock(&vmaster->lock, true);
  1518. if (unlikely(ret != 0))
  1519. return ret;
  1520. ret = vmw_execbuf_process(file_priv, dev_priv,
  1521. (void __user *)(unsigned long)arg->commands,
  1522. NULL, arg->command_size, arg->throttle_us,
  1523. (void __user *)(unsigned long)arg->fence_rep,
  1524. NULL);
  1525. if (unlikely(ret != 0))
  1526. goto out_unlock;
  1527. vmw_kms_cursor_post_execbuf(dev_priv);
  1528. out_unlock:
  1529. ttm_read_unlock(&vmaster->lock);
  1530. return ret;
  1531. }