intel_pstate.c 22 KB

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  1. /*
  2. * intel_pstate.c: Native P state management for Intel processors
  3. *
  4. * (C) Copyright 2012 Intel Corporation
  5. * Author: Dirk Brandewie <dirk.j.brandewie@intel.com>
  6. *
  7. * This program is free software; you can redistribute it and/or
  8. * modify it under the terms of the GNU General Public License
  9. * as published by the Free Software Foundation; version 2
  10. * of the License.
  11. */
  12. #include <linux/kernel.h>
  13. #include <linux/kernel_stat.h>
  14. #include <linux/module.h>
  15. #include <linux/ktime.h>
  16. #include <linux/hrtimer.h>
  17. #include <linux/tick.h>
  18. #include <linux/slab.h>
  19. #include <linux/sched.h>
  20. #include <linux/list.h>
  21. #include <linux/cpu.h>
  22. #include <linux/cpufreq.h>
  23. #include <linux/sysfs.h>
  24. #include <linux/types.h>
  25. #include <linux/fs.h>
  26. #include <linux/debugfs.h>
  27. #include <linux/acpi.h>
  28. #include <trace/events/power.h>
  29. #include <asm/div64.h>
  30. #include <asm/msr.h>
  31. #include <asm/cpu_device_id.h>
  32. #define BYT_RATIOS 0x66a
  33. #define BYT_VIDS 0x66b
  34. #define BYT_TURBO_RATIOS 0x66c
  35. #define FRAC_BITS 6
  36. #define int_tofp(X) ((int64_t)(X) << FRAC_BITS)
  37. #define fp_toint(X) ((X) >> FRAC_BITS)
  38. #define FP_ROUNDUP(X) ((X) += 1 << FRAC_BITS)
  39. static inline int32_t mul_fp(int32_t x, int32_t y)
  40. {
  41. return ((int64_t)x * (int64_t)y) >> FRAC_BITS;
  42. }
  43. static inline int32_t div_fp(int32_t x, int32_t y)
  44. {
  45. return div_s64((int64_t)x << FRAC_BITS, (int64_t)y);
  46. }
  47. struct sample {
  48. int32_t core_pct_busy;
  49. u64 aperf;
  50. u64 mperf;
  51. unsigned long long tsc;
  52. int freq;
  53. };
  54. struct pstate_data {
  55. int current_pstate;
  56. int min_pstate;
  57. int max_pstate;
  58. int turbo_pstate;
  59. };
  60. struct vid_data {
  61. int32_t min;
  62. int32_t max;
  63. int32_t ratio;
  64. };
  65. struct _pid {
  66. int setpoint;
  67. int32_t integral;
  68. int32_t p_gain;
  69. int32_t i_gain;
  70. int32_t d_gain;
  71. int deadband;
  72. int32_t last_err;
  73. };
  74. struct cpudata {
  75. int cpu;
  76. struct timer_list timer;
  77. struct pstate_data pstate;
  78. struct vid_data vid;
  79. struct _pid pid;
  80. u64 prev_aperf;
  81. u64 prev_mperf;
  82. unsigned long long prev_tsc;
  83. struct sample sample;
  84. };
  85. static struct cpudata **all_cpu_data;
  86. struct pstate_adjust_policy {
  87. int sample_rate_ms;
  88. int deadband;
  89. int setpoint;
  90. int p_gain_pct;
  91. int d_gain_pct;
  92. int i_gain_pct;
  93. };
  94. struct pstate_funcs {
  95. int (*get_max)(void);
  96. int (*get_min)(void);
  97. int (*get_turbo)(void);
  98. void (*set)(struct cpudata*, int pstate);
  99. void (*get_vid)(struct cpudata *);
  100. };
  101. struct cpu_defaults {
  102. struct pstate_adjust_policy pid_policy;
  103. struct pstate_funcs funcs;
  104. };
  105. static struct pstate_adjust_policy pid_params;
  106. static struct pstate_funcs pstate_funcs;
  107. struct perf_limits {
  108. int no_turbo;
  109. int max_perf_pct;
  110. int min_perf_pct;
  111. int32_t max_perf;
  112. int32_t min_perf;
  113. int max_policy_pct;
  114. int max_sysfs_pct;
  115. };
  116. static struct perf_limits limits = {
  117. .no_turbo = 0,
  118. .max_perf_pct = 100,
  119. .max_perf = int_tofp(1),
  120. .min_perf_pct = 0,
  121. .min_perf = 0,
  122. .max_policy_pct = 100,
  123. .max_sysfs_pct = 100,
  124. };
  125. static inline void pid_reset(struct _pid *pid, int setpoint, int busy,
  126. int deadband, int integral) {
  127. pid->setpoint = setpoint;
  128. pid->deadband = deadband;
  129. pid->integral = int_tofp(integral);
  130. pid->last_err = int_tofp(setpoint) - int_tofp(busy);
  131. }
  132. static inline void pid_p_gain_set(struct _pid *pid, int percent)
  133. {
  134. pid->p_gain = div_fp(int_tofp(percent), int_tofp(100));
  135. }
  136. static inline void pid_i_gain_set(struct _pid *pid, int percent)
  137. {
  138. pid->i_gain = div_fp(int_tofp(percent), int_tofp(100));
  139. }
  140. static inline void pid_d_gain_set(struct _pid *pid, int percent)
  141. {
  142. pid->d_gain = div_fp(int_tofp(percent), int_tofp(100));
  143. }
  144. static signed int pid_calc(struct _pid *pid, int32_t busy)
  145. {
  146. signed int result;
  147. int32_t pterm, dterm, fp_error;
  148. int32_t integral_limit;
  149. fp_error = int_tofp(pid->setpoint) - busy;
  150. if (abs(fp_error) <= int_tofp(pid->deadband))
  151. return 0;
  152. pterm = mul_fp(pid->p_gain, fp_error);
  153. pid->integral += fp_error;
  154. /* limit the integral term */
  155. integral_limit = int_tofp(30);
  156. if (pid->integral > integral_limit)
  157. pid->integral = integral_limit;
  158. if (pid->integral < -integral_limit)
  159. pid->integral = -integral_limit;
  160. dterm = mul_fp(pid->d_gain, fp_error - pid->last_err);
  161. pid->last_err = fp_error;
  162. result = pterm + mul_fp(pid->integral, pid->i_gain) + dterm;
  163. return (signed int)fp_toint(result);
  164. }
  165. static inline void intel_pstate_busy_pid_reset(struct cpudata *cpu)
  166. {
  167. pid_p_gain_set(&cpu->pid, pid_params.p_gain_pct);
  168. pid_d_gain_set(&cpu->pid, pid_params.d_gain_pct);
  169. pid_i_gain_set(&cpu->pid, pid_params.i_gain_pct);
  170. pid_reset(&cpu->pid,
  171. pid_params.setpoint,
  172. 100,
  173. pid_params.deadband,
  174. 0);
  175. }
  176. static inline void intel_pstate_reset_all_pid(void)
  177. {
  178. unsigned int cpu;
  179. for_each_online_cpu(cpu) {
  180. if (all_cpu_data[cpu])
  181. intel_pstate_busy_pid_reset(all_cpu_data[cpu]);
  182. }
  183. }
  184. /************************** debugfs begin ************************/
  185. static int pid_param_set(void *data, u64 val)
  186. {
  187. *(u32 *)data = val;
  188. intel_pstate_reset_all_pid();
  189. return 0;
  190. }
  191. static int pid_param_get(void *data, u64 *val)
  192. {
  193. *val = *(u32 *)data;
  194. return 0;
  195. }
  196. DEFINE_SIMPLE_ATTRIBUTE(fops_pid_param, pid_param_get,
  197. pid_param_set, "%llu\n");
  198. struct pid_param {
  199. char *name;
  200. void *value;
  201. };
  202. static struct pid_param pid_files[] = {
  203. {"sample_rate_ms", &pid_params.sample_rate_ms},
  204. {"d_gain_pct", &pid_params.d_gain_pct},
  205. {"i_gain_pct", &pid_params.i_gain_pct},
  206. {"deadband", &pid_params.deadband},
  207. {"setpoint", &pid_params.setpoint},
  208. {"p_gain_pct", &pid_params.p_gain_pct},
  209. {NULL, NULL}
  210. };
  211. static struct dentry *debugfs_parent;
  212. static void intel_pstate_debug_expose_params(void)
  213. {
  214. int i = 0;
  215. debugfs_parent = debugfs_create_dir("pstate_snb", NULL);
  216. if (IS_ERR_OR_NULL(debugfs_parent))
  217. return;
  218. while (pid_files[i].name) {
  219. debugfs_create_file(pid_files[i].name, 0660,
  220. debugfs_parent, pid_files[i].value,
  221. &fops_pid_param);
  222. i++;
  223. }
  224. }
  225. /************************** debugfs end ************************/
  226. /************************** sysfs begin ************************/
  227. #define show_one(file_name, object) \
  228. static ssize_t show_##file_name \
  229. (struct kobject *kobj, struct attribute *attr, char *buf) \
  230. { \
  231. return sprintf(buf, "%u\n", limits.object); \
  232. }
  233. static ssize_t store_no_turbo(struct kobject *a, struct attribute *b,
  234. const char *buf, size_t count)
  235. {
  236. unsigned int input;
  237. int ret;
  238. ret = sscanf(buf, "%u", &input);
  239. if (ret != 1)
  240. return -EINVAL;
  241. limits.no_turbo = clamp_t(int, input, 0 , 1);
  242. return count;
  243. }
  244. static ssize_t store_max_perf_pct(struct kobject *a, struct attribute *b,
  245. const char *buf, size_t count)
  246. {
  247. unsigned int input;
  248. int ret;
  249. ret = sscanf(buf, "%u", &input);
  250. if (ret != 1)
  251. return -EINVAL;
  252. limits.max_sysfs_pct = clamp_t(int, input, 0 , 100);
  253. limits.max_perf_pct = min(limits.max_policy_pct, limits.max_sysfs_pct);
  254. limits.max_perf = div_fp(int_tofp(limits.max_perf_pct), int_tofp(100));
  255. return count;
  256. }
  257. static ssize_t store_min_perf_pct(struct kobject *a, struct attribute *b,
  258. const char *buf, size_t count)
  259. {
  260. unsigned int input;
  261. int ret;
  262. ret = sscanf(buf, "%u", &input);
  263. if (ret != 1)
  264. return -EINVAL;
  265. limits.min_perf_pct = clamp_t(int, input, 0 , 100);
  266. limits.min_perf = div_fp(int_tofp(limits.min_perf_pct), int_tofp(100));
  267. return count;
  268. }
  269. show_one(no_turbo, no_turbo);
  270. show_one(max_perf_pct, max_perf_pct);
  271. show_one(min_perf_pct, min_perf_pct);
  272. define_one_global_rw(no_turbo);
  273. define_one_global_rw(max_perf_pct);
  274. define_one_global_rw(min_perf_pct);
  275. static struct attribute *intel_pstate_attributes[] = {
  276. &no_turbo.attr,
  277. &max_perf_pct.attr,
  278. &min_perf_pct.attr,
  279. NULL
  280. };
  281. static struct attribute_group intel_pstate_attr_group = {
  282. .attrs = intel_pstate_attributes,
  283. };
  284. static struct kobject *intel_pstate_kobject;
  285. static void intel_pstate_sysfs_expose_params(void)
  286. {
  287. int rc;
  288. intel_pstate_kobject = kobject_create_and_add("intel_pstate",
  289. &cpu_subsys.dev_root->kobj);
  290. BUG_ON(!intel_pstate_kobject);
  291. rc = sysfs_create_group(intel_pstate_kobject,
  292. &intel_pstate_attr_group);
  293. BUG_ON(rc);
  294. }
  295. /************************** sysfs end ************************/
  296. static int byt_get_min_pstate(void)
  297. {
  298. u64 value;
  299. rdmsrl(BYT_RATIOS, value);
  300. return (value >> 8) & 0xFF;
  301. }
  302. static int byt_get_max_pstate(void)
  303. {
  304. u64 value;
  305. rdmsrl(BYT_RATIOS, value);
  306. return (value >> 16) & 0xFF;
  307. }
  308. static int byt_get_turbo_pstate(void)
  309. {
  310. u64 value;
  311. rdmsrl(BYT_TURBO_RATIOS, value);
  312. return value & 0x3F;
  313. }
  314. static void byt_set_pstate(struct cpudata *cpudata, int pstate)
  315. {
  316. u64 val;
  317. int32_t vid_fp;
  318. u32 vid;
  319. val = pstate << 8;
  320. if (limits.no_turbo)
  321. val |= (u64)1 << 32;
  322. vid_fp = cpudata->vid.min + mul_fp(
  323. int_tofp(pstate - cpudata->pstate.min_pstate),
  324. cpudata->vid.ratio);
  325. vid_fp = clamp_t(int32_t, vid_fp, cpudata->vid.min, cpudata->vid.max);
  326. vid = fp_toint(vid_fp);
  327. val |= vid;
  328. wrmsrl(MSR_IA32_PERF_CTL, val);
  329. }
  330. static void byt_get_vid(struct cpudata *cpudata)
  331. {
  332. u64 value;
  333. rdmsrl(BYT_VIDS, value);
  334. cpudata->vid.min = int_tofp((value >> 8) & 0x7f);
  335. cpudata->vid.max = int_tofp((value >> 16) & 0x7f);
  336. cpudata->vid.ratio = div_fp(
  337. cpudata->vid.max - cpudata->vid.min,
  338. int_tofp(cpudata->pstate.max_pstate -
  339. cpudata->pstate.min_pstate));
  340. }
  341. static int core_get_min_pstate(void)
  342. {
  343. u64 value;
  344. rdmsrl(MSR_PLATFORM_INFO, value);
  345. return (value >> 40) & 0xFF;
  346. }
  347. static int core_get_max_pstate(void)
  348. {
  349. u64 value;
  350. rdmsrl(MSR_PLATFORM_INFO, value);
  351. return (value >> 8) & 0xFF;
  352. }
  353. static int core_get_turbo_pstate(void)
  354. {
  355. u64 value;
  356. int nont, ret;
  357. rdmsrl(MSR_NHM_TURBO_RATIO_LIMIT, value);
  358. nont = core_get_max_pstate();
  359. ret = ((value) & 255);
  360. if (ret <= nont)
  361. ret = nont;
  362. return ret;
  363. }
  364. static void core_set_pstate(struct cpudata *cpudata, int pstate)
  365. {
  366. u64 val;
  367. val = pstate << 8;
  368. if (limits.no_turbo)
  369. val |= (u64)1 << 32;
  370. wrmsrl_on_cpu(cpudata->cpu, MSR_IA32_PERF_CTL, val);
  371. }
  372. static struct cpu_defaults core_params = {
  373. .pid_policy = {
  374. .sample_rate_ms = 10,
  375. .deadband = 0,
  376. .setpoint = 97,
  377. .p_gain_pct = 20,
  378. .d_gain_pct = 0,
  379. .i_gain_pct = 0,
  380. },
  381. .funcs = {
  382. .get_max = core_get_max_pstate,
  383. .get_min = core_get_min_pstate,
  384. .get_turbo = core_get_turbo_pstate,
  385. .set = core_set_pstate,
  386. },
  387. };
  388. static struct cpu_defaults byt_params = {
  389. .pid_policy = {
  390. .sample_rate_ms = 10,
  391. .deadband = 0,
  392. .setpoint = 97,
  393. .p_gain_pct = 14,
  394. .d_gain_pct = 0,
  395. .i_gain_pct = 4,
  396. },
  397. .funcs = {
  398. .get_max = byt_get_max_pstate,
  399. .get_min = byt_get_min_pstate,
  400. .get_turbo = byt_get_turbo_pstate,
  401. .set = byt_set_pstate,
  402. .get_vid = byt_get_vid,
  403. },
  404. };
  405. static void intel_pstate_get_min_max(struct cpudata *cpu, int *min, int *max)
  406. {
  407. int max_perf = cpu->pstate.turbo_pstate;
  408. int max_perf_adj;
  409. int min_perf;
  410. if (limits.no_turbo)
  411. max_perf = cpu->pstate.max_pstate;
  412. max_perf_adj = fp_toint(mul_fp(int_tofp(max_perf), limits.max_perf));
  413. *max = clamp_t(int, max_perf_adj,
  414. cpu->pstate.min_pstate, cpu->pstate.turbo_pstate);
  415. min_perf = fp_toint(mul_fp(int_tofp(max_perf), limits.min_perf));
  416. *min = clamp_t(int, min_perf,
  417. cpu->pstate.min_pstate, max_perf);
  418. }
  419. static void intel_pstate_set_pstate(struct cpudata *cpu, int pstate)
  420. {
  421. int max_perf, min_perf;
  422. intel_pstate_get_min_max(cpu, &min_perf, &max_perf);
  423. pstate = clamp_t(int, pstate, min_perf, max_perf);
  424. if (pstate == cpu->pstate.current_pstate)
  425. return;
  426. trace_cpu_frequency(pstate * 100000, cpu->cpu);
  427. cpu->pstate.current_pstate = pstate;
  428. pstate_funcs.set(cpu, pstate);
  429. }
  430. static inline void intel_pstate_pstate_increase(struct cpudata *cpu, int steps)
  431. {
  432. int target;
  433. target = cpu->pstate.current_pstate + steps;
  434. intel_pstate_set_pstate(cpu, target);
  435. }
  436. static inline void intel_pstate_pstate_decrease(struct cpudata *cpu, int steps)
  437. {
  438. int target;
  439. target = cpu->pstate.current_pstate - steps;
  440. intel_pstate_set_pstate(cpu, target);
  441. }
  442. static void intel_pstate_get_cpu_pstates(struct cpudata *cpu)
  443. {
  444. cpu->pstate.min_pstate = pstate_funcs.get_min();
  445. cpu->pstate.max_pstate = pstate_funcs.get_max();
  446. cpu->pstate.turbo_pstate = pstate_funcs.get_turbo();
  447. if (pstate_funcs.get_vid)
  448. pstate_funcs.get_vid(cpu);
  449. /*
  450. * goto max pstate so we don't slow up boot if we are built-in if we are
  451. * a module we will take care of it during normal operation
  452. */
  453. intel_pstate_set_pstate(cpu, cpu->pstate.max_pstate);
  454. }
  455. static inline void intel_pstate_calc_busy(struct cpudata *cpu)
  456. {
  457. struct sample *sample = &cpu->sample;
  458. int32_t core_pct;
  459. int32_t c0_pct;
  460. core_pct = div_fp(int_tofp(sample->aperf), int_tofp(sample->mperf));
  461. core_pct = mul_fp(core_pct, int_tofp(100));
  462. FP_ROUNDUP(core_pct);
  463. c0_pct = div_fp(int_tofp(sample->mperf), int_tofp(sample->tsc));
  464. sample->freq = fp_toint(
  465. mul_fp(int_tofp(cpu->pstate.max_pstate * 1000), core_pct));
  466. sample->core_pct_busy = mul_fp(core_pct, c0_pct);
  467. }
  468. static inline void intel_pstate_sample(struct cpudata *cpu)
  469. {
  470. u64 aperf, mperf;
  471. unsigned long long tsc;
  472. rdmsrl(MSR_IA32_APERF, aperf);
  473. rdmsrl(MSR_IA32_MPERF, mperf);
  474. tsc = native_read_tsc();
  475. aperf = aperf >> FRAC_BITS;
  476. mperf = mperf >> FRAC_BITS;
  477. tsc = tsc >> FRAC_BITS;
  478. cpu->sample.aperf = aperf;
  479. cpu->sample.mperf = mperf;
  480. cpu->sample.tsc = tsc;
  481. cpu->sample.aperf -= cpu->prev_aperf;
  482. cpu->sample.mperf -= cpu->prev_mperf;
  483. cpu->sample.tsc -= cpu->prev_tsc;
  484. intel_pstate_calc_busy(cpu);
  485. cpu->prev_aperf = aperf;
  486. cpu->prev_mperf = mperf;
  487. cpu->prev_tsc = tsc;
  488. }
  489. static inline void intel_pstate_set_sample_time(struct cpudata *cpu)
  490. {
  491. int sample_time, delay;
  492. sample_time = pid_params.sample_rate_ms;
  493. delay = msecs_to_jiffies(sample_time);
  494. mod_timer_pinned(&cpu->timer, jiffies + delay);
  495. }
  496. static inline int32_t intel_pstate_get_scaled_busy(struct cpudata *cpu)
  497. {
  498. int32_t core_busy, max_pstate, current_pstate;
  499. core_busy = cpu->sample.core_pct_busy;
  500. max_pstate = int_tofp(cpu->pstate.max_pstate);
  501. current_pstate = int_tofp(cpu->pstate.current_pstate);
  502. core_busy = mul_fp(core_busy, div_fp(max_pstate, current_pstate));
  503. return FP_ROUNDUP(core_busy);
  504. }
  505. static inline void intel_pstate_adjust_busy_pstate(struct cpudata *cpu)
  506. {
  507. int32_t busy_scaled;
  508. struct _pid *pid;
  509. signed int ctl = 0;
  510. int steps;
  511. pid = &cpu->pid;
  512. busy_scaled = intel_pstate_get_scaled_busy(cpu);
  513. ctl = pid_calc(pid, busy_scaled);
  514. steps = abs(ctl);
  515. if (ctl < 0)
  516. intel_pstate_pstate_increase(cpu, steps);
  517. else
  518. intel_pstate_pstate_decrease(cpu, steps);
  519. }
  520. static void intel_pstate_timer_func(unsigned long __data)
  521. {
  522. struct cpudata *cpu = (struct cpudata *) __data;
  523. struct sample *sample;
  524. intel_pstate_sample(cpu);
  525. sample = &cpu->sample;
  526. intel_pstate_adjust_busy_pstate(cpu);
  527. trace_pstate_sample(fp_toint(sample->core_pct_busy),
  528. fp_toint(intel_pstate_get_scaled_busy(cpu)),
  529. cpu->pstate.current_pstate,
  530. sample->mperf,
  531. sample->aperf,
  532. sample->freq);
  533. intel_pstate_set_sample_time(cpu);
  534. }
  535. #define ICPU(model, policy) \
  536. { X86_VENDOR_INTEL, 6, model, X86_FEATURE_APERFMPERF,\
  537. (unsigned long)&policy }
  538. static const struct x86_cpu_id intel_pstate_cpu_ids[] = {
  539. ICPU(0x2a, core_params),
  540. ICPU(0x2d, core_params),
  541. ICPU(0x37, byt_params),
  542. ICPU(0x3a, core_params),
  543. ICPU(0x3c, core_params),
  544. ICPU(0x3d, core_params),
  545. ICPU(0x3e, core_params),
  546. ICPU(0x3f, core_params),
  547. ICPU(0x45, core_params),
  548. ICPU(0x46, core_params),
  549. ICPU(0x4f, core_params),
  550. ICPU(0x56, core_params),
  551. {}
  552. };
  553. MODULE_DEVICE_TABLE(x86cpu, intel_pstate_cpu_ids);
  554. static int intel_pstate_init_cpu(unsigned int cpunum)
  555. {
  556. const struct x86_cpu_id *id;
  557. struct cpudata *cpu;
  558. id = x86_match_cpu(intel_pstate_cpu_ids);
  559. if (!id)
  560. return -ENODEV;
  561. all_cpu_data[cpunum] = kzalloc(sizeof(struct cpudata), GFP_KERNEL);
  562. if (!all_cpu_data[cpunum])
  563. return -ENOMEM;
  564. cpu = all_cpu_data[cpunum];
  565. intel_pstate_get_cpu_pstates(cpu);
  566. if (!cpu->pstate.current_pstate) {
  567. all_cpu_data[cpunum] = NULL;
  568. kfree(cpu);
  569. return -ENODATA;
  570. }
  571. cpu->cpu = cpunum;
  572. init_timer_deferrable(&cpu->timer);
  573. cpu->timer.function = intel_pstate_timer_func;
  574. cpu->timer.data =
  575. (unsigned long)cpu;
  576. cpu->timer.expires = jiffies + HZ/100;
  577. intel_pstate_busy_pid_reset(cpu);
  578. intel_pstate_sample(cpu);
  579. intel_pstate_set_pstate(cpu, cpu->pstate.max_pstate);
  580. add_timer_on(&cpu->timer, cpunum);
  581. pr_info("Intel pstate controlling: cpu %d\n", cpunum);
  582. return 0;
  583. }
  584. static unsigned int intel_pstate_get(unsigned int cpu_num)
  585. {
  586. struct sample *sample;
  587. struct cpudata *cpu;
  588. cpu = all_cpu_data[cpu_num];
  589. if (!cpu)
  590. return 0;
  591. sample = &cpu->sample;
  592. return sample->freq;
  593. }
  594. static int intel_pstate_set_policy(struct cpufreq_policy *policy)
  595. {
  596. struct cpudata *cpu;
  597. cpu = all_cpu_data[policy->cpu];
  598. if (!policy->cpuinfo.max_freq)
  599. return -ENODEV;
  600. if (policy->policy == CPUFREQ_POLICY_PERFORMANCE) {
  601. limits.min_perf_pct = 100;
  602. limits.min_perf = int_tofp(1);
  603. limits.max_perf_pct = 100;
  604. limits.max_perf = int_tofp(1);
  605. limits.no_turbo = 0;
  606. return 0;
  607. }
  608. limits.min_perf_pct = (policy->min * 100) / policy->cpuinfo.max_freq;
  609. limits.min_perf_pct = clamp_t(int, limits.min_perf_pct, 0 , 100);
  610. limits.min_perf = div_fp(int_tofp(limits.min_perf_pct), int_tofp(100));
  611. limits.max_policy_pct = policy->max * 100 / policy->cpuinfo.max_freq;
  612. limits.max_policy_pct = clamp_t(int, limits.max_policy_pct, 0 , 100);
  613. limits.max_perf_pct = min(limits.max_policy_pct, limits.max_sysfs_pct);
  614. limits.max_perf = div_fp(int_tofp(limits.max_perf_pct), int_tofp(100));
  615. return 0;
  616. }
  617. static int intel_pstate_verify_policy(struct cpufreq_policy *policy)
  618. {
  619. cpufreq_verify_within_cpu_limits(policy);
  620. if ((policy->policy != CPUFREQ_POLICY_POWERSAVE) &&
  621. (policy->policy != CPUFREQ_POLICY_PERFORMANCE))
  622. return -EINVAL;
  623. return 0;
  624. }
  625. static void intel_pstate_stop_cpu(struct cpufreq_policy *policy)
  626. {
  627. int cpu_num = policy->cpu;
  628. struct cpudata *cpu = all_cpu_data[cpu_num];
  629. pr_info("intel_pstate CPU %d exiting\n", cpu_num);
  630. del_timer_sync(&all_cpu_data[cpu_num]->timer);
  631. intel_pstate_set_pstate(cpu, cpu->pstate.min_pstate);
  632. kfree(all_cpu_data[cpu_num]);
  633. all_cpu_data[cpu_num] = NULL;
  634. }
  635. static int intel_pstate_cpu_init(struct cpufreq_policy *policy)
  636. {
  637. struct cpudata *cpu;
  638. int rc;
  639. rc = intel_pstate_init_cpu(policy->cpu);
  640. if (rc)
  641. return rc;
  642. cpu = all_cpu_data[policy->cpu];
  643. if (!limits.no_turbo &&
  644. limits.min_perf_pct == 100 && limits.max_perf_pct == 100)
  645. policy->policy = CPUFREQ_POLICY_PERFORMANCE;
  646. else
  647. policy->policy = CPUFREQ_POLICY_POWERSAVE;
  648. policy->min = cpu->pstate.min_pstate * 100000;
  649. policy->max = cpu->pstate.turbo_pstate * 100000;
  650. /* cpuinfo and default policy values */
  651. policy->cpuinfo.min_freq = cpu->pstate.min_pstate * 100000;
  652. policy->cpuinfo.max_freq = cpu->pstate.turbo_pstate * 100000;
  653. policy->cpuinfo.transition_latency = CPUFREQ_ETERNAL;
  654. cpumask_set_cpu(policy->cpu, policy->cpus);
  655. return 0;
  656. }
  657. static struct cpufreq_driver intel_pstate_driver = {
  658. .flags = CPUFREQ_CONST_LOOPS,
  659. .verify = intel_pstate_verify_policy,
  660. .setpolicy = intel_pstate_set_policy,
  661. .get = intel_pstate_get,
  662. .init = intel_pstate_cpu_init,
  663. .stop_cpu = intel_pstate_stop_cpu,
  664. .name = "intel_pstate",
  665. };
  666. static int __initdata no_load;
  667. static int intel_pstate_msrs_not_valid(void)
  668. {
  669. /* Check that all the msr's we are using are valid. */
  670. u64 aperf, mperf, tmp;
  671. rdmsrl(MSR_IA32_APERF, aperf);
  672. rdmsrl(MSR_IA32_MPERF, mperf);
  673. if (!pstate_funcs.get_max() ||
  674. !pstate_funcs.get_min() ||
  675. !pstate_funcs.get_turbo())
  676. return -ENODEV;
  677. rdmsrl(MSR_IA32_APERF, tmp);
  678. if (!(tmp - aperf))
  679. return -ENODEV;
  680. rdmsrl(MSR_IA32_MPERF, tmp);
  681. if (!(tmp - mperf))
  682. return -ENODEV;
  683. return 0;
  684. }
  685. static void copy_pid_params(struct pstate_adjust_policy *policy)
  686. {
  687. pid_params.sample_rate_ms = policy->sample_rate_ms;
  688. pid_params.p_gain_pct = policy->p_gain_pct;
  689. pid_params.i_gain_pct = policy->i_gain_pct;
  690. pid_params.d_gain_pct = policy->d_gain_pct;
  691. pid_params.deadband = policy->deadband;
  692. pid_params.setpoint = policy->setpoint;
  693. }
  694. static void copy_cpu_funcs(struct pstate_funcs *funcs)
  695. {
  696. pstate_funcs.get_max = funcs->get_max;
  697. pstate_funcs.get_min = funcs->get_min;
  698. pstate_funcs.get_turbo = funcs->get_turbo;
  699. pstate_funcs.set = funcs->set;
  700. pstate_funcs.get_vid = funcs->get_vid;
  701. }
  702. #if IS_ENABLED(CONFIG_ACPI)
  703. #include <acpi/processor.h>
  704. static bool intel_pstate_no_acpi_pss(void)
  705. {
  706. int i;
  707. for_each_possible_cpu(i) {
  708. acpi_status status;
  709. union acpi_object *pss;
  710. struct acpi_buffer buffer = { ACPI_ALLOCATE_BUFFER, NULL };
  711. struct acpi_processor *pr = per_cpu(processors, i);
  712. if (!pr)
  713. continue;
  714. status = acpi_evaluate_object(pr->handle, "_PSS", NULL, &buffer);
  715. if (ACPI_FAILURE(status))
  716. continue;
  717. pss = buffer.pointer;
  718. if (pss && pss->type == ACPI_TYPE_PACKAGE) {
  719. kfree(pss);
  720. return false;
  721. }
  722. kfree(pss);
  723. }
  724. return true;
  725. }
  726. struct hw_vendor_info {
  727. u16 valid;
  728. char oem_id[ACPI_OEM_ID_SIZE];
  729. char oem_table_id[ACPI_OEM_TABLE_ID_SIZE];
  730. };
  731. /* Hardware vendor-specific info that has its own power management modes */
  732. static struct hw_vendor_info vendor_info[] = {
  733. {1, "HP ", "ProLiant"},
  734. {0, "", ""},
  735. };
  736. static bool intel_pstate_platform_pwr_mgmt_exists(void)
  737. {
  738. struct acpi_table_header hdr;
  739. struct hw_vendor_info *v_info;
  740. if (acpi_disabled
  741. || ACPI_FAILURE(acpi_get_table_header(ACPI_SIG_FADT, 0, &hdr)))
  742. return false;
  743. for (v_info = vendor_info; v_info->valid; v_info++) {
  744. if (!strncmp(hdr.oem_id, v_info->oem_id, ACPI_OEM_ID_SIZE)
  745. && !strncmp(hdr.oem_table_id, v_info->oem_table_id, ACPI_OEM_TABLE_ID_SIZE)
  746. && intel_pstate_no_acpi_pss())
  747. return true;
  748. }
  749. return false;
  750. }
  751. #else /* CONFIG_ACPI not enabled */
  752. static inline bool intel_pstate_platform_pwr_mgmt_exists(void) { return false; }
  753. #endif /* CONFIG_ACPI */
  754. static int __init intel_pstate_init(void)
  755. {
  756. int cpu, rc = 0;
  757. const struct x86_cpu_id *id;
  758. struct cpu_defaults *cpu_info;
  759. if (no_load)
  760. return -ENODEV;
  761. id = x86_match_cpu(intel_pstate_cpu_ids);
  762. if (!id)
  763. return -ENODEV;
  764. /*
  765. * The Intel pstate driver will be ignored if the platform
  766. * firmware has its own power management modes.
  767. */
  768. if (intel_pstate_platform_pwr_mgmt_exists())
  769. return -ENODEV;
  770. cpu_info = (struct cpu_defaults *)id->driver_data;
  771. copy_pid_params(&cpu_info->pid_policy);
  772. copy_cpu_funcs(&cpu_info->funcs);
  773. if (intel_pstate_msrs_not_valid())
  774. return -ENODEV;
  775. pr_info("Intel P-state driver initializing.\n");
  776. all_cpu_data = vzalloc(sizeof(void *) * num_possible_cpus());
  777. if (!all_cpu_data)
  778. return -ENOMEM;
  779. rc = cpufreq_register_driver(&intel_pstate_driver);
  780. if (rc)
  781. goto out;
  782. intel_pstate_debug_expose_params();
  783. intel_pstate_sysfs_expose_params();
  784. return rc;
  785. out:
  786. get_online_cpus();
  787. for_each_online_cpu(cpu) {
  788. if (all_cpu_data[cpu]) {
  789. del_timer_sync(&all_cpu_data[cpu]->timer);
  790. kfree(all_cpu_data[cpu]);
  791. }
  792. }
  793. put_online_cpus();
  794. vfree(all_cpu_data);
  795. return -ENODEV;
  796. }
  797. device_initcall(intel_pstate_init);
  798. static int __init intel_pstate_setup(char *str)
  799. {
  800. if (!str)
  801. return -EINVAL;
  802. if (!strcmp(str, "disable"))
  803. no_load = 1;
  804. return 0;
  805. }
  806. early_param("intel_pstate", intel_pstate_setup);
  807. MODULE_AUTHOR("Dirk Brandewie <dirk.j.brandewie@intel.com>");
  808. MODULE_DESCRIPTION("'intel_pstate' - P state driver Intel Core processors");
  809. MODULE_LICENSE("GPL");