pci-sysfs.c 39 KB

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  1. /*
  2. * drivers/pci/pci-sysfs.c
  3. *
  4. * (C) Copyright 2002-2004 Greg Kroah-Hartman <greg@kroah.com>
  5. * (C) Copyright 2002-2004 IBM Corp.
  6. * (C) Copyright 2003 Matthew Wilcox
  7. * (C) Copyright 2003 Hewlett-Packard
  8. * (C) Copyright 2004 Jon Smirl <jonsmirl@yahoo.com>
  9. * (C) Copyright 2004 Silicon Graphics, Inc. Jesse Barnes <jbarnes@sgi.com>
  10. *
  11. * File attributes for PCI devices
  12. *
  13. * Modeled after usb's driverfs.c
  14. *
  15. */
  16. #include <linux/kernel.h>
  17. #include <linux/sched.h>
  18. #include <linux/pci.h>
  19. #include <linux/stat.h>
  20. #include <linux/export.h>
  21. #include <linux/topology.h>
  22. #include <linux/mm.h>
  23. #include <linux/fs.h>
  24. #include <linux/capability.h>
  25. #include <linux/security.h>
  26. #include <linux/pci-aspm.h>
  27. #include <linux/slab.h>
  28. #include <linux/vgaarb.h>
  29. #include <linux/pm_runtime.h>
  30. #include <linux/of.h>
  31. #include "pci.h"
  32. static int sysfs_initialized; /* = 0 */
  33. /* show configuration fields */
  34. #define pci_config_attr(field, format_string) \
  35. static ssize_t \
  36. field##_show(struct device *dev, struct device_attribute *attr, char *buf) \
  37. { \
  38. struct pci_dev *pdev; \
  39. \
  40. pdev = to_pci_dev(dev); \
  41. return sprintf(buf, format_string, pdev->field); \
  42. } \
  43. static DEVICE_ATTR_RO(field)
  44. pci_config_attr(vendor, "0x%04x\n");
  45. pci_config_attr(device, "0x%04x\n");
  46. pci_config_attr(subsystem_vendor, "0x%04x\n");
  47. pci_config_attr(subsystem_device, "0x%04x\n");
  48. pci_config_attr(class, "0x%06x\n");
  49. pci_config_attr(irq, "%u\n");
  50. static ssize_t broken_parity_status_show(struct device *dev,
  51. struct device_attribute *attr,
  52. char *buf)
  53. {
  54. struct pci_dev *pdev = to_pci_dev(dev);
  55. return sprintf(buf, "%u\n", pdev->broken_parity_status);
  56. }
  57. static ssize_t broken_parity_status_store(struct device *dev,
  58. struct device_attribute *attr,
  59. const char *buf, size_t count)
  60. {
  61. struct pci_dev *pdev = to_pci_dev(dev);
  62. unsigned long val;
  63. if (kstrtoul(buf, 0, &val) < 0)
  64. return -EINVAL;
  65. pdev->broken_parity_status = !!val;
  66. return count;
  67. }
  68. static DEVICE_ATTR_RW(broken_parity_status);
  69. static ssize_t pci_dev_show_local_cpu(struct device *dev, bool list,
  70. struct device_attribute *attr, char *buf)
  71. {
  72. const struct cpumask *mask;
  73. #ifdef CONFIG_NUMA
  74. mask = (dev_to_node(dev) == -1) ? cpu_online_mask :
  75. cpumask_of_node(dev_to_node(dev));
  76. #else
  77. mask = cpumask_of_pcibus(to_pci_dev(dev)->bus);
  78. #endif
  79. return cpumap_print_to_pagebuf(list, buf, mask);
  80. }
  81. static ssize_t local_cpus_show(struct device *dev,
  82. struct device_attribute *attr, char *buf)
  83. {
  84. return pci_dev_show_local_cpu(dev, false, attr, buf);
  85. }
  86. static DEVICE_ATTR_RO(local_cpus);
  87. static ssize_t local_cpulist_show(struct device *dev,
  88. struct device_attribute *attr, char *buf)
  89. {
  90. return pci_dev_show_local_cpu(dev, true, attr, buf);
  91. }
  92. static DEVICE_ATTR_RO(local_cpulist);
  93. /*
  94. * PCI Bus Class Devices
  95. */
  96. static ssize_t cpuaffinity_show(struct device *dev,
  97. struct device_attribute *attr, char *buf)
  98. {
  99. const struct cpumask *cpumask = cpumask_of_pcibus(to_pci_bus(dev));
  100. return cpumap_print_to_pagebuf(false, buf, cpumask);
  101. }
  102. static DEVICE_ATTR_RO(cpuaffinity);
  103. static ssize_t cpulistaffinity_show(struct device *dev,
  104. struct device_attribute *attr, char *buf)
  105. {
  106. const struct cpumask *cpumask = cpumask_of_pcibus(to_pci_bus(dev));
  107. return cpumap_print_to_pagebuf(true, buf, cpumask);
  108. }
  109. static DEVICE_ATTR_RO(cpulistaffinity);
  110. /* show resources */
  111. static ssize_t resource_show(struct device *dev, struct device_attribute *attr,
  112. char *buf)
  113. {
  114. struct pci_dev *pci_dev = to_pci_dev(dev);
  115. char *str = buf;
  116. int i;
  117. int max;
  118. resource_size_t start, end;
  119. if (pci_dev->subordinate)
  120. max = DEVICE_COUNT_RESOURCE;
  121. else
  122. max = PCI_BRIDGE_RESOURCES;
  123. for (i = 0; i < max; i++) {
  124. struct resource *res = &pci_dev->resource[i];
  125. pci_resource_to_user(pci_dev, i, res, &start, &end);
  126. str += sprintf(str, "0x%016llx 0x%016llx 0x%016llx\n",
  127. (unsigned long long)start,
  128. (unsigned long long)end,
  129. (unsigned long long)res->flags);
  130. }
  131. return (str - buf);
  132. }
  133. static DEVICE_ATTR_RO(resource);
  134. static ssize_t modalias_show(struct device *dev, struct device_attribute *attr,
  135. char *buf)
  136. {
  137. struct pci_dev *pci_dev = to_pci_dev(dev);
  138. return sprintf(buf, "pci:v%08Xd%08Xsv%08Xsd%08Xbc%02Xsc%02Xi%02X\n",
  139. pci_dev->vendor, pci_dev->device,
  140. pci_dev->subsystem_vendor, pci_dev->subsystem_device,
  141. (u8)(pci_dev->class >> 16), (u8)(pci_dev->class >> 8),
  142. (u8)(pci_dev->class));
  143. }
  144. static DEVICE_ATTR_RO(modalias);
  145. static ssize_t enable_store(struct device *dev, struct device_attribute *attr,
  146. const char *buf, size_t count)
  147. {
  148. struct pci_dev *pdev = to_pci_dev(dev);
  149. unsigned long val;
  150. ssize_t result = kstrtoul(buf, 0, &val);
  151. if (result < 0)
  152. return result;
  153. /* this can crash the machine when done on the "wrong" device */
  154. if (!capable(CAP_SYS_ADMIN))
  155. return -EPERM;
  156. if (!val) {
  157. if (pci_is_enabled(pdev))
  158. pci_disable_device(pdev);
  159. else
  160. result = -EIO;
  161. } else
  162. result = pci_enable_device(pdev);
  163. return result < 0 ? result : count;
  164. }
  165. static ssize_t enable_show(struct device *dev, struct device_attribute *attr,
  166. char *buf)
  167. {
  168. struct pci_dev *pdev;
  169. pdev = to_pci_dev(dev);
  170. return sprintf(buf, "%u\n", atomic_read(&pdev->enable_cnt));
  171. }
  172. static DEVICE_ATTR_RW(enable);
  173. #ifdef CONFIG_NUMA
  174. static ssize_t numa_node_store(struct device *dev,
  175. struct device_attribute *attr, const char *buf,
  176. size_t count)
  177. {
  178. struct pci_dev *pdev = to_pci_dev(dev);
  179. int node, ret;
  180. if (!capable(CAP_SYS_ADMIN))
  181. return -EPERM;
  182. ret = kstrtoint(buf, 0, &node);
  183. if (ret)
  184. return ret;
  185. if ((node < 0 && node != NUMA_NO_NODE) || node >= MAX_NUMNODES)
  186. return -EINVAL;
  187. if (node != NUMA_NO_NODE && !node_online(node))
  188. return -EINVAL;
  189. add_taint(TAINT_FIRMWARE_WORKAROUND, LOCKDEP_STILL_OK);
  190. dev_alert(&pdev->dev, FW_BUG "Overriding NUMA node to %d. Contact your vendor for updates.",
  191. node);
  192. dev->numa_node = node;
  193. return count;
  194. }
  195. static ssize_t numa_node_show(struct device *dev, struct device_attribute *attr,
  196. char *buf)
  197. {
  198. return sprintf(buf, "%d\n", dev->numa_node);
  199. }
  200. static DEVICE_ATTR_RW(numa_node);
  201. #endif
  202. static ssize_t dma_mask_bits_show(struct device *dev,
  203. struct device_attribute *attr, char *buf)
  204. {
  205. struct pci_dev *pdev = to_pci_dev(dev);
  206. return sprintf(buf, "%d\n", fls64(pdev->dma_mask));
  207. }
  208. static DEVICE_ATTR_RO(dma_mask_bits);
  209. static ssize_t consistent_dma_mask_bits_show(struct device *dev,
  210. struct device_attribute *attr,
  211. char *buf)
  212. {
  213. return sprintf(buf, "%d\n", fls64(dev->coherent_dma_mask));
  214. }
  215. static DEVICE_ATTR_RO(consistent_dma_mask_bits);
  216. static ssize_t msi_bus_show(struct device *dev, struct device_attribute *attr,
  217. char *buf)
  218. {
  219. struct pci_dev *pdev = to_pci_dev(dev);
  220. struct pci_bus *subordinate = pdev->subordinate;
  221. return sprintf(buf, "%u\n", subordinate ?
  222. !(subordinate->bus_flags & PCI_BUS_FLAGS_NO_MSI)
  223. : !pdev->no_msi);
  224. }
  225. static ssize_t msi_bus_store(struct device *dev, struct device_attribute *attr,
  226. const char *buf, size_t count)
  227. {
  228. struct pci_dev *pdev = to_pci_dev(dev);
  229. struct pci_bus *subordinate = pdev->subordinate;
  230. unsigned long val;
  231. if (kstrtoul(buf, 0, &val) < 0)
  232. return -EINVAL;
  233. if (!capable(CAP_SYS_ADMIN))
  234. return -EPERM;
  235. /*
  236. * "no_msi" and "bus_flags" only affect what happens when a driver
  237. * requests MSI or MSI-X. They don't affect any drivers that have
  238. * already requested MSI or MSI-X.
  239. */
  240. if (!subordinate) {
  241. pdev->no_msi = !val;
  242. dev_info(&pdev->dev, "MSI/MSI-X %s for future drivers\n",
  243. val ? "allowed" : "disallowed");
  244. return count;
  245. }
  246. if (val)
  247. subordinate->bus_flags &= ~PCI_BUS_FLAGS_NO_MSI;
  248. else
  249. subordinate->bus_flags |= PCI_BUS_FLAGS_NO_MSI;
  250. dev_info(&subordinate->dev, "MSI/MSI-X %s for future drivers of devices on this bus\n",
  251. val ? "allowed" : "disallowed");
  252. return count;
  253. }
  254. static DEVICE_ATTR_RW(msi_bus);
  255. static ssize_t bus_rescan_store(struct bus_type *bus, const char *buf,
  256. size_t count)
  257. {
  258. unsigned long val;
  259. struct pci_bus *b = NULL;
  260. if (kstrtoul(buf, 0, &val) < 0)
  261. return -EINVAL;
  262. if (val) {
  263. pci_lock_rescan_remove();
  264. while ((b = pci_find_next_bus(b)) != NULL)
  265. pci_rescan_bus(b);
  266. pci_unlock_rescan_remove();
  267. }
  268. return count;
  269. }
  270. static BUS_ATTR(rescan, (S_IWUSR|S_IWGRP), NULL, bus_rescan_store);
  271. static struct attribute *pci_bus_attrs[] = {
  272. &bus_attr_rescan.attr,
  273. NULL,
  274. };
  275. static const struct attribute_group pci_bus_group = {
  276. .attrs = pci_bus_attrs,
  277. };
  278. const struct attribute_group *pci_bus_groups[] = {
  279. &pci_bus_group,
  280. NULL,
  281. };
  282. static ssize_t dev_rescan_store(struct device *dev,
  283. struct device_attribute *attr, const char *buf,
  284. size_t count)
  285. {
  286. unsigned long val;
  287. struct pci_dev *pdev = to_pci_dev(dev);
  288. if (kstrtoul(buf, 0, &val) < 0)
  289. return -EINVAL;
  290. if (val) {
  291. pci_lock_rescan_remove();
  292. pci_rescan_bus(pdev->bus);
  293. pci_unlock_rescan_remove();
  294. }
  295. return count;
  296. }
  297. static struct device_attribute dev_rescan_attr = __ATTR(rescan,
  298. (S_IWUSR|S_IWGRP),
  299. NULL, dev_rescan_store);
  300. static ssize_t remove_store(struct device *dev, struct device_attribute *attr,
  301. const char *buf, size_t count)
  302. {
  303. unsigned long val;
  304. if (kstrtoul(buf, 0, &val) < 0)
  305. return -EINVAL;
  306. if (val && device_remove_file_self(dev, attr))
  307. pci_stop_and_remove_bus_device_locked(to_pci_dev(dev));
  308. return count;
  309. }
  310. static struct device_attribute dev_remove_attr = __ATTR(remove,
  311. (S_IWUSR|S_IWGRP),
  312. NULL, remove_store);
  313. static ssize_t dev_bus_rescan_store(struct device *dev,
  314. struct device_attribute *attr,
  315. const char *buf, size_t count)
  316. {
  317. unsigned long val;
  318. struct pci_bus *bus = to_pci_bus(dev);
  319. if (kstrtoul(buf, 0, &val) < 0)
  320. return -EINVAL;
  321. if (val) {
  322. pci_lock_rescan_remove();
  323. if (!pci_is_root_bus(bus) && list_empty(&bus->devices))
  324. pci_rescan_bus_bridge_resize(bus->self);
  325. else
  326. pci_rescan_bus(bus);
  327. pci_unlock_rescan_remove();
  328. }
  329. return count;
  330. }
  331. static DEVICE_ATTR(rescan, (S_IWUSR|S_IWGRP), NULL, dev_bus_rescan_store);
  332. #if defined(CONFIG_PM) && defined(CONFIG_ACPI)
  333. static ssize_t d3cold_allowed_store(struct device *dev,
  334. struct device_attribute *attr,
  335. const char *buf, size_t count)
  336. {
  337. struct pci_dev *pdev = to_pci_dev(dev);
  338. unsigned long val;
  339. if (kstrtoul(buf, 0, &val) < 0)
  340. return -EINVAL;
  341. pdev->d3cold_allowed = !!val;
  342. pm_runtime_resume(dev);
  343. return count;
  344. }
  345. static ssize_t d3cold_allowed_show(struct device *dev,
  346. struct device_attribute *attr, char *buf)
  347. {
  348. struct pci_dev *pdev = to_pci_dev(dev);
  349. return sprintf(buf, "%u\n", pdev->d3cold_allowed);
  350. }
  351. static DEVICE_ATTR_RW(d3cold_allowed);
  352. #endif
  353. #ifdef CONFIG_OF
  354. static ssize_t devspec_show(struct device *dev,
  355. struct device_attribute *attr, char *buf)
  356. {
  357. struct pci_dev *pdev = to_pci_dev(dev);
  358. struct device_node *np = pci_device_to_OF_node(pdev);
  359. if (np == NULL || np->full_name == NULL)
  360. return 0;
  361. return sprintf(buf, "%s", np->full_name);
  362. }
  363. static DEVICE_ATTR_RO(devspec);
  364. #endif
  365. #ifdef CONFIG_PCI_IOV
  366. static ssize_t sriov_totalvfs_show(struct device *dev,
  367. struct device_attribute *attr,
  368. char *buf)
  369. {
  370. struct pci_dev *pdev = to_pci_dev(dev);
  371. return sprintf(buf, "%u\n", pci_sriov_get_totalvfs(pdev));
  372. }
  373. static ssize_t sriov_numvfs_show(struct device *dev,
  374. struct device_attribute *attr,
  375. char *buf)
  376. {
  377. struct pci_dev *pdev = to_pci_dev(dev);
  378. return sprintf(buf, "%u\n", pdev->sriov->num_VFs);
  379. }
  380. /*
  381. * num_vfs > 0; number of VFs to enable
  382. * num_vfs = 0; disable all VFs
  383. *
  384. * Note: SRIOV spec doesn't allow partial VF
  385. * disable, so it's all or none.
  386. */
  387. static ssize_t sriov_numvfs_store(struct device *dev,
  388. struct device_attribute *attr,
  389. const char *buf, size_t count)
  390. {
  391. struct pci_dev *pdev = to_pci_dev(dev);
  392. int ret;
  393. u16 num_vfs;
  394. ret = kstrtou16(buf, 0, &num_vfs);
  395. if (ret < 0)
  396. return ret;
  397. if (num_vfs > pci_sriov_get_totalvfs(pdev))
  398. return -ERANGE;
  399. if (num_vfs == pdev->sriov->num_VFs)
  400. return count; /* no change */
  401. /* is PF driver loaded w/callback */
  402. if (!pdev->driver || !pdev->driver->sriov_configure) {
  403. dev_info(&pdev->dev, "Driver doesn't support SRIOV configuration via sysfs\n");
  404. return -ENOSYS;
  405. }
  406. if (num_vfs == 0) {
  407. /* disable VFs */
  408. ret = pdev->driver->sriov_configure(pdev, 0);
  409. if (ret < 0)
  410. return ret;
  411. return count;
  412. }
  413. /* enable VFs */
  414. if (pdev->sriov->num_VFs) {
  415. dev_warn(&pdev->dev, "%d VFs already enabled. Disable before enabling %d VFs\n",
  416. pdev->sriov->num_VFs, num_vfs);
  417. return -EBUSY;
  418. }
  419. ret = pdev->driver->sriov_configure(pdev, num_vfs);
  420. if (ret < 0)
  421. return ret;
  422. if (ret != num_vfs)
  423. dev_warn(&pdev->dev, "%d VFs requested; only %d enabled\n",
  424. num_vfs, ret);
  425. return count;
  426. }
  427. static struct device_attribute sriov_totalvfs_attr = __ATTR_RO(sriov_totalvfs);
  428. static struct device_attribute sriov_numvfs_attr =
  429. __ATTR(sriov_numvfs, (S_IRUGO|S_IWUSR|S_IWGRP),
  430. sriov_numvfs_show, sriov_numvfs_store);
  431. #endif /* CONFIG_PCI_IOV */
  432. static ssize_t driver_override_store(struct device *dev,
  433. struct device_attribute *attr,
  434. const char *buf, size_t count)
  435. {
  436. struct pci_dev *pdev = to_pci_dev(dev);
  437. char *driver_override, *old = pdev->driver_override, *cp;
  438. /* We need to keep extra room for a newline */
  439. if (count >= (PAGE_SIZE - 1))
  440. return -EINVAL;
  441. driver_override = kstrndup(buf, count, GFP_KERNEL);
  442. if (!driver_override)
  443. return -ENOMEM;
  444. cp = strchr(driver_override, '\n');
  445. if (cp)
  446. *cp = '\0';
  447. if (strlen(driver_override)) {
  448. pdev->driver_override = driver_override;
  449. } else {
  450. kfree(driver_override);
  451. pdev->driver_override = NULL;
  452. }
  453. kfree(old);
  454. return count;
  455. }
  456. static ssize_t driver_override_show(struct device *dev,
  457. struct device_attribute *attr, char *buf)
  458. {
  459. struct pci_dev *pdev = to_pci_dev(dev);
  460. return snprintf(buf, PAGE_SIZE, "%s\n", pdev->driver_override);
  461. }
  462. static DEVICE_ATTR_RW(driver_override);
  463. static struct attribute *pci_dev_attrs[] = {
  464. &dev_attr_resource.attr,
  465. &dev_attr_vendor.attr,
  466. &dev_attr_device.attr,
  467. &dev_attr_subsystem_vendor.attr,
  468. &dev_attr_subsystem_device.attr,
  469. &dev_attr_class.attr,
  470. &dev_attr_irq.attr,
  471. &dev_attr_local_cpus.attr,
  472. &dev_attr_local_cpulist.attr,
  473. &dev_attr_modalias.attr,
  474. #ifdef CONFIG_NUMA
  475. &dev_attr_numa_node.attr,
  476. #endif
  477. &dev_attr_dma_mask_bits.attr,
  478. &dev_attr_consistent_dma_mask_bits.attr,
  479. &dev_attr_enable.attr,
  480. &dev_attr_broken_parity_status.attr,
  481. &dev_attr_msi_bus.attr,
  482. #if defined(CONFIG_PM) && defined(CONFIG_ACPI)
  483. &dev_attr_d3cold_allowed.attr,
  484. #endif
  485. #ifdef CONFIG_OF
  486. &dev_attr_devspec.attr,
  487. #endif
  488. &dev_attr_driver_override.attr,
  489. NULL,
  490. };
  491. static const struct attribute_group pci_dev_group = {
  492. .attrs = pci_dev_attrs,
  493. };
  494. const struct attribute_group *pci_dev_groups[] = {
  495. &pci_dev_group,
  496. NULL,
  497. };
  498. static struct attribute *pcibus_attrs[] = {
  499. &dev_attr_rescan.attr,
  500. &dev_attr_cpuaffinity.attr,
  501. &dev_attr_cpulistaffinity.attr,
  502. NULL,
  503. };
  504. static const struct attribute_group pcibus_group = {
  505. .attrs = pcibus_attrs,
  506. };
  507. const struct attribute_group *pcibus_groups[] = {
  508. &pcibus_group,
  509. NULL,
  510. };
  511. static ssize_t boot_vga_show(struct device *dev, struct device_attribute *attr,
  512. char *buf)
  513. {
  514. struct pci_dev *pdev = to_pci_dev(dev);
  515. struct pci_dev *vga_dev = vga_default_device();
  516. if (vga_dev)
  517. return sprintf(buf, "%u\n", (pdev == vga_dev));
  518. return sprintf(buf, "%u\n",
  519. !!(pdev->resource[PCI_ROM_RESOURCE].flags &
  520. IORESOURCE_ROM_SHADOW));
  521. }
  522. static struct device_attribute vga_attr = __ATTR_RO(boot_vga);
  523. static ssize_t pci_read_config(struct file *filp, struct kobject *kobj,
  524. struct bin_attribute *bin_attr, char *buf,
  525. loff_t off, size_t count)
  526. {
  527. struct pci_dev *dev = to_pci_dev(kobj_to_dev(kobj));
  528. unsigned int size = 64;
  529. loff_t init_off = off;
  530. u8 *data = (u8 *) buf;
  531. /* Several chips lock up trying to read undefined config space */
  532. if (security_capable(filp->f_cred, &init_user_ns, CAP_SYS_ADMIN) == 0)
  533. size = dev->cfg_size;
  534. else if (dev->hdr_type == PCI_HEADER_TYPE_CARDBUS)
  535. size = 128;
  536. if (off > size)
  537. return 0;
  538. if (off + count > size) {
  539. size -= off;
  540. count = size;
  541. } else {
  542. size = count;
  543. }
  544. pci_config_pm_runtime_get(dev);
  545. if ((off & 1) && size) {
  546. u8 val;
  547. pci_user_read_config_byte(dev, off, &val);
  548. data[off - init_off] = val;
  549. off++;
  550. size--;
  551. }
  552. if ((off & 3) && size > 2) {
  553. u16 val;
  554. pci_user_read_config_word(dev, off, &val);
  555. data[off - init_off] = val & 0xff;
  556. data[off - init_off + 1] = (val >> 8) & 0xff;
  557. off += 2;
  558. size -= 2;
  559. }
  560. while (size > 3) {
  561. u32 val;
  562. pci_user_read_config_dword(dev, off, &val);
  563. data[off - init_off] = val & 0xff;
  564. data[off - init_off + 1] = (val >> 8) & 0xff;
  565. data[off - init_off + 2] = (val >> 16) & 0xff;
  566. data[off - init_off + 3] = (val >> 24) & 0xff;
  567. off += 4;
  568. size -= 4;
  569. }
  570. if (size >= 2) {
  571. u16 val;
  572. pci_user_read_config_word(dev, off, &val);
  573. data[off - init_off] = val & 0xff;
  574. data[off - init_off + 1] = (val >> 8) & 0xff;
  575. off += 2;
  576. size -= 2;
  577. }
  578. if (size > 0) {
  579. u8 val;
  580. pci_user_read_config_byte(dev, off, &val);
  581. data[off - init_off] = val;
  582. off++;
  583. --size;
  584. }
  585. pci_config_pm_runtime_put(dev);
  586. return count;
  587. }
  588. static ssize_t pci_write_config(struct file *filp, struct kobject *kobj,
  589. struct bin_attribute *bin_attr, char *buf,
  590. loff_t off, size_t count)
  591. {
  592. struct pci_dev *dev = to_pci_dev(kobj_to_dev(kobj));
  593. unsigned int size = count;
  594. loff_t init_off = off;
  595. u8 *data = (u8 *) buf;
  596. if (off > dev->cfg_size)
  597. return 0;
  598. if (off + count > dev->cfg_size) {
  599. size = dev->cfg_size - off;
  600. count = size;
  601. }
  602. pci_config_pm_runtime_get(dev);
  603. if ((off & 1) && size) {
  604. pci_user_write_config_byte(dev, off, data[off - init_off]);
  605. off++;
  606. size--;
  607. }
  608. if ((off & 3) && size > 2) {
  609. u16 val = data[off - init_off];
  610. val |= (u16) data[off - init_off + 1] << 8;
  611. pci_user_write_config_word(dev, off, val);
  612. off += 2;
  613. size -= 2;
  614. }
  615. while (size > 3) {
  616. u32 val = data[off - init_off];
  617. val |= (u32) data[off - init_off + 1] << 8;
  618. val |= (u32) data[off - init_off + 2] << 16;
  619. val |= (u32) data[off - init_off + 3] << 24;
  620. pci_user_write_config_dword(dev, off, val);
  621. off += 4;
  622. size -= 4;
  623. }
  624. if (size >= 2) {
  625. u16 val = data[off - init_off];
  626. val |= (u16) data[off - init_off + 1] << 8;
  627. pci_user_write_config_word(dev, off, val);
  628. off += 2;
  629. size -= 2;
  630. }
  631. if (size) {
  632. pci_user_write_config_byte(dev, off, data[off - init_off]);
  633. off++;
  634. --size;
  635. }
  636. pci_config_pm_runtime_put(dev);
  637. return count;
  638. }
  639. static ssize_t read_vpd_attr(struct file *filp, struct kobject *kobj,
  640. struct bin_attribute *bin_attr, char *buf,
  641. loff_t off, size_t count)
  642. {
  643. struct pci_dev *dev = to_pci_dev(kobj_to_dev(kobj));
  644. if (off > bin_attr->size)
  645. count = 0;
  646. else if (count > bin_attr->size - off)
  647. count = bin_attr->size - off;
  648. return pci_read_vpd(dev, off, count, buf);
  649. }
  650. static ssize_t write_vpd_attr(struct file *filp, struct kobject *kobj,
  651. struct bin_attribute *bin_attr, char *buf,
  652. loff_t off, size_t count)
  653. {
  654. struct pci_dev *dev = to_pci_dev(kobj_to_dev(kobj));
  655. if (off > bin_attr->size)
  656. count = 0;
  657. else if (count > bin_attr->size - off)
  658. count = bin_attr->size - off;
  659. return pci_write_vpd(dev, off, count, buf);
  660. }
  661. #ifdef HAVE_PCI_LEGACY
  662. /**
  663. * pci_read_legacy_io - read byte(s) from legacy I/O port space
  664. * @filp: open sysfs file
  665. * @kobj: kobject corresponding to file to read from
  666. * @bin_attr: struct bin_attribute for this file
  667. * @buf: buffer to store results
  668. * @off: offset into legacy I/O port space
  669. * @count: number of bytes to read
  670. *
  671. * Reads 1, 2, or 4 bytes from legacy I/O port space using an arch specific
  672. * callback routine (pci_legacy_read).
  673. */
  674. static ssize_t pci_read_legacy_io(struct file *filp, struct kobject *kobj,
  675. struct bin_attribute *bin_attr, char *buf,
  676. loff_t off, size_t count)
  677. {
  678. struct pci_bus *bus = to_pci_bus(kobj_to_dev(kobj));
  679. /* Only support 1, 2 or 4 byte accesses */
  680. if (count != 1 && count != 2 && count != 4)
  681. return -EINVAL;
  682. return pci_legacy_read(bus, off, (u32 *)buf, count);
  683. }
  684. /**
  685. * pci_write_legacy_io - write byte(s) to legacy I/O port space
  686. * @filp: open sysfs file
  687. * @kobj: kobject corresponding to file to read from
  688. * @bin_attr: struct bin_attribute for this file
  689. * @buf: buffer containing value to be written
  690. * @off: offset into legacy I/O port space
  691. * @count: number of bytes to write
  692. *
  693. * Writes 1, 2, or 4 bytes from legacy I/O port space using an arch specific
  694. * callback routine (pci_legacy_write).
  695. */
  696. static ssize_t pci_write_legacy_io(struct file *filp, struct kobject *kobj,
  697. struct bin_attribute *bin_attr, char *buf,
  698. loff_t off, size_t count)
  699. {
  700. struct pci_bus *bus = to_pci_bus(kobj_to_dev(kobj));
  701. /* Only support 1, 2 or 4 byte accesses */
  702. if (count != 1 && count != 2 && count != 4)
  703. return -EINVAL;
  704. return pci_legacy_write(bus, off, *(u32 *)buf, count);
  705. }
  706. /**
  707. * pci_mmap_legacy_mem - map legacy PCI memory into user memory space
  708. * @filp: open sysfs file
  709. * @kobj: kobject corresponding to device to be mapped
  710. * @attr: struct bin_attribute for this file
  711. * @vma: struct vm_area_struct passed to mmap
  712. *
  713. * Uses an arch specific callback, pci_mmap_legacy_mem_page_range, to mmap
  714. * legacy memory space (first meg of bus space) into application virtual
  715. * memory space.
  716. */
  717. static int pci_mmap_legacy_mem(struct file *filp, struct kobject *kobj,
  718. struct bin_attribute *attr,
  719. struct vm_area_struct *vma)
  720. {
  721. struct pci_bus *bus = to_pci_bus(kobj_to_dev(kobj));
  722. return pci_mmap_legacy_page_range(bus, vma, pci_mmap_mem);
  723. }
  724. /**
  725. * pci_mmap_legacy_io - map legacy PCI IO into user memory space
  726. * @filp: open sysfs file
  727. * @kobj: kobject corresponding to device to be mapped
  728. * @attr: struct bin_attribute for this file
  729. * @vma: struct vm_area_struct passed to mmap
  730. *
  731. * Uses an arch specific callback, pci_mmap_legacy_io_page_range, to mmap
  732. * legacy IO space (first meg of bus space) into application virtual
  733. * memory space. Returns -ENOSYS if the operation isn't supported
  734. */
  735. static int pci_mmap_legacy_io(struct file *filp, struct kobject *kobj,
  736. struct bin_attribute *attr,
  737. struct vm_area_struct *vma)
  738. {
  739. struct pci_bus *bus = to_pci_bus(kobj_to_dev(kobj));
  740. return pci_mmap_legacy_page_range(bus, vma, pci_mmap_io);
  741. }
  742. /**
  743. * pci_adjust_legacy_attr - adjustment of legacy file attributes
  744. * @b: bus to create files under
  745. * @mmap_type: I/O port or memory
  746. *
  747. * Stub implementation. Can be overridden by arch if necessary.
  748. */
  749. void __weak pci_adjust_legacy_attr(struct pci_bus *b,
  750. enum pci_mmap_state mmap_type)
  751. {
  752. }
  753. /**
  754. * pci_create_legacy_files - create legacy I/O port and memory files
  755. * @b: bus to create files under
  756. *
  757. * Some platforms allow access to legacy I/O port and ISA memory space on
  758. * a per-bus basis. This routine creates the files and ties them into
  759. * their associated read, write and mmap files from pci-sysfs.c
  760. *
  761. * On error unwind, but don't propagate the error to the caller
  762. * as it is ok to set up the PCI bus without these files.
  763. */
  764. void pci_create_legacy_files(struct pci_bus *b)
  765. {
  766. int error;
  767. b->legacy_io = kzalloc(sizeof(struct bin_attribute) * 2,
  768. GFP_ATOMIC);
  769. if (!b->legacy_io)
  770. goto kzalloc_err;
  771. sysfs_bin_attr_init(b->legacy_io);
  772. b->legacy_io->attr.name = "legacy_io";
  773. b->legacy_io->size = 0xffff;
  774. b->legacy_io->attr.mode = S_IRUSR | S_IWUSR;
  775. b->legacy_io->read = pci_read_legacy_io;
  776. b->legacy_io->write = pci_write_legacy_io;
  777. b->legacy_io->mmap = pci_mmap_legacy_io;
  778. pci_adjust_legacy_attr(b, pci_mmap_io);
  779. error = device_create_bin_file(&b->dev, b->legacy_io);
  780. if (error)
  781. goto legacy_io_err;
  782. /* Allocated above after the legacy_io struct */
  783. b->legacy_mem = b->legacy_io + 1;
  784. sysfs_bin_attr_init(b->legacy_mem);
  785. b->legacy_mem->attr.name = "legacy_mem";
  786. b->legacy_mem->size = 1024*1024;
  787. b->legacy_mem->attr.mode = S_IRUSR | S_IWUSR;
  788. b->legacy_mem->mmap = pci_mmap_legacy_mem;
  789. pci_adjust_legacy_attr(b, pci_mmap_mem);
  790. error = device_create_bin_file(&b->dev, b->legacy_mem);
  791. if (error)
  792. goto legacy_mem_err;
  793. return;
  794. legacy_mem_err:
  795. device_remove_bin_file(&b->dev, b->legacy_io);
  796. legacy_io_err:
  797. kfree(b->legacy_io);
  798. b->legacy_io = NULL;
  799. kzalloc_err:
  800. printk(KERN_WARNING "pci: warning: could not create legacy I/O port and ISA memory resources to sysfs\n");
  801. return;
  802. }
  803. void pci_remove_legacy_files(struct pci_bus *b)
  804. {
  805. if (b->legacy_io) {
  806. device_remove_bin_file(&b->dev, b->legacy_io);
  807. device_remove_bin_file(&b->dev, b->legacy_mem);
  808. kfree(b->legacy_io); /* both are allocated here */
  809. }
  810. }
  811. #endif /* HAVE_PCI_LEGACY */
  812. #ifdef HAVE_PCI_MMAP
  813. int pci_mmap_fits(struct pci_dev *pdev, int resno, struct vm_area_struct *vma,
  814. enum pci_mmap_api mmap_api)
  815. {
  816. unsigned long nr, start, size, pci_start;
  817. if (pci_resource_len(pdev, resno) == 0)
  818. return 0;
  819. nr = vma_pages(vma);
  820. start = vma->vm_pgoff;
  821. size = ((pci_resource_len(pdev, resno) - 1) >> PAGE_SHIFT) + 1;
  822. pci_start = (mmap_api == PCI_MMAP_PROCFS) ?
  823. pci_resource_start(pdev, resno) >> PAGE_SHIFT : 0;
  824. if (start >= pci_start && start < pci_start + size &&
  825. start + nr <= pci_start + size)
  826. return 1;
  827. return 0;
  828. }
  829. /**
  830. * pci_mmap_resource - map a PCI resource into user memory space
  831. * @kobj: kobject for mapping
  832. * @attr: struct bin_attribute for the file being mapped
  833. * @vma: struct vm_area_struct passed into the mmap
  834. * @write_combine: 1 for write_combine mapping
  835. *
  836. * Use the regular PCI mapping routines to map a PCI resource into userspace.
  837. */
  838. static int pci_mmap_resource(struct kobject *kobj, struct bin_attribute *attr,
  839. struct vm_area_struct *vma, int write_combine)
  840. {
  841. struct pci_dev *pdev = to_pci_dev(kobj_to_dev(kobj));
  842. struct resource *res = attr->private;
  843. enum pci_mmap_state mmap_type;
  844. resource_size_t start, end;
  845. int i;
  846. for (i = 0; i < PCI_ROM_RESOURCE; i++)
  847. if (res == &pdev->resource[i])
  848. break;
  849. if (i >= PCI_ROM_RESOURCE)
  850. return -ENODEV;
  851. if (!pci_mmap_fits(pdev, i, vma, PCI_MMAP_SYSFS)) {
  852. WARN(1, "process \"%s\" tried to map 0x%08lx bytes at page 0x%08lx on %s BAR %d (start 0x%16Lx, size 0x%16Lx)\n",
  853. current->comm, vma->vm_end-vma->vm_start, vma->vm_pgoff,
  854. pci_name(pdev), i,
  855. (u64)pci_resource_start(pdev, i),
  856. (u64)pci_resource_len(pdev, i));
  857. return -EINVAL;
  858. }
  859. /* pci_mmap_page_range() expects the same kind of entry as coming
  860. * from /proc/bus/pci/ which is a "user visible" value. If this is
  861. * different from the resource itself, arch will do necessary fixup.
  862. */
  863. pci_resource_to_user(pdev, i, res, &start, &end);
  864. vma->vm_pgoff += start >> PAGE_SHIFT;
  865. mmap_type = res->flags & IORESOURCE_MEM ? pci_mmap_mem : pci_mmap_io;
  866. if (res->flags & IORESOURCE_MEM && iomem_is_exclusive(start))
  867. return -EINVAL;
  868. return pci_mmap_page_range(pdev, vma, mmap_type, write_combine);
  869. }
  870. static int pci_mmap_resource_uc(struct file *filp, struct kobject *kobj,
  871. struct bin_attribute *attr,
  872. struct vm_area_struct *vma)
  873. {
  874. return pci_mmap_resource(kobj, attr, vma, 0);
  875. }
  876. static int pci_mmap_resource_wc(struct file *filp, struct kobject *kobj,
  877. struct bin_attribute *attr,
  878. struct vm_area_struct *vma)
  879. {
  880. return pci_mmap_resource(kobj, attr, vma, 1);
  881. }
  882. static ssize_t pci_resource_io(struct file *filp, struct kobject *kobj,
  883. struct bin_attribute *attr, char *buf,
  884. loff_t off, size_t count, bool write)
  885. {
  886. struct pci_dev *pdev = to_pci_dev(kobj_to_dev(kobj));
  887. struct resource *res = attr->private;
  888. unsigned long port = off;
  889. int i;
  890. for (i = 0; i < PCI_ROM_RESOURCE; i++)
  891. if (res == &pdev->resource[i])
  892. break;
  893. if (i >= PCI_ROM_RESOURCE)
  894. return -ENODEV;
  895. port += pci_resource_start(pdev, i);
  896. if (port > pci_resource_end(pdev, i))
  897. return 0;
  898. if (port + count - 1 > pci_resource_end(pdev, i))
  899. return -EINVAL;
  900. switch (count) {
  901. case 1:
  902. if (write)
  903. outb(*(u8 *)buf, port);
  904. else
  905. *(u8 *)buf = inb(port);
  906. return 1;
  907. case 2:
  908. if (write)
  909. outw(*(u16 *)buf, port);
  910. else
  911. *(u16 *)buf = inw(port);
  912. return 2;
  913. case 4:
  914. if (write)
  915. outl(*(u32 *)buf, port);
  916. else
  917. *(u32 *)buf = inl(port);
  918. return 4;
  919. }
  920. return -EINVAL;
  921. }
  922. static ssize_t pci_read_resource_io(struct file *filp, struct kobject *kobj,
  923. struct bin_attribute *attr, char *buf,
  924. loff_t off, size_t count)
  925. {
  926. return pci_resource_io(filp, kobj, attr, buf, off, count, false);
  927. }
  928. static ssize_t pci_write_resource_io(struct file *filp, struct kobject *kobj,
  929. struct bin_attribute *attr, char *buf,
  930. loff_t off, size_t count)
  931. {
  932. return pci_resource_io(filp, kobj, attr, buf, off, count, true);
  933. }
  934. /**
  935. * pci_remove_resource_files - cleanup resource files
  936. * @pdev: dev to cleanup
  937. *
  938. * If we created resource files for @pdev, remove them from sysfs and
  939. * free their resources.
  940. */
  941. static void pci_remove_resource_files(struct pci_dev *pdev)
  942. {
  943. int i;
  944. for (i = 0; i < PCI_ROM_RESOURCE; i++) {
  945. struct bin_attribute *res_attr;
  946. res_attr = pdev->res_attr[i];
  947. if (res_attr) {
  948. sysfs_remove_bin_file(&pdev->dev.kobj, res_attr);
  949. kfree(res_attr);
  950. }
  951. res_attr = pdev->res_attr_wc[i];
  952. if (res_attr) {
  953. sysfs_remove_bin_file(&pdev->dev.kobj, res_attr);
  954. kfree(res_attr);
  955. }
  956. }
  957. }
  958. static int pci_create_attr(struct pci_dev *pdev, int num, int write_combine)
  959. {
  960. /* allocate attribute structure, piggyback attribute name */
  961. int name_len = write_combine ? 13 : 10;
  962. struct bin_attribute *res_attr;
  963. int retval;
  964. res_attr = kzalloc(sizeof(*res_attr) + name_len, GFP_ATOMIC);
  965. if (res_attr) {
  966. char *res_attr_name = (char *)(res_attr + 1);
  967. sysfs_bin_attr_init(res_attr);
  968. if (write_combine) {
  969. pdev->res_attr_wc[num] = res_attr;
  970. sprintf(res_attr_name, "resource%d_wc", num);
  971. res_attr->mmap = pci_mmap_resource_wc;
  972. } else {
  973. pdev->res_attr[num] = res_attr;
  974. sprintf(res_attr_name, "resource%d", num);
  975. res_attr->mmap = pci_mmap_resource_uc;
  976. }
  977. if (pci_resource_flags(pdev, num) & IORESOURCE_IO) {
  978. res_attr->read = pci_read_resource_io;
  979. res_attr->write = pci_write_resource_io;
  980. }
  981. res_attr->attr.name = res_attr_name;
  982. res_attr->attr.mode = S_IRUSR | S_IWUSR;
  983. res_attr->size = pci_resource_len(pdev, num);
  984. res_attr->private = &pdev->resource[num];
  985. retval = sysfs_create_bin_file(&pdev->dev.kobj, res_attr);
  986. } else
  987. retval = -ENOMEM;
  988. return retval;
  989. }
  990. /**
  991. * pci_create_resource_files - create resource files in sysfs for @dev
  992. * @pdev: dev in question
  993. *
  994. * Walk the resources in @pdev creating files for each resource available.
  995. */
  996. static int pci_create_resource_files(struct pci_dev *pdev)
  997. {
  998. int i;
  999. int retval;
  1000. /* Expose the PCI resources from this device as files */
  1001. for (i = 0; i < PCI_ROM_RESOURCE; i++) {
  1002. /* skip empty resources */
  1003. if (!pci_resource_len(pdev, i))
  1004. continue;
  1005. retval = pci_create_attr(pdev, i, 0);
  1006. /* for prefetchable resources, create a WC mappable file */
  1007. if (!retval && pdev->resource[i].flags & IORESOURCE_PREFETCH)
  1008. retval = pci_create_attr(pdev, i, 1);
  1009. if (retval) {
  1010. pci_remove_resource_files(pdev);
  1011. return retval;
  1012. }
  1013. }
  1014. return 0;
  1015. }
  1016. #else /* !HAVE_PCI_MMAP */
  1017. int __weak pci_create_resource_files(struct pci_dev *dev) { return 0; }
  1018. void __weak pci_remove_resource_files(struct pci_dev *dev) { return; }
  1019. #endif /* HAVE_PCI_MMAP */
  1020. /**
  1021. * pci_write_rom - used to enable access to the PCI ROM display
  1022. * @filp: sysfs file
  1023. * @kobj: kernel object handle
  1024. * @bin_attr: struct bin_attribute for this file
  1025. * @buf: user input
  1026. * @off: file offset
  1027. * @count: number of byte in input
  1028. *
  1029. * writing anything except 0 enables it
  1030. */
  1031. static ssize_t pci_write_rom(struct file *filp, struct kobject *kobj,
  1032. struct bin_attribute *bin_attr, char *buf,
  1033. loff_t off, size_t count)
  1034. {
  1035. struct pci_dev *pdev = to_pci_dev(kobj_to_dev(kobj));
  1036. if ((off == 0) && (*buf == '0') && (count == 2))
  1037. pdev->rom_attr_enabled = 0;
  1038. else
  1039. pdev->rom_attr_enabled = 1;
  1040. return count;
  1041. }
  1042. /**
  1043. * pci_read_rom - read a PCI ROM
  1044. * @filp: sysfs file
  1045. * @kobj: kernel object handle
  1046. * @bin_attr: struct bin_attribute for this file
  1047. * @buf: where to put the data we read from the ROM
  1048. * @off: file offset
  1049. * @count: number of bytes to read
  1050. *
  1051. * Put @count bytes starting at @off into @buf from the ROM in the PCI
  1052. * device corresponding to @kobj.
  1053. */
  1054. static ssize_t pci_read_rom(struct file *filp, struct kobject *kobj,
  1055. struct bin_attribute *bin_attr, char *buf,
  1056. loff_t off, size_t count)
  1057. {
  1058. struct pci_dev *pdev = to_pci_dev(kobj_to_dev(kobj));
  1059. void __iomem *rom;
  1060. size_t size;
  1061. if (!pdev->rom_attr_enabled)
  1062. return -EINVAL;
  1063. rom = pci_map_rom(pdev, &size); /* size starts out as PCI window size */
  1064. if (!rom || !size)
  1065. return -EIO;
  1066. if (off >= size)
  1067. count = 0;
  1068. else {
  1069. if (off + count > size)
  1070. count = size - off;
  1071. memcpy_fromio(buf, rom + off, count);
  1072. }
  1073. pci_unmap_rom(pdev, rom);
  1074. return count;
  1075. }
  1076. static struct bin_attribute pci_config_attr = {
  1077. .attr = {
  1078. .name = "config",
  1079. .mode = S_IRUGO | S_IWUSR,
  1080. },
  1081. .size = PCI_CFG_SPACE_SIZE,
  1082. .read = pci_read_config,
  1083. .write = pci_write_config,
  1084. };
  1085. static struct bin_attribute pcie_config_attr = {
  1086. .attr = {
  1087. .name = "config",
  1088. .mode = S_IRUGO | S_IWUSR,
  1089. },
  1090. .size = PCI_CFG_SPACE_EXP_SIZE,
  1091. .read = pci_read_config,
  1092. .write = pci_write_config,
  1093. };
  1094. static ssize_t reset_store(struct device *dev, struct device_attribute *attr,
  1095. const char *buf, size_t count)
  1096. {
  1097. struct pci_dev *pdev = to_pci_dev(dev);
  1098. unsigned long val;
  1099. ssize_t result = kstrtoul(buf, 0, &val);
  1100. if (result < 0)
  1101. return result;
  1102. if (val != 1)
  1103. return -EINVAL;
  1104. result = pci_reset_function(pdev);
  1105. if (result < 0)
  1106. return result;
  1107. return count;
  1108. }
  1109. static struct device_attribute reset_attr = __ATTR(reset, 0200, NULL, reset_store);
  1110. static int pci_create_capabilities_sysfs(struct pci_dev *dev)
  1111. {
  1112. int retval;
  1113. struct bin_attribute *attr;
  1114. /* If the device has VPD, try to expose it in sysfs. */
  1115. if (dev->vpd) {
  1116. attr = kzalloc(sizeof(*attr), GFP_ATOMIC);
  1117. if (!attr)
  1118. return -ENOMEM;
  1119. sysfs_bin_attr_init(attr);
  1120. attr->size = dev->vpd->len;
  1121. attr->attr.name = "vpd";
  1122. attr->attr.mode = S_IRUSR | S_IWUSR;
  1123. attr->read = read_vpd_attr;
  1124. attr->write = write_vpd_attr;
  1125. retval = sysfs_create_bin_file(&dev->dev.kobj, attr);
  1126. if (retval) {
  1127. kfree(attr);
  1128. return retval;
  1129. }
  1130. dev->vpd->attr = attr;
  1131. }
  1132. /* Active State Power Management */
  1133. pcie_aspm_create_sysfs_dev_files(dev);
  1134. if (!pci_probe_reset_function(dev)) {
  1135. retval = device_create_file(&dev->dev, &reset_attr);
  1136. if (retval)
  1137. goto error;
  1138. dev->reset_fn = 1;
  1139. }
  1140. return 0;
  1141. error:
  1142. pcie_aspm_remove_sysfs_dev_files(dev);
  1143. if (dev->vpd && dev->vpd->attr) {
  1144. sysfs_remove_bin_file(&dev->dev.kobj, dev->vpd->attr);
  1145. kfree(dev->vpd->attr);
  1146. }
  1147. return retval;
  1148. }
  1149. int __must_check pci_create_sysfs_dev_files(struct pci_dev *pdev)
  1150. {
  1151. int retval;
  1152. int rom_size = 0;
  1153. struct bin_attribute *attr;
  1154. if (!sysfs_initialized)
  1155. return -EACCES;
  1156. if (pdev->cfg_size > PCI_CFG_SPACE_SIZE)
  1157. retval = sysfs_create_bin_file(&pdev->dev.kobj, &pcie_config_attr);
  1158. else
  1159. retval = sysfs_create_bin_file(&pdev->dev.kobj, &pci_config_attr);
  1160. if (retval)
  1161. goto err;
  1162. retval = pci_create_resource_files(pdev);
  1163. if (retval)
  1164. goto err_config_file;
  1165. if (pci_resource_len(pdev, PCI_ROM_RESOURCE))
  1166. rom_size = pci_resource_len(pdev, PCI_ROM_RESOURCE);
  1167. else if (pdev->resource[PCI_ROM_RESOURCE].flags & IORESOURCE_ROM_SHADOW)
  1168. rom_size = 0x20000;
  1169. /* If the device has a ROM, try to expose it in sysfs. */
  1170. if (rom_size) {
  1171. attr = kzalloc(sizeof(*attr), GFP_ATOMIC);
  1172. if (!attr) {
  1173. retval = -ENOMEM;
  1174. goto err_resource_files;
  1175. }
  1176. sysfs_bin_attr_init(attr);
  1177. attr->size = rom_size;
  1178. attr->attr.name = "rom";
  1179. attr->attr.mode = S_IRUSR | S_IWUSR;
  1180. attr->read = pci_read_rom;
  1181. attr->write = pci_write_rom;
  1182. retval = sysfs_create_bin_file(&pdev->dev.kobj, attr);
  1183. if (retval) {
  1184. kfree(attr);
  1185. goto err_resource_files;
  1186. }
  1187. pdev->rom_attr = attr;
  1188. }
  1189. /* add sysfs entries for various capabilities */
  1190. retval = pci_create_capabilities_sysfs(pdev);
  1191. if (retval)
  1192. goto err_rom_file;
  1193. pci_create_firmware_label_files(pdev);
  1194. return 0;
  1195. err_rom_file:
  1196. if (rom_size) {
  1197. sysfs_remove_bin_file(&pdev->dev.kobj, pdev->rom_attr);
  1198. kfree(pdev->rom_attr);
  1199. pdev->rom_attr = NULL;
  1200. }
  1201. err_resource_files:
  1202. pci_remove_resource_files(pdev);
  1203. err_config_file:
  1204. if (pdev->cfg_size > PCI_CFG_SPACE_SIZE)
  1205. sysfs_remove_bin_file(&pdev->dev.kobj, &pcie_config_attr);
  1206. else
  1207. sysfs_remove_bin_file(&pdev->dev.kobj, &pci_config_attr);
  1208. err:
  1209. return retval;
  1210. }
  1211. static void pci_remove_capabilities_sysfs(struct pci_dev *dev)
  1212. {
  1213. if (dev->vpd && dev->vpd->attr) {
  1214. sysfs_remove_bin_file(&dev->dev.kobj, dev->vpd->attr);
  1215. kfree(dev->vpd->attr);
  1216. }
  1217. pcie_aspm_remove_sysfs_dev_files(dev);
  1218. if (dev->reset_fn) {
  1219. device_remove_file(&dev->dev, &reset_attr);
  1220. dev->reset_fn = 0;
  1221. }
  1222. }
  1223. /**
  1224. * pci_remove_sysfs_dev_files - cleanup PCI specific sysfs files
  1225. * @pdev: device whose entries we should free
  1226. *
  1227. * Cleanup when @pdev is removed from sysfs.
  1228. */
  1229. void pci_remove_sysfs_dev_files(struct pci_dev *pdev)
  1230. {
  1231. int rom_size = 0;
  1232. if (!sysfs_initialized)
  1233. return;
  1234. pci_remove_capabilities_sysfs(pdev);
  1235. if (pdev->cfg_size > PCI_CFG_SPACE_SIZE)
  1236. sysfs_remove_bin_file(&pdev->dev.kobj, &pcie_config_attr);
  1237. else
  1238. sysfs_remove_bin_file(&pdev->dev.kobj, &pci_config_attr);
  1239. pci_remove_resource_files(pdev);
  1240. if (pci_resource_len(pdev, PCI_ROM_RESOURCE))
  1241. rom_size = pci_resource_len(pdev, PCI_ROM_RESOURCE);
  1242. else if (pdev->resource[PCI_ROM_RESOURCE].flags & IORESOURCE_ROM_SHADOW)
  1243. rom_size = 0x20000;
  1244. if (rom_size && pdev->rom_attr) {
  1245. sysfs_remove_bin_file(&pdev->dev.kobj, pdev->rom_attr);
  1246. kfree(pdev->rom_attr);
  1247. }
  1248. pci_remove_firmware_label_files(pdev);
  1249. }
  1250. static int __init pci_sysfs_init(void)
  1251. {
  1252. struct pci_dev *pdev = NULL;
  1253. int retval;
  1254. sysfs_initialized = 1;
  1255. for_each_pci_dev(pdev) {
  1256. retval = pci_create_sysfs_dev_files(pdev);
  1257. if (retval) {
  1258. pci_dev_put(pdev);
  1259. return retval;
  1260. }
  1261. }
  1262. return 0;
  1263. }
  1264. late_initcall(pci_sysfs_init);
  1265. static struct attribute *pci_dev_dev_attrs[] = {
  1266. &vga_attr.attr,
  1267. NULL,
  1268. };
  1269. static umode_t pci_dev_attrs_are_visible(struct kobject *kobj,
  1270. struct attribute *a, int n)
  1271. {
  1272. struct device *dev = kobj_to_dev(kobj);
  1273. struct pci_dev *pdev = to_pci_dev(dev);
  1274. if (a == &vga_attr.attr)
  1275. if ((pdev->class >> 8) != PCI_CLASS_DISPLAY_VGA)
  1276. return 0;
  1277. return a->mode;
  1278. }
  1279. static struct attribute *pci_dev_hp_attrs[] = {
  1280. &dev_remove_attr.attr,
  1281. &dev_rescan_attr.attr,
  1282. NULL,
  1283. };
  1284. static umode_t pci_dev_hp_attrs_are_visible(struct kobject *kobj,
  1285. struct attribute *a, int n)
  1286. {
  1287. struct device *dev = kobj_to_dev(kobj);
  1288. struct pci_dev *pdev = to_pci_dev(dev);
  1289. if (pdev->is_virtfn)
  1290. return 0;
  1291. return a->mode;
  1292. }
  1293. static struct attribute_group pci_dev_hp_attr_group = {
  1294. .attrs = pci_dev_hp_attrs,
  1295. .is_visible = pci_dev_hp_attrs_are_visible,
  1296. };
  1297. #ifdef CONFIG_PCI_IOV
  1298. static struct attribute *sriov_dev_attrs[] = {
  1299. &sriov_totalvfs_attr.attr,
  1300. &sriov_numvfs_attr.attr,
  1301. NULL,
  1302. };
  1303. static umode_t sriov_attrs_are_visible(struct kobject *kobj,
  1304. struct attribute *a, int n)
  1305. {
  1306. struct device *dev = kobj_to_dev(kobj);
  1307. if (!dev_is_pf(dev))
  1308. return 0;
  1309. return a->mode;
  1310. }
  1311. static struct attribute_group sriov_dev_attr_group = {
  1312. .attrs = sriov_dev_attrs,
  1313. .is_visible = sriov_attrs_are_visible,
  1314. };
  1315. #endif /* CONFIG_PCI_IOV */
  1316. static struct attribute_group pci_dev_attr_group = {
  1317. .attrs = pci_dev_dev_attrs,
  1318. .is_visible = pci_dev_attrs_are_visible,
  1319. };
  1320. static const struct attribute_group *pci_dev_attr_groups[] = {
  1321. &pci_dev_attr_group,
  1322. &pci_dev_hp_attr_group,
  1323. #ifdef CONFIG_PCI_IOV
  1324. &sriov_dev_attr_group,
  1325. #endif
  1326. NULL,
  1327. };
  1328. struct device_type pci_dev_type = {
  1329. .groups = pci_dev_attr_groups,
  1330. };