rtc-omap.c 16 KB

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  1. /*
  2. * TI OMAP1 Real Time Clock interface for Linux
  3. *
  4. * Copyright (C) 2003 MontaVista Software, Inc.
  5. * Author: George G. Davis <gdavis@mvista.com> or <source@mvista.com>
  6. *
  7. * Copyright (C) 2006 David Brownell (new RTC framework)
  8. *
  9. * This program is free software; you can redistribute it and/or
  10. * modify it under the terms of the GNU General Public License
  11. * as published by the Free Software Foundation; either version
  12. * 2 of the License, or (at your option) any later version.
  13. */
  14. #include <linux/kernel.h>
  15. #include <linux/init.h>
  16. #include <linux/module.h>
  17. #include <linux/ioport.h>
  18. #include <linux/delay.h>
  19. #include <linux/rtc.h>
  20. #include <linux/bcd.h>
  21. #include <linux/platform_device.h>
  22. #include <linux/of.h>
  23. #include <linux/of_device.h>
  24. #include <linux/pm_runtime.h>
  25. #include <linux/io.h>
  26. /* The OMAP1 RTC is a year/month/day/hours/minutes/seconds BCD clock
  27. * with century-range alarm matching, driven by the 32kHz clock.
  28. *
  29. * The main user-visible ways it differs from PC RTCs are by omitting
  30. * "don't care" alarm fields and sub-second periodic IRQs, and having
  31. * an autoadjust mechanism to calibrate to the true oscillator rate.
  32. *
  33. * Board-specific wiring options include using split power mode with
  34. * RTC_OFF_NOFF used as the reset signal (so the RTC won't be reset),
  35. * and wiring RTC_WAKE_INT (so the RTC alarm can wake the system from
  36. * low power modes) for OMAP1 boards (OMAP-L138 has this built into
  37. * the SoC). See the BOARD-SPECIFIC CUSTOMIZATION comment.
  38. */
  39. /* RTC registers */
  40. #define OMAP_RTC_SECONDS_REG 0x00
  41. #define OMAP_RTC_MINUTES_REG 0x04
  42. #define OMAP_RTC_HOURS_REG 0x08
  43. #define OMAP_RTC_DAYS_REG 0x0C
  44. #define OMAP_RTC_MONTHS_REG 0x10
  45. #define OMAP_RTC_YEARS_REG 0x14
  46. #define OMAP_RTC_WEEKS_REG 0x18
  47. #define OMAP_RTC_ALARM_SECONDS_REG 0x20
  48. #define OMAP_RTC_ALARM_MINUTES_REG 0x24
  49. #define OMAP_RTC_ALARM_HOURS_REG 0x28
  50. #define OMAP_RTC_ALARM_DAYS_REG 0x2c
  51. #define OMAP_RTC_ALARM_MONTHS_REG 0x30
  52. #define OMAP_RTC_ALARM_YEARS_REG 0x34
  53. #define OMAP_RTC_CTRL_REG 0x40
  54. #define OMAP_RTC_STATUS_REG 0x44
  55. #define OMAP_RTC_INTERRUPTS_REG 0x48
  56. #define OMAP_RTC_COMP_LSB_REG 0x4c
  57. #define OMAP_RTC_COMP_MSB_REG 0x50
  58. #define OMAP_RTC_OSC_REG 0x54
  59. #define OMAP_RTC_KICK0_REG 0x6c
  60. #define OMAP_RTC_KICK1_REG 0x70
  61. #define OMAP_RTC_IRQWAKEEN 0x7c
  62. /* OMAP_RTC_CTRL_REG bit fields: */
  63. #define OMAP_RTC_CTRL_SPLIT BIT(7)
  64. #define OMAP_RTC_CTRL_DISABLE BIT(6)
  65. #define OMAP_RTC_CTRL_SET_32_COUNTER BIT(5)
  66. #define OMAP_RTC_CTRL_TEST BIT(4)
  67. #define OMAP_RTC_CTRL_MODE_12_24 BIT(3)
  68. #define OMAP_RTC_CTRL_AUTO_COMP BIT(2)
  69. #define OMAP_RTC_CTRL_ROUND_30S BIT(1)
  70. #define OMAP_RTC_CTRL_STOP BIT(0)
  71. /* OMAP_RTC_STATUS_REG bit fields: */
  72. #define OMAP_RTC_STATUS_POWER_UP BIT(7)
  73. #define OMAP_RTC_STATUS_ALARM BIT(6)
  74. #define OMAP_RTC_STATUS_1D_EVENT BIT(5)
  75. #define OMAP_RTC_STATUS_1H_EVENT BIT(4)
  76. #define OMAP_RTC_STATUS_1M_EVENT BIT(3)
  77. #define OMAP_RTC_STATUS_1S_EVENT BIT(2)
  78. #define OMAP_RTC_STATUS_RUN BIT(1)
  79. #define OMAP_RTC_STATUS_BUSY BIT(0)
  80. /* OMAP_RTC_INTERRUPTS_REG bit fields: */
  81. #define OMAP_RTC_INTERRUPTS_IT_ALARM BIT(3)
  82. #define OMAP_RTC_INTERRUPTS_IT_TIMER BIT(2)
  83. /* OMAP_RTC_OSC_REG bit fields: */
  84. #define OMAP_RTC_OSC_32KCLK_EN BIT(6)
  85. /* OMAP_RTC_IRQWAKEEN bit fields: */
  86. #define OMAP_RTC_IRQWAKEEN_ALARM_WAKEEN BIT(1)
  87. /* OMAP_RTC_KICKER values */
  88. #define KICK0_VALUE 0x83e70b13
  89. #define KICK1_VALUE 0x95a4f1e0
  90. struct omap_rtc_device_type {
  91. bool has_32kclk_en;
  92. bool has_kicker;
  93. bool has_irqwakeen;
  94. bool has_power_up_reset;
  95. };
  96. struct omap_rtc {
  97. struct rtc_device *rtc;
  98. void __iomem *base;
  99. int irq_alarm;
  100. int irq_timer;
  101. u8 interrupts_reg;
  102. const struct omap_rtc_device_type *type;
  103. };
  104. static inline u8 rtc_read(struct omap_rtc *rtc, unsigned int reg)
  105. {
  106. return readb(rtc->base + reg);
  107. }
  108. static inline void rtc_write(struct omap_rtc *rtc, unsigned int reg, u8 val)
  109. {
  110. writeb(val, rtc->base + reg);
  111. }
  112. static inline void rtc_writel(struct omap_rtc *rtc, unsigned int reg, u32 val)
  113. {
  114. writel(val, rtc->base + reg);
  115. }
  116. /* we rely on the rtc framework to handle locking (rtc->ops_lock),
  117. * so the only other requirement is that register accesses which
  118. * require BUSY to be clear are made with IRQs locally disabled
  119. */
  120. static void rtc_wait_not_busy(struct omap_rtc *rtc)
  121. {
  122. int count = 0;
  123. u8 status;
  124. /* BUSY may stay active for 1/32768 second (~30 usec) */
  125. for (count = 0; count < 50; count++) {
  126. status = rtc_read(rtc, OMAP_RTC_STATUS_REG);
  127. if ((status & (u8)OMAP_RTC_STATUS_BUSY) == 0)
  128. break;
  129. udelay(1);
  130. }
  131. /* now we have ~15 usec to read/write various registers */
  132. }
  133. static irqreturn_t rtc_irq(int irq, void *dev_id)
  134. {
  135. struct omap_rtc *rtc = dev_id;
  136. unsigned long events = 0;
  137. u8 irq_data;
  138. irq_data = rtc_read(rtc, OMAP_RTC_STATUS_REG);
  139. /* alarm irq? */
  140. if (irq_data & OMAP_RTC_STATUS_ALARM) {
  141. rtc_write(rtc, OMAP_RTC_STATUS_REG, OMAP_RTC_STATUS_ALARM);
  142. events |= RTC_IRQF | RTC_AF;
  143. }
  144. /* 1/sec periodic/update irq? */
  145. if (irq_data & OMAP_RTC_STATUS_1S_EVENT)
  146. events |= RTC_IRQF | RTC_UF;
  147. rtc_update_irq(rtc->rtc, 1, events);
  148. return IRQ_HANDLED;
  149. }
  150. static int omap_rtc_alarm_irq_enable(struct device *dev, unsigned int enabled)
  151. {
  152. struct omap_rtc *rtc = dev_get_drvdata(dev);
  153. u8 reg, irqwake_reg = 0;
  154. local_irq_disable();
  155. rtc_wait_not_busy(rtc);
  156. reg = rtc_read(rtc, OMAP_RTC_INTERRUPTS_REG);
  157. if (rtc->type->has_irqwakeen)
  158. irqwake_reg = rtc_read(rtc, OMAP_RTC_IRQWAKEEN);
  159. if (enabled) {
  160. reg |= OMAP_RTC_INTERRUPTS_IT_ALARM;
  161. irqwake_reg |= OMAP_RTC_IRQWAKEEN_ALARM_WAKEEN;
  162. } else {
  163. reg &= ~OMAP_RTC_INTERRUPTS_IT_ALARM;
  164. irqwake_reg &= ~OMAP_RTC_IRQWAKEEN_ALARM_WAKEEN;
  165. }
  166. rtc_wait_not_busy(rtc);
  167. rtc_write(rtc, OMAP_RTC_INTERRUPTS_REG, reg);
  168. if (rtc->type->has_irqwakeen)
  169. rtc_write(rtc, OMAP_RTC_IRQWAKEEN, irqwake_reg);
  170. local_irq_enable();
  171. return 0;
  172. }
  173. /* this hardware doesn't support "don't care" alarm fields */
  174. static int tm2bcd(struct rtc_time *tm)
  175. {
  176. if (rtc_valid_tm(tm) != 0)
  177. return -EINVAL;
  178. tm->tm_sec = bin2bcd(tm->tm_sec);
  179. tm->tm_min = bin2bcd(tm->tm_min);
  180. tm->tm_hour = bin2bcd(tm->tm_hour);
  181. tm->tm_mday = bin2bcd(tm->tm_mday);
  182. tm->tm_mon = bin2bcd(tm->tm_mon + 1);
  183. /* epoch == 1900 */
  184. if (tm->tm_year < 100 || tm->tm_year > 199)
  185. return -EINVAL;
  186. tm->tm_year = bin2bcd(tm->tm_year - 100);
  187. return 0;
  188. }
  189. static void bcd2tm(struct rtc_time *tm)
  190. {
  191. tm->tm_sec = bcd2bin(tm->tm_sec);
  192. tm->tm_min = bcd2bin(tm->tm_min);
  193. tm->tm_hour = bcd2bin(tm->tm_hour);
  194. tm->tm_mday = bcd2bin(tm->tm_mday);
  195. tm->tm_mon = bcd2bin(tm->tm_mon) - 1;
  196. /* epoch == 1900 */
  197. tm->tm_year = bcd2bin(tm->tm_year) + 100;
  198. }
  199. static int omap_rtc_read_time(struct device *dev, struct rtc_time *tm)
  200. {
  201. struct omap_rtc *rtc = dev_get_drvdata(dev);
  202. /* we don't report wday/yday/isdst ... */
  203. local_irq_disable();
  204. rtc_wait_not_busy(rtc);
  205. tm->tm_sec = rtc_read(rtc, OMAP_RTC_SECONDS_REG);
  206. tm->tm_min = rtc_read(rtc, OMAP_RTC_MINUTES_REG);
  207. tm->tm_hour = rtc_read(rtc, OMAP_RTC_HOURS_REG);
  208. tm->tm_mday = rtc_read(rtc, OMAP_RTC_DAYS_REG);
  209. tm->tm_mon = rtc_read(rtc, OMAP_RTC_MONTHS_REG);
  210. tm->tm_year = rtc_read(rtc, OMAP_RTC_YEARS_REG);
  211. local_irq_enable();
  212. bcd2tm(tm);
  213. return 0;
  214. }
  215. static int omap_rtc_set_time(struct device *dev, struct rtc_time *tm)
  216. {
  217. struct omap_rtc *rtc = dev_get_drvdata(dev);
  218. if (tm2bcd(tm) < 0)
  219. return -EINVAL;
  220. local_irq_disable();
  221. rtc_wait_not_busy(rtc);
  222. rtc_write(rtc, OMAP_RTC_YEARS_REG, tm->tm_year);
  223. rtc_write(rtc, OMAP_RTC_MONTHS_REG, tm->tm_mon);
  224. rtc_write(rtc, OMAP_RTC_DAYS_REG, tm->tm_mday);
  225. rtc_write(rtc, OMAP_RTC_HOURS_REG, tm->tm_hour);
  226. rtc_write(rtc, OMAP_RTC_MINUTES_REG, tm->tm_min);
  227. rtc_write(rtc, OMAP_RTC_SECONDS_REG, tm->tm_sec);
  228. local_irq_enable();
  229. return 0;
  230. }
  231. static int omap_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alm)
  232. {
  233. struct omap_rtc *rtc = dev_get_drvdata(dev);
  234. local_irq_disable();
  235. rtc_wait_not_busy(rtc);
  236. alm->time.tm_sec = rtc_read(rtc, OMAP_RTC_ALARM_SECONDS_REG);
  237. alm->time.tm_min = rtc_read(rtc, OMAP_RTC_ALARM_MINUTES_REG);
  238. alm->time.tm_hour = rtc_read(rtc, OMAP_RTC_ALARM_HOURS_REG);
  239. alm->time.tm_mday = rtc_read(rtc, OMAP_RTC_ALARM_DAYS_REG);
  240. alm->time.tm_mon = rtc_read(rtc, OMAP_RTC_ALARM_MONTHS_REG);
  241. alm->time.tm_year = rtc_read(rtc, OMAP_RTC_ALARM_YEARS_REG);
  242. local_irq_enable();
  243. bcd2tm(&alm->time);
  244. alm->enabled = !!(rtc_read(rtc, OMAP_RTC_INTERRUPTS_REG)
  245. & OMAP_RTC_INTERRUPTS_IT_ALARM);
  246. return 0;
  247. }
  248. static int omap_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alm)
  249. {
  250. struct omap_rtc *rtc = dev_get_drvdata(dev);
  251. u8 reg, irqwake_reg = 0;
  252. if (tm2bcd(&alm->time) < 0)
  253. return -EINVAL;
  254. local_irq_disable();
  255. rtc_wait_not_busy(rtc);
  256. rtc_write(rtc, OMAP_RTC_ALARM_YEARS_REG, alm->time.tm_year);
  257. rtc_write(rtc, OMAP_RTC_ALARM_MONTHS_REG, alm->time.tm_mon);
  258. rtc_write(rtc, OMAP_RTC_ALARM_DAYS_REG, alm->time.tm_mday);
  259. rtc_write(rtc, OMAP_RTC_ALARM_HOURS_REG, alm->time.tm_hour);
  260. rtc_write(rtc, OMAP_RTC_ALARM_MINUTES_REG, alm->time.tm_min);
  261. rtc_write(rtc, OMAP_RTC_ALARM_SECONDS_REG, alm->time.tm_sec);
  262. reg = rtc_read(rtc, OMAP_RTC_INTERRUPTS_REG);
  263. if (rtc->type->has_irqwakeen)
  264. irqwake_reg = rtc_read(rtc, OMAP_RTC_IRQWAKEEN);
  265. if (alm->enabled) {
  266. reg |= OMAP_RTC_INTERRUPTS_IT_ALARM;
  267. irqwake_reg |= OMAP_RTC_IRQWAKEEN_ALARM_WAKEEN;
  268. } else {
  269. reg &= ~OMAP_RTC_INTERRUPTS_IT_ALARM;
  270. irqwake_reg &= ~OMAP_RTC_IRQWAKEEN_ALARM_WAKEEN;
  271. }
  272. rtc_write(rtc, OMAP_RTC_INTERRUPTS_REG, reg);
  273. if (rtc->type->has_irqwakeen)
  274. rtc_write(rtc, OMAP_RTC_IRQWAKEEN, irqwake_reg);
  275. local_irq_enable();
  276. return 0;
  277. }
  278. static struct rtc_class_ops omap_rtc_ops = {
  279. .read_time = omap_rtc_read_time,
  280. .set_time = omap_rtc_set_time,
  281. .read_alarm = omap_rtc_read_alarm,
  282. .set_alarm = omap_rtc_set_alarm,
  283. .alarm_irq_enable = omap_rtc_alarm_irq_enable,
  284. };
  285. static const struct omap_rtc_device_type omap_rtc_default_type = {
  286. .has_power_up_reset = true,
  287. };
  288. static const struct omap_rtc_device_type omap_rtc_am3352_type = {
  289. .has_32kclk_en = true,
  290. .has_kicker = true,
  291. .has_irqwakeen = true,
  292. };
  293. static const struct omap_rtc_device_type omap_rtc_da830_type = {
  294. .has_kicker = true,
  295. };
  296. static const struct platform_device_id omap_rtc_id_table[] = {
  297. {
  298. .name = "omap_rtc",
  299. .driver_data = (kernel_ulong_t)&omap_rtc_default_type,
  300. }, {
  301. .name = "am3352-rtc",
  302. .driver_data = (kernel_ulong_t)&omap_rtc_am3352_type,
  303. }, {
  304. .name = "da830-rtc",
  305. .driver_data = (kernel_ulong_t)&omap_rtc_da830_type,
  306. }, {
  307. /* sentinel */
  308. }
  309. };
  310. MODULE_DEVICE_TABLE(platform, omap_rtc_id_table);
  311. static const struct of_device_id omap_rtc_of_match[] = {
  312. {
  313. .compatible = "ti,am3352-rtc",
  314. .data = &omap_rtc_am3352_type,
  315. }, {
  316. .compatible = "ti,da830-rtc",
  317. .data = &omap_rtc_da830_type,
  318. }, {
  319. /* sentinel */
  320. }
  321. };
  322. MODULE_DEVICE_TABLE(of, omap_rtc_of_match);
  323. static int __init omap_rtc_probe(struct platform_device *pdev)
  324. {
  325. struct omap_rtc *rtc;
  326. struct resource *res;
  327. u8 reg, mask, new_ctrl;
  328. const struct platform_device_id *id_entry;
  329. const struct of_device_id *of_id;
  330. int ret;
  331. rtc = devm_kzalloc(&pdev->dev, sizeof(*rtc), GFP_KERNEL);
  332. if (!rtc)
  333. return -ENOMEM;
  334. of_id = of_match_device(omap_rtc_of_match, &pdev->dev);
  335. if (of_id) {
  336. rtc->type = of_id->data;
  337. } else {
  338. id_entry = platform_get_device_id(pdev);
  339. rtc->type = (void *)id_entry->driver_data;
  340. }
  341. rtc->irq_timer = platform_get_irq(pdev, 0);
  342. if (rtc->irq_timer <= 0)
  343. return -ENOENT;
  344. rtc->irq_alarm = platform_get_irq(pdev, 1);
  345. if (rtc->irq_alarm <= 0)
  346. return -ENOENT;
  347. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  348. rtc->base = devm_ioremap_resource(&pdev->dev, res);
  349. if (IS_ERR(rtc->base))
  350. return PTR_ERR(rtc->base);
  351. platform_set_drvdata(pdev, rtc);
  352. /* Enable the clock/module so that we can access the registers */
  353. pm_runtime_enable(&pdev->dev);
  354. pm_runtime_get_sync(&pdev->dev);
  355. if (rtc->type->has_kicker) {
  356. rtc_writel(rtc, OMAP_RTC_KICK0_REG, KICK0_VALUE);
  357. rtc_writel(rtc, OMAP_RTC_KICK1_REG, KICK1_VALUE);
  358. }
  359. /*
  360. * disable interrupts
  361. *
  362. * NOTE: ALARM2 is not cleared on AM3352 if rtc_write (writeb) is used
  363. */
  364. rtc_writel(rtc, OMAP_RTC_INTERRUPTS_REG, 0);
  365. /* enable RTC functional clock */
  366. if (rtc->type->has_32kclk_en) {
  367. reg = rtc_read(rtc, OMAP_RTC_OSC_REG);
  368. rtc_writel(rtc, OMAP_RTC_OSC_REG,
  369. reg | OMAP_RTC_OSC_32KCLK_EN);
  370. }
  371. /* clear old status */
  372. reg = rtc_read(rtc, OMAP_RTC_STATUS_REG);
  373. mask = OMAP_RTC_STATUS_ALARM;
  374. if (rtc->type->has_power_up_reset) {
  375. mask |= OMAP_RTC_STATUS_POWER_UP;
  376. if (reg & OMAP_RTC_STATUS_POWER_UP)
  377. dev_info(&pdev->dev, "RTC power up reset detected\n");
  378. }
  379. if (reg & mask)
  380. rtc_write(rtc, OMAP_RTC_STATUS_REG, reg & mask);
  381. /* On boards with split power, RTC_ON_NOFF won't reset the RTC */
  382. reg = rtc_read(rtc, OMAP_RTC_CTRL_REG);
  383. if (reg & (u8) OMAP_RTC_CTRL_STOP)
  384. dev_info(&pdev->dev, "already running\n");
  385. /* force to 24 hour mode */
  386. new_ctrl = reg & (OMAP_RTC_CTRL_SPLIT|OMAP_RTC_CTRL_AUTO_COMP);
  387. new_ctrl |= OMAP_RTC_CTRL_STOP;
  388. /* BOARD-SPECIFIC CUSTOMIZATION CAN GO HERE:
  389. *
  390. * - Device wake-up capability setting should come through chip
  391. * init logic. OMAP1 boards should initialize the "wakeup capable"
  392. * flag in the platform device if the board is wired right for
  393. * being woken up by RTC alarm. For OMAP-L138, this capability
  394. * is built into the SoC by the "Deep Sleep" capability.
  395. *
  396. * - Boards wired so RTC_ON_nOFF is used as the reset signal,
  397. * rather than nPWRON_RESET, should forcibly enable split
  398. * power mode. (Some chip errata report that RTC_CTRL_SPLIT
  399. * is write-only, and always reads as zero...)
  400. */
  401. if (new_ctrl & (u8) OMAP_RTC_CTRL_SPLIT)
  402. dev_info(&pdev->dev, "split power mode\n");
  403. if (reg != new_ctrl)
  404. rtc_write(rtc, OMAP_RTC_CTRL_REG, new_ctrl);
  405. device_init_wakeup(&pdev->dev, true);
  406. rtc->rtc = devm_rtc_device_register(&pdev->dev, pdev->name,
  407. &omap_rtc_ops, THIS_MODULE);
  408. if (IS_ERR(rtc->rtc)) {
  409. ret = PTR_ERR(rtc->rtc);
  410. goto err;
  411. }
  412. /* handle periodic and alarm irqs */
  413. ret = devm_request_irq(&pdev->dev, rtc->irq_timer, rtc_irq, 0,
  414. dev_name(&rtc->rtc->dev), rtc);
  415. if (ret)
  416. goto err;
  417. if (rtc->irq_timer != rtc->irq_alarm) {
  418. ret = devm_request_irq(&pdev->dev, rtc->irq_alarm, rtc_irq, 0,
  419. dev_name(&rtc->rtc->dev), rtc);
  420. if (ret)
  421. goto err;
  422. }
  423. return 0;
  424. err:
  425. device_init_wakeup(&pdev->dev, false);
  426. if (rtc->type->has_kicker)
  427. rtc_writel(rtc, OMAP_RTC_KICK0_REG, 0);
  428. pm_runtime_put_sync(&pdev->dev);
  429. pm_runtime_disable(&pdev->dev);
  430. return ret;
  431. }
  432. static int __exit omap_rtc_remove(struct platform_device *pdev)
  433. {
  434. struct omap_rtc *rtc = platform_get_drvdata(pdev);
  435. device_init_wakeup(&pdev->dev, 0);
  436. /* leave rtc running, but disable irqs */
  437. rtc_write(rtc, OMAP_RTC_INTERRUPTS_REG, 0);
  438. if (rtc->type->has_kicker)
  439. rtc_writel(rtc, OMAP_RTC_KICK0_REG, 0);
  440. /* Disable the clock/module */
  441. pm_runtime_put_sync(&pdev->dev);
  442. pm_runtime_disable(&pdev->dev);
  443. return 0;
  444. }
  445. #ifdef CONFIG_PM_SLEEP
  446. static int omap_rtc_suspend(struct device *dev)
  447. {
  448. struct omap_rtc *rtc = dev_get_drvdata(dev);
  449. rtc->interrupts_reg = rtc_read(rtc, OMAP_RTC_INTERRUPTS_REG);
  450. /* FIXME the RTC alarm is not currently acting as a wakeup event
  451. * source on some platforms, and in fact this enable() call is just
  452. * saving a flag that's never used...
  453. */
  454. if (device_may_wakeup(dev))
  455. enable_irq_wake(rtc->irq_alarm);
  456. else
  457. rtc_write(rtc, OMAP_RTC_INTERRUPTS_REG, 0);
  458. /* Disable the clock/module */
  459. pm_runtime_put_sync(dev);
  460. return 0;
  461. }
  462. static int omap_rtc_resume(struct device *dev)
  463. {
  464. struct omap_rtc *rtc = dev_get_drvdata(dev);
  465. /* Enable the clock/module so that we can access the registers */
  466. pm_runtime_get_sync(dev);
  467. if (device_may_wakeup(dev))
  468. disable_irq_wake(rtc->irq_alarm);
  469. else
  470. rtc_write(rtc, OMAP_RTC_INTERRUPTS_REG, rtc->interrupts_reg);
  471. return 0;
  472. }
  473. #endif
  474. static SIMPLE_DEV_PM_OPS(omap_rtc_pm_ops, omap_rtc_suspend, omap_rtc_resume);
  475. static void omap_rtc_shutdown(struct platform_device *pdev)
  476. {
  477. struct omap_rtc *rtc = platform_get_drvdata(pdev);
  478. rtc_write(rtc, OMAP_RTC_INTERRUPTS_REG, 0);
  479. }
  480. static struct platform_driver omap_rtc_driver = {
  481. .remove = __exit_p(omap_rtc_remove),
  482. .shutdown = omap_rtc_shutdown,
  483. .driver = {
  484. .name = "omap_rtc",
  485. .owner = THIS_MODULE,
  486. .pm = &omap_rtc_pm_ops,
  487. .of_match_table = omap_rtc_of_match,
  488. },
  489. .id_table = omap_rtc_id_table,
  490. };
  491. module_platform_driver_probe(omap_rtc_driver, omap_rtc_probe);
  492. MODULE_ALIAS("platform:omap_rtc");
  493. MODULE_AUTHOR("George G. Davis (and others)");
  494. MODULE_LICENSE("GPL");