spi-bitbang.c 12 KB

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  1. /*
  2. * polling/bitbanging SPI master controller driver utilities
  3. *
  4. * This program is free software; you can redistribute it and/or modify
  5. * it under the terms of the GNU General Public License as published by
  6. * the Free Software Foundation; either version 2 of the License, or
  7. * (at your option) any later version.
  8. *
  9. * This program is distributed in the hope that it will be useful,
  10. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  11. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  12. * GNU General Public License for more details.
  13. */
  14. #include <linux/spinlock.h>
  15. #include <linux/workqueue.h>
  16. #include <linux/interrupt.h>
  17. #include <linux/module.h>
  18. #include <linux/delay.h>
  19. #include <linux/errno.h>
  20. #include <linux/platform_device.h>
  21. #include <linux/slab.h>
  22. #include <linux/spi/spi.h>
  23. #include <linux/spi/spi_bitbang.h>
  24. /*----------------------------------------------------------------------*/
  25. /*
  26. * FIRST PART (OPTIONAL): word-at-a-time spi_transfer support.
  27. * Use this for GPIO or shift-register level hardware APIs.
  28. *
  29. * spi_bitbang_cs is in spi_device->controller_state, which is unavailable
  30. * to glue code. These bitbang setup() and cleanup() routines are always
  31. * used, though maybe they're called from controller-aware code.
  32. *
  33. * chipselect() and friends may use spi_device->controller_data and
  34. * controller registers as appropriate.
  35. *
  36. *
  37. * NOTE: SPI controller pins can often be used as GPIO pins instead,
  38. * which means you could use a bitbang driver either to get hardware
  39. * working quickly, or testing for differences that aren't speed related.
  40. */
  41. struct spi_bitbang_cs {
  42. unsigned nsecs; /* (clock cycle time)/2 */
  43. u32 (*txrx_word)(struct spi_device *spi, unsigned nsecs,
  44. u32 word, u8 bits);
  45. unsigned (*txrx_bufs)(struct spi_device *,
  46. u32 (*txrx_word)(
  47. struct spi_device *spi,
  48. unsigned nsecs,
  49. u32 word, u8 bits),
  50. unsigned, struct spi_transfer *);
  51. };
  52. static unsigned bitbang_txrx_8(
  53. struct spi_device *spi,
  54. u32 (*txrx_word)(struct spi_device *spi,
  55. unsigned nsecs,
  56. u32 word, u8 bits),
  57. unsigned ns,
  58. struct spi_transfer *t
  59. ) {
  60. unsigned bits = t->bits_per_word;
  61. unsigned count = t->len;
  62. const u8 *tx = t->tx_buf;
  63. u8 *rx = t->rx_buf;
  64. while (likely(count > 0)) {
  65. u8 word = 0;
  66. if (tx)
  67. word = *tx++;
  68. word = txrx_word(spi, ns, word, bits);
  69. if (rx)
  70. *rx++ = word;
  71. count -= 1;
  72. }
  73. return t->len - count;
  74. }
  75. static unsigned bitbang_txrx_16(
  76. struct spi_device *spi,
  77. u32 (*txrx_word)(struct spi_device *spi,
  78. unsigned nsecs,
  79. u32 word, u8 bits),
  80. unsigned ns,
  81. struct spi_transfer *t
  82. ) {
  83. unsigned bits = t->bits_per_word;
  84. unsigned count = t->len;
  85. const u16 *tx = t->tx_buf;
  86. u16 *rx = t->rx_buf;
  87. while (likely(count > 1)) {
  88. u16 word = 0;
  89. if (tx)
  90. word = *tx++;
  91. word = txrx_word(spi, ns, word, bits);
  92. if (rx)
  93. *rx++ = word;
  94. count -= 2;
  95. }
  96. return t->len - count;
  97. }
  98. static unsigned bitbang_txrx_32(
  99. struct spi_device *spi,
  100. u32 (*txrx_word)(struct spi_device *spi,
  101. unsigned nsecs,
  102. u32 word, u8 bits),
  103. unsigned ns,
  104. struct spi_transfer *t
  105. ) {
  106. unsigned bits = t->bits_per_word;
  107. unsigned count = t->len;
  108. const u32 *tx = t->tx_buf;
  109. u32 *rx = t->rx_buf;
  110. while (likely(count > 3)) {
  111. u32 word = 0;
  112. if (tx)
  113. word = *tx++;
  114. word = txrx_word(spi, ns, word, bits);
  115. if (rx)
  116. *rx++ = word;
  117. count -= 4;
  118. }
  119. return t->len - count;
  120. }
  121. int spi_bitbang_setup_transfer(struct spi_device *spi, struct spi_transfer *t)
  122. {
  123. struct spi_bitbang_cs *cs = spi->controller_state;
  124. u8 bits_per_word;
  125. u32 hz;
  126. if (t) {
  127. bits_per_word = t->bits_per_word;
  128. hz = t->speed_hz;
  129. } else {
  130. bits_per_word = 0;
  131. hz = 0;
  132. }
  133. /* spi_transfer level calls that work per-word */
  134. if (!bits_per_word)
  135. bits_per_word = spi->bits_per_word;
  136. if (bits_per_word <= 8)
  137. cs->txrx_bufs = bitbang_txrx_8;
  138. else if (bits_per_word <= 16)
  139. cs->txrx_bufs = bitbang_txrx_16;
  140. else if (bits_per_word <= 32)
  141. cs->txrx_bufs = bitbang_txrx_32;
  142. else
  143. return -EINVAL;
  144. /* nsecs = (clock period)/2 */
  145. if (!hz)
  146. hz = spi->max_speed_hz;
  147. if (hz) {
  148. cs->nsecs = (1000000000/2) / hz;
  149. if (cs->nsecs > (MAX_UDELAY_MS * 1000 * 1000))
  150. return -EINVAL;
  151. }
  152. return 0;
  153. }
  154. EXPORT_SYMBOL_GPL(spi_bitbang_setup_transfer);
  155. /**
  156. * spi_bitbang_setup - default setup for per-word I/O loops
  157. */
  158. int spi_bitbang_setup(struct spi_device *spi)
  159. {
  160. struct spi_bitbang_cs *cs = spi->controller_state;
  161. struct spi_bitbang *bitbang;
  162. int retval;
  163. unsigned long flags;
  164. bitbang = spi_master_get_devdata(spi->master);
  165. if (!cs) {
  166. cs = kzalloc(sizeof(*cs), GFP_KERNEL);
  167. if (!cs)
  168. return -ENOMEM;
  169. spi->controller_state = cs;
  170. }
  171. /* per-word shift register access, in hardware or bitbanging */
  172. cs->txrx_word = bitbang->txrx_word[spi->mode & (SPI_CPOL|SPI_CPHA)];
  173. if (!cs->txrx_word)
  174. return -EINVAL;
  175. retval = bitbang->setup_transfer(spi, NULL);
  176. if (retval < 0)
  177. return retval;
  178. dev_dbg(&spi->dev, "%s, %u nsec/bit\n", __func__, 2 * cs->nsecs);
  179. /* NOTE we _need_ to call chipselect() early, ideally with adapter
  180. * setup, unless the hardware defaults cooperate to avoid confusion
  181. * between normal (active low) and inverted chipselects.
  182. */
  183. /* deselect chip (low or high) */
  184. spin_lock_irqsave(&bitbang->lock, flags);
  185. if (!bitbang->busy) {
  186. bitbang->chipselect(spi, BITBANG_CS_INACTIVE);
  187. ndelay(cs->nsecs);
  188. }
  189. spin_unlock_irqrestore(&bitbang->lock, flags);
  190. return 0;
  191. }
  192. EXPORT_SYMBOL_GPL(spi_bitbang_setup);
  193. /**
  194. * spi_bitbang_cleanup - default cleanup for per-word I/O loops
  195. */
  196. void spi_bitbang_cleanup(struct spi_device *spi)
  197. {
  198. kfree(spi->controller_state);
  199. }
  200. EXPORT_SYMBOL_GPL(spi_bitbang_cleanup);
  201. static int spi_bitbang_bufs(struct spi_device *spi, struct spi_transfer *t)
  202. {
  203. struct spi_bitbang_cs *cs = spi->controller_state;
  204. unsigned nsecs = cs->nsecs;
  205. return cs->txrx_bufs(spi, cs->txrx_word, nsecs, t);
  206. }
  207. /*----------------------------------------------------------------------*/
  208. /*
  209. * SECOND PART ... simple transfer queue runner.
  210. *
  211. * This costs a task context per controller, running the queue by
  212. * performing each transfer in sequence. Smarter hardware can queue
  213. * several DMA transfers at once, and process several controller queues
  214. * in parallel; this driver doesn't match such hardware very well.
  215. *
  216. * Drivers can provide word-at-a-time i/o primitives, or provide
  217. * transfer-at-a-time ones to leverage dma or fifo hardware.
  218. */
  219. static int spi_bitbang_prepare_hardware(struct spi_master *spi)
  220. {
  221. struct spi_bitbang *bitbang;
  222. unsigned long flags;
  223. bitbang = spi_master_get_devdata(spi);
  224. spin_lock_irqsave(&bitbang->lock, flags);
  225. bitbang->busy = 1;
  226. spin_unlock_irqrestore(&bitbang->lock, flags);
  227. return 0;
  228. }
  229. static int spi_bitbang_transfer_one(struct spi_master *master,
  230. struct spi_message *m)
  231. {
  232. struct spi_bitbang *bitbang;
  233. unsigned nsecs;
  234. struct spi_transfer *t = NULL;
  235. unsigned cs_change;
  236. int status;
  237. int do_setup = -1;
  238. struct spi_device *spi = m->spi;
  239. bitbang = spi_master_get_devdata(master);
  240. /* FIXME this is made-up ... the correct value is known to
  241. * word-at-a-time bitbang code, and presumably chipselect()
  242. * should enforce these requirements too?
  243. */
  244. nsecs = 100;
  245. cs_change = 1;
  246. status = 0;
  247. list_for_each_entry(t, &m->transfers, transfer_list) {
  248. /* override speed or wordsize? */
  249. if (t->speed_hz || t->bits_per_word)
  250. do_setup = 1;
  251. /* init (-1) or override (1) transfer params */
  252. if (do_setup != 0) {
  253. status = bitbang->setup_transfer(spi, t);
  254. if (status < 0)
  255. break;
  256. if (do_setup == -1)
  257. do_setup = 0;
  258. }
  259. /* set up default clock polarity, and activate chip;
  260. * this implicitly updates clock and spi modes as
  261. * previously recorded for this device via setup().
  262. * (and also deselects any other chip that might be
  263. * selected ...)
  264. */
  265. if (cs_change) {
  266. bitbang->chipselect(spi, BITBANG_CS_ACTIVE);
  267. ndelay(nsecs);
  268. }
  269. cs_change = t->cs_change;
  270. if (!t->tx_buf && !t->rx_buf && t->len) {
  271. status = -EINVAL;
  272. break;
  273. }
  274. /* transfer data. the lower level code handles any
  275. * new dma mappings it needs. our caller always gave
  276. * us dma-safe buffers.
  277. */
  278. if (t->len) {
  279. /* REVISIT dma API still needs a designated
  280. * DMA_ADDR_INVALID; ~0 might be better.
  281. */
  282. if (!m->is_dma_mapped)
  283. t->rx_dma = t->tx_dma = 0;
  284. status = bitbang->txrx_bufs(spi, t);
  285. }
  286. if (status > 0)
  287. m->actual_length += status;
  288. if (status != t->len) {
  289. /* always report some kind of error */
  290. if (status >= 0)
  291. status = -EREMOTEIO;
  292. break;
  293. }
  294. status = 0;
  295. /* protocol tweaks before next transfer */
  296. if (t->delay_usecs)
  297. udelay(t->delay_usecs);
  298. if (cs_change &&
  299. !list_is_last(&t->transfer_list, &m->transfers)) {
  300. /* sometimes a short mid-message deselect of the chip
  301. * may be needed to terminate a mode or command
  302. */
  303. ndelay(nsecs);
  304. bitbang->chipselect(spi, BITBANG_CS_INACTIVE);
  305. ndelay(nsecs);
  306. }
  307. }
  308. m->status = status;
  309. /* normally deactivate chipselect ... unless no error and
  310. * cs_change has hinted that the next message will probably
  311. * be for this chip too.
  312. */
  313. if (!(status == 0 && cs_change)) {
  314. ndelay(nsecs);
  315. bitbang->chipselect(spi, BITBANG_CS_INACTIVE);
  316. ndelay(nsecs);
  317. }
  318. spi_finalize_current_message(master);
  319. return status;
  320. }
  321. static int spi_bitbang_unprepare_hardware(struct spi_master *spi)
  322. {
  323. struct spi_bitbang *bitbang;
  324. unsigned long flags;
  325. bitbang = spi_master_get_devdata(spi);
  326. spin_lock_irqsave(&bitbang->lock, flags);
  327. bitbang->busy = 0;
  328. spin_unlock_irqrestore(&bitbang->lock, flags);
  329. return 0;
  330. }
  331. /*----------------------------------------------------------------------*/
  332. /**
  333. * spi_bitbang_start - start up a polled/bitbanging SPI master driver
  334. * @bitbang: driver handle
  335. *
  336. * Caller should have zero-initialized all parts of the structure, and then
  337. * provided callbacks for chip selection and I/O loops. If the master has
  338. * a transfer method, its final step should call spi_bitbang_transfer; or,
  339. * that's the default if the transfer routine is not initialized. It should
  340. * also set up the bus number and number of chipselects.
  341. *
  342. * For i/o loops, provide callbacks either per-word (for bitbanging, or for
  343. * hardware that basically exposes a shift register) or per-spi_transfer
  344. * (which takes better advantage of hardware like fifos or DMA engines).
  345. *
  346. * Drivers using per-word I/O loops should use (or call) spi_bitbang_setup,
  347. * spi_bitbang_cleanup and spi_bitbang_setup_transfer to handle those spi
  348. * master methods. Those methods are the defaults if the bitbang->txrx_bufs
  349. * routine isn't initialized.
  350. *
  351. * This routine registers the spi_master, which will process requests in a
  352. * dedicated task, keeping IRQs unblocked most of the time. To stop
  353. * processing those requests, call spi_bitbang_stop().
  354. *
  355. * On success, this routine will take a reference to master. The caller is
  356. * responsible for calling spi_bitbang_stop() to decrement the reference and
  357. * spi_master_put() as counterpart of spi_alloc_master() to prevent a memory
  358. * leak.
  359. */
  360. int spi_bitbang_start(struct spi_bitbang *bitbang)
  361. {
  362. struct spi_master *master = bitbang->master;
  363. int ret;
  364. if (!master || !bitbang->chipselect)
  365. return -EINVAL;
  366. spin_lock_init(&bitbang->lock);
  367. if (!master->mode_bits)
  368. master->mode_bits = SPI_CPOL | SPI_CPHA | bitbang->flags;
  369. if (master->transfer || master->transfer_one_message)
  370. return -EINVAL;
  371. master->prepare_transfer_hardware = spi_bitbang_prepare_hardware;
  372. master->unprepare_transfer_hardware = spi_bitbang_unprepare_hardware;
  373. master->transfer_one_message = spi_bitbang_transfer_one;
  374. if (!bitbang->txrx_bufs) {
  375. bitbang->use_dma = 0;
  376. bitbang->txrx_bufs = spi_bitbang_bufs;
  377. if (!master->setup) {
  378. if (!bitbang->setup_transfer)
  379. bitbang->setup_transfer =
  380. spi_bitbang_setup_transfer;
  381. master->setup = spi_bitbang_setup;
  382. master->cleanup = spi_bitbang_cleanup;
  383. }
  384. }
  385. /* driver may get busy before register() returns, especially
  386. * if someone registered boardinfo for devices
  387. */
  388. ret = spi_register_master(spi_master_get(master));
  389. if (ret)
  390. spi_master_put(master);
  391. return 0;
  392. }
  393. EXPORT_SYMBOL_GPL(spi_bitbang_start);
  394. /**
  395. * spi_bitbang_stop - stops the task providing spi communication
  396. */
  397. void spi_bitbang_stop(struct spi_bitbang *bitbang)
  398. {
  399. spi_unregister_master(bitbang->master);
  400. }
  401. EXPORT_SYMBOL_GPL(spi_bitbang_stop);
  402. MODULE_LICENSE("GPL");