ocrdma_verbs.c 80 KB

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  1. /*******************************************************************
  2. * This file is part of the Emulex RoCE Device Driver for *
  3. * RoCE (RDMA over Converged Ethernet) adapters. *
  4. * Copyright (C) 2008-2012 Emulex. All rights reserved. *
  5. * EMULEX and SLI are trademarks of Emulex. *
  6. * www.emulex.com *
  7. * *
  8. * This program is free software; you can redistribute it and/or *
  9. * modify it under the terms of version 2 of the GNU General *
  10. * Public License as published by the Free Software Foundation. *
  11. * This program is distributed in the hope that it will be useful. *
  12. * ALL EXPRESS OR IMPLIED CONDITIONS, REPRESENTATIONS AND *
  13. * WARRANTIES, INCLUDING ANY IMPLIED WARRANTY OF MERCHANTABILITY, *
  14. * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT, ARE *
  15. * DISCLAIMED, EXCEPT TO THE EXTENT THAT SUCH DISCLAIMERS ARE HELD *
  16. * TO BE LEGALLY INVALID. See the GNU General Public License for *
  17. * more details, a copy of which can be found in the file COPYING *
  18. * included with this package. *
  19. *
  20. * Contact Information:
  21. * linux-drivers@emulex.com
  22. *
  23. * Emulex
  24. * 3333 Susan Street
  25. * Costa Mesa, CA 92626
  26. *******************************************************************/
  27. #include <linux/dma-mapping.h>
  28. #include <rdma/ib_verbs.h>
  29. #include <rdma/ib_user_verbs.h>
  30. #include <rdma/iw_cm.h>
  31. #include <rdma/ib_umem.h>
  32. #include <rdma/ib_addr.h>
  33. #include "ocrdma.h"
  34. #include "ocrdma_hw.h"
  35. #include "ocrdma_verbs.h"
  36. #include "ocrdma_abi.h"
  37. int ocrdma_query_pkey(struct ib_device *ibdev, u8 port, u16 index, u16 *pkey)
  38. {
  39. if (index > 1)
  40. return -EINVAL;
  41. *pkey = 0xffff;
  42. return 0;
  43. }
  44. int ocrdma_query_gid(struct ib_device *ibdev, u8 port,
  45. int index, union ib_gid *sgid)
  46. {
  47. struct ocrdma_dev *dev;
  48. dev = get_ocrdma_dev(ibdev);
  49. memset(sgid, 0, sizeof(*sgid));
  50. if (index > OCRDMA_MAX_SGID)
  51. return -EINVAL;
  52. memcpy(sgid, &dev->sgid_tbl[index], sizeof(*sgid));
  53. return 0;
  54. }
  55. int ocrdma_query_device(struct ib_device *ibdev, struct ib_device_attr *attr)
  56. {
  57. struct ocrdma_dev *dev = get_ocrdma_dev(ibdev);
  58. memset(attr, 0, sizeof *attr);
  59. memcpy(&attr->fw_ver, &dev->attr.fw_ver[0],
  60. min(sizeof(dev->attr.fw_ver), sizeof(attr->fw_ver)));
  61. ocrdma_get_guid(dev, (u8 *)&attr->sys_image_guid);
  62. attr->max_mr_size = dev->attr.max_mr_size;
  63. attr->page_size_cap = 0xffff000;
  64. attr->vendor_id = dev->nic_info.pdev->vendor;
  65. attr->vendor_part_id = dev->nic_info.pdev->device;
  66. attr->hw_ver = dev->asic_id;
  67. attr->max_qp = dev->attr.max_qp;
  68. attr->max_ah = OCRDMA_MAX_AH;
  69. attr->max_qp_wr = dev->attr.max_wqe;
  70. attr->device_cap_flags = IB_DEVICE_CURR_QP_STATE_MOD |
  71. IB_DEVICE_RC_RNR_NAK_GEN |
  72. IB_DEVICE_SHUTDOWN_PORT |
  73. IB_DEVICE_SYS_IMAGE_GUID |
  74. IB_DEVICE_LOCAL_DMA_LKEY |
  75. IB_DEVICE_MEM_MGT_EXTENSIONS;
  76. attr->max_sge = min(dev->attr.max_send_sge, dev->attr.max_srq_sge);
  77. attr->max_sge_rd = 0;
  78. attr->max_cq = dev->attr.max_cq;
  79. attr->max_cqe = dev->attr.max_cqe;
  80. attr->max_mr = dev->attr.max_mr;
  81. attr->max_mw = dev->attr.max_mw;
  82. attr->max_pd = dev->attr.max_pd;
  83. attr->atomic_cap = 0;
  84. attr->max_fmr = 0;
  85. attr->max_map_per_fmr = 0;
  86. attr->max_qp_rd_atom =
  87. min(dev->attr.max_ord_per_qp, dev->attr.max_ird_per_qp);
  88. attr->max_qp_init_rd_atom = dev->attr.max_ord_per_qp;
  89. attr->max_srq = dev->attr.max_srq;
  90. attr->max_srq_sge = dev->attr.max_srq_sge;
  91. attr->max_srq_wr = dev->attr.max_rqe;
  92. attr->local_ca_ack_delay = dev->attr.local_ca_ack_delay;
  93. attr->max_fast_reg_page_list_len = dev->attr.max_pages_per_frmr;
  94. attr->max_pkeys = 1;
  95. return 0;
  96. }
  97. static inline void get_link_speed_and_width(struct ocrdma_dev *dev,
  98. u8 *ib_speed, u8 *ib_width)
  99. {
  100. int status;
  101. u8 speed;
  102. status = ocrdma_mbx_get_link_speed(dev, &speed);
  103. if (status)
  104. speed = OCRDMA_PHYS_LINK_SPEED_ZERO;
  105. switch (speed) {
  106. case OCRDMA_PHYS_LINK_SPEED_1GBPS:
  107. *ib_speed = IB_SPEED_SDR;
  108. *ib_width = IB_WIDTH_1X;
  109. break;
  110. case OCRDMA_PHYS_LINK_SPEED_10GBPS:
  111. *ib_speed = IB_SPEED_QDR;
  112. *ib_width = IB_WIDTH_1X;
  113. break;
  114. case OCRDMA_PHYS_LINK_SPEED_20GBPS:
  115. *ib_speed = IB_SPEED_DDR;
  116. *ib_width = IB_WIDTH_4X;
  117. break;
  118. case OCRDMA_PHYS_LINK_SPEED_40GBPS:
  119. *ib_speed = IB_SPEED_QDR;
  120. *ib_width = IB_WIDTH_4X;
  121. break;
  122. default:
  123. /* Unsupported */
  124. *ib_speed = IB_SPEED_SDR;
  125. *ib_width = IB_WIDTH_1X;
  126. }
  127. }
  128. int ocrdma_query_port(struct ib_device *ibdev,
  129. u8 port, struct ib_port_attr *props)
  130. {
  131. enum ib_port_state port_state;
  132. struct ocrdma_dev *dev;
  133. struct net_device *netdev;
  134. dev = get_ocrdma_dev(ibdev);
  135. if (port > 1) {
  136. pr_err("%s(%d) invalid_port=0x%x\n", __func__,
  137. dev->id, port);
  138. return -EINVAL;
  139. }
  140. netdev = dev->nic_info.netdev;
  141. if (netif_running(netdev) && netif_oper_up(netdev)) {
  142. port_state = IB_PORT_ACTIVE;
  143. props->phys_state = 5;
  144. } else {
  145. port_state = IB_PORT_DOWN;
  146. props->phys_state = 3;
  147. }
  148. props->max_mtu = IB_MTU_4096;
  149. props->active_mtu = iboe_get_mtu(netdev->mtu);
  150. props->lid = 0;
  151. props->lmc = 0;
  152. props->sm_lid = 0;
  153. props->sm_sl = 0;
  154. props->state = port_state;
  155. props->port_cap_flags =
  156. IB_PORT_CM_SUP |
  157. IB_PORT_REINIT_SUP |
  158. IB_PORT_DEVICE_MGMT_SUP | IB_PORT_VENDOR_CLASS_SUP | IB_PORT_IP_BASED_GIDS;
  159. props->gid_tbl_len = OCRDMA_MAX_SGID;
  160. props->pkey_tbl_len = 1;
  161. props->bad_pkey_cntr = 0;
  162. props->qkey_viol_cntr = 0;
  163. get_link_speed_and_width(dev, &props->active_speed,
  164. &props->active_width);
  165. props->max_msg_sz = 0x80000000;
  166. props->max_vl_num = 4;
  167. return 0;
  168. }
  169. int ocrdma_modify_port(struct ib_device *ibdev, u8 port, int mask,
  170. struct ib_port_modify *props)
  171. {
  172. struct ocrdma_dev *dev;
  173. dev = get_ocrdma_dev(ibdev);
  174. if (port > 1) {
  175. pr_err("%s(%d) invalid_port=0x%x\n", __func__, dev->id, port);
  176. return -EINVAL;
  177. }
  178. return 0;
  179. }
  180. static int ocrdma_add_mmap(struct ocrdma_ucontext *uctx, u64 phy_addr,
  181. unsigned long len)
  182. {
  183. struct ocrdma_mm *mm;
  184. mm = kzalloc(sizeof(*mm), GFP_KERNEL);
  185. if (mm == NULL)
  186. return -ENOMEM;
  187. mm->key.phy_addr = phy_addr;
  188. mm->key.len = len;
  189. INIT_LIST_HEAD(&mm->entry);
  190. mutex_lock(&uctx->mm_list_lock);
  191. list_add_tail(&mm->entry, &uctx->mm_head);
  192. mutex_unlock(&uctx->mm_list_lock);
  193. return 0;
  194. }
  195. static void ocrdma_del_mmap(struct ocrdma_ucontext *uctx, u64 phy_addr,
  196. unsigned long len)
  197. {
  198. struct ocrdma_mm *mm, *tmp;
  199. mutex_lock(&uctx->mm_list_lock);
  200. list_for_each_entry_safe(mm, tmp, &uctx->mm_head, entry) {
  201. if (len != mm->key.len && phy_addr != mm->key.phy_addr)
  202. continue;
  203. list_del(&mm->entry);
  204. kfree(mm);
  205. break;
  206. }
  207. mutex_unlock(&uctx->mm_list_lock);
  208. }
  209. static bool ocrdma_search_mmap(struct ocrdma_ucontext *uctx, u64 phy_addr,
  210. unsigned long len)
  211. {
  212. bool found = false;
  213. struct ocrdma_mm *mm;
  214. mutex_lock(&uctx->mm_list_lock);
  215. list_for_each_entry(mm, &uctx->mm_head, entry) {
  216. if (len != mm->key.len && phy_addr != mm->key.phy_addr)
  217. continue;
  218. found = true;
  219. break;
  220. }
  221. mutex_unlock(&uctx->mm_list_lock);
  222. return found;
  223. }
  224. static struct ocrdma_pd *_ocrdma_alloc_pd(struct ocrdma_dev *dev,
  225. struct ocrdma_ucontext *uctx,
  226. struct ib_udata *udata)
  227. {
  228. struct ocrdma_pd *pd = NULL;
  229. int status = 0;
  230. pd = kzalloc(sizeof(*pd), GFP_KERNEL);
  231. if (!pd)
  232. return ERR_PTR(-ENOMEM);
  233. if (udata && uctx) {
  234. pd->dpp_enabled =
  235. ocrdma_get_asic_type(dev) == OCRDMA_ASIC_GEN_SKH_R;
  236. pd->num_dpp_qp =
  237. pd->dpp_enabled ? (dev->nic_info.db_page_size /
  238. dev->attr.wqe_size) : 0;
  239. }
  240. retry:
  241. status = ocrdma_mbx_alloc_pd(dev, pd);
  242. if (status) {
  243. if (pd->dpp_enabled) {
  244. pd->dpp_enabled = false;
  245. pd->num_dpp_qp = 0;
  246. goto retry;
  247. } else {
  248. kfree(pd);
  249. return ERR_PTR(status);
  250. }
  251. }
  252. return pd;
  253. }
  254. static inline int is_ucontext_pd(struct ocrdma_ucontext *uctx,
  255. struct ocrdma_pd *pd)
  256. {
  257. return (uctx->cntxt_pd == pd ? true : false);
  258. }
  259. static int _ocrdma_dealloc_pd(struct ocrdma_dev *dev,
  260. struct ocrdma_pd *pd)
  261. {
  262. int status = 0;
  263. status = ocrdma_mbx_dealloc_pd(dev, pd);
  264. kfree(pd);
  265. return status;
  266. }
  267. static int ocrdma_alloc_ucontext_pd(struct ocrdma_dev *dev,
  268. struct ocrdma_ucontext *uctx,
  269. struct ib_udata *udata)
  270. {
  271. int status = 0;
  272. uctx->cntxt_pd = _ocrdma_alloc_pd(dev, uctx, udata);
  273. if (IS_ERR(uctx->cntxt_pd)) {
  274. status = PTR_ERR(uctx->cntxt_pd);
  275. uctx->cntxt_pd = NULL;
  276. goto err;
  277. }
  278. uctx->cntxt_pd->uctx = uctx;
  279. uctx->cntxt_pd->ibpd.device = &dev->ibdev;
  280. err:
  281. return status;
  282. }
  283. static int ocrdma_dealloc_ucontext_pd(struct ocrdma_ucontext *uctx)
  284. {
  285. int status = 0;
  286. struct ocrdma_pd *pd = uctx->cntxt_pd;
  287. struct ocrdma_dev *dev = get_ocrdma_dev(pd->ibpd.device);
  288. if (uctx->pd_in_use) {
  289. pr_err("%s(%d) Freeing in use pdid=0x%x.\n",
  290. __func__, dev->id, pd->id);
  291. }
  292. uctx->cntxt_pd = NULL;
  293. status = _ocrdma_dealloc_pd(dev, pd);
  294. return status;
  295. }
  296. static struct ocrdma_pd *ocrdma_get_ucontext_pd(struct ocrdma_ucontext *uctx)
  297. {
  298. struct ocrdma_pd *pd = NULL;
  299. mutex_lock(&uctx->mm_list_lock);
  300. if (!uctx->pd_in_use) {
  301. uctx->pd_in_use = true;
  302. pd = uctx->cntxt_pd;
  303. }
  304. mutex_unlock(&uctx->mm_list_lock);
  305. return pd;
  306. }
  307. static void ocrdma_release_ucontext_pd(struct ocrdma_ucontext *uctx)
  308. {
  309. mutex_lock(&uctx->mm_list_lock);
  310. uctx->pd_in_use = false;
  311. mutex_unlock(&uctx->mm_list_lock);
  312. }
  313. struct ib_ucontext *ocrdma_alloc_ucontext(struct ib_device *ibdev,
  314. struct ib_udata *udata)
  315. {
  316. int status;
  317. struct ocrdma_ucontext *ctx;
  318. struct ocrdma_alloc_ucontext_resp resp;
  319. struct ocrdma_dev *dev = get_ocrdma_dev(ibdev);
  320. struct pci_dev *pdev = dev->nic_info.pdev;
  321. u32 map_len = roundup(sizeof(u32) * 2048, PAGE_SIZE);
  322. if (!udata)
  323. return ERR_PTR(-EFAULT);
  324. ctx = kzalloc(sizeof(*ctx), GFP_KERNEL);
  325. if (!ctx)
  326. return ERR_PTR(-ENOMEM);
  327. INIT_LIST_HEAD(&ctx->mm_head);
  328. mutex_init(&ctx->mm_list_lock);
  329. ctx->ah_tbl.va = dma_alloc_coherent(&pdev->dev, map_len,
  330. &ctx->ah_tbl.pa, GFP_KERNEL);
  331. if (!ctx->ah_tbl.va) {
  332. kfree(ctx);
  333. return ERR_PTR(-ENOMEM);
  334. }
  335. memset(ctx->ah_tbl.va, 0, map_len);
  336. ctx->ah_tbl.len = map_len;
  337. memset(&resp, 0, sizeof(resp));
  338. resp.ah_tbl_len = ctx->ah_tbl.len;
  339. resp.ah_tbl_page = virt_to_phys(ctx->ah_tbl.va);
  340. status = ocrdma_add_mmap(ctx, resp.ah_tbl_page, resp.ah_tbl_len);
  341. if (status)
  342. goto map_err;
  343. status = ocrdma_alloc_ucontext_pd(dev, ctx, udata);
  344. if (status)
  345. goto pd_err;
  346. resp.dev_id = dev->id;
  347. resp.max_inline_data = dev->attr.max_inline_data;
  348. resp.wqe_size = dev->attr.wqe_size;
  349. resp.rqe_size = dev->attr.rqe_size;
  350. resp.dpp_wqe_size = dev->attr.wqe_size;
  351. memcpy(resp.fw_ver, dev->attr.fw_ver, sizeof(resp.fw_ver));
  352. status = ib_copy_to_udata(udata, &resp, sizeof(resp));
  353. if (status)
  354. goto cpy_err;
  355. return &ctx->ibucontext;
  356. cpy_err:
  357. pd_err:
  358. ocrdma_del_mmap(ctx, ctx->ah_tbl.pa, ctx->ah_tbl.len);
  359. map_err:
  360. dma_free_coherent(&pdev->dev, ctx->ah_tbl.len, ctx->ah_tbl.va,
  361. ctx->ah_tbl.pa);
  362. kfree(ctx);
  363. return ERR_PTR(status);
  364. }
  365. int ocrdma_dealloc_ucontext(struct ib_ucontext *ibctx)
  366. {
  367. int status = 0;
  368. struct ocrdma_mm *mm, *tmp;
  369. struct ocrdma_ucontext *uctx = get_ocrdma_ucontext(ibctx);
  370. struct ocrdma_dev *dev = get_ocrdma_dev(ibctx->device);
  371. struct pci_dev *pdev = dev->nic_info.pdev;
  372. status = ocrdma_dealloc_ucontext_pd(uctx);
  373. ocrdma_del_mmap(uctx, uctx->ah_tbl.pa, uctx->ah_tbl.len);
  374. dma_free_coherent(&pdev->dev, uctx->ah_tbl.len, uctx->ah_tbl.va,
  375. uctx->ah_tbl.pa);
  376. list_for_each_entry_safe(mm, tmp, &uctx->mm_head, entry) {
  377. list_del(&mm->entry);
  378. kfree(mm);
  379. }
  380. kfree(uctx);
  381. return status;
  382. }
  383. int ocrdma_mmap(struct ib_ucontext *context, struct vm_area_struct *vma)
  384. {
  385. struct ocrdma_ucontext *ucontext = get_ocrdma_ucontext(context);
  386. struct ocrdma_dev *dev = get_ocrdma_dev(context->device);
  387. unsigned long vm_page = vma->vm_pgoff << PAGE_SHIFT;
  388. u64 unmapped_db = (u64) dev->nic_info.unmapped_db;
  389. unsigned long len = (vma->vm_end - vma->vm_start);
  390. int status = 0;
  391. bool found;
  392. if (vma->vm_start & (PAGE_SIZE - 1))
  393. return -EINVAL;
  394. found = ocrdma_search_mmap(ucontext, vma->vm_pgoff << PAGE_SHIFT, len);
  395. if (!found)
  396. return -EINVAL;
  397. if ((vm_page >= unmapped_db) && (vm_page <= (unmapped_db +
  398. dev->nic_info.db_total_size)) &&
  399. (len <= dev->nic_info.db_page_size)) {
  400. if (vma->vm_flags & VM_READ)
  401. return -EPERM;
  402. vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
  403. status = io_remap_pfn_range(vma, vma->vm_start, vma->vm_pgoff,
  404. len, vma->vm_page_prot);
  405. } else if (dev->nic_info.dpp_unmapped_len &&
  406. (vm_page >= (u64) dev->nic_info.dpp_unmapped_addr) &&
  407. (vm_page <= (u64) (dev->nic_info.dpp_unmapped_addr +
  408. dev->nic_info.dpp_unmapped_len)) &&
  409. (len <= dev->nic_info.dpp_unmapped_len)) {
  410. if (vma->vm_flags & VM_READ)
  411. return -EPERM;
  412. vma->vm_page_prot = pgprot_writecombine(vma->vm_page_prot);
  413. status = io_remap_pfn_range(vma, vma->vm_start, vma->vm_pgoff,
  414. len, vma->vm_page_prot);
  415. } else {
  416. status = remap_pfn_range(vma, vma->vm_start,
  417. vma->vm_pgoff, len, vma->vm_page_prot);
  418. }
  419. return status;
  420. }
  421. static int ocrdma_copy_pd_uresp(struct ocrdma_dev *dev, struct ocrdma_pd *pd,
  422. struct ib_ucontext *ib_ctx,
  423. struct ib_udata *udata)
  424. {
  425. int status;
  426. u64 db_page_addr;
  427. u64 dpp_page_addr = 0;
  428. u32 db_page_size;
  429. struct ocrdma_alloc_pd_uresp rsp;
  430. struct ocrdma_ucontext *uctx = get_ocrdma_ucontext(ib_ctx);
  431. memset(&rsp, 0, sizeof(rsp));
  432. rsp.id = pd->id;
  433. rsp.dpp_enabled = pd->dpp_enabled;
  434. db_page_addr = ocrdma_get_db_addr(dev, pd->id);
  435. db_page_size = dev->nic_info.db_page_size;
  436. status = ocrdma_add_mmap(uctx, db_page_addr, db_page_size);
  437. if (status)
  438. return status;
  439. if (pd->dpp_enabled) {
  440. dpp_page_addr = dev->nic_info.dpp_unmapped_addr +
  441. (pd->id * PAGE_SIZE);
  442. status = ocrdma_add_mmap(uctx, dpp_page_addr,
  443. PAGE_SIZE);
  444. if (status)
  445. goto dpp_map_err;
  446. rsp.dpp_page_addr_hi = upper_32_bits(dpp_page_addr);
  447. rsp.dpp_page_addr_lo = dpp_page_addr;
  448. }
  449. status = ib_copy_to_udata(udata, &rsp, sizeof(rsp));
  450. if (status)
  451. goto ucopy_err;
  452. pd->uctx = uctx;
  453. return 0;
  454. ucopy_err:
  455. if (pd->dpp_enabled)
  456. ocrdma_del_mmap(pd->uctx, dpp_page_addr, PAGE_SIZE);
  457. dpp_map_err:
  458. ocrdma_del_mmap(pd->uctx, db_page_addr, db_page_size);
  459. return status;
  460. }
  461. struct ib_pd *ocrdma_alloc_pd(struct ib_device *ibdev,
  462. struct ib_ucontext *context,
  463. struct ib_udata *udata)
  464. {
  465. struct ocrdma_dev *dev = get_ocrdma_dev(ibdev);
  466. struct ocrdma_pd *pd;
  467. struct ocrdma_ucontext *uctx = NULL;
  468. int status;
  469. u8 is_uctx_pd = false;
  470. if (udata && context) {
  471. uctx = get_ocrdma_ucontext(context);
  472. pd = ocrdma_get_ucontext_pd(uctx);
  473. if (pd) {
  474. is_uctx_pd = true;
  475. goto pd_mapping;
  476. }
  477. }
  478. pd = _ocrdma_alloc_pd(dev, uctx, udata);
  479. if (IS_ERR(pd)) {
  480. status = PTR_ERR(pd);
  481. goto exit;
  482. }
  483. pd_mapping:
  484. if (udata && context) {
  485. status = ocrdma_copy_pd_uresp(dev, pd, context, udata);
  486. if (status)
  487. goto err;
  488. }
  489. return &pd->ibpd;
  490. err:
  491. if (is_uctx_pd) {
  492. ocrdma_release_ucontext_pd(uctx);
  493. } else {
  494. status = ocrdma_mbx_dealloc_pd(dev, pd);
  495. kfree(pd);
  496. }
  497. exit:
  498. return ERR_PTR(status);
  499. }
  500. int ocrdma_dealloc_pd(struct ib_pd *ibpd)
  501. {
  502. struct ocrdma_pd *pd = get_ocrdma_pd(ibpd);
  503. struct ocrdma_dev *dev = get_ocrdma_dev(ibpd->device);
  504. struct ocrdma_ucontext *uctx = NULL;
  505. int status = 0;
  506. u64 usr_db;
  507. uctx = pd->uctx;
  508. if (uctx) {
  509. u64 dpp_db = dev->nic_info.dpp_unmapped_addr +
  510. (pd->id * PAGE_SIZE);
  511. if (pd->dpp_enabled)
  512. ocrdma_del_mmap(pd->uctx, dpp_db, PAGE_SIZE);
  513. usr_db = ocrdma_get_db_addr(dev, pd->id);
  514. ocrdma_del_mmap(pd->uctx, usr_db, dev->nic_info.db_page_size);
  515. if (is_ucontext_pd(uctx, pd)) {
  516. ocrdma_release_ucontext_pd(uctx);
  517. return status;
  518. }
  519. }
  520. status = _ocrdma_dealloc_pd(dev, pd);
  521. return status;
  522. }
  523. static int ocrdma_alloc_lkey(struct ocrdma_dev *dev, struct ocrdma_mr *mr,
  524. u32 pdid, int acc, u32 num_pbls, u32 addr_check)
  525. {
  526. int status;
  527. mr->hwmr.fr_mr = 0;
  528. mr->hwmr.local_rd = 1;
  529. mr->hwmr.remote_rd = (acc & IB_ACCESS_REMOTE_READ) ? 1 : 0;
  530. mr->hwmr.remote_wr = (acc & IB_ACCESS_REMOTE_WRITE) ? 1 : 0;
  531. mr->hwmr.local_wr = (acc & IB_ACCESS_LOCAL_WRITE) ? 1 : 0;
  532. mr->hwmr.mw_bind = (acc & IB_ACCESS_MW_BIND) ? 1 : 0;
  533. mr->hwmr.remote_atomic = (acc & IB_ACCESS_REMOTE_ATOMIC) ? 1 : 0;
  534. mr->hwmr.num_pbls = num_pbls;
  535. status = ocrdma_mbx_alloc_lkey(dev, &mr->hwmr, pdid, addr_check);
  536. if (status)
  537. return status;
  538. mr->ibmr.lkey = mr->hwmr.lkey;
  539. if (mr->hwmr.remote_wr || mr->hwmr.remote_rd)
  540. mr->ibmr.rkey = mr->hwmr.lkey;
  541. return 0;
  542. }
  543. struct ib_mr *ocrdma_get_dma_mr(struct ib_pd *ibpd, int acc)
  544. {
  545. int status;
  546. struct ocrdma_mr *mr;
  547. struct ocrdma_pd *pd = get_ocrdma_pd(ibpd);
  548. struct ocrdma_dev *dev = get_ocrdma_dev(ibpd->device);
  549. if (acc & IB_ACCESS_REMOTE_WRITE && !(acc & IB_ACCESS_LOCAL_WRITE)) {
  550. pr_err("%s err, invalid access rights\n", __func__);
  551. return ERR_PTR(-EINVAL);
  552. }
  553. mr = kzalloc(sizeof(*mr), GFP_KERNEL);
  554. if (!mr)
  555. return ERR_PTR(-ENOMEM);
  556. status = ocrdma_alloc_lkey(dev, mr, pd->id, acc, 0,
  557. OCRDMA_ADDR_CHECK_DISABLE);
  558. if (status) {
  559. kfree(mr);
  560. return ERR_PTR(status);
  561. }
  562. return &mr->ibmr;
  563. }
  564. static void ocrdma_free_mr_pbl_tbl(struct ocrdma_dev *dev,
  565. struct ocrdma_hw_mr *mr)
  566. {
  567. struct pci_dev *pdev = dev->nic_info.pdev;
  568. int i = 0;
  569. if (mr->pbl_table) {
  570. for (i = 0; i < mr->num_pbls; i++) {
  571. if (!mr->pbl_table[i].va)
  572. continue;
  573. dma_free_coherent(&pdev->dev, mr->pbl_size,
  574. mr->pbl_table[i].va,
  575. mr->pbl_table[i].pa);
  576. }
  577. kfree(mr->pbl_table);
  578. mr->pbl_table = NULL;
  579. }
  580. }
  581. static int ocrdma_get_pbl_info(struct ocrdma_dev *dev, struct ocrdma_mr *mr,
  582. u32 num_pbes)
  583. {
  584. u32 num_pbls = 0;
  585. u32 idx = 0;
  586. int status = 0;
  587. u32 pbl_size;
  588. do {
  589. pbl_size = OCRDMA_MIN_HPAGE_SIZE * (1 << idx);
  590. if (pbl_size > MAX_OCRDMA_PBL_SIZE) {
  591. status = -EFAULT;
  592. break;
  593. }
  594. num_pbls = roundup(num_pbes, (pbl_size / sizeof(u64)));
  595. num_pbls = num_pbls / (pbl_size / sizeof(u64));
  596. idx++;
  597. } while (num_pbls >= dev->attr.max_num_mr_pbl);
  598. mr->hwmr.num_pbes = num_pbes;
  599. mr->hwmr.num_pbls = num_pbls;
  600. mr->hwmr.pbl_size = pbl_size;
  601. return status;
  602. }
  603. static int ocrdma_build_pbl_tbl(struct ocrdma_dev *dev, struct ocrdma_hw_mr *mr)
  604. {
  605. int status = 0;
  606. int i;
  607. u32 dma_len = mr->pbl_size;
  608. struct pci_dev *pdev = dev->nic_info.pdev;
  609. void *va;
  610. dma_addr_t pa;
  611. mr->pbl_table = kzalloc(sizeof(struct ocrdma_pbl) *
  612. mr->num_pbls, GFP_KERNEL);
  613. if (!mr->pbl_table)
  614. return -ENOMEM;
  615. for (i = 0; i < mr->num_pbls; i++) {
  616. va = dma_alloc_coherent(&pdev->dev, dma_len, &pa, GFP_KERNEL);
  617. if (!va) {
  618. ocrdma_free_mr_pbl_tbl(dev, mr);
  619. status = -ENOMEM;
  620. break;
  621. }
  622. memset(va, 0, dma_len);
  623. mr->pbl_table[i].va = va;
  624. mr->pbl_table[i].pa = pa;
  625. }
  626. return status;
  627. }
  628. static void build_user_pbes(struct ocrdma_dev *dev, struct ocrdma_mr *mr,
  629. u32 num_pbes)
  630. {
  631. struct ocrdma_pbe *pbe;
  632. struct scatterlist *sg;
  633. struct ocrdma_pbl *pbl_tbl = mr->hwmr.pbl_table;
  634. struct ib_umem *umem = mr->umem;
  635. int shift, pg_cnt, pages, pbe_cnt, entry, total_num_pbes = 0;
  636. if (!mr->hwmr.num_pbes)
  637. return;
  638. pbe = (struct ocrdma_pbe *)pbl_tbl->va;
  639. pbe_cnt = 0;
  640. shift = ilog2(umem->page_size);
  641. for_each_sg(umem->sg_head.sgl, sg, umem->nmap, entry) {
  642. pages = sg_dma_len(sg) >> shift;
  643. for (pg_cnt = 0; pg_cnt < pages; pg_cnt++) {
  644. /* store the page address in pbe */
  645. pbe->pa_lo =
  646. cpu_to_le32(sg_dma_address
  647. (sg) +
  648. (umem->page_size * pg_cnt));
  649. pbe->pa_hi =
  650. cpu_to_le32(upper_32_bits
  651. ((sg_dma_address
  652. (sg) +
  653. umem->page_size * pg_cnt)));
  654. pbe_cnt += 1;
  655. total_num_pbes += 1;
  656. pbe++;
  657. /* if done building pbes, issue the mbx cmd. */
  658. if (total_num_pbes == num_pbes)
  659. return;
  660. /* if the given pbl is full storing the pbes,
  661. * move to next pbl.
  662. */
  663. if (pbe_cnt ==
  664. (mr->hwmr.pbl_size / sizeof(u64))) {
  665. pbl_tbl++;
  666. pbe = (struct ocrdma_pbe *)pbl_tbl->va;
  667. pbe_cnt = 0;
  668. }
  669. }
  670. }
  671. }
  672. struct ib_mr *ocrdma_reg_user_mr(struct ib_pd *ibpd, u64 start, u64 len,
  673. u64 usr_addr, int acc, struct ib_udata *udata)
  674. {
  675. int status = -ENOMEM;
  676. struct ocrdma_dev *dev = get_ocrdma_dev(ibpd->device);
  677. struct ocrdma_mr *mr;
  678. struct ocrdma_pd *pd;
  679. u32 num_pbes;
  680. pd = get_ocrdma_pd(ibpd);
  681. if (acc & IB_ACCESS_REMOTE_WRITE && !(acc & IB_ACCESS_LOCAL_WRITE))
  682. return ERR_PTR(-EINVAL);
  683. mr = kzalloc(sizeof(*mr), GFP_KERNEL);
  684. if (!mr)
  685. return ERR_PTR(status);
  686. mr->umem = ib_umem_get(ibpd->uobject->context, start, len, acc, 0);
  687. if (IS_ERR(mr->umem)) {
  688. status = -EFAULT;
  689. goto umem_err;
  690. }
  691. num_pbes = ib_umem_page_count(mr->umem);
  692. status = ocrdma_get_pbl_info(dev, mr, num_pbes);
  693. if (status)
  694. goto umem_err;
  695. mr->hwmr.pbe_size = mr->umem->page_size;
  696. mr->hwmr.fbo = ib_umem_offset(mr->umem);
  697. mr->hwmr.va = usr_addr;
  698. mr->hwmr.len = len;
  699. mr->hwmr.remote_wr = (acc & IB_ACCESS_REMOTE_WRITE) ? 1 : 0;
  700. mr->hwmr.remote_rd = (acc & IB_ACCESS_REMOTE_READ) ? 1 : 0;
  701. mr->hwmr.local_wr = (acc & IB_ACCESS_LOCAL_WRITE) ? 1 : 0;
  702. mr->hwmr.local_rd = 1;
  703. mr->hwmr.remote_atomic = (acc & IB_ACCESS_REMOTE_ATOMIC) ? 1 : 0;
  704. status = ocrdma_build_pbl_tbl(dev, &mr->hwmr);
  705. if (status)
  706. goto umem_err;
  707. build_user_pbes(dev, mr, num_pbes);
  708. status = ocrdma_reg_mr(dev, &mr->hwmr, pd->id, acc);
  709. if (status)
  710. goto mbx_err;
  711. mr->ibmr.lkey = mr->hwmr.lkey;
  712. if (mr->hwmr.remote_wr || mr->hwmr.remote_rd)
  713. mr->ibmr.rkey = mr->hwmr.lkey;
  714. return &mr->ibmr;
  715. mbx_err:
  716. ocrdma_free_mr_pbl_tbl(dev, &mr->hwmr);
  717. umem_err:
  718. kfree(mr);
  719. return ERR_PTR(status);
  720. }
  721. int ocrdma_dereg_mr(struct ib_mr *ib_mr)
  722. {
  723. struct ocrdma_mr *mr = get_ocrdma_mr(ib_mr);
  724. struct ocrdma_dev *dev = get_ocrdma_dev(ib_mr->device);
  725. int status;
  726. status = ocrdma_mbx_dealloc_lkey(dev, mr->hwmr.fr_mr, mr->hwmr.lkey);
  727. ocrdma_free_mr_pbl_tbl(dev, &mr->hwmr);
  728. /* it could be user registered memory. */
  729. if (mr->umem)
  730. ib_umem_release(mr->umem);
  731. kfree(mr);
  732. /* Don't stop cleanup, in case FW is unresponsive */
  733. if (dev->mqe_ctx.fw_error_state) {
  734. status = 0;
  735. pr_err("%s(%d) fw not responding.\n",
  736. __func__, dev->id);
  737. }
  738. return status;
  739. }
  740. static int ocrdma_copy_cq_uresp(struct ocrdma_dev *dev, struct ocrdma_cq *cq,
  741. struct ib_udata *udata,
  742. struct ib_ucontext *ib_ctx)
  743. {
  744. int status;
  745. struct ocrdma_ucontext *uctx = get_ocrdma_ucontext(ib_ctx);
  746. struct ocrdma_create_cq_uresp uresp;
  747. memset(&uresp, 0, sizeof(uresp));
  748. uresp.cq_id = cq->id;
  749. uresp.page_size = PAGE_ALIGN(cq->len);
  750. uresp.num_pages = 1;
  751. uresp.max_hw_cqe = cq->max_hw_cqe;
  752. uresp.page_addr[0] = virt_to_phys(cq->va);
  753. uresp.db_page_addr = ocrdma_get_db_addr(dev, uctx->cntxt_pd->id);
  754. uresp.db_page_size = dev->nic_info.db_page_size;
  755. uresp.phase_change = cq->phase_change ? 1 : 0;
  756. status = ib_copy_to_udata(udata, &uresp, sizeof(uresp));
  757. if (status) {
  758. pr_err("%s(%d) copy error cqid=0x%x.\n",
  759. __func__, dev->id, cq->id);
  760. goto err;
  761. }
  762. status = ocrdma_add_mmap(uctx, uresp.db_page_addr, uresp.db_page_size);
  763. if (status)
  764. goto err;
  765. status = ocrdma_add_mmap(uctx, uresp.page_addr[0], uresp.page_size);
  766. if (status) {
  767. ocrdma_del_mmap(uctx, uresp.db_page_addr, uresp.db_page_size);
  768. goto err;
  769. }
  770. cq->ucontext = uctx;
  771. err:
  772. return status;
  773. }
  774. struct ib_cq *ocrdma_create_cq(struct ib_device *ibdev, int entries, int vector,
  775. struct ib_ucontext *ib_ctx,
  776. struct ib_udata *udata)
  777. {
  778. struct ocrdma_cq *cq;
  779. struct ocrdma_dev *dev = get_ocrdma_dev(ibdev);
  780. struct ocrdma_ucontext *uctx = NULL;
  781. u16 pd_id = 0;
  782. int status;
  783. struct ocrdma_create_cq_ureq ureq;
  784. if (udata) {
  785. if (ib_copy_from_udata(&ureq, udata, sizeof(ureq)))
  786. return ERR_PTR(-EFAULT);
  787. } else
  788. ureq.dpp_cq = 0;
  789. cq = kzalloc(sizeof(*cq), GFP_KERNEL);
  790. if (!cq)
  791. return ERR_PTR(-ENOMEM);
  792. spin_lock_init(&cq->cq_lock);
  793. spin_lock_init(&cq->comp_handler_lock);
  794. INIT_LIST_HEAD(&cq->sq_head);
  795. INIT_LIST_HEAD(&cq->rq_head);
  796. cq->first_arm = true;
  797. if (ib_ctx) {
  798. uctx = get_ocrdma_ucontext(ib_ctx);
  799. pd_id = uctx->cntxt_pd->id;
  800. }
  801. status = ocrdma_mbx_create_cq(dev, cq, entries, ureq.dpp_cq, pd_id);
  802. if (status) {
  803. kfree(cq);
  804. return ERR_PTR(status);
  805. }
  806. if (ib_ctx) {
  807. status = ocrdma_copy_cq_uresp(dev, cq, udata, ib_ctx);
  808. if (status)
  809. goto ctx_err;
  810. }
  811. cq->phase = OCRDMA_CQE_VALID;
  812. dev->cq_tbl[cq->id] = cq;
  813. return &cq->ibcq;
  814. ctx_err:
  815. ocrdma_mbx_destroy_cq(dev, cq);
  816. kfree(cq);
  817. return ERR_PTR(status);
  818. }
  819. int ocrdma_resize_cq(struct ib_cq *ibcq, int new_cnt,
  820. struct ib_udata *udata)
  821. {
  822. int status = 0;
  823. struct ocrdma_cq *cq = get_ocrdma_cq(ibcq);
  824. if (new_cnt < 1 || new_cnt > cq->max_hw_cqe) {
  825. status = -EINVAL;
  826. return status;
  827. }
  828. ibcq->cqe = new_cnt;
  829. return status;
  830. }
  831. static void ocrdma_flush_cq(struct ocrdma_cq *cq)
  832. {
  833. int cqe_cnt;
  834. int valid_count = 0;
  835. unsigned long flags;
  836. struct ocrdma_dev *dev = get_ocrdma_dev(cq->ibcq.device);
  837. struct ocrdma_cqe *cqe = NULL;
  838. cqe = cq->va;
  839. cqe_cnt = cq->cqe_cnt;
  840. /* Last irq might have scheduled a polling thread
  841. * sync-up with it before hard flushing.
  842. */
  843. spin_lock_irqsave(&cq->cq_lock, flags);
  844. while (cqe_cnt) {
  845. if (is_cqe_valid(cq, cqe))
  846. valid_count++;
  847. cqe++;
  848. cqe_cnt--;
  849. }
  850. ocrdma_ring_cq_db(dev, cq->id, false, false, valid_count);
  851. spin_unlock_irqrestore(&cq->cq_lock, flags);
  852. }
  853. int ocrdma_destroy_cq(struct ib_cq *ibcq)
  854. {
  855. int status;
  856. struct ocrdma_cq *cq = get_ocrdma_cq(ibcq);
  857. struct ocrdma_eq *eq = NULL;
  858. struct ocrdma_dev *dev = get_ocrdma_dev(ibcq->device);
  859. int pdid = 0;
  860. u32 irq, indx;
  861. dev->cq_tbl[cq->id] = NULL;
  862. indx = ocrdma_get_eq_table_index(dev, cq->eqn);
  863. if (indx == -EINVAL)
  864. BUG();
  865. eq = &dev->eq_tbl[indx];
  866. irq = ocrdma_get_irq(dev, eq);
  867. synchronize_irq(irq);
  868. ocrdma_flush_cq(cq);
  869. status = ocrdma_mbx_destroy_cq(dev, cq);
  870. if (cq->ucontext) {
  871. pdid = cq->ucontext->cntxt_pd->id;
  872. ocrdma_del_mmap(cq->ucontext, (u64) cq->pa,
  873. PAGE_ALIGN(cq->len));
  874. ocrdma_del_mmap(cq->ucontext,
  875. ocrdma_get_db_addr(dev, pdid),
  876. dev->nic_info.db_page_size);
  877. }
  878. kfree(cq);
  879. return status;
  880. }
  881. static int ocrdma_add_qpn_map(struct ocrdma_dev *dev, struct ocrdma_qp *qp)
  882. {
  883. int status = -EINVAL;
  884. if (qp->id < OCRDMA_MAX_QP && dev->qp_tbl[qp->id] == NULL) {
  885. dev->qp_tbl[qp->id] = qp;
  886. status = 0;
  887. }
  888. return status;
  889. }
  890. static void ocrdma_del_qpn_map(struct ocrdma_dev *dev, struct ocrdma_qp *qp)
  891. {
  892. dev->qp_tbl[qp->id] = NULL;
  893. }
  894. static int ocrdma_check_qp_params(struct ib_pd *ibpd, struct ocrdma_dev *dev,
  895. struct ib_qp_init_attr *attrs)
  896. {
  897. if ((attrs->qp_type != IB_QPT_GSI) &&
  898. (attrs->qp_type != IB_QPT_RC) &&
  899. (attrs->qp_type != IB_QPT_UC) &&
  900. (attrs->qp_type != IB_QPT_UD)) {
  901. pr_err("%s(%d) unsupported qp type=0x%x requested\n",
  902. __func__, dev->id, attrs->qp_type);
  903. return -EINVAL;
  904. }
  905. /* Skip the check for QP1 to support CM size of 128 */
  906. if ((attrs->qp_type != IB_QPT_GSI) &&
  907. (attrs->cap.max_send_wr > dev->attr.max_wqe)) {
  908. pr_err("%s(%d) unsupported send_wr=0x%x requested\n",
  909. __func__, dev->id, attrs->cap.max_send_wr);
  910. pr_err("%s(%d) supported send_wr=0x%x\n",
  911. __func__, dev->id, dev->attr.max_wqe);
  912. return -EINVAL;
  913. }
  914. if (!attrs->srq && (attrs->cap.max_recv_wr > dev->attr.max_rqe)) {
  915. pr_err("%s(%d) unsupported recv_wr=0x%x requested\n",
  916. __func__, dev->id, attrs->cap.max_recv_wr);
  917. pr_err("%s(%d) supported recv_wr=0x%x\n",
  918. __func__, dev->id, dev->attr.max_rqe);
  919. return -EINVAL;
  920. }
  921. if (attrs->cap.max_inline_data > dev->attr.max_inline_data) {
  922. pr_err("%s(%d) unsupported inline data size=0x%x requested\n",
  923. __func__, dev->id, attrs->cap.max_inline_data);
  924. pr_err("%s(%d) supported inline data size=0x%x\n",
  925. __func__, dev->id, dev->attr.max_inline_data);
  926. return -EINVAL;
  927. }
  928. if (attrs->cap.max_send_sge > dev->attr.max_send_sge) {
  929. pr_err("%s(%d) unsupported send_sge=0x%x requested\n",
  930. __func__, dev->id, attrs->cap.max_send_sge);
  931. pr_err("%s(%d) supported send_sge=0x%x\n",
  932. __func__, dev->id, dev->attr.max_send_sge);
  933. return -EINVAL;
  934. }
  935. if (attrs->cap.max_recv_sge > dev->attr.max_recv_sge) {
  936. pr_err("%s(%d) unsupported recv_sge=0x%x requested\n",
  937. __func__, dev->id, attrs->cap.max_recv_sge);
  938. pr_err("%s(%d) supported recv_sge=0x%x\n",
  939. __func__, dev->id, dev->attr.max_recv_sge);
  940. return -EINVAL;
  941. }
  942. /* unprivileged user space cannot create special QP */
  943. if (ibpd->uobject && attrs->qp_type == IB_QPT_GSI) {
  944. pr_err
  945. ("%s(%d) Userspace can't create special QPs of type=0x%x\n",
  946. __func__, dev->id, attrs->qp_type);
  947. return -EINVAL;
  948. }
  949. /* allow creating only one GSI type of QP */
  950. if (attrs->qp_type == IB_QPT_GSI && dev->gsi_qp_created) {
  951. pr_err("%s(%d) GSI special QPs already created.\n",
  952. __func__, dev->id);
  953. return -EINVAL;
  954. }
  955. /* verify consumer QPs are not trying to use GSI QP's CQ */
  956. if ((attrs->qp_type != IB_QPT_GSI) && (dev->gsi_qp_created)) {
  957. if ((dev->gsi_sqcq == get_ocrdma_cq(attrs->send_cq)) ||
  958. (dev->gsi_rqcq == get_ocrdma_cq(attrs->recv_cq))) {
  959. pr_err("%s(%d) Consumer QP cannot use GSI CQs.\n",
  960. __func__, dev->id);
  961. return -EINVAL;
  962. }
  963. }
  964. return 0;
  965. }
  966. static int ocrdma_copy_qp_uresp(struct ocrdma_qp *qp,
  967. struct ib_udata *udata, int dpp_offset,
  968. int dpp_credit_lmt, int srq)
  969. {
  970. int status = 0;
  971. u64 usr_db;
  972. struct ocrdma_create_qp_uresp uresp;
  973. struct ocrdma_dev *dev = qp->dev;
  974. struct ocrdma_pd *pd = qp->pd;
  975. memset(&uresp, 0, sizeof(uresp));
  976. usr_db = dev->nic_info.unmapped_db +
  977. (pd->id * dev->nic_info.db_page_size);
  978. uresp.qp_id = qp->id;
  979. uresp.sq_dbid = qp->sq.dbid;
  980. uresp.num_sq_pages = 1;
  981. uresp.sq_page_size = PAGE_ALIGN(qp->sq.len);
  982. uresp.sq_page_addr[0] = virt_to_phys(qp->sq.va);
  983. uresp.num_wqe_allocated = qp->sq.max_cnt;
  984. if (!srq) {
  985. uresp.rq_dbid = qp->rq.dbid;
  986. uresp.num_rq_pages = 1;
  987. uresp.rq_page_size = PAGE_ALIGN(qp->rq.len);
  988. uresp.rq_page_addr[0] = virt_to_phys(qp->rq.va);
  989. uresp.num_rqe_allocated = qp->rq.max_cnt;
  990. }
  991. uresp.db_page_addr = usr_db;
  992. uresp.db_page_size = dev->nic_info.db_page_size;
  993. uresp.db_sq_offset = OCRDMA_DB_GEN2_SQ_OFFSET;
  994. uresp.db_rq_offset = OCRDMA_DB_GEN2_RQ_OFFSET;
  995. uresp.db_shift = OCRDMA_DB_RQ_SHIFT;
  996. if (qp->dpp_enabled) {
  997. uresp.dpp_credit = dpp_credit_lmt;
  998. uresp.dpp_offset = dpp_offset;
  999. }
  1000. status = ib_copy_to_udata(udata, &uresp, sizeof(uresp));
  1001. if (status) {
  1002. pr_err("%s(%d) user copy error.\n", __func__, dev->id);
  1003. goto err;
  1004. }
  1005. status = ocrdma_add_mmap(pd->uctx, uresp.sq_page_addr[0],
  1006. uresp.sq_page_size);
  1007. if (status)
  1008. goto err;
  1009. if (!srq) {
  1010. status = ocrdma_add_mmap(pd->uctx, uresp.rq_page_addr[0],
  1011. uresp.rq_page_size);
  1012. if (status)
  1013. goto rq_map_err;
  1014. }
  1015. return status;
  1016. rq_map_err:
  1017. ocrdma_del_mmap(pd->uctx, uresp.sq_page_addr[0], uresp.sq_page_size);
  1018. err:
  1019. return status;
  1020. }
  1021. static void ocrdma_set_qp_db(struct ocrdma_dev *dev, struct ocrdma_qp *qp,
  1022. struct ocrdma_pd *pd)
  1023. {
  1024. if (ocrdma_get_asic_type(dev) == OCRDMA_ASIC_GEN_SKH_R) {
  1025. qp->sq_db = dev->nic_info.db +
  1026. (pd->id * dev->nic_info.db_page_size) +
  1027. OCRDMA_DB_GEN2_SQ_OFFSET;
  1028. qp->rq_db = dev->nic_info.db +
  1029. (pd->id * dev->nic_info.db_page_size) +
  1030. OCRDMA_DB_GEN2_RQ_OFFSET;
  1031. } else {
  1032. qp->sq_db = dev->nic_info.db +
  1033. (pd->id * dev->nic_info.db_page_size) +
  1034. OCRDMA_DB_SQ_OFFSET;
  1035. qp->rq_db = dev->nic_info.db +
  1036. (pd->id * dev->nic_info.db_page_size) +
  1037. OCRDMA_DB_RQ_OFFSET;
  1038. }
  1039. }
  1040. static int ocrdma_alloc_wr_id_tbl(struct ocrdma_qp *qp)
  1041. {
  1042. qp->wqe_wr_id_tbl =
  1043. kzalloc(sizeof(*(qp->wqe_wr_id_tbl)) * qp->sq.max_cnt,
  1044. GFP_KERNEL);
  1045. if (qp->wqe_wr_id_tbl == NULL)
  1046. return -ENOMEM;
  1047. qp->rqe_wr_id_tbl =
  1048. kzalloc(sizeof(u64) * qp->rq.max_cnt, GFP_KERNEL);
  1049. if (qp->rqe_wr_id_tbl == NULL)
  1050. return -ENOMEM;
  1051. return 0;
  1052. }
  1053. static void ocrdma_set_qp_init_params(struct ocrdma_qp *qp,
  1054. struct ocrdma_pd *pd,
  1055. struct ib_qp_init_attr *attrs)
  1056. {
  1057. qp->pd = pd;
  1058. spin_lock_init(&qp->q_lock);
  1059. INIT_LIST_HEAD(&qp->sq_entry);
  1060. INIT_LIST_HEAD(&qp->rq_entry);
  1061. qp->qp_type = attrs->qp_type;
  1062. qp->cap_flags = OCRDMA_QP_INB_RD | OCRDMA_QP_INB_WR;
  1063. qp->max_inline_data = attrs->cap.max_inline_data;
  1064. qp->sq.max_sges = attrs->cap.max_send_sge;
  1065. qp->rq.max_sges = attrs->cap.max_recv_sge;
  1066. qp->state = OCRDMA_QPS_RST;
  1067. qp->signaled = (attrs->sq_sig_type == IB_SIGNAL_ALL_WR) ? true : false;
  1068. }
  1069. static void ocrdma_store_gsi_qp_cq(struct ocrdma_dev *dev,
  1070. struct ib_qp_init_attr *attrs)
  1071. {
  1072. if (attrs->qp_type == IB_QPT_GSI) {
  1073. dev->gsi_qp_created = 1;
  1074. dev->gsi_sqcq = get_ocrdma_cq(attrs->send_cq);
  1075. dev->gsi_rqcq = get_ocrdma_cq(attrs->recv_cq);
  1076. }
  1077. }
  1078. struct ib_qp *ocrdma_create_qp(struct ib_pd *ibpd,
  1079. struct ib_qp_init_attr *attrs,
  1080. struct ib_udata *udata)
  1081. {
  1082. int status;
  1083. struct ocrdma_pd *pd = get_ocrdma_pd(ibpd);
  1084. struct ocrdma_qp *qp;
  1085. struct ocrdma_dev *dev = get_ocrdma_dev(ibpd->device);
  1086. struct ocrdma_create_qp_ureq ureq;
  1087. u16 dpp_credit_lmt, dpp_offset;
  1088. status = ocrdma_check_qp_params(ibpd, dev, attrs);
  1089. if (status)
  1090. goto gen_err;
  1091. memset(&ureq, 0, sizeof(ureq));
  1092. if (udata) {
  1093. if (ib_copy_from_udata(&ureq, udata, sizeof(ureq)))
  1094. return ERR_PTR(-EFAULT);
  1095. }
  1096. qp = kzalloc(sizeof(*qp), GFP_KERNEL);
  1097. if (!qp) {
  1098. status = -ENOMEM;
  1099. goto gen_err;
  1100. }
  1101. qp->dev = dev;
  1102. ocrdma_set_qp_init_params(qp, pd, attrs);
  1103. if (udata == NULL)
  1104. qp->cap_flags |= (OCRDMA_QP_MW_BIND | OCRDMA_QP_LKEY0 |
  1105. OCRDMA_QP_FAST_REG);
  1106. mutex_lock(&dev->dev_lock);
  1107. status = ocrdma_mbx_create_qp(qp, attrs, ureq.enable_dpp_cq,
  1108. ureq.dpp_cq_id,
  1109. &dpp_offset, &dpp_credit_lmt);
  1110. if (status)
  1111. goto mbx_err;
  1112. /* user space QP's wr_id table are managed in library */
  1113. if (udata == NULL) {
  1114. status = ocrdma_alloc_wr_id_tbl(qp);
  1115. if (status)
  1116. goto map_err;
  1117. }
  1118. status = ocrdma_add_qpn_map(dev, qp);
  1119. if (status)
  1120. goto map_err;
  1121. ocrdma_set_qp_db(dev, qp, pd);
  1122. if (udata) {
  1123. status = ocrdma_copy_qp_uresp(qp, udata, dpp_offset,
  1124. dpp_credit_lmt,
  1125. (attrs->srq != NULL));
  1126. if (status)
  1127. goto cpy_err;
  1128. }
  1129. ocrdma_store_gsi_qp_cq(dev, attrs);
  1130. qp->ibqp.qp_num = qp->id;
  1131. mutex_unlock(&dev->dev_lock);
  1132. return &qp->ibqp;
  1133. cpy_err:
  1134. ocrdma_del_qpn_map(dev, qp);
  1135. map_err:
  1136. ocrdma_mbx_destroy_qp(dev, qp);
  1137. mbx_err:
  1138. mutex_unlock(&dev->dev_lock);
  1139. kfree(qp->wqe_wr_id_tbl);
  1140. kfree(qp->rqe_wr_id_tbl);
  1141. kfree(qp);
  1142. pr_err("%s(%d) error=%d\n", __func__, dev->id, status);
  1143. gen_err:
  1144. return ERR_PTR(status);
  1145. }
  1146. int _ocrdma_modify_qp(struct ib_qp *ibqp, struct ib_qp_attr *attr,
  1147. int attr_mask)
  1148. {
  1149. int status = 0;
  1150. struct ocrdma_qp *qp;
  1151. struct ocrdma_dev *dev;
  1152. enum ib_qp_state old_qps;
  1153. qp = get_ocrdma_qp(ibqp);
  1154. dev = qp->dev;
  1155. if (attr_mask & IB_QP_STATE)
  1156. status = ocrdma_qp_state_change(qp, attr->qp_state, &old_qps);
  1157. /* if new and previous states are same hw doesn't need to
  1158. * know about it.
  1159. */
  1160. if (status < 0)
  1161. return status;
  1162. status = ocrdma_mbx_modify_qp(dev, qp, attr, attr_mask);
  1163. return status;
  1164. }
  1165. int ocrdma_modify_qp(struct ib_qp *ibqp, struct ib_qp_attr *attr,
  1166. int attr_mask, struct ib_udata *udata)
  1167. {
  1168. unsigned long flags;
  1169. int status = -EINVAL;
  1170. struct ocrdma_qp *qp;
  1171. struct ocrdma_dev *dev;
  1172. enum ib_qp_state old_qps, new_qps;
  1173. qp = get_ocrdma_qp(ibqp);
  1174. dev = qp->dev;
  1175. /* syncronize with multiple context trying to change, retrive qps */
  1176. mutex_lock(&dev->dev_lock);
  1177. /* syncronize with wqe, rqe posting and cqe processing contexts */
  1178. spin_lock_irqsave(&qp->q_lock, flags);
  1179. old_qps = get_ibqp_state(qp->state);
  1180. if (attr_mask & IB_QP_STATE)
  1181. new_qps = attr->qp_state;
  1182. else
  1183. new_qps = old_qps;
  1184. spin_unlock_irqrestore(&qp->q_lock, flags);
  1185. if (!ib_modify_qp_is_ok(old_qps, new_qps, ibqp->qp_type, attr_mask,
  1186. IB_LINK_LAYER_ETHERNET)) {
  1187. pr_err("%s(%d) invalid attribute mask=0x%x specified for\n"
  1188. "qpn=0x%x of type=0x%x old_qps=0x%x, new_qps=0x%x\n",
  1189. __func__, dev->id, attr_mask, qp->id, ibqp->qp_type,
  1190. old_qps, new_qps);
  1191. goto param_err;
  1192. }
  1193. status = _ocrdma_modify_qp(ibqp, attr, attr_mask);
  1194. if (status > 0)
  1195. status = 0;
  1196. param_err:
  1197. mutex_unlock(&dev->dev_lock);
  1198. return status;
  1199. }
  1200. static enum ib_mtu ocrdma_mtu_int_to_enum(u16 mtu)
  1201. {
  1202. switch (mtu) {
  1203. case 256:
  1204. return IB_MTU_256;
  1205. case 512:
  1206. return IB_MTU_512;
  1207. case 1024:
  1208. return IB_MTU_1024;
  1209. case 2048:
  1210. return IB_MTU_2048;
  1211. case 4096:
  1212. return IB_MTU_4096;
  1213. default:
  1214. return IB_MTU_1024;
  1215. }
  1216. }
  1217. static int ocrdma_to_ib_qp_acc_flags(int qp_cap_flags)
  1218. {
  1219. int ib_qp_acc_flags = 0;
  1220. if (qp_cap_flags & OCRDMA_QP_INB_WR)
  1221. ib_qp_acc_flags |= IB_ACCESS_REMOTE_WRITE;
  1222. if (qp_cap_flags & OCRDMA_QP_INB_RD)
  1223. ib_qp_acc_flags |= IB_ACCESS_LOCAL_WRITE;
  1224. return ib_qp_acc_flags;
  1225. }
  1226. int ocrdma_query_qp(struct ib_qp *ibqp,
  1227. struct ib_qp_attr *qp_attr,
  1228. int attr_mask, struct ib_qp_init_attr *qp_init_attr)
  1229. {
  1230. int status;
  1231. u32 qp_state;
  1232. struct ocrdma_qp_params params;
  1233. struct ocrdma_qp *qp = get_ocrdma_qp(ibqp);
  1234. struct ocrdma_dev *dev = qp->dev;
  1235. memset(&params, 0, sizeof(params));
  1236. mutex_lock(&dev->dev_lock);
  1237. status = ocrdma_mbx_query_qp(dev, qp, &params);
  1238. mutex_unlock(&dev->dev_lock);
  1239. if (status)
  1240. goto mbx_err;
  1241. if (qp->qp_type == IB_QPT_UD)
  1242. qp_attr->qkey = params.qkey;
  1243. qp_attr->qp_state = get_ibqp_state(IB_QPS_INIT);
  1244. qp_attr->cur_qp_state = get_ibqp_state(IB_QPS_INIT);
  1245. qp_attr->path_mtu =
  1246. ocrdma_mtu_int_to_enum(params.path_mtu_pkey_indx &
  1247. OCRDMA_QP_PARAMS_PATH_MTU_MASK) >>
  1248. OCRDMA_QP_PARAMS_PATH_MTU_SHIFT;
  1249. qp_attr->path_mig_state = IB_MIG_MIGRATED;
  1250. qp_attr->rq_psn = params.hop_lmt_rq_psn & OCRDMA_QP_PARAMS_RQ_PSN_MASK;
  1251. qp_attr->sq_psn = params.tclass_sq_psn & OCRDMA_QP_PARAMS_SQ_PSN_MASK;
  1252. qp_attr->dest_qp_num =
  1253. params.ack_to_rnr_rtc_dest_qpn & OCRDMA_QP_PARAMS_DEST_QPN_MASK;
  1254. qp_attr->qp_access_flags = ocrdma_to_ib_qp_acc_flags(qp->cap_flags);
  1255. qp_attr->cap.max_send_wr = qp->sq.max_cnt - 1;
  1256. qp_attr->cap.max_recv_wr = qp->rq.max_cnt - 1;
  1257. qp_attr->cap.max_send_sge = qp->sq.max_sges;
  1258. qp_attr->cap.max_recv_sge = qp->rq.max_sges;
  1259. qp_attr->cap.max_inline_data = qp->max_inline_data;
  1260. qp_init_attr->cap = qp_attr->cap;
  1261. memcpy(&qp_attr->ah_attr.grh.dgid, &params.dgid[0],
  1262. sizeof(params.dgid));
  1263. qp_attr->ah_attr.grh.flow_label = params.rnt_rc_sl_fl &
  1264. OCRDMA_QP_PARAMS_FLOW_LABEL_MASK;
  1265. qp_attr->ah_attr.grh.sgid_index = qp->sgid_idx;
  1266. qp_attr->ah_attr.grh.hop_limit = (params.hop_lmt_rq_psn &
  1267. OCRDMA_QP_PARAMS_HOP_LMT_MASK) >>
  1268. OCRDMA_QP_PARAMS_HOP_LMT_SHIFT;
  1269. qp_attr->ah_attr.grh.traffic_class = (params.tclass_sq_psn &
  1270. OCRDMA_QP_PARAMS_TCLASS_MASK) >>
  1271. OCRDMA_QP_PARAMS_TCLASS_SHIFT;
  1272. qp_attr->ah_attr.ah_flags = IB_AH_GRH;
  1273. qp_attr->ah_attr.port_num = 1;
  1274. qp_attr->ah_attr.sl = (params.rnt_rc_sl_fl &
  1275. OCRDMA_QP_PARAMS_SL_MASK) >>
  1276. OCRDMA_QP_PARAMS_SL_SHIFT;
  1277. qp_attr->timeout = (params.ack_to_rnr_rtc_dest_qpn &
  1278. OCRDMA_QP_PARAMS_ACK_TIMEOUT_MASK) >>
  1279. OCRDMA_QP_PARAMS_ACK_TIMEOUT_SHIFT;
  1280. qp_attr->rnr_retry = (params.ack_to_rnr_rtc_dest_qpn &
  1281. OCRDMA_QP_PARAMS_RNR_RETRY_CNT_MASK) >>
  1282. OCRDMA_QP_PARAMS_RNR_RETRY_CNT_SHIFT;
  1283. qp_attr->retry_cnt =
  1284. (params.rnt_rc_sl_fl & OCRDMA_QP_PARAMS_RETRY_CNT_MASK) >>
  1285. OCRDMA_QP_PARAMS_RETRY_CNT_SHIFT;
  1286. qp_attr->min_rnr_timer = 0;
  1287. qp_attr->pkey_index = 0;
  1288. qp_attr->port_num = 1;
  1289. qp_attr->ah_attr.src_path_bits = 0;
  1290. qp_attr->ah_attr.static_rate = 0;
  1291. qp_attr->alt_pkey_index = 0;
  1292. qp_attr->alt_port_num = 0;
  1293. qp_attr->alt_timeout = 0;
  1294. memset(&qp_attr->alt_ah_attr, 0, sizeof(qp_attr->alt_ah_attr));
  1295. qp_state = (params.max_sge_recv_flags & OCRDMA_QP_PARAMS_STATE_MASK) >>
  1296. OCRDMA_QP_PARAMS_STATE_SHIFT;
  1297. qp_attr->sq_draining = (qp_state == OCRDMA_QPS_SQ_DRAINING) ? 1 : 0;
  1298. qp_attr->max_dest_rd_atomic =
  1299. params.max_ord_ird >> OCRDMA_QP_PARAMS_MAX_ORD_SHIFT;
  1300. qp_attr->max_rd_atomic =
  1301. params.max_ord_ird & OCRDMA_QP_PARAMS_MAX_IRD_MASK;
  1302. qp_attr->en_sqd_async_notify = (params.max_sge_recv_flags &
  1303. OCRDMA_QP_PARAMS_FLAGS_SQD_ASYNC) ? 1 : 0;
  1304. mbx_err:
  1305. return status;
  1306. }
  1307. static void ocrdma_srq_toggle_bit(struct ocrdma_srq *srq, int idx)
  1308. {
  1309. int i = idx / 32;
  1310. unsigned int mask = (1 << (idx % 32));
  1311. if (srq->idx_bit_fields[i] & mask)
  1312. srq->idx_bit_fields[i] &= ~mask;
  1313. else
  1314. srq->idx_bit_fields[i] |= mask;
  1315. }
  1316. static int ocrdma_hwq_free_cnt(struct ocrdma_qp_hwq_info *q)
  1317. {
  1318. return ((q->max_wqe_idx - q->head) + q->tail) % q->max_cnt;
  1319. }
  1320. static int is_hw_sq_empty(struct ocrdma_qp *qp)
  1321. {
  1322. return (qp->sq.tail == qp->sq.head);
  1323. }
  1324. static int is_hw_rq_empty(struct ocrdma_qp *qp)
  1325. {
  1326. return (qp->rq.tail == qp->rq.head);
  1327. }
  1328. static void *ocrdma_hwq_head(struct ocrdma_qp_hwq_info *q)
  1329. {
  1330. return q->va + (q->head * q->entry_size);
  1331. }
  1332. static void *ocrdma_hwq_head_from_idx(struct ocrdma_qp_hwq_info *q,
  1333. u32 idx)
  1334. {
  1335. return q->va + (idx * q->entry_size);
  1336. }
  1337. static void ocrdma_hwq_inc_head(struct ocrdma_qp_hwq_info *q)
  1338. {
  1339. q->head = (q->head + 1) & q->max_wqe_idx;
  1340. }
  1341. static void ocrdma_hwq_inc_tail(struct ocrdma_qp_hwq_info *q)
  1342. {
  1343. q->tail = (q->tail + 1) & q->max_wqe_idx;
  1344. }
  1345. /* discard the cqe for a given QP */
  1346. static void ocrdma_discard_cqes(struct ocrdma_qp *qp, struct ocrdma_cq *cq)
  1347. {
  1348. unsigned long cq_flags;
  1349. unsigned long flags;
  1350. int discard_cnt = 0;
  1351. u32 cur_getp, stop_getp;
  1352. struct ocrdma_cqe *cqe;
  1353. u32 qpn = 0, wqe_idx = 0;
  1354. spin_lock_irqsave(&cq->cq_lock, cq_flags);
  1355. /* traverse through the CQEs in the hw CQ,
  1356. * find the matching CQE for a given qp,
  1357. * mark the matching one discarded by clearing qpn.
  1358. * ring the doorbell in the poll_cq() as
  1359. * we don't complete out of order cqe.
  1360. */
  1361. cur_getp = cq->getp;
  1362. /* find upto when do we reap the cq. */
  1363. stop_getp = cur_getp;
  1364. do {
  1365. if (is_hw_sq_empty(qp) && (!qp->srq && is_hw_rq_empty(qp)))
  1366. break;
  1367. cqe = cq->va + cur_getp;
  1368. /* if (a) done reaping whole hw cq, or
  1369. * (b) qp_xq becomes empty.
  1370. * then exit
  1371. */
  1372. qpn = cqe->cmn.qpn & OCRDMA_CQE_QPN_MASK;
  1373. /* if previously discarded cqe found, skip that too. */
  1374. /* check for matching qp */
  1375. if (qpn == 0 || qpn != qp->id)
  1376. goto skip_cqe;
  1377. if (is_cqe_for_sq(cqe)) {
  1378. ocrdma_hwq_inc_tail(&qp->sq);
  1379. } else {
  1380. if (qp->srq) {
  1381. wqe_idx = (le32_to_cpu(cqe->rq.buftag_qpn) >>
  1382. OCRDMA_CQE_BUFTAG_SHIFT) &
  1383. qp->srq->rq.max_wqe_idx;
  1384. if (wqe_idx < 1)
  1385. BUG();
  1386. spin_lock_irqsave(&qp->srq->q_lock, flags);
  1387. ocrdma_hwq_inc_tail(&qp->srq->rq);
  1388. ocrdma_srq_toggle_bit(qp->srq, wqe_idx - 1);
  1389. spin_unlock_irqrestore(&qp->srq->q_lock, flags);
  1390. } else {
  1391. ocrdma_hwq_inc_tail(&qp->rq);
  1392. }
  1393. }
  1394. /* mark cqe discarded so that it is not picked up later
  1395. * in the poll_cq().
  1396. */
  1397. discard_cnt += 1;
  1398. cqe->cmn.qpn = 0;
  1399. skip_cqe:
  1400. cur_getp = (cur_getp + 1) % cq->max_hw_cqe;
  1401. } while (cur_getp != stop_getp);
  1402. spin_unlock_irqrestore(&cq->cq_lock, cq_flags);
  1403. }
  1404. void ocrdma_del_flush_qp(struct ocrdma_qp *qp)
  1405. {
  1406. int found = false;
  1407. unsigned long flags;
  1408. struct ocrdma_dev *dev = qp->dev;
  1409. /* sync with any active CQ poll */
  1410. spin_lock_irqsave(&dev->flush_q_lock, flags);
  1411. found = ocrdma_is_qp_in_sq_flushlist(qp->sq_cq, qp);
  1412. if (found)
  1413. list_del(&qp->sq_entry);
  1414. if (!qp->srq) {
  1415. found = ocrdma_is_qp_in_rq_flushlist(qp->rq_cq, qp);
  1416. if (found)
  1417. list_del(&qp->rq_entry);
  1418. }
  1419. spin_unlock_irqrestore(&dev->flush_q_lock, flags);
  1420. }
  1421. int ocrdma_destroy_qp(struct ib_qp *ibqp)
  1422. {
  1423. int status;
  1424. struct ocrdma_pd *pd;
  1425. struct ocrdma_qp *qp;
  1426. struct ocrdma_dev *dev;
  1427. struct ib_qp_attr attrs;
  1428. int attr_mask = IB_QP_STATE;
  1429. unsigned long flags;
  1430. qp = get_ocrdma_qp(ibqp);
  1431. dev = qp->dev;
  1432. attrs.qp_state = IB_QPS_ERR;
  1433. pd = qp->pd;
  1434. /* change the QP state to ERROR */
  1435. _ocrdma_modify_qp(ibqp, &attrs, attr_mask);
  1436. /* ensure that CQEs for newly created QP (whose id may be same with
  1437. * one which just getting destroyed are same), dont get
  1438. * discarded until the old CQEs are discarded.
  1439. */
  1440. mutex_lock(&dev->dev_lock);
  1441. status = ocrdma_mbx_destroy_qp(dev, qp);
  1442. /*
  1443. * acquire CQ lock while destroy is in progress, in order to
  1444. * protect against proessing in-flight CQEs for this QP.
  1445. */
  1446. spin_lock_irqsave(&qp->sq_cq->cq_lock, flags);
  1447. if (qp->rq_cq && (qp->rq_cq != qp->sq_cq))
  1448. spin_lock(&qp->rq_cq->cq_lock);
  1449. ocrdma_del_qpn_map(dev, qp);
  1450. if (qp->rq_cq && (qp->rq_cq != qp->sq_cq))
  1451. spin_unlock(&qp->rq_cq->cq_lock);
  1452. spin_unlock_irqrestore(&qp->sq_cq->cq_lock, flags);
  1453. if (!pd->uctx) {
  1454. ocrdma_discard_cqes(qp, qp->sq_cq);
  1455. ocrdma_discard_cqes(qp, qp->rq_cq);
  1456. }
  1457. mutex_unlock(&dev->dev_lock);
  1458. if (pd->uctx) {
  1459. ocrdma_del_mmap(pd->uctx, (u64) qp->sq.pa,
  1460. PAGE_ALIGN(qp->sq.len));
  1461. if (!qp->srq)
  1462. ocrdma_del_mmap(pd->uctx, (u64) qp->rq.pa,
  1463. PAGE_ALIGN(qp->rq.len));
  1464. }
  1465. ocrdma_del_flush_qp(qp);
  1466. kfree(qp->wqe_wr_id_tbl);
  1467. kfree(qp->rqe_wr_id_tbl);
  1468. kfree(qp);
  1469. return status;
  1470. }
  1471. static int ocrdma_copy_srq_uresp(struct ocrdma_dev *dev, struct ocrdma_srq *srq,
  1472. struct ib_udata *udata)
  1473. {
  1474. int status;
  1475. struct ocrdma_create_srq_uresp uresp;
  1476. memset(&uresp, 0, sizeof(uresp));
  1477. uresp.rq_dbid = srq->rq.dbid;
  1478. uresp.num_rq_pages = 1;
  1479. uresp.rq_page_addr[0] = virt_to_phys(srq->rq.va);
  1480. uresp.rq_page_size = srq->rq.len;
  1481. uresp.db_page_addr = dev->nic_info.unmapped_db +
  1482. (srq->pd->id * dev->nic_info.db_page_size);
  1483. uresp.db_page_size = dev->nic_info.db_page_size;
  1484. uresp.num_rqe_allocated = srq->rq.max_cnt;
  1485. if (ocrdma_get_asic_type(dev) == OCRDMA_ASIC_GEN_SKH_R) {
  1486. uresp.db_rq_offset = OCRDMA_DB_GEN2_RQ_OFFSET;
  1487. uresp.db_shift = 24;
  1488. } else {
  1489. uresp.db_rq_offset = OCRDMA_DB_RQ_OFFSET;
  1490. uresp.db_shift = 16;
  1491. }
  1492. status = ib_copy_to_udata(udata, &uresp, sizeof(uresp));
  1493. if (status)
  1494. return status;
  1495. status = ocrdma_add_mmap(srq->pd->uctx, uresp.rq_page_addr[0],
  1496. uresp.rq_page_size);
  1497. if (status)
  1498. return status;
  1499. return status;
  1500. }
  1501. struct ib_srq *ocrdma_create_srq(struct ib_pd *ibpd,
  1502. struct ib_srq_init_attr *init_attr,
  1503. struct ib_udata *udata)
  1504. {
  1505. int status = -ENOMEM;
  1506. struct ocrdma_pd *pd = get_ocrdma_pd(ibpd);
  1507. struct ocrdma_dev *dev = get_ocrdma_dev(ibpd->device);
  1508. struct ocrdma_srq *srq;
  1509. if (init_attr->attr.max_sge > dev->attr.max_recv_sge)
  1510. return ERR_PTR(-EINVAL);
  1511. if (init_attr->attr.max_wr > dev->attr.max_rqe)
  1512. return ERR_PTR(-EINVAL);
  1513. srq = kzalloc(sizeof(*srq), GFP_KERNEL);
  1514. if (!srq)
  1515. return ERR_PTR(status);
  1516. spin_lock_init(&srq->q_lock);
  1517. srq->pd = pd;
  1518. srq->db = dev->nic_info.db + (pd->id * dev->nic_info.db_page_size);
  1519. status = ocrdma_mbx_create_srq(dev, srq, init_attr, pd);
  1520. if (status)
  1521. goto err;
  1522. if (udata == NULL) {
  1523. srq->rqe_wr_id_tbl = kzalloc(sizeof(u64) * srq->rq.max_cnt,
  1524. GFP_KERNEL);
  1525. if (srq->rqe_wr_id_tbl == NULL)
  1526. goto arm_err;
  1527. srq->bit_fields_len = (srq->rq.max_cnt / 32) +
  1528. (srq->rq.max_cnt % 32 ? 1 : 0);
  1529. srq->idx_bit_fields =
  1530. kmalloc(srq->bit_fields_len * sizeof(u32), GFP_KERNEL);
  1531. if (srq->idx_bit_fields == NULL)
  1532. goto arm_err;
  1533. memset(srq->idx_bit_fields, 0xff,
  1534. srq->bit_fields_len * sizeof(u32));
  1535. }
  1536. if (init_attr->attr.srq_limit) {
  1537. status = ocrdma_mbx_modify_srq(srq, &init_attr->attr);
  1538. if (status)
  1539. goto arm_err;
  1540. }
  1541. if (udata) {
  1542. status = ocrdma_copy_srq_uresp(dev, srq, udata);
  1543. if (status)
  1544. goto arm_err;
  1545. }
  1546. return &srq->ibsrq;
  1547. arm_err:
  1548. ocrdma_mbx_destroy_srq(dev, srq);
  1549. err:
  1550. kfree(srq->rqe_wr_id_tbl);
  1551. kfree(srq->idx_bit_fields);
  1552. kfree(srq);
  1553. return ERR_PTR(status);
  1554. }
  1555. int ocrdma_modify_srq(struct ib_srq *ibsrq,
  1556. struct ib_srq_attr *srq_attr,
  1557. enum ib_srq_attr_mask srq_attr_mask,
  1558. struct ib_udata *udata)
  1559. {
  1560. int status = 0;
  1561. struct ocrdma_srq *srq;
  1562. srq = get_ocrdma_srq(ibsrq);
  1563. if (srq_attr_mask & IB_SRQ_MAX_WR)
  1564. status = -EINVAL;
  1565. else
  1566. status = ocrdma_mbx_modify_srq(srq, srq_attr);
  1567. return status;
  1568. }
  1569. int ocrdma_query_srq(struct ib_srq *ibsrq, struct ib_srq_attr *srq_attr)
  1570. {
  1571. int status;
  1572. struct ocrdma_srq *srq;
  1573. srq = get_ocrdma_srq(ibsrq);
  1574. status = ocrdma_mbx_query_srq(srq, srq_attr);
  1575. return status;
  1576. }
  1577. int ocrdma_destroy_srq(struct ib_srq *ibsrq)
  1578. {
  1579. int status;
  1580. struct ocrdma_srq *srq;
  1581. struct ocrdma_dev *dev = get_ocrdma_dev(ibsrq->device);
  1582. srq = get_ocrdma_srq(ibsrq);
  1583. status = ocrdma_mbx_destroy_srq(dev, srq);
  1584. if (srq->pd->uctx)
  1585. ocrdma_del_mmap(srq->pd->uctx, (u64) srq->rq.pa,
  1586. PAGE_ALIGN(srq->rq.len));
  1587. kfree(srq->idx_bit_fields);
  1588. kfree(srq->rqe_wr_id_tbl);
  1589. kfree(srq);
  1590. return status;
  1591. }
  1592. /* unprivileged verbs and their support functions. */
  1593. static void ocrdma_build_ud_hdr(struct ocrdma_qp *qp,
  1594. struct ocrdma_hdr_wqe *hdr,
  1595. struct ib_send_wr *wr)
  1596. {
  1597. struct ocrdma_ewqe_ud_hdr *ud_hdr =
  1598. (struct ocrdma_ewqe_ud_hdr *)(hdr + 1);
  1599. struct ocrdma_ah *ah = get_ocrdma_ah(wr->wr.ud.ah);
  1600. ud_hdr->rsvd_dest_qpn = wr->wr.ud.remote_qpn;
  1601. if (qp->qp_type == IB_QPT_GSI)
  1602. ud_hdr->qkey = qp->qkey;
  1603. else
  1604. ud_hdr->qkey = wr->wr.ud.remote_qkey;
  1605. ud_hdr->rsvd_ahid = ah->id;
  1606. }
  1607. static void ocrdma_build_sges(struct ocrdma_hdr_wqe *hdr,
  1608. struct ocrdma_sge *sge, int num_sge,
  1609. struct ib_sge *sg_list)
  1610. {
  1611. int i;
  1612. for (i = 0; i < num_sge; i++) {
  1613. sge[i].lrkey = sg_list[i].lkey;
  1614. sge[i].addr_lo = sg_list[i].addr;
  1615. sge[i].addr_hi = upper_32_bits(sg_list[i].addr);
  1616. sge[i].len = sg_list[i].length;
  1617. hdr->total_len += sg_list[i].length;
  1618. }
  1619. if (num_sge == 0)
  1620. memset(sge, 0, sizeof(*sge));
  1621. }
  1622. static inline uint32_t ocrdma_sglist_len(struct ib_sge *sg_list, int num_sge)
  1623. {
  1624. uint32_t total_len = 0, i;
  1625. for (i = 0; i < num_sge; i++)
  1626. total_len += sg_list[i].length;
  1627. return total_len;
  1628. }
  1629. static int ocrdma_build_inline_sges(struct ocrdma_qp *qp,
  1630. struct ocrdma_hdr_wqe *hdr,
  1631. struct ocrdma_sge *sge,
  1632. struct ib_send_wr *wr, u32 wqe_size)
  1633. {
  1634. int i;
  1635. char *dpp_addr;
  1636. if (wr->send_flags & IB_SEND_INLINE && qp->qp_type != IB_QPT_UD) {
  1637. hdr->total_len = ocrdma_sglist_len(wr->sg_list, wr->num_sge);
  1638. if (unlikely(hdr->total_len > qp->max_inline_data)) {
  1639. pr_err("%s() supported_len=0x%x,\n"
  1640. " unsupported len req=0x%x\n", __func__,
  1641. qp->max_inline_data, hdr->total_len);
  1642. return -EINVAL;
  1643. }
  1644. dpp_addr = (char *)sge;
  1645. for (i = 0; i < wr->num_sge; i++) {
  1646. memcpy(dpp_addr,
  1647. (void *)(unsigned long)wr->sg_list[i].addr,
  1648. wr->sg_list[i].length);
  1649. dpp_addr += wr->sg_list[i].length;
  1650. }
  1651. wqe_size += roundup(hdr->total_len, OCRDMA_WQE_ALIGN_BYTES);
  1652. if (0 == hdr->total_len)
  1653. wqe_size += sizeof(struct ocrdma_sge);
  1654. hdr->cw |= (OCRDMA_TYPE_INLINE << OCRDMA_WQE_TYPE_SHIFT);
  1655. } else {
  1656. ocrdma_build_sges(hdr, sge, wr->num_sge, wr->sg_list);
  1657. if (wr->num_sge)
  1658. wqe_size += (wr->num_sge * sizeof(struct ocrdma_sge));
  1659. else
  1660. wqe_size += sizeof(struct ocrdma_sge);
  1661. hdr->cw |= (OCRDMA_TYPE_LKEY << OCRDMA_WQE_TYPE_SHIFT);
  1662. }
  1663. hdr->cw |= ((wqe_size / OCRDMA_WQE_STRIDE) << OCRDMA_WQE_SIZE_SHIFT);
  1664. return 0;
  1665. }
  1666. static int ocrdma_build_send(struct ocrdma_qp *qp, struct ocrdma_hdr_wqe *hdr,
  1667. struct ib_send_wr *wr)
  1668. {
  1669. int status;
  1670. struct ocrdma_sge *sge;
  1671. u32 wqe_size = sizeof(*hdr);
  1672. if (qp->qp_type == IB_QPT_UD || qp->qp_type == IB_QPT_GSI) {
  1673. ocrdma_build_ud_hdr(qp, hdr, wr);
  1674. sge = (struct ocrdma_sge *)(hdr + 2);
  1675. wqe_size += sizeof(struct ocrdma_ewqe_ud_hdr);
  1676. } else {
  1677. sge = (struct ocrdma_sge *)(hdr + 1);
  1678. }
  1679. status = ocrdma_build_inline_sges(qp, hdr, sge, wr, wqe_size);
  1680. return status;
  1681. }
  1682. static int ocrdma_build_write(struct ocrdma_qp *qp, struct ocrdma_hdr_wqe *hdr,
  1683. struct ib_send_wr *wr)
  1684. {
  1685. int status;
  1686. struct ocrdma_sge *ext_rw = (struct ocrdma_sge *)(hdr + 1);
  1687. struct ocrdma_sge *sge = ext_rw + 1;
  1688. u32 wqe_size = sizeof(*hdr) + sizeof(*ext_rw);
  1689. status = ocrdma_build_inline_sges(qp, hdr, sge, wr, wqe_size);
  1690. if (status)
  1691. return status;
  1692. ext_rw->addr_lo = wr->wr.rdma.remote_addr;
  1693. ext_rw->addr_hi = upper_32_bits(wr->wr.rdma.remote_addr);
  1694. ext_rw->lrkey = wr->wr.rdma.rkey;
  1695. ext_rw->len = hdr->total_len;
  1696. return 0;
  1697. }
  1698. static void ocrdma_build_read(struct ocrdma_qp *qp, struct ocrdma_hdr_wqe *hdr,
  1699. struct ib_send_wr *wr)
  1700. {
  1701. struct ocrdma_sge *ext_rw = (struct ocrdma_sge *)(hdr + 1);
  1702. struct ocrdma_sge *sge = ext_rw + 1;
  1703. u32 wqe_size = ((wr->num_sge + 1) * sizeof(struct ocrdma_sge)) +
  1704. sizeof(struct ocrdma_hdr_wqe);
  1705. ocrdma_build_sges(hdr, sge, wr->num_sge, wr->sg_list);
  1706. hdr->cw |= ((wqe_size / OCRDMA_WQE_STRIDE) << OCRDMA_WQE_SIZE_SHIFT);
  1707. hdr->cw |= (OCRDMA_READ << OCRDMA_WQE_OPCODE_SHIFT);
  1708. hdr->cw |= (OCRDMA_TYPE_LKEY << OCRDMA_WQE_TYPE_SHIFT);
  1709. ext_rw->addr_lo = wr->wr.rdma.remote_addr;
  1710. ext_rw->addr_hi = upper_32_bits(wr->wr.rdma.remote_addr);
  1711. ext_rw->lrkey = wr->wr.rdma.rkey;
  1712. ext_rw->len = hdr->total_len;
  1713. }
  1714. static void build_frmr_pbes(struct ib_send_wr *wr, struct ocrdma_pbl *pbl_tbl,
  1715. struct ocrdma_hw_mr *hwmr)
  1716. {
  1717. int i;
  1718. u64 buf_addr = 0;
  1719. int num_pbes;
  1720. struct ocrdma_pbe *pbe;
  1721. pbe = (struct ocrdma_pbe *)pbl_tbl->va;
  1722. num_pbes = 0;
  1723. /* go through the OS phy regions & fill hw pbe entries into pbls. */
  1724. for (i = 0; i < wr->wr.fast_reg.page_list_len; i++) {
  1725. /* number of pbes can be more for one OS buf, when
  1726. * buffers are of different sizes.
  1727. * split the ib_buf to one or more pbes.
  1728. */
  1729. buf_addr = wr->wr.fast_reg.page_list->page_list[i];
  1730. pbe->pa_lo = cpu_to_le32((u32) (buf_addr & PAGE_MASK));
  1731. pbe->pa_hi = cpu_to_le32((u32) upper_32_bits(buf_addr));
  1732. num_pbes += 1;
  1733. pbe++;
  1734. /* if the pbl is full storing the pbes,
  1735. * move to next pbl.
  1736. */
  1737. if (num_pbes == (hwmr->pbl_size/sizeof(u64))) {
  1738. pbl_tbl++;
  1739. pbe = (struct ocrdma_pbe *)pbl_tbl->va;
  1740. }
  1741. }
  1742. return;
  1743. }
  1744. static int get_encoded_page_size(int pg_sz)
  1745. {
  1746. /* Max size is 256M 4096 << 16 */
  1747. int i = 0;
  1748. for (; i < 17; i++)
  1749. if (pg_sz == (4096 << i))
  1750. break;
  1751. return i;
  1752. }
  1753. static int ocrdma_build_fr(struct ocrdma_qp *qp, struct ocrdma_hdr_wqe *hdr,
  1754. struct ib_send_wr *wr)
  1755. {
  1756. u64 fbo;
  1757. struct ocrdma_ewqe_fr *fast_reg = (struct ocrdma_ewqe_fr *)(hdr + 1);
  1758. struct ocrdma_mr *mr;
  1759. u32 wqe_size = sizeof(*fast_reg) + sizeof(*hdr);
  1760. wqe_size = roundup(wqe_size, OCRDMA_WQE_ALIGN_BYTES);
  1761. if (wr->wr.fast_reg.page_list_len > qp->dev->attr.max_pages_per_frmr)
  1762. return -EINVAL;
  1763. hdr->cw |= (OCRDMA_FR_MR << OCRDMA_WQE_OPCODE_SHIFT);
  1764. hdr->cw |= ((wqe_size / OCRDMA_WQE_STRIDE) << OCRDMA_WQE_SIZE_SHIFT);
  1765. if (wr->wr.fast_reg.page_list_len == 0)
  1766. BUG();
  1767. if (wr->wr.fast_reg.access_flags & IB_ACCESS_LOCAL_WRITE)
  1768. hdr->rsvd_lkey_flags |= OCRDMA_LKEY_FLAG_LOCAL_WR;
  1769. if (wr->wr.fast_reg.access_flags & IB_ACCESS_REMOTE_WRITE)
  1770. hdr->rsvd_lkey_flags |= OCRDMA_LKEY_FLAG_REMOTE_WR;
  1771. if (wr->wr.fast_reg.access_flags & IB_ACCESS_REMOTE_READ)
  1772. hdr->rsvd_lkey_flags |= OCRDMA_LKEY_FLAG_REMOTE_RD;
  1773. hdr->lkey = wr->wr.fast_reg.rkey;
  1774. hdr->total_len = wr->wr.fast_reg.length;
  1775. fbo = wr->wr.fast_reg.iova_start -
  1776. (wr->wr.fast_reg.page_list->page_list[0] & PAGE_MASK);
  1777. fast_reg->va_hi = upper_32_bits(wr->wr.fast_reg.iova_start);
  1778. fast_reg->va_lo = (u32) (wr->wr.fast_reg.iova_start & 0xffffffff);
  1779. fast_reg->fbo_hi = upper_32_bits(fbo);
  1780. fast_reg->fbo_lo = (u32) fbo & 0xffffffff;
  1781. fast_reg->num_sges = wr->wr.fast_reg.page_list_len;
  1782. fast_reg->size_sge =
  1783. get_encoded_page_size(1 << wr->wr.fast_reg.page_shift);
  1784. mr = (struct ocrdma_mr *) (unsigned long)
  1785. qp->dev->stag_arr[(hdr->lkey >> 8) & (OCRDMA_MAX_STAG - 1)];
  1786. build_frmr_pbes(wr, mr->hwmr.pbl_table, &mr->hwmr);
  1787. return 0;
  1788. }
  1789. static void ocrdma_ring_sq_db(struct ocrdma_qp *qp)
  1790. {
  1791. u32 val = qp->sq.dbid | (1 << OCRDMA_DB_SQ_SHIFT);
  1792. iowrite32(val, qp->sq_db);
  1793. }
  1794. int ocrdma_post_send(struct ib_qp *ibqp, struct ib_send_wr *wr,
  1795. struct ib_send_wr **bad_wr)
  1796. {
  1797. int status = 0;
  1798. struct ocrdma_qp *qp = get_ocrdma_qp(ibqp);
  1799. struct ocrdma_hdr_wqe *hdr;
  1800. unsigned long flags;
  1801. spin_lock_irqsave(&qp->q_lock, flags);
  1802. if (qp->state != OCRDMA_QPS_RTS && qp->state != OCRDMA_QPS_SQD) {
  1803. spin_unlock_irqrestore(&qp->q_lock, flags);
  1804. *bad_wr = wr;
  1805. return -EINVAL;
  1806. }
  1807. while (wr) {
  1808. if (qp->qp_type == IB_QPT_UD &&
  1809. (wr->opcode != IB_WR_SEND &&
  1810. wr->opcode != IB_WR_SEND_WITH_IMM)) {
  1811. *bad_wr = wr;
  1812. status = -EINVAL;
  1813. break;
  1814. }
  1815. if (ocrdma_hwq_free_cnt(&qp->sq) == 0 ||
  1816. wr->num_sge > qp->sq.max_sges) {
  1817. *bad_wr = wr;
  1818. status = -ENOMEM;
  1819. break;
  1820. }
  1821. hdr = ocrdma_hwq_head(&qp->sq);
  1822. hdr->cw = 0;
  1823. if (wr->send_flags & IB_SEND_SIGNALED || qp->signaled)
  1824. hdr->cw |= (OCRDMA_FLAG_SIG << OCRDMA_WQE_FLAGS_SHIFT);
  1825. if (wr->send_flags & IB_SEND_FENCE)
  1826. hdr->cw |=
  1827. (OCRDMA_FLAG_FENCE_L << OCRDMA_WQE_FLAGS_SHIFT);
  1828. if (wr->send_flags & IB_SEND_SOLICITED)
  1829. hdr->cw |=
  1830. (OCRDMA_FLAG_SOLICIT << OCRDMA_WQE_FLAGS_SHIFT);
  1831. hdr->total_len = 0;
  1832. switch (wr->opcode) {
  1833. case IB_WR_SEND_WITH_IMM:
  1834. hdr->cw |= (OCRDMA_FLAG_IMM << OCRDMA_WQE_FLAGS_SHIFT);
  1835. hdr->immdt = ntohl(wr->ex.imm_data);
  1836. case IB_WR_SEND:
  1837. hdr->cw |= (OCRDMA_SEND << OCRDMA_WQE_OPCODE_SHIFT);
  1838. ocrdma_build_send(qp, hdr, wr);
  1839. break;
  1840. case IB_WR_SEND_WITH_INV:
  1841. hdr->cw |= (OCRDMA_FLAG_INV << OCRDMA_WQE_FLAGS_SHIFT);
  1842. hdr->cw |= (OCRDMA_SEND << OCRDMA_WQE_OPCODE_SHIFT);
  1843. hdr->lkey = wr->ex.invalidate_rkey;
  1844. status = ocrdma_build_send(qp, hdr, wr);
  1845. break;
  1846. case IB_WR_RDMA_WRITE_WITH_IMM:
  1847. hdr->cw |= (OCRDMA_FLAG_IMM << OCRDMA_WQE_FLAGS_SHIFT);
  1848. hdr->immdt = ntohl(wr->ex.imm_data);
  1849. case IB_WR_RDMA_WRITE:
  1850. hdr->cw |= (OCRDMA_WRITE << OCRDMA_WQE_OPCODE_SHIFT);
  1851. status = ocrdma_build_write(qp, hdr, wr);
  1852. break;
  1853. case IB_WR_RDMA_READ_WITH_INV:
  1854. hdr->cw |= (OCRDMA_FLAG_INV << OCRDMA_WQE_FLAGS_SHIFT);
  1855. case IB_WR_RDMA_READ:
  1856. ocrdma_build_read(qp, hdr, wr);
  1857. break;
  1858. case IB_WR_LOCAL_INV:
  1859. hdr->cw |=
  1860. (OCRDMA_LKEY_INV << OCRDMA_WQE_OPCODE_SHIFT);
  1861. hdr->cw |= ((sizeof(struct ocrdma_hdr_wqe) +
  1862. sizeof(struct ocrdma_sge)) /
  1863. OCRDMA_WQE_STRIDE) << OCRDMA_WQE_SIZE_SHIFT;
  1864. hdr->lkey = wr->ex.invalidate_rkey;
  1865. break;
  1866. case IB_WR_FAST_REG_MR:
  1867. status = ocrdma_build_fr(qp, hdr, wr);
  1868. break;
  1869. default:
  1870. status = -EINVAL;
  1871. break;
  1872. }
  1873. if (status) {
  1874. *bad_wr = wr;
  1875. break;
  1876. }
  1877. if (wr->send_flags & IB_SEND_SIGNALED || qp->signaled)
  1878. qp->wqe_wr_id_tbl[qp->sq.head].signaled = 1;
  1879. else
  1880. qp->wqe_wr_id_tbl[qp->sq.head].signaled = 0;
  1881. qp->wqe_wr_id_tbl[qp->sq.head].wrid = wr->wr_id;
  1882. ocrdma_cpu_to_le32(hdr, ((hdr->cw >> OCRDMA_WQE_SIZE_SHIFT) &
  1883. OCRDMA_WQE_SIZE_MASK) * OCRDMA_WQE_STRIDE);
  1884. /* make sure wqe is written before adapter can access it */
  1885. wmb();
  1886. /* inform hw to start processing it */
  1887. ocrdma_ring_sq_db(qp);
  1888. /* update pointer, counter for next wr */
  1889. ocrdma_hwq_inc_head(&qp->sq);
  1890. wr = wr->next;
  1891. }
  1892. spin_unlock_irqrestore(&qp->q_lock, flags);
  1893. return status;
  1894. }
  1895. static void ocrdma_ring_rq_db(struct ocrdma_qp *qp)
  1896. {
  1897. u32 val = qp->rq.dbid | (1 << OCRDMA_DB_RQ_SHIFT);
  1898. iowrite32(val, qp->rq_db);
  1899. }
  1900. static void ocrdma_build_rqe(struct ocrdma_hdr_wqe *rqe, struct ib_recv_wr *wr,
  1901. u16 tag)
  1902. {
  1903. u32 wqe_size = 0;
  1904. struct ocrdma_sge *sge;
  1905. if (wr->num_sge)
  1906. wqe_size = (wr->num_sge * sizeof(*sge)) + sizeof(*rqe);
  1907. else
  1908. wqe_size = sizeof(*sge) + sizeof(*rqe);
  1909. rqe->cw = ((wqe_size / OCRDMA_WQE_STRIDE) <<
  1910. OCRDMA_WQE_SIZE_SHIFT);
  1911. rqe->cw |= (OCRDMA_FLAG_SIG << OCRDMA_WQE_FLAGS_SHIFT);
  1912. rqe->cw |= (OCRDMA_TYPE_LKEY << OCRDMA_WQE_TYPE_SHIFT);
  1913. rqe->total_len = 0;
  1914. rqe->rsvd_tag = tag;
  1915. sge = (struct ocrdma_sge *)(rqe + 1);
  1916. ocrdma_build_sges(rqe, sge, wr->num_sge, wr->sg_list);
  1917. ocrdma_cpu_to_le32(rqe, wqe_size);
  1918. }
  1919. int ocrdma_post_recv(struct ib_qp *ibqp, struct ib_recv_wr *wr,
  1920. struct ib_recv_wr **bad_wr)
  1921. {
  1922. int status = 0;
  1923. unsigned long flags;
  1924. struct ocrdma_qp *qp = get_ocrdma_qp(ibqp);
  1925. struct ocrdma_hdr_wqe *rqe;
  1926. spin_lock_irqsave(&qp->q_lock, flags);
  1927. if (qp->state == OCRDMA_QPS_RST || qp->state == OCRDMA_QPS_ERR) {
  1928. spin_unlock_irqrestore(&qp->q_lock, flags);
  1929. *bad_wr = wr;
  1930. return -EINVAL;
  1931. }
  1932. while (wr) {
  1933. if (ocrdma_hwq_free_cnt(&qp->rq) == 0 ||
  1934. wr->num_sge > qp->rq.max_sges) {
  1935. *bad_wr = wr;
  1936. status = -ENOMEM;
  1937. break;
  1938. }
  1939. rqe = ocrdma_hwq_head(&qp->rq);
  1940. ocrdma_build_rqe(rqe, wr, 0);
  1941. qp->rqe_wr_id_tbl[qp->rq.head] = wr->wr_id;
  1942. /* make sure rqe is written before adapter can access it */
  1943. wmb();
  1944. /* inform hw to start processing it */
  1945. ocrdma_ring_rq_db(qp);
  1946. /* update pointer, counter for next wr */
  1947. ocrdma_hwq_inc_head(&qp->rq);
  1948. wr = wr->next;
  1949. }
  1950. spin_unlock_irqrestore(&qp->q_lock, flags);
  1951. return status;
  1952. }
  1953. /* cqe for srq's rqe can potentially arrive out of order.
  1954. * index gives the entry in the shadow table where to store
  1955. * the wr_id. tag/index is returned in cqe to reference back
  1956. * for a given rqe.
  1957. */
  1958. static int ocrdma_srq_get_idx(struct ocrdma_srq *srq)
  1959. {
  1960. int row = 0;
  1961. int indx = 0;
  1962. for (row = 0; row < srq->bit_fields_len; row++) {
  1963. if (srq->idx_bit_fields[row]) {
  1964. indx = ffs(srq->idx_bit_fields[row]);
  1965. indx = (row * 32) + (indx - 1);
  1966. if (indx >= srq->rq.max_cnt)
  1967. BUG();
  1968. ocrdma_srq_toggle_bit(srq, indx);
  1969. break;
  1970. }
  1971. }
  1972. if (row == srq->bit_fields_len)
  1973. BUG();
  1974. return indx + 1; /* Use from index 1 */
  1975. }
  1976. static void ocrdma_ring_srq_db(struct ocrdma_srq *srq)
  1977. {
  1978. u32 val = srq->rq.dbid | (1 << 16);
  1979. iowrite32(val, srq->db + OCRDMA_DB_GEN2_SRQ_OFFSET);
  1980. }
  1981. int ocrdma_post_srq_recv(struct ib_srq *ibsrq, struct ib_recv_wr *wr,
  1982. struct ib_recv_wr **bad_wr)
  1983. {
  1984. int status = 0;
  1985. unsigned long flags;
  1986. struct ocrdma_srq *srq;
  1987. struct ocrdma_hdr_wqe *rqe;
  1988. u16 tag;
  1989. srq = get_ocrdma_srq(ibsrq);
  1990. spin_lock_irqsave(&srq->q_lock, flags);
  1991. while (wr) {
  1992. if (ocrdma_hwq_free_cnt(&srq->rq) == 0 ||
  1993. wr->num_sge > srq->rq.max_sges) {
  1994. status = -ENOMEM;
  1995. *bad_wr = wr;
  1996. break;
  1997. }
  1998. tag = ocrdma_srq_get_idx(srq);
  1999. rqe = ocrdma_hwq_head(&srq->rq);
  2000. ocrdma_build_rqe(rqe, wr, tag);
  2001. srq->rqe_wr_id_tbl[tag] = wr->wr_id;
  2002. /* make sure rqe is written before adapter can perform DMA */
  2003. wmb();
  2004. /* inform hw to start processing it */
  2005. ocrdma_ring_srq_db(srq);
  2006. /* update pointer, counter for next wr */
  2007. ocrdma_hwq_inc_head(&srq->rq);
  2008. wr = wr->next;
  2009. }
  2010. spin_unlock_irqrestore(&srq->q_lock, flags);
  2011. return status;
  2012. }
  2013. static enum ib_wc_status ocrdma_to_ibwc_err(u16 status)
  2014. {
  2015. enum ib_wc_status ibwc_status;
  2016. switch (status) {
  2017. case OCRDMA_CQE_GENERAL_ERR:
  2018. ibwc_status = IB_WC_GENERAL_ERR;
  2019. break;
  2020. case OCRDMA_CQE_LOC_LEN_ERR:
  2021. ibwc_status = IB_WC_LOC_LEN_ERR;
  2022. break;
  2023. case OCRDMA_CQE_LOC_QP_OP_ERR:
  2024. ibwc_status = IB_WC_LOC_QP_OP_ERR;
  2025. break;
  2026. case OCRDMA_CQE_LOC_EEC_OP_ERR:
  2027. ibwc_status = IB_WC_LOC_EEC_OP_ERR;
  2028. break;
  2029. case OCRDMA_CQE_LOC_PROT_ERR:
  2030. ibwc_status = IB_WC_LOC_PROT_ERR;
  2031. break;
  2032. case OCRDMA_CQE_WR_FLUSH_ERR:
  2033. ibwc_status = IB_WC_WR_FLUSH_ERR;
  2034. break;
  2035. case OCRDMA_CQE_MW_BIND_ERR:
  2036. ibwc_status = IB_WC_MW_BIND_ERR;
  2037. break;
  2038. case OCRDMA_CQE_BAD_RESP_ERR:
  2039. ibwc_status = IB_WC_BAD_RESP_ERR;
  2040. break;
  2041. case OCRDMA_CQE_LOC_ACCESS_ERR:
  2042. ibwc_status = IB_WC_LOC_ACCESS_ERR;
  2043. break;
  2044. case OCRDMA_CQE_REM_INV_REQ_ERR:
  2045. ibwc_status = IB_WC_REM_INV_REQ_ERR;
  2046. break;
  2047. case OCRDMA_CQE_REM_ACCESS_ERR:
  2048. ibwc_status = IB_WC_REM_ACCESS_ERR;
  2049. break;
  2050. case OCRDMA_CQE_REM_OP_ERR:
  2051. ibwc_status = IB_WC_REM_OP_ERR;
  2052. break;
  2053. case OCRDMA_CQE_RETRY_EXC_ERR:
  2054. ibwc_status = IB_WC_RETRY_EXC_ERR;
  2055. break;
  2056. case OCRDMA_CQE_RNR_RETRY_EXC_ERR:
  2057. ibwc_status = IB_WC_RNR_RETRY_EXC_ERR;
  2058. break;
  2059. case OCRDMA_CQE_LOC_RDD_VIOL_ERR:
  2060. ibwc_status = IB_WC_LOC_RDD_VIOL_ERR;
  2061. break;
  2062. case OCRDMA_CQE_REM_INV_RD_REQ_ERR:
  2063. ibwc_status = IB_WC_REM_INV_RD_REQ_ERR;
  2064. break;
  2065. case OCRDMA_CQE_REM_ABORT_ERR:
  2066. ibwc_status = IB_WC_REM_ABORT_ERR;
  2067. break;
  2068. case OCRDMA_CQE_INV_EECN_ERR:
  2069. ibwc_status = IB_WC_INV_EECN_ERR;
  2070. break;
  2071. case OCRDMA_CQE_INV_EEC_STATE_ERR:
  2072. ibwc_status = IB_WC_INV_EEC_STATE_ERR;
  2073. break;
  2074. case OCRDMA_CQE_FATAL_ERR:
  2075. ibwc_status = IB_WC_FATAL_ERR;
  2076. break;
  2077. case OCRDMA_CQE_RESP_TIMEOUT_ERR:
  2078. ibwc_status = IB_WC_RESP_TIMEOUT_ERR;
  2079. break;
  2080. default:
  2081. ibwc_status = IB_WC_GENERAL_ERR;
  2082. break;
  2083. }
  2084. return ibwc_status;
  2085. }
  2086. static void ocrdma_update_wc(struct ocrdma_qp *qp, struct ib_wc *ibwc,
  2087. u32 wqe_idx)
  2088. {
  2089. struct ocrdma_hdr_wqe *hdr;
  2090. struct ocrdma_sge *rw;
  2091. int opcode;
  2092. hdr = ocrdma_hwq_head_from_idx(&qp->sq, wqe_idx);
  2093. ibwc->wr_id = qp->wqe_wr_id_tbl[wqe_idx].wrid;
  2094. /* Undo the hdr->cw swap */
  2095. opcode = le32_to_cpu(hdr->cw) & OCRDMA_WQE_OPCODE_MASK;
  2096. switch (opcode) {
  2097. case OCRDMA_WRITE:
  2098. ibwc->opcode = IB_WC_RDMA_WRITE;
  2099. break;
  2100. case OCRDMA_READ:
  2101. rw = (struct ocrdma_sge *)(hdr + 1);
  2102. ibwc->opcode = IB_WC_RDMA_READ;
  2103. ibwc->byte_len = rw->len;
  2104. break;
  2105. case OCRDMA_SEND:
  2106. ibwc->opcode = IB_WC_SEND;
  2107. break;
  2108. case OCRDMA_FR_MR:
  2109. ibwc->opcode = IB_WC_FAST_REG_MR;
  2110. break;
  2111. case OCRDMA_LKEY_INV:
  2112. ibwc->opcode = IB_WC_LOCAL_INV;
  2113. break;
  2114. default:
  2115. ibwc->status = IB_WC_GENERAL_ERR;
  2116. pr_err("%s() invalid opcode received = 0x%x\n",
  2117. __func__, hdr->cw & OCRDMA_WQE_OPCODE_MASK);
  2118. break;
  2119. }
  2120. }
  2121. static void ocrdma_set_cqe_status_flushed(struct ocrdma_qp *qp,
  2122. struct ocrdma_cqe *cqe)
  2123. {
  2124. if (is_cqe_for_sq(cqe)) {
  2125. cqe->flags_status_srcqpn = cpu_to_le32(le32_to_cpu(
  2126. cqe->flags_status_srcqpn) &
  2127. ~OCRDMA_CQE_STATUS_MASK);
  2128. cqe->flags_status_srcqpn = cpu_to_le32(le32_to_cpu(
  2129. cqe->flags_status_srcqpn) |
  2130. (OCRDMA_CQE_WR_FLUSH_ERR <<
  2131. OCRDMA_CQE_STATUS_SHIFT));
  2132. } else {
  2133. if (qp->qp_type == IB_QPT_UD || qp->qp_type == IB_QPT_GSI) {
  2134. cqe->flags_status_srcqpn = cpu_to_le32(le32_to_cpu(
  2135. cqe->flags_status_srcqpn) &
  2136. ~OCRDMA_CQE_UD_STATUS_MASK);
  2137. cqe->flags_status_srcqpn = cpu_to_le32(le32_to_cpu(
  2138. cqe->flags_status_srcqpn) |
  2139. (OCRDMA_CQE_WR_FLUSH_ERR <<
  2140. OCRDMA_CQE_UD_STATUS_SHIFT));
  2141. } else {
  2142. cqe->flags_status_srcqpn = cpu_to_le32(le32_to_cpu(
  2143. cqe->flags_status_srcqpn) &
  2144. ~OCRDMA_CQE_STATUS_MASK);
  2145. cqe->flags_status_srcqpn = cpu_to_le32(le32_to_cpu(
  2146. cqe->flags_status_srcqpn) |
  2147. (OCRDMA_CQE_WR_FLUSH_ERR <<
  2148. OCRDMA_CQE_STATUS_SHIFT));
  2149. }
  2150. }
  2151. }
  2152. static bool ocrdma_update_err_cqe(struct ib_wc *ibwc, struct ocrdma_cqe *cqe,
  2153. struct ocrdma_qp *qp, int status)
  2154. {
  2155. bool expand = false;
  2156. ibwc->byte_len = 0;
  2157. ibwc->qp = &qp->ibqp;
  2158. ibwc->status = ocrdma_to_ibwc_err(status);
  2159. ocrdma_flush_qp(qp);
  2160. ocrdma_qp_state_change(qp, IB_QPS_ERR, NULL);
  2161. /* if wqe/rqe pending for which cqe needs to be returned,
  2162. * trigger inflating it.
  2163. */
  2164. if (!is_hw_rq_empty(qp) || !is_hw_sq_empty(qp)) {
  2165. expand = true;
  2166. ocrdma_set_cqe_status_flushed(qp, cqe);
  2167. }
  2168. return expand;
  2169. }
  2170. static int ocrdma_update_err_rcqe(struct ib_wc *ibwc, struct ocrdma_cqe *cqe,
  2171. struct ocrdma_qp *qp, int status)
  2172. {
  2173. ibwc->opcode = IB_WC_RECV;
  2174. ibwc->wr_id = qp->rqe_wr_id_tbl[qp->rq.tail];
  2175. ocrdma_hwq_inc_tail(&qp->rq);
  2176. return ocrdma_update_err_cqe(ibwc, cqe, qp, status);
  2177. }
  2178. static int ocrdma_update_err_scqe(struct ib_wc *ibwc, struct ocrdma_cqe *cqe,
  2179. struct ocrdma_qp *qp, int status)
  2180. {
  2181. ocrdma_update_wc(qp, ibwc, qp->sq.tail);
  2182. ocrdma_hwq_inc_tail(&qp->sq);
  2183. return ocrdma_update_err_cqe(ibwc, cqe, qp, status);
  2184. }
  2185. static bool ocrdma_poll_err_scqe(struct ocrdma_qp *qp,
  2186. struct ocrdma_cqe *cqe, struct ib_wc *ibwc,
  2187. bool *polled, bool *stop)
  2188. {
  2189. bool expand;
  2190. int status = (le32_to_cpu(cqe->flags_status_srcqpn) &
  2191. OCRDMA_CQE_STATUS_MASK) >> OCRDMA_CQE_STATUS_SHIFT;
  2192. /* when hw sq is empty, but rq is not empty, so we continue
  2193. * to keep the cqe in order to get the cq event again.
  2194. */
  2195. if (is_hw_sq_empty(qp) && !is_hw_rq_empty(qp)) {
  2196. /* when cq for rq and sq is same, it is safe to return
  2197. * flush cqe for RQEs.
  2198. */
  2199. if (!qp->srq && (qp->sq_cq == qp->rq_cq)) {
  2200. *polled = true;
  2201. status = OCRDMA_CQE_WR_FLUSH_ERR;
  2202. expand = ocrdma_update_err_rcqe(ibwc, cqe, qp, status);
  2203. } else {
  2204. /* stop processing further cqe as this cqe is used for
  2205. * triggering cq event on buddy cq of RQ.
  2206. * When QP is destroyed, this cqe will be removed
  2207. * from the cq's hardware q.
  2208. */
  2209. *polled = false;
  2210. *stop = true;
  2211. expand = false;
  2212. }
  2213. } else if (is_hw_sq_empty(qp)) {
  2214. /* Do nothing */
  2215. expand = false;
  2216. *polled = false;
  2217. *stop = false;
  2218. } else {
  2219. *polled = true;
  2220. expand = ocrdma_update_err_scqe(ibwc, cqe, qp, status);
  2221. }
  2222. return expand;
  2223. }
  2224. static bool ocrdma_poll_success_scqe(struct ocrdma_qp *qp,
  2225. struct ocrdma_cqe *cqe,
  2226. struct ib_wc *ibwc, bool *polled)
  2227. {
  2228. bool expand = false;
  2229. int tail = qp->sq.tail;
  2230. u32 wqe_idx;
  2231. if (!qp->wqe_wr_id_tbl[tail].signaled) {
  2232. *polled = false; /* WC cannot be consumed yet */
  2233. } else {
  2234. ibwc->status = IB_WC_SUCCESS;
  2235. ibwc->wc_flags = 0;
  2236. ibwc->qp = &qp->ibqp;
  2237. ocrdma_update_wc(qp, ibwc, tail);
  2238. *polled = true;
  2239. }
  2240. wqe_idx = (le32_to_cpu(cqe->wq.wqeidx) &
  2241. OCRDMA_CQE_WQEIDX_MASK) & qp->sq.max_wqe_idx;
  2242. if (tail != wqe_idx)
  2243. expand = true; /* Coalesced CQE can't be consumed yet */
  2244. ocrdma_hwq_inc_tail(&qp->sq);
  2245. return expand;
  2246. }
  2247. static bool ocrdma_poll_scqe(struct ocrdma_qp *qp, struct ocrdma_cqe *cqe,
  2248. struct ib_wc *ibwc, bool *polled, bool *stop)
  2249. {
  2250. int status;
  2251. bool expand;
  2252. status = (le32_to_cpu(cqe->flags_status_srcqpn) &
  2253. OCRDMA_CQE_STATUS_MASK) >> OCRDMA_CQE_STATUS_SHIFT;
  2254. if (status == OCRDMA_CQE_SUCCESS)
  2255. expand = ocrdma_poll_success_scqe(qp, cqe, ibwc, polled);
  2256. else
  2257. expand = ocrdma_poll_err_scqe(qp, cqe, ibwc, polled, stop);
  2258. return expand;
  2259. }
  2260. static int ocrdma_update_ud_rcqe(struct ib_wc *ibwc, struct ocrdma_cqe *cqe)
  2261. {
  2262. int status;
  2263. status = (le32_to_cpu(cqe->flags_status_srcqpn) &
  2264. OCRDMA_CQE_UD_STATUS_MASK) >> OCRDMA_CQE_UD_STATUS_SHIFT;
  2265. ibwc->src_qp = le32_to_cpu(cqe->flags_status_srcqpn) &
  2266. OCRDMA_CQE_SRCQP_MASK;
  2267. ibwc->pkey_index = le32_to_cpu(cqe->ud.rxlen_pkey) &
  2268. OCRDMA_CQE_PKEY_MASK;
  2269. ibwc->wc_flags = IB_WC_GRH;
  2270. ibwc->byte_len = (le32_to_cpu(cqe->ud.rxlen_pkey) >>
  2271. OCRDMA_CQE_UD_XFER_LEN_SHIFT);
  2272. return status;
  2273. }
  2274. static void ocrdma_update_free_srq_cqe(struct ib_wc *ibwc,
  2275. struct ocrdma_cqe *cqe,
  2276. struct ocrdma_qp *qp)
  2277. {
  2278. unsigned long flags;
  2279. struct ocrdma_srq *srq;
  2280. u32 wqe_idx;
  2281. srq = get_ocrdma_srq(qp->ibqp.srq);
  2282. wqe_idx = (le32_to_cpu(cqe->rq.buftag_qpn) >>
  2283. OCRDMA_CQE_BUFTAG_SHIFT) & srq->rq.max_wqe_idx;
  2284. if (wqe_idx < 1)
  2285. BUG();
  2286. ibwc->wr_id = srq->rqe_wr_id_tbl[wqe_idx];
  2287. spin_lock_irqsave(&srq->q_lock, flags);
  2288. ocrdma_srq_toggle_bit(srq, wqe_idx - 1);
  2289. spin_unlock_irqrestore(&srq->q_lock, flags);
  2290. ocrdma_hwq_inc_tail(&srq->rq);
  2291. }
  2292. static bool ocrdma_poll_err_rcqe(struct ocrdma_qp *qp, struct ocrdma_cqe *cqe,
  2293. struct ib_wc *ibwc, bool *polled, bool *stop,
  2294. int status)
  2295. {
  2296. bool expand;
  2297. /* when hw_rq is empty, but wq is not empty, so continue
  2298. * to keep the cqe to get the cq event again.
  2299. */
  2300. if (is_hw_rq_empty(qp) && !is_hw_sq_empty(qp)) {
  2301. if (!qp->srq && (qp->sq_cq == qp->rq_cq)) {
  2302. *polled = true;
  2303. status = OCRDMA_CQE_WR_FLUSH_ERR;
  2304. expand = ocrdma_update_err_scqe(ibwc, cqe, qp, status);
  2305. } else {
  2306. *polled = false;
  2307. *stop = true;
  2308. expand = false;
  2309. }
  2310. } else if (is_hw_rq_empty(qp)) {
  2311. /* Do nothing */
  2312. expand = false;
  2313. *polled = false;
  2314. *stop = false;
  2315. } else {
  2316. *polled = true;
  2317. expand = ocrdma_update_err_rcqe(ibwc, cqe, qp, status);
  2318. }
  2319. return expand;
  2320. }
  2321. static void ocrdma_poll_success_rcqe(struct ocrdma_qp *qp,
  2322. struct ocrdma_cqe *cqe, struct ib_wc *ibwc)
  2323. {
  2324. ibwc->opcode = IB_WC_RECV;
  2325. ibwc->qp = &qp->ibqp;
  2326. ibwc->status = IB_WC_SUCCESS;
  2327. if (qp->qp_type == IB_QPT_UD || qp->qp_type == IB_QPT_GSI)
  2328. ocrdma_update_ud_rcqe(ibwc, cqe);
  2329. else
  2330. ibwc->byte_len = le32_to_cpu(cqe->rq.rxlen);
  2331. if (is_cqe_imm(cqe)) {
  2332. ibwc->ex.imm_data = htonl(le32_to_cpu(cqe->rq.lkey_immdt));
  2333. ibwc->wc_flags |= IB_WC_WITH_IMM;
  2334. } else if (is_cqe_wr_imm(cqe)) {
  2335. ibwc->opcode = IB_WC_RECV_RDMA_WITH_IMM;
  2336. ibwc->ex.imm_data = htonl(le32_to_cpu(cqe->rq.lkey_immdt));
  2337. ibwc->wc_flags |= IB_WC_WITH_IMM;
  2338. } else if (is_cqe_invalidated(cqe)) {
  2339. ibwc->ex.invalidate_rkey = le32_to_cpu(cqe->rq.lkey_immdt);
  2340. ibwc->wc_flags |= IB_WC_WITH_INVALIDATE;
  2341. }
  2342. if (qp->ibqp.srq) {
  2343. ocrdma_update_free_srq_cqe(ibwc, cqe, qp);
  2344. } else {
  2345. ibwc->wr_id = qp->rqe_wr_id_tbl[qp->rq.tail];
  2346. ocrdma_hwq_inc_tail(&qp->rq);
  2347. }
  2348. }
  2349. static bool ocrdma_poll_rcqe(struct ocrdma_qp *qp, struct ocrdma_cqe *cqe,
  2350. struct ib_wc *ibwc, bool *polled, bool *stop)
  2351. {
  2352. int status;
  2353. bool expand = false;
  2354. ibwc->wc_flags = 0;
  2355. if (qp->qp_type == IB_QPT_UD || qp->qp_type == IB_QPT_GSI) {
  2356. status = (le32_to_cpu(cqe->flags_status_srcqpn) &
  2357. OCRDMA_CQE_UD_STATUS_MASK) >>
  2358. OCRDMA_CQE_UD_STATUS_SHIFT;
  2359. } else {
  2360. status = (le32_to_cpu(cqe->flags_status_srcqpn) &
  2361. OCRDMA_CQE_STATUS_MASK) >> OCRDMA_CQE_STATUS_SHIFT;
  2362. }
  2363. if (status == OCRDMA_CQE_SUCCESS) {
  2364. *polled = true;
  2365. ocrdma_poll_success_rcqe(qp, cqe, ibwc);
  2366. } else {
  2367. expand = ocrdma_poll_err_rcqe(qp, cqe, ibwc, polled, stop,
  2368. status);
  2369. }
  2370. return expand;
  2371. }
  2372. static void ocrdma_change_cq_phase(struct ocrdma_cq *cq, struct ocrdma_cqe *cqe,
  2373. u16 cur_getp)
  2374. {
  2375. if (cq->phase_change) {
  2376. if (cur_getp == 0)
  2377. cq->phase = (~cq->phase & OCRDMA_CQE_VALID);
  2378. } else {
  2379. /* clear valid bit */
  2380. cqe->flags_status_srcqpn = 0;
  2381. }
  2382. }
  2383. static int ocrdma_poll_hwcq(struct ocrdma_cq *cq, int num_entries,
  2384. struct ib_wc *ibwc)
  2385. {
  2386. u16 qpn = 0;
  2387. int i = 0;
  2388. bool expand = false;
  2389. int polled_hw_cqes = 0;
  2390. struct ocrdma_qp *qp = NULL;
  2391. struct ocrdma_dev *dev = get_ocrdma_dev(cq->ibcq.device);
  2392. struct ocrdma_cqe *cqe;
  2393. u16 cur_getp; bool polled = false; bool stop = false;
  2394. cur_getp = cq->getp;
  2395. while (num_entries) {
  2396. cqe = cq->va + cur_getp;
  2397. /* check whether valid cqe or not */
  2398. if (!is_cqe_valid(cq, cqe))
  2399. break;
  2400. qpn = (le32_to_cpu(cqe->cmn.qpn) & OCRDMA_CQE_QPN_MASK);
  2401. /* ignore discarded cqe */
  2402. if (qpn == 0)
  2403. goto skip_cqe;
  2404. qp = dev->qp_tbl[qpn];
  2405. BUG_ON(qp == NULL);
  2406. if (is_cqe_for_sq(cqe)) {
  2407. expand = ocrdma_poll_scqe(qp, cqe, ibwc, &polled,
  2408. &stop);
  2409. } else {
  2410. expand = ocrdma_poll_rcqe(qp, cqe, ibwc, &polled,
  2411. &stop);
  2412. }
  2413. if (expand)
  2414. goto expand_cqe;
  2415. if (stop)
  2416. goto stop_cqe;
  2417. /* clear qpn to avoid duplicate processing by discard_cqe() */
  2418. cqe->cmn.qpn = 0;
  2419. skip_cqe:
  2420. polled_hw_cqes += 1;
  2421. cur_getp = (cur_getp + 1) % cq->max_hw_cqe;
  2422. ocrdma_change_cq_phase(cq, cqe, cur_getp);
  2423. expand_cqe:
  2424. if (polled) {
  2425. num_entries -= 1;
  2426. i += 1;
  2427. ibwc = ibwc + 1;
  2428. polled = false;
  2429. }
  2430. }
  2431. stop_cqe:
  2432. cq->getp = cur_getp;
  2433. if (cq->deferred_arm) {
  2434. ocrdma_ring_cq_db(dev, cq->id, true, cq->deferred_sol,
  2435. polled_hw_cqes);
  2436. cq->deferred_arm = false;
  2437. cq->deferred_sol = false;
  2438. } else {
  2439. /* We need to pop the CQE. No need to arm */
  2440. ocrdma_ring_cq_db(dev, cq->id, false, cq->deferred_sol,
  2441. polled_hw_cqes);
  2442. cq->deferred_sol = false;
  2443. }
  2444. return i;
  2445. }
  2446. /* insert error cqe if the QP's SQ or RQ's CQ matches the CQ under poll. */
  2447. static int ocrdma_add_err_cqe(struct ocrdma_cq *cq, int num_entries,
  2448. struct ocrdma_qp *qp, struct ib_wc *ibwc)
  2449. {
  2450. int err_cqes = 0;
  2451. while (num_entries) {
  2452. if (is_hw_sq_empty(qp) && is_hw_rq_empty(qp))
  2453. break;
  2454. if (!is_hw_sq_empty(qp) && qp->sq_cq == cq) {
  2455. ocrdma_update_wc(qp, ibwc, qp->sq.tail);
  2456. ocrdma_hwq_inc_tail(&qp->sq);
  2457. } else if (!is_hw_rq_empty(qp) && qp->rq_cq == cq) {
  2458. ibwc->wr_id = qp->rqe_wr_id_tbl[qp->rq.tail];
  2459. ocrdma_hwq_inc_tail(&qp->rq);
  2460. } else {
  2461. return err_cqes;
  2462. }
  2463. ibwc->byte_len = 0;
  2464. ibwc->status = IB_WC_WR_FLUSH_ERR;
  2465. ibwc = ibwc + 1;
  2466. err_cqes += 1;
  2467. num_entries -= 1;
  2468. }
  2469. return err_cqes;
  2470. }
  2471. int ocrdma_poll_cq(struct ib_cq *ibcq, int num_entries, struct ib_wc *wc)
  2472. {
  2473. int cqes_to_poll = num_entries;
  2474. struct ocrdma_cq *cq = get_ocrdma_cq(ibcq);
  2475. struct ocrdma_dev *dev = get_ocrdma_dev(ibcq->device);
  2476. int num_os_cqe = 0, err_cqes = 0;
  2477. struct ocrdma_qp *qp;
  2478. unsigned long flags;
  2479. /* poll cqes from adapter CQ */
  2480. spin_lock_irqsave(&cq->cq_lock, flags);
  2481. num_os_cqe = ocrdma_poll_hwcq(cq, cqes_to_poll, wc);
  2482. spin_unlock_irqrestore(&cq->cq_lock, flags);
  2483. cqes_to_poll -= num_os_cqe;
  2484. if (cqes_to_poll) {
  2485. wc = wc + num_os_cqe;
  2486. /* adapter returns single error cqe when qp moves to
  2487. * error state. So insert error cqes with wc_status as
  2488. * FLUSHED for pending WQEs and RQEs of QP's SQ and RQ
  2489. * respectively which uses this CQ.
  2490. */
  2491. spin_lock_irqsave(&dev->flush_q_lock, flags);
  2492. list_for_each_entry(qp, &cq->sq_head, sq_entry) {
  2493. if (cqes_to_poll == 0)
  2494. break;
  2495. err_cqes = ocrdma_add_err_cqe(cq, cqes_to_poll, qp, wc);
  2496. cqes_to_poll -= err_cqes;
  2497. num_os_cqe += err_cqes;
  2498. wc = wc + err_cqes;
  2499. }
  2500. spin_unlock_irqrestore(&dev->flush_q_lock, flags);
  2501. }
  2502. return num_os_cqe;
  2503. }
  2504. int ocrdma_arm_cq(struct ib_cq *ibcq, enum ib_cq_notify_flags cq_flags)
  2505. {
  2506. struct ocrdma_cq *cq = get_ocrdma_cq(ibcq);
  2507. struct ocrdma_dev *dev = get_ocrdma_dev(ibcq->device);
  2508. u16 cq_id;
  2509. unsigned long flags;
  2510. bool arm_needed = false, sol_needed = false;
  2511. cq_id = cq->id;
  2512. spin_lock_irqsave(&cq->cq_lock, flags);
  2513. if (cq_flags & IB_CQ_NEXT_COMP || cq_flags & IB_CQ_SOLICITED)
  2514. arm_needed = true;
  2515. if (cq_flags & IB_CQ_SOLICITED)
  2516. sol_needed = true;
  2517. if (cq->first_arm) {
  2518. ocrdma_ring_cq_db(dev, cq_id, arm_needed, sol_needed, 0);
  2519. cq->first_arm = false;
  2520. }
  2521. cq->deferred_arm = true;
  2522. cq->deferred_sol = sol_needed;
  2523. spin_unlock_irqrestore(&cq->cq_lock, flags);
  2524. return 0;
  2525. }
  2526. struct ib_mr *ocrdma_alloc_frmr(struct ib_pd *ibpd, int max_page_list_len)
  2527. {
  2528. int status;
  2529. struct ocrdma_mr *mr;
  2530. struct ocrdma_pd *pd = get_ocrdma_pd(ibpd);
  2531. struct ocrdma_dev *dev = get_ocrdma_dev(ibpd->device);
  2532. if (max_page_list_len > dev->attr.max_pages_per_frmr)
  2533. return ERR_PTR(-EINVAL);
  2534. mr = kzalloc(sizeof(*mr), GFP_KERNEL);
  2535. if (!mr)
  2536. return ERR_PTR(-ENOMEM);
  2537. status = ocrdma_get_pbl_info(dev, mr, max_page_list_len);
  2538. if (status)
  2539. goto pbl_err;
  2540. mr->hwmr.fr_mr = 1;
  2541. mr->hwmr.remote_rd = 0;
  2542. mr->hwmr.remote_wr = 0;
  2543. mr->hwmr.local_rd = 0;
  2544. mr->hwmr.local_wr = 0;
  2545. mr->hwmr.mw_bind = 0;
  2546. status = ocrdma_build_pbl_tbl(dev, &mr->hwmr);
  2547. if (status)
  2548. goto pbl_err;
  2549. status = ocrdma_reg_mr(dev, &mr->hwmr, pd->id, 0);
  2550. if (status)
  2551. goto mbx_err;
  2552. mr->ibmr.rkey = mr->hwmr.lkey;
  2553. mr->ibmr.lkey = mr->hwmr.lkey;
  2554. dev->stag_arr[(mr->hwmr.lkey >> 8) & (OCRDMA_MAX_STAG - 1)] =
  2555. (unsigned long) mr;
  2556. return &mr->ibmr;
  2557. mbx_err:
  2558. ocrdma_free_mr_pbl_tbl(dev, &mr->hwmr);
  2559. pbl_err:
  2560. kfree(mr);
  2561. return ERR_PTR(-ENOMEM);
  2562. }
  2563. struct ib_fast_reg_page_list *ocrdma_alloc_frmr_page_list(struct ib_device
  2564. *ibdev,
  2565. int page_list_len)
  2566. {
  2567. struct ib_fast_reg_page_list *frmr_list;
  2568. int size;
  2569. size = sizeof(*frmr_list) + (page_list_len * sizeof(u64));
  2570. frmr_list = kzalloc(size, GFP_KERNEL);
  2571. if (!frmr_list)
  2572. return ERR_PTR(-ENOMEM);
  2573. frmr_list->page_list = (u64 *)(frmr_list + 1);
  2574. return frmr_list;
  2575. }
  2576. void ocrdma_free_frmr_page_list(struct ib_fast_reg_page_list *page_list)
  2577. {
  2578. kfree(page_list);
  2579. }
  2580. #define MAX_KERNEL_PBE_SIZE 65536
  2581. static inline int count_kernel_pbes(struct ib_phys_buf *buf_list,
  2582. int buf_cnt, u32 *pbe_size)
  2583. {
  2584. u64 total_size = 0;
  2585. u64 buf_size = 0;
  2586. int i;
  2587. *pbe_size = roundup(buf_list[0].size, PAGE_SIZE);
  2588. *pbe_size = roundup_pow_of_two(*pbe_size);
  2589. /* find the smallest PBE size that we can have */
  2590. for (i = 0; i < buf_cnt; i++) {
  2591. /* first addr may not be page aligned, so ignore checking */
  2592. if ((i != 0) && ((buf_list[i].addr & ~PAGE_MASK) ||
  2593. (buf_list[i].size & ~PAGE_MASK))) {
  2594. return 0;
  2595. }
  2596. /* if configured PBE size is greater then the chosen one,
  2597. * reduce the PBE size.
  2598. */
  2599. buf_size = roundup(buf_list[i].size, PAGE_SIZE);
  2600. /* pbe_size has to be even multiple of 4K 1,2,4,8...*/
  2601. buf_size = roundup_pow_of_two(buf_size);
  2602. if (*pbe_size > buf_size)
  2603. *pbe_size = buf_size;
  2604. total_size += buf_size;
  2605. }
  2606. *pbe_size = *pbe_size > MAX_KERNEL_PBE_SIZE ?
  2607. (MAX_KERNEL_PBE_SIZE) : (*pbe_size);
  2608. /* num_pbes = total_size / (*pbe_size); this is implemented below. */
  2609. return total_size >> ilog2(*pbe_size);
  2610. }
  2611. static void build_kernel_pbes(struct ib_phys_buf *buf_list, int ib_buf_cnt,
  2612. u32 pbe_size, struct ocrdma_pbl *pbl_tbl,
  2613. struct ocrdma_hw_mr *hwmr)
  2614. {
  2615. int i;
  2616. int idx;
  2617. int pbes_per_buf = 0;
  2618. u64 buf_addr = 0;
  2619. int num_pbes;
  2620. struct ocrdma_pbe *pbe;
  2621. int total_num_pbes = 0;
  2622. if (!hwmr->num_pbes)
  2623. return;
  2624. pbe = (struct ocrdma_pbe *)pbl_tbl->va;
  2625. num_pbes = 0;
  2626. /* go through the OS phy regions & fill hw pbe entries into pbls. */
  2627. for (i = 0; i < ib_buf_cnt; i++) {
  2628. buf_addr = buf_list[i].addr;
  2629. pbes_per_buf =
  2630. roundup_pow_of_two(roundup(buf_list[i].size, PAGE_SIZE)) /
  2631. pbe_size;
  2632. hwmr->len += buf_list[i].size;
  2633. /* number of pbes can be more for one OS buf, when
  2634. * buffers are of different sizes.
  2635. * split the ib_buf to one or more pbes.
  2636. */
  2637. for (idx = 0; idx < pbes_per_buf; idx++) {
  2638. /* we program always page aligned addresses,
  2639. * first unaligned address is taken care by fbo.
  2640. */
  2641. if (i == 0) {
  2642. /* for non zero fbo, assign the
  2643. * start of the page.
  2644. */
  2645. pbe->pa_lo =
  2646. cpu_to_le32((u32) (buf_addr & PAGE_MASK));
  2647. pbe->pa_hi =
  2648. cpu_to_le32((u32) upper_32_bits(buf_addr));
  2649. } else {
  2650. pbe->pa_lo =
  2651. cpu_to_le32((u32) (buf_addr & 0xffffffff));
  2652. pbe->pa_hi =
  2653. cpu_to_le32((u32) upper_32_bits(buf_addr));
  2654. }
  2655. buf_addr += pbe_size;
  2656. num_pbes += 1;
  2657. total_num_pbes += 1;
  2658. pbe++;
  2659. if (total_num_pbes == hwmr->num_pbes)
  2660. goto mr_tbl_done;
  2661. /* if the pbl is full storing the pbes,
  2662. * move to next pbl.
  2663. */
  2664. if (num_pbes == (hwmr->pbl_size/sizeof(u64))) {
  2665. pbl_tbl++;
  2666. pbe = (struct ocrdma_pbe *)pbl_tbl->va;
  2667. num_pbes = 0;
  2668. }
  2669. }
  2670. }
  2671. mr_tbl_done:
  2672. return;
  2673. }
  2674. struct ib_mr *ocrdma_reg_kernel_mr(struct ib_pd *ibpd,
  2675. struct ib_phys_buf *buf_list,
  2676. int buf_cnt, int acc, u64 *iova_start)
  2677. {
  2678. int status = -ENOMEM;
  2679. struct ocrdma_mr *mr;
  2680. struct ocrdma_pd *pd = get_ocrdma_pd(ibpd);
  2681. struct ocrdma_dev *dev = get_ocrdma_dev(ibpd->device);
  2682. u32 num_pbes;
  2683. u32 pbe_size = 0;
  2684. if ((acc & IB_ACCESS_REMOTE_WRITE) && !(acc & IB_ACCESS_LOCAL_WRITE))
  2685. return ERR_PTR(-EINVAL);
  2686. mr = kzalloc(sizeof(*mr), GFP_KERNEL);
  2687. if (!mr)
  2688. return ERR_PTR(status);
  2689. num_pbes = count_kernel_pbes(buf_list, buf_cnt, &pbe_size);
  2690. if (num_pbes == 0) {
  2691. status = -EINVAL;
  2692. goto pbl_err;
  2693. }
  2694. status = ocrdma_get_pbl_info(dev, mr, num_pbes);
  2695. if (status)
  2696. goto pbl_err;
  2697. mr->hwmr.pbe_size = pbe_size;
  2698. mr->hwmr.fbo = *iova_start - (buf_list[0].addr & PAGE_MASK);
  2699. mr->hwmr.va = *iova_start;
  2700. mr->hwmr.local_rd = 1;
  2701. mr->hwmr.remote_wr = (acc & IB_ACCESS_REMOTE_WRITE) ? 1 : 0;
  2702. mr->hwmr.remote_rd = (acc & IB_ACCESS_REMOTE_READ) ? 1 : 0;
  2703. mr->hwmr.local_wr = (acc & IB_ACCESS_LOCAL_WRITE) ? 1 : 0;
  2704. mr->hwmr.remote_atomic = (acc & IB_ACCESS_REMOTE_ATOMIC) ? 1 : 0;
  2705. mr->hwmr.mw_bind = (acc & IB_ACCESS_MW_BIND) ? 1 : 0;
  2706. status = ocrdma_build_pbl_tbl(dev, &mr->hwmr);
  2707. if (status)
  2708. goto pbl_err;
  2709. build_kernel_pbes(buf_list, buf_cnt, pbe_size, mr->hwmr.pbl_table,
  2710. &mr->hwmr);
  2711. status = ocrdma_reg_mr(dev, &mr->hwmr, pd->id, acc);
  2712. if (status)
  2713. goto mbx_err;
  2714. mr->ibmr.lkey = mr->hwmr.lkey;
  2715. if (mr->hwmr.remote_wr || mr->hwmr.remote_rd)
  2716. mr->ibmr.rkey = mr->hwmr.lkey;
  2717. return &mr->ibmr;
  2718. mbx_err:
  2719. ocrdma_free_mr_pbl_tbl(dev, &mr->hwmr);
  2720. pbl_err:
  2721. kfree(mr);
  2722. return ERR_PTR(status);
  2723. }