drm_dp_helper.c 19 KB

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  1. /*
  2. * Copyright © 2009 Keith Packard
  3. *
  4. * Permission to use, copy, modify, distribute, and sell this software and its
  5. * documentation for any purpose is hereby granted without fee, provided that
  6. * the above copyright notice appear in all copies and that both that copyright
  7. * notice and this permission notice appear in supporting documentation, and
  8. * that the name of the copyright holders not be used in advertising or
  9. * publicity pertaining to distribution of the software without specific,
  10. * written prior permission. The copyright holders make no representations
  11. * about the suitability of this software for any purpose. It is provided "as
  12. * is" without express or implied warranty.
  13. *
  14. * THE COPYRIGHT HOLDERS DISCLAIM ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
  15. * INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
  16. * EVENT SHALL THE COPYRIGHT HOLDERS BE LIABLE FOR ANY SPECIAL, INDIRECT OR
  17. * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE,
  18. * DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
  19. * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR PERFORMANCE
  20. * OF THIS SOFTWARE.
  21. */
  22. #include <linux/kernel.h>
  23. #include <linux/module.h>
  24. #include <linux/delay.h>
  25. #include <linux/init.h>
  26. #include <linux/errno.h>
  27. #include <linux/sched.h>
  28. #include <linux/i2c.h>
  29. #include <drm/drm_dp_helper.h>
  30. #include <drm/drmP.h>
  31. /**
  32. * DOC: dp helpers
  33. *
  34. * These functions contain some common logic and helpers at various abstraction
  35. * levels to deal with Display Port sink devices and related things like DP aux
  36. * channel transfers, EDID reading over DP aux channels, decoding certain DPCD
  37. * blocks, ...
  38. */
  39. /* Run a single AUX_CH I2C transaction, writing/reading data as necessary */
  40. static int
  41. i2c_algo_dp_aux_transaction(struct i2c_adapter *adapter, int mode,
  42. uint8_t write_byte, uint8_t *read_byte)
  43. {
  44. struct i2c_algo_dp_aux_data *algo_data = adapter->algo_data;
  45. int ret;
  46. ret = (*algo_data->aux_ch)(adapter, mode,
  47. write_byte, read_byte);
  48. return ret;
  49. }
  50. /*
  51. * I2C over AUX CH
  52. */
  53. /*
  54. * Send the address. If the I2C link is running, this 'restarts'
  55. * the connection with the new address, this is used for doing
  56. * a write followed by a read (as needed for DDC)
  57. */
  58. static int
  59. i2c_algo_dp_aux_address(struct i2c_adapter *adapter, u16 address, bool reading)
  60. {
  61. struct i2c_algo_dp_aux_data *algo_data = adapter->algo_data;
  62. int mode = MODE_I2C_START;
  63. int ret;
  64. if (reading)
  65. mode |= MODE_I2C_READ;
  66. else
  67. mode |= MODE_I2C_WRITE;
  68. algo_data->address = address;
  69. algo_data->running = true;
  70. ret = i2c_algo_dp_aux_transaction(adapter, mode, 0, NULL);
  71. return ret;
  72. }
  73. /*
  74. * Stop the I2C transaction. This closes out the link, sending
  75. * a bare address packet with the MOT bit turned off
  76. */
  77. static void
  78. i2c_algo_dp_aux_stop(struct i2c_adapter *adapter, bool reading)
  79. {
  80. struct i2c_algo_dp_aux_data *algo_data = adapter->algo_data;
  81. int mode = MODE_I2C_STOP;
  82. if (reading)
  83. mode |= MODE_I2C_READ;
  84. else
  85. mode |= MODE_I2C_WRITE;
  86. if (algo_data->running) {
  87. (void) i2c_algo_dp_aux_transaction(adapter, mode, 0, NULL);
  88. algo_data->running = false;
  89. }
  90. }
  91. /*
  92. * Write a single byte to the current I2C address, the
  93. * the I2C link must be running or this returns -EIO
  94. */
  95. static int
  96. i2c_algo_dp_aux_put_byte(struct i2c_adapter *adapter, u8 byte)
  97. {
  98. struct i2c_algo_dp_aux_data *algo_data = adapter->algo_data;
  99. int ret;
  100. if (!algo_data->running)
  101. return -EIO;
  102. ret = i2c_algo_dp_aux_transaction(adapter, MODE_I2C_WRITE, byte, NULL);
  103. return ret;
  104. }
  105. /*
  106. * Read a single byte from the current I2C address, the
  107. * I2C link must be running or this returns -EIO
  108. */
  109. static int
  110. i2c_algo_dp_aux_get_byte(struct i2c_adapter *adapter, u8 *byte_ret)
  111. {
  112. struct i2c_algo_dp_aux_data *algo_data = adapter->algo_data;
  113. int ret;
  114. if (!algo_data->running)
  115. return -EIO;
  116. ret = i2c_algo_dp_aux_transaction(adapter, MODE_I2C_READ, 0, byte_ret);
  117. return ret;
  118. }
  119. static int
  120. i2c_algo_dp_aux_xfer(struct i2c_adapter *adapter,
  121. struct i2c_msg *msgs,
  122. int num)
  123. {
  124. int ret = 0;
  125. bool reading = false;
  126. int m;
  127. int b;
  128. for (m = 0; m < num; m++) {
  129. u16 len = msgs[m].len;
  130. u8 *buf = msgs[m].buf;
  131. reading = (msgs[m].flags & I2C_M_RD) != 0;
  132. ret = i2c_algo_dp_aux_address(adapter, msgs[m].addr, reading);
  133. if (ret < 0)
  134. break;
  135. if (reading) {
  136. for (b = 0; b < len; b++) {
  137. ret = i2c_algo_dp_aux_get_byte(adapter, &buf[b]);
  138. if (ret < 0)
  139. break;
  140. }
  141. } else {
  142. for (b = 0; b < len; b++) {
  143. ret = i2c_algo_dp_aux_put_byte(adapter, buf[b]);
  144. if (ret < 0)
  145. break;
  146. }
  147. }
  148. if (ret < 0)
  149. break;
  150. }
  151. if (ret >= 0)
  152. ret = num;
  153. i2c_algo_dp_aux_stop(adapter, reading);
  154. DRM_DEBUG_KMS("dp_aux_xfer return %d\n", ret);
  155. return ret;
  156. }
  157. static u32
  158. i2c_algo_dp_aux_functionality(struct i2c_adapter *adapter)
  159. {
  160. return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL |
  161. I2C_FUNC_SMBUS_READ_BLOCK_DATA |
  162. I2C_FUNC_SMBUS_BLOCK_PROC_CALL |
  163. I2C_FUNC_10BIT_ADDR;
  164. }
  165. static const struct i2c_algorithm i2c_dp_aux_algo = {
  166. .master_xfer = i2c_algo_dp_aux_xfer,
  167. .functionality = i2c_algo_dp_aux_functionality,
  168. };
  169. static void
  170. i2c_dp_aux_reset_bus(struct i2c_adapter *adapter)
  171. {
  172. (void) i2c_algo_dp_aux_address(adapter, 0, false);
  173. (void) i2c_algo_dp_aux_stop(adapter, false);
  174. }
  175. static int
  176. i2c_dp_aux_prepare_bus(struct i2c_adapter *adapter)
  177. {
  178. adapter->algo = &i2c_dp_aux_algo;
  179. adapter->retries = 3;
  180. i2c_dp_aux_reset_bus(adapter);
  181. return 0;
  182. }
  183. /**
  184. * i2c_dp_aux_add_bus() - register an i2c adapter using the aux ch helper
  185. * @adapter: i2c adapter to register
  186. *
  187. * This registers an i2c adapater that uses dp aux channel as it's underlaying
  188. * transport. The driver needs to fill out the &i2c_algo_dp_aux_data structure
  189. * and store it in the algo_data member of the @adapter argument. This will be
  190. * used by the i2c over dp aux algorithm to drive the hardware.
  191. *
  192. * RETURNS:
  193. * 0 on success, -ERRNO on failure.
  194. */
  195. int
  196. i2c_dp_aux_add_bus(struct i2c_adapter *adapter)
  197. {
  198. int error;
  199. error = i2c_dp_aux_prepare_bus(adapter);
  200. if (error)
  201. return error;
  202. error = i2c_add_adapter(adapter);
  203. return error;
  204. }
  205. EXPORT_SYMBOL(i2c_dp_aux_add_bus);
  206. /* Helpers for DP link training */
  207. static u8 dp_link_status(const u8 link_status[DP_LINK_STATUS_SIZE], int r)
  208. {
  209. return link_status[r - DP_LANE0_1_STATUS];
  210. }
  211. static u8 dp_get_lane_status(const u8 link_status[DP_LINK_STATUS_SIZE],
  212. int lane)
  213. {
  214. int i = DP_LANE0_1_STATUS + (lane >> 1);
  215. int s = (lane & 1) * 4;
  216. u8 l = dp_link_status(link_status, i);
  217. return (l >> s) & 0xf;
  218. }
  219. bool drm_dp_channel_eq_ok(const u8 link_status[DP_LINK_STATUS_SIZE],
  220. int lane_count)
  221. {
  222. u8 lane_align;
  223. u8 lane_status;
  224. int lane;
  225. lane_align = dp_link_status(link_status,
  226. DP_LANE_ALIGN_STATUS_UPDATED);
  227. if ((lane_align & DP_INTERLANE_ALIGN_DONE) == 0)
  228. return false;
  229. for (lane = 0; lane < lane_count; lane++) {
  230. lane_status = dp_get_lane_status(link_status, lane);
  231. if ((lane_status & DP_CHANNEL_EQ_BITS) != DP_CHANNEL_EQ_BITS)
  232. return false;
  233. }
  234. return true;
  235. }
  236. EXPORT_SYMBOL(drm_dp_channel_eq_ok);
  237. bool drm_dp_clock_recovery_ok(const u8 link_status[DP_LINK_STATUS_SIZE],
  238. int lane_count)
  239. {
  240. int lane;
  241. u8 lane_status;
  242. for (lane = 0; lane < lane_count; lane++) {
  243. lane_status = dp_get_lane_status(link_status, lane);
  244. if ((lane_status & DP_LANE_CR_DONE) == 0)
  245. return false;
  246. }
  247. return true;
  248. }
  249. EXPORT_SYMBOL(drm_dp_clock_recovery_ok);
  250. u8 drm_dp_get_adjust_request_voltage(const u8 link_status[DP_LINK_STATUS_SIZE],
  251. int lane)
  252. {
  253. int i = DP_ADJUST_REQUEST_LANE0_1 + (lane >> 1);
  254. int s = ((lane & 1) ?
  255. DP_ADJUST_VOLTAGE_SWING_LANE1_SHIFT :
  256. DP_ADJUST_VOLTAGE_SWING_LANE0_SHIFT);
  257. u8 l = dp_link_status(link_status, i);
  258. return ((l >> s) & 0x3) << DP_TRAIN_VOLTAGE_SWING_SHIFT;
  259. }
  260. EXPORT_SYMBOL(drm_dp_get_adjust_request_voltage);
  261. u8 drm_dp_get_adjust_request_pre_emphasis(const u8 link_status[DP_LINK_STATUS_SIZE],
  262. int lane)
  263. {
  264. int i = DP_ADJUST_REQUEST_LANE0_1 + (lane >> 1);
  265. int s = ((lane & 1) ?
  266. DP_ADJUST_PRE_EMPHASIS_LANE1_SHIFT :
  267. DP_ADJUST_PRE_EMPHASIS_LANE0_SHIFT);
  268. u8 l = dp_link_status(link_status, i);
  269. return ((l >> s) & 0x3) << DP_TRAIN_PRE_EMPHASIS_SHIFT;
  270. }
  271. EXPORT_SYMBOL(drm_dp_get_adjust_request_pre_emphasis);
  272. void drm_dp_link_train_clock_recovery_delay(const u8 dpcd[DP_RECEIVER_CAP_SIZE]) {
  273. if (dpcd[DP_TRAINING_AUX_RD_INTERVAL] == 0)
  274. udelay(100);
  275. else
  276. mdelay(dpcd[DP_TRAINING_AUX_RD_INTERVAL] * 4);
  277. }
  278. EXPORT_SYMBOL(drm_dp_link_train_clock_recovery_delay);
  279. void drm_dp_link_train_channel_eq_delay(const u8 dpcd[DP_RECEIVER_CAP_SIZE]) {
  280. if (dpcd[DP_TRAINING_AUX_RD_INTERVAL] == 0)
  281. udelay(400);
  282. else
  283. mdelay(dpcd[DP_TRAINING_AUX_RD_INTERVAL] * 4);
  284. }
  285. EXPORT_SYMBOL(drm_dp_link_train_channel_eq_delay);
  286. u8 drm_dp_link_rate_to_bw_code(int link_rate)
  287. {
  288. switch (link_rate) {
  289. case 162000:
  290. default:
  291. return DP_LINK_BW_1_62;
  292. case 270000:
  293. return DP_LINK_BW_2_7;
  294. case 540000:
  295. return DP_LINK_BW_5_4;
  296. }
  297. }
  298. EXPORT_SYMBOL(drm_dp_link_rate_to_bw_code);
  299. int drm_dp_bw_code_to_link_rate(u8 link_bw)
  300. {
  301. switch (link_bw) {
  302. case DP_LINK_BW_1_62:
  303. default:
  304. return 162000;
  305. case DP_LINK_BW_2_7:
  306. return 270000;
  307. case DP_LINK_BW_5_4:
  308. return 540000;
  309. }
  310. }
  311. EXPORT_SYMBOL(drm_dp_bw_code_to_link_rate);
  312. /**
  313. * DOC: dp helpers
  314. *
  315. * The DisplayPort AUX channel is an abstraction to allow generic, driver-
  316. * independent access to AUX functionality. Drivers can take advantage of
  317. * this by filling in the fields of the drm_dp_aux structure.
  318. *
  319. * Transactions are described using a hardware-independent drm_dp_aux_msg
  320. * structure, which is passed into a driver's .transfer() implementation.
  321. * Both native and I2C-over-AUX transactions are supported.
  322. */
  323. static int drm_dp_dpcd_access(struct drm_dp_aux *aux, u8 request,
  324. unsigned int offset, void *buffer, size_t size)
  325. {
  326. struct drm_dp_aux_msg msg;
  327. unsigned int retry;
  328. int err;
  329. memset(&msg, 0, sizeof(msg));
  330. msg.address = offset;
  331. msg.request = request;
  332. msg.buffer = buffer;
  333. msg.size = size;
  334. /*
  335. * The specification doesn't give any recommendation on how often to
  336. * retry native transactions, so retry 7 times like for I2C-over-AUX
  337. * transactions.
  338. */
  339. for (retry = 0; retry < 7; retry++) {
  340. err = aux->transfer(aux, &msg);
  341. if (err < 0) {
  342. if (err == -EBUSY)
  343. continue;
  344. return err;
  345. }
  346. switch (msg.reply & DP_AUX_NATIVE_REPLY_MASK) {
  347. case DP_AUX_NATIVE_REPLY_ACK:
  348. if (err < size)
  349. return -EPROTO;
  350. return err;
  351. case DP_AUX_NATIVE_REPLY_NACK:
  352. return -EIO;
  353. case DP_AUX_NATIVE_REPLY_DEFER:
  354. usleep_range(400, 500);
  355. break;
  356. }
  357. }
  358. DRM_DEBUG_KMS("too many retries, giving up\n");
  359. return -EIO;
  360. }
  361. /**
  362. * drm_dp_dpcd_read() - read a series of bytes from the DPCD
  363. * @aux: DisplayPort AUX channel
  364. * @offset: address of the (first) register to read
  365. * @buffer: buffer to store the register values
  366. * @size: number of bytes in @buffer
  367. *
  368. * Returns the number of bytes transferred on success, or a negative error
  369. * code on failure. -EIO is returned if the request was NAKed by the sink or
  370. * if the retry count was exceeded. If not all bytes were transferred, this
  371. * function returns -EPROTO. Errors from the underlying AUX channel transfer
  372. * function, with the exception of -EBUSY (which causes the transaction to
  373. * be retried), are propagated to the caller.
  374. */
  375. ssize_t drm_dp_dpcd_read(struct drm_dp_aux *aux, unsigned int offset,
  376. void *buffer, size_t size)
  377. {
  378. return drm_dp_dpcd_access(aux, DP_AUX_NATIVE_READ, offset, buffer,
  379. size);
  380. }
  381. EXPORT_SYMBOL(drm_dp_dpcd_read);
  382. /**
  383. * drm_dp_dpcd_write() - write a series of bytes to the DPCD
  384. * @aux: DisplayPort AUX channel
  385. * @offset: address of the (first) register to write
  386. * @buffer: buffer containing the values to write
  387. * @size: number of bytes in @buffer
  388. *
  389. * Returns the number of bytes transferred on success, or a negative error
  390. * code on failure. -EIO is returned if the request was NAKed by the sink or
  391. * if the retry count was exceeded. If not all bytes were transferred, this
  392. * function returns -EPROTO. Errors from the underlying AUX channel transfer
  393. * function, with the exception of -EBUSY (which causes the transaction to
  394. * be retried), are propagated to the caller.
  395. */
  396. ssize_t drm_dp_dpcd_write(struct drm_dp_aux *aux, unsigned int offset,
  397. void *buffer, size_t size)
  398. {
  399. return drm_dp_dpcd_access(aux, DP_AUX_NATIVE_WRITE, offset, buffer,
  400. size);
  401. }
  402. EXPORT_SYMBOL(drm_dp_dpcd_write);
  403. /**
  404. * drm_dp_dpcd_read_link_status() - read DPCD link status (bytes 0x202-0x207)
  405. * @aux: DisplayPort AUX channel
  406. * @status: buffer to store the link status in (must be at least 6 bytes)
  407. *
  408. * Returns the number of bytes transferred on success or a negative error
  409. * code on failure.
  410. */
  411. int drm_dp_dpcd_read_link_status(struct drm_dp_aux *aux,
  412. u8 status[DP_LINK_STATUS_SIZE])
  413. {
  414. return drm_dp_dpcd_read(aux, DP_LANE0_1_STATUS, status,
  415. DP_LINK_STATUS_SIZE);
  416. }
  417. EXPORT_SYMBOL(drm_dp_dpcd_read_link_status);
  418. /**
  419. * drm_dp_link_probe() - probe a DisplayPort link for capabilities
  420. * @aux: DisplayPort AUX channel
  421. * @link: pointer to structure in which to return link capabilities
  422. *
  423. * The structure filled in by this function can usually be passed directly
  424. * into drm_dp_link_power_up() and drm_dp_link_configure() to power up and
  425. * configure the link based on the link's capabilities.
  426. *
  427. * Returns 0 on success or a negative error code on failure.
  428. */
  429. int drm_dp_link_probe(struct drm_dp_aux *aux, struct drm_dp_link *link)
  430. {
  431. u8 values[3];
  432. int err;
  433. memset(link, 0, sizeof(*link));
  434. err = drm_dp_dpcd_read(aux, DP_DPCD_REV, values, sizeof(values));
  435. if (err < 0)
  436. return err;
  437. link->revision = values[0];
  438. link->rate = drm_dp_bw_code_to_link_rate(values[1]);
  439. link->num_lanes = values[2] & DP_MAX_LANE_COUNT_MASK;
  440. if (values[2] & DP_ENHANCED_FRAME_CAP)
  441. link->capabilities |= DP_LINK_CAP_ENHANCED_FRAMING;
  442. return 0;
  443. }
  444. EXPORT_SYMBOL(drm_dp_link_probe);
  445. /**
  446. * drm_dp_link_power_up() - power up a DisplayPort link
  447. * @aux: DisplayPort AUX channel
  448. * @link: pointer to a structure containing the link configuration
  449. *
  450. * Returns 0 on success or a negative error code on failure.
  451. */
  452. int drm_dp_link_power_up(struct drm_dp_aux *aux, struct drm_dp_link *link)
  453. {
  454. u8 value;
  455. int err;
  456. /* DP_SET_POWER register is only available on DPCD v1.1 and later */
  457. if (link->revision < 0x11)
  458. return 0;
  459. err = drm_dp_dpcd_readb(aux, DP_SET_POWER, &value);
  460. if (err < 0)
  461. return err;
  462. value &= ~DP_SET_POWER_MASK;
  463. value |= DP_SET_POWER_D0;
  464. err = drm_dp_dpcd_writeb(aux, DP_SET_POWER, value);
  465. if (err < 0)
  466. return err;
  467. /*
  468. * According to the DP 1.1 specification, a "Sink Device must exit the
  469. * power saving state within 1 ms" (Section 2.5.3.1, Table 5-52, "Sink
  470. * Control Field" (register 0x600).
  471. */
  472. usleep_range(1000, 2000);
  473. return 0;
  474. }
  475. EXPORT_SYMBOL(drm_dp_link_power_up);
  476. /**
  477. * drm_dp_link_configure() - configure a DisplayPort link
  478. * @aux: DisplayPort AUX channel
  479. * @link: pointer to a structure containing the link configuration
  480. *
  481. * Returns 0 on success or a negative error code on failure.
  482. */
  483. int drm_dp_link_configure(struct drm_dp_aux *aux, struct drm_dp_link *link)
  484. {
  485. u8 values[2];
  486. int err;
  487. values[0] = drm_dp_link_rate_to_bw_code(link->rate);
  488. values[1] = link->num_lanes;
  489. if (link->capabilities & DP_LINK_CAP_ENHANCED_FRAMING)
  490. values[1] |= DP_LANE_COUNT_ENHANCED_FRAME_EN;
  491. err = drm_dp_dpcd_write(aux, DP_LINK_BW_SET, values, sizeof(values));
  492. if (err < 0)
  493. return err;
  494. return 0;
  495. }
  496. EXPORT_SYMBOL(drm_dp_link_configure);
  497. /*
  498. * I2C-over-AUX implementation
  499. */
  500. static u32 drm_dp_i2c_functionality(struct i2c_adapter *adapter)
  501. {
  502. return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL |
  503. I2C_FUNC_SMBUS_READ_BLOCK_DATA |
  504. I2C_FUNC_SMBUS_BLOCK_PROC_CALL |
  505. I2C_FUNC_10BIT_ADDR;
  506. }
  507. /*
  508. * Transfer a single I2C-over-AUX message and handle various error conditions,
  509. * retrying the transaction as appropriate.
  510. */
  511. static int drm_dp_i2c_do_msg(struct drm_dp_aux *aux, struct drm_dp_aux_msg *msg)
  512. {
  513. unsigned int retry;
  514. int err;
  515. /*
  516. * DP1.2 sections 2.7.7.1.5.6.1 and 2.7.7.1.6.6.1: A DP Source device
  517. * is required to retry at least seven times upon receiving AUX_DEFER
  518. * before giving up the AUX transaction.
  519. */
  520. for (retry = 0; retry < 7; retry++) {
  521. err = aux->transfer(aux, msg);
  522. if (err < 0) {
  523. if (err == -EBUSY)
  524. continue;
  525. DRM_DEBUG_KMS("transaction failed: %d\n", err);
  526. return err;
  527. }
  528. switch (msg->reply & DP_AUX_NATIVE_REPLY_MASK) {
  529. case DP_AUX_NATIVE_REPLY_ACK:
  530. /*
  531. * For I2C-over-AUX transactions this isn't enough, we
  532. * need to check for the I2C ACK reply.
  533. */
  534. break;
  535. case DP_AUX_NATIVE_REPLY_NACK:
  536. DRM_DEBUG_KMS("native nack\n");
  537. return -EREMOTEIO;
  538. case DP_AUX_NATIVE_REPLY_DEFER:
  539. DRM_DEBUG_KMS("native defer");
  540. /*
  541. * We could check for I2C bit rate capabilities and if
  542. * available adjust this interval. We could also be
  543. * more careful with DP-to-legacy adapters where a
  544. * long legacy cable may force very low I2C bit rates.
  545. *
  546. * For now just defer for long enough to hopefully be
  547. * safe for all use-cases.
  548. */
  549. usleep_range(500, 600);
  550. continue;
  551. default:
  552. DRM_ERROR("invalid native reply %#04x\n", msg->reply);
  553. return -EREMOTEIO;
  554. }
  555. switch (msg->reply & DP_AUX_I2C_REPLY_MASK) {
  556. case DP_AUX_I2C_REPLY_ACK:
  557. /*
  558. * Both native ACK and I2C ACK replies received. We
  559. * can assume the transfer was successful.
  560. */
  561. if (err < msg->size)
  562. return -EPROTO;
  563. return 0;
  564. case DP_AUX_I2C_REPLY_NACK:
  565. DRM_DEBUG_KMS("I2C nack\n");
  566. return -EREMOTEIO;
  567. case DP_AUX_I2C_REPLY_DEFER:
  568. DRM_DEBUG_KMS("I2C defer\n");
  569. usleep_range(400, 500);
  570. continue;
  571. default:
  572. DRM_ERROR("invalid I2C reply %#04x\n", msg->reply);
  573. return -EREMOTEIO;
  574. }
  575. }
  576. DRM_DEBUG_KMS("too many retries, giving up\n");
  577. return -EREMOTEIO;
  578. }
  579. static int drm_dp_i2c_xfer(struct i2c_adapter *adapter, struct i2c_msg *msgs,
  580. int num)
  581. {
  582. struct drm_dp_aux *aux = adapter->algo_data;
  583. unsigned int i, j;
  584. for (i = 0; i < num; i++) {
  585. struct drm_dp_aux_msg msg;
  586. int err;
  587. /*
  588. * Many hardware implementations support FIFOs larger than a
  589. * single byte, but it has been empirically determined that
  590. * transferring data in larger chunks can actually lead to
  591. * decreased performance. Therefore each message is simply
  592. * transferred byte-by-byte.
  593. */
  594. for (j = 0; j < msgs[i].len; j++) {
  595. memset(&msg, 0, sizeof(msg));
  596. msg.address = msgs[i].addr;
  597. msg.request = (msgs[i].flags & I2C_M_RD) ?
  598. DP_AUX_I2C_READ :
  599. DP_AUX_I2C_WRITE;
  600. /*
  601. * All messages except the last one are middle-of-
  602. * transfer messages.
  603. */
  604. if ((i < num - 1) || (j < msgs[i].len - 1))
  605. msg.request |= DP_AUX_I2C_MOT;
  606. msg.buffer = msgs[i].buf + j;
  607. msg.size = 1;
  608. err = drm_dp_i2c_do_msg(aux, &msg);
  609. if (err < 0)
  610. return err;
  611. }
  612. }
  613. return num;
  614. }
  615. static const struct i2c_algorithm drm_dp_i2c_algo = {
  616. .functionality = drm_dp_i2c_functionality,
  617. .master_xfer = drm_dp_i2c_xfer,
  618. };
  619. /**
  620. * drm_dp_aux_register_i2c_bus() - register an I2C adapter for I2C-over-AUX
  621. * @aux: DisplayPort AUX channel
  622. *
  623. * Returns 0 on success or a negative error code on failure.
  624. */
  625. int drm_dp_aux_register_i2c_bus(struct drm_dp_aux *aux)
  626. {
  627. aux->ddc.algo = &drm_dp_i2c_algo;
  628. aux->ddc.algo_data = aux;
  629. aux->ddc.retries = 3;
  630. aux->ddc.class = I2C_CLASS_DDC;
  631. aux->ddc.owner = THIS_MODULE;
  632. aux->ddc.dev.parent = aux->dev;
  633. aux->ddc.dev.of_node = aux->dev->of_node;
  634. strlcpy(aux->ddc.name, aux->name ? aux->name : dev_name(aux->dev),
  635. sizeof(aux->ddc.name));
  636. return i2c_add_adapter(&aux->ddc);
  637. }
  638. EXPORT_SYMBOL(drm_dp_aux_register_i2c_bus);
  639. /**
  640. * drm_dp_aux_unregister_i2c_bus() - unregister an I2C-over-AUX adapter
  641. * @aux: DisplayPort AUX channel
  642. */
  643. void drm_dp_aux_unregister_i2c_bus(struct drm_dp_aux *aux)
  644. {
  645. i2c_del_adapter(&aux->ddc);
  646. }
  647. EXPORT_SYMBOL(drm_dp_aux_unregister_i2c_bus);