at91-sama5d2_xplained.dts 8.7 KB

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  1. /*
  2. * at91-sama5d2_xplained.dts - Device Tree file for SAMA5D2 Xplained board
  3. *
  4. * Copyright (C) 2015 Atmel,
  5. * 2015 Nicolas Ferre <nicolas.ferre@atmel.com>
  6. *
  7. * This file is dual-licensed: you can use it either under the terms
  8. * of the GPL or the X11 license, at your option. Note that this dual
  9. * licensing only applies to this file, and not this project as a
  10. * whole.
  11. *
  12. * a) This file is free software; you can redistribute it and/or
  13. * modify it under the terms of the GNU General Public License as
  14. * published by the Free Software Foundation; either version 2 of the
  15. * License, or (at your option) any later version.
  16. *
  17. * This file is distributed in the hope that it will be useful,
  18. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  19. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  20. * GNU General Public License for more details.
  21. *
  22. * Or, alternatively,
  23. *
  24. * b) Permission is hereby granted, free of charge, to any person
  25. * obtaining a copy of this software and associated documentation
  26. * files (the "Software"), to deal in the Software without
  27. * restriction, including without limitation the rights to use,
  28. * copy, modify, merge, publish, distribute, sublicense, and/or
  29. * sell copies of the Software, and to permit persons to whom the
  30. * Software is furnished to do so, subject to the following
  31. * conditions:
  32. *
  33. * The above copyright notice and this permission notice shall be
  34. * included in all copies or substantial portions of the Software.
  35. *
  36. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  37. * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
  38. * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  39. * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
  40. * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
  41. * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  42. * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  43. * OTHER DEALINGS IN THE SOFTWARE.
  44. */
  45. /dts-v1/;
  46. #include "sama5d2.dtsi"
  47. #include "sama5d2-pinfunc.h"
  48. #include <dt-bindings/mfd/atmel-flexcom.h>
  49. / {
  50. model = "Atmel SAMA5D2 Xplained";
  51. compatible = "atmel,sama5d2-xplained", "atmel,sama5d2", "atmel,sama5";
  52. chosen {
  53. stdout-path = "serial0:115200n8";
  54. };
  55. memory {
  56. reg = <0x20000000 0x80000>;
  57. };
  58. clocks {
  59. slow_xtal {
  60. clock-frequency = <32768>;
  61. };
  62. main_xtal {
  63. clock-frequency = <12000000>;
  64. };
  65. };
  66. ahb {
  67. usb0: gadget@00300000 {
  68. status = "okay";
  69. };
  70. usb1: ohci@00400000 {
  71. num-ports = <3>;
  72. status = "okay";
  73. };
  74. usb2: ehci@00500000 {
  75. status = "okay";
  76. };
  77. sdmmc0: sdio-host@a0000000 {
  78. bus-width = <8>;
  79. pinctrl-names = "default";
  80. pinctrl-0 = <&pinctrl_sdmmc0_default>;
  81. non-removable;
  82. mmc-ddr-1_8v;
  83. status = "okay";
  84. };
  85. sdmmc1: sdio-host@b0000000 {
  86. bus-width = <4>;
  87. pinctrl-names = "default";
  88. pinctrl-0 = <&pinctrl_sdmmc1_default>;
  89. status = "okay"; /* conflict with qspi0 */
  90. };
  91. apb {
  92. spi0: spi@f8000000 {
  93. pinctrl-names = "default";
  94. pinctrl-0 = <&pinctrl_spi0_default>;
  95. status = "okay";
  96. m25p80@0 {
  97. compatible = "atmel,at25df321a";
  98. reg = <0>;
  99. spi-max-frequency = <50000000>;
  100. };
  101. };
  102. macb0: ethernet@f8008000 {
  103. pinctrl-names = "default";
  104. pinctrl-0 = <&pinctrl_macb0_default>;
  105. phy-mode = "rmii";
  106. status = "okay";
  107. };
  108. uart1: serial@f8020000 {
  109. pinctrl-names = "default";
  110. pinctrl-0 = <&pinctrl_uart1_default>;
  111. status = "okay";
  112. };
  113. i2c0: i2c@f8028000 {
  114. dmas = <0>, <0>;
  115. pinctrl-names = "default";
  116. pinctrl-0 = <&pinctrl_i2c0_default>;
  117. status = "okay";
  118. pmic: act8865@5b {
  119. compatible = "active-semi,act8865";
  120. reg = <0x5b>;
  121. active-semi,vsel-high;
  122. status = "okay";
  123. regulators {
  124. vdd_1v35_reg: DCDC_REG1 {
  125. regulator-name = "VDD_1V35";
  126. regulator-min-microvolt = <1350000>;
  127. regulator-max-microvolt = <1350000>;
  128. regulator-always-on;
  129. };
  130. vdd_1v2_reg: DCDC_REG2 {
  131. regulator-name = "VDD_1V2";
  132. regulator-min-microvolt = <1100000>;
  133. regulator-max-microvolt = <1300000>;
  134. regulator-always-on;
  135. };
  136. vdd_3v3_reg: DCDC_REG3 {
  137. regulator-name = "VDD_3V3";
  138. regulator-min-microvolt = <3300000>;
  139. regulator-max-microvolt = <3300000>;
  140. regulator-always-on;
  141. };
  142. vdd_fuse_reg: LDO_REG1 {
  143. regulator-name = "VDD_FUSE";
  144. regulator-min-microvolt = <2500000>;
  145. regulator-max-microvolt = <2500000>;
  146. regulator-always-on;
  147. };
  148. vdd_3v3_lp_reg: LDO_REG2 {
  149. regulator-name = "VDD_3V3_LP";
  150. regulator-min-microvolt = <3300000>;
  151. regulator-max-microvolt = <3300000>;
  152. regulator-always-on;
  153. };
  154. vdd_led_reg: LDO_REG3 {
  155. regulator-name = "VDD_LED";
  156. regulator-min-microvolt = <3300000>;
  157. regulator-max-microvolt = <3300000>;
  158. regulator-always-on;
  159. };
  160. vdd_sdhc_1v8_reg: LDO_REG4 {
  161. regulator-name = "VDD_SDHC_1V8";
  162. regulator-min-microvolt = <1800000>;
  163. regulator-max-microvolt = <1800000>;
  164. regulator-always-on;
  165. };
  166. };
  167. };
  168. };
  169. flx0: flexcom@f8034000 {
  170. atmel,flexcom-mode = <ATMEL_FLEXCOM_MODE_USART>;
  171. status = "disabled"; /* conflict with ISC_D2 & ISC_D3 data pins */
  172. uart5: serial@200 {
  173. compatible = "atmel,at91sam9260-usart";
  174. reg = <0x200 0x200>;
  175. interrupts = <19 IRQ_TYPE_LEVEL_HIGH 7>;
  176. clocks = <&flx0_clk>;
  177. clock-names = "usart";
  178. pinctrl-names = "default";
  179. pinctrl-0 = <&pinctrl_flx0_default>;
  180. atmel,fifo-size = <32>;
  181. status = "okay";
  182. };
  183. };
  184. uart3: serial@fc008000 {
  185. pinctrl-names = "default";
  186. pinctrl-0 = <&pinctrl_uart3_default>;
  187. status = "okay";
  188. };
  189. flx4: flexcom@fc018000 {
  190. atmel,flexcom-mode = <ATMEL_FLEXCOM_MODE_TWI>;
  191. status = "okay";
  192. i2c2: i2c@600 {
  193. compatible = "atmel,sama5d2-i2c";
  194. reg = <0x600 0x200>;
  195. interrupts = <23 IRQ_TYPE_LEVEL_HIGH 7>;
  196. dmas = <0>, <0>;
  197. dma-names = "tx", "rx";
  198. #address-cells = <1>;
  199. #size-cells = <0>;
  200. clocks = <&flx4_clk>;
  201. pinctrl-names = "default";
  202. pinctrl-0 = <&pinctrl_flx4_default>;
  203. atmel,fifo-size = <16>;
  204. status = "okay";
  205. };
  206. };
  207. i2c1: i2c@fc028000 {
  208. dmas = <0>, <0>;
  209. pinctrl-names = "default";
  210. pinctrl-0 = <&pinctrl_i2c1_default>;
  211. status = "okay";
  212. at24@54 {
  213. compatible = "atmel,24c02";
  214. reg = <0x54>;
  215. pagesize = <16>;
  216. };
  217. };
  218. pinctrl@fc038000 {
  219. pinctrl_flx0_default: flx0_default {
  220. pinmux = <PIN_PB28__FLEXCOM0_IO0>,
  221. <PIN_PB29__FLEXCOM0_IO1>;
  222. bias-disable;
  223. };
  224. pinctrl_flx4_default: flx4_default {
  225. pinmux = <PIN_PD12__FLEXCOM4_IO0>,
  226. <PIN_PD13__FLEXCOM4_IO1>;
  227. bias-disable;
  228. };
  229. pinctrl_i2c0_default: i2c0_default {
  230. pinmux = <PIN_PD21__TWD0>,
  231. <PIN_PD22__TWCK0>;
  232. bias-disable;
  233. };
  234. pinctrl_i2c1_default: i2c1_default {
  235. pinmux = <PIN_PD4__TWD1>,
  236. <PIN_PD5__TWCK1>;
  237. bias-disable;
  238. };
  239. pinctrl_macb0_default: macb0_default {
  240. pinmux = <PIN_PB14__GTXCK>,
  241. <PIN_PB15__GTXEN>,
  242. <PIN_PB16__GRXDV>,
  243. <PIN_PB17__GRXER>,
  244. <PIN_PB18__GRX0>,
  245. <PIN_PB19__GRX1>,
  246. <PIN_PB20__GTX0>,
  247. <PIN_PB21__GTX1>,
  248. <PIN_PB22__GMDC>,
  249. <PIN_PB23__GMDIO>;
  250. bias-disable;
  251. };
  252. pinctrl_sdmmc0_default: sdmmc0_default {
  253. cmd_data {
  254. pinmux = <PIN_PA1__SDMMC0_CMD>,
  255. <PIN_PA2__SDMMC0_DAT0>,
  256. <PIN_PA3__SDMMC0_DAT1>,
  257. <PIN_PA4__SDMMC0_DAT2>,
  258. <PIN_PA5__SDMMC0_DAT3>,
  259. <PIN_PA6__SDMMC0_DAT4>,
  260. <PIN_PA7__SDMMC0_DAT5>,
  261. <PIN_PA8__SDMMC0_DAT6>,
  262. <PIN_PA9__SDMMC0_DAT7>;
  263. bias-pull-up;
  264. };
  265. ck_cd_rstn_vddsel {
  266. pinmux = <PIN_PA0__SDMMC0_CK>,
  267. <PIN_PA10__SDMMC0_RSTN>,
  268. <PIN_PA11__SDMMC0_VDDSEL>,
  269. <PIN_PA13__SDMMC0_CD>;
  270. bias-disable;
  271. };
  272. };
  273. pinctrl_sdmmc1_default: sdmmc1_default {
  274. cmd_data {
  275. pinmux = <PIN_PA28__SDMMC1_CMD>,
  276. <PIN_PA18__SDMMC1_DAT0>,
  277. <PIN_PA19__SDMMC1_DAT1>,
  278. <PIN_PA20__SDMMC1_DAT2>,
  279. <PIN_PA21__SDMMC1_DAT3>;
  280. bias-pull-up;
  281. };
  282. conf-ck_cd {
  283. pinmux = <PIN_PA22__SDMMC1_CK>,
  284. <PIN_PA30__SDMMC1_CD>;
  285. bias-disable;
  286. };
  287. };
  288. pinctrl_spi0_default: spi0_default {
  289. pinmux = <PIN_PA14__SPI0_SPCK>,
  290. <PIN_PA15__SPI0_MOSI>,
  291. <PIN_PA16__SPI0_MISO>,
  292. <PIN_PA17__SPI0_NPCS0>;
  293. bias-disable;
  294. };
  295. pinctrl_uart1_default: uart1_default {
  296. pinmux = <PIN_PD2__URXD1>,
  297. <PIN_PD3__UTXD1>;
  298. bias-disable;
  299. };
  300. pinctrl_uart3_default: uart3_default {
  301. pinmux = <PIN_PB11__URXD3>,
  302. <PIN_PB12__UTXD3>;
  303. bias-disable;
  304. };
  305. };
  306. };
  307. };
  308. };