udc.c 47 KB

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  1. /*
  2. * udc.c - ChipIdea UDC driver
  3. *
  4. * Copyright (C) 2008 Chipidea - MIPS Technologies, Inc. All rights reserved.
  5. *
  6. * Author: David Lopo
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License version 2 as
  10. * published by the Free Software Foundation.
  11. */
  12. #include <linux/delay.h>
  13. #include <linux/device.h>
  14. #include <linux/dmapool.h>
  15. #include <linux/err.h>
  16. #include <linux/irqreturn.h>
  17. #include <linux/kernel.h>
  18. #include <linux/slab.h>
  19. #include <linux/pm_runtime.h>
  20. #include <linux/usb/ch9.h>
  21. #include <linux/usb/gadget.h>
  22. #include <linux/usb/otg-fsm.h>
  23. #include <linux/usb/chipidea.h>
  24. #include "ci.h"
  25. #include "udc.h"
  26. #include "bits.h"
  27. #include "debug.h"
  28. #include "otg.h"
  29. #include "otg_fsm.h"
  30. /* control endpoint description */
  31. static const struct usb_endpoint_descriptor
  32. ctrl_endpt_out_desc = {
  33. .bLength = USB_DT_ENDPOINT_SIZE,
  34. .bDescriptorType = USB_DT_ENDPOINT,
  35. .bEndpointAddress = USB_DIR_OUT,
  36. .bmAttributes = USB_ENDPOINT_XFER_CONTROL,
  37. .wMaxPacketSize = cpu_to_le16(CTRL_PAYLOAD_MAX),
  38. };
  39. static const struct usb_endpoint_descriptor
  40. ctrl_endpt_in_desc = {
  41. .bLength = USB_DT_ENDPOINT_SIZE,
  42. .bDescriptorType = USB_DT_ENDPOINT,
  43. .bEndpointAddress = USB_DIR_IN,
  44. .bmAttributes = USB_ENDPOINT_XFER_CONTROL,
  45. .wMaxPacketSize = cpu_to_le16(CTRL_PAYLOAD_MAX),
  46. };
  47. /**
  48. * hw_ep_bit: calculates the bit number
  49. * @num: endpoint number
  50. * @dir: endpoint direction
  51. *
  52. * This function returns bit number
  53. */
  54. static inline int hw_ep_bit(int num, int dir)
  55. {
  56. return num + (dir ? 16 : 0);
  57. }
  58. static inline int ep_to_bit(struct ci_hdrc *ci, int n)
  59. {
  60. int fill = 16 - ci->hw_ep_max / 2;
  61. if (n >= ci->hw_ep_max / 2)
  62. n += fill;
  63. return n;
  64. }
  65. /**
  66. * hw_device_state: enables/disables interrupts (execute without interruption)
  67. * @dma: 0 => disable, !0 => enable and set dma engine
  68. *
  69. * This function returns an error code
  70. */
  71. static int hw_device_state(struct ci_hdrc *ci, u32 dma)
  72. {
  73. if (dma) {
  74. hw_write(ci, OP_ENDPTLISTADDR, ~0, dma);
  75. /* interrupt, error, port change, reset, sleep/suspend */
  76. hw_write(ci, OP_USBINTR, ~0,
  77. USBi_UI|USBi_UEI|USBi_PCI|USBi_URI|USBi_SLI);
  78. } else {
  79. hw_write(ci, OP_USBINTR, ~0, 0);
  80. }
  81. return 0;
  82. }
  83. /**
  84. * hw_ep_flush: flush endpoint fifo (execute without interruption)
  85. * @num: endpoint number
  86. * @dir: endpoint direction
  87. *
  88. * This function returns an error code
  89. */
  90. static int hw_ep_flush(struct ci_hdrc *ci, int num, int dir)
  91. {
  92. int n = hw_ep_bit(num, dir);
  93. do {
  94. /* flush any pending transfer */
  95. hw_write(ci, OP_ENDPTFLUSH, ~0, BIT(n));
  96. while (hw_read(ci, OP_ENDPTFLUSH, BIT(n)))
  97. cpu_relax();
  98. } while (hw_read(ci, OP_ENDPTSTAT, BIT(n)));
  99. return 0;
  100. }
  101. /**
  102. * hw_ep_disable: disables endpoint (execute without interruption)
  103. * @num: endpoint number
  104. * @dir: endpoint direction
  105. *
  106. * This function returns an error code
  107. */
  108. static int hw_ep_disable(struct ci_hdrc *ci, int num, int dir)
  109. {
  110. hw_ep_flush(ci, num, dir);
  111. hw_write(ci, OP_ENDPTCTRL + num,
  112. dir ? ENDPTCTRL_TXE : ENDPTCTRL_RXE, 0);
  113. return 0;
  114. }
  115. /**
  116. * hw_ep_enable: enables endpoint (execute without interruption)
  117. * @num: endpoint number
  118. * @dir: endpoint direction
  119. * @type: endpoint type
  120. *
  121. * This function returns an error code
  122. */
  123. static int hw_ep_enable(struct ci_hdrc *ci, int num, int dir, int type)
  124. {
  125. u32 mask, data;
  126. if (dir) {
  127. mask = ENDPTCTRL_TXT; /* type */
  128. data = type << __ffs(mask);
  129. mask |= ENDPTCTRL_TXS; /* unstall */
  130. mask |= ENDPTCTRL_TXR; /* reset data toggle */
  131. data |= ENDPTCTRL_TXR;
  132. mask |= ENDPTCTRL_TXE; /* enable */
  133. data |= ENDPTCTRL_TXE;
  134. } else {
  135. mask = ENDPTCTRL_RXT; /* type */
  136. data = type << __ffs(mask);
  137. mask |= ENDPTCTRL_RXS; /* unstall */
  138. mask |= ENDPTCTRL_RXR; /* reset data toggle */
  139. data |= ENDPTCTRL_RXR;
  140. mask |= ENDPTCTRL_RXE; /* enable */
  141. data |= ENDPTCTRL_RXE;
  142. }
  143. hw_write(ci, OP_ENDPTCTRL + num, mask, data);
  144. return 0;
  145. }
  146. /**
  147. * hw_ep_get_halt: return endpoint halt status
  148. * @num: endpoint number
  149. * @dir: endpoint direction
  150. *
  151. * This function returns 1 if endpoint halted
  152. */
  153. static int hw_ep_get_halt(struct ci_hdrc *ci, int num, int dir)
  154. {
  155. u32 mask = dir ? ENDPTCTRL_TXS : ENDPTCTRL_RXS;
  156. return hw_read(ci, OP_ENDPTCTRL + num, mask) ? 1 : 0;
  157. }
  158. /**
  159. * hw_ep_prime: primes endpoint (execute without interruption)
  160. * @num: endpoint number
  161. * @dir: endpoint direction
  162. * @is_ctrl: true if control endpoint
  163. *
  164. * This function returns an error code
  165. */
  166. static int hw_ep_prime(struct ci_hdrc *ci, int num, int dir, int is_ctrl)
  167. {
  168. int n = hw_ep_bit(num, dir);
  169. if (is_ctrl && dir == RX && hw_read(ci, OP_ENDPTSETUPSTAT, BIT(num)))
  170. return -EAGAIN;
  171. hw_write(ci, OP_ENDPTPRIME, ~0, BIT(n));
  172. while (hw_read(ci, OP_ENDPTPRIME, BIT(n)))
  173. cpu_relax();
  174. if (is_ctrl && dir == RX && hw_read(ci, OP_ENDPTSETUPSTAT, BIT(num)))
  175. return -EAGAIN;
  176. /* status shoult be tested according with manual but it doesn't work */
  177. return 0;
  178. }
  179. /**
  180. * hw_ep_set_halt: configures ep halt & resets data toggle after clear (execute
  181. * without interruption)
  182. * @num: endpoint number
  183. * @dir: endpoint direction
  184. * @value: true => stall, false => unstall
  185. *
  186. * This function returns an error code
  187. */
  188. static int hw_ep_set_halt(struct ci_hdrc *ci, int num, int dir, int value)
  189. {
  190. if (value != 0 && value != 1)
  191. return -EINVAL;
  192. do {
  193. enum ci_hw_regs reg = OP_ENDPTCTRL + num;
  194. u32 mask_xs = dir ? ENDPTCTRL_TXS : ENDPTCTRL_RXS;
  195. u32 mask_xr = dir ? ENDPTCTRL_TXR : ENDPTCTRL_RXR;
  196. /* data toggle - reserved for EP0 but it's in ESS */
  197. hw_write(ci, reg, mask_xs|mask_xr,
  198. value ? mask_xs : mask_xr);
  199. } while (value != hw_ep_get_halt(ci, num, dir));
  200. return 0;
  201. }
  202. /**
  203. * hw_is_port_high_speed: test if port is high speed
  204. *
  205. * This function returns true if high speed port
  206. */
  207. static int hw_port_is_high_speed(struct ci_hdrc *ci)
  208. {
  209. return ci->hw_bank.lpm ? hw_read(ci, OP_DEVLC, DEVLC_PSPD) :
  210. hw_read(ci, OP_PORTSC, PORTSC_HSP);
  211. }
  212. /**
  213. * hw_test_and_clear_complete: test & clear complete status (execute without
  214. * interruption)
  215. * @n: endpoint number
  216. *
  217. * This function returns complete status
  218. */
  219. static int hw_test_and_clear_complete(struct ci_hdrc *ci, int n)
  220. {
  221. n = ep_to_bit(ci, n);
  222. return hw_test_and_clear(ci, OP_ENDPTCOMPLETE, BIT(n));
  223. }
  224. /**
  225. * hw_test_and_clear_intr_active: test & clear active interrupts (execute
  226. * without interruption)
  227. *
  228. * This function returns active interrutps
  229. */
  230. static u32 hw_test_and_clear_intr_active(struct ci_hdrc *ci)
  231. {
  232. u32 reg = hw_read_intr_status(ci) & hw_read_intr_enable(ci);
  233. hw_write(ci, OP_USBSTS, ~0, reg);
  234. return reg;
  235. }
  236. /**
  237. * hw_test_and_clear_setup_guard: test & clear setup guard (execute without
  238. * interruption)
  239. *
  240. * This function returns guard value
  241. */
  242. static int hw_test_and_clear_setup_guard(struct ci_hdrc *ci)
  243. {
  244. return hw_test_and_write(ci, OP_USBCMD, USBCMD_SUTW, 0);
  245. }
  246. /**
  247. * hw_test_and_set_setup_guard: test & set setup guard (execute without
  248. * interruption)
  249. *
  250. * This function returns guard value
  251. */
  252. static int hw_test_and_set_setup_guard(struct ci_hdrc *ci)
  253. {
  254. return hw_test_and_write(ci, OP_USBCMD, USBCMD_SUTW, USBCMD_SUTW);
  255. }
  256. /**
  257. * hw_usb_set_address: configures USB address (execute without interruption)
  258. * @value: new USB address
  259. *
  260. * This function explicitly sets the address, without the "USBADRA" (advance)
  261. * feature, which is not supported by older versions of the controller.
  262. */
  263. static void hw_usb_set_address(struct ci_hdrc *ci, u8 value)
  264. {
  265. hw_write(ci, OP_DEVICEADDR, DEVICEADDR_USBADR,
  266. value << __ffs(DEVICEADDR_USBADR));
  267. }
  268. /**
  269. * hw_usb_reset: restart device after a bus reset (execute without
  270. * interruption)
  271. *
  272. * This function returns an error code
  273. */
  274. static int hw_usb_reset(struct ci_hdrc *ci)
  275. {
  276. hw_usb_set_address(ci, 0);
  277. /* ESS flushes only at end?!? */
  278. hw_write(ci, OP_ENDPTFLUSH, ~0, ~0);
  279. /* clear setup token semaphores */
  280. hw_write(ci, OP_ENDPTSETUPSTAT, 0, 0);
  281. /* clear complete status */
  282. hw_write(ci, OP_ENDPTCOMPLETE, 0, 0);
  283. /* wait until all bits cleared */
  284. while (hw_read(ci, OP_ENDPTPRIME, ~0))
  285. udelay(10); /* not RTOS friendly */
  286. /* reset all endpoints ? */
  287. /* reset internal status and wait for further instructions
  288. no need to verify the port reset status (ESS does it) */
  289. return 0;
  290. }
  291. /******************************************************************************
  292. * UTIL block
  293. *****************************************************************************/
  294. static int add_td_to_list(struct ci_hw_ep *hwep, struct ci_hw_req *hwreq,
  295. unsigned length)
  296. {
  297. int i;
  298. u32 temp;
  299. struct td_node *lastnode, *node = kzalloc(sizeof(struct td_node),
  300. GFP_ATOMIC);
  301. if (node == NULL)
  302. return -ENOMEM;
  303. node->ptr = dma_pool_zalloc(hwep->td_pool, GFP_ATOMIC,
  304. &node->dma);
  305. if (node->ptr == NULL) {
  306. kfree(node);
  307. return -ENOMEM;
  308. }
  309. node->ptr->token = cpu_to_le32(length << __ffs(TD_TOTAL_BYTES));
  310. node->ptr->token &= cpu_to_le32(TD_TOTAL_BYTES);
  311. node->ptr->token |= cpu_to_le32(TD_STATUS_ACTIVE);
  312. if (hwep->type == USB_ENDPOINT_XFER_ISOC && hwep->dir == TX) {
  313. u32 mul = hwreq->req.length / hwep->ep.maxpacket;
  314. if (hwreq->req.length == 0
  315. || hwreq->req.length % hwep->ep.maxpacket)
  316. mul++;
  317. node->ptr->token |= mul << __ffs(TD_MULTO);
  318. }
  319. temp = (u32) (hwreq->req.dma + hwreq->req.actual);
  320. if (length) {
  321. node->ptr->page[0] = cpu_to_le32(temp);
  322. for (i = 1; i < TD_PAGE_COUNT; i++) {
  323. u32 page = temp + i * CI_HDRC_PAGE_SIZE;
  324. page &= ~TD_RESERVED_MASK;
  325. node->ptr->page[i] = cpu_to_le32(page);
  326. }
  327. }
  328. hwreq->req.actual += length;
  329. if (!list_empty(&hwreq->tds)) {
  330. /* get the last entry */
  331. lastnode = list_entry(hwreq->tds.prev,
  332. struct td_node, td);
  333. lastnode->ptr->next = cpu_to_le32(node->dma);
  334. }
  335. INIT_LIST_HEAD(&node->td);
  336. list_add_tail(&node->td, &hwreq->tds);
  337. return 0;
  338. }
  339. /**
  340. * _usb_addr: calculates endpoint address from direction & number
  341. * @ep: endpoint
  342. */
  343. static inline u8 _usb_addr(struct ci_hw_ep *ep)
  344. {
  345. return ((ep->dir == TX) ? USB_ENDPOINT_DIR_MASK : 0) | ep->num;
  346. }
  347. /**
  348. * _hardware_queue: configures a request at hardware level
  349. * @gadget: gadget
  350. * @hwep: endpoint
  351. *
  352. * This function returns an error code
  353. */
  354. static int _hardware_enqueue(struct ci_hw_ep *hwep, struct ci_hw_req *hwreq)
  355. {
  356. struct ci_hdrc *ci = hwep->ci;
  357. int ret = 0;
  358. unsigned rest = hwreq->req.length;
  359. int pages = TD_PAGE_COUNT;
  360. struct td_node *firstnode, *lastnode;
  361. /* don't queue twice */
  362. if (hwreq->req.status == -EALREADY)
  363. return -EALREADY;
  364. hwreq->req.status = -EALREADY;
  365. ret = usb_gadget_map_request(&ci->gadget, &hwreq->req, hwep->dir);
  366. if (ret)
  367. return ret;
  368. /*
  369. * The first buffer could be not page aligned.
  370. * In that case we have to span into one extra td.
  371. */
  372. if (hwreq->req.dma % PAGE_SIZE)
  373. pages--;
  374. if (rest == 0)
  375. add_td_to_list(hwep, hwreq, 0);
  376. while (rest > 0) {
  377. unsigned count = min(hwreq->req.length - hwreq->req.actual,
  378. (unsigned)(pages * CI_HDRC_PAGE_SIZE));
  379. add_td_to_list(hwep, hwreq, count);
  380. rest -= count;
  381. }
  382. if (hwreq->req.zero && hwreq->req.length && hwep->dir == TX
  383. && (hwreq->req.length % hwep->ep.maxpacket == 0))
  384. add_td_to_list(hwep, hwreq, 0);
  385. firstnode = list_first_entry(&hwreq->tds, struct td_node, td);
  386. lastnode = list_entry(hwreq->tds.prev,
  387. struct td_node, td);
  388. lastnode->ptr->next = cpu_to_le32(TD_TERMINATE);
  389. if (!hwreq->req.no_interrupt)
  390. lastnode->ptr->token |= cpu_to_le32(TD_IOC);
  391. wmb();
  392. hwreq->req.actual = 0;
  393. if (!list_empty(&hwep->qh.queue)) {
  394. struct ci_hw_req *hwreqprev;
  395. int n = hw_ep_bit(hwep->num, hwep->dir);
  396. int tmp_stat;
  397. struct td_node *prevlastnode;
  398. u32 next = firstnode->dma & TD_ADDR_MASK;
  399. hwreqprev = list_entry(hwep->qh.queue.prev,
  400. struct ci_hw_req, queue);
  401. prevlastnode = list_entry(hwreqprev->tds.prev,
  402. struct td_node, td);
  403. prevlastnode->ptr->next = cpu_to_le32(next);
  404. wmb();
  405. if (hw_read(ci, OP_ENDPTPRIME, BIT(n)))
  406. goto done;
  407. do {
  408. hw_write(ci, OP_USBCMD, USBCMD_ATDTW, USBCMD_ATDTW);
  409. tmp_stat = hw_read(ci, OP_ENDPTSTAT, BIT(n));
  410. } while (!hw_read(ci, OP_USBCMD, USBCMD_ATDTW));
  411. hw_write(ci, OP_USBCMD, USBCMD_ATDTW, 0);
  412. if (tmp_stat)
  413. goto done;
  414. }
  415. /* QH configuration */
  416. hwep->qh.ptr->td.next = cpu_to_le32(firstnode->dma);
  417. hwep->qh.ptr->td.token &=
  418. cpu_to_le32(~(TD_STATUS_HALTED|TD_STATUS_ACTIVE));
  419. if (hwep->type == USB_ENDPOINT_XFER_ISOC && hwep->dir == RX) {
  420. u32 mul = hwreq->req.length / hwep->ep.maxpacket;
  421. if (hwreq->req.length == 0
  422. || hwreq->req.length % hwep->ep.maxpacket)
  423. mul++;
  424. hwep->qh.ptr->cap |= mul << __ffs(QH_MULT);
  425. }
  426. wmb(); /* synchronize before ep prime */
  427. ret = hw_ep_prime(ci, hwep->num, hwep->dir,
  428. hwep->type == USB_ENDPOINT_XFER_CONTROL);
  429. done:
  430. return ret;
  431. }
  432. /*
  433. * free_pending_td: remove a pending request for the endpoint
  434. * @hwep: endpoint
  435. */
  436. static void free_pending_td(struct ci_hw_ep *hwep)
  437. {
  438. struct td_node *pending = hwep->pending_td;
  439. dma_pool_free(hwep->td_pool, pending->ptr, pending->dma);
  440. hwep->pending_td = NULL;
  441. kfree(pending);
  442. }
  443. static int reprime_dtd(struct ci_hdrc *ci, struct ci_hw_ep *hwep,
  444. struct td_node *node)
  445. {
  446. hwep->qh.ptr->td.next = node->dma;
  447. hwep->qh.ptr->td.token &=
  448. cpu_to_le32(~(TD_STATUS_HALTED | TD_STATUS_ACTIVE));
  449. /* Synchronize before ep prime */
  450. wmb();
  451. return hw_ep_prime(ci, hwep->num, hwep->dir,
  452. hwep->type == USB_ENDPOINT_XFER_CONTROL);
  453. }
  454. /**
  455. * _hardware_dequeue: handles a request at hardware level
  456. * @gadget: gadget
  457. * @hwep: endpoint
  458. *
  459. * This function returns an error code
  460. */
  461. static int _hardware_dequeue(struct ci_hw_ep *hwep, struct ci_hw_req *hwreq)
  462. {
  463. u32 tmptoken;
  464. struct td_node *node, *tmpnode;
  465. unsigned remaining_length;
  466. unsigned actual = hwreq->req.length;
  467. struct ci_hdrc *ci = hwep->ci;
  468. if (hwreq->req.status != -EALREADY)
  469. return -EINVAL;
  470. hwreq->req.status = 0;
  471. list_for_each_entry_safe(node, tmpnode, &hwreq->tds, td) {
  472. tmptoken = le32_to_cpu(node->ptr->token);
  473. if ((TD_STATUS_ACTIVE & tmptoken) != 0) {
  474. int n = hw_ep_bit(hwep->num, hwep->dir);
  475. if (ci->rev == CI_REVISION_24)
  476. if (!hw_read(ci, OP_ENDPTSTAT, BIT(n)))
  477. reprime_dtd(ci, hwep, node);
  478. hwreq->req.status = -EALREADY;
  479. return -EBUSY;
  480. }
  481. remaining_length = (tmptoken & TD_TOTAL_BYTES);
  482. remaining_length >>= __ffs(TD_TOTAL_BYTES);
  483. actual -= remaining_length;
  484. hwreq->req.status = tmptoken & TD_STATUS;
  485. if ((TD_STATUS_HALTED & hwreq->req.status)) {
  486. hwreq->req.status = -EPIPE;
  487. break;
  488. } else if ((TD_STATUS_DT_ERR & hwreq->req.status)) {
  489. hwreq->req.status = -EPROTO;
  490. break;
  491. } else if ((TD_STATUS_TR_ERR & hwreq->req.status)) {
  492. hwreq->req.status = -EILSEQ;
  493. break;
  494. }
  495. if (remaining_length) {
  496. if (hwep->dir) {
  497. hwreq->req.status = -EPROTO;
  498. break;
  499. }
  500. }
  501. /*
  502. * As the hardware could still address the freed td
  503. * which will run the udc unusable, the cleanup of the
  504. * td has to be delayed by one.
  505. */
  506. if (hwep->pending_td)
  507. free_pending_td(hwep);
  508. hwep->pending_td = node;
  509. list_del_init(&node->td);
  510. }
  511. usb_gadget_unmap_request(&hwep->ci->gadget, &hwreq->req, hwep->dir);
  512. hwreq->req.actual += actual;
  513. if (hwreq->req.status)
  514. return hwreq->req.status;
  515. return hwreq->req.actual;
  516. }
  517. /**
  518. * _ep_nuke: dequeues all endpoint requests
  519. * @hwep: endpoint
  520. *
  521. * This function returns an error code
  522. * Caller must hold lock
  523. */
  524. static int _ep_nuke(struct ci_hw_ep *hwep)
  525. __releases(hwep->lock)
  526. __acquires(hwep->lock)
  527. {
  528. struct td_node *node, *tmpnode;
  529. if (hwep == NULL)
  530. return -EINVAL;
  531. hw_ep_flush(hwep->ci, hwep->num, hwep->dir);
  532. while (!list_empty(&hwep->qh.queue)) {
  533. /* pop oldest request */
  534. struct ci_hw_req *hwreq = list_entry(hwep->qh.queue.next,
  535. struct ci_hw_req, queue);
  536. list_for_each_entry_safe(node, tmpnode, &hwreq->tds, td) {
  537. dma_pool_free(hwep->td_pool, node->ptr, node->dma);
  538. list_del_init(&node->td);
  539. node->ptr = NULL;
  540. kfree(node);
  541. }
  542. list_del_init(&hwreq->queue);
  543. hwreq->req.status = -ESHUTDOWN;
  544. if (hwreq->req.complete != NULL) {
  545. spin_unlock(hwep->lock);
  546. usb_gadget_giveback_request(&hwep->ep, &hwreq->req);
  547. spin_lock(hwep->lock);
  548. }
  549. }
  550. if (hwep->pending_td)
  551. free_pending_td(hwep);
  552. return 0;
  553. }
  554. static int _ep_set_halt(struct usb_ep *ep, int value, bool check_transfer)
  555. {
  556. struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
  557. int direction, retval = 0;
  558. unsigned long flags;
  559. if (ep == NULL || hwep->ep.desc == NULL)
  560. return -EINVAL;
  561. if (usb_endpoint_xfer_isoc(hwep->ep.desc))
  562. return -EOPNOTSUPP;
  563. spin_lock_irqsave(hwep->lock, flags);
  564. if (value && hwep->dir == TX && check_transfer &&
  565. !list_empty(&hwep->qh.queue) &&
  566. !usb_endpoint_xfer_control(hwep->ep.desc)) {
  567. spin_unlock_irqrestore(hwep->lock, flags);
  568. return -EAGAIN;
  569. }
  570. direction = hwep->dir;
  571. do {
  572. retval |= hw_ep_set_halt(hwep->ci, hwep->num, hwep->dir, value);
  573. if (!value)
  574. hwep->wedge = 0;
  575. if (hwep->type == USB_ENDPOINT_XFER_CONTROL)
  576. hwep->dir = (hwep->dir == TX) ? RX : TX;
  577. } while (hwep->dir != direction);
  578. spin_unlock_irqrestore(hwep->lock, flags);
  579. return retval;
  580. }
  581. /**
  582. * _gadget_stop_activity: stops all USB activity, flushes & disables all endpts
  583. * @gadget: gadget
  584. *
  585. * This function returns an error code
  586. */
  587. static int _gadget_stop_activity(struct usb_gadget *gadget)
  588. {
  589. struct usb_ep *ep;
  590. struct ci_hdrc *ci = container_of(gadget, struct ci_hdrc, gadget);
  591. unsigned long flags;
  592. spin_lock_irqsave(&ci->lock, flags);
  593. ci->gadget.speed = USB_SPEED_UNKNOWN;
  594. ci->remote_wakeup = 0;
  595. ci->suspended = 0;
  596. spin_unlock_irqrestore(&ci->lock, flags);
  597. /* flush all endpoints */
  598. gadget_for_each_ep(ep, gadget) {
  599. usb_ep_fifo_flush(ep);
  600. }
  601. usb_ep_fifo_flush(&ci->ep0out->ep);
  602. usb_ep_fifo_flush(&ci->ep0in->ep);
  603. /* make sure to disable all endpoints */
  604. gadget_for_each_ep(ep, gadget) {
  605. usb_ep_disable(ep);
  606. }
  607. if (ci->status != NULL) {
  608. usb_ep_free_request(&ci->ep0in->ep, ci->status);
  609. ci->status = NULL;
  610. }
  611. return 0;
  612. }
  613. /******************************************************************************
  614. * ISR block
  615. *****************************************************************************/
  616. /**
  617. * isr_reset_handler: USB reset interrupt handler
  618. * @ci: UDC device
  619. *
  620. * This function resets USB engine after a bus reset occurred
  621. */
  622. static void isr_reset_handler(struct ci_hdrc *ci)
  623. __releases(ci->lock)
  624. __acquires(ci->lock)
  625. {
  626. int retval;
  627. spin_unlock(&ci->lock);
  628. if (ci->gadget.speed != USB_SPEED_UNKNOWN)
  629. usb_gadget_udc_reset(&ci->gadget, ci->driver);
  630. retval = _gadget_stop_activity(&ci->gadget);
  631. if (retval)
  632. goto done;
  633. retval = hw_usb_reset(ci);
  634. if (retval)
  635. goto done;
  636. ci->status = usb_ep_alloc_request(&ci->ep0in->ep, GFP_ATOMIC);
  637. if (ci->status == NULL)
  638. retval = -ENOMEM;
  639. done:
  640. spin_lock(&ci->lock);
  641. if (retval)
  642. dev_err(ci->dev, "error: %i\n", retval);
  643. }
  644. /**
  645. * isr_get_status_complete: get_status request complete function
  646. * @ep: endpoint
  647. * @req: request handled
  648. *
  649. * Caller must release lock
  650. */
  651. static void isr_get_status_complete(struct usb_ep *ep, struct usb_request *req)
  652. {
  653. if (ep == NULL || req == NULL)
  654. return;
  655. kfree(req->buf);
  656. usb_ep_free_request(ep, req);
  657. }
  658. /**
  659. * _ep_queue: queues (submits) an I/O request to an endpoint
  660. *
  661. * Caller must hold lock
  662. */
  663. static int _ep_queue(struct usb_ep *ep, struct usb_request *req,
  664. gfp_t __maybe_unused gfp_flags)
  665. {
  666. struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
  667. struct ci_hw_req *hwreq = container_of(req, struct ci_hw_req, req);
  668. struct ci_hdrc *ci = hwep->ci;
  669. int retval = 0;
  670. if (ep == NULL || req == NULL || hwep->ep.desc == NULL)
  671. return -EINVAL;
  672. if (hwep->type == USB_ENDPOINT_XFER_CONTROL) {
  673. if (req->length)
  674. hwep = (ci->ep0_dir == RX) ?
  675. ci->ep0out : ci->ep0in;
  676. if (!list_empty(&hwep->qh.queue)) {
  677. _ep_nuke(hwep);
  678. retval = -EOVERFLOW;
  679. dev_warn(hwep->ci->dev, "endpoint ctrl %X nuked\n",
  680. _usb_addr(hwep));
  681. }
  682. }
  683. if (usb_endpoint_xfer_isoc(hwep->ep.desc) &&
  684. hwreq->req.length > (1 + hwep->ep.mult) * hwep->ep.maxpacket) {
  685. dev_err(hwep->ci->dev, "request length too big for isochronous\n");
  686. return -EMSGSIZE;
  687. }
  688. /* first nuke then test link, e.g. previous status has not sent */
  689. if (!list_empty(&hwreq->queue)) {
  690. dev_err(hwep->ci->dev, "request already in queue\n");
  691. return -EBUSY;
  692. }
  693. /* push request */
  694. hwreq->req.status = -EINPROGRESS;
  695. hwreq->req.actual = 0;
  696. retval = _hardware_enqueue(hwep, hwreq);
  697. if (retval == -EALREADY)
  698. retval = 0;
  699. if (!retval)
  700. list_add_tail(&hwreq->queue, &hwep->qh.queue);
  701. return retval;
  702. }
  703. /**
  704. * isr_get_status_response: get_status request response
  705. * @ci: ci struct
  706. * @setup: setup request packet
  707. *
  708. * This function returns an error code
  709. */
  710. static int isr_get_status_response(struct ci_hdrc *ci,
  711. struct usb_ctrlrequest *setup)
  712. __releases(hwep->lock)
  713. __acquires(hwep->lock)
  714. {
  715. struct ci_hw_ep *hwep = ci->ep0in;
  716. struct usb_request *req = NULL;
  717. gfp_t gfp_flags = GFP_ATOMIC;
  718. int dir, num, retval;
  719. if (hwep == NULL || setup == NULL)
  720. return -EINVAL;
  721. spin_unlock(hwep->lock);
  722. req = usb_ep_alloc_request(&hwep->ep, gfp_flags);
  723. spin_lock(hwep->lock);
  724. if (req == NULL)
  725. return -ENOMEM;
  726. req->complete = isr_get_status_complete;
  727. req->length = 2;
  728. req->buf = kzalloc(req->length, gfp_flags);
  729. if (req->buf == NULL) {
  730. retval = -ENOMEM;
  731. goto err_free_req;
  732. }
  733. if ((setup->bRequestType & USB_RECIP_MASK) == USB_RECIP_DEVICE) {
  734. *(u16 *)req->buf = (ci->remote_wakeup << 1) |
  735. ci->gadget.is_selfpowered;
  736. } else if ((setup->bRequestType & USB_RECIP_MASK) \
  737. == USB_RECIP_ENDPOINT) {
  738. dir = (le16_to_cpu(setup->wIndex) & USB_ENDPOINT_DIR_MASK) ?
  739. TX : RX;
  740. num = le16_to_cpu(setup->wIndex) & USB_ENDPOINT_NUMBER_MASK;
  741. *(u16 *)req->buf = hw_ep_get_halt(ci, num, dir);
  742. }
  743. /* else do nothing; reserved for future use */
  744. retval = _ep_queue(&hwep->ep, req, gfp_flags);
  745. if (retval)
  746. goto err_free_buf;
  747. return 0;
  748. err_free_buf:
  749. kfree(req->buf);
  750. err_free_req:
  751. spin_unlock(hwep->lock);
  752. usb_ep_free_request(&hwep->ep, req);
  753. spin_lock(hwep->lock);
  754. return retval;
  755. }
  756. /**
  757. * isr_setup_status_complete: setup_status request complete function
  758. * @ep: endpoint
  759. * @req: request handled
  760. *
  761. * Caller must release lock. Put the port in test mode if test mode
  762. * feature is selected.
  763. */
  764. static void
  765. isr_setup_status_complete(struct usb_ep *ep, struct usb_request *req)
  766. {
  767. struct ci_hdrc *ci = req->context;
  768. unsigned long flags;
  769. if (ci->setaddr) {
  770. hw_usb_set_address(ci, ci->address);
  771. ci->setaddr = false;
  772. if (ci->address)
  773. usb_gadget_set_state(&ci->gadget, USB_STATE_ADDRESS);
  774. }
  775. spin_lock_irqsave(&ci->lock, flags);
  776. if (ci->test_mode)
  777. hw_port_test_set(ci, ci->test_mode);
  778. spin_unlock_irqrestore(&ci->lock, flags);
  779. }
  780. /**
  781. * isr_setup_status_phase: queues the status phase of a setup transation
  782. * @ci: ci struct
  783. *
  784. * This function returns an error code
  785. */
  786. static int isr_setup_status_phase(struct ci_hdrc *ci)
  787. {
  788. int retval;
  789. struct ci_hw_ep *hwep;
  790. hwep = (ci->ep0_dir == TX) ? ci->ep0out : ci->ep0in;
  791. ci->status->context = ci;
  792. ci->status->complete = isr_setup_status_complete;
  793. retval = _ep_queue(&hwep->ep, ci->status, GFP_ATOMIC);
  794. return retval;
  795. }
  796. /**
  797. * isr_tr_complete_low: transaction complete low level handler
  798. * @hwep: endpoint
  799. *
  800. * This function returns an error code
  801. * Caller must hold lock
  802. */
  803. static int isr_tr_complete_low(struct ci_hw_ep *hwep)
  804. __releases(hwep->lock)
  805. __acquires(hwep->lock)
  806. {
  807. struct ci_hw_req *hwreq, *hwreqtemp;
  808. struct ci_hw_ep *hweptemp = hwep;
  809. int retval = 0;
  810. list_for_each_entry_safe(hwreq, hwreqtemp, &hwep->qh.queue,
  811. queue) {
  812. retval = _hardware_dequeue(hwep, hwreq);
  813. if (retval < 0)
  814. break;
  815. list_del_init(&hwreq->queue);
  816. if (hwreq->req.complete != NULL) {
  817. spin_unlock(hwep->lock);
  818. if ((hwep->type == USB_ENDPOINT_XFER_CONTROL) &&
  819. hwreq->req.length)
  820. hweptemp = hwep->ci->ep0in;
  821. usb_gadget_giveback_request(&hweptemp->ep, &hwreq->req);
  822. spin_lock(hwep->lock);
  823. }
  824. }
  825. if (retval == -EBUSY)
  826. retval = 0;
  827. return retval;
  828. }
  829. static int otg_a_alt_hnp_support(struct ci_hdrc *ci)
  830. {
  831. dev_warn(&ci->gadget.dev,
  832. "connect the device to an alternate port if you want HNP\n");
  833. return isr_setup_status_phase(ci);
  834. }
  835. /**
  836. * isr_setup_packet_handler: setup packet handler
  837. * @ci: UDC descriptor
  838. *
  839. * This function handles setup packet
  840. */
  841. static void isr_setup_packet_handler(struct ci_hdrc *ci)
  842. __releases(ci->lock)
  843. __acquires(ci->lock)
  844. {
  845. struct ci_hw_ep *hwep = &ci->ci_hw_ep[0];
  846. struct usb_ctrlrequest req;
  847. int type, num, dir, err = -EINVAL;
  848. u8 tmode = 0;
  849. /*
  850. * Flush data and handshake transactions of previous
  851. * setup packet.
  852. */
  853. _ep_nuke(ci->ep0out);
  854. _ep_nuke(ci->ep0in);
  855. /* read_setup_packet */
  856. do {
  857. hw_test_and_set_setup_guard(ci);
  858. memcpy(&req, &hwep->qh.ptr->setup, sizeof(req));
  859. } while (!hw_test_and_clear_setup_guard(ci));
  860. type = req.bRequestType;
  861. ci->ep0_dir = (type & USB_DIR_IN) ? TX : RX;
  862. switch (req.bRequest) {
  863. case USB_REQ_CLEAR_FEATURE:
  864. if (type == (USB_DIR_OUT|USB_RECIP_ENDPOINT) &&
  865. le16_to_cpu(req.wValue) ==
  866. USB_ENDPOINT_HALT) {
  867. if (req.wLength != 0)
  868. break;
  869. num = le16_to_cpu(req.wIndex);
  870. dir = num & USB_ENDPOINT_DIR_MASK;
  871. num &= USB_ENDPOINT_NUMBER_MASK;
  872. if (dir) /* TX */
  873. num += ci->hw_ep_max / 2;
  874. if (!ci->ci_hw_ep[num].wedge) {
  875. spin_unlock(&ci->lock);
  876. err = usb_ep_clear_halt(
  877. &ci->ci_hw_ep[num].ep);
  878. spin_lock(&ci->lock);
  879. if (err)
  880. break;
  881. }
  882. err = isr_setup_status_phase(ci);
  883. } else if (type == (USB_DIR_OUT|USB_RECIP_DEVICE) &&
  884. le16_to_cpu(req.wValue) ==
  885. USB_DEVICE_REMOTE_WAKEUP) {
  886. if (req.wLength != 0)
  887. break;
  888. ci->remote_wakeup = 0;
  889. err = isr_setup_status_phase(ci);
  890. } else {
  891. goto delegate;
  892. }
  893. break;
  894. case USB_REQ_GET_STATUS:
  895. if (type != (USB_DIR_IN|USB_RECIP_DEVICE) &&
  896. type != (USB_DIR_IN|USB_RECIP_ENDPOINT) &&
  897. type != (USB_DIR_IN|USB_RECIP_INTERFACE))
  898. goto delegate;
  899. if (le16_to_cpu(req.wLength) != 2 ||
  900. le16_to_cpu(req.wValue) != 0)
  901. break;
  902. err = isr_get_status_response(ci, &req);
  903. break;
  904. case USB_REQ_SET_ADDRESS:
  905. if (type != (USB_DIR_OUT|USB_RECIP_DEVICE))
  906. goto delegate;
  907. if (le16_to_cpu(req.wLength) != 0 ||
  908. le16_to_cpu(req.wIndex) != 0)
  909. break;
  910. ci->address = (u8)le16_to_cpu(req.wValue);
  911. ci->setaddr = true;
  912. err = isr_setup_status_phase(ci);
  913. break;
  914. case USB_REQ_SET_FEATURE:
  915. if (type == (USB_DIR_OUT|USB_RECIP_ENDPOINT) &&
  916. le16_to_cpu(req.wValue) ==
  917. USB_ENDPOINT_HALT) {
  918. if (req.wLength != 0)
  919. break;
  920. num = le16_to_cpu(req.wIndex);
  921. dir = num & USB_ENDPOINT_DIR_MASK;
  922. num &= USB_ENDPOINT_NUMBER_MASK;
  923. if (dir) /* TX */
  924. num += ci->hw_ep_max / 2;
  925. spin_unlock(&ci->lock);
  926. err = _ep_set_halt(&ci->ci_hw_ep[num].ep, 1, false);
  927. spin_lock(&ci->lock);
  928. if (!err)
  929. isr_setup_status_phase(ci);
  930. } else if (type == (USB_DIR_OUT|USB_RECIP_DEVICE)) {
  931. if (req.wLength != 0)
  932. break;
  933. switch (le16_to_cpu(req.wValue)) {
  934. case USB_DEVICE_REMOTE_WAKEUP:
  935. ci->remote_wakeup = 1;
  936. err = isr_setup_status_phase(ci);
  937. break;
  938. case USB_DEVICE_TEST_MODE:
  939. tmode = le16_to_cpu(req.wIndex) >> 8;
  940. switch (tmode) {
  941. case TEST_J:
  942. case TEST_K:
  943. case TEST_SE0_NAK:
  944. case TEST_PACKET:
  945. case TEST_FORCE_EN:
  946. ci->test_mode = tmode;
  947. err = isr_setup_status_phase(
  948. ci);
  949. break;
  950. default:
  951. break;
  952. }
  953. break;
  954. case USB_DEVICE_B_HNP_ENABLE:
  955. if (ci_otg_is_fsm_mode(ci)) {
  956. ci->gadget.b_hnp_enable = 1;
  957. err = isr_setup_status_phase(
  958. ci);
  959. }
  960. break;
  961. case USB_DEVICE_A_ALT_HNP_SUPPORT:
  962. if (ci_otg_is_fsm_mode(ci))
  963. err = otg_a_alt_hnp_support(ci);
  964. break;
  965. case USB_DEVICE_A_HNP_SUPPORT:
  966. if (ci_otg_is_fsm_mode(ci)) {
  967. ci->gadget.a_hnp_support = 1;
  968. err = isr_setup_status_phase(
  969. ci);
  970. }
  971. break;
  972. default:
  973. goto delegate;
  974. }
  975. } else {
  976. goto delegate;
  977. }
  978. break;
  979. default:
  980. delegate:
  981. if (req.wLength == 0) /* no data phase */
  982. ci->ep0_dir = TX;
  983. spin_unlock(&ci->lock);
  984. err = ci->driver->setup(&ci->gadget, &req);
  985. spin_lock(&ci->lock);
  986. break;
  987. }
  988. if (err < 0) {
  989. spin_unlock(&ci->lock);
  990. if (_ep_set_halt(&hwep->ep, 1, false))
  991. dev_err(ci->dev, "error: _ep_set_halt\n");
  992. spin_lock(&ci->lock);
  993. }
  994. }
  995. /**
  996. * isr_tr_complete_handler: transaction complete interrupt handler
  997. * @ci: UDC descriptor
  998. *
  999. * This function handles traffic events
  1000. */
  1001. static void isr_tr_complete_handler(struct ci_hdrc *ci)
  1002. __releases(ci->lock)
  1003. __acquires(ci->lock)
  1004. {
  1005. unsigned i;
  1006. int err;
  1007. for (i = 0; i < ci->hw_ep_max; i++) {
  1008. struct ci_hw_ep *hwep = &ci->ci_hw_ep[i];
  1009. if (hwep->ep.desc == NULL)
  1010. continue; /* not configured */
  1011. if (hw_test_and_clear_complete(ci, i)) {
  1012. err = isr_tr_complete_low(hwep);
  1013. if (hwep->type == USB_ENDPOINT_XFER_CONTROL) {
  1014. if (err > 0) /* needs status phase */
  1015. err = isr_setup_status_phase(ci);
  1016. if (err < 0) {
  1017. spin_unlock(&ci->lock);
  1018. if (_ep_set_halt(&hwep->ep, 1, false))
  1019. dev_err(ci->dev,
  1020. "error: _ep_set_halt\n");
  1021. spin_lock(&ci->lock);
  1022. }
  1023. }
  1024. }
  1025. /* Only handle setup packet below */
  1026. if (i == 0 &&
  1027. hw_test_and_clear(ci, OP_ENDPTSETUPSTAT, BIT(0)))
  1028. isr_setup_packet_handler(ci);
  1029. }
  1030. }
  1031. /******************************************************************************
  1032. * ENDPT block
  1033. *****************************************************************************/
  1034. /**
  1035. * ep_enable: configure endpoint, making it usable
  1036. *
  1037. * Check usb_ep_enable() at "usb_gadget.h" for details
  1038. */
  1039. static int ep_enable(struct usb_ep *ep,
  1040. const struct usb_endpoint_descriptor *desc)
  1041. {
  1042. struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
  1043. int retval = 0;
  1044. unsigned long flags;
  1045. u32 cap = 0;
  1046. if (ep == NULL || desc == NULL)
  1047. return -EINVAL;
  1048. spin_lock_irqsave(hwep->lock, flags);
  1049. /* only internal SW should enable ctrl endpts */
  1050. if (!list_empty(&hwep->qh.queue)) {
  1051. dev_warn(hwep->ci->dev, "enabling a non-empty endpoint!\n");
  1052. spin_unlock_irqrestore(hwep->lock, flags);
  1053. return -EBUSY;
  1054. }
  1055. hwep->ep.desc = desc;
  1056. hwep->dir = usb_endpoint_dir_in(desc) ? TX : RX;
  1057. hwep->num = usb_endpoint_num(desc);
  1058. hwep->type = usb_endpoint_type(desc);
  1059. hwep->ep.maxpacket = usb_endpoint_maxp(desc) & 0x07ff;
  1060. hwep->ep.mult = QH_ISO_MULT(usb_endpoint_maxp(desc));
  1061. if (hwep->type == USB_ENDPOINT_XFER_CONTROL)
  1062. cap |= QH_IOS;
  1063. cap |= QH_ZLT;
  1064. cap |= (hwep->ep.maxpacket << __ffs(QH_MAX_PKT)) & QH_MAX_PKT;
  1065. /*
  1066. * For ISO-TX, we set mult at QH as the largest value, and use
  1067. * MultO at TD as real mult value.
  1068. */
  1069. if (hwep->type == USB_ENDPOINT_XFER_ISOC && hwep->dir == TX)
  1070. cap |= 3 << __ffs(QH_MULT);
  1071. hwep->qh.ptr->cap = cpu_to_le32(cap);
  1072. hwep->qh.ptr->td.next |= cpu_to_le32(TD_TERMINATE); /* needed? */
  1073. if (hwep->num != 0 && hwep->type == USB_ENDPOINT_XFER_CONTROL) {
  1074. dev_err(hwep->ci->dev, "Set control xfer at non-ep0\n");
  1075. retval = -EINVAL;
  1076. }
  1077. /*
  1078. * Enable endpoints in the HW other than ep0 as ep0
  1079. * is always enabled
  1080. */
  1081. if (hwep->num)
  1082. retval |= hw_ep_enable(hwep->ci, hwep->num, hwep->dir,
  1083. hwep->type);
  1084. spin_unlock_irqrestore(hwep->lock, flags);
  1085. return retval;
  1086. }
  1087. /**
  1088. * ep_disable: endpoint is no longer usable
  1089. *
  1090. * Check usb_ep_disable() at "usb_gadget.h" for details
  1091. */
  1092. static int ep_disable(struct usb_ep *ep)
  1093. {
  1094. struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
  1095. int direction, retval = 0;
  1096. unsigned long flags;
  1097. if (ep == NULL)
  1098. return -EINVAL;
  1099. else if (hwep->ep.desc == NULL)
  1100. return -EBUSY;
  1101. spin_lock_irqsave(hwep->lock, flags);
  1102. /* only internal SW should disable ctrl endpts */
  1103. direction = hwep->dir;
  1104. do {
  1105. retval |= _ep_nuke(hwep);
  1106. retval |= hw_ep_disable(hwep->ci, hwep->num, hwep->dir);
  1107. if (hwep->type == USB_ENDPOINT_XFER_CONTROL)
  1108. hwep->dir = (hwep->dir == TX) ? RX : TX;
  1109. } while (hwep->dir != direction);
  1110. hwep->ep.desc = NULL;
  1111. spin_unlock_irqrestore(hwep->lock, flags);
  1112. return retval;
  1113. }
  1114. /**
  1115. * ep_alloc_request: allocate a request object to use with this endpoint
  1116. *
  1117. * Check usb_ep_alloc_request() at "usb_gadget.h" for details
  1118. */
  1119. static struct usb_request *ep_alloc_request(struct usb_ep *ep, gfp_t gfp_flags)
  1120. {
  1121. struct ci_hw_req *hwreq = NULL;
  1122. if (ep == NULL)
  1123. return NULL;
  1124. hwreq = kzalloc(sizeof(struct ci_hw_req), gfp_flags);
  1125. if (hwreq != NULL) {
  1126. INIT_LIST_HEAD(&hwreq->queue);
  1127. INIT_LIST_HEAD(&hwreq->tds);
  1128. }
  1129. return (hwreq == NULL) ? NULL : &hwreq->req;
  1130. }
  1131. /**
  1132. * ep_free_request: frees a request object
  1133. *
  1134. * Check usb_ep_free_request() at "usb_gadget.h" for details
  1135. */
  1136. static void ep_free_request(struct usb_ep *ep, struct usb_request *req)
  1137. {
  1138. struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
  1139. struct ci_hw_req *hwreq = container_of(req, struct ci_hw_req, req);
  1140. struct td_node *node, *tmpnode;
  1141. unsigned long flags;
  1142. if (ep == NULL || req == NULL) {
  1143. return;
  1144. } else if (!list_empty(&hwreq->queue)) {
  1145. dev_err(hwep->ci->dev, "freeing queued request\n");
  1146. return;
  1147. }
  1148. spin_lock_irqsave(hwep->lock, flags);
  1149. list_for_each_entry_safe(node, tmpnode, &hwreq->tds, td) {
  1150. dma_pool_free(hwep->td_pool, node->ptr, node->dma);
  1151. list_del_init(&node->td);
  1152. node->ptr = NULL;
  1153. kfree(node);
  1154. }
  1155. kfree(hwreq);
  1156. spin_unlock_irqrestore(hwep->lock, flags);
  1157. }
  1158. /**
  1159. * ep_queue: queues (submits) an I/O request to an endpoint
  1160. *
  1161. * Check usb_ep_queue()* at usb_gadget.h" for details
  1162. */
  1163. static int ep_queue(struct usb_ep *ep, struct usb_request *req,
  1164. gfp_t __maybe_unused gfp_flags)
  1165. {
  1166. struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
  1167. int retval = 0;
  1168. unsigned long flags;
  1169. if (ep == NULL || req == NULL || hwep->ep.desc == NULL)
  1170. return -EINVAL;
  1171. spin_lock_irqsave(hwep->lock, flags);
  1172. retval = _ep_queue(ep, req, gfp_flags);
  1173. spin_unlock_irqrestore(hwep->lock, flags);
  1174. return retval;
  1175. }
  1176. /**
  1177. * ep_dequeue: dequeues (cancels, unlinks) an I/O request from an endpoint
  1178. *
  1179. * Check usb_ep_dequeue() at "usb_gadget.h" for details
  1180. */
  1181. static int ep_dequeue(struct usb_ep *ep, struct usb_request *req)
  1182. {
  1183. struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
  1184. struct ci_hw_req *hwreq = container_of(req, struct ci_hw_req, req);
  1185. unsigned long flags;
  1186. struct td_node *node, *tmpnode;
  1187. if (ep == NULL || req == NULL || hwreq->req.status != -EALREADY ||
  1188. hwep->ep.desc == NULL || list_empty(&hwreq->queue) ||
  1189. list_empty(&hwep->qh.queue))
  1190. return -EINVAL;
  1191. spin_lock_irqsave(hwep->lock, flags);
  1192. hw_ep_flush(hwep->ci, hwep->num, hwep->dir);
  1193. list_for_each_entry_safe(node, tmpnode, &hwreq->tds, td) {
  1194. dma_pool_free(hwep->td_pool, node->ptr, node->dma);
  1195. list_del(&node->td);
  1196. kfree(node);
  1197. }
  1198. /* pop request */
  1199. list_del_init(&hwreq->queue);
  1200. usb_gadget_unmap_request(&hwep->ci->gadget, req, hwep->dir);
  1201. req->status = -ECONNRESET;
  1202. if (hwreq->req.complete != NULL) {
  1203. spin_unlock(hwep->lock);
  1204. usb_gadget_giveback_request(&hwep->ep, &hwreq->req);
  1205. spin_lock(hwep->lock);
  1206. }
  1207. spin_unlock_irqrestore(hwep->lock, flags);
  1208. return 0;
  1209. }
  1210. /**
  1211. * ep_set_halt: sets the endpoint halt feature
  1212. *
  1213. * Check usb_ep_set_halt() at "usb_gadget.h" for details
  1214. */
  1215. static int ep_set_halt(struct usb_ep *ep, int value)
  1216. {
  1217. return _ep_set_halt(ep, value, true);
  1218. }
  1219. /**
  1220. * ep_set_wedge: sets the halt feature and ignores clear requests
  1221. *
  1222. * Check usb_ep_set_wedge() at "usb_gadget.h" for details
  1223. */
  1224. static int ep_set_wedge(struct usb_ep *ep)
  1225. {
  1226. struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
  1227. unsigned long flags;
  1228. if (ep == NULL || hwep->ep.desc == NULL)
  1229. return -EINVAL;
  1230. spin_lock_irqsave(hwep->lock, flags);
  1231. hwep->wedge = 1;
  1232. spin_unlock_irqrestore(hwep->lock, flags);
  1233. return usb_ep_set_halt(ep);
  1234. }
  1235. /**
  1236. * ep_fifo_flush: flushes contents of a fifo
  1237. *
  1238. * Check usb_ep_fifo_flush() at "usb_gadget.h" for details
  1239. */
  1240. static void ep_fifo_flush(struct usb_ep *ep)
  1241. {
  1242. struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
  1243. unsigned long flags;
  1244. if (ep == NULL) {
  1245. dev_err(hwep->ci->dev, "%02X: -EINVAL\n", _usb_addr(hwep));
  1246. return;
  1247. }
  1248. spin_lock_irqsave(hwep->lock, flags);
  1249. hw_ep_flush(hwep->ci, hwep->num, hwep->dir);
  1250. spin_unlock_irqrestore(hwep->lock, flags);
  1251. }
  1252. /**
  1253. * Endpoint-specific part of the API to the USB controller hardware
  1254. * Check "usb_gadget.h" for details
  1255. */
  1256. static const struct usb_ep_ops usb_ep_ops = {
  1257. .enable = ep_enable,
  1258. .disable = ep_disable,
  1259. .alloc_request = ep_alloc_request,
  1260. .free_request = ep_free_request,
  1261. .queue = ep_queue,
  1262. .dequeue = ep_dequeue,
  1263. .set_halt = ep_set_halt,
  1264. .set_wedge = ep_set_wedge,
  1265. .fifo_flush = ep_fifo_flush,
  1266. };
  1267. /******************************************************************************
  1268. * GADGET block
  1269. *****************************************************************************/
  1270. static int ci_udc_vbus_session(struct usb_gadget *_gadget, int is_active)
  1271. {
  1272. struct ci_hdrc *ci = container_of(_gadget, struct ci_hdrc, gadget);
  1273. unsigned long flags;
  1274. int gadget_ready = 0;
  1275. spin_lock_irqsave(&ci->lock, flags);
  1276. ci->vbus_active = is_active;
  1277. if (ci->driver)
  1278. gadget_ready = 1;
  1279. spin_unlock_irqrestore(&ci->lock, flags);
  1280. if (gadget_ready) {
  1281. if (is_active) {
  1282. pm_runtime_get_sync(&_gadget->dev);
  1283. hw_device_reset(ci);
  1284. hw_device_state(ci, ci->ep0out->qh.dma);
  1285. usb_gadget_set_state(_gadget, USB_STATE_POWERED);
  1286. usb_udc_vbus_handler(_gadget, true);
  1287. } else {
  1288. usb_udc_vbus_handler(_gadget, false);
  1289. if (ci->driver)
  1290. ci->driver->disconnect(&ci->gadget);
  1291. hw_device_state(ci, 0);
  1292. if (ci->platdata->notify_event)
  1293. ci->platdata->notify_event(ci,
  1294. CI_HDRC_CONTROLLER_STOPPED_EVENT);
  1295. _gadget_stop_activity(&ci->gadget);
  1296. pm_runtime_put_sync(&_gadget->dev);
  1297. usb_gadget_set_state(_gadget, USB_STATE_NOTATTACHED);
  1298. }
  1299. }
  1300. return 0;
  1301. }
  1302. static int ci_udc_wakeup(struct usb_gadget *_gadget)
  1303. {
  1304. struct ci_hdrc *ci = container_of(_gadget, struct ci_hdrc, gadget);
  1305. unsigned long flags;
  1306. int ret = 0;
  1307. spin_lock_irqsave(&ci->lock, flags);
  1308. if (!ci->remote_wakeup) {
  1309. ret = -EOPNOTSUPP;
  1310. goto out;
  1311. }
  1312. if (!hw_read(ci, OP_PORTSC, PORTSC_SUSP)) {
  1313. ret = -EINVAL;
  1314. goto out;
  1315. }
  1316. hw_write(ci, OP_PORTSC, PORTSC_FPR, PORTSC_FPR);
  1317. out:
  1318. spin_unlock_irqrestore(&ci->lock, flags);
  1319. return ret;
  1320. }
  1321. static int ci_udc_vbus_draw(struct usb_gadget *_gadget, unsigned ma)
  1322. {
  1323. struct ci_hdrc *ci = container_of(_gadget, struct ci_hdrc, gadget);
  1324. if (ci->usb_phy)
  1325. return usb_phy_set_power(ci->usb_phy, ma);
  1326. return -ENOTSUPP;
  1327. }
  1328. static int ci_udc_selfpowered(struct usb_gadget *_gadget, int is_on)
  1329. {
  1330. struct ci_hdrc *ci = container_of(_gadget, struct ci_hdrc, gadget);
  1331. struct ci_hw_ep *hwep = ci->ep0in;
  1332. unsigned long flags;
  1333. spin_lock_irqsave(hwep->lock, flags);
  1334. _gadget->is_selfpowered = (is_on != 0);
  1335. spin_unlock_irqrestore(hwep->lock, flags);
  1336. return 0;
  1337. }
  1338. /* Change Data+ pullup status
  1339. * this func is used by usb_gadget_connect/disconnet
  1340. */
  1341. static int ci_udc_pullup(struct usb_gadget *_gadget, int is_on)
  1342. {
  1343. struct ci_hdrc *ci = container_of(_gadget, struct ci_hdrc, gadget);
  1344. /* Data+ pullup controlled by OTG state machine in OTG fsm mode */
  1345. if (ci_otg_is_fsm_mode(ci))
  1346. return 0;
  1347. pm_runtime_get_sync(&ci->gadget.dev);
  1348. if (is_on)
  1349. hw_write(ci, OP_USBCMD, USBCMD_RS, USBCMD_RS);
  1350. else
  1351. hw_write(ci, OP_USBCMD, USBCMD_RS, 0);
  1352. pm_runtime_put_sync(&ci->gadget.dev);
  1353. return 0;
  1354. }
  1355. static int ci_udc_start(struct usb_gadget *gadget,
  1356. struct usb_gadget_driver *driver);
  1357. static int ci_udc_stop(struct usb_gadget *gadget);
  1358. /**
  1359. * Device operations part of the API to the USB controller hardware,
  1360. * which don't involve endpoints (or i/o)
  1361. * Check "usb_gadget.h" for details
  1362. */
  1363. static const struct usb_gadget_ops usb_gadget_ops = {
  1364. .vbus_session = ci_udc_vbus_session,
  1365. .wakeup = ci_udc_wakeup,
  1366. .set_selfpowered = ci_udc_selfpowered,
  1367. .pullup = ci_udc_pullup,
  1368. .vbus_draw = ci_udc_vbus_draw,
  1369. .udc_start = ci_udc_start,
  1370. .udc_stop = ci_udc_stop,
  1371. };
  1372. static int init_eps(struct ci_hdrc *ci)
  1373. {
  1374. int retval = 0, i, j;
  1375. for (i = 0; i < ci->hw_ep_max/2; i++)
  1376. for (j = RX; j <= TX; j++) {
  1377. int k = i + j * ci->hw_ep_max/2;
  1378. struct ci_hw_ep *hwep = &ci->ci_hw_ep[k];
  1379. scnprintf(hwep->name, sizeof(hwep->name), "ep%i%s", i,
  1380. (j == TX) ? "in" : "out");
  1381. hwep->ci = ci;
  1382. hwep->lock = &ci->lock;
  1383. hwep->td_pool = ci->td_pool;
  1384. hwep->ep.name = hwep->name;
  1385. hwep->ep.ops = &usb_ep_ops;
  1386. if (i == 0) {
  1387. hwep->ep.caps.type_control = true;
  1388. } else {
  1389. hwep->ep.caps.type_iso = true;
  1390. hwep->ep.caps.type_bulk = true;
  1391. hwep->ep.caps.type_int = true;
  1392. }
  1393. if (j == TX)
  1394. hwep->ep.caps.dir_in = true;
  1395. else
  1396. hwep->ep.caps.dir_out = true;
  1397. /*
  1398. * for ep0: maxP defined in desc, for other
  1399. * eps, maxP is set by epautoconfig() called
  1400. * by gadget layer
  1401. */
  1402. usb_ep_set_maxpacket_limit(&hwep->ep, (unsigned short)~0);
  1403. INIT_LIST_HEAD(&hwep->qh.queue);
  1404. hwep->qh.ptr = dma_pool_alloc(ci->qh_pool, GFP_KERNEL,
  1405. &hwep->qh.dma);
  1406. if (hwep->qh.ptr == NULL)
  1407. retval = -ENOMEM;
  1408. else
  1409. memset(hwep->qh.ptr, 0, sizeof(*hwep->qh.ptr));
  1410. /*
  1411. * set up shorthands for ep0 out and in endpoints,
  1412. * don't add to gadget's ep_list
  1413. */
  1414. if (i == 0) {
  1415. if (j == RX)
  1416. ci->ep0out = hwep;
  1417. else
  1418. ci->ep0in = hwep;
  1419. usb_ep_set_maxpacket_limit(&hwep->ep, CTRL_PAYLOAD_MAX);
  1420. continue;
  1421. }
  1422. list_add_tail(&hwep->ep.ep_list, &ci->gadget.ep_list);
  1423. }
  1424. return retval;
  1425. }
  1426. static void destroy_eps(struct ci_hdrc *ci)
  1427. {
  1428. int i;
  1429. for (i = 0; i < ci->hw_ep_max; i++) {
  1430. struct ci_hw_ep *hwep = &ci->ci_hw_ep[i];
  1431. if (hwep->pending_td)
  1432. free_pending_td(hwep);
  1433. dma_pool_free(ci->qh_pool, hwep->qh.ptr, hwep->qh.dma);
  1434. }
  1435. }
  1436. /**
  1437. * ci_udc_start: register a gadget driver
  1438. * @gadget: our gadget
  1439. * @driver: the driver being registered
  1440. *
  1441. * Interrupts are enabled here.
  1442. */
  1443. static int ci_udc_start(struct usb_gadget *gadget,
  1444. struct usb_gadget_driver *driver)
  1445. {
  1446. struct ci_hdrc *ci = container_of(gadget, struct ci_hdrc, gadget);
  1447. unsigned long flags;
  1448. int retval = -ENOMEM;
  1449. if (driver->disconnect == NULL)
  1450. return -EINVAL;
  1451. ci->ep0out->ep.desc = &ctrl_endpt_out_desc;
  1452. retval = usb_ep_enable(&ci->ep0out->ep);
  1453. if (retval)
  1454. return retval;
  1455. ci->ep0in->ep.desc = &ctrl_endpt_in_desc;
  1456. retval = usb_ep_enable(&ci->ep0in->ep);
  1457. if (retval)
  1458. return retval;
  1459. ci->driver = driver;
  1460. /* Start otg fsm for B-device */
  1461. if (ci_otg_is_fsm_mode(ci) && ci->fsm.id) {
  1462. ci_hdrc_otg_fsm_start(ci);
  1463. return retval;
  1464. }
  1465. pm_runtime_get_sync(&ci->gadget.dev);
  1466. if (ci->vbus_active) {
  1467. spin_lock_irqsave(&ci->lock, flags);
  1468. hw_device_reset(ci);
  1469. } else {
  1470. usb_udc_vbus_handler(&ci->gadget, false);
  1471. pm_runtime_put_sync(&ci->gadget.dev);
  1472. return retval;
  1473. }
  1474. retval = hw_device_state(ci, ci->ep0out->qh.dma);
  1475. spin_unlock_irqrestore(&ci->lock, flags);
  1476. if (retval)
  1477. pm_runtime_put_sync(&ci->gadget.dev);
  1478. return retval;
  1479. }
  1480. static void ci_udc_stop_for_otg_fsm(struct ci_hdrc *ci)
  1481. {
  1482. if (!ci_otg_is_fsm_mode(ci))
  1483. return;
  1484. mutex_lock(&ci->fsm.lock);
  1485. if (ci->fsm.otg->state == OTG_STATE_A_PERIPHERAL) {
  1486. ci->fsm.a_bidl_adis_tmout = 1;
  1487. ci_hdrc_otg_fsm_start(ci);
  1488. } else if (ci->fsm.otg->state == OTG_STATE_B_PERIPHERAL) {
  1489. ci->fsm.protocol = PROTO_UNDEF;
  1490. ci->fsm.otg->state = OTG_STATE_UNDEFINED;
  1491. }
  1492. mutex_unlock(&ci->fsm.lock);
  1493. }
  1494. /**
  1495. * ci_udc_stop: unregister a gadget driver
  1496. */
  1497. static int ci_udc_stop(struct usb_gadget *gadget)
  1498. {
  1499. struct ci_hdrc *ci = container_of(gadget, struct ci_hdrc, gadget);
  1500. unsigned long flags;
  1501. spin_lock_irqsave(&ci->lock, flags);
  1502. if (ci->vbus_active) {
  1503. hw_device_state(ci, 0);
  1504. if (ci->platdata->notify_event)
  1505. ci->platdata->notify_event(ci,
  1506. CI_HDRC_CONTROLLER_STOPPED_EVENT);
  1507. spin_unlock_irqrestore(&ci->lock, flags);
  1508. _gadget_stop_activity(&ci->gadget);
  1509. spin_lock_irqsave(&ci->lock, flags);
  1510. pm_runtime_put(&ci->gadget.dev);
  1511. }
  1512. ci->driver = NULL;
  1513. spin_unlock_irqrestore(&ci->lock, flags);
  1514. ci_udc_stop_for_otg_fsm(ci);
  1515. return 0;
  1516. }
  1517. /******************************************************************************
  1518. * BUS block
  1519. *****************************************************************************/
  1520. /**
  1521. * udc_irq: ci interrupt handler
  1522. *
  1523. * This function returns IRQ_HANDLED if the IRQ has been handled
  1524. * It locks access to registers
  1525. */
  1526. static irqreturn_t udc_irq(struct ci_hdrc *ci)
  1527. {
  1528. irqreturn_t retval;
  1529. u32 intr;
  1530. if (ci == NULL)
  1531. return IRQ_HANDLED;
  1532. spin_lock(&ci->lock);
  1533. if (ci->platdata->flags & CI_HDRC_REGS_SHARED) {
  1534. if (hw_read(ci, OP_USBMODE, USBMODE_CM) !=
  1535. USBMODE_CM_DC) {
  1536. spin_unlock(&ci->lock);
  1537. return IRQ_NONE;
  1538. }
  1539. }
  1540. intr = hw_test_and_clear_intr_active(ci);
  1541. if (intr) {
  1542. /* order defines priority - do NOT change it */
  1543. if (USBi_URI & intr)
  1544. isr_reset_handler(ci);
  1545. if (USBi_PCI & intr) {
  1546. ci->gadget.speed = hw_port_is_high_speed(ci) ?
  1547. USB_SPEED_HIGH : USB_SPEED_FULL;
  1548. if (ci->suspended && ci->driver->resume) {
  1549. spin_unlock(&ci->lock);
  1550. ci->driver->resume(&ci->gadget);
  1551. spin_lock(&ci->lock);
  1552. ci->suspended = 0;
  1553. }
  1554. }
  1555. if (USBi_UI & intr)
  1556. isr_tr_complete_handler(ci);
  1557. if (USBi_SLI & intr) {
  1558. if (ci->gadget.speed != USB_SPEED_UNKNOWN &&
  1559. ci->driver->suspend) {
  1560. ci->suspended = 1;
  1561. spin_unlock(&ci->lock);
  1562. ci->driver->suspend(&ci->gadget);
  1563. usb_gadget_set_state(&ci->gadget,
  1564. USB_STATE_SUSPENDED);
  1565. spin_lock(&ci->lock);
  1566. }
  1567. }
  1568. retval = IRQ_HANDLED;
  1569. } else {
  1570. retval = IRQ_NONE;
  1571. }
  1572. spin_unlock(&ci->lock);
  1573. return retval;
  1574. }
  1575. /**
  1576. * udc_start: initialize gadget role
  1577. * @ci: chipidea controller
  1578. */
  1579. static int udc_start(struct ci_hdrc *ci)
  1580. {
  1581. struct device *dev = ci->dev;
  1582. struct usb_otg_caps *otg_caps = &ci->platdata->ci_otg_caps;
  1583. int retval = 0;
  1584. spin_lock_init(&ci->lock);
  1585. ci->gadget.ops = &usb_gadget_ops;
  1586. ci->gadget.speed = USB_SPEED_UNKNOWN;
  1587. ci->gadget.max_speed = USB_SPEED_HIGH;
  1588. ci->gadget.name = ci->platdata->name;
  1589. ci->gadget.otg_caps = otg_caps;
  1590. if (ci->is_otg && (otg_caps->hnp_support || otg_caps->srp_support ||
  1591. otg_caps->adp_support))
  1592. ci->gadget.is_otg = 1;
  1593. INIT_LIST_HEAD(&ci->gadget.ep_list);
  1594. /* alloc resources */
  1595. ci->qh_pool = dma_pool_create("ci_hw_qh", dev,
  1596. sizeof(struct ci_hw_qh),
  1597. 64, CI_HDRC_PAGE_SIZE);
  1598. if (ci->qh_pool == NULL)
  1599. return -ENOMEM;
  1600. ci->td_pool = dma_pool_create("ci_hw_td", dev,
  1601. sizeof(struct ci_hw_td),
  1602. 64, CI_HDRC_PAGE_SIZE);
  1603. if (ci->td_pool == NULL) {
  1604. retval = -ENOMEM;
  1605. goto free_qh_pool;
  1606. }
  1607. retval = init_eps(ci);
  1608. if (retval)
  1609. goto free_pools;
  1610. ci->gadget.ep0 = &ci->ep0in->ep;
  1611. retval = usb_add_gadget_udc(dev, &ci->gadget);
  1612. if (retval)
  1613. goto destroy_eps;
  1614. pm_runtime_no_callbacks(&ci->gadget.dev);
  1615. pm_runtime_enable(&ci->gadget.dev);
  1616. return retval;
  1617. destroy_eps:
  1618. destroy_eps(ci);
  1619. free_pools:
  1620. dma_pool_destroy(ci->td_pool);
  1621. free_qh_pool:
  1622. dma_pool_destroy(ci->qh_pool);
  1623. return retval;
  1624. }
  1625. /**
  1626. * ci_hdrc_gadget_destroy: parent remove must call this to remove UDC
  1627. *
  1628. * No interrupts active, the IRQ has been released
  1629. */
  1630. void ci_hdrc_gadget_destroy(struct ci_hdrc *ci)
  1631. {
  1632. if (!ci->roles[CI_ROLE_GADGET])
  1633. return;
  1634. usb_del_gadget_udc(&ci->gadget);
  1635. destroy_eps(ci);
  1636. dma_pool_destroy(ci->td_pool);
  1637. dma_pool_destroy(ci->qh_pool);
  1638. }
  1639. static int udc_id_switch_for_device(struct ci_hdrc *ci)
  1640. {
  1641. if (ci->is_otg)
  1642. /* Clear and enable BSV irq */
  1643. hw_write_otgsc(ci, OTGSC_BSVIS | OTGSC_BSVIE,
  1644. OTGSC_BSVIS | OTGSC_BSVIE);
  1645. return 0;
  1646. }
  1647. static void udc_id_switch_for_host(struct ci_hdrc *ci)
  1648. {
  1649. /*
  1650. * host doesn't care B_SESSION_VALID event
  1651. * so clear and disbale BSV irq
  1652. */
  1653. if (ci->is_otg)
  1654. hw_write_otgsc(ci, OTGSC_BSVIE | OTGSC_BSVIS, OTGSC_BSVIS);
  1655. }
  1656. /**
  1657. * ci_hdrc_gadget_init - initialize device related bits
  1658. * ci: the controller
  1659. *
  1660. * This function initializes the gadget, if the device is "device capable".
  1661. */
  1662. int ci_hdrc_gadget_init(struct ci_hdrc *ci)
  1663. {
  1664. struct ci_role_driver *rdrv;
  1665. if (!hw_read(ci, CAP_DCCPARAMS, DCCPARAMS_DC))
  1666. return -ENXIO;
  1667. rdrv = devm_kzalloc(ci->dev, sizeof(struct ci_role_driver), GFP_KERNEL);
  1668. if (!rdrv)
  1669. return -ENOMEM;
  1670. rdrv->start = udc_id_switch_for_device;
  1671. rdrv->stop = udc_id_switch_for_host;
  1672. rdrv->irq = udc_irq;
  1673. rdrv->name = "gadget";
  1674. ci->roles[CI_ROLE_GADGET] = rdrv;
  1675. return udc_start(ci);
  1676. }