intel.c 29 KB

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  1. /*
  2. * Intel CPU Microcode Update Driver for Linux
  3. *
  4. * Copyright (C) 2000-2006 Tigran Aivazian <tigran@aivazian.fsnet.co.uk>
  5. * 2006 Shaohua Li <shaohua.li@intel.com>
  6. *
  7. * Intel CPU microcode early update for Linux
  8. *
  9. * Copyright (C) 2012 Fenghua Yu <fenghua.yu@intel.com>
  10. * H Peter Anvin" <hpa@zytor.com>
  11. *
  12. * This program is free software; you can redistribute it and/or
  13. * modify it under the terms of the GNU General Public License
  14. * as published by the Free Software Foundation; either version
  15. * 2 of the License, or (at your option) any later version.
  16. */
  17. /*
  18. * This needs to be before all headers so that pr_debug in printk.h doesn't turn
  19. * printk calls into no_printk().
  20. *
  21. *#define DEBUG
  22. */
  23. #define pr_fmt(fmt) "microcode: " fmt
  24. #include <linux/earlycpio.h>
  25. #include <linux/firmware.h>
  26. #include <linux/uaccess.h>
  27. #include <linux/vmalloc.h>
  28. #include <linux/initrd.h>
  29. #include <linux/kernel.h>
  30. #include <linux/slab.h>
  31. #include <linux/cpu.h>
  32. #include <linux/mm.h>
  33. #include <asm/microcode_intel.h>
  34. #include <asm/processor.h>
  35. #include <asm/tlbflush.h>
  36. #include <asm/setup.h>
  37. #include <asm/msr.h>
  38. /*
  39. * Temporary microcode blobs pointers storage. We note here during early load
  40. * the pointers to microcode blobs we've got from whatever storage (detached
  41. * initrd, builtin). Later on, we put those into final storage
  42. * mc_saved_data.mc_saved.
  43. *
  44. * Important: those are offsets from the beginning of initrd or absolute
  45. * addresses within the kernel image when built-in.
  46. */
  47. static unsigned long mc_tmp_ptrs[MAX_UCODE_COUNT];
  48. static struct mc_saved_data {
  49. unsigned int num_saved;
  50. struct microcode_intel **mc_saved;
  51. } mc_saved_data;
  52. /* Microcode blobs within the initrd. 0 if builtin. */
  53. static struct ucode_blobs {
  54. unsigned long start;
  55. bool valid;
  56. } blobs;
  57. static inline bool cpu_signatures_match(unsigned int s1, unsigned int p1,
  58. unsigned int s2, unsigned int p2)
  59. {
  60. if (s1 != s2)
  61. return false;
  62. /* Processor flags are either both 0 ... */
  63. if (!p1 && !p2)
  64. return true;
  65. /* ... or they intersect. */
  66. return p1 & p2;
  67. }
  68. /*
  69. * Returns 1 if update has been found, 0 otherwise.
  70. */
  71. static int find_matching_signature(void *mc, unsigned int csig, int cpf)
  72. {
  73. struct microcode_header_intel *mc_hdr = mc;
  74. struct extended_sigtable *ext_hdr;
  75. struct extended_signature *ext_sig;
  76. int i;
  77. if (cpu_signatures_match(csig, cpf, mc_hdr->sig, mc_hdr->pf))
  78. return 1;
  79. /* Look for ext. headers: */
  80. if (get_totalsize(mc_hdr) <= get_datasize(mc_hdr) + MC_HEADER_SIZE)
  81. return 0;
  82. ext_hdr = mc + get_datasize(mc_hdr) + MC_HEADER_SIZE;
  83. ext_sig = (void *)ext_hdr + EXT_HEADER_SIZE;
  84. for (i = 0; i < ext_hdr->count; i++) {
  85. if (cpu_signatures_match(csig, cpf, ext_sig->sig, ext_sig->pf))
  86. return 1;
  87. ext_sig++;
  88. }
  89. return 0;
  90. }
  91. /*
  92. * Returns 1 if update has been found, 0 otherwise.
  93. */
  94. static int has_newer_microcode(void *mc, unsigned int csig, int cpf, int new_rev)
  95. {
  96. struct microcode_header_intel *mc_hdr = mc;
  97. if (mc_hdr->rev <= new_rev)
  98. return 0;
  99. return find_matching_signature(mc, csig, cpf);
  100. }
  101. /* Go through saved patches and find the one suitable for the current CPU. */
  102. static enum ucode_state
  103. find_microcode_patch(struct microcode_intel **saved,
  104. unsigned int num_saved, struct ucode_cpu_info *uci)
  105. {
  106. struct microcode_intel *ucode_ptr, *new_mc = NULL;
  107. struct microcode_header_intel *mc_hdr;
  108. int new_rev, ret, i;
  109. new_rev = uci->cpu_sig.rev;
  110. for (i = 0; i < num_saved; i++) {
  111. ucode_ptr = saved[i];
  112. mc_hdr = (struct microcode_header_intel *)ucode_ptr;
  113. ret = has_newer_microcode(ucode_ptr,
  114. uci->cpu_sig.sig,
  115. uci->cpu_sig.pf,
  116. new_rev);
  117. if (!ret)
  118. continue;
  119. new_rev = mc_hdr->rev;
  120. new_mc = ucode_ptr;
  121. }
  122. if (!new_mc)
  123. return UCODE_NFOUND;
  124. uci->mc = (struct microcode_intel *)new_mc;
  125. return UCODE_OK;
  126. }
  127. static inline void
  128. copy_ptrs(struct microcode_intel **mc_saved, unsigned long *mc_ptrs,
  129. unsigned long off, int num_saved)
  130. {
  131. int i;
  132. for (i = 0; i < num_saved; i++)
  133. mc_saved[i] = (struct microcode_intel *)(mc_ptrs[i] + off);
  134. }
  135. #ifdef CONFIG_X86_32
  136. static void
  137. microcode_phys(struct microcode_intel **mc_saved_tmp, struct mc_saved_data *mcs)
  138. {
  139. int i;
  140. struct microcode_intel ***mc_saved;
  141. mc_saved = (struct microcode_intel ***)__pa_nodebug(&mcs->mc_saved);
  142. for (i = 0; i < mcs->num_saved; i++) {
  143. struct microcode_intel *p;
  144. p = *(struct microcode_intel **)__pa_nodebug(mcs->mc_saved + i);
  145. mc_saved_tmp[i] = (struct microcode_intel *)__pa_nodebug(p);
  146. }
  147. }
  148. #endif
  149. static enum ucode_state
  150. load_microcode(struct mc_saved_data *mcs, unsigned long *mc_ptrs,
  151. unsigned long offset, struct ucode_cpu_info *uci)
  152. {
  153. struct microcode_intel *mc_saved_tmp[MAX_UCODE_COUNT];
  154. unsigned int count = mcs->num_saved;
  155. if (!mcs->mc_saved) {
  156. copy_ptrs(mc_saved_tmp, mc_ptrs, offset, count);
  157. return find_microcode_patch(mc_saved_tmp, count, uci);
  158. } else {
  159. #ifdef CONFIG_X86_32
  160. microcode_phys(mc_saved_tmp, mcs);
  161. return find_microcode_patch(mc_saved_tmp, count, uci);
  162. #else
  163. return find_microcode_patch(mcs->mc_saved, count, uci);
  164. #endif
  165. }
  166. }
  167. /*
  168. * Given CPU signature and a microcode patch, this function finds if the
  169. * microcode patch has matching family and model with the CPU.
  170. */
  171. static enum ucode_state
  172. matching_model_microcode(struct microcode_header_intel *mc_header,
  173. unsigned long sig)
  174. {
  175. unsigned int fam, model;
  176. unsigned int fam_ucode, model_ucode;
  177. struct extended_sigtable *ext_header;
  178. unsigned long total_size = get_totalsize(mc_header);
  179. unsigned long data_size = get_datasize(mc_header);
  180. int ext_sigcount, i;
  181. struct extended_signature *ext_sig;
  182. fam = x86_family(sig);
  183. model = x86_model(sig);
  184. fam_ucode = x86_family(mc_header->sig);
  185. model_ucode = x86_model(mc_header->sig);
  186. if (fam == fam_ucode && model == model_ucode)
  187. return UCODE_OK;
  188. /* Look for ext. headers: */
  189. if (total_size <= data_size + MC_HEADER_SIZE)
  190. return UCODE_NFOUND;
  191. ext_header = (void *) mc_header + data_size + MC_HEADER_SIZE;
  192. ext_sig = (void *)ext_header + EXT_HEADER_SIZE;
  193. ext_sigcount = ext_header->count;
  194. for (i = 0; i < ext_sigcount; i++) {
  195. fam_ucode = x86_family(ext_sig->sig);
  196. model_ucode = x86_model(ext_sig->sig);
  197. if (fam == fam_ucode && model == model_ucode)
  198. return UCODE_OK;
  199. ext_sig++;
  200. }
  201. return UCODE_NFOUND;
  202. }
  203. static int
  204. save_microcode(struct mc_saved_data *mcs,
  205. struct microcode_intel **mc_saved_src,
  206. unsigned int num_saved)
  207. {
  208. int i, j;
  209. struct microcode_intel **saved_ptr;
  210. int ret;
  211. if (!num_saved)
  212. return -EINVAL;
  213. /*
  214. * Copy new microcode data.
  215. */
  216. saved_ptr = kcalloc(num_saved, sizeof(struct microcode_intel *), GFP_KERNEL);
  217. if (!saved_ptr)
  218. return -ENOMEM;
  219. for (i = 0; i < num_saved; i++) {
  220. struct microcode_header_intel *mc_hdr;
  221. struct microcode_intel *mc;
  222. unsigned long size;
  223. if (!mc_saved_src[i]) {
  224. ret = -EINVAL;
  225. goto err;
  226. }
  227. mc = mc_saved_src[i];
  228. mc_hdr = &mc->hdr;
  229. size = get_totalsize(mc_hdr);
  230. saved_ptr[i] = kmemdup(mc, size, GFP_KERNEL);
  231. if (!saved_ptr[i]) {
  232. ret = -ENOMEM;
  233. goto err;
  234. }
  235. }
  236. /*
  237. * Point to newly saved microcode.
  238. */
  239. mcs->mc_saved = saved_ptr;
  240. mcs->num_saved = num_saved;
  241. return 0;
  242. err:
  243. for (j = 0; j <= i; j++)
  244. kfree(saved_ptr[j]);
  245. kfree(saved_ptr);
  246. return ret;
  247. }
  248. /*
  249. * A microcode patch in ucode_ptr is saved into mc_saved
  250. * - if it has matching signature and newer revision compared to an existing
  251. * patch mc_saved.
  252. * - or if it is a newly discovered microcode patch.
  253. *
  254. * The microcode patch should have matching model with CPU.
  255. *
  256. * Returns: The updated number @num_saved of saved microcode patches.
  257. */
  258. static unsigned int _save_mc(struct microcode_intel **mc_saved,
  259. u8 *ucode_ptr, unsigned int num_saved)
  260. {
  261. struct microcode_header_intel *mc_hdr, *mc_saved_hdr;
  262. unsigned int sig, pf;
  263. int found = 0, i;
  264. mc_hdr = (struct microcode_header_intel *)ucode_ptr;
  265. for (i = 0; i < num_saved; i++) {
  266. mc_saved_hdr = (struct microcode_header_intel *)mc_saved[i];
  267. sig = mc_saved_hdr->sig;
  268. pf = mc_saved_hdr->pf;
  269. if (!find_matching_signature(ucode_ptr, sig, pf))
  270. continue;
  271. found = 1;
  272. if (mc_hdr->rev <= mc_saved_hdr->rev)
  273. continue;
  274. /*
  275. * Found an older ucode saved earlier. Replace it with
  276. * this newer one.
  277. */
  278. mc_saved[i] = (struct microcode_intel *)ucode_ptr;
  279. break;
  280. }
  281. /* Newly detected microcode, save it to memory. */
  282. if (i >= num_saved && !found)
  283. mc_saved[num_saved++] = (struct microcode_intel *)ucode_ptr;
  284. return num_saved;
  285. }
  286. static int microcode_sanity_check(void *mc, int print_err)
  287. {
  288. unsigned long total_size, data_size, ext_table_size;
  289. struct microcode_header_intel *mc_header = mc;
  290. struct extended_sigtable *ext_header = NULL;
  291. u32 sum, orig_sum, ext_sigcount = 0, i;
  292. struct extended_signature *ext_sig;
  293. total_size = get_totalsize(mc_header);
  294. data_size = get_datasize(mc_header);
  295. if (data_size + MC_HEADER_SIZE > total_size) {
  296. if (print_err)
  297. pr_err("Error: bad microcode data file size.\n");
  298. return -EINVAL;
  299. }
  300. if (mc_header->ldrver != 1 || mc_header->hdrver != 1) {
  301. if (print_err)
  302. pr_err("Error: invalid/unknown microcode update format.\n");
  303. return -EINVAL;
  304. }
  305. ext_table_size = total_size - (MC_HEADER_SIZE + data_size);
  306. if (ext_table_size) {
  307. u32 ext_table_sum = 0;
  308. u32 *ext_tablep;
  309. if ((ext_table_size < EXT_HEADER_SIZE)
  310. || ((ext_table_size - EXT_HEADER_SIZE) % EXT_SIGNATURE_SIZE)) {
  311. if (print_err)
  312. pr_err("Error: truncated extended signature table.\n");
  313. return -EINVAL;
  314. }
  315. ext_header = mc + MC_HEADER_SIZE + data_size;
  316. if (ext_table_size != exttable_size(ext_header)) {
  317. if (print_err)
  318. pr_err("Error: extended signature table size mismatch.\n");
  319. return -EFAULT;
  320. }
  321. ext_sigcount = ext_header->count;
  322. /*
  323. * Check extended table checksum: the sum of all dwords that
  324. * comprise a valid table must be 0.
  325. */
  326. ext_tablep = (u32 *)ext_header;
  327. i = ext_table_size / sizeof(u32);
  328. while (i--)
  329. ext_table_sum += ext_tablep[i];
  330. if (ext_table_sum) {
  331. if (print_err)
  332. pr_warn("Bad extended signature table checksum, aborting.\n");
  333. return -EINVAL;
  334. }
  335. }
  336. /*
  337. * Calculate the checksum of update data and header. The checksum of
  338. * valid update data and header including the extended signature table
  339. * must be 0.
  340. */
  341. orig_sum = 0;
  342. i = (MC_HEADER_SIZE + data_size) / sizeof(u32);
  343. while (i--)
  344. orig_sum += ((u32 *)mc)[i];
  345. if (orig_sum) {
  346. if (print_err)
  347. pr_err("Bad microcode data checksum, aborting.\n");
  348. return -EINVAL;
  349. }
  350. if (!ext_table_size)
  351. return 0;
  352. /*
  353. * Check extended signature checksum: 0 => valid.
  354. */
  355. for (i = 0; i < ext_sigcount; i++) {
  356. ext_sig = (void *)ext_header + EXT_HEADER_SIZE +
  357. EXT_SIGNATURE_SIZE * i;
  358. sum = (mc_header->sig + mc_header->pf + mc_header->cksum) -
  359. (ext_sig->sig + ext_sig->pf + ext_sig->cksum);
  360. if (sum) {
  361. if (print_err)
  362. pr_err("Bad extended signature checksum, aborting.\n");
  363. return -EINVAL;
  364. }
  365. }
  366. return 0;
  367. }
  368. /*
  369. * Get microcode matching with BSP's model. Only CPUs with the same model as
  370. * BSP can stay in the platform.
  371. */
  372. static enum ucode_state __init
  373. get_matching_model_microcode(unsigned long start, void *data, size_t size,
  374. struct mc_saved_data *mcs, unsigned long *mc_ptrs,
  375. struct ucode_cpu_info *uci)
  376. {
  377. struct microcode_intel *mc_saved_tmp[MAX_UCODE_COUNT];
  378. struct microcode_header_intel *mc_header;
  379. unsigned int num_saved = mcs->num_saved;
  380. enum ucode_state state = UCODE_OK;
  381. unsigned int leftover = size;
  382. u8 *ucode_ptr = data;
  383. unsigned int mc_size;
  384. int i;
  385. while (leftover && num_saved < ARRAY_SIZE(mc_saved_tmp)) {
  386. if (leftover < sizeof(mc_header))
  387. break;
  388. mc_header = (struct microcode_header_intel *)ucode_ptr;
  389. mc_size = get_totalsize(mc_header);
  390. if (!mc_size || mc_size > leftover ||
  391. microcode_sanity_check(ucode_ptr, 0) < 0)
  392. break;
  393. leftover -= mc_size;
  394. /*
  395. * Since APs with same family and model as the BSP may boot in
  396. * the platform, we need to find and save microcode patches
  397. * with the same family and model as the BSP.
  398. */
  399. if (matching_model_microcode(mc_header, uci->cpu_sig.sig) != UCODE_OK) {
  400. ucode_ptr += mc_size;
  401. continue;
  402. }
  403. num_saved = _save_mc(mc_saved_tmp, ucode_ptr, num_saved);
  404. ucode_ptr += mc_size;
  405. }
  406. if (leftover) {
  407. state = UCODE_ERROR;
  408. return state;
  409. }
  410. if (!num_saved) {
  411. state = UCODE_NFOUND;
  412. return state;
  413. }
  414. for (i = 0; i < num_saved; i++)
  415. mc_ptrs[i] = (unsigned long)mc_saved_tmp[i] - start;
  416. mcs->num_saved = num_saved;
  417. return state;
  418. }
  419. static int collect_cpu_info_early(struct ucode_cpu_info *uci)
  420. {
  421. unsigned int val[2];
  422. unsigned int family, model;
  423. struct cpu_signature csig;
  424. unsigned int eax, ebx, ecx, edx;
  425. csig.sig = 0;
  426. csig.pf = 0;
  427. csig.rev = 0;
  428. memset(uci, 0, sizeof(*uci));
  429. eax = 0x00000001;
  430. ecx = 0;
  431. native_cpuid(&eax, &ebx, &ecx, &edx);
  432. csig.sig = eax;
  433. family = x86_family(csig.sig);
  434. model = x86_model(csig.sig);
  435. if ((model >= 5) || (family > 6)) {
  436. /* get processor flags from MSR 0x17 */
  437. native_rdmsr(MSR_IA32_PLATFORM_ID, val[0], val[1]);
  438. csig.pf = 1 << ((val[1] >> 18) & 7);
  439. }
  440. native_wrmsrl(MSR_IA32_UCODE_REV, 0);
  441. /* As documented in the SDM: Do a CPUID 1 here */
  442. sync_core();
  443. /* get the current revision from MSR 0x8B */
  444. native_rdmsr(MSR_IA32_UCODE_REV, val[0], val[1]);
  445. csig.rev = val[1];
  446. uci->cpu_sig = csig;
  447. uci->valid = 1;
  448. return 0;
  449. }
  450. static void show_saved_mc(void)
  451. {
  452. #ifdef DEBUG
  453. int i, j;
  454. unsigned int sig, pf, rev, total_size, data_size, date;
  455. struct ucode_cpu_info uci;
  456. if (!mc_saved_data.num_saved) {
  457. pr_debug("no microcode data saved.\n");
  458. return;
  459. }
  460. pr_debug("Total microcode saved: %d\n", mc_saved_data.num_saved);
  461. collect_cpu_info_early(&uci);
  462. sig = uci.cpu_sig.sig;
  463. pf = uci.cpu_sig.pf;
  464. rev = uci.cpu_sig.rev;
  465. pr_debug("CPU: sig=0x%x, pf=0x%x, rev=0x%x\n", sig, pf, rev);
  466. for (i = 0; i < mc_saved_data.num_saved; i++) {
  467. struct microcode_header_intel *mc_saved_header;
  468. struct extended_sigtable *ext_header;
  469. int ext_sigcount;
  470. struct extended_signature *ext_sig;
  471. mc_saved_header = (struct microcode_header_intel *)
  472. mc_saved_data.mc_saved[i];
  473. sig = mc_saved_header->sig;
  474. pf = mc_saved_header->pf;
  475. rev = mc_saved_header->rev;
  476. total_size = get_totalsize(mc_saved_header);
  477. data_size = get_datasize(mc_saved_header);
  478. date = mc_saved_header->date;
  479. pr_debug("mc_saved[%d]: sig=0x%x, pf=0x%x, rev=0x%x, total size=0x%x, date = %04x-%02x-%02x\n",
  480. i, sig, pf, rev, total_size,
  481. date & 0xffff,
  482. date >> 24,
  483. (date >> 16) & 0xff);
  484. /* Look for ext. headers: */
  485. if (total_size <= data_size + MC_HEADER_SIZE)
  486. continue;
  487. ext_header = (void *) mc_saved_header + data_size + MC_HEADER_SIZE;
  488. ext_sigcount = ext_header->count;
  489. ext_sig = (void *)ext_header + EXT_HEADER_SIZE;
  490. for (j = 0; j < ext_sigcount; j++) {
  491. sig = ext_sig->sig;
  492. pf = ext_sig->pf;
  493. pr_debug("\tExtended[%d]: sig=0x%x, pf=0x%x\n",
  494. j, sig, pf);
  495. ext_sig++;
  496. }
  497. }
  498. #endif
  499. }
  500. /*
  501. * Save this mc into mc_saved_data. So it will be loaded early when a CPU is
  502. * hot added or resumes.
  503. *
  504. * Please make sure this mc should be a valid microcode patch before calling
  505. * this function.
  506. */
  507. static void save_mc_for_early(u8 *mc)
  508. {
  509. #ifdef CONFIG_HOTPLUG_CPU
  510. /* Synchronization during CPU hotplug. */
  511. static DEFINE_MUTEX(x86_cpu_microcode_mutex);
  512. struct microcode_intel *mc_saved_tmp[MAX_UCODE_COUNT];
  513. unsigned int mc_saved_count_init;
  514. unsigned int num_saved;
  515. struct microcode_intel **mc_saved;
  516. int ret, i;
  517. mutex_lock(&x86_cpu_microcode_mutex);
  518. mc_saved_count_init = mc_saved_data.num_saved;
  519. num_saved = mc_saved_data.num_saved;
  520. mc_saved = mc_saved_data.mc_saved;
  521. if (mc_saved && num_saved)
  522. memcpy(mc_saved_tmp, mc_saved,
  523. num_saved * sizeof(struct microcode_intel *));
  524. /*
  525. * Save the microcode patch mc in mc_save_tmp structure if it's a newer
  526. * version.
  527. */
  528. num_saved = _save_mc(mc_saved_tmp, mc, num_saved);
  529. /*
  530. * Save the mc_save_tmp in global mc_saved_data.
  531. */
  532. ret = save_microcode(&mc_saved_data, mc_saved_tmp, num_saved);
  533. if (ret) {
  534. pr_err("Cannot save microcode patch.\n");
  535. goto out;
  536. }
  537. show_saved_mc();
  538. /*
  539. * Free old saved microcode data.
  540. */
  541. if (mc_saved) {
  542. for (i = 0; i < mc_saved_count_init; i++)
  543. kfree(mc_saved[i]);
  544. kfree(mc_saved);
  545. }
  546. out:
  547. mutex_unlock(&x86_cpu_microcode_mutex);
  548. #endif
  549. }
  550. static bool __init load_builtin_intel_microcode(struct cpio_data *cp)
  551. {
  552. #ifdef CONFIG_X86_64
  553. unsigned int eax = 0x00000001, ebx, ecx = 0, edx;
  554. char name[30];
  555. native_cpuid(&eax, &ebx, &ecx, &edx);
  556. sprintf(name, "intel-ucode/%02x-%02x-%02x",
  557. x86_family(eax), x86_model(eax), x86_stepping(eax));
  558. return get_builtin_firmware(cp, name);
  559. #else
  560. return false;
  561. #endif
  562. }
  563. /*
  564. * Print ucode update info.
  565. */
  566. static void
  567. print_ucode_info(struct ucode_cpu_info *uci, unsigned int date)
  568. {
  569. pr_info_once("microcode updated early to revision 0x%x, date = %04x-%02x-%02x\n",
  570. uci->cpu_sig.rev,
  571. date & 0xffff,
  572. date >> 24,
  573. (date >> 16) & 0xff);
  574. }
  575. #ifdef CONFIG_X86_32
  576. static int delay_ucode_info;
  577. static int current_mc_date;
  578. /*
  579. * Print early updated ucode info after printk works. This is delayed info dump.
  580. */
  581. void show_ucode_info_early(void)
  582. {
  583. struct ucode_cpu_info uci;
  584. if (delay_ucode_info) {
  585. collect_cpu_info_early(&uci);
  586. print_ucode_info(&uci, current_mc_date);
  587. delay_ucode_info = 0;
  588. }
  589. }
  590. /*
  591. * At this point, we can not call printk() yet. Keep microcode patch number in
  592. * mc_saved_data.mc_saved and delay printing microcode info in
  593. * show_ucode_info_early() until printk() works.
  594. */
  595. static void print_ucode(struct ucode_cpu_info *uci)
  596. {
  597. struct microcode_intel *mc;
  598. int *delay_ucode_info_p;
  599. int *current_mc_date_p;
  600. mc = uci->mc;
  601. if (!mc)
  602. return;
  603. delay_ucode_info_p = (int *)__pa_nodebug(&delay_ucode_info);
  604. current_mc_date_p = (int *)__pa_nodebug(&current_mc_date);
  605. *delay_ucode_info_p = 1;
  606. *current_mc_date_p = mc->hdr.date;
  607. }
  608. #else
  609. /*
  610. * Flush global tlb. We only do this in x86_64 where paging has been enabled
  611. * already and PGE should be enabled as well.
  612. */
  613. static inline void flush_tlb_early(void)
  614. {
  615. __native_flush_tlb_global_irq_disabled();
  616. }
  617. static inline void print_ucode(struct ucode_cpu_info *uci)
  618. {
  619. struct microcode_intel *mc;
  620. mc = uci->mc;
  621. if (!mc)
  622. return;
  623. print_ucode_info(uci, mc->hdr.date);
  624. }
  625. #endif
  626. static int apply_microcode_early(struct ucode_cpu_info *uci, bool early)
  627. {
  628. struct microcode_intel *mc;
  629. unsigned int val[2];
  630. mc = uci->mc;
  631. if (!mc)
  632. return 0;
  633. /* write microcode via MSR 0x79 */
  634. native_wrmsrl(MSR_IA32_UCODE_WRITE, (unsigned long)mc->bits);
  635. native_wrmsrl(MSR_IA32_UCODE_REV, 0);
  636. /* As documented in the SDM: Do a CPUID 1 here */
  637. sync_core();
  638. /* get the current revision from MSR 0x8B */
  639. native_rdmsr(MSR_IA32_UCODE_REV, val[0], val[1]);
  640. if (val[1] != mc->hdr.rev)
  641. return -1;
  642. #ifdef CONFIG_X86_64
  643. /* Flush global tlb. This is precaution. */
  644. flush_tlb_early();
  645. #endif
  646. uci->cpu_sig.rev = val[1];
  647. if (early)
  648. print_ucode(uci);
  649. else
  650. print_ucode_info(uci, mc->hdr.date);
  651. return 0;
  652. }
  653. /*
  654. * This function converts microcode patch offsets previously stored in
  655. * mc_tmp_ptrs to pointers and stores the pointers in mc_saved_data.
  656. */
  657. int __init save_microcode_in_initrd_intel(void)
  658. {
  659. struct microcode_intel *mc_saved[MAX_UCODE_COUNT];
  660. unsigned int count = mc_saved_data.num_saved;
  661. unsigned long offset = 0;
  662. int ret;
  663. if (!count)
  664. return 0;
  665. /*
  666. * We have found a valid initrd but it might've been relocated in the
  667. * meantime so get its updated address.
  668. */
  669. if (IS_ENABLED(CONFIG_BLK_DEV_INITRD) && blobs.valid)
  670. offset = initrd_start;
  671. copy_ptrs(mc_saved, mc_tmp_ptrs, offset, count);
  672. ret = save_microcode(&mc_saved_data, mc_saved, count);
  673. if (ret)
  674. pr_err("Cannot save microcode patches from initrd.\n");
  675. else
  676. show_saved_mc();
  677. return ret;
  678. }
  679. static __init enum ucode_state
  680. __scan_microcode_initrd(struct cpio_data *cd, struct ucode_blobs *blbp)
  681. {
  682. #ifdef CONFIG_BLK_DEV_INITRD
  683. static __initdata char ucode_name[] = "kernel/x86/microcode/GenuineIntel.bin";
  684. char *p = IS_ENABLED(CONFIG_X86_32) ? (char *)__pa_nodebug(ucode_name)
  685. : ucode_name;
  686. # ifdef CONFIG_X86_32
  687. unsigned long start = 0, size;
  688. struct boot_params *params;
  689. params = (struct boot_params *)__pa_nodebug(&boot_params);
  690. size = params->hdr.ramdisk_size;
  691. /*
  692. * Set start only if we have an initrd image. We cannot use initrd_start
  693. * because it is not set that early yet.
  694. */
  695. start = (size ? params->hdr.ramdisk_image : 0);
  696. # else /* CONFIG_X86_64 */
  697. unsigned long start = 0, size;
  698. size = (u64)boot_params.ext_ramdisk_size << 32;
  699. size |= boot_params.hdr.ramdisk_size;
  700. if (size) {
  701. start = (u64)boot_params.ext_ramdisk_image << 32;
  702. start |= boot_params.hdr.ramdisk_image;
  703. start += PAGE_OFFSET;
  704. }
  705. # endif
  706. *cd = find_cpio_data(p, (void *)start, size, NULL);
  707. if (cd->data) {
  708. blbp->start = start;
  709. blbp->valid = true;
  710. return UCODE_OK;
  711. } else
  712. #endif /* CONFIG_BLK_DEV_INITRD */
  713. return UCODE_ERROR;
  714. }
  715. static __init enum ucode_state
  716. scan_microcode(struct mc_saved_data *mcs, unsigned long *mc_ptrs,
  717. struct ucode_cpu_info *uci, struct ucode_blobs *blbp)
  718. {
  719. struct cpio_data cd = { NULL, 0, "" };
  720. enum ucode_state ret;
  721. /* try built-in microcode first */
  722. if (load_builtin_intel_microcode(&cd))
  723. /*
  724. * Invalidate blobs as we might've gotten an initrd too,
  725. * supplied by the boot loader, by mistake or simply forgotten
  726. * there. That's fine, we ignore it since we've found builtin
  727. * microcode already.
  728. */
  729. blbp->valid = false;
  730. else {
  731. ret = __scan_microcode_initrd(&cd, blbp);
  732. if (ret != UCODE_OK)
  733. return ret;
  734. }
  735. return get_matching_model_microcode(blbp->start, cd.data, cd.size,
  736. mcs, mc_ptrs, uci);
  737. }
  738. static void __init
  739. _load_ucode_intel_bsp(struct mc_saved_data *mcs, unsigned long *mc_ptrs,
  740. struct ucode_blobs *blbp)
  741. {
  742. struct ucode_cpu_info uci;
  743. enum ucode_state ret;
  744. collect_cpu_info_early(&uci);
  745. ret = scan_microcode(mcs, mc_ptrs, &uci, blbp);
  746. if (ret != UCODE_OK)
  747. return;
  748. ret = load_microcode(mcs, mc_ptrs, blbp->start, &uci);
  749. if (ret != UCODE_OK)
  750. return;
  751. apply_microcode_early(&uci, true);
  752. }
  753. void __init load_ucode_intel_bsp(void)
  754. {
  755. struct ucode_blobs *blobs_p;
  756. struct mc_saved_data *mcs;
  757. unsigned long *ptrs;
  758. #ifdef CONFIG_X86_32
  759. mcs = (struct mc_saved_data *)__pa_nodebug(&mc_saved_data);
  760. ptrs = (unsigned long *)__pa_nodebug(&mc_tmp_ptrs);
  761. blobs_p = (struct ucode_blobs *)__pa_nodebug(&blobs);
  762. #else
  763. mcs = &mc_saved_data;
  764. ptrs = mc_tmp_ptrs;
  765. blobs_p = &blobs;
  766. #endif
  767. _load_ucode_intel_bsp(mcs, ptrs, blobs_p);
  768. }
  769. void load_ucode_intel_ap(void)
  770. {
  771. struct ucode_blobs *blobs_p;
  772. unsigned long *ptrs, start = 0;
  773. struct mc_saved_data *mcs;
  774. struct ucode_cpu_info uci;
  775. enum ucode_state ret;
  776. #ifdef CONFIG_X86_32
  777. mcs = (struct mc_saved_data *)__pa_nodebug(&mc_saved_data);
  778. ptrs = (unsigned long *)__pa_nodebug(mc_tmp_ptrs);
  779. blobs_p = (struct ucode_blobs *)__pa_nodebug(&blobs);
  780. #else
  781. mcs = &mc_saved_data;
  782. ptrs = mc_tmp_ptrs;
  783. blobs_p = &blobs;
  784. #endif
  785. /*
  786. * If there is no valid ucode previously saved in memory, no need to
  787. * update ucode on this AP.
  788. */
  789. if (!mcs->num_saved)
  790. return;
  791. if (blobs_p->valid) {
  792. start = blobs_p->start;
  793. /*
  794. * Pay attention to CONFIG_RANDOMIZE_MEMORY=y as it shuffles
  795. * physmem mapping too and there we have the initrd.
  796. */
  797. start += PAGE_OFFSET - __PAGE_OFFSET_BASE;
  798. }
  799. collect_cpu_info_early(&uci);
  800. ret = load_microcode(mcs, ptrs, start, &uci);
  801. if (ret != UCODE_OK)
  802. return;
  803. apply_microcode_early(&uci, true);
  804. }
  805. void reload_ucode_intel(void)
  806. {
  807. struct ucode_cpu_info uci;
  808. enum ucode_state ret;
  809. if (!mc_saved_data.num_saved)
  810. return;
  811. collect_cpu_info_early(&uci);
  812. ret = find_microcode_patch(mc_saved_data.mc_saved,
  813. mc_saved_data.num_saved, &uci);
  814. if (ret != UCODE_OK)
  815. return;
  816. apply_microcode_early(&uci, false);
  817. }
  818. static int collect_cpu_info(int cpu_num, struct cpu_signature *csig)
  819. {
  820. static struct cpu_signature prev;
  821. struct cpuinfo_x86 *c = &cpu_data(cpu_num);
  822. unsigned int val[2];
  823. memset(csig, 0, sizeof(*csig));
  824. csig->sig = cpuid_eax(0x00000001);
  825. if ((c->x86_model >= 5) || (c->x86 > 6)) {
  826. /* get processor flags from MSR 0x17 */
  827. rdmsr(MSR_IA32_PLATFORM_ID, val[0], val[1]);
  828. csig->pf = 1 << ((val[1] >> 18) & 7);
  829. }
  830. csig->rev = c->microcode;
  831. /* No extra locking on prev, races are harmless. */
  832. if (csig->sig != prev.sig || csig->pf != prev.pf || csig->rev != prev.rev) {
  833. pr_info("sig=0x%x, pf=0x%x, revision=0x%x\n",
  834. csig->sig, csig->pf, csig->rev);
  835. prev = *csig;
  836. }
  837. return 0;
  838. }
  839. /*
  840. * return 0 - no update found
  841. * return 1 - found update
  842. */
  843. static int get_matching_mc(struct microcode_intel *mc, int cpu)
  844. {
  845. struct cpu_signature cpu_sig;
  846. unsigned int csig, cpf, crev;
  847. collect_cpu_info(cpu, &cpu_sig);
  848. csig = cpu_sig.sig;
  849. cpf = cpu_sig.pf;
  850. crev = cpu_sig.rev;
  851. return has_newer_microcode(mc, csig, cpf, crev);
  852. }
  853. static int apply_microcode_intel(int cpu)
  854. {
  855. struct microcode_intel *mc;
  856. struct ucode_cpu_info *uci;
  857. struct cpuinfo_x86 *c;
  858. unsigned int val[2];
  859. static int prev_rev;
  860. /* We should bind the task to the CPU */
  861. if (WARN_ON(raw_smp_processor_id() != cpu))
  862. return -1;
  863. uci = ucode_cpu_info + cpu;
  864. mc = uci->mc;
  865. if (!mc)
  866. return 0;
  867. /*
  868. * Microcode on this CPU could be updated earlier. Only apply the
  869. * microcode patch in mc when it is newer than the one on this
  870. * CPU.
  871. */
  872. if (!get_matching_mc(mc, cpu))
  873. return 0;
  874. /* write microcode via MSR 0x79 */
  875. wrmsrl(MSR_IA32_UCODE_WRITE, (unsigned long)mc->bits);
  876. wrmsrl(MSR_IA32_UCODE_REV, 0);
  877. /* As documented in the SDM: Do a CPUID 1 here */
  878. sync_core();
  879. /* get the current revision from MSR 0x8B */
  880. rdmsr(MSR_IA32_UCODE_REV, val[0], val[1]);
  881. if (val[1] != mc->hdr.rev) {
  882. pr_err("CPU%d update to revision 0x%x failed\n",
  883. cpu, mc->hdr.rev);
  884. return -1;
  885. }
  886. if (val[1] != prev_rev) {
  887. pr_info("updated to revision 0x%x, date = %04x-%02x-%02x\n",
  888. val[1],
  889. mc->hdr.date & 0xffff,
  890. mc->hdr.date >> 24,
  891. (mc->hdr.date >> 16) & 0xff);
  892. prev_rev = val[1];
  893. }
  894. c = &cpu_data(cpu);
  895. uci->cpu_sig.rev = val[1];
  896. c->microcode = val[1];
  897. return 0;
  898. }
  899. static enum ucode_state generic_load_microcode(int cpu, void *data, size_t size,
  900. int (*get_ucode_data)(void *, const void *, size_t))
  901. {
  902. struct ucode_cpu_info *uci = ucode_cpu_info + cpu;
  903. u8 *ucode_ptr = data, *new_mc = NULL, *mc = NULL;
  904. int new_rev = uci->cpu_sig.rev;
  905. unsigned int leftover = size;
  906. unsigned int curr_mc_size = 0;
  907. unsigned int csig, cpf;
  908. while (leftover) {
  909. struct microcode_header_intel mc_header;
  910. unsigned int mc_size;
  911. if (leftover < sizeof(mc_header)) {
  912. pr_err("error! Truncated header in microcode data file\n");
  913. break;
  914. }
  915. if (get_ucode_data(&mc_header, ucode_ptr, sizeof(mc_header)))
  916. break;
  917. mc_size = get_totalsize(&mc_header);
  918. if (!mc_size || mc_size > leftover) {
  919. pr_err("error! Bad data in microcode data file\n");
  920. break;
  921. }
  922. /* For performance reasons, reuse mc area when possible */
  923. if (!mc || mc_size > curr_mc_size) {
  924. vfree(mc);
  925. mc = vmalloc(mc_size);
  926. if (!mc)
  927. break;
  928. curr_mc_size = mc_size;
  929. }
  930. if (get_ucode_data(mc, ucode_ptr, mc_size) ||
  931. microcode_sanity_check(mc, 1) < 0) {
  932. break;
  933. }
  934. csig = uci->cpu_sig.sig;
  935. cpf = uci->cpu_sig.pf;
  936. if (has_newer_microcode(mc, csig, cpf, new_rev)) {
  937. vfree(new_mc);
  938. new_rev = mc_header.rev;
  939. new_mc = mc;
  940. mc = NULL; /* trigger new vmalloc */
  941. }
  942. ucode_ptr += mc_size;
  943. leftover -= mc_size;
  944. }
  945. vfree(mc);
  946. if (leftover) {
  947. vfree(new_mc);
  948. return UCODE_ERROR;
  949. }
  950. if (!new_mc)
  951. return UCODE_NFOUND;
  952. vfree(uci->mc);
  953. uci->mc = (struct microcode_intel *)new_mc;
  954. /*
  955. * If early loading microcode is supported, save this mc into
  956. * permanent memory. So it will be loaded early when a CPU is hot added
  957. * or resumes.
  958. */
  959. save_mc_for_early(new_mc);
  960. pr_debug("CPU%d found a matching microcode update with version 0x%x (current=0x%x)\n",
  961. cpu, new_rev, uci->cpu_sig.rev);
  962. return UCODE_OK;
  963. }
  964. static int get_ucode_fw(void *to, const void *from, size_t n)
  965. {
  966. memcpy(to, from, n);
  967. return 0;
  968. }
  969. static enum ucode_state request_microcode_fw(int cpu, struct device *device,
  970. bool refresh_fw)
  971. {
  972. char name[30];
  973. struct cpuinfo_x86 *c = &cpu_data(cpu);
  974. const struct firmware *firmware;
  975. enum ucode_state ret;
  976. sprintf(name, "intel-ucode/%02x-%02x-%02x",
  977. c->x86, c->x86_model, c->x86_mask);
  978. if (request_firmware_direct(&firmware, name, device)) {
  979. pr_debug("data file %s load failed\n", name);
  980. return UCODE_NFOUND;
  981. }
  982. ret = generic_load_microcode(cpu, (void *)firmware->data,
  983. firmware->size, &get_ucode_fw);
  984. release_firmware(firmware);
  985. return ret;
  986. }
  987. static int get_ucode_user(void *to, const void *from, size_t n)
  988. {
  989. return copy_from_user(to, from, n);
  990. }
  991. static enum ucode_state
  992. request_microcode_user(int cpu, const void __user *buf, size_t size)
  993. {
  994. return generic_load_microcode(cpu, (void *)buf, size, &get_ucode_user);
  995. }
  996. static void microcode_fini_cpu(int cpu)
  997. {
  998. struct ucode_cpu_info *uci = ucode_cpu_info + cpu;
  999. vfree(uci->mc);
  1000. uci->mc = NULL;
  1001. }
  1002. static struct microcode_ops microcode_intel_ops = {
  1003. .request_microcode_user = request_microcode_user,
  1004. .request_microcode_fw = request_microcode_fw,
  1005. .collect_cpu_info = collect_cpu_info,
  1006. .apply_microcode = apply_microcode_intel,
  1007. .microcode_fini_cpu = microcode_fini_cpu,
  1008. };
  1009. struct microcode_ops * __init init_intel_microcode(void)
  1010. {
  1011. struct cpuinfo_x86 *c = &boot_cpu_data;
  1012. if (c->x86_vendor != X86_VENDOR_INTEL || c->x86 < 6 ||
  1013. cpu_has(c, X86_FEATURE_IA64)) {
  1014. pr_err("Intel CPU family 0x%x not supported\n", c->x86);
  1015. return NULL;
  1016. }
  1017. return &microcode_intel_ops;
  1018. }