isp.c 61 KB

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  1. /*
  2. * isp.c
  3. *
  4. * TI OMAP3 ISP - Core
  5. *
  6. * Copyright (C) 2006-2010 Nokia Corporation
  7. * Copyright (C) 2007-2009 Texas Instruments, Inc.
  8. *
  9. * Contacts: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
  10. * Sakari Ailus <sakari.ailus@iki.fi>
  11. *
  12. * Contributors:
  13. * Laurent Pinchart <laurent.pinchart@ideasonboard.com>
  14. * Sakari Ailus <sakari.ailus@iki.fi>
  15. * David Cohen <dacohen@gmail.com>
  16. * Stanimir Varbanov <svarbanov@mm-sol.com>
  17. * Vimarsh Zutshi <vimarsh.zutshi@gmail.com>
  18. * Tuukka Toivonen <tuukkat76@gmail.com>
  19. * Sergio Aguirre <saaguirre@ti.com>
  20. * Antti Koskipaa <akoskipa@gmail.com>
  21. * Ivan T. Ivanov <iivanov@mm-sol.com>
  22. * RaniSuneela <r-m@ti.com>
  23. * Atanas Filipov <afilipov@mm-sol.com>
  24. * Gjorgji Rosikopulos <grosikopulos@mm-sol.com>
  25. * Hiroshi DOYU <hiroshi.doyu@nokia.com>
  26. * Nayden Kanchev <nkanchev@mm-sol.com>
  27. * Phil Carmody <ext-phil.2.carmody@nokia.com>
  28. * Artem Bityutskiy <artem.bityutskiy@nokia.com>
  29. * Dominic Curran <dcurran@ti.com>
  30. * Ilkka Myllyperkio <ilkka.myllyperkio@sofica.fi>
  31. * Pallavi Kulkarni <p-kulkarni@ti.com>
  32. * Vaibhav Hiremath <hvaibhav@ti.com>
  33. * Mohit Jalori <mjalori@ti.com>
  34. * Sameer Venkatraman <sameerv@ti.com>
  35. * Senthilvadivu Guruswamy <svadivu@ti.com>
  36. * Thara Gopinath <thara@ti.com>
  37. * Toni Leinonen <toni.leinonen@nokia.com>
  38. * Troy Laramy <t-laramy@ti.com>
  39. *
  40. * This program is free software; you can redistribute it and/or modify
  41. * it under the terms of the GNU General Public License version 2 as
  42. * published by the Free Software Foundation.
  43. *
  44. * This program is distributed in the hope that it will be useful, but
  45. * WITHOUT ANY WARRANTY; without even the implied warranty of
  46. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  47. * General Public License for more details.
  48. *
  49. * You should have received a copy of the GNU General Public License
  50. * along with this program; if not, write to the Free Software
  51. * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
  52. * 02110-1301 USA
  53. */
  54. #include <asm/cacheflush.h>
  55. #include <linux/clk.h>
  56. #include <linux/clkdev.h>
  57. #include <linux/delay.h>
  58. #include <linux/device.h>
  59. #include <linux/dma-mapping.h>
  60. #include <linux/i2c.h>
  61. #include <linux/interrupt.h>
  62. #include <linux/module.h>
  63. #include <linux/omap-iommu.h>
  64. #include <linux/platform_device.h>
  65. #include <linux/regulator/consumer.h>
  66. #include <linux/slab.h>
  67. #include <linux/sched.h>
  68. #include <linux/vmalloc.h>
  69. #include <media/v4l2-common.h>
  70. #include <media/v4l2-device.h>
  71. #include "isp.h"
  72. #include "ispreg.h"
  73. #include "ispccdc.h"
  74. #include "isppreview.h"
  75. #include "ispresizer.h"
  76. #include "ispcsi2.h"
  77. #include "ispccp2.h"
  78. #include "isph3a.h"
  79. #include "isphist.h"
  80. static unsigned int autoidle;
  81. module_param(autoidle, int, 0444);
  82. MODULE_PARM_DESC(autoidle, "Enable OMAP3ISP AUTOIDLE support");
  83. static void isp_save_ctx(struct isp_device *isp);
  84. static void isp_restore_ctx(struct isp_device *isp);
  85. static const struct isp_res_mapping isp_res_maps[] = {
  86. {
  87. .isp_rev = ISP_REVISION_2_0,
  88. .map = 1 << OMAP3_ISP_IOMEM_MAIN |
  89. 1 << OMAP3_ISP_IOMEM_CCP2 |
  90. 1 << OMAP3_ISP_IOMEM_CCDC |
  91. 1 << OMAP3_ISP_IOMEM_HIST |
  92. 1 << OMAP3_ISP_IOMEM_H3A |
  93. 1 << OMAP3_ISP_IOMEM_PREV |
  94. 1 << OMAP3_ISP_IOMEM_RESZ |
  95. 1 << OMAP3_ISP_IOMEM_SBL |
  96. 1 << OMAP3_ISP_IOMEM_CSI2A_REGS1 |
  97. 1 << OMAP3_ISP_IOMEM_CSIPHY2 |
  98. 1 << OMAP3_ISP_IOMEM_343X_CONTROL_CSIRXFE,
  99. },
  100. {
  101. .isp_rev = ISP_REVISION_15_0,
  102. .map = 1 << OMAP3_ISP_IOMEM_MAIN |
  103. 1 << OMAP3_ISP_IOMEM_CCP2 |
  104. 1 << OMAP3_ISP_IOMEM_CCDC |
  105. 1 << OMAP3_ISP_IOMEM_HIST |
  106. 1 << OMAP3_ISP_IOMEM_H3A |
  107. 1 << OMAP3_ISP_IOMEM_PREV |
  108. 1 << OMAP3_ISP_IOMEM_RESZ |
  109. 1 << OMAP3_ISP_IOMEM_SBL |
  110. 1 << OMAP3_ISP_IOMEM_CSI2A_REGS1 |
  111. 1 << OMAP3_ISP_IOMEM_CSIPHY2 |
  112. 1 << OMAP3_ISP_IOMEM_CSI2A_REGS2 |
  113. 1 << OMAP3_ISP_IOMEM_CSI2C_REGS1 |
  114. 1 << OMAP3_ISP_IOMEM_CSIPHY1 |
  115. 1 << OMAP3_ISP_IOMEM_CSI2C_REGS2 |
  116. 1 << OMAP3_ISP_IOMEM_3630_CONTROL_CAMERA_PHY_CTRL,
  117. },
  118. };
  119. /* Structure for saving/restoring ISP module registers */
  120. static struct isp_reg isp_reg_list[] = {
  121. {OMAP3_ISP_IOMEM_MAIN, ISP_SYSCONFIG, 0},
  122. {OMAP3_ISP_IOMEM_MAIN, ISP_CTRL, 0},
  123. {OMAP3_ISP_IOMEM_MAIN, ISP_TCTRL_CTRL, 0},
  124. {0, ISP_TOK_TERM, 0}
  125. };
  126. /*
  127. * omap3isp_flush - Post pending L3 bus writes by doing a register readback
  128. * @isp: OMAP3 ISP device
  129. *
  130. * In order to force posting of pending writes, we need to write and
  131. * readback the same register, in this case the revision register.
  132. *
  133. * See this link for reference:
  134. * http://www.mail-archive.com/linux-omap@vger.kernel.org/msg08149.html
  135. */
  136. void omap3isp_flush(struct isp_device *isp)
  137. {
  138. isp_reg_writel(isp, 0, OMAP3_ISP_IOMEM_MAIN, ISP_REVISION);
  139. isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN, ISP_REVISION);
  140. }
  141. /* -----------------------------------------------------------------------------
  142. * XCLK
  143. */
  144. #define to_isp_xclk(_hw) container_of(_hw, struct isp_xclk, hw)
  145. static void isp_xclk_update(struct isp_xclk *xclk, u32 divider)
  146. {
  147. switch (xclk->id) {
  148. case ISP_XCLK_A:
  149. isp_reg_clr_set(xclk->isp, OMAP3_ISP_IOMEM_MAIN, ISP_TCTRL_CTRL,
  150. ISPTCTRL_CTRL_DIVA_MASK,
  151. divider << ISPTCTRL_CTRL_DIVA_SHIFT);
  152. break;
  153. case ISP_XCLK_B:
  154. isp_reg_clr_set(xclk->isp, OMAP3_ISP_IOMEM_MAIN, ISP_TCTRL_CTRL,
  155. ISPTCTRL_CTRL_DIVB_MASK,
  156. divider << ISPTCTRL_CTRL_DIVB_SHIFT);
  157. break;
  158. }
  159. }
  160. static int isp_xclk_prepare(struct clk_hw *hw)
  161. {
  162. struct isp_xclk *xclk = to_isp_xclk(hw);
  163. omap3isp_get(xclk->isp);
  164. return 0;
  165. }
  166. static void isp_xclk_unprepare(struct clk_hw *hw)
  167. {
  168. struct isp_xclk *xclk = to_isp_xclk(hw);
  169. omap3isp_put(xclk->isp);
  170. }
  171. static int isp_xclk_enable(struct clk_hw *hw)
  172. {
  173. struct isp_xclk *xclk = to_isp_xclk(hw);
  174. unsigned long flags;
  175. spin_lock_irqsave(&xclk->lock, flags);
  176. isp_xclk_update(xclk, xclk->divider);
  177. xclk->enabled = true;
  178. spin_unlock_irqrestore(&xclk->lock, flags);
  179. return 0;
  180. }
  181. static void isp_xclk_disable(struct clk_hw *hw)
  182. {
  183. struct isp_xclk *xclk = to_isp_xclk(hw);
  184. unsigned long flags;
  185. spin_lock_irqsave(&xclk->lock, flags);
  186. isp_xclk_update(xclk, 0);
  187. xclk->enabled = false;
  188. spin_unlock_irqrestore(&xclk->lock, flags);
  189. }
  190. static unsigned long isp_xclk_recalc_rate(struct clk_hw *hw,
  191. unsigned long parent_rate)
  192. {
  193. struct isp_xclk *xclk = to_isp_xclk(hw);
  194. return parent_rate / xclk->divider;
  195. }
  196. static u32 isp_xclk_calc_divider(unsigned long *rate, unsigned long parent_rate)
  197. {
  198. u32 divider;
  199. if (*rate >= parent_rate) {
  200. *rate = parent_rate;
  201. return ISPTCTRL_CTRL_DIV_BYPASS;
  202. }
  203. divider = DIV_ROUND_CLOSEST(parent_rate, *rate);
  204. if (divider >= ISPTCTRL_CTRL_DIV_BYPASS)
  205. divider = ISPTCTRL_CTRL_DIV_BYPASS - 1;
  206. *rate = parent_rate / divider;
  207. return divider;
  208. }
  209. static long isp_xclk_round_rate(struct clk_hw *hw, unsigned long rate,
  210. unsigned long *parent_rate)
  211. {
  212. isp_xclk_calc_divider(&rate, *parent_rate);
  213. return rate;
  214. }
  215. static int isp_xclk_set_rate(struct clk_hw *hw, unsigned long rate,
  216. unsigned long parent_rate)
  217. {
  218. struct isp_xclk *xclk = to_isp_xclk(hw);
  219. unsigned long flags;
  220. u32 divider;
  221. divider = isp_xclk_calc_divider(&rate, parent_rate);
  222. spin_lock_irqsave(&xclk->lock, flags);
  223. xclk->divider = divider;
  224. if (xclk->enabled)
  225. isp_xclk_update(xclk, divider);
  226. spin_unlock_irqrestore(&xclk->lock, flags);
  227. dev_dbg(xclk->isp->dev, "%s: cam_xclk%c set to %lu Hz (div %u)\n",
  228. __func__, xclk->id == ISP_XCLK_A ? 'a' : 'b', rate, divider);
  229. return 0;
  230. }
  231. static const struct clk_ops isp_xclk_ops = {
  232. .prepare = isp_xclk_prepare,
  233. .unprepare = isp_xclk_unprepare,
  234. .enable = isp_xclk_enable,
  235. .disable = isp_xclk_disable,
  236. .recalc_rate = isp_xclk_recalc_rate,
  237. .round_rate = isp_xclk_round_rate,
  238. .set_rate = isp_xclk_set_rate,
  239. };
  240. static const char *isp_xclk_parent_name = "cam_mclk";
  241. static const struct clk_init_data isp_xclk_init_data = {
  242. .name = "cam_xclk",
  243. .ops = &isp_xclk_ops,
  244. .parent_names = &isp_xclk_parent_name,
  245. .num_parents = 1,
  246. };
  247. static int isp_xclk_init(struct isp_device *isp)
  248. {
  249. struct isp_platform_data *pdata = isp->pdata;
  250. struct clk_init_data init;
  251. unsigned int i;
  252. for (i = 0; i < ARRAY_SIZE(isp->xclks); ++i)
  253. isp->xclks[i].clk = ERR_PTR(-EINVAL);
  254. for (i = 0; i < ARRAY_SIZE(isp->xclks); ++i) {
  255. struct isp_xclk *xclk = &isp->xclks[i];
  256. xclk->isp = isp;
  257. xclk->id = i == 0 ? ISP_XCLK_A : ISP_XCLK_B;
  258. xclk->divider = 1;
  259. spin_lock_init(&xclk->lock);
  260. init.name = i == 0 ? "cam_xclka" : "cam_xclkb";
  261. init.ops = &isp_xclk_ops;
  262. init.parent_names = &isp_xclk_parent_name;
  263. init.num_parents = 1;
  264. xclk->hw.init = &init;
  265. /*
  266. * The first argument is NULL in order to avoid circular
  267. * reference, as this driver takes reference on the
  268. * sensor subdevice modules and the sensors would take
  269. * reference on this module through clk_get().
  270. */
  271. xclk->clk = clk_register(NULL, &xclk->hw);
  272. if (IS_ERR(xclk->clk))
  273. return PTR_ERR(xclk->clk);
  274. if (pdata->xclks[i].con_id == NULL &&
  275. pdata->xclks[i].dev_id == NULL)
  276. continue;
  277. xclk->lookup = kzalloc(sizeof(*xclk->lookup), GFP_KERNEL);
  278. if (xclk->lookup == NULL)
  279. return -ENOMEM;
  280. xclk->lookup->con_id = pdata->xclks[i].con_id;
  281. xclk->lookup->dev_id = pdata->xclks[i].dev_id;
  282. xclk->lookup->clk = xclk->clk;
  283. clkdev_add(xclk->lookup);
  284. }
  285. return 0;
  286. }
  287. static void isp_xclk_cleanup(struct isp_device *isp)
  288. {
  289. unsigned int i;
  290. for (i = 0; i < ARRAY_SIZE(isp->xclks); ++i) {
  291. struct isp_xclk *xclk = &isp->xclks[i];
  292. if (!IS_ERR(xclk->clk))
  293. clk_unregister(xclk->clk);
  294. if (xclk->lookup)
  295. clkdev_drop(xclk->lookup);
  296. }
  297. }
  298. /* -----------------------------------------------------------------------------
  299. * Interrupts
  300. */
  301. /*
  302. * isp_enable_interrupts - Enable ISP interrupts.
  303. * @isp: OMAP3 ISP device
  304. */
  305. static void isp_enable_interrupts(struct isp_device *isp)
  306. {
  307. static const u32 irq = IRQ0ENABLE_CSIA_IRQ
  308. | IRQ0ENABLE_CSIB_IRQ
  309. | IRQ0ENABLE_CCDC_LSC_PREF_ERR_IRQ
  310. | IRQ0ENABLE_CCDC_LSC_DONE_IRQ
  311. | IRQ0ENABLE_CCDC_VD0_IRQ
  312. | IRQ0ENABLE_CCDC_VD1_IRQ
  313. | IRQ0ENABLE_HS_VS_IRQ
  314. | IRQ0ENABLE_HIST_DONE_IRQ
  315. | IRQ0ENABLE_H3A_AWB_DONE_IRQ
  316. | IRQ0ENABLE_H3A_AF_DONE_IRQ
  317. | IRQ0ENABLE_PRV_DONE_IRQ
  318. | IRQ0ENABLE_RSZ_DONE_IRQ;
  319. isp_reg_writel(isp, irq, OMAP3_ISP_IOMEM_MAIN, ISP_IRQ0STATUS);
  320. isp_reg_writel(isp, irq, OMAP3_ISP_IOMEM_MAIN, ISP_IRQ0ENABLE);
  321. }
  322. /*
  323. * isp_disable_interrupts - Disable ISP interrupts.
  324. * @isp: OMAP3 ISP device
  325. */
  326. static void isp_disable_interrupts(struct isp_device *isp)
  327. {
  328. isp_reg_writel(isp, 0, OMAP3_ISP_IOMEM_MAIN, ISP_IRQ0ENABLE);
  329. }
  330. /*
  331. * isp_core_init - ISP core settings
  332. * @isp: OMAP3 ISP device
  333. * @idle: Consider idle state.
  334. *
  335. * Set the power settings for the ISP and SBL bus and cConfigure the HS/VS
  336. * interrupt source.
  337. *
  338. * We need to configure the HS/VS interrupt source before interrupts get
  339. * enabled, as the sensor might be free-running and the ISP default setting
  340. * (HS edge) would put an unnecessary burden on the CPU.
  341. */
  342. static void isp_core_init(struct isp_device *isp, int idle)
  343. {
  344. isp_reg_writel(isp,
  345. ((idle ? ISP_SYSCONFIG_MIDLEMODE_SMARTSTANDBY :
  346. ISP_SYSCONFIG_MIDLEMODE_FORCESTANDBY) <<
  347. ISP_SYSCONFIG_MIDLEMODE_SHIFT) |
  348. ((isp->revision == ISP_REVISION_15_0) ?
  349. ISP_SYSCONFIG_AUTOIDLE : 0),
  350. OMAP3_ISP_IOMEM_MAIN, ISP_SYSCONFIG);
  351. isp_reg_writel(isp,
  352. (isp->autoidle ? ISPCTRL_SBL_AUTOIDLE : 0) |
  353. ISPCTRL_SYNC_DETECT_VSRISE,
  354. OMAP3_ISP_IOMEM_MAIN, ISP_CTRL);
  355. }
  356. /*
  357. * Configure the bridge and lane shifter. Valid inputs are
  358. *
  359. * CCDC_INPUT_PARALLEL: Parallel interface
  360. * CCDC_INPUT_CSI2A: CSI2a receiver
  361. * CCDC_INPUT_CCP2B: CCP2b receiver
  362. * CCDC_INPUT_CSI2C: CSI2c receiver
  363. *
  364. * The bridge and lane shifter are configured according to the selected input
  365. * and the ISP platform data.
  366. */
  367. void omap3isp_configure_bridge(struct isp_device *isp,
  368. enum ccdc_input_entity input,
  369. const struct isp_parallel_platform_data *pdata,
  370. unsigned int shift, unsigned int bridge)
  371. {
  372. u32 ispctrl_val;
  373. ispctrl_val = isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN, ISP_CTRL);
  374. ispctrl_val &= ~ISPCTRL_SHIFT_MASK;
  375. ispctrl_val &= ~ISPCTRL_PAR_CLK_POL_INV;
  376. ispctrl_val &= ~ISPCTRL_PAR_SER_CLK_SEL_MASK;
  377. ispctrl_val &= ~ISPCTRL_PAR_BRIDGE_MASK;
  378. ispctrl_val |= bridge;
  379. switch (input) {
  380. case CCDC_INPUT_PARALLEL:
  381. ispctrl_val |= ISPCTRL_PAR_SER_CLK_SEL_PARALLEL;
  382. ispctrl_val |= pdata->clk_pol << ISPCTRL_PAR_CLK_POL_SHIFT;
  383. shift += pdata->data_lane_shift * 2;
  384. break;
  385. case CCDC_INPUT_CSI2A:
  386. ispctrl_val |= ISPCTRL_PAR_SER_CLK_SEL_CSIA;
  387. break;
  388. case CCDC_INPUT_CCP2B:
  389. ispctrl_val |= ISPCTRL_PAR_SER_CLK_SEL_CSIB;
  390. break;
  391. case CCDC_INPUT_CSI2C:
  392. ispctrl_val |= ISPCTRL_PAR_SER_CLK_SEL_CSIC;
  393. break;
  394. default:
  395. return;
  396. }
  397. ispctrl_val |= ((shift/2) << ISPCTRL_SHIFT_SHIFT) & ISPCTRL_SHIFT_MASK;
  398. isp_reg_writel(isp, ispctrl_val, OMAP3_ISP_IOMEM_MAIN, ISP_CTRL);
  399. }
  400. void omap3isp_hist_dma_done(struct isp_device *isp)
  401. {
  402. if (omap3isp_ccdc_busy(&isp->isp_ccdc) ||
  403. omap3isp_stat_pcr_busy(&isp->isp_hist)) {
  404. /* Histogram cannot be enabled in this frame anymore */
  405. atomic_set(&isp->isp_hist.buf_err, 1);
  406. dev_dbg(isp->dev, "hist: Out of synchronization with "
  407. "CCDC. Ignoring next buffer.\n");
  408. }
  409. }
  410. static inline void isp_isr_dbg(struct isp_device *isp, u32 irqstatus)
  411. {
  412. static const char *name[] = {
  413. "CSIA_IRQ",
  414. "res1",
  415. "res2",
  416. "CSIB_LCM_IRQ",
  417. "CSIB_IRQ",
  418. "res5",
  419. "res6",
  420. "res7",
  421. "CCDC_VD0_IRQ",
  422. "CCDC_VD1_IRQ",
  423. "CCDC_VD2_IRQ",
  424. "CCDC_ERR_IRQ",
  425. "H3A_AF_DONE_IRQ",
  426. "H3A_AWB_DONE_IRQ",
  427. "res14",
  428. "res15",
  429. "HIST_DONE_IRQ",
  430. "CCDC_LSC_DONE",
  431. "CCDC_LSC_PREFETCH_COMPLETED",
  432. "CCDC_LSC_PREFETCH_ERROR",
  433. "PRV_DONE_IRQ",
  434. "CBUFF_IRQ",
  435. "res22",
  436. "res23",
  437. "RSZ_DONE_IRQ",
  438. "OVF_IRQ",
  439. "res26",
  440. "res27",
  441. "MMU_ERR_IRQ",
  442. "OCP_ERR_IRQ",
  443. "SEC_ERR_IRQ",
  444. "HS_VS_IRQ",
  445. };
  446. int i;
  447. dev_dbg(isp->dev, "ISP IRQ: ");
  448. for (i = 0; i < ARRAY_SIZE(name); i++) {
  449. if ((1 << i) & irqstatus)
  450. printk(KERN_CONT "%s ", name[i]);
  451. }
  452. printk(KERN_CONT "\n");
  453. }
  454. static void isp_isr_sbl(struct isp_device *isp)
  455. {
  456. struct device *dev = isp->dev;
  457. struct isp_pipeline *pipe;
  458. u32 sbl_pcr;
  459. /*
  460. * Handle shared buffer logic overflows for video buffers.
  461. * ISPSBL_PCR_CCDCPRV_2_RSZ_OVF can be safely ignored.
  462. */
  463. sbl_pcr = isp_reg_readl(isp, OMAP3_ISP_IOMEM_SBL, ISPSBL_PCR);
  464. isp_reg_writel(isp, sbl_pcr, OMAP3_ISP_IOMEM_SBL, ISPSBL_PCR);
  465. sbl_pcr &= ~ISPSBL_PCR_CCDCPRV_2_RSZ_OVF;
  466. if (sbl_pcr)
  467. dev_dbg(dev, "SBL overflow (PCR = 0x%08x)\n", sbl_pcr);
  468. if (sbl_pcr & ISPSBL_PCR_CSIB_WBL_OVF) {
  469. pipe = to_isp_pipeline(&isp->isp_ccp2.subdev.entity);
  470. if (pipe != NULL)
  471. pipe->error = true;
  472. }
  473. if (sbl_pcr & ISPSBL_PCR_CSIA_WBL_OVF) {
  474. pipe = to_isp_pipeline(&isp->isp_csi2a.subdev.entity);
  475. if (pipe != NULL)
  476. pipe->error = true;
  477. }
  478. if (sbl_pcr & ISPSBL_PCR_CCDC_WBL_OVF) {
  479. pipe = to_isp_pipeline(&isp->isp_ccdc.subdev.entity);
  480. if (pipe != NULL)
  481. pipe->error = true;
  482. }
  483. if (sbl_pcr & ISPSBL_PCR_PRV_WBL_OVF) {
  484. pipe = to_isp_pipeline(&isp->isp_prev.subdev.entity);
  485. if (pipe != NULL)
  486. pipe->error = true;
  487. }
  488. if (sbl_pcr & (ISPSBL_PCR_RSZ1_WBL_OVF
  489. | ISPSBL_PCR_RSZ2_WBL_OVF
  490. | ISPSBL_PCR_RSZ3_WBL_OVF
  491. | ISPSBL_PCR_RSZ4_WBL_OVF)) {
  492. pipe = to_isp_pipeline(&isp->isp_res.subdev.entity);
  493. if (pipe != NULL)
  494. pipe->error = true;
  495. }
  496. if (sbl_pcr & ISPSBL_PCR_H3A_AF_WBL_OVF)
  497. omap3isp_stat_sbl_overflow(&isp->isp_af);
  498. if (sbl_pcr & ISPSBL_PCR_H3A_AEAWB_WBL_OVF)
  499. omap3isp_stat_sbl_overflow(&isp->isp_aewb);
  500. }
  501. /*
  502. * isp_isr - Interrupt Service Routine for Camera ISP module.
  503. * @irq: Not used currently.
  504. * @_isp: Pointer to the OMAP3 ISP device
  505. *
  506. * Handles the corresponding callback if plugged in.
  507. *
  508. * Returns IRQ_HANDLED when IRQ was correctly handled, or IRQ_NONE when the
  509. * IRQ wasn't handled.
  510. */
  511. static irqreturn_t isp_isr(int irq, void *_isp)
  512. {
  513. static const u32 ccdc_events = IRQ0STATUS_CCDC_LSC_PREF_ERR_IRQ |
  514. IRQ0STATUS_CCDC_LSC_DONE_IRQ |
  515. IRQ0STATUS_CCDC_VD0_IRQ |
  516. IRQ0STATUS_CCDC_VD1_IRQ |
  517. IRQ0STATUS_HS_VS_IRQ;
  518. struct isp_device *isp = _isp;
  519. u32 irqstatus;
  520. irqstatus = isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN, ISP_IRQ0STATUS);
  521. isp_reg_writel(isp, irqstatus, OMAP3_ISP_IOMEM_MAIN, ISP_IRQ0STATUS);
  522. isp_isr_sbl(isp);
  523. if (irqstatus & IRQ0STATUS_CSIA_IRQ)
  524. omap3isp_csi2_isr(&isp->isp_csi2a);
  525. if (irqstatus & IRQ0STATUS_CSIB_IRQ)
  526. omap3isp_ccp2_isr(&isp->isp_ccp2);
  527. if (irqstatus & IRQ0STATUS_CCDC_VD0_IRQ) {
  528. if (isp->isp_ccdc.output & CCDC_OUTPUT_PREVIEW)
  529. omap3isp_preview_isr_frame_sync(&isp->isp_prev);
  530. if (isp->isp_ccdc.output & CCDC_OUTPUT_RESIZER)
  531. omap3isp_resizer_isr_frame_sync(&isp->isp_res);
  532. omap3isp_stat_isr_frame_sync(&isp->isp_aewb);
  533. omap3isp_stat_isr_frame_sync(&isp->isp_af);
  534. omap3isp_stat_isr_frame_sync(&isp->isp_hist);
  535. }
  536. if (irqstatus & ccdc_events)
  537. omap3isp_ccdc_isr(&isp->isp_ccdc, irqstatus & ccdc_events);
  538. if (irqstatus & IRQ0STATUS_PRV_DONE_IRQ) {
  539. if (isp->isp_prev.output & PREVIEW_OUTPUT_RESIZER)
  540. omap3isp_resizer_isr_frame_sync(&isp->isp_res);
  541. omap3isp_preview_isr(&isp->isp_prev);
  542. }
  543. if (irqstatus & IRQ0STATUS_RSZ_DONE_IRQ)
  544. omap3isp_resizer_isr(&isp->isp_res);
  545. if (irqstatus & IRQ0STATUS_H3A_AWB_DONE_IRQ)
  546. omap3isp_stat_isr(&isp->isp_aewb);
  547. if (irqstatus & IRQ0STATUS_H3A_AF_DONE_IRQ)
  548. omap3isp_stat_isr(&isp->isp_af);
  549. if (irqstatus & IRQ0STATUS_HIST_DONE_IRQ)
  550. omap3isp_stat_isr(&isp->isp_hist);
  551. omap3isp_flush(isp);
  552. #if defined(DEBUG) && defined(ISP_ISR_DEBUG)
  553. isp_isr_dbg(isp, irqstatus);
  554. #endif
  555. return IRQ_HANDLED;
  556. }
  557. /* -----------------------------------------------------------------------------
  558. * Pipeline power management
  559. *
  560. * Entities must be powered up when part of a pipeline that contains at least
  561. * one open video device node.
  562. *
  563. * To achieve this use the entity use_count field to track the number of users.
  564. * For entities corresponding to video device nodes the use_count field stores
  565. * the users count of the node. For entities corresponding to subdevs the
  566. * use_count field stores the total number of users of all video device nodes
  567. * in the pipeline.
  568. *
  569. * The omap3isp_pipeline_pm_use() function must be called in the open() and
  570. * close() handlers of video device nodes. It increments or decrements the use
  571. * count of all subdev entities in the pipeline.
  572. *
  573. * To react to link management on powered pipelines, the link setup notification
  574. * callback updates the use count of all entities in the source and sink sides
  575. * of the link.
  576. */
  577. /*
  578. * isp_pipeline_pm_use_count - Count the number of users of a pipeline
  579. * @entity: The entity
  580. *
  581. * Return the total number of users of all video device nodes in the pipeline.
  582. */
  583. static int isp_pipeline_pm_use_count(struct media_entity *entity)
  584. {
  585. struct media_entity_graph graph;
  586. int use = 0;
  587. media_entity_graph_walk_start(&graph, entity);
  588. while ((entity = media_entity_graph_walk_next(&graph))) {
  589. if (media_entity_type(entity) == MEDIA_ENT_T_DEVNODE)
  590. use += entity->use_count;
  591. }
  592. return use;
  593. }
  594. /*
  595. * isp_pipeline_pm_power_one - Apply power change to an entity
  596. * @entity: The entity
  597. * @change: Use count change
  598. *
  599. * Change the entity use count by @change. If the entity is a subdev update its
  600. * power state by calling the core::s_power operation when the use count goes
  601. * from 0 to != 0 or from != 0 to 0.
  602. *
  603. * Return 0 on success or a negative error code on failure.
  604. */
  605. static int isp_pipeline_pm_power_one(struct media_entity *entity, int change)
  606. {
  607. struct v4l2_subdev *subdev;
  608. int ret;
  609. subdev = media_entity_type(entity) == MEDIA_ENT_T_V4L2_SUBDEV
  610. ? media_entity_to_v4l2_subdev(entity) : NULL;
  611. if (entity->use_count == 0 && change > 0 && subdev != NULL) {
  612. ret = v4l2_subdev_call(subdev, core, s_power, 1);
  613. if (ret < 0 && ret != -ENOIOCTLCMD)
  614. return ret;
  615. }
  616. entity->use_count += change;
  617. WARN_ON(entity->use_count < 0);
  618. if (entity->use_count == 0 && change < 0 && subdev != NULL)
  619. v4l2_subdev_call(subdev, core, s_power, 0);
  620. return 0;
  621. }
  622. /*
  623. * isp_pipeline_pm_power - Apply power change to all entities in a pipeline
  624. * @entity: The entity
  625. * @change: Use count change
  626. *
  627. * Walk the pipeline to update the use count and the power state of all non-node
  628. * entities.
  629. *
  630. * Return 0 on success or a negative error code on failure.
  631. */
  632. static int isp_pipeline_pm_power(struct media_entity *entity, int change)
  633. {
  634. struct media_entity_graph graph;
  635. struct media_entity *first = entity;
  636. int ret = 0;
  637. if (!change)
  638. return 0;
  639. media_entity_graph_walk_start(&graph, entity);
  640. while (!ret && (entity = media_entity_graph_walk_next(&graph)))
  641. if (media_entity_type(entity) != MEDIA_ENT_T_DEVNODE)
  642. ret = isp_pipeline_pm_power_one(entity, change);
  643. if (!ret)
  644. return 0;
  645. media_entity_graph_walk_start(&graph, first);
  646. while ((first = media_entity_graph_walk_next(&graph))
  647. && first != entity)
  648. if (media_entity_type(first) != MEDIA_ENT_T_DEVNODE)
  649. isp_pipeline_pm_power_one(first, -change);
  650. return ret;
  651. }
  652. /*
  653. * omap3isp_pipeline_pm_use - Update the use count of an entity
  654. * @entity: The entity
  655. * @use: Use (1) or stop using (0) the entity
  656. *
  657. * Update the use count of all entities in the pipeline and power entities on or
  658. * off accordingly.
  659. *
  660. * Return 0 on success or a negative error code on failure. Powering entities
  661. * off is assumed to never fail. No failure can occur when the use parameter is
  662. * set to 0.
  663. */
  664. int omap3isp_pipeline_pm_use(struct media_entity *entity, int use)
  665. {
  666. int change = use ? 1 : -1;
  667. int ret;
  668. mutex_lock(&entity->parent->graph_mutex);
  669. /* Apply use count to node. */
  670. entity->use_count += change;
  671. WARN_ON(entity->use_count < 0);
  672. /* Apply power change to connected non-nodes. */
  673. ret = isp_pipeline_pm_power(entity, change);
  674. if (ret < 0)
  675. entity->use_count -= change;
  676. mutex_unlock(&entity->parent->graph_mutex);
  677. return ret;
  678. }
  679. /*
  680. * isp_pipeline_link_notify - Link management notification callback
  681. * @link: The link
  682. * @flags: New link flags that will be applied
  683. * @notification: The link's state change notification type (MEDIA_DEV_NOTIFY_*)
  684. *
  685. * React to link management on powered pipelines by updating the use count of
  686. * all entities in the source and sink sides of the link. Entities are powered
  687. * on or off accordingly.
  688. *
  689. * Return 0 on success or a negative error code on failure. Powering entities
  690. * off is assumed to never fail. This function will not fail for disconnection
  691. * events.
  692. */
  693. static int isp_pipeline_link_notify(struct media_link *link, u32 flags,
  694. unsigned int notification)
  695. {
  696. struct media_entity *source = link->source->entity;
  697. struct media_entity *sink = link->sink->entity;
  698. int source_use = isp_pipeline_pm_use_count(source);
  699. int sink_use = isp_pipeline_pm_use_count(sink);
  700. int ret;
  701. if (notification == MEDIA_DEV_NOTIFY_POST_LINK_CH &&
  702. !(link->flags & MEDIA_LNK_FL_ENABLED)) {
  703. /* Powering off entities is assumed to never fail. */
  704. isp_pipeline_pm_power(source, -sink_use);
  705. isp_pipeline_pm_power(sink, -source_use);
  706. return 0;
  707. }
  708. if (notification == MEDIA_DEV_NOTIFY_POST_LINK_CH &&
  709. (flags & MEDIA_LNK_FL_ENABLED)) {
  710. ret = isp_pipeline_pm_power(source, sink_use);
  711. if (ret < 0)
  712. return ret;
  713. ret = isp_pipeline_pm_power(sink, source_use);
  714. if (ret < 0)
  715. isp_pipeline_pm_power(source, -sink_use);
  716. return ret;
  717. }
  718. return 0;
  719. }
  720. /* -----------------------------------------------------------------------------
  721. * Pipeline stream management
  722. */
  723. /*
  724. * isp_pipeline_enable - Enable streaming on a pipeline
  725. * @pipe: ISP pipeline
  726. * @mode: Stream mode (single shot or continuous)
  727. *
  728. * Walk the entities chain starting at the pipeline output video node and start
  729. * all modules in the chain in the given mode.
  730. *
  731. * Return 0 if successful, or the return value of the failed video::s_stream
  732. * operation otherwise.
  733. */
  734. static int isp_pipeline_enable(struct isp_pipeline *pipe,
  735. enum isp_pipeline_stream_state mode)
  736. {
  737. struct isp_device *isp = pipe->output->isp;
  738. struct media_entity *entity;
  739. struct media_pad *pad;
  740. struct v4l2_subdev *subdev;
  741. unsigned long flags;
  742. int ret;
  743. /* If the preview engine crashed it might not respond to read/write
  744. * operations on the L4 bus. This would result in a bus fault and a
  745. * kernel oops. Refuse to start streaming in that case. This check must
  746. * be performed before the loop below to avoid starting entities if the
  747. * pipeline won't start anyway (those entities would then likely fail to
  748. * stop, making the problem worse).
  749. */
  750. if ((pipe->entities & isp->crashed) &
  751. (1U << isp->isp_prev.subdev.entity.id))
  752. return -EIO;
  753. spin_lock_irqsave(&pipe->lock, flags);
  754. pipe->state &= ~(ISP_PIPELINE_IDLE_INPUT | ISP_PIPELINE_IDLE_OUTPUT);
  755. spin_unlock_irqrestore(&pipe->lock, flags);
  756. pipe->do_propagation = false;
  757. entity = &pipe->output->video.entity;
  758. while (1) {
  759. pad = &entity->pads[0];
  760. if (!(pad->flags & MEDIA_PAD_FL_SINK))
  761. break;
  762. pad = media_entity_remote_pad(pad);
  763. if (pad == NULL ||
  764. media_entity_type(pad->entity) != MEDIA_ENT_T_V4L2_SUBDEV)
  765. break;
  766. entity = pad->entity;
  767. subdev = media_entity_to_v4l2_subdev(entity);
  768. ret = v4l2_subdev_call(subdev, video, s_stream, mode);
  769. if (ret < 0 && ret != -ENOIOCTLCMD)
  770. return ret;
  771. if (subdev == &isp->isp_ccdc.subdev) {
  772. v4l2_subdev_call(&isp->isp_aewb.subdev, video,
  773. s_stream, mode);
  774. v4l2_subdev_call(&isp->isp_af.subdev, video,
  775. s_stream, mode);
  776. v4l2_subdev_call(&isp->isp_hist.subdev, video,
  777. s_stream, mode);
  778. pipe->do_propagation = true;
  779. }
  780. }
  781. return 0;
  782. }
  783. static int isp_pipeline_wait_resizer(struct isp_device *isp)
  784. {
  785. return omap3isp_resizer_busy(&isp->isp_res);
  786. }
  787. static int isp_pipeline_wait_preview(struct isp_device *isp)
  788. {
  789. return omap3isp_preview_busy(&isp->isp_prev);
  790. }
  791. static int isp_pipeline_wait_ccdc(struct isp_device *isp)
  792. {
  793. return omap3isp_stat_busy(&isp->isp_af)
  794. || omap3isp_stat_busy(&isp->isp_aewb)
  795. || omap3isp_stat_busy(&isp->isp_hist)
  796. || omap3isp_ccdc_busy(&isp->isp_ccdc);
  797. }
  798. #define ISP_STOP_TIMEOUT msecs_to_jiffies(1000)
  799. static int isp_pipeline_wait(struct isp_device *isp,
  800. int(*busy)(struct isp_device *isp))
  801. {
  802. unsigned long timeout = jiffies + ISP_STOP_TIMEOUT;
  803. while (!time_after(jiffies, timeout)) {
  804. if (!busy(isp))
  805. return 0;
  806. }
  807. return 1;
  808. }
  809. /*
  810. * isp_pipeline_disable - Disable streaming on a pipeline
  811. * @pipe: ISP pipeline
  812. *
  813. * Walk the entities chain starting at the pipeline output video node and stop
  814. * all modules in the chain. Wait synchronously for the modules to be stopped if
  815. * necessary.
  816. *
  817. * Return 0 if all modules have been properly stopped, or -ETIMEDOUT if a module
  818. * can't be stopped (in which case a software reset of the ISP is probably
  819. * necessary).
  820. */
  821. static int isp_pipeline_disable(struct isp_pipeline *pipe)
  822. {
  823. struct isp_device *isp = pipe->output->isp;
  824. struct media_entity *entity;
  825. struct media_pad *pad;
  826. struct v4l2_subdev *subdev;
  827. int failure = 0;
  828. int ret;
  829. /*
  830. * We need to stop all the modules after CCDC first or they'll
  831. * never stop since they may not get a full frame from CCDC.
  832. */
  833. entity = &pipe->output->video.entity;
  834. while (1) {
  835. pad = &entity->pads[0];
  836. if (!(pad->flags & MEDIA_PAD_FL_SINK))
  837. break;
  838. pad = media_entity_remote_pad(pad);
  839. if (pad == NULL ||
  840. media_entity_type(pad->entity) != MEDIA_ENT_T_V4L2_SUBDEV)
  841. break;
  842. entity = pad->entity;
  843. subdev = media_entity_to_v4l2_subdev(entity);
  844. if (subdev == &isp->isp_ccdc.subdev) {
  845. v4l2_subdev_call(&isp->isp_aewb.subdev,
  846. video, s_stream, 0);
  847. v4l2_subdev_call(&isp->isp_af.subdev,
  848. video, s_stream, 0);
  849. v4l2_subdev_call(&isp->isp_hist.subdev,
  850. video, s_stream, 0);
  851. }
  852. v4l2_subdev_call(subdev, video, s_stream, 0);
  853. if (subdev == &isp->isp_res.subdev)
  854. ret = isp_pipeline_wait(isp, isp_pipeline_wait_resizer);
  855. else if (subdev == &isp->isp_prev.subdev)
  856. ret = isp_pipeline_wait(isp, isp_pipeline_wait_preview);
  857. else if (subdev == &isp->isp_ccdc.subdev)
  858. ret = isp_pipeline_wait(isp, isp_pipeline_wait_ccdc);
  859. else
  860. ret = 0;
  861. if (ret) {
  862. dev_info(isp->dev, "Unable to stop %s\n", subdev->name);
  863. /* If the entity failed to stopped, assume it has
  864. * crashed. Mark it as such, the ISP will be reset when
  865. * applications will release it.
  866. */
  867. isp->crashed |= 1U << subdev->entity.id;
  868. failure = -ETIMEDOUT;
  869. }
  870. }
  871. return failure;
  872. }
  873. /*
  874. * omap3isp_pipeline_set_stream - Enable/disable streaming on a pipeline
  875. * @pipe: ISP pipeline
  876. * @state: Stream state (stopped, single shot or continuous)
  877. *
  878. * Set the pipeline to the given stream state. Pipelines can be started in
  879. * single-shot or continuous mode.
  880. *
  881. * Return 0 if successful, or the return value of the failed video::s_stream
  882. * operation otherwise. The pipeline state is not updated when the operation
  883. * fails, except when stopping the pipeline.
  884. */
  885. int omap3isp_pipeline_set_stream(struct isp_pipeline *pipe,
  886. enum isp_pipeline_stream_state state)
  887. {
  888. int ret;
  889. if (state == ISP_PIPELINE_STREAM_STOPPED)
  890. ret = isp_pipeline_disable(pipe);
  891. else
  892. ret = isp_pipeline_enable(pipe, state);
  893. if (ret == 0 || state == ISP_PIPELINE_STREAM_STOPPED)
  894. pipe->stream_state = state;
  895. return ret;
  896. }
  897. /*
  898. * isp_pipeline_resume - Resume streaming on a pipeline
  899. * @pipe: ISP pipeline
  900. *
  901. * Resume video output and input and re-enable pipeline.
  902. */
  903. static void isp_pipeline_resume(struct isp_pipeline *pipe)
  904. {
  905. int singleshot = pipe->stream_state == ISP_PIPELINE_STREAM_SINGLESHOT;
  906. omap3isp_video_resume(pipe->output, !singleshot);
  907. if (singleshot)
  908. omap3isp_video_resume(pipe->input, 0);
  909. isp_pipeline_enable(pipe, pipe->stream_state);
  910. }
  911. /*
  912. * isp_pipeline_suspend - Suspend streaming on a pipeline
  913. * @pipe: ISP pipeline
  914. *
  915. * Suspend pipeline.
  916. */
  917. static void isp_pipeline_suspend(struct isp_pipeline *pipe)
  918. {
  919. isp_pipeline_disable(pipe);
  920. }
  921. /*
  922. * isp_pipeline_is_last - Verify if entity has an enabled link to the output
  923. * video node
  924. * @me: ISP module's media entity
  925. *
  926. * Returns 1 if the entity has an enabled link to the output video node or 0
  927. * otherwise. It's true only while pipeline can have no more than one output
  928. * node.
  929. */
  930. static int isp_pipeline_is_last(struct media_entity *me)
  931. {
  932. struct isp_pipeline *pipe;
  933. struct media_pad *pad;
  934. if (!me->pipe)
  935. return 0;
  936. pipe = to_isp_pipeline(me);
  937. if (pipe->stream_state == ISP_PIPELINE_STREAM_STOPPED)
  938. return 0;
  939. pad = media_entity_remote_pad(&pipe->output->pad);
  940. return pad->entity == me;
  941. }
  942. /*
  943. * isp_suspend_module_pipeline - Suspend pipeline to which belongs the module
  944. * @me: ISP module's media entity
  945. *
  946. * Suspend the whole pipeline if module's entity has an enabled link to the
  947. * output video node. It works only while pipeline can have no more than one
  948. * output node.
  949. */
  950. static void isp_suspend_module_pipeline(struct media_entity *me)
  951. {
  952. if (isp_pipeline_is_last(me))
  953. isp_pipeline_suspend(to_isp_pipeline(me));
  954. }
  955. /*
  956. * isp_resume_module_pipeline - Resume pipeline to which belongs the module
  957. * @me: ISP module's media entity
  958. *
  959. * Resume the whole pipeline if module's entity has an enabled link to the
  960. * output video node. It works only while pipeline can have no more than one
  961. * output node.
  962. */
  963. static void isp_resume_module_pipeline(struct media_entity *me)
  964. {
  965. if (isp_pipeline_is_last(me))
  966. isp_pipeline_resume(to_isp_pipeline(me));
  967. }
  968. /*
  969. * isp_suspend_modules - Suspend ISP submodules.
  970. * @isp: OMAP3 ISP device
  971. *
  972. * Returns 0 if suspend left in idle state all the submodules properly,
  973. * or returns 1 if a general Reset is required to suspend the submodules.
  974. */
  975. static int isp_suspend_modules(struct isp_device *isp)
  976. {
  977. unsigned long timeout;
  978. omap3isp_stat_suspend(&isp->isp_aewb);
  979. omap3isp_stat_suspend(&isp->isp_af);
  980. omap3isp_stat_suspend(&isp->isp_hist);
  981. isp_suspend_module_pipeline(&isp->isp_res.subdev.entity);
  982. isp_suspend_module_pipeline(&isp->isp_prev.subdev.entity);
  983. isp_suspend_module_pipeline(&isp->isp_ccdc.subdev.entity);
  984. isp_suspend_module_pipeline(&isp->isp_csi2a.subdev.entity);
  985. isp_suspend_module_pipeline(&isp->isp_ccp2.subdev.entity);
  986. timeout = jiffies + ISP_STOP_TIMEOUT;
  987. while (omap3isp_stat_busy(&isp->isp_af)
  988. || omap3isp_stat_busy(&isp->isp_aewb)
  989. || omap3isp_stat_busy(&isp->isp_hist)
  990. || omap3isp_preview_busy(&isp->isp_prev)
  991. || omap3isp_resizer_busy(&isp->isp_res)
  992. || omap3isp_ccdc_busy(&isp->isp_ccdc)) {
  993. if (time_after(jiffies, timeout)) {
  994. dev_info(isp->dev, "can't stop modules.\n");
  995. return 1;
  996. }
  997. msleep(1);
  998. }
  999. return 0;
  1000. }
  1001. /*
  1002. * isp_resume_modules - Resume ISP submodules.
  1003. * @isp: OMAP3 ISP device
  1004. */
  1005. static void isp_resume_modules(struct isp_device *isp)
  1006. {
  1007. omap3isp_stat_resume(&isp->isp_aewb);
  1008. omap3isp_stat_resume(&isp->isp_af);
  1009. omap3isp_stat_resume(&isp->isp_hist);
  1010. isp_resume_module_pipeline(&isp->isp_res.subdev.entity);
  1011. isp_resume_module_pipeline(&isp->isp_prev.subdev.entity);
  1012. isp_resume_module_pipeline(&isp->isp_ccdc.subdev.entity);
  1013. isp_resume_module_pipeline(&isp->isp_csi2a.subdev.entity);
  1014. isp_resume_module_pipeline(&isp->isp_ccp2.subdev.entity);
  1015. }
  1016. /*
  1017. * isp_reset - Reset ISP with a timeout wait for idle.
  1018. * @isp: OMAP3 ISP device
  1019. */
  1020. static int isp_reset(struct isp_device *isp)
  1021. {
  1022. unsigned long timeout = 0;
  1023. isp_reg_writel(isp,
  1024. isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN, ISP_SYSCONFIG)
  1025. | ISP_SYSCONFIG_SOFTRESET,
  1026. OMAP3_ISP_IOMEM_MAIN, ISP_SYSCONFIG);
  1027. while (!(isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN,
  1028. ISP_SYSSTATUS) & 0x1)) {
  1029. if (timeout++ > 10000) {
  1030. dev_alert(isp->dev, "cannot reset ISP\n");
  1031. return -ETIMEDOUT;
  1032. }
  1033. udelay(1);
  1034. }
  1035. isp->crashed = 0;
  1036. return 0;
  1037. }
  1038. /*
  1039. * isp_save_context - Saves the values of the ISP module registers.
  1040. * @isp: OMAP3 ISP device
  1041. * @reg_list: Structure containing pairs of register address and value to
  1042. * modify on OMAP.
  1043. */
  1044. static void
  1045. isp_save_context(struct isp_device *isp, struct isp_reg *reg_list)
  1046. {
  1047. struct isp_reg *next = reg_list;
  1048. for (; next->reg != ISP_TOK_TERM; next++)
  1049. next->val = isp_reg_readl(isp, next->mmio_range, next->reg);
  1050. }
  1051. /*
  1052. * isp_restore_context - Restores the values of the ISP module registers.
  1053. * @isp: OMAP3 ISP device
  1054. * @reg_list: Structure containing pairs of register address and value to
  1055. * modify on OMAP.
  1056. */
  1057. static void
  1058. isp_restore_context(struct isp_device *isp, struct isp_reg *reg_list)
  1059. {
  1060. struct isp_reg *next = reg_list;
  1061. for (; next->reg != ISP_TOK_TERM; next++)
  1062. isp_reg_writel(isp, next->val, next->mmio_range, next->reg);
  1063. }
  1064. /*
  1065. * isp_save_ctx - Saves ISP, CCDC, HIST, H3A, PREV, RESZ & MMU context.
  1066. * @isp: OMAP3 ISP device
  1067. *
  1068. * Routine for saving the context of each module in the ISP.
  1069. * CCDC, HIST, H3A, PREV, RESZ and MMU.
  1070. */
  1071. static void isp_save_ctx(struct isp_device *isp)
  1072. {
  1073. isp_save_context(isp, isp_reg_list);
  1074. omap_iommu_save_ctx(isp->dev);
  1075. }
  1076. /*
  1077. * isp_restore_ctx - Restores ISP, CCDC, HIST, H3A, PREV, RESZ & MMU context.
  1078. * @isp: OMAP3 ISP device
  1079. *
  1080. * Routine for restoring the context of each module in the ISP.
  1081. * CCDC, HIST, H3A, PREV, RESZ and MMU.
  1082. */
  1083. static void isp_restore_ctx(struct isp_device *isp)
  1084. {
  1085. isp_restore_context(isp, isp_reg_list);
  1086. omap_iommu_restore_ctx(isp->dev);
  1087. omap3isp_ccdc_restore_context(isp);
  1088. omap3isp_preview_restore_context(isp);
  1089. }
  1090. /* -----------------------------------------------------------------------------
  1091. * SBL resources management
  1092. */
  1093. #define OMAP3_ISP_SBL_READ (OMAP3_ISP_SBL_CSI1_READ | \
  1094. OMAP3_ISP_SBL_CCDC_LSC_READ | \
  1095. OMAP3_ISP_SBL_PREVIEW_READ | \
  1096. OMAP3_ISP_SBL_RESIZER_READ)
  1097. #define OMAP3_ISP_SBL_WRITE (OMAP3_ISP_SBL_CSI1_WRITE | \
  1098. OMAP3_ISP_SBL_CSI2A_WRITE | \
  1099. OMAP3_ISP_SBL_CSI2C_WRITE | \
  1100. OMAP3_ISP_SBL_CCDC_WRITE | \
  1101. OMAP3_ISP_SBL_PREVIEW_WRITE)
  1102. void omap3isp_sbl_enable(struct isp_device *isp, enum isp_sbl_resource res)
  1103. {
  1104. u32 sbl = 0;
  1105. isp->sbl_resources |= res;
  1106. if (isp->sbl_resources & OMAP3_ISP_SBL_CSI1_READ)
  1107. sbl |= ISPCTRL_SBL_SHARED_RPORTA;
  1108. if (isp->sbl_resources & OMAP3_ISP_SBL_CCDC_LSC_READ)
  1109. sbl |= ISPCTRL_SBL_SHARED_RPORTB;
  1110. if (isp->sbl_resources & OMAP3_ISP_SBL_CSI2C_WRITE)
  1111. sbl |= ISPCTRL_SBL_SHARED_WPORTC;
  1112. if (isp->sbl_resources & OMAP3_ISP_SBL_RESIZER_WRITE)
  1113. sbl |= ISPCTRL_SBL_WR0_RAM_EN;
  1114. if (isp->sbl_resources & OMAP3_ISP_SBL_WRITE)
  1115. sbl |= ISPCTRL_SBL_WR1_RAM_EN;
  1116. if (isp->sbl_resources & OMAP3_ISP_SBL_READ)
  1117. sbl |= ISPCTRL_SBL_RD_RAM_EN;
  1118. isp_reg_set(isp, OMAP3_ISP_IOMEM_MAIN, ISP_CTRL, sbl);
  1119. }
  1120. void omap3isp_sbl_disable(struct isp_device *isp, enum isp_sbl_resource res)
  1121. {
  1122. u32 sbl = 0;
  1123. isp->sbl_resources &= ~res;
  1124. if (!(isp->sbl_resources & OMAP3_ISP_SBL_CSI1_READ))
  1125. sbl |= ISPCTRL_SBL_SHARED_RPORTA;
  1126. if (!(isp->sbl_resources & OMAP3_ISP_SBL_CCDC_LSC_READ))
  1127. sbl |= ISPCTRL_SBL_SHARED_RPORTB;
  1128. if (!(isp->sbl_resources & OMAP3_ISP_SBL_CSI2C_WRITE))
  1129. sbl |= ISPCTRL_SBL_SHARED_WPORTC;
  1130. if (!(isp->sbl_resources & OMAP3_ISP_SBL_RESIZER_WRITE))
  1131. sbl |= ISPCTRL_SBL_WR0_RAM_EN;
  1132. if (!(isp->sbl_resources & OMAP3_ISP_SBL_WRITE))
  1133. sbl |= ISPCTRL_SBL_WR1_RAM_EN;
  1134. if (!(isp->sbl_resources & OMAP3_ISP_SBL_READ))
  1135. sbl |= ISPCTRL_SBL_RD_RAM_EN;
  1136. isp_reg_clr(isp, OMAP3_ISP_IOMEM_MAIN, ISP_CTRL, sbl);
  1137. }
  1138. /*
  1139. * isp_module_sync_idle - Helper to sync module with its idle state
  1140. * @me: ISP submodule's media entity
  1141. * @wait: ISP submodule's wait queue for streamoff/interrupt synchronization
  1142. * @stopping: flag which tells module wants to stop
  1143. *
  1144. * This function checks if ISP submodule needs to wait for next interrupt. If
  1145. * yes, makes the caller to sleep while waiting for such event.
  1146. */
  1147. int omap3isp_module_sync_idle(struct media_entity *me, wait_queue_head_t *wait,
  1148. atomic_t *stopping)
  1149. {
  1150. struct isp_pipeline *pipe = to_isp_pipeline(me);
  1151. if (pipe->stream_state == ISP_PIPELINE_STREAM_STOPPED ||
  1152. (pipe->stream_state == ISP_PIPELINE_STREAM_SINGLESHOT &&
  1153. !isp_pipeline_ready(pipe)))
  1154. return 0;
  1155. /*
  1156. * atomic_set() doesn't include memory barrier on ARM platform for SMP
  1157. * scenario. We'll call it here to avoid race conditions.
  1158. */
  1159. atomic_set(stopping, 1);
  1160. smp_mb();
  1161. /*
  1162. * If module is the last one, it's writing to memory. In this case,
  1163. * it's necessary to check if the module is already paused due to
  1164. * DMA queue underrun or if it has to wait for next interrupt to be
  1165. * idle.
  1166. * If it isn't the last one, the function won't sleep but *stopping
  1167. * will still be set to warn next submodule caller's interrupt the
  1168. * module wants to be idle.
  1169. */
  1170. if (isp_pipeline_is_last(me)) {
  1171. struct isp_video *video = pipe->output;
  1172. unsigned long flags;
  1173. spin_lock_irqsave(&video->queue->irqlock, flags);
  1174. if (video->dmaqueue_flags & ISP_VIDEO_DMAQUEUE_UNDERRUN) {
  1175. spin_unlock_irqrestore(&video->queue->irqlock, flags);
  1176. atomic_set(stopping, 0);
  1177. smp_mb();
  1178. return 0;
  1179. }
  1180. spin_unlock_irqrestore(&video->queue->irqlock, flags);
  1181. if (!wait_event_timeout(*wait, !atomic_read(stopping),
  1182. msecs_to_jiffies(1000))) {
  1183. atomic_set(stopping, 0);
  1184. smp_mb();
  1185. return -ETIMEDOUT;
  1186. }
  1187. }
  1188. return 0;
  1189. }
  1190. /*
  1191. * omap3isp_module_sync_is_stopped - Helper to verify if module was stopping
  1192. * @wait: ISP submodule's wait queue for streamoff/interrupt synchronization
  1193. * @stopping: flag which tells module wants to stop
  1194. *
  1195. * This function checks if ISP submodule was stopping. In case of yes, it
  1196. * notices the caller by setting stopping to 0 and waking up the wait queue.
  1197. * Returns 1 if it was stopping or 0 otherwise.
  1198. */
  1199. int omap3isp_module_sync_is_stopping(wait_queue_head_t *wait,
  1200. atomic_t *stopping)
  1201. {
  1202. if (atomic_cmpxchg(stopping, 1, 0)) {
  1203. wake_up(wait);
  1204. return 1;
  1205. }
  1206. return 0;
  1207. }
  1208. /* --------------------------------------------------------------------------
  1209. * Clock management
  1210. */
  1211. #define ISPCTRL_CLKS_MASK (ISPCTRL_H3A_CLK_EN | \
  1212. ISPCTRL_HIST_CLK_EN | \
  1213. ISPCTRL_RSZ_CLK_EN | \
  1214. (ISPCTRL_CCDC_CLK_EN | ISPCTRL_CCDC_RAM_EN) | \
  1215. (ISPCTRL_PREV_CLK_EN | ISPCTRL_PREV_RAM_EN))
  1216. static void __isp_subclk_update(struct isp_device *isp)
  1217. {
  1218. u32 clk = 0;
  1219. /* AEWB and AF share the same clock. */
  1220. if (isp->subclk_resources &
  1221. (OMAP3_ISP_SUBCLK_AEWB | OMAP3_ISP_SUBCLK_AF))
  1222. clk |= ISPCTRL_H3A_CLK_EN;
  1223. if (isp->subclk_resources & OMAP3_ISP_SUBCLK_HIST)
  1224. clk |= ISPCTRL_HIST_CLK_EN;
  1225. if (isp->subclk_resources & OMAP3_ISP_SUBCLK_RESIZER)
  1226. clk |= ISPCTRL_RSZ_CLK_EN;
  1227. /* NOTE: For CCDC & Preview submodules, we need to affect internal
  1228. * RAM as well.
  1229. */
  1230. if (isp->subclk_resources & OMAP3_ISP_SUBCLK_CCDC)
  1231. clk |= ISPCTRL_CCDC_CLK_EN | ISPCTRL_CCDC_RAM_EN;
  1232. if (isp->subclk_resources & OMAP3_ISP_SUBCLK_PREVIEW)
  1233. clk |= ISPCTRL_PREV_CLK_EN | ISPCTRL_PREV_RAM_EN;
  1234. isp_reg_clr_set(isp, OMAP3_ISP_IOMEM_MAIN, ISP_CTRL,
  1235. ISPCTRL_CLKS_MASK, clk);
  1236. }
  1237. void omap3isp_subclk_enable(struct isp_device *isp,
  1238. enum isp_subclk_resource res)
  1239. {
  1240. isp->subclk_resources |= res;
  1241. __isp_subclk_update(isp);
  1242. }
  1243. void omap3isp_subclk_disable(struct isp_device *isp,
  1244. enum isp_subclk_resource res)
  1245. {
  1246. isp->subclk_resources &= ~res;
  1247. __isp_subclk_update(isp);
  1248. }
  1249. /*
  1250. * isp_enable_clocks - Enable ISP clocks
  1251. * @isp: OMAP3 ISP device
  1252. *
  1253. * Return 0 if successful, or clk_prepare_enable return value if any of them
  1254. * fails.
  1255. */
  1256. static int isp_enable_clocks(struct isp_device *isp)
  1257. {
  1258. int r;
  1259. unsigned long rate;
  1260. r = clk_prepare_enable(isp->clock[ISP_CLK_CAM_ICK]);
  1261. if (r) {
  1262. dev_err(isp->dev, "failed to enable cam_ick clock\n");
  1263. goto out_clk_enable_ick;
  1264. }
  1265. r = clk_set_rate(isp->clock[ISP_CLK_CAM_MCLK], CM_CAM_MCLK_HZ);
  1266. if (r) {
  1267. dev_err(isp->dev, "clk_set_rate for cam_mclk failed\n");
  1268. goto out_clk_enable_mclk;
  1269. }
  1270. r = clk_prepare_enable(isp->clock[ISP_CLK_CAM_MCLK]);
  1271. if (r) {
  1272. dev_err(isp->dev, "failed to enable cam_mclk clock\n");
  1273. goto out_clk_enable_mclk;
  1274. }
  1275. rate = clk_get_rate(isp->clock[ISP_CLK_CAM_MCLK]);
  1276. if (rate != CM_CAM_MCLK_HZ)
  1277. dev_warn(isp->dev, "unexpected cam_mclk rate:\n"
  1278. " expected : %d\n"
  1279. " actual : %ld\n", CM_CAM_MCLK_HZ, rate);
  1280. r = clk_prepare_enable(isp->clock[ISP_CLK_CSI2_FCK]);
  1281. if (r) {
  1282. dev_err(isp->dev, "failed to enable csi2_fck clock\n");
  1283. goto out_clk_enable_csi2_fclk;
  1284. }
  1285. return 0;
  1286. out_clk_enable_csi2_fclk:
  1287. clk_disable_unprepare(isp->clock[ISP_CLK_CAM_MCLK]);
  1288. out_clk_enable_mclk:
  1289. clk_disable_unprepare(isp->clock[ISP_CLK_CAM_ICK]);
  1290. out_clk_enable_ick:
  1291. return r;
  1292. }
  1293. /*
  1294. * isp_disable_clocks - Disable ISP clocks
  1295. * @isp: OMAP3 ISP device
  1296. */
  1297. static void isp_disable_clocks(struct isp_device *isp)
  1298. {
  1299. clk_disable_unprepare(isp->clock[ISP_CLK_CAM_ICK]);
  1300. clk_disable_unprepare(isp->clock[ISP_CLK_CAM_MCLK]);
  1301. clk_disable_unprepare(isp->clock[ISP_CLK_CSI2_FCK]);
  1302. }
  1303. static const char *isp_clocks[] = {
  1304. "cam_ick",
  1305. "cam_mclk",
  1306. "csi2_96m_fck",
  1307. "l3_ick",
  1308. };
  1309. static int isp_get_clocks(struct isp_device *isp)
  1310. {
  1311. struct clk *clk;
  1312. unsigned int i;
  1313. for (i = 0; i < ARRAY_SIZE(isp_clocks); ++i) {
  1314. clk = devm_clk_get(isp->dev, isp_clocks[i]);
  1315. if (IS_ERR(clk)) {
  1316. dev_err(isp->dev, "clk_get %s failed\n", isp_clocks[i]);
  1317. return PTR_ERR(clk);
  1318. }
  1319. isp->clock[i] = clk;
  1320. }
  1321. return 0;
  1322. }
  1323. /*
  1324. * omap3isp_get - Acquire the ISP resource.
  1325. *
  1326. * Initializes the clocks for the first acquire.
  1327. *
  1328. * Increment the reference count on the ISP. If the first reference is taken,
  1329. * enable clocks and power-up all submodules.
  1330. *
  1331. * Return a pointer to the ISP device structure, or NULL if an error occurred.
  1332. */
  1333. static struct isp_device *__omap3isp_get(struct isp_device *isp, bool irq)
  1334. {
  1335. struct isp_device *__isp = isp;
  1336. if (isp == NULL)
  1337. return NULL;
  1338. mutex_lock(&isp->isp_mutex);
  1339. if (isp->ref_count > 0)
  1340. goto out;
  1341. if (isp_enable_clocks(isp) < 0) {
  1342. __isp = NULL;
  1343. goto out;
  1344. }
  1345. /* We don't want to restore context before saving it! */
  1346. if (isp->has_context)
  1347. isp_restore_ctx(isp);
  1348. if (irq)
  1349. isp_enable_interrupts(isp);
  1350. out:
  1351. if (__isp != NULL)
  1352. isp->ref_count++;
  1353. mutex_unlock(&isp->isp_mutex);
  1354. return __isp;
  1355. }
  1356. struct isp_device *omap3isp_get(struct isp_device *isp)
  1357. {
  1358. return __omap3isp_get(isp, true);
  1359. }
  1360. /*
  1361. * omap3isp_put - Release the ISP
  1362. *
  1363. * Decrement the reference count on the ISP. If the last reference is released,
  1364. * power-down all submodules, disable clocks and free temporary buffers.
  1365. */
  1366. void omap3isp_put(struct isp_device *isp)
  1367. {
  1368. if (isp == NULL)
  1369. return;
  1370. mutex_lock(&isp->isp_mutex);
  1371. BUG_ON(isp->ref_count == 0);
  1372. if (--isp->ref_count == 0) {
  1373. isp_disable_interrupts(isp);
  1374. if (isp->domain) {
  1375. isp_save_ctx(isp);
  1376. isp->has_context = 1;
  1377. }
  1378. /* Reset the ISP if an entity has failed to stop. This is the
  1379. * only way to recover from such conditions.
  1380. */
  1381. if (isp->crashed)
  1382. isp_reset(isp);
  1383. isp_disable_clocks(isp);
  1384. }
  1385. mutex_unlock(&isp->isp_mutex);
  1386. }
  1387. /* --------------------------------------------------------------------------
  1388. * Platform device driver
  1389. */
  1390. /*
  1391. * omap3isp_print_status - Prints the values of the ISP Control Module registers
  1392. * @isp: OMAP3 ISP device
  1393. */
  1394. #define ISP_PRINT_REGISTER(isp, name)\
  1395. dev_dbg(isp->dev, "###ISP " #name "=0x%08x\n", \
  1396. isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN, ISP_##name))
  1397. #define SBL_PRINT_REGISTER(isp, name)\
  1398. dev_dbg(isp->dev, "###SBL " #name "=0x%08x\n", \
  1399. isp_reg_readl(isp, OMAP3_ISP_IOMEM_SBL, ISPSBL_##name))
  1400. void omap3isp_print_status(struct isp_device *isp)
  1401. {
  1402. dev_dbg(isp->dev, "-------------ISP Register dump--------------\n");
  1403. ISP_PRINT_REGISTER(isp, SYSCONFIG);
  1404. ISP_PRINT_REGISTER(isp, SYSSTATUS);
  1405. ISP_PRINT_REGISTER(isp, IRQ0ENABLE);
  1406. ISP_PRINT_REGISTER(isp, IRQ0STATUS);
  1407. ISP_PRINT_REGISTER(isp, TCTRL_GRESET_LENGTH);
  1408. ISP_PRINT_REGISTER(isp, TCTRL_PSTRB_REPLAY);
  1409. ISP_PRINT_REGISTER(isp, CTRL);
  1410. ISP_PRINT_REGISTER(isp, TCTRL_CTRL);
  1411. ISP_PRINT_REGISTER(isp, TCTRL_FRAME);
  1412. ISP_PRINT_REGISTER(isp, TCTRL_PSTRB_DELAY);
  1413. ISP_PRINT_REGISTER(isp, TCTRL_STRB_DELAY);
  1414. ISP_PRINT_REGISTER(isp, TCTRL_SHUT_DELAY);
  1415. ISP_PRINT_REGISTER(isp, TCTRL_PSTRB_LENGTH);
  1416. ISP_PRINT_REGISTER(isp, TCTRL_STRB_LENGTH);
  1417. ISP_PRINT_REGISTER(isp, TCTRL_SHUT_LENGTH);
  1418. SBL_PRINT_REGISTER(isp, PCR);
  1419. SBL_PRINT_REGISTER(isp, SDR_REQ_EXP);
  1420. dev_dbg(isp->dev, "--------------------------------------------\n");
  1421. }
  1422. #ifdef CONFIG_PM
  1423. /*
  1424. * Power management support.
  1425. *
  1426. * As the ISP can't properly handle an input video stream interruption on a non
  1427. * frame boundary, the ISP pipelines need to be stopped before sensors get
  1428. * suspended. However, as suspending the sensors can require a running clock,
  1429. * which can be provided by the ISP, the ISP can't be completely suspended
  1430. * before the sensor.
  1431. *
  1432. * To solve this problem power management support is split into prepare/complete
  1433. * and suspend/resume operations. The pipelines are stopped in prepare() and the
  1434. * ISP clocks get disabled in suspend(). Similarly, the clocks are reenabled in
  1435. * resume(), and the the pipelines are restarted in complete().
  1436. *
  1437. * TODO: PM dependencies between the ISP and sensors are not modelled explicitly
  1438. * yet.
  1439. */
  1440. static int isp_pm_prepare(struct device *dev)
  1441. {
  1442. struct isp_device *isp = dev_get_drvdata(dev);
  1443. int reset;
  1444. WARN_ON(mutex_is_locked(&isp->isp_mutex));
  1445. if (isp->ref_count == 0)
  1446. return 0;
  1447. reset = isp_suspend_modules(isp);
  1448. isp_disable_interrupts(isp);
  1449. isp_save_ctx(isp);
  1450. if (reset)
  1451. isp_reset(isp);
  1452. return 0;
  1453. }
  1454. static int isp_pm_suspend(struct device *dev)
  1455. {
  1456. struct isp_device *isp = dev_get_drvdata(dev);
  1457. WARN_ON(mutex_is_locked(&isp->isp_mutex));
  1458. if (isp->ref_count)
  1459. isp_disable_clocks(isp);
  1460. return 0;
  1461. }
  1462. static int isp_pm_resume(struct device *dev)
  1463. {
  1464. struct isp_device *isp = dev_get_drvdata(dev);
  1465. if (isp->ref_count == 0)
  1466. return 0;
  1467. return isp_enable_clocks(isp);
  1468. }
  1469. static void isp_pm_complete(struct device *dev)
  1470. {
  1471. struct isp_device *isp = dev_get_drvdata(dev);
  1472. if (isp->ref_count == 0)
  1473. return;
  1474. isp_restore_ctx(isp);
  1475. isp_enable_interrupts(isp);
  1476. isp_resume_modules(isp);
  1477. }
  1478. #else
  1479. #define isp_pm_prepare NULL
  1480. #define isp_pm_suspend NULL
  1481. #define isp_pm_resume NULL
  1482. #define isp_pm_complete NULL
  1483. #endif /* CONFIG_PM */
  1484. static void isp_unregister_entities(struct isp_device *isp)
  1485. {
  1486. omap3isp_csi2_unregister_entities(&isp->isp_csi2a);
  1487. omap3isp_ccp2_unregister_entities(&isp->isp_ccp2);
  1488. omap3isp_ccdc_unregister_entities(&isp->isp_ccdc);
  1489. omap3isp_preview_unregister_entities(&isp->isp_prev);
  1490. omap3isp_resizer_unregister_entities(&isp->isp_res);
  1491. omap3isp_stat_unregister_entities(&isp->isp_aewb);
  1492. omap3isp_stat_unregister_entities(&isp->isp_af);
  1493. omap3isp_stat_unregister_entities(&isp->isp_hist);
  1494. v4l2_device_unregister(&isp->v4l2_dev);
  1495. media_device_unregister(&isp->media_dev);
  1496. }
  1497. /*
  1498. * isp_register_subdev_group - Register a group of subdevices
  1499. * @isp: OMAP3 ISP device
  1500. * @board_info: I2C subdevs board information array
  1501. *
  1502. * Register all I2C subdevices in the board_info array. The array must be
  1503. * terminated by a NULL entry, and the first entry must be the sensor.
  1504. *
  1505. * Return a pointer to the sensor media entity if it has been successfully
  1506. * registered, or NULL otherwise.
  1507. */
  1508. static struct v4l2_subdev *
  1509. isp_register_subdev_group(struct isp_device *isp,
  1510. struct isp_subdev_i2c_board_info *board_info)
  1511. {
  1512. struct v4l2_subdev *sensor = NULL;
  1513. unsigned int first;
  1514. if (board_info->board_info == NULL)
  1515. return NULL;
  1516. for (first = 1; board_info->board_info; ++board_info, first = 0) {
  1517. struct v4l2_subdev *subdev;
  1518. struct i2c_adapter *adapter;
  1519. adapter = i2c_get_adapter(board_info->i2c_adapter_id);
  1520. if (adapter == NULL) {
  1521. dev_err(isp->dev, "%s: Unable to get I2C adapter %d for "
  1522. "device %s\n", __func__,
  1523. board_info->i2c_adapter_id,
  1524. board_info->board_info->type);
  1525. continue;
  1526. }
  1527. subdev = v4l2_i2c_new_subdev_board(&isp->v4l2_dev, adapter,
  1528. board_info->board_info, NULL);
  1529. if (subdev == NULL) {
  1530. dev_err(isp->dev, "%s: Unable to register subdev %s\n",
  1531. __func__, board_info->board_info->type);
  1532. continue;
  1533. }
  1534. if (first)
  1535. sensor = subdev;
  1536. }
  1537. return sensor;
  1538. }
  1539. static int isp_register_entities(struct isp_device *isp)
  1540. {
  1541. struct isp_platform_data *pdata = isp->pdata;
  1542. struct isp_v4l2_subdevs_group *subdevs;
  1543. int ret;
  1544. isp->media_dev.dev = isp->dev;
  1545. strlcpy(isp->media_dev.model, "TI OMAP3 ISP",
  1546. sizeof(isp->media_dev.model));
  1547. isp->media_dev.hw_revision = isp->revision;
  1548. isp->media_dev.link_notify = isp_pipeline_link_notify;
  1549. ret = media_device_register(&isp->media_dev);
  1550. if (ret < 0) {
  1551. dev_err(isp->dev, "%s: Media device registration failed (%d)\n",
  1552. __func__, ret);
  1553. return ret;
  1554. }
  1555. isp->v4l2_dev.mdev = &isp->media_dev;
  1556. ret = v4l2_device_register(isp->dev, &isp->v4l2_dev);
  1557. if (ret < 0) {
  1558. dev_err(isp->dev, "%s: V4L2 device registration failed (%d)\n",
  1559. __func__, ret);
  1560. goto done;
  1561. }
  1562. /* Register internal entities */
  1563. ret = omap3isp_ccp2_register_entities(&isp->isp_ccp2, &isp->v4l2_dev);
  1564. if (ret < 0)
  1565. goto done;
  1566. ret = omap3isp_csi2_register_entities(&isp->isp_csi2a, &isp->v4l2_dev);
  1567. if (ret < 0)
  1568. goto done;
  1569. ret = omap3isp_ccdc_register_entities(&isp->isp_ccdc, &isp->v4l2_dev);
  1570. if (ret < 0)
  1571. goto done;
  1572. ret = omap3isp_preview_register_entities(&isp->isp_prev,
  1573. &isp->v4l2_dev);
  1574. if (ret < 0)
  1575. goto done;
  1576. ret = omap3isp_resizer_register_entities(&isp->isp_res, &isp->v4l2_dev);
  1577. if (ret < 0)
  1578. goto done;
  1579. ret = omap3isp_stat_register_entities(&isp->isp_aewb, &isp->v4l2_dev);
  1580. if (ret < 0)
  1581. goto done;
  1582. ret = omap3isp_stat_register_entities(&isp->isp_af, &isp->v4l2_dev);
  1583. if (ret < 0)
  1584. goto done;
  1585. ret = omap3isp_stat_register_entities(&isp->isp_hist, &isp->v4l2_dev);
  1586. if (ret < 0)
  1587. goto done;
  1588. /* Register external entities */
  1589. for (subdevs = pdata->subdevs; subdevs && subdevs->subdevs; ++subdevs) {
  1590. struct v4l2_subdev *sensor;
  1591. struct media_entity *input;
  1592. unsigned int flags;
  1593. unsigned int pad;
  1594. unsigned int i;
  1595. sensor = isp_register_subdev_group(isp, subdevs->subdevs);
  1596. if (sensor == NULL)
  1597. continue;
  1598. sensor->host_priv = subdevs;
  1599. /* Connect the sensor to the correct interface module. Parallel
  1600. * sensors are connected directly to the CCDC, while serial
  1601. * sensors are connected to the CSI2a, CCP2b or CSI2c receiver
  1602. * through CSIPHY1 or CSIPHY2.
  1603. */
  1604. switch (subdevs->interface) {
  1605. case ISP_INTERFACE_PARALLEL:
  1606. input = &isp->isp_ccdc.subdev.entity;
  1607. pad = CCDC_PAD_SINK;
  1608. flags = 0;
  1609. break;
  1610. case ISP_INTERFACE_CSI2A_PHY2:
  1611. input = &isp->isp_csi2a.subdev.entity;
  1612. pad = CSI2_PAD_SINK;
  1613. flags = MEDIA_LNK_FL_IMMUTABLE
  1614. | MEDIA_LNK_FL_ENABLED;
  1615. break;
  1616. case ISP_INTERFACE_CCP2B_PHY1:
  1617. case ISP_INTERFACE_CCP2B_PHY2:
  1618. input = &isp->isp_ccp2.subdev.entity;
  1619. pad = CCP2_PAD_SINK;
  1620. flags = 0;
  1621. break;
  1622. case ISP_INTERFACE_CSI2C_PHY1:
  1623. input = &isp->isp_csi2c.subdev.entity;
  1624. pad = CSI2_PAD_SINK;
  1625. flags = MEDIA_LNK_FL_IMMUTABLE
  1626. | MEDIA_LNK_FL_ENABLED;
  1627. break;
  1628. default:
  1629. dev_err(isp->dev, "%s: invalid interface type %u\n",
  1630. __func__, subdevs->interface);
  1631. ret = -EINVAL;
  1632. goto done;
  1633. }
  1634. for (i = 0; i < sensor->entity.num_pads; i++) {
  1635. if (sensor->entity.pads[i].flags & MEDIA_PAD_FL_SOURCE)
  1636. break;
  1637. }
  1638. if (i == sensor->entity.num_pads) {
  1639. dev_err(isp->dev,
  1640. "%s: no source pad in external entity\n",
  1641. __func__);
  1642. ret = -EINVAL;
  1643. goto done;
  1644. }
  1645. ret = media_entity_create_link(&sensor->entity, i, input, pad,
  1646. flags);
  1647. if (ret < 0)
  1648. goto done;
  1649. }
  1650. ret = v4l2_device_register_subdev_nodes(&isp->v4l2_dev);
  1651. done:
  1652. if (ret < 0)
  1653. isp_unregister_entities(isp);
  1654. return ret;
  1655. }
  1656. static void isp_cleanup_modules(struct isp_device *isp)
  1657. {
  1658. omap3isp_h3a_aewb_cleanup(isp);
  1659. omap3isp_h3a_af_cleanup(isp);
  1660. omap3isp_hist_cleanup(isp);
  1661. omap3isp_resizer_cleanup(isp);
  1662. omap3isp_preview_cleanup(isp);
  1663. omap3isp_ccdc_cleanup(isp);
  1664. omap3isp_ccp2_cleanup(isp);
  1665. omap3isp_csi2_cleanup(isp);
  1666. }
  1667. static int isp_initialize_modules(struct isp_device *isp)
  1668. {
  1669. int ret;
  1670. ret = omap3isp_csiphy_init(isp);
  1671. if (ret < 0) {
  1672. dev_err(isp->dev, "CSI PHY initialization failed\n");
  1673. goto error_csiphy;
  1674. }
  1675. ret = omap3isp_csi2_init(isp);
  1676. if (ret < 0) {
  1677. dev_err(isp->dev, "CSI2 initialization failed\n");
  1678. goto error_csi2;
  1679. }
  1680. ret = omap3isp_ccp2_init(isp);
  1681. if (ret < 0) {
  1682. dev_err(isp->dev, "CCP2 initialization failed\n");
  1683. goto error_ccp2;
  1684. }
  1685. ret = omap3isp_ccdc_init(isp);
  1686. if (ret < 0) {
  1687. dev_err(isp->dev, "CCDC initialization failed\n");
  1688. goto error_ccdc;
  1689. }
  1690. ret = omap3isp_preview_init(isp);
  1691. if (ret < 0) {
  1692. dev_err(isp->dev, "Preview initialization failed\n");
  1693. goto error_preview;
  1694. }
  1695. ret = omap3isp_resizer_init(isp);
  1696. if (ret < 0) {
  1697. dev_err(isp->dev, "Resizer initialization failed\n");
  1698. goto error_resizer;
  1699. }
  1700. ret = omap3isp_hist_init(isp);
  1701. if (ret < 0) {
  1702. dev_err(isp->dev, "Histogram initialization failed\n");
  1703. goto error_hist;
  1704. }
  1705. ret = omap3isp_h3a_aewb_init(isp);
  1706. if (ret < 0) {
  1707. dev_err(isp->dev, "H3A AEWB initialization failed\n");
  1708. goto error_h3a_aewb;
  1709. }
  1710. ret = omap3isp_h3a_af_init(isp);
  1711. if (ret < 0) {
  1712. dev_err(isp->dev, "H3A AF initialization failed\n");
  1713. goto error_h3a_af;
  1714. }
  1715. /* Connect the submodules. */
  1716. ret = media_entity_create_link(
  1717. &isp->isp_csi2a.subdev.entity, CSI2_PAD_SOURCE,
  1718. &isp->isp_ccdc.subdev.entity, CCDC_PAD_SINK, 0);
  1719. if (ret < 0)
  1720. goto error_link;
  1721. ret = media_entity_create_link(
  1722. &isp->isp_ccp2.subdev.entity, CCP2_PAD_SOURCE,
  1723. &isp->isp_ccdc.subdev.entity, CCDC_PAD_SINK, 0);
  1724. if (ret < 0)
  1725. goto error_link;
  1726. ret = media_entity_create_link(
  1727. &isp->isp_ccdc.subdev.entity, CCDC_PAD_SOURCE_VP,
  1728. &isp->isp_prev.subdev.entity, PREV_PAD_SINK, 0);
  1729. if (ret < 0)
  1730. goto error_link;
  1731. ret = media_entity_create_link(
  1732. &isp->isp_ccdc.subdev.entity, CCDC_PAD_SOURCE_OF,
  1733. &isp->isp_res.subdev.entity, RESZ_PAD_SINK, 0);
  1734. if (ret < 0)
  1735. goto error_link;
  1736. ret = media_entity_create_link(
  1737. &isp->isp_prev.subdev.entity, PREV_PAD_SOURCE,
  1738. &isp->isp_res.subdev.entity, RESZ_PAD_SINK, 0);
  1739. if (ret < 0)
  1740. goto error_link;
  1741. ret = media_entity_create_link(
  1742. &isp->isp_ccdc.subdev.entity, CCDC_PAD_SOURCE_VP,
  1743. &isp->isp_aewb.subdev.entity, 0,
  1744. MEDIA_LNK_FL_ENABLED | MEDIA_LNK_FL_IMMUTABLE);
  1745. if (ret < 0)
  1746. goto error_link;
  1747. ret = media_entity_create_link(
  1748. &isp->isp_ccdc.subdev.entity, CCDC_PAD_SOURCE_VP,
  1749. &isp->isp_af.subdev.entity, 0,
  1750. MEDIA_LNK_FL_ENABLED | MEDIA_LNK_FL_IMMUTABLE);
  1751. if (ret < 0)
  1752. goto error_link;
  1753. ret = media_entity_create_link(
  1754. &isp->isp_ccdc.subdev.entity, CCDC_PAD_SOURCE_VP,
  1755. &isp->isp_hist.subdev.entity, 0,
  1756. MEDIA_LNK_FL_ENABLED | MEDIA_LNK_FL_IMMUTABLE);
  1757. if (ret < 0)
  1758. goto error_link;
  1759. return 0;
  1760. error_link:
  1761. omap3isp_h3a_af_cleanup(isp);
  1762. error_h3a_af:
  1763. omap3isp_h3a_aewb_cleanup(isp);
  1764. error_h3a_aewb:
  1765. omap3isp_hist_cleanup(isp);
  1766. error_hist:
  1767. omap3isp_resizer_cleanup(isp);
  1768. error_resizer:
  1769. omap3isp_preview_cleanup(isp);
  1770. error_preview:
  1771. omap3isp_ccdc_cleanup(isp);
  1772. error_ccdc:
  1773. omap3isp_ccp2_cleanup(isp);
  1774. error_ccp2:
  1775. omap3isp_csi2_cleanup(isp);
  1776. error_csi2:
  1777. error_csiphy:
  1778. return ret;
  1779. }
  1780. /*
  1781. * isp_remove - Remove ISP platform device
  1782. * @pdev: Pointer to ISP platform device
  1783. *
  1784. * Always returns 0.
  1785. */
  1786. static int isp_remove(struct platform_device *pdev)
  1787. {
  1788. struct isp_device *isp = platform_get_drvdata(pdev);
  1789. isp_unregister_entities(isp);
  1790. isp_cleanup_modules(isp);
  1791. isp_xclk_cleanup(isp);
  1792. __omap3isp_get(isp, false);
  1793. iommu_detach_device(isp->domain, &pdev->dev);
  1794. iommu_domain_free(isp->domain);
  1795. isp->domain = NULL;
  1796. omap3isp_put(isp);
  1797. return 0;
  1798. }
  1799. static int isp_map_mem_resource(struct platform_device *pdev,
  1800. struct isp_device *isp,
  1801. enum isp_mem_resources res)
  1802. {
  1803. struct resource *mem;
  1804. /* request the mem region for the camera registers */
  1805. mem = platform_get_resource(pdev, IORESOURCE_MEM, res);
  1806. if (!mem) {
  1807. dev_err(isp->dev, "no mem resource?\n");
  1808. return -ENODEV;
  1809. }
  1810. if (!devm_request_mem_region(isp->dev, mem->start, resource_size(mem),
  1811. pdev->name)) {
  1812. dev_err(isp->dev,
  1813. "cannot reserve camera register I/O region\n");
  1814. return -ENODEV;
  1815. }
  1816. isp->mmio_base_phys[res] = mem->start;
  1817. isp->mmio_size[res] = resource_size(mem);
  1818. /* map the region */
  1819. isp->mmio_base[res] = devm_ioremap_nocache(isp->dev,
  1820. isp->mmio_base_phys[res],
  1821. isp->mmio_size[res]);
  1822. if (!isp->mmio_base[res]) {
  1823. dev_err(isp->dev, "cannot map camera register I/O region\n");
  1824. return -ENODEV;
  1825. }
  1826. return 0;
  1827. }
  1828. /*
  1829. * isp_probe - Probe ISP platform device
  1830. * @pdev: Pointer to ISP platform device
  1831. *
  1832. * Returns 0 if successful,
  1833. * -ENOMEM if no memory available,
  1834. * -ENODEV if no platform device resources found
  1835. * or no space for remapping registers,
  1836. * -EINVAL if couldn't install ISR,
  1837. * or clk_get return error value.
  1838. */
  1839. static int isp_probe(struct platform_device *pdev)
  1840. {
  1841. struct isp_platform_data *pdata = pdev->dev.platform_data;
  1842. struct isp_device *isp;
  1843. int ret;
  1844. int i, m;
  1845. if (pdata == NULL)
  1846. return -EINVAL;
  1847. isp = devm_kzalloc(&pdev->dev, sizeof(*isp), GFP_KERNEL);
  1848. if (!isp) {
  1849. dev_err(&pdev->dev, "could not allocate memory\n");
  1850. return -ENOMEM;
  1851. }
  1852. isp->autoidle = autoidle;
  1853. mutex_init(&isp->isp_mutex);
  1854. spin_lock_init(&isp->stat_lock);
  1855. isp->dev = &pdev->dev;
  1856. isp->pdata = pdata;
  1857. isp->ref_count = 0;
  1858. ret = dma_coerce_mask_and_coherent(isp->dev, DMA_BIT_MASK(32));
  1859. if (ret)
  1860. return ret;
  1861. platform_set_drvdata(pdev, isp);
  1862. /* Regulators */
  1863. isp->isp_csiphy1.vdd = devm_regulator_get(&pdev->dev, "VDD_CSIPHY1");
  1864. isp->isp_csiphy2.vdd = devm_regulator_get(&pdev->dev, "VDD_CSIPHY2");
  1865. /* Clocks
  1866. *
  1867. * The ISP clock tree is revision-dependent. We thus need to enable ICLK
  1868. * manually to read the revision before calling __omap3isp_get().
  1869. */
  1870. ret = isp_map_mem_resource(pdev, isp, OMAP3_ISP_IOMEM_MAIN);
  1871. if (ret < 0)
  1872. goto error;
  1873. ret = isp_get_clocks(isp);
  1874. if (ret < 0)
  1875. goto error;
  1876. ret = clk_enable(isp->clock[ISP_CLK_CAM_ICK]);
  1877. if (ret < 0)
  1878. goto error;
  1879. isp->revision = isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN, ISP_REVISION);
  1880. dev_info(isp->dev, "Revision %d.%d found\n",
  1881. (isp->revision & 0xf0) >> 4, isp->revision & 0x0f);
  1882. clk_disable(isp->clock[ISP_CLK_CAM_ICK]);
  1883. if (__omap3isp_get(isp, false) == NULL) {
  1884. ret = -ENODEV;
  1885. goto error;
  1886. }
  1887. ret = isp_reset(isp);
  1888. if (ret < 0)
  1889. goto error_isp;
  1890. ret = isp_xclk_init(isp);
  1891. if (ret < 0)
  1892. goto error_isp;
  1893. /* Memory resources */
  1894. for (m = 0; m < ARRAY_SIZE(isp_res_maps); m++)
  1895. if (isp->revision == isp_res_maps[m].isp_rev)
  1896. break;
  1897. if (m == ARRAY_SIZE(isp_res_maps)) {
  1898. dev_err(isp->dev, "No resource map found for ISP rev %d.%d\n",
  1899. (isp->revision & 0xf0) >> 4, isp->revision & 0xf);
  1900. ret = -ENODEV;
  1901. goto error_isp;
  1902. }
  1903. for (i = 1; i < OMAP3_ISP_IOMEM_LAST; i++) {
  1904. if (isp_res_maps[m].map & 1 << i) {
  1905. ret = isp_map_mem_resource(pdev, isp, i);
  1906. if (ret)
  1907. goto error_isp;
  1908. }
  1909. }
  1910. isp->domain = iommu_domain_alloc(pdev->dev.bus);
  1911. if (!isp->domain) {
  1912. dev_err(isp->dev, "can't alloc iommu domain\n");
  1913. ret = -ENOMEM;
  1914. goto error_isp;
  1915. }
  1916. ret = iommu_attach_device(isp->domain, &pdev->dev);
  1917. if (ret) {
  1918. dev_err(&pdev->dev, "can't attach iommu device: %d\n", ret);
  1919. ret = -EPROBE_DEFER;
  1920. goto free_domain;
  1921. }
  1922. /* Interrupt */
  1923. isp->irq_num = platform_get_irq(pdev, 0);
  1924. if (isp->irq_num <= 0) {
  1925. dev_err(isp->dev, "No IRQ resource\n");
  1926. ret = -ENODEV;
  1927. goto detach_dev;
  1928. }
  1929. if (devm_request_irq(isp->dev, isp->irq_num, isp_isr, IRQF_SHARED,
  1930. "OMAP3 ISP", isp)) {
  1931. dev_err(isp->dev, "Unable to request IRQ\n");
  1932. ret = -EINVAL;
  1933. goto detach_dev;
  1934. }
  1935. /* Entities */
  1936. ret = isp_initialize_modules(isp);
  1937. if (ret < 0)
  1938. goto detach_dev;
  1939. ret = isp_register_entities(isp);
  1940. if (ret < 0)
  1941. goto error_modules;
  1942. isp_core_init(isp, 1);
  1943. omap3isp_put(isp);
  1944. return 0;
  1945. error_modules:
  1946. isp_cleanup_modules(isp);
  1947. detach_dev:
  1948. iommu_detach_device(isp->domain, &pdev->dev);
  1949. free_domain:
  1950. iommu_domain_free(isp->domain);
  1951. isp->domain = NULL;
  1952. error_isp:
  1953. isp_xclk_cleanup(isp);
  1954. omap3isp_put(isp);
  1955. error:
  1956. mutex_destroy(&isp->isp_mutex);
  1957. return ret;
  1958. }
  1959. static const struct dev_pm_ops omap3isp_pm_ops = {
  1960. .prepare = isp_pm_prepare,
  1961. .suspend = isp_pm_suspend,
  1962. .resume = isp_pm_resume,
  1963. .complete = isp_pm_complete,
  1964. };
  1965. static struct platform_device_id omap3isp_id_table[] = {
  1966. { "omap3isp", 0 },
  1967. { },
  1968. };
  1969. MODULE_DEVICE_TABLE(platform, omap3isp_id_table);
  1970. static struct platform_driver omap3isp_driver = {
  1971. .probe = isp_probe,
  1972. .remove = isp_remove,
  1973. .id_table = omap3isp_id_table,
  1974. .driver = {
  1975. .owner = THIS_MODULE,
  1976. .name = "omap3isp",
  1977. .pm = &omap3isp_pm_ops,
  1978. },
  1979. };
  1980. module_platform_driver(omap3isp_driver);
  1981. MODULE_AUTHOR("Nokia Corporation");
  1982. MODULE_DESCRIPTION("TI OMAP3 ISP driver");
  1983. MODULE_LICENSE("GPL");
  1984. MODULE_VERSION(ISP_VIDEO_DRIVER_VERSION);