hid-cp2112.c 36 KB

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  1. /*
  2. * hid-cp2112.c - Silicon Labs HID USB to SMBus master bridge
  3. * Copyright (c) 2013,2014 Uplogix, Inc.
  4. * David Barksdale <dbarksdale@uplogix.com>
  5. *
  6. * This program is free software; you can redistribute it and/or modify it
  7. * under the terms and conditions of the GNU General Public License,
  8. * version 2, as published by the Free Software Foundation.
  9. *
  10. * This program is distributed in the hope it will be useful, but WITHOUT
  11. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  12. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  13. * more details.
  14. */
  15. /*
  16. * The Silicon Labs CP2112 chip is a USB HID device which provides an
  17. * SMBus controller for talking to slave devices and 8 GPIO pins. The
  18. * host communicates with the CP2112 via raw HID reports.
  19. *
  20. * Data Sheet:
  21. * http://www.silabs.com/Support%20Documents/TechnicalDocs/CP2112.pdf
  22. * Programming Interface Specification:
  23. * https://www.silabs.com/documents/public/application-notes/an495-cp2112-interface-specification.pdf
  24. */
  25. #include <linux/gpio.h>
  26. #include <linux/gpio/driver.h>
  27. #include <linux/hid.h>
  28. #include <linux/hidraw.h>
  29. #include <linux/i2c.h>
  30. #include <linux/module.h>
  31. #include <linux/nls.h>
  32. #include <linux/usb/ch9.h>
  33. #include "hid-ids.h"
  34. #define CP2112_REPORT_MAX_LENGTH 64
  35. #define CP2112_GPIO_CONFIG_LENGTH 5
  36. #define CP2112_GPIO_GET_LENGTH 2
  37. #define CP2112_GPIO_SET_LENGTH 3
  38. enum {
  39. CP2112_GPIO_CONFIG = 0x02,
  40. CP2112_GPIO_GET = 0x03,
  41. CP2112_GPIO_SET = 0x04,
  42. CP2112_GET_VERSION_INFO = 0x05,
  43. CP2112_SMBUS_CONFIG = 0x06,
  44. CP2112_DATA_READ_REQUEST = 0x10,
  45. CP2112_DATA_WRITE_READ_REQUEST = 0x11,
  46. CP2112_DATA_READ_FORCE_SEND = 0x12,
  47. CP2112_DATA_READ_RESPONSE = 0x13,
  48. CP2112_DATA_WRITE_REQUEST = 0x14,
  49. CP2112_TRANSFER_STATUS_REQUEST = 0x15,
  50. CP2112_TRANSFER_STATUS_RESPONSE = 0x16,
  51. CP2112_CANCEL_TRANSFER = 0x17,
  52. CP2112_LOCK_BYTE = 0x20,
  53. CP2112_USB_CONFIG = 0x21,
  54. CP2112_MANUFACTURER_STRING = 0x22,
  55. CP2112_PRODUCT_STRING = 0x23,
  56. CP2112_SERIAL_STRING = 0x24,
  57. };
  58. enum {
  59. STATUS0_IDLE = 0x00,
  60. STATUS0_BUSY = 0x01,
  61. STATUS0_COMPLETE = 0x02,
  62. STATUS0_ERROR = 0x03,
  63. };
  64. enum {
  65. STATUS1_TIMEOUT_NACK = 0x00,
  66. STATUS1_TIMEOUT_BUS = 0x01,
  67. STATUS1_ARBITRATION_LOST = 0x02,
  68. STATUS1_READ_INCOMPLETE = 0x03,
  69. STATUS1_WRITE_INCOMPLETE = 0x04,
  70. STATUS1_SUCCESS = 0x05,
  71. };
  72. struct cp2112_smbus_config_report {
  73. u8 report; /* CP2112_SMBUS_CONFIG */
  74. __be32 clock_speed; /* Hz */
  75. u8 device_address; /* Stored in the upper 7 bits */
  76. u8 auto_send_read; /* 1 = enabled, 0 = disabled */
  77. __be16 write_timeout; /* ms, 0 = no timeout */
  78. __be16 read_timeout; /* ms, 0 = no timeout */
  79. u8 scl_low_timeout; /* 1 = enabled, 0 = disabled */
  80. __be16 retry_time; /* # of retries, 0 = no limit */
  81. } __packed;
  82. struct cp2112_usb_config_report {
  83. u8 report; /* CP2112_USB_CONFIG */
  84. __le16 vid; /* Vendor ID */
  85. __le16 pid; /* Product ID */
  86. u8 max_power; /* Power requested in 2mA units */
  87. u8 power_mode; /* 0x00 = bus powered
  88. 0x01 = self powered & regulator off
  89. 0x02 = self powered & regulator on */
  90. u8 release_major;
  91. u8 release_minor;
  92. u8 mask; /* What fields to program */
  93. } __packed;
  94. struct cp2112_read_req_report {
  95. u8 report; /* CP2112_DATA_READ_REQUEST */
  96. u8 slave_address;
  97. __be16 length;
  98. } __packed;
  99. struct cp2112_write_read_req_report {
  100. u8 report; /* CP2112_DATA_WRITE_READ_REQUEST */
  101. u8 slave_address;
  102. __be16 length;
  103. u8 target_address_length;
  104. u8 target_address[16];
  105. } __packed;
  106. struct cp2112_write_req_report {
  107. u8 report; /* CP2112_DATA_WRITE_REQUEST */
  108. u8 slave_address;
  109. u8 length;
  110. u8 data[61];
  111. } __packed;
  112. struct cp2112_force_read_report {
  113. u8 report; /* CP2112_DATA_READ_FORCE_SEND */
  114. __be16 length;
  115. } __packed;
  116. struct cp2112_xfer_status_report {
  117. u8 report; /* CP2112_TRANSFER_STATUS_RESPONSE */
  118. u8 status0; /* STATUS0_* */
  119. u8 status1; /* STATUS1_* */
  120. __be16 retries;
  121. __be16 length;
  122. } __packed;
  123. struct cp2112_string_report {
  124. u8 dummy; /* force .string to be aligned */
  125. u8 report; /* CP2112_*_STRING */
  126. u8 length; /* length in bytes of everyting after .report */
  127. u8 type; /* USB_DT_STRING */
  128. wchar_t string[30]; /* UTF16_LITTLE_ENDIAN string */
  129. } __packed;
  130. /* Number of times to request transfer status before giving up waiting for a
  131. transfer to complete. This may need to be changed if SMBUS clock, retries,
  132. or read/write/scl_low timeout settings are changed. */
  133. static const int XFER_STATUS_RETRIES = 10;
  134. /* Time in ms to wait for a CP2112_DATA_READ_RESPONSE or
  135. CP2112_TRANSFER_STATUS_RESPONSE. */
  136. static const int RESPONSE_TIMEOUT = 50;
  137. static const struct hid_device_id cp2112_devices[] = {
  138. { HID_USB_DEVICE(USB_VENDOR_ID_CYGNAL, USB_DEVICE_ID_CYGNAL_CP2112) },
  139. { }
  140. };
  141. MODULE_DEVICE_TABLE(hid, cp2112_devices);
  142. struct cp2112_device {
  143. struct i2c_adapter adap;
  144. struct hid_device *hdev;
  145. wait_queue_head_t wait;
  146. u8 read_data[61];
  147. u8 read_length;
  148. u8 hwversion;
  149. int xfer_status;
  150. atomic_t read_avail;
  151. atomic_t xfer_avail;
  152. struct gpio_chip gc;
  153. u8 *in_out_buffer;
  154. struct mutex lock;
  155. struct gpio_desc *desc[8];
  156. bool gpio_poll;
  157. struct delayed_work gpio_poll_worker;
  158. unsigned long irq_mask;
  159. u8 gpio_prev_state;
  160. };
  161. static int gpio_push_pull = 0xFF;
  162. module_param(gpio_push_pull, int, S_IRUGO | S_IWUSR);
  163. MODULE_PARM_DESC(gpio_push_pull, "GPIO push-pull configuration bitmask");
  164. static int cp2112_gpio_direction_input(struct gpio_chip *chip, unsigned offset)
  165. {
  166. struct cp2112_device *dev = gpiochip_get_data(chip);
  167. struct hid_device *hdev = dev->hdev;
  168. u8 *buf = dev->in_out_buffer;
  169. int ret;
  170. mutex_lock(&dev->lock);
  171. ret = hid_hw_raw_request(hdev, CP2112_GPIO_CONFIG, buf,
  172. CP2112_GPIO_CONFIG_LENGTH, HID_FEATURE_REPORT,
  173. HID_REQ_GET_REPORT);
  174. if (ret != CP2112_GPIO_CONFIG_LENGTH) {
  175. hid_err(hdev, "error requesting GPIO config: %d\n", ret);
  176. if (ret >= 0)
  177. ret = -EIO;
  178. goto exit;
  179. }
  180. buf[1] &= ~(1 << offset);
  181. buf[2] = gpio_push_pull;
  182. ret = hid_hw_raw_request(hdev, CP2112_GPIO_CONFIG, buf,
  183. CP2112_GPIO_CONFIG_LENGTH, HID_FEATURE_REPORT,
  184. HID_REQ_SET_REPORT);
  185. if (ret != CP2112_GPIO_CONFIG_LENGTH) {
  186. hid_err(hdev, "error setting GPIO config: %d\n", ret);
  187. if (ret >= 0)
  188. ret = -EIO;
  189. goto exit;
  190. }
  191. ret = 0;
  192. exit:
  193. mutex_unlock(&dev->lock);
  194. return ret;
  195. }
  196. static void cp2112_gpio_set(struct gpio_chip *chip, unsigned offset, int value)
  197. {
  198. struct cp2112_device *dev = gpiochip_get_data(chip);
  199. struct hid_device *hdev = dev->hdev;
  200. u8 *buf = dev->in_out_buffer;
  201. int ret;
  202. mutex_lock(&dev->lock);
  203. buf[0] = CP2112_GPIO_SET;
  204. buf[1] = value ? 0xff : 0;
  205. buf[2] = 1 << offset;
  206. ret = hid_hw_raw_request(hdev, CP2112_GPIO_SET, buf,
  207. CP2112_GPIO_SET_LENGTH, HID_FEATURE_REPORT,
  208. HID_REQ_SET_REPORT);
  209. if (ret < 0)
  210. hid_err(hdev, "error setting GPIO values: %d\n", ret);
  211. mutex_unlock(&dev->lock);
  212. }
  213. static int cp2112_gpio_get_all(struct gpio_chip *chip)
  214. {
  215. struct cp2112_device *dev = gpiochip_get_data(chip);
  216. struct hid_device *hdev = dev->hdev;
  217. u8 *buf = dev->in_out_buffer;
  218. int ret;
  219. mutex_lock(&dev->lock);
  220. ret = hid_hw_raw_request(hdev, CP2112_GPIO_GET, buf,
  221. CP2112_GPIO_GET_LENGTH, HID_FEATURE_REPORT,
  222. HID_REQ_GET_REPORT);
  223. if (ret != CP2112_GPIO_GET_LENGTH) {
  224. hid_err(hdev, "error requesting GPIO values: %d\n", ret);
  225. ret = ret < 0 ? ret : -EIO;
  226. goto exit;
  227. }
  228. ret = buf[1];
  229. exit:
  230. mutex_unlock(&dev->lock);
  231. return ret;
  232. }
  233. static int cp2112_gpio_get(struct gpio_chip *chip, unsigned int offset)
  234. {
  235. int ret;
  236. ret = cp2112_gpio_get_all(chip);
  237. if (ret < 0)
  238. return ret;
  239. return (ret >> offset) & 1;
  240. }
  241. static int cp2112_gpio_direction_output(struct gpio_chip *chip,
  242. unsigned offset, int value)
  243. {
  244. struct cp2112_device *dev = gpiochip_get_data(chip);
  245. struct hid_device *hdev = dev->hdev;
  246. u8 *buf = dev->in_out_buffer;
  247. int ret;
  248. mutex_lock(&dev->lock);
  249. ret = hid_hw_raw_request(hdev, CP2112_GPIO_CONFIG, buf,
  250. CP2112_GPIO_CONFIG_LENGTH, HID_FEATURE_REPORT,
  251. HID_REQ_GET_REPORT);
  252. if (ret != CP2112_GPIO_CONFIG_LENGTH) {
  253. hid_err(hdev, "error requesting GPIO config: %d\n", ret);
  254. goto fail;
  255. }
  256. buf[1] |= 1 << offset;
  257. buf[2] = gpio_push_pull;
  258. ret = hid_hw_raw_request(hdev, CP2112_GPIO_CONFIG, buf,
  259. CP2112_GPIO_CONFIG_LENGTH, HID_FEATURE_REPORT,
  260. HID_REQ_SET_REPORT);
  261. if (ret < 0) {
  262. hid_err(hdev, "error setting GPIO config: %d\n", ret);
  263. goto fail;
  264. }
  265. mutex_unlock(&dev->lock);
  266. /*
  267. * Set gpio value when output direction is already set,
  268. * as specified in AN495, Rev. 0.2, cpt. 4.4
  269. */
  270. cp2112_gpio_set(chip, offset, value);
  271. return 0;
  272. fail:
  273. mutex_unlock(&dev->lock);
  274. return ret < 0 ? ret : -EIO;
  275. }
  276. static int cp2112_hid_get(struct hid_device *hdev, unsigned char report_number,
  277. u8 *data, size_t count, unsigned char report_type)
  278. {
  279. u8 *buf;
  280. int ret;
  281. buf = kmalloc(count, GFP_KERNEL);
  282. if (!buf)
  283. return -ENOMEM;
  284. ret = hid_hw_raw_request(hdev, report_number, buf, count,
  285. report_type, HID_REQ_GET_REPORT);
  286. memcpy(data, buf, count);
  287. kfree(buf);
  288. return ret;
  289. }
  290. static int cp2112_hid_output(struct hid_device *hdev, u8 *data, size_t count,
  291. unsigned char report_type)
  292. {
  293. u8 *buf;
  294. int ret;
  295. buf = kmemdup(data, count, GFP_KERNEL);
  296. if (!buf)
  297. return -ENOMEM;
  298. if (report_type == HID_OUTPUT_REPORT)
  299. ret = hid_hw_output_report(hdev, buf, count);
  300. else
  301. ret = hid_hw_raw_request(hdev, buf[0], buf, count, report_type,
  302. HID_REQ_SET_REPORT);
  303. kfree(buf);
  304. return ret;
  305. }
  306. static int cp2112_wait(struct cp2112_device *dev, atomic_t *avail)
  307. {
  308. int ret = 0;
  309. /* We have sent either a CP2112_TRANSFER_STATUS_REQUEST or a
  310. * CP2112_DATA_READ_FORCE_SEND and we are waiting for the response to
  311. * come in cp2112_raw_event or timeout. There will only be one of these
  312. * in flight at any one time. The timeout is extremely large and is a
  313. * last resort if the CP2112 has died. If we do timeout we don't expect
  314. * to receive the response which would cause data races, it's not like
  315. * we can do anything about it anyway.
  316. */
  317. ret = wait_event_interruptible_timeout(dev->wait,
  318. atomic_read(avail), msecs_to_jiffies(RESPONSE_TIMEOUT));
  319. if (-ERESTARTSYS == ret)
  320. return ret;
  321. if (!ret)
  322. return -ETIMEDOUT;
  323. atomic_set(avail, 0);
  324. return 0;
  325. }
  326. static int cp2112_xfer_status(struct cp2112_device *dev)
  327. {
  328. struct hid_device *hdev = dev->hdev;
  329. u8 buf[2];
  330. int ret;
  331. buf[0] = CP2112_TRANSFER_STATUS_REQUEST;
  332. buf[1] = 0x01;
  333. atomic_set(&dev->xfer_avail, 0);
  334. ret = cp2112_hid_output(hdev, buf, 2, HID_OUTPUT_REPORT);
  335. if (ret < 0) {
  336. hid_warn(hdev, "Error requesting status: %d\n", ret);
  337. return ret;
  338. }
  339. ret = cp2112_wait(dev, &dev->xfer_avail);
  340. if (ret)
  341. return ret;
  342. return dev->xfer_status;
  343. }
  344. static int cp2112_read(struct cp2112_device *dev, u8 *data, size_t size)
  345. {
  346. struct hid_device *hdev = dev->hdev;
  347. struct cp2112_force_read_report report;
  348. int ret;
  349. if (size > sizeof(dev->read_data))
  350. size = sizeof(dev->read_data);
  351. report.report = CP2112_DATA_READ_FORCE_SEND;
  352. report.length = cpu_to_be16(size);
  353. atomic_set(&dev->read_avail, 0);
  354. ret = cp2112_hid_output(hdev, &report.report, sizeof(report),
  355. HID_OUTPUT_REPORT);
  356. if (ret < 0) {
  357. hid_warn(hdev, "Error requesting data: %d\n", ret);
  358. return ret;
  359. }
  360. ret = cp2112_wait(dev, &dev->read_avail);
  361. if (ret)
  362. return ret;
  363. hid_dbg(hdev, "read %d of %zd bytes requested\n",
  364. dev->read_length, size);
  365. if (size > dev->read_length)
  366. size = dev->read_length;
  367. memcpy(data, dev->read_data, size);
  368. return dev->read_length;
  369. }
  370. static int cp2112_read_req(void *buf, u8 slave_address, u16 length)
  371. {
  372. struct cp2112_read_req_report *report = buf;
  373. if (length < 1 || length > 512)
  374. return -EINVAL;
  375. report->report = CP2112_DATA_READ_REQUEST;
  376. report->slave_address = slave_address << 1;
  377. report->length = cpu_to_be16(length);
  378. return sizeof(*report);
  379. }
  380. static int cp2112_write_read_req(void *buf, u8 slave_address, u16 length,
  381. u8 command, u8 *data, u8 data_length)
  382. {
  383. struct cp2112_write_read_req_report *report = buf;
  384. if (length < 1 || length > 512
  385. || data_length > sizeof(report->target_address) - 1)
  386. return -EINVAL;
  387. report->report = CP2112_DATA_WRITE_READ_REQUEST;
  388. report->slave_address = slave_address << 1;
  389. report->length = cpu_to_be16(length);
  390. report->target_address_length = data_length + 1;
  391. report->target_address[0] = command;
  392. memcpy(&report->target_address[1], data, data_length);
  393. return data_length + 6;
  394. }
  395. static int cp2112_write_req(void *buf, u8 slave_address, u8 command, u8 *data,
  396. u8 data_length)
  397. {
  398. struct cp2112_write_req_report *report = buf;
  399. if (data_length > sizeof(report->data) - 1)
  400. return -EINVAL;
  401. report->report = CP2112_DATA_WRITE_REQUEST;
  402. report->slave_address = slave_address << 1;
  403. report->length = data_length + 1;
  404. report->data[0] = command;
  405. memcpy(&report->data[1], data, data_length);
  406. return data_length + 4;
  407. }
  408. static int cp2112_i2c_write_req(void *buf, u8 slave_address, u8 *data,
  409. u8 data_length)
  410. {
  411. struct cp2112_write_req_report *report = buf;
  412. if (data_length > sizeof(report->data))
  413. return -EINVAL;
  414. report->report = CP2112_DATA_WRITE_REQUEST;
  415. report->slave_address = slave_address << 1;
  416. report->length = data_length;
  417. memcpy(report->data, data, data_length);
  418. return data_length + 3;
  419. }
  420. static int cp2112_i2c_write_read_req(void *buf, u8 slave_address,
  421. u8 *addr, int addr_length,
  422. int read_length)
  423. {
  424. struct cp2112_write_read_req_report *report = buf;
  425. if (read_length < 1 || read_length > 512 ||
  426. addr_length > sizeof(report->target_address))
  427. return -EINVAL;
  428. report->report = CP2112_DATA_WRITE_READ_REQUEST;
  429. report->slave_address = slave_address << 1;
  430. report->length = cpu_to_be16(read_length);
  431. report->target_address_length = addr_length;
  432. memcpy(report->target_address, addr, addr_length);
  433. return addr_length + 5;
  434. }
  435. static int cp2112_i2c_xfer(struct i2c_adapter *adap, struct i2c_msg *msgs,
  436. int num)
  437. {
  438. struct cp2112_device *dev = (struct cp2112_device *)adap->algo_data;
  439. struct hid_device *hdev = dev->hdev;
  440. u8 buf[64];
  441. ssize_t count;
  442. ssize_t read_length = 0;
  443. u8 *read_buf = NULL;
  444. unsigned int retries;
  445. int ret;
  446. hid_dbg(hdev, "I2C %d messages\n", num);
  447. if (num == 1) {
  448. if (msgs->flags & I2C_M_RD) {
  449. hid_dbg(hdev, "I2C read %#04x len %d\n",
  450. msgs->addr, msgs->len);
  451. read_length = msgs->len;
  452. read_buf = msgs->buf;
  453. count = cp2112_read_req(buf, msgs->addr, msgs->len);
  454. } else {
  455. hid_dbg(hdev, "I2C write %#04x len %d\n",
  456. msgs->addr, msgs->len);
  457. count = cp2112_i2c_write_req(buf, msgs->addr,
  458. msgs->buf, msgs->len);
  459. }
  460. if (count < 0)
  461. return count;
  462. } else if (dev->hwversion > 1 && /* no repeated start in rev 1 */
  463. num == 2 &&
  464. msgs[0].addr == msgs[1].addr &&
  465. !(msgs[0].flags & I2C_M_RD) && (msgs[1].flags & I2C_M_RD)) {
  466. hid_dbg(hdev, "I2C write-read %#04x wlen %d rlen %d\n",
  467. msgs[0].addr, msgs[0].len, msgs[1].len);
  468. read_length = msgs[1].len;
  469. read_buf = msgs[1].buf;
  470. count = cp2112_i2c_write_read_req(buf, msgs[0].addr,
  471. msgs[0].buf, msgs[0].len, msgs[1].len);
  472. if (count < 0)
  473. return count;
  474. } else {
  475. hid_err(hdev,
  476. "Multi-message I2C transactions not supported\n");
  477. return -EOPNOTSUPP;
  478. }
  479. ret = hid_hw_power(hdev, PM_HINT_FULLON);
  480. if (ret < 0) {
  481. hid_err(hdev, "power management error: %d\n", ret);
  482. return ret;
  483. }
  484. ret = cp2112_hid_output(hdev, buf, count, HID_OUTPUT_REPORT);
  485. if (ret < 0) {
  486. hid_warn(hdev, "Error starting transaction: %d\n", ret);
  487. goto power_normal;
  488. }
  489. for (retries = 0; retries < XFER_STATUS_RETRIES; ++retries) {
  490. ret = cp2112_xfer_status(dev);
  491. if (-EBUSY == ret)
  492. continue;
  493. if (ret < 0)
  494. goto power_normal;
  495. break;
  496. }
  497. if (XFER_STATUS_RETRIES <= retries) {
  498. hid_warn(hdev, "Transfer timed out, cancelling.\n");
  499. buf[0] = CP2112_CANCEL_TRANSFER;
  500. buf[1] = 0x01;
  501. ret = cp2112_hid_output(hdev, buf, 2, HID_OUTPUT_REPORT);
  502. if (ret < 0)
  503. hid_warn(hdev, "Error cancelling transaction: %d\n",
  504. ret);
  505. ret = -ETIMEDOUT;
  506. goto power_normal;
  507. }
  508. for (count = 0; count < read_length;) {
  509. ret = cp2112_read(dev, read_buf + count, read_length - count);
  510. if (ret < 0)
  511. goto power_normal;
  512. if (ret == 0) {
  513. hid_err(hdev, "read returned 0\n");
  514. ret = -EIO;
  515. goto power_normal;
  516. }
  517. count += ret;
  518. if (count > read_length) {
  519. /*
  520. * The hardware returned too much data.
  521. * This is mostly harmless because cp2112_read()
  522. * has a limit check so didn't overrun our
  523. * buffer. Nevertheless, we return an error
  524. * because something is seriously wrong and
  525. * it shouldn't go unnoticed.
  526. */
  527. hid_err(hdev, "long read: %d > %zd\n",
  528. ret, read_length - count + ret);
  529. ret = -EIO;
  530. goto power_normal;
  531. }
  532. }
  533. /* return the number of transferred messages */
  534. ret = num;
  535. power_normal:
  536. hid_hw_power(hdev, PM_HINT_NORMAL);
  537. hid_dbg(hdev, "I2C transfer finished: %d\n", ret);
  538. return ret;
  539. }
  540. static int cp2112_xfer(struct i2c_adapter *adap, u16 addr,
  541. unsigned short flags, char read_write, u8 command,
  542. int size, union i2c_smbus_data *data)
  543. {
  544. struct cp2112_device *dev = (struct cp2112_device *)adap->algo_data;
  545. struct hid_device *hdev = dev->hdev;
  546. u8 buf[64];
  547. __le16 word;
  548. ssize_t count;
  549. size_t read_length = 0;
  550. unsigned int retries;
  551. int ret;
  552. hid_dbg(hdev, "%s addr 0x%x flags 0x%x cmd 0x%x size %d\n",
  553. read_write == I2C_SMBUS_WRITE ? "write" : "read",
  554. addr, flags, command, size);
  555. switch (size) {
  556. case I2C_SMBUS_BYTE:
  557. read_length = 1;
  558. if (I2C_SMBUS_READ == read_write)
  559. count = cp2112_read_req(buf, addr, read_length);
  560. else
  561. count = cp2112_write_req(buf, addr, command, NULL,
  562. 0);
  563. break;
  564. case I2C_SMBUS_BYTE_DATA:
  565. read_length = 1;
  566. if (I2C_SMBUS_READ == read_write)
  567. count = cp2112_write_read_req(buf, addr, read_length,
  568. command, NULL, 0);
  569. else
  570. count = cp2112_write_req(buf, addr, command,
  571. &data->byte, 1);
  572. break;
  573. case I2C_SMBUS_WORD_DATA:
  574. read_length = 2;
  575. word = cpu_to_le16(data->word);
  576. if (I2C_SMBUS_READ == read_write)
  577. count = cp2112_write_read_req(buf, addr, read_length,
  578. command, NULL, 0);
  579. else
  580. count = cp2112_write_req(buf, addr, command,
  581. (u8 *)&word, 2);
  582. break;
  583. case I2C_SMBUS_PROC_CALL:
  584. size = I2C_SMBUS_WORD_DATA;
  585. read_write = I2C_SMBUS_READ;
  586. read_length = 2;
  587. word = cpu_to_le16(data->word);
  588. count = cp2112_write_read_req(buf, addr, read_length, command,
  589. (u8 *)&word, 2);
  590. break;
  591. case I2C_SMBUS_I2C_BLOCK_DATA:
  592. size = I2C_SMBUS_BLOCK_DATA;
  593. /* fallthrough */
  594. case I2C_SMBUS_BLOCK_DATA:
  595. if (I2C_SMBUS_READ == read_write) {
  596. count = cp2112_write_read_req(buf, addr,
  597. I2C_SMBUS_BLOCK_MAX,
  598. command, NULL, 0);
  599. } else {
  600. count = cp2112_write_req(buf, addr, command,
  601. data->block,
  602. data->block[0] + 1);
  603. }
  604. break;
  605. case I2C_SMBUS_BLOCK_PROC_CALL:
  606. size = I2C_SMBUS_BLOCK_DATA;
  607. read_write = I2C_SMBUS_READ;
  608. count = cp2112_write_read_req(buf, addr, I2C_SMBUS_BLOCK_MAX,
  609. command, data->block,
  610. data->block[0] + 1);
  611. break;
  612. default:
  613. hid_warn(hdev, "Unsupported transaction %d\n", size);
  614. return -EOPNOTSUPP;
  615. }
  616. if (count < 0)
  617. return count;
  618. ret = hid_hw_power(hdev, PM_HINT_FULLON);
  619. if (ret < 0) {
  620. hid_err(hdev, "power management error: %d\n", ret);
  621. return ret;
  622. }
  623. ret = cp2112_hid_output(hdev, buf, count, HID_OUTPUT_REPORT);
  624. if (ret < 0) {
  625. hid_warn(hdev, "Error starting transaction: %d\n", ret);
  626. goto power_normal;
  627. }
  628. for (retries = 0; retries < XFER_STATUS_RETRIES; ++retries) {
  629. ret = cp2112_xfer_status(dev);
  630. if (-EBUSY == ret)
  631. continue;
  632. if (ret < 0)
  633. goto power_normal;
  634. break;
  635. }
  636. if (XFER_STATUS_RETRIES <= retries) {
  637. hid_warn(hdev, "Transfer timed out, cancelling.\n");
  638. buf[0] = CP2112_CANCEL_TRANSFER;
  639. buf[1] = 0x01;
  640. ret = cp2112_hid_output(hdev, buf, 2, HID_OUTPUT_REPORT);
  641. if (ret < 0)
  642. hid_warn(hdev, "Error cancelling transaction: %d\n",
  643. ret);
  644. ret = -ETIMEDOUT;
  645. goto power_normal;
  646. }
  647. if (I2C_SMBUS_WRITE == read_write) {
  648. ret = 0;
  649. goto power_normal;
  650. }
  651. if (I2C_SMBUS_BLOCK_DATA == size)
  652. read_length = ret;
  653. ret = cp2112_read(dev, buf, read_length);
  654. if (ret < 0)
  655. goto power_normal;
  656. if (ret != read_length) {
  657. hid_warn(hdev, "short read: %d < %zd\n", ret, read_length);
  658. ret = -EIO;
  659. goto power_normal;
  660. }
  661. switch (size) {
  662. case I2C_SMBUS_BYTE:
  663. case I2C_SMBUS_BYTE_DATA:
  664. data->byte = buf[0];
  665. break;
  666. case I2C_SMBUS_WORD_DATA:
  667. data->word = le16_to_cpup((__le16 *)buf);
  668. break;
  669. case I2C_SMBUS_BLOCK_DATA:
  670. if (read_length > I2C_SMBUS_BLOCK_MAX) {
  671. ret = -EPROTO;
  672. goto power_normal;
  673. }
  674. memcpy(data->block, buf, read_length);
  675. break;
  676. }
  677. ret = 0;
  678. power_normal:
  679. hid_hw_power(hdev, PM_HINT_NORMAL);
  680. hid_dbg(hdev, "transfer finished: %d\n", ret);
  681. return ret;
  682. }
  683. static u32 cp2112_functionality(struct i2c_adapter *adap)
  684. {
  685. return I2C_FUNC_I2C |
  686. I2C_FUNC_SMBUS_BYTE |
  687. I2C_FUNC_SMBUS_BYTE_DATA |
  688. I2C_FUNC_SMBUS_WORD_DATA |
  689. I2C_FUNC_SMBUS_BLOCK_DATA |
  690. I2C_FUNC_SMBUS_I2C_BLOCK |
  691. I2C_FUNC_SMBUS_PROC_CALL |
  692. I2C_FUNC_SMBUS_BLOCK_PROC_CALL;
  693. }
  694. static const struct i2c_algorithm smbus_algorithm = {
  695. .master_xfer = cp2112_i2c_xfer,
  696. .smbus_xfer = cp2112_xfer,
  697. .functionality = cp2112_functionality,
  698. };
  699. static int cp2112_get_usb_config(struct hid_device *hdev,
  700. struct cp2112_usb_config_report *cfg)
  701. {
  702. int ret;
  703. ret = cp2112_hid_get(hdev, CP2112_USB_CONFIG, (u8 *)cfg, sizeof(*cfg),
  704. HID_FEATURE_REPORT);
  705. if (ret != sizeof(*cfg)) {
  706. hid_err(hdev, "error reading usb config: %d\n", ret);
  707. if (ret < 0)
  708. return ret;
  709. return -EIO;
  710. }
  711. return 0;
  712. }
  713. static int cp2112_set_usb_config(struct hid_device *hdev,
  714. struct cp2112_usb_config_report *cfg)
  715. {
  716. int ret;
  717. BUG_ON(cfg->report != CP2112_USB_CONFIG);
  718. ret = cp2112_hid_output(hdev, (u8 *)cfg, sizeof(*cfg),
  719. HID_FEATURE_REPORT);
  720. if (ret != sizeof(*cfg)) {
  721. hid_err(hdev, "error writing usb config: %d\n", ret);
  722. if (ret < 0)
  723. return ret;
  724. return -EIO;
  725. }
  726. return 0;
  727. }
  728. static void chmod_sysfs_attrs(struct hid_device *hdev);
  729. #define CP2112_CONFIG_ATTR(name, store, format, ...) \
  730. static ssize_t name##_store(struct device *kdev, \
  731. struct device_attribute *attr, const char *buf, \
  732. size_t count) \
  733. { \
  734. struct hid_device *hdev = to_hid_device(kdev); \
  735. struct cp2112_usb_config_report cfg; \
  736. int ret = cp2112_get_usb_config(hdev, &cfg); \
  737. if (ret) \
  738. return ret; \
  739. store; \
  740. ret = cp2112_set_usb_config(hdev, &cfg); \
  741. if (ret) \
  742. return ret; \
  743. chmod_sysfs_attrs(hdev); \
  744. return count; \
  745. } \
  746. static ssize_t name##_show(struct device *kdev, \
  747. struct device_attribute *attr, char *buf) \
  748. { \
  749. struct hid_device *hdev = to_hid_device(kdev); \
  750. struct cp2112_usb_config_report cfg; \
  751. int ret = cp2112_get_usb_config(hdev, &cfg); \
  752. if (ret) \
  753. return ret; \
  754. return scnprintf(buf, PAGE_SIZE, format, ##__VA_ARGS__); \
  755. } \
  756. static DEVICE_ATTR_RW(name);
  757. CP2112_CONFIG_ATTR(vendor_id, ({
  758. u16 vid;
  759. if (sscanf(buf, "%hi", &vid) != 1)
  760. return -EINVAL;
  761. cfg.vid = cpu_to_le16(vid);
  762. cfg.mask = 0x01;
  763. }), "0x%04x\n", le16_to_cpu(cfg.vid));
  764. CP2112_CONFIG_ATTR(product_id, ({
  765. u16 pid;
  766. if (sscanf(buf, "%hi", &pid) != 1)
  767. return -EINVAL;
  768. cfg.pid = cpu_to_le16(pid);
  769. cfg.mask = 0x02;
  770. }), "0x%04x\n", le16_to_cpu(cfg.pid));
  771. CP2112_CONFIG_ATTR(max_power, ({
  772. int mA;
  773. if (sscanf(buf, "%i", &mA) != 1)
  774. return -EINVAL;
  775. cfg.max_power = (mA + 1) / 2;
  776. cfg.mask = 0x04;
  777. }), "%u mA\n", cfg.max_power * 2);
  778. CP2112_CONFIG_ATTR(power_mode, ({
  779. if (sscanf(buf, "%hhi", &cfg.power_mode) != 1)
  780. return -EINVAL;
  781. cfg.mask = 0x08;
  782. }), "%u\n", cfg.power_mode);
  783. CP2112_CONFIG_ATTR(release_version, ({
  784. if (sscanf(buf, "%hhi.%hhi", &cfg.release_major, &cfg.release_minor)
  785. != 2)
  786. return -EINVAL;
  787. cfg.mask = 0x10;
  788. }), "%u.%u\n", cfg.release_major, cfg.release_minor);
  789. #undef CP2112_CONFIG_ATTR
  790. struct cp2112_pstring_attribute {
  791. struct device_attribute attr;
  792. unsigned char report;
  793. };
  794. static ssize_t pstr_store(struct device *kdev,
  795. struct device_attribute *kattr, const char *buf,
  796. size_t count)
  797. {
  798. struct hid_device *hdev = to_hid_device(kdev);
  799. struct cp2112_pstring_attribute *attr =
  800. container_of(kattr, struct cp2112_pstring_attribute, attr);
  801. struct cp2112_string_report report;
  802. int ret;
  803. memset(&report, 0, sizeof(report));
  804. ret = utf8s_to_utf16s(buf, count, UTF16_LITTLE_ENDIAN,
  805. report.string, ARRAY_SIZE(report.string));
  806. report.report = attr->report;
  807. report.length = ret * sizeof(report.string[0]) + 2;
  808. report.type = USB_DT_STRING;
  809. ret = cp2112_hid_output(hdev, &report.report, report.length + 1,
  810. HID_FEATURE_REPORT);
  811. if (ret != report.length + 1) {
  812. hid_err(hdev, "error writing %s string: %d\n", kattr->attr.name,
  813. ret);
  814. if (ret < 0)
  815. return ret;
  816. return -EIO;
  817. }
  818. chmod_sysfs_attrs(hdev);
  819. return count;
  820. }
  821. static ssize_t pstr_show(struct device *kdev,
  822. struct device_attribute *kattr, char *buf)
  823. {
  824. struct hid_device *hdev = to_hid_device(kdev);
  825. struct cp2112_pstring_attribute *attr =
  826. container_of(kattr, struct cp2112_pstring_attribute, attr);
  827. struct cp2112_string_report report;
  828. u8 length;
  829. int ret;
  830. ret = cp2112_hid_get(hdev, attr->report, &report.report,
  831. sizeof(report) - 1, HID_FEATURE_REPORT);
  832. if (ret < 3) {
  833. hid_err(hdev, "error reading %s string: %d\n", kattr->attr.name,
  834. ret);
  835. if (ret < 0)
  836. return ret;
  837. return -EIO;
  838. }
  839. if (report.length < 2) {
  840. hid_err(hdev, "invalid %s string length: %d\n",
  841. kattr->attr.name, report.length);
  842. return -EIO;
  843. }
  844. length = report.length > ret - 1 ? ret - 1 : report.length;
  845. length = (length - 2) / sizeof(report.string[0]);
  846. ret = utf16s_to_utf8s(report.string, length, UTF16_LITTLE_ENDIAN, buf,
  847. PAGE_SIZE - 1);
  848. buf[ret++] = '\n';
  849. return ret;
  850. }
  851. #define CP2112_PSTR_ATTR(name, _report) \
  852. static struct cp2112_pstring_attribute dev_attr_##name = { \
  853. .attr = __ATTR(name, (S_IWUSR | S_IRUGO), pstr_show, pstr_store), \
  854. .report = _report, \
  855. };
  856. CP2112_PSTR_ATTR(manufacturer, CP2112_MANUFACTURER_STRING);
  857. CP2112_PSTR_ATTR(product, CP2112_PRODUCT_STRING);
  858. CP2112_PSTR_ATTR(serial, CP2112_SERIAL_STRING);
  859. #undef CP2112_PSTR_ATTR
  860. static const struct attribute_group cp2112_attr_group = {
  861. .attrs = (struct attribute *[]){
  862. &dev_attr_vendor_id.attr,
  863. &dev_attr_product_id.attr,
  864. &dev_attr_max_power.attr,
  865. &dev_attr_power_mode.attr,
  866. &dev_attr_release_version.attr,
  867. &dev_attr_manufacturer.attr.attr,
  868. &dev_attr_product.attr.attr,
  869. &dev_attr_serial.attr.attr,
  870. NULL
  871. }
  872. };
  873. /* Chmoding our sysfs attributes is simply a way to expose which fields in the
  874. * PROM have already been programmed. We do not depend on this preventing
  875. * writing to these attributes since the CP2112 will simply ignore writes to
  876. * already-programmed fields. This is why there is no sense in fixing this
  877. * racy behaviour.
  878. */
  879. static void chmod_sysfs_attrs(struct hid_device *hdev)
  880. {
  881. struct attribute **attr;
  882. u8 buf[2];
  883. int ret;
  884. ret = cp2112_hid_get(hdev, CP2112_LOCK_BYTE, buf, sizeof(buf),
  885. HID_FEATURE_REPORT);
  886. if (ret != sizeof(buf)) {
  887. hid_err(hdev, "error reading lock byte: %d\n", ret);
  888. return;
  889. }
  890. for (attr = cp2112_attr_group.attrs; *attr; ++attr) {
  891. umode_t mode = (buf[1] & 1) ? S_IWUSR | S_IRUGO : S_IRUGO;
  892. ret = sysfs_chmod_file(&hdev->dev.kobj, *attr, mode);
  893. if (ret < 0)
  894. hid_err(hdev, "error chmoding sysfs file %s\n",
  895. (*attr)->name);
  896. buf[1] >>= 1;
  897. }
  898. }
  899. static void cp2112_gpio_irq_ack(struct irq_data *d)
  900. {
  901. }
  902. static void cp2112_gpio_irq_mask(struct irq_data *d)
  903. {
  904. struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
  905. struct cp2112_device *dev = gpiochip_get_data(gc);
  906. __clear_bit(d->hwirq, &dev->irq_mask);
  907. }
  908. static void cp2112_gpio_irq_unmask(struct irq_data *d)
  909. {
  910. struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
  911. struct cp2112_device *dev = gpiochip_get_data(gc);
  912. __set_bit(d->hwirq, &dev->irq_mask);
  913. }
  914. static void cp2112_gpio_poll_callback(struct work_struct *work)
  915. {
  916. struct cp2112_device *dev = container_of(work, struct cp2112_device,
  917. gpio_poll_worker.work);
  918. struct irq_data *d;
  919. u8 gpio_mask;
  920. u8 virqs = (u8)dev->irq_mask;
  921. u32 irq_type;
  922. int irq, virq, ret;
  923. ret = cp2112_gpio_get_all(&dev->gc);
  924. if (ret == -ENODEV) /* the hardware has been disconnected */
  925. return;
  926. if (ret < 0)
  927. goto exit;
  928. gpio_mask = ret;
  929. while (virqs) {
  930. virq = ffs(virqs) - 1;
  931. virqs &= ~BIT(virq);
  932. if (!dev->gc.to_irq)
  933. break;
  934. irq = dev->gc.to_irq(&dev->gc, virq);
  935. d = irq_get_irq_data(irq);
  936. if (!d)
  937. continue;
  938. irq_type = irqd_get_trigger_type(d);
  939. if (gpio_mask & BIT(virq)) {
  940. /* Level High */
  941. if (irq_type & IRQ_TYPE_LEVEL_HIGH)
  942. handle_nested_irq(irq);
  943. if ((irq_type & IRQ_TYPE_EDGE_RISING) &&
  944. !(dev->gpio_prev_state & BIT(virq)))
  945. handle_nested_irq(irq);
  946. } else {
  947. /* Level Low */
  948. if (irq_type & IRQ_TYPE_LEVEL_LOW)
  949. handle_nested_irq(irq);
  950. if ((irq_type & IRQ_TYPE_EDGE_FALLING) &&
  951. (dev->gpio_prev_state & BIT(virq)))
  952. handle_nested_irq(irq);
  953. }
  954. }
  955. dev->gpio_prev_state = gpio_mask;
  956. exit:
  957. if (dev->gpio_poll)
  958. schedule_delayed_work(&dev->gpio_poll_worker, 10);
  959. }
  960. static unsigned int cp2112_gpio_irq_startup(struct irq_data *d)
  961. {
  962. struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
  963. struct cp2112_device *dev = gpiochip_get_data(gc);
  964. INIT_DELAYED_WORK(&dev->gpio_poll_worker, cp2112_gpio_poll_callback);
  965. cp2112_gpio_direction_input(gc, d->hwirq);
  966. if (!dev->gpio_poll) {
  967. dev->gpio_poll = true;
  968. schedule_delayed_work(&dev->gpio_poll_worker, 0);
  969. }
  970. cp2112_gpio_irq_unmask(d);
  971. return 0;
  972. }
  973. static void cp2112_gpio_irq_shutdown(struct irq_data *d)
  974. {
  975. struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
  976. struct cp2112_device *dev = gpiochip_get_data(gc);
  977. cancel_delayed_work_sync(&dev->gpio_poll_worker);
  978. }
  979. static int cp2112_gpio_irq_type(struct irq_data *d, unsigned int type)
  980. {
  981. return 0;
  982. }
  983. static struct irq_chip cp2112_gpio_irqchip = {
  984. .name = "cp2112-gpio",
  985. .irq_startup = cp2112_gpio_irq_startup,
  986. .irq_shutdown = cp2112_gpio_irq_shutdown,
  987. .irq_ack = cp2112_gpio_irq_ack,
  988. .irq_mask = cp2112_gpio_irq_mask,
  989. .irq_unmask = cp2112_gpio_irq_unmask,
  990. .irq_set_type = cp2112_gpio_irq_type,
  991. };
  992. static int __maybe_unused cp2112_allocate_irq(struct cp2112_device *dev,
  993. int pin)
  994. {
  995. int ret;
  996. if (dev->desc[pin])
  997. return -EINVAL;
  998. dev->desc[pin] = gpiochip_request_own_desc(&dev->gc, pin,
  999. "HID/I2C:Event");
  1000. if (IS_ERR(dev->desc[pin])) {
  1001. dev_err(dev->gc.parent, "Failed to request GPIO\n");
  1002. return PTR_ERR(dev->desc[pin]);
  1003. }
  1004. ret = gpiochip_lock_as_irq(&dev->gc, pin);
  1005. if (ret) {
  1006. dev_err(dev->gc.parent, "Failed to lock GPIO as interrupt\n");
  1007. goto err_desc;
  1008. }
  1009. ret = gpiod_to_irq(dev->desc[pin]);
  1010. if (ret < 0) {
  1011. dev_err(dev->gc.parent, "Failed to translate GPIO to IRQ\n");
  1012. goto err_lock;
  1013. }
  1014. return ret;
  1015. err_lock:
  1016. gpiochip_unlock_as_irq(&dev->gc, pin);
  1017. err_desc:
  1018. gpiochip_free_own_desc(dev->desc[pin]);
  1019. dev->desc[pin] = NULL;
  1020. return ret;
  1021. }
  1022. static int cp2112_probe(struct hid_device *hdev, const struct hid_device_id *id)
  1023. {
  1024. struct cp2112_device *dev;
  1025. u8 buf[3];
  1026. struct cp2112_smbus_config_report config;
  1027. int ret;
  1028. dev = devm_kzalloc(&hdev->dev, sizeof(*dev), GFP_KERNEL);
  1029. if (!dev)
  1030. return -ENOMEM;
  1031. dev->in_out_buffer = devm_kzalloc(&hdev->dev, CP2112_REPORT_MAX_LENGTH,
  1032. GFP_KERNEL);
  1033. if (!dev->in_out_buffer)
  1034. return -ENOMEM;
  1035. mutex_init(&dev->lock);
  1036. ret = hid_parse(hdev);
  1037. if (ret) {
  1038. hid_err(hdev, "parse failed\n");
  1039. return ret;
  1040. }
  1041. ret = hid_hw_start(hdev, HID_CONNECT_HIDRAW);
  1042. if (ret) {
  1043. hid_err(hdev, "hw start failed\n");
  1044. return ret;
  1045. }
  1046. ret = hid_hw_open(hdev);
  1047. if (ret) {
  1048. hid_err(hdev, "hw open failed\n");
  1049. goto err_hid_stop;
  1050. }
  1051. ret = hid_hw_power(hdev, PM_HINT_FULLON);
  1052. if (ret < 0) {
  1053. hid_err(hdev, "power management error: %d\n", ret);
  1054. goto err_hid_close;
  1055. }
  1056. ret = cp2112_hid_get(hdev, CP2112_GET_VERSION_INFO, buf, sizeof(buf),
  1057. HID_FEATURE_REPORT);
  1058. if (ret != sizeof(buf)) {
  1059. hid_err(hdev, "error requesting version\n");
  1060. if (ret >= 0)
  1061. ret = -EIO;
  1062. goto err_power_normal;
  1063. }
  1064. hid_info(hdev, "Part Number: 0x%02X Device Version: 0x%02X\n",
  1065. buf[1], buf[2]);
  1066. ret = cp2112_hid_get(hdev, CP2112_SMBUS_CONFIG, (u8 *)&config,
  1067. sizeof(config), HID_FEATURE_REPORT);
  1068. if (ret != sizeof(config)) {
  1069. hid_err(hdev, "error requesting SMBus config\n");
  1070. if (ret >= 0)
  1071. ret = -EIO;
  1072. goto err_power_normal;
  1073. }
  1074. config.retry_time = cpu_to_be16(1);
  1075. ret = cp2112_hid_output(hdev, (u8 *)&config, sizeof(config),
  1076. HID_FEATURE_REPORT);
  1077. if (ret != sizeof(config)) {
  1078. hid_err(hdev, "error setting SMBus config\n");
  1079. if (ret >= 0)
  1080. ret = -EIO;
  1081. goto err_power_normal;
  1082. }
  1083. hid_set_drvdata(hdev, (void *)dev);
  1084. dev->hdev = hdev;
  1085. dev->adap.owner = THIS_MODULE;
  1086. dev->adap.class = I2C_CLASS_HWMON;
  1087. dev->adap.algo = &smbus_algorithm;
  1088. dev->adap.algo_data = dev;
  1089. dev->adap.dev.parent = &hdev->dev;
  1090. snprintf(dev->adap.name, sizeof(dev->adap.name),
  1091. "CP2112 SMBus Bridge on hidraw%d",
  1092. ((struct hidraw *)hdev->hidraw)->minor);
  1093. dev->hwversion = buf[2];
  1094. init_waitqueue_head(&dev->wait);
  1095. hid_device_io_start(hdev);
  1096. ret = i2c_add_adapter(&dev->adap);
  1097. hid_device_io_stop(hdev);
  1098. if (ret) {
  1099. hid_err(hdev, "error registering i2c adapter\n");
  1100. goto err_power_normal;
  1101. }
  1102. hid_dbg(hdev, "adapter registered\n");
  1103. dev->gc.label = "cp2112_gpio";
  1104. dev->gc.direction_input = cp2112_gpio_direction_input;
  1105. dev->gc.direction_output = cp2112_gpio_direction_output;
  1106. dev->gc.set = cp2112_gpio_set;
  1107. dev->gc.get = cp2112_gpio_get;
  1108. dev->gc.base = -1;
  1109. dev->gc.ngpio = 8;
  1110. dev->gc.can_sleep = 1;
  1111. dev->gc.parent = &hdev->dev;
  1112. ret = gpiochip_add_data(&dev->gc, dev);
  1113. if (ret < 0) {
  1114. hid_err(hdev, "error registering gpio chip\n");
  1115. goto err_free_i2c;
  1116. }
  1117. ret = sysfs_create_group(&hdev->dev.kobj, &cp2112_attr_group);
  1118. if (ret < 0) {
  1119. hid_err(hdev, "error creating sysfs attrs\n");
  1120. goto err_gpiochip_remove;
  1121. }
  1122. chmod_sysfs_attrs(hdev);
  1123. hid_hw_power(hdev, PM_HINT_NORMAL);
  1124. ret = gpiochip_irqchip_add(&dev->gc, &cp2112_gpio_irqchip, 0,
  1125. handle_simple_irq, IRQ_TYPE_NONE);
  1126. if (ret) {
  1127. dev_err(dev->gc.parent, "failed to add IRQ chip\n");
  1128. goto err_sysfs_remove;
  1129. }
  1130. return ret;
  1131. err_sysfs_remove:
  1132. sysfs_remove_group(&hdev->dev.kobj, &cp2112_attr_group);
  1133. err_gpiochip_remove:
  1134. gpiochip_remove(&dev->gc);
  1135. err_free_i2c:
  1136. i2c_del_adapter(&dev->adap);
  1137. err_power_normal:
  1138. hid_hw_power(hdev, PM_HINT_NORMAL);
  1139. err_hid_close:
  1140. hid_hw_close(hdev);
  1141. err_hid_stop:
  1142. hid_hw_stop(hdev);
  1143. return ret;
  1144. }
  1145. static void cp2112_remove(struct hid_device *hdev)
  1146. {
  1147. struct cp2112_device *dev = hid_get_drvdata(hdev);
  1148. int i;
  1149. sysfs_remove_group(&hdev->dev.kobj, &cp2112_attr_group);
  1150. i2c_del_adapter(&dev->adap);
  1151. if (dev->gpio_poll) {
  1152. dev->gpio_poll = false;
  1153. cancel_delayed_work_sync(&dev->gpio_poll_worker);
  1154. }
  1155. for (i = 0; i < ARRAY_SIZE(dev->desc); i++) {
  1156. gpiochip_unlock_as_irq(&dev->gc, i);
  1157. gpiochip_free_own_desc(dev->desc[i]);
  1158. }
  1159. gpiochip_remove(&dev->gc);
  1160. /* i2c_del_adapter has finished removing all i2c devices from our
  1161. * adapter. Well behaved devices should no longer call our cp2112_xfer
  1162. * and should have waited for any pending calls to finish. It has also
  1163. * waited for device_unregister(&adap->dev) to complete. Therefore we
  1164. * can safely free our struct cp2112_device.
  1165. */
  1166. hid_hw_close(hdev);
  1167. hid_hw_stop(hdev);
  1168. }
  1169. static int cp2112_raw_event(struct hid_device *hdev, struct hid_report *report,
  1170. u8 *data, int size)
  1171. {
  1172. struct cp2112_device *dev = hid_get_drvdata(hdev);
  1173. struct cp2112_xfer_status_report *xfer = (void *)data;
  1174. switch (data[0]) {
  1175. case CP2112_TRANSFER_STATUS_RESPONSE:
  1176. hid_dbg(hdev, "xfer status: %02x %02x %04x %04x\n",
  1177. xfer->status0, xfer->status1,
  1178. be16_to_cpu(xfer->retries), be16_to_cpu(xfer->length));
  1179. switch (xfer->status0) {
  1180. case STATUS0_IDLE:
  1181. dev->xfer_status = -EAGAIN;
  1182. break;
  1183. case STATUS0_BUSY:
  1184. dev->xfer_status = -EBUSY;
  1185. break;
  1186. case STATUS0_COMPLETE:
  1187. dev->xfer_status = be16_to_cpu(xfer->length);
  1188. break;
  1189. case STATUS0_ERROR:
  1190. switch (xfer->status1) {
  1191. case STATUS1_TIMEOUT_NACK:
  1192. case STATUS1_TIMEOUT_BUS:
  1193. dev->xfer_status = -ETIMEDOUT;
  1194. break;
  1195. default:
  1196. dev->xfer_status = -EIO;
  1197. break;
  1198. }
  1199. break;
  1200. default:
  1201. dev->xfer_status = -EINVAL;
  1202. break;
  1203. }
  1204. atomic_set(&dev->xfer_avail, 1);
  1205. break;
  1206. case CP2112_DATA_READ_RESPONSE:
  1207. hid_dbg(hdev, "read response: %02x %02x\n", data[1], data[2]);
  1208. dev->read_length = data[2];
  1209. if (dev->read_length > sizeof(dev->read_data))
  1210. dev->read_length = sizeof(dev->read_data);
  1211. memcpy(dev->read_data, &data[3], dev->read_length);
  1212. atomic_set(&dev->read_avail, 1);
  1213. break;
  1214. default:
  1215. hid_err(hdev, "unknown report\n");
  1216. return 0;
  1217. }
  1218. wake_up_interruptible(&dev->wait);
  1219. return 1;
  1220. }
  1221. static struct hid_driver cp2112_driver = {
  1222. .name = "cp2112",
  1223. .id_table = cp2112_devices,
  1224. .probe = cp2112_probe,
  1225. .remove = cp2112_remove,
  1226. .raw_event = cp2112_raw_event,
  1227. };
  1228. module_hid_driver(cp2112_driver);
  1229. MODULE_DESCRIPTION("Silicon Labs HID USB to SMBus master bridge");
  1230. MODULE_AUTHOR("David Barksdale <dbarksdale@uplogix.com>");
  1231. MODULE_LICENSE("GPL");