dmaengine.c 32 KB

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  1. /*
  2. * Copyright(c) 2004 - 2006 Intel Corporation. All rights reserved.
  3. *
  4. * This program is free software; you can redistribute it and/or modify it
  5. * under the terms of the GNU General Public License as published by the Free
  6. * Software Foundation; either version 2 of the License, or (at your option)
  7. * any later version.
  8. *
  9. * This program is distributed in the hope that it will be useful, but WITHOUT
  10. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  12. * more details.
  13. *
  14. * The full GNU General Public License is included in this distribution in the
  15. * file called COPYING.
  16. */
  17. /*
  18. * This code implements the DMA subsystem. It provides a HW-neutral interface
  19. * for other kernel code to use asynchronous memory copy capabilities,
  20. * if present, and allows different HW DMA drivers to register as providing
  21. * this capability.
  22. *
  23. * Due to the fact we are accelerating what is already a relatively fast
  24. * operation, the code goes to great lengths to avoid additional overhead,
  25. * such as locking.
  26. *
  27. * LOCKING:
  28. *
  29. * The subsystem keeps a global list of dma_device structs it is protected by a
  30. * mutex, dma_list_mutex.
  31. *
  32. * A subsystem can get access to a channel by calling dmaengine_get() followed
  33. * by dma_find_channel(), or if it has need for an exclusive channel it can call
  34. * dma_request_channel(). Once a channel is allocated a reference is taken
  35. * against its corresponding driver to disable removal.
  36. *
  37. * Each device has a channels list, which runs unlocked but is never modified
  38. * once the device is registered, it's just setup by the driver.
  39. *
  40. * See Documentation/dmaengine.txt for more details
  41. */
  42. #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  43. #include <linux/platform_device.h>
  44. #include <linux/dma-mapping.h>
  45. #include <linux/init.h>
  46. #include <linux/module.h>
  47. #include <linux/mm.h>
  48. #include <linux/device.h>
  49. #include <linux/dmaengine.h>
  50. #include <linux/hardirq.h>
  51. #include <linux/spinlock.h>
  52. #include <linux/percpu.h>
  53. #include <linux/rcupdate.h>
  54. #include <linux/mutex.h>
  55. #include <linux/jiffies.h>
  56. #include <linux/rculist.h>
  57. #include <linux/idr.h>
  58. #include <linux/slab.h>
  59. #include <linux/acpi.h>
  60. #include <linux/acpi_dma.h>
  61. #include <linux/of_dma.h>
  62. #include <linux/mempool.h>
  63. static DEFINE_MUTEX(dma_list_mutex);
  64. static DEFINE_IDR(dma_idr);
  65. static LIST_HEAD(dma_device_list);
  66. static long dmaengine_ref_count;
  67. /* --- sysfs implementation --- */
  68. /**
  69. * dev_to_dma_chan - convert a device pointer to the its sysfs container object
  70. * @dev - device node
  71. *
  72. * Must be called under dma_list_mutex
  73. */
  74. static struct dma_chan *dev_to_dma_chan(struct device *dev)
  75. {
  76. struct dma_chan_dev *chan_dev;
  77. chan_dev = container_of(dev, typeof(*chan_dev), device);
  78. return chan_dev->chan;
  79. }
  80. static ssize_t memcpy_count_show(struct device *dev,
  81. struct device_attribute *attr, char *buf)
  82. {
  83. struct dma_chan *chan;
  84. unsigned long count = 0;
  85. int i;
  86. int err;
  87. mutex_lock(&dma_list_mutex);
  88. chan = dev_to_dma_chan(dev);
  89. if (chan) {
  90. for_each_possible_cpu(i)
  91. count += per_cpu_ptr(chan->local, i)->memcpy_count;
  92. err = sprintf(buf, "%lu\n", count);
  93. } else
  94. err = -ENODEV;
  95. mutex_unlock(&dma_list_mutex);
  96. return err;
  97. }
  98. static DEVICE_ATTR_RO(memcpy_count);
  99. static ssize_t bytes_transferred_show(struct device *dev,
  100. struct device_attribute *attr, char *buf)
  101. {
  102. struct dma_chan *chan;
  103. unsigned long count = 0;
  104. int i;
  105. int err;
  106. mutex_lock(&dma_list_mutex);
  107. chan = dev_to_dma_chan(dev);
  108. if (chan) {
  109. for_each_possible_cpu(i)
  110. count += per_cpu_ptr(chan->local, i)->bytes_transferred;
  111. err = sprintf(buf, "%lu\n", count);
  112. } else
  113. err = -ENODEV;
  114. mutex_unlock(&dma_list_mutex);
  115. return err;
  116. }
  117. static DEVICE_ATTR_RO(bytes_transferred);
  118. static ssize_t in_use_show(struct device *dev, struct device_attribute *attr,
  119. char *buf)
  120. {
  121. struct dma_chan *chan;
  122. int err;
  123. mutex_lock(&dma_list_mutex);
  124. chan = dev_to_dma_chan(dev);
  125. if (chan)
  126. err = sprintf(buf, "%d\n", chan->client_count);
  127. else
  128. err = -ENODEV;
  129. mutex_unlock(&dma_list_mutex);
  130. return err;
  131. }
  132. static DEVICE_ATTR_RO(in_use);
  133. static struct attribute *dma_dev_attrs[] = {
  134. &dev_attr_memcpy_count.attr,
  135. &dev_attr_bytes_transferred.attr,
  136. &dev_attr_in_use.attr,
  137. NULL,
  138. };
  139. ATTRIBUTE_GROUPS(dma_dev);
  140. static void chan_dev_release(struct device *dev)
  141. {
  142. struct dma_chan_dev *chan_dev;
  143. chan_dev = container_of(dev, typeof(*chan_dev), device);
  144. if (atomic_dec_and_test(chan_dev->idr_ref)) {
  145. mutex_lock(&dma_list_mutex);
  146. idr_remove(&dma_idr, chan_dev->dev_id);
  147. mutex_unlock(&dma_list_mutex);
  148. kfree(chan_dev->idr_ref);
  149. }
  150. kfree(chan_dev);
  151. }
  152. static struct class dma_devclass = {
  153. .name = "dma",
  154. .dev_groups = dma_dev_groups,
  155. .dev_release = chan_dev_release,
  156. };
  157. /* --- client and device registration --- */
  158. #define dma_device_satisfies_mask(device, mask) \
  159. __dma_device_satisfies_mask((device), &(mask))
  160. static int
  161. __dma_device_satisfies_mask(struct dma_device *device,
  162. const dma_cap_mask_t *want)
  163. {
  164. dma_cap_mask_t has;
  165. bitmap_and(has.bits, want->bits, device->cap_mask.bits,
  166. DMA_TX_TYPE_END);
  167. return bitmap_equal(want->bits, has.bits, DMA_TX_TYPE_END);
  168. }
  169. static struct module *dma_chan_to_owner(struct dma_chan *chan)
  170. {
  171. return chan->device->dev->driver->owner;
  172. }
  173. /**
  174. * balance_ref_count - catch up the channel reference count
  175. * @chan - channel to balance ->client_count versus dmaengine_ref_count
  176. *
  177. * balance_ref_count must be called under dma_list_mutex
  178. */
  179. static void balance_ref_count(struct dma_chan *chan)
  180. {
  181. struct module *owner = dma_chan_to_owner(chan);
  182. while (chan->client_count < dmaengine_ref_count) {
  183. __module_get(owner);
  184. chan->client_count++;
  185. }
  186. }
  187. /**
  188. * dma_chan_get - try to grab a dma channel's parent driver module
  189. * @chan - channel to grab
  190. *
  191. * Must be called under dma_list_mutex
  192. */
  193. static int dma_chan_get(struct dma_chan *chan)
  194. {
  195. struct module *owner = dma_chan_to_owner(chan);
  196. int ret;
  197. /* The channel is already in use, update client count */
  198. if (chan->client_count) {
  199. __module_get(owner);
  200. goto out;
  201. }
  202. if (!try_module_get(owner))
  203. return -ENODEV;
  204. /* allocate upon first client reference */
  205. if (chan->device->device_alloc_chan_resources) {
  206. ret = chan->device->device_alloc_chan_resources(chan);
  207. if (ret < 0)
  208. goto err_out;
  209. }
  210. if (!dma_has_cap(DMA_PRIVATE, chan->device->cap_mask))
  211. balance_ref_count(chan);
  212. out:
  213. chan->client_count++;
  214. return 0;
  215. err_out:
  216. module_put(owner);
  217. return ret;
  218. }
  219. /**
  220. * dma_chan_put - drop a reference to a dma channel's parent driver module
  221. * @chan - channel to release
  222. *
  223. * Must be called under dma_list_mutex
  224. */
  225. static void dma_chan_put(struct dma_chan *chan)
  226. {
  227. /* This channel is not in use, bail out */
  228. if (!chan->client_count)
  229. return;
  230. chan->client_count--;
  231. module_put(dma_chan_to_owner(chan));
  232. /* This channel is not in use anymore, free it */
  233. if (!chan->client_count && chan->device->device_free_chan_resources)
  234. chan->device->device_free_chan_resources(chan);
  235. /* If the channel is used via a DMA request router, free the mapping */
  236. if (chan->router && chan->router->route_free) {
  237. chan->router->route_free(chan->router->dev, chan->route_data);
  238. chan->router = NULL;
  239. chan->route_data = NULL;
  240. }
  241. }
  242. enum dma_status dma_sync_wait(struct dma_chan *chan, dma_cookie_t cookie)
  243. {
  244. enum dma_status status;
  245. unsigned long dma_sync_wait_timeout = jiffies + msecs_to_jiffies(5000);
  246. dma_async_issue_pending(chan);
  247. do {
  248. status = dma_async_is_tx_complete(chan, cookie, NULL, NULL);
  249. if (time_after_eq(jiffies, dma_sync_wait_timeout)) {
  250. pr_err("%s: timeout!\n", __func__);
  251. return DMA_ERROR;
  252. }
  253. if (status != DMA_IN_PROGRESS)
  254. break;
  255. cpu_relax();
  256. } while (1);
  257. return status;
  258. }
  259. EXPORT_SYMBOL(dma_sync_wait);
  260. /**
  261. * dma_cap_mask_all - enable iteration over all operation types
  262. */
  263. static dma_cap_mask_t dma_cap_mask_all;
  264. /**
  265. * dma_chan_tbl_ent - tracks channel allocations per core/operation
  266. * @chan - associated channel for this entry
  267. */
  268. struct dma_chan_tbl_ent {
  269. struct dma_chan *chan;
  270. };
  271. /**
  272. * channel_table - percpu lookup table for memory-to-memory offload providers
  273. */
  274. static struct dma_chan_tbl_ent __percpu *channel_table[DMA_TX_TYPE_END];
  275. static int __init dma_channel_table_init(void)
  276. {
  277. enum dma_transaction_type cap;
  278. int err = 0;
  279. bitmap_fill(dma_cap_mask_all.bits, DMA_TX_TYPE_END);
  280. /* 'interrupt', 'private', and 'slave' are channel capabilities,
  281. * but are not associated with an operation so they do not need
  282. * an entry in the channel_table
  283. */
  284. clear_bit(DMA_INTERRUPT, dma_cap_mask_all.bits);
  285. clear_bit(DMA_PRIVATE, dma_cap_mask_all.bits);
  286. clear_bit(DMA_SLAVE, dma_cap_mask_all.bits);
  287. for_each_dma_cap_mask(cap, dma_cap_mask_all) {
  288. channel_table[cap] = alloc_percpu(struct dma_chan_tbl_ent);
  289. if (!channel_table[cap]) {
  290. err = -ENOMEM;
  291. break;
  292. }
  293. }
  294. if (err) {
  295. pr_err("initialization failure\n");
  296. for_each_dma_cap_mask(cap, dma_cap_mask_all)
  297. free_percpu(channel_table[cap]);
  298. }
  299. return err;
  300. }
  301. arch_initcall(dma_channel_table_init);
  302. /**
  303. * dma_find_channel - find a channel to carry out the operation
  304. * @tx_type: transaction type
  305. */
  306. struct dma_chan *dma_find_channel(enum dma_transaction_type tx_type)
  307. {
  308. return this_cpu_read(channel_table[tx_type]->chan);
  309. }
  310. EXPORT_SYMBOL(dma_find_channel);
  311. /**
  312. * dma_issue_pending_all - flush all pending operations across all channels
  313. */
  314. void dma_issue_pending_all(void)
  315. {
  316. struct dma_device *device;
  317. struct dma_chan *chan;
  318. rcu_read_lock();
  319. list_for_each_entry_rcu(device, &dma_device_list, global_node) {
  320. if (dma_has_cap(DMA_PRIVATE, device->cap_mask))
  321. continue;
  322. list_for_each_entry(chan, &device->channels, device_node)
  323. if (chan->client_count)
  324. device->device_issue_pending(chan);
  325. }
  326. rcu_read_unlock();
  327. }
  328. EXPORT_SYMBOL(dma_issue_pending_all);
  329. /**
  330. * dma_chan_is_local - returns true if the channel is in the same numa-node as the cpu
  331. */
  332. static bool dma_chan_is_local(struct dma_chan *chan, int cpu)
  333. {
  334. int node = dev_to_node(chan->device->dev);
  335. return node == -1 || cpumask_test_cpu(cpu, cpumask_of_node(node));
  336. }
  337. /**
  338. * min_chan - returns the channel with min count and in the same numa-node as the cpu
  339. * @cap: capability to match
  340. * @cpu: cpu index which the channel should be close to
  341. *
  342. * If some channels are close to the given cpu, the one with the lowest
  343. * reference count is returned. Otherwise, cpu is ignored and only the
  344. * reference count is taken into account.
  345. * Must be called under dma_list_mutex.
  346. */
  347. static struct dma_chan *min_chan(enum dma_transaction_type cap, int cpu)
  348. {
  349. struct dma_device *device;
  350. struct dma_chan *chan;
  351. struct dma_chan *min = NULL;
  352. struct dma_chan *localmin = NULL;
  353. list_for_each_entry(device, &dma_device_list, global_node) {
  354. if (!dma_has_cap(cap, device->cap_mask) ||
  355. dma_has_cap(DMA_PRIVATE, device->cap_mask))
  356. continue;
  357. list_for_each_entry(chan, &device->channels, device_node) {
  358. if (!chan->client_count)
  359. continue;
  360. if (!min || chan->table_count < min->table_count)
  361. min = chan;
  362. if (dma_chan_is_local(chan, cpu))
  363. if (!localmin ||
  364. chan->table_count < localmin->table_count)
  365. localmin = chan;
  366. }
  367. }
  368. chan = localmin ? localmin : min;
  369. if (chan)
  370. chan->table_count++;
  371. return chan;
  372. }
  373. /**
  374. * dma_channel_rebalance - redistribute the available channels
  375. *
  376. * Optimize for cpu isolation (each cpu gets a dedicated channel for an
  377. * operation type) in the SMP case, and operation isolation (avoid
  378. * multi-tasking channels) in the non-SMP case. Must be called under
  379. * dma_list_mutex.
  380. */
  381. static void dma_channel_rebalance(void)
  382. {
  383. struct dma_chan *chan;
  384. struct dma_device *device;
  385. int cpu;
  386. int cap;
  387. /* undo the last distribution */
  388. for_each_dma_cap_mask(cap, dma_cap_mask_all)
  389. for_each_possible_cpu(cpu)
  390. per_cpu_ptr(channel_table[cap], cpu)->chan = NULL;
  391. list_for_each_entry(device, &dma_device_list, global_node) {
  392. if (dma_has_cap(DMA_PRIVATE, device->cap_mask))
  393. continue;
  394. list_for_each_entry(chan, &device->channels, device_node)
  395. chan->table_count = 0;
  396. }
  397. /* don't populate the channel_table if no clients are available */
  398. if (!dmaengine_ref_count)
  399. return;
  400. /* redistribute available channels */
  401. for_each_dma_cap_mask(cap, dma_cap_mask_all)
  402. for_each_online_cpu(cpu) {
  403. chan = min_chan(cap, cpu);
  404. per_cpu_ptr(channel_table[cap], cpu)->chan = chan;
  405. }
  406. }
  407. int dma_get_slave_caps(struct dma_chan *chan, struct dma_slave_caps *caps)
  408. {
  409. struct dma_device *device;
  410. if (!chan || !caps)
  411. return -EINVAL;
  412. device = chan->device;
  413. /* check if the channel supports slave transactions */
  414. if (!test_bit(DMA_SLAVE, device->cap_mask.bits))
  415. return -ENXIO;
  416. /*
  417. * Check whether it reports it uses the generic slave
  418. * capabilities, if not, that means it doesn't support any
  419. * kind of slave capabilities reporting.
  420. */
  421. if (!device->directions)
  422. return -ENXIO;
  423. caps->src_addr_widths = device->src_addr_widths;
  424. caps->dst_addr_widths = device->dst_addr_widths;
  425. caps->directions = device->directions;
  426. caps->residue_granularity = device->residue_granularity;
  427. caps->descriptor_reuse = device->descriptor_reuse;
  428. /*
  429. * Some devices implement only pause (e.g. to get residuum) but no
  430. * resume. However cmd_pause is advertised as pause AND resume.
  431. */
  432. caps->cmd_pause = !!(device->device_pause && device->device_resume);
  433. caps->cmd_terminate = !!device->device_terminate_all;
  434. return 0;
  435. }
  436. EXPORT_SYMBOL_GPL(dma_get_slave_caps);
  437. static struct dma_chan *private_candidate(const dma_cap_mask_t *mask,
  438. struct dma_device *dev,
  439. dma_filter_fn fn, void *fn_param)
  440. {
  441. struct dma_chan *chan;
  442. if (mask && !__dma_device_satisfies_mask(dev, mask)) {
  443. pr_debug("%s: wrong capabilities\n", __func__);
  444. return NULL;
  445. }
  446. /* devices with multiple channels need special handling as we need to
  447. * ensure that all channels are either private or public.
  448. */
  449. if (dev->chancnt > 1 && !dma_has_cap(DMA_PRIVATE, dev->cap_mask))
  450. list_for_each_entry(chan, &dev->channels, device_node) {
  451. /* some channels are already publicly allocated */
  452. if (chan->client_count)
  453. return NULL;
  454. }
  455. list_for_each_entry(chan, &dev->channels, device_node) {
  456. if (chan->client_count) {
  457. pr_debug("%s: %s busy\n",
  458. __func__, dma_chan_name(chan));
  459. continue;
  460. }
  461. if (fn && !fn(chan, fn_param)) {
  462. pr_debug("%s: %s filter said false\n",
  463. __func__, dma_chan_name(chan));
  464. continue;
  465. }
  466. return chan;
  467. }
  468. return NULL;
  469. }
  470. static struct dma_chan *find_candidate(struct dma_device *device,
  471. const dma_cap_mask_t *mask,
  472. dma_filter_fn fn, void *fn_param)
  473. {
  474. struct dma_chan *chan = private_candidate(mask, device, fn, fn_param);
  475. int err;
  476. if (chan) {
  477. /* Found a suitable channel, try to grab, prep, and return it.
  478. * We first set DMA_PRIVATE to disable balance_ref_count as this
  479. * channel will not be published in the general-purpose
  480. * allocator
  481. */
  482. dma_cap_set(DMA_PRIVATE, device->cap_mask);
  483. device->privatecnt++;
  484. err = dma_chan_get(chan);
  485. if (err) {
  486. if (err == -ENODEV) {
  487. pr_debug("%s: %s module removed\n", __func__,
  488. dma_chan_name(chan));
  489. list_del_rcu(&device->global_node);
  490. } else
  491. pr_debug("%s: failed to get %s: (%d)\n",
  492. __func__, dma_chan_name(chan), err);
  493. if (--device->privatecnt == 0)
  494. dma_cap_clear(DMA_PRIVATE, device->cap_mask);
  495. chan = ERR_PTR(err);
  496. }
  497. }
  498. return chan ? chan : ERR_PTR(-EPROBE_DEFER);
  499. }
  500. /**
  501. * dma_get_slave_channel - try to get specific channel exclusively
  502. * @chan: target channel
  503. */
  504. struct dma_chan *dma_get_slave_channel(struct dma_chan *chan)
  505. {
  506. int err = -EBUSY;
  507. /* lock against __dma_request_channel */
  508. mutex_lock(&dma_list_mutex);
  509. if (chan->client_count == 0) {
  510. struct dma_device *device = chan->device;
  511. dma_cap_set(DMA_PRIVATE, device->cap_mask);
  512. device->privatecnt++;
  513. err = dma_chan_get(chan);
  514. if (err) {
  515. pr_debug("%s: failed to get %s: (%d)\n",
  516. __func__, dma_chan_name(chan), err);
  517. chan = NULL;
  518. if (--device->privatecnt == 0)
  519. dma_cap_clear(DMA_PRIVATE, device->cap_mask);
  520. }
  521. } else
  522. chan = NULL;
  523. mutex_unlock(&dma_list_mutex);
  524. return chan;
  525. }
  526. EXPORT_SYMBOL_GPL(dma_get_slave_channel);
  527. struct dma_chan *dma_get_any_slave_channel(struct dma_device *device)
  528. {
  529. dma_cap_mask_t mask;
  530. struct dma_chan *chan;
  531. dma_cap_zero(mask);
  532. dma_cap_set(DMA_SLAVE, mask);
  533. /* lock against __dma_request_channel */
  534. mutex_lock(&dma_list_mutex);
  535. chan = find_candidate(device, &mask, NULL, NULL);
  536. mutex_unlock(&dma_list_mutex);
  537. return IS_ERR(chan) ? NULL : chan;
  538. }
  539. EXPORT_SYMBOL_GPL(dma_get_any_slave_channel);
  540. /**
  541. * __dma_request_channel - try to allocate an exclusive channel
  542. * @mask: capabilities that the channel must satisfy
  543. * @fn: optional callback to disposition available channels
  544. * @fn_param: opaque parameter to pass to dma_filter_fn
  545. *
  546. * Returns pointer to appropriate DMA channel on success or NULL.
  547. */
  548. struct dma_chan *__dma_request_channel(const dma_cap_mask_t *mask,
  549. dma_filter_fn fn, void *fn_param)
  550. {
  551. struct dma_device *device, *_d;
  552. struct dma_chan *chan = NULL;
  553. /* Find a channel */
  554. mutex_lock(&dma_list_mutex);
  555. list_for_each_entry_safe(device, _d, &dma_device_list, global_node) {
  556. chan = find_candidate(device, mask, fn, fn_param);
  557. if (!IS_ERR(chan))
  558. break;
  559. chan = NULL;
  560. }
  561. mutex_unlock(&dma_list_mutex);
  562. pr_debug("%s: %s (%s)\n",
  563. __func__,
  564. chan ? "success" : "fail",
  565. chan ? dma_chan_name(chan) : NULL);
  566. return chan;
  567. }
  568. EXPORT_SYMBOL_GPL(__dma_request_channel);
  569. static const struct dma_slave_map *dma_filter_match(struct dma_device *device,
  570. const char *name,
  571. struct device *dev)
  572. {
  573. int i;
  574. if (!device->filter.mapcnt)
  575. return NULL;
  576. for (i = 0; i < device->filter.mapcnt; i++) {
  577. const struct dma_slave_map *map = &device->filter.map[i];
  578. if (!strcmp(map->devname, dev_name(dev)) &&
  579. !strcmp(map->slave, name))
  580. return map;
  581. }
  582. return NULL;
  583. }
  584. /**
  585. * dma_request_chan - try to allocate an exclusive slave channel
  586. * @dev: pointer to client device structure
  587. * @name: slave channel name
  588. *
  589. * Returns pointer to appropriate DMA channel on success or an error pointer.
  590. */
  591. struct dma_chan *dma_request_chan(struct device *dev, const char *name)
  592. {
  593. struct dma_device *d, *_d;
  594. struct dma_chan *chan = NULL;
  595. /* If device-tree is present get slave info from here */
  596. if (dev->of_node)
  597. chan = of_dma_request_slave_channel(dev->of_node, name);
  598. /* If device was enumerated by ACPI get slave info from here */
  599. if (has_acpi_companion(dev) && !chan)
  600. chan = acpi_dma_request_slave_chan_by_name(dev, name);
  601. if (chan) {
  602. /* Valid channel found or requester need to be deferred */
  603. if (!IS_ERR(chan) || PTR_ERR(chan) == -EPROBE_DEFER)
  604. return chan;
  605. }
  606. /* Try to find the channel via the DMA filter map(s) */
  607. mutex_lock(&dma_list_mutex);
  608. list_for_each_entry_safe(d, _d, &dma_device_list, global_node) {
  609. dma_cap_mask_t mask;
  610. const struct dma_slave_map *map = dma_filter_match(d, name, dev);
  611. if (!map)
  612. continue;
  613. dma_cap_zero(mask);
  614. dma_cap_set(DMA_SLAVE, mask);
  615. chan = find_candidate(d, &mask, d->filter.fn, map->param);
  616. if (!IS_ERR(chan))
  617. break;
  618. }
  619. mutex_unlock(&dma_list_mutex);
  620. return chan ? chan : ERR_PTR(-EPROBE_DEFER);
  621. }
  622. EXPORT_SYMBOL_GPL(dma_request_chan);
  623. /**
  624. * dma_request_slave_channel - try to allocate an exclusive slave channel
  625. * @dev: pointer to client device structure
  626. * @name: slave channel name
  627. *
  628. * Returns pointer to appropriate DMA channel on success or NULL.
  629. */
  630. struct dma_chan *dma_request_slave_channel(struct device *dev,
  631. const char *name)
  632. {
  633. struct dma_chan *ch = dma_request_chan(dev, name);
  634. if (IS_ERR(ch))
  635. return NULL;
  636. return ch;
  637. }
  638. EXPORT_SYMBOL_GPL(dma_request_slave_channel);
  639. /**
  640. * dma_request_chan_by_mask - allocate a channel satisfying certain capabilities
  641. * @mask: capabilities that the channel must satisfy
  642. *
  643. * Returns pointer to appropriate DMA channel on success or an error pointer.
  644. */
  645. struct dma_chan *dma_request_chan_by_mask(const dma_cap_mask_t *mask)
  646. {
  647. struct dma_chan *chan;
  648. if (!mask)
  649. return ERR_PTR(-ENODEV);
  650. chan = __dma_request_channel(mask, NULL, NULL);
  651. if (!chan)
  652. chan = ERR_PTR(-ENODEV);
  653. return chan;
  654. }
  655. EXPORT_SYMBOL_GPL(dma_request_chan_by_mask);
  656. void dma_release_channel(struct dma_chan *chan)
  657. {
  658. mutex_lock(&dma_list_mutex);
  659. WARN_ONCE(chan->client_count != 1,
  660. "chan reference count %d != 1\n", chan->client_count);
  661. dma_chan_put(chan);
  662. /* drop PRIVATE cap enabled by __dma_request_channel() */
  663. if (--chan->device->privatecnt == 0)
  664. dma_cap_clear(DMA_PRIVATE, chan->device->cap_mask);
  665. mutex_unlock(&dma_list_mutex);
  666. }
  667. EXPORT_SYMBOL_GPL(dma_release_channel);
  668. /**
  669. * dmaengine_get - register interest in dma_channels
  670. */
  671. void dmaengine_get(void)
  672. {
  673. struct dma_device *device, *_d;
  674. struct dma_chan *chan;
  675. int err;
  676. mutex_lock(&dma_list_mutex);
  677. dmaengine_ref_count++;
  678. /* try to grab channels */
  679. list_for_each_entry_safe(device, _d, &dma_device_list, global_node) {
  680. if (dma_has_cap(DMA_PRIVATE, device->cap_mask))
  681. continue;
  682. list_for_each_entry(chan, &device->channels, device_node) {
  683. err = dma_chan_get(chan);
  684. if (err == -ENODEV) {
  685. /* module removed before we could use it */
  686. list_del_rcu(&device->global_node);
  687. break;
  688. } else if (err)
  689. pr_debug("%s: failed to get %s: (%d)\n",
  690. __func__, dma_chan_name(chan), err);
  691. }
  692. }
  693. /* if this is the first reference and there were channels
  694. * waiting we need to rebalance to get those channels
  695. * incorporated into the channel table
  696. */
  697. if (dmaengine_ref_count == 1)
  698. dma_channel_rebalance();
  699. mutex_unlock(&dma_list_mutex);
  700. }
  701. EXPORT_SYMBOL(dmaengine_get);
  702. /**
  703. * dmaengine_put - let dma drivers be removed when ref_count == 0
  704. */
  705. void dmaengine_put(void)
  706. {
  707. struct dma_device *device;
  708. struct dma_chan *chan;
  709. mutex_lock(&dma_list_mutex);
  710. dmaengine_ref_count--;
  711. BUG_ON(dmaengine_ref_count < 0);
  712. /* drop channel references */
  713. list_for_each_entry(device, &dma_device_list, global_node) {
  714. if (dma_has_cap(DMA_PRIVATE, device->cap_mask))
  715. continue;
  716. list_for_each_entry(chan, &device->channels, device_node)
  717. dma_chan_put(chan);
  718. }
  719. mutex_unlock(&dma_list_mutex);
  720. }
  721. EXPORT_SYMBOL(dmaengine_put);
  722. static bool device_has_all_tx_types(struct dma_device *device)
  723. {
  724. /* A device that satisfies this test has channels that will never cause
  725. * an async_tx channel switch event as all possible operation types can
  726. * be handled.
  727. */
  728. #ifdef CONFIG_ASYNC_TX_DMA
  729. if (!dma_has_cap(DMA_INTERRUPT, device->cap_mask))
  730. return false;
  731. #endif
  732. #if defined(CONFIG_ASYNC_MEMCPY) || defined(CONFIG_ASYNC_MEMCPY_MODULE)
  733. if (!dma_has_cap(DMA_MEMCPY, device->cap_mask))
  734. return false;
  735. #endif
  736. #if defined(CONFIG_ASYNC_XOR) || defined(CONFIG_ASYNC_XOR_MODULE)
  737. if (!dma_has_cap(DMA_XOR, device->cap_mask))
  738. return false;
  739. #ifndef CONFIG_ASYNC_TX_DISABLE_XOR_VAL_DMA
  740. if (!dma_has_cap(DMA_XOR_VAL, device->cap_mask))
  741. return false;
  742. #endif
  743. #endif
  744. #if defined(CONFIG_ASYNC_PQ) || defined(CONFIG_ASYNC_PQ_MODULE)
  745. if (!dma_has_cap(DMA_PQ, device->cap_mask))
  746. return false;
  747. #ifndef CONFIG_ASYNC_TX_DISABLE_PQ_VAL_DMA
  748. if (!dma_has_cap(DMA_PQ_VAL, device->cap_mask))
  749. return false;
  750. #endif
  751. #endif
  752. return true;
  753. }
  754. static int get_dma_id(struct dma_device *device)
  755. {
  756. int rc;
  757. mutex_lock(&dma_list_mutex);
  758. rc = idr_alloc(&dma_idr, NULL, 0, 0, GFP_KERNEL);
  759. if (rc >= 0)
  760. device->dev_id = rc;
  761. mutex_unlock(&dma_list_mutex);
  762. return rc < 0 ? rc : 0;
  763. }
  764. /**
  765. * dma_async_device_register - registers DMA devices found
  766. * @device: &dma_device
  767. */
  768. int dma_async_device_register(struct dma_device *device)
  769. {
  770. int chancnt = 0, rc;
  771. struct dma_chan* chan;
  772. atomic_t *idr_ref;
  773. if (!device)
  774. return -ENODEV;
  775. /* validate device routines */
  776. BUG_ON(dma_has_cap(DMA_MEMCPY, device->cap_mask) &&
  777. !device->device_prep_dma_memcpy);
  778. BUG_ON(dma_has_cap(DMA_XOR, device->cap_mask) &&
  779. !device->device_prep_dma_xor);
  780. BUG_ON(dma_has_cap(DMA_XOR_VAL, device->cap_mask) &&
  781. !device->device_prep_dma_xor_val);
  782. BUG_ON(dma_has_cap(DMA_PQ, device->cap_mask) &&
  783. !device->device_prep_dma_pq);
  784. BUG_ON(dma_has_cap(DMA_PQ_VAL, device->cap_mask) &&
  785. !device->device_prep_dma_pq_val);
  786. BUG_ON(dma_has_cap(DMA_MEMSET, device->cap_mask) &&
  787. !device->device_prep_dma_memset);
  788. BUG_ON(dma_has_cap(DMA_INTERRUPT, device->cap_mask) &&
  789. !device->device_prep_dma_interrupt);
  790. BUG_ON(dma_has_cap(DMA_SG, device->cap_mask) &&
  791. !device->device_prep_dma_sg);
  792. BUG_ON(dma_has_cap(DMA_CYCLIC, device->cap_mask) &&
  793. !device->device_prep_dma_cyclic);
  794. BUG_ON(dma_has_cap(DMA_INTERLEAVE, device->cap_mask) &&
  795. !device->device_prep_interleaved_dma);
  796. BUG_ON(!device->device_tx_status);
  797. BUG_ON(!device->device_issue_pending);
  798. BUG_ON(!device->dev);
  799. /* note: this only matters in the
  800. * CONFIG_ASYNC_TX_ENABLE_CHANNEL_SWITCH=n case
  801. */
  802. if (device_has_all_tx_types(device))
  803. dma_cap_set(DMA_ASYNC_TX, device->cap_mask);
  804. idr_ref = kmalloc(sizeof(*idr_ref), GFP_KERNEL);
  805. if (!idr_ref)
  806. return -ENOMEM;
  807. rc = get_dma_id(device);
  808. if (rc != 0) {
  809. kfree(idr_ref);
  810. return rc;
  811. }
  812. atomic_set(idr_ref, 0);
  813. /* represent channels in sysfs. Probably want devs too */
  814. list_for_each_entry(chan, &device->channels, device_node) {
  815. rc = -ENOMEM;
  816. chan->local = alloc_percpu(typeof(*chan->local));
  817. if (chan->local == NULL)
  818. goto err_out;
  819. chan->dev = kzalloc(sizeof(*chan->dev), GFP_KERNEL);
  820. if (chan->dev == NULL) {
  821. free_percpu(chan->local);
  822. chan->local = NULL;
  823. goto err_out;
  824. }
  825. chan->chan_id = chancnt++;
  826. chan->dev->device.class = &dma_devclass;
  827. chan->dev->device.parent = device->dev;
  828. chan->dev->chan = chan;
  829. chan->dev->idr_ref = idr_ref;
  830. chan->dev->dev_id = device->dev_id;
  831. atomic_inc(idr_ref);
  832. dev_set_name(&chan->dev->device, "dma%dchan%d",
  833. device->dev_id, chan->chan_id);
  834. rc = device_register(&chan->dev->device);
  835. if (rc) {
  836. free_percpu(chan->local);
  837. chan->local = NULL;
  838. kfree(chan->dev);
  839. atomic_dec(idr_ref);
  840. goto err_out;
  841. }
  842. chan->client_count = 0;
  843. }
  844. device->chancnt = chancnt;
  845. mutex_lock(&dma_list_mutex);
  846. /* take references on public channels */
  847. if (dmaengine_ref_count && !dma_has_cap(DMA_PRIVATE, device->cap_mask))
  848. list_for_each_entry(chan, &device->channels, device_node) {
  849. /* if clients are already waiting for channels we need
  850. * to take references on their behalf
  851. */
  852. if (dma_chan_get(chan) == -ENODEV) {
  853. /* note we can only get here for the first
  854. * channel as the remaining channels are
  855. * guaranteed to get a reference
  856. */
  857. rc = -ENODEV;
  858. mutex_unlock(&dma_list_mutex);
  859. goto err_out;
  860. }
  861. }
  862. list_add_tail_rcu(&device->global_node, &dma_device_list);
  863. if (dma_has_cap(DMA_PRIVATE, device->cap_mask))
  864. device->privatecnt++; /* Always private */
  865. dma_channel_rebalance();
  866. mutex_unlock(&dma_list_mutex);
  867. return 0;
  868. err_out:
  869. /* if we never registered a channel just release the idr */
  870. if (atomic_read(idr_ref) == 0) {
  871. mutex_lock(&dma_list_mutex);
  872. idr_remove(&dma_idr, device->dev_id);
  873. mutex_unlock(&dma_list_mutex);
  874. kfree(idr_ref);
  875. return rc;
  876. }
  877. list_for_each_entry(chan, &device->channels, device_node) {
  878. if (chan->local == NULL)
  879. continue;
  880. mutex_lock(&dma_list_mutex);
  881. chan->dev->chan = NULL;
  882. mutex_unlock(&dma_list_mutex);
  883. device_unregister(&chan->dev->device);
  884. free_percpu(chan->local);
  885. }
  886. return rc;
  887. }
  888. EXPORT_SYMBOL(dma_async_device_register);
  889. /**
  890. * dma_async_device_unregister - unregister a DMA device
  891. * @device: &dma_device
  892. *
  893. * This routine is called by dma driver exit routines, dmaengine holds module
  894. * references to prevent it being called while channels are in use.
  895. */
  896. void dma_async_device_unregister(struct dma_device *device)
  897. {
  898. struct dma_chan *chan;
  899. mutex_lock(&dma_list_mutex);
  900. list_del_rcu(&device->global_node);
  901. dma_channel_rebalance();
  902. mutex_unlock(&dma_list_mutex);
  903. list_for_each_entry(chan, &device->channels, device_node) {
  904. WARN_ONCE(chan->client_count,
  905. "%s called while %d clients hold a reference\n",
  906. __func__, chan->client_count);
  907. mutex_lock(&dma_list_mutex);
  908. chan->dev->chan = NULL;
  909. mutex_unlock(&dma_list_mutex);
  910. device_unregister(&chan->dev->device);
  911. free_percpu(chan->local);
  912. }
  913. }
  914. EXPORT_SYMBOL(dma_async_device_unregister);
  915. struct dmaengine_unmap_pool {
  916. struct kmem_cache *cache;
  917. const char *name;
  918. mempool_t *pool;
  919. size_t size;
  920. };
  921. #define __UNMAP_POOL(x) { .size = x, .name = "dmaengine-unmap-" __stringify(x) }
  922. static struct dmaengine_unmap_pool unmap_pool[] = {
  923. __UNMAP_POOL(2),
  924. #if IS_ENABLED(CONFIG_DMA_ENGINE_RAID)
  925. __UNMAP_POOL(16),
  926. __UNMAP_POOL(128),
  927. __UNMAP_POOL(256),
  928. #endif
  929. };
  930. static struct dmaengine_unmap_pool *__get_unmap_pool(int nr)
  931. {
  932. int order = get_count_order(nr);
  933. switch (order) {
  934. case 0 ... 1:
  935. return &unmap_pool[0];
  936. case 2 ... 4:
  937. return &unmap_pool[1];
  938. case 5 ... 7:
  939. return &unmap_pool[2];
  940. case 8:
  941. return &unmap_pool[3];
  942. default:
  943. BUG();
  944. return NULL;
  945. }
  946. }
  947. static void dmaengine_unmap(struct kref *kref)
  948. {
  949. struct dmaengine_unmap_data *unmap = container_of(kref, typeof(*unmap), kref);
  950. struct device *dev = unmap->dev;
  951. int cnt, i;
  952. cnt = unmap->to_cnt;
  953. for (i = 0; i < cnt; i++)
  954. dma_unmap_page(dev, unmap->addr[i], unmap->len,
  955. DMA_TO_DEVICE);
  956. cnt += unmap->from_cnt;
  957. for (; i < cnt; i++)
  958. dma_unmap_page(dev, unmap->addr[i], unmap->len,
  959. DMA_FROM_DEVICE);
  960. cnt += unmap->bidi_cnt;
  961. for (; i < cnt; i++) {
  962. if (unmap->addr[i] == 0)
  963. continue;
  964. dma_unmap_page(dev, unmap->addr[i], unmap->len,
  965. DMA_BIDIRECTIONAL);
  966. }
  967. cnt = unmap->map_cnt;
  968. mempool_free(unmap, __get_unmap_pool(cnt)->pool);
  969. }
  970. void dmaengine_unmap_put(struct dmaengine_unmap_data *unmap)
  971. {
  972. if (unmap)
  973. kref_put(&unmap->kref, dmaengine_unmap);
  974. }
  975. EXPORT_SYMBOL_GPL(dmaengine_unmap_put);
  976. static void dmaengine_destroy_unmap_pool(void)
  977. {
  978. int i;
  979. for (i = 0; i < ARRAY_SIZE(unmap_pool); i++) {
  980. struct dmaengine_unmap_pool *p = &unmap_pool[i];
  981. mempool_destroy(p->pool);
  982. p->pool = NULL;
  983. kmem_cache_destroy(p->cache);
  984. p->cache = NULL;
  985. }
  986. }
  987. static int __init dmaengine_init_unmap_pool(void)
  988. {
  989. int i;
  990. for (i = 0; i < ARRAY_SIZE(unmap_pool); i++) {
  991. struct dmaengine_unmap_pool *p = &unmap_pool[i];
  992. size_t size;
  993. size = sizeof(struct dmaengine_unmap_data) +
  994. sizeof(dma_addr_t) * p->size;
  995. p->cache = kmem_cache_create(p->name, size, 0,
  996. SLAB_HWCACHE_ALIGN, NULL);
  997. if (!p->cache)
  998. break;
  999. p->pool = mempool_create_slab_pool(1, p->cache);
  1000. if (!p->pool)
  1001. break;
  1002. }
  1003. if (i == ARRAY_SIZE(unmap_pool))
  1004. return 0;
  1005. dmaengine_destroy_unmap_pool();
  1006. return -ENOMEM;
  1007. }
  1008. struct dmaengine_unmap_data *
  1009. dmaengine_get_unmap_data(struct device *dev, int nr, gfp_t flags)
  1010. {
  1011. struct dmaengine_unmap_data *unmap;
  1012. unmap = mempool_alloc(__get_unmap_pool(nr)->pool, flags);
  1013. if (!unmap)
  1014. return NULL;
  1015. memset(unmap, 0, sizeof(*unmap));
  1016. kref_init(&unmap->kref);
  1017. unmap->dev = dev;
  1018. unmap->map_cnt = nr;
  1019. return unmap;
  1020. }
  1021. EXPORT_SYMBOL(dmaengine_get_unmap_data);
  1022. void dma_async_tx_descriptor_init(struct dma_async_tx_descriptor *tx,
  1023. struct dma_chan *chan)
  1024. {
  1025. tx->chan = chan;
  1026. #ifdef CONFIG_ASYNC_TX_ENABLE_CHANNEL_SWITCH
  1027. spin_lock_init(&tx->lock);
  1028. #endif
  1029. }
  1030. EXPORT_SYMBOL(dma_async_tx_descriptor_init);
  1031. /* dma_wait_for_async_tx - spin wait for a transaction to complete
  1032. * @tx: in-flight transaction to wait on
  1033. */
  1034. enum dma_status
  1035. dma_wait_for_async_tx(struct dma_async_tx_descriptor *tx)
  1036. {
  1037. unsigned long dma_sync_wait_timeout = jiffies + msecs_to_jiffies(5000);
  1038. if (!tx)
  1039. return DMA_COMPLETE;
  1040. while (tx->cookie == -EBUSY) {
  1041. if (time_after_eq(jiffies, dma_sync_wait_timeout)) {
  1042. pr_err("%s timeout waiting for descriptor submission\n",
  1043. __func__);
  1044. return DMA_ERROR;
  1045. }
  1046. cpu_relax();
  1047. }
  1048. return dma_sync_wait(tx->chan, tx->cookie);
  1049. }
  1050. EXPORT_SYMBOL_GPL(dma_wait_for_async_tx);
  1051. /* dma_run_dependencies - helper routine for dma drivers to process
  1052. * (start) dependent operations on their target channel
  1053. * @tx: transaction with dependencies
  1054. */
  1055. void dma_run_dependencies(struct dma_async_tx_descriptor *tx)
  1056. {
  1057. struct dma_async_tx_descriptor *dep = txd_next(tx);
  1058. struct dma_async_tx_descriptor *dep_next;
  1059. struct dma_chan *chan;
  1060. if (!dep)
  1061. return;
  1062. /* we'll submit tx->next now, so clear the link */
  1063. txd_clear_next(tx);
  1064. chan = dep->chan;
  1065. /* keep submitting up until a channel switch is detected
  1066. * in that case we will be called again as a result of
  1067. * processing the interrupt from async_tx_channel_switch
  1068. */
  1069. for (; dep; dep = dep_next) {
  1070. txd_lock(dep);
  1071. txd_clear_parent(dep);
  1072. dep_next = txd_next(dep);
  1073. if (dep_next && dep_next->chan == chan)
  1074. txd_clear_next(dep); /* ->next will be submitted */
  1075. else
  1076. dep_next = NULL; /* submit current dep and terminate */
  1077. txd_unlock(dep);
  1078. dep->tx_submit(dep);
  1079. }
  1080. chan->device->device_issue_pending(chan);
  1081. }
  1082. EXPORT_SYMBOL_GPL(dma_run_dependencies);
  1083. static int __init dma_bus_init(void)
  1084. {
  1085. int err = dmaengine_init_unmap_pool();
  1086. if (err)
  1087. return err;
  1088. return class_register(&dma_devclass);
  1089. }
  1090. arch_initcall(dma_bus_init);