hdmi5.c 18 KB

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  1. /*
  2. * HDMI driver for OMAP5
  3. *
  4. * Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com/
  5. *
  6. * Authors:
  7. * Yong Zhi
  8. * Mythri pk
  9. * Archit Taneja <archit@ti.com>
  10. * Tomi Valkeinen <tomi.valkeinen@ti.com>
  11. *
  12. * This program is free software; you can redistribute it and/or modify it
  13. * under the terms of the GNU General Public License version 2 as published by
  14. * the Free Software Foundation.
  15. *
  16. * This program is distributed in the hope that it will be useful, but WITHOUT
  17. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  18. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  19. * more details.
  20. *
  21. * You should have received a copy of the GNU General Public License along with
  22. * this program. If not, see <http://www.gnu.org/licenses/>.
  23. */
  24. #define DSS_SUBSYS_NAME "HDMI"
  25. #include <linux/kernel.h>
  26. #include <linux/module.h>
  27. #include <linux/err.h>
  28. #include <linux/io.h>
  29. #include <linux/interrupt.h>
  30. #include <linux/mutex.h>
  31. #include <linux/delay.h>
  32. #include <linux/string.h>
  33. #include <linux/platform_device.h>
  34. #include <linux/pm_runtime.h>
  35. #include <linux/clk.h>
  36. #include <linux/gpio.h>
  37. #include <linux/regulator/consumer.h>
  38. #include <linux/component.h>
  39. #include <linux/of.h>
  40. #include <linux/of_graph.h>
  41. #include <sound/omap-hdmi-audio.h>
  42. #include "omapdss.h"
  43. #include "hdmi5_core.h"
  44. #include "dss.h"
  45. static int hdmi_runtime_get(struct omap_hdmi *hdmi)
  46. {
  47. int r;
  48. DSSDBG("hdmi_runtime_get\n");
  49. r = pm_runtime_get_sync(&hdmi->pdev->dev);
  50. WARN_ON(r < 0);
  51. if (r < 0)
  52. return r;
  53. return 0;
  54. }
  55. static void hdmi_runtime_put(struct omap_hdmi *hdmi)
  56. {
  57. int r;
  58. DSSDBG("hdmi_runtime_put\n");
  59. r = pm_runtime_put_sync(&hdmi->pdev->dev);
  60. WARN_ON(r < 0 && r != -ENOSYS);
  61. }
  62. static irqreturn_t hdmi_irq_handler(int irq, void *data)
  63. {
  64. struct omap_hdmi *hdmi = data;
  65. struct hdmi_wp_data *wp = &hdmi->wp;
  66. u32 irqstatus;
  67. irqstatus = hdmi_wp_get_irqstatus(wp);
  68. hdmi_wp_set_irqstatus(wp, irqstatus);
  69. if ((irqstatus & HDMI_IRQ_LINK_CONNECT) &&
  70. irqstatus & HDMI_IRQ_LINK_DISCONNECT) {
  71. u32 v;
  72. /*
  73. * If we get both connect and disconnect interrupts at the same
  74. * time, turn off the PHY, clear interrupts, and restart, which
  75. * raises connect interrupt if a cable is connected, or nothing
  76. * if cable is not connected.
  77. */
  78. hdmi_wp_set_phy_pwr(wp, HDMI_PHYPWRCMD_OFF);
  79. /*
  80. * We always get bogus CONNECT & DISCONNECT interrupts when
  81. * setting the PHY to LDOON. To ignore those, we force the RXDET
  82. * line to 0 until the PHY power state has been changed.
  83. */
  84. v = hdmi_read_reg(hdmi->phy.base, HDMI_TXPHY_PAD_CFG_CTRL);
  85. v = FLD_MOD(v, 1, 15, 15); /* FORCE_RXDET_HIGH */
  86. v = FLD_MOD(v, 0, 14, 7); /* RXDET_LINE */
  87. hdmi_write_reg(hdmi->phy.base, HDMI_TXPHY_PAD_CFG_CTRL, v);
  88. hdmi_wp_set_irqstatus(wp, HDMI_IRQ_LINK_CONNECT |
  89. HDMI_IRQ_LINK_DISCONNECT);
  90. hdmi_wp_set_phy_pwr(wp, HDMI_PHYPWRCMD_LDOON);
  91. REG_FLD_MOD(hdmi->phy.base, HDMI_TXPHY_PAD_CFG_CTRL, 0, 15, 15);
  92. } else if (irqstatus & HDMI_IRQ_LINK_CONNECT) {
  93. hdmi_wp_set_phy_pwr(wp, HDMI_PHYPWRCMD_TXON);
  94. } else if (irqstatus & HDMI_IRQ_LINK_DISCONNECT) {
  95. hdmi_wp_set_phy_pwr(wp, HDMI_PHYPWRCMD_LDOON);
  96. }
  97. return IRQ_HANDLED;
  98. }
  99. static int hdmi_power_on_core(struct omap_hdmi *hdmi)
  100. {
  101. int r;
  102. r = regulator_enable(hdmi->vdda_reg);
  103. if (r)
  104. return r;
  105. r = hdmi_runtime_get(hdmi);
  106. if (r)
  107. goto err_runtime_get;
  108. /* Make selection of HDMI in DSS */
  109. dss_select_hdmi_venc_clk_source(hdmi->dss, DSS_HDMI_M_PCLK);
  110. hdmi->core_enabled = true;
  111. return 0;
  112. err_runtime_get:
  113. regulator_disable(hdmi->vdda_reg);
  114. return r;
  115. }
  116. static void hdmi_power_off_core(struct omap_hdmi *hdmi)
  117. {
  118. hdmi->core_enabled = false;
  119. hdmi_runtime_put(hdmi);
  120. regulator_disable(hdmi->vdda_reg);
  121. }
  122. static int hdmi_power_on_full(struct omap_hdmi *hdmi)
  123. {
  124. int r;
  125. struct videomode *vm;
  126. struct dss_pll_clock_info hdmi_cinfo = { 0 };
  127. unsigned int pc;
  128. r = hdmi_power_on_core(hdmi);
  129. if (r)
  130. return r;
  131. vm = &hdmi->cfg.vm;
  132. DSSDBG("hdmi_power_on hactive= %d vactive = %d\n", vm->hactive,
  133. vm->vactive);
  134. pc = vm->pixelclock;
  135. if (vm->flags & DISPLAY_FLAGS_DOUBLECLK)
  136. pc *= 2;
  137. /* DSS_HDMI_TCLK is bitclk / 10 */
  138. pc *= 10;
  139. dss_pll_calc_b(&hdmi->pll.pll, clk_get_rate(hdmi->pll.pll.clkin),
  140. pc, &hdmi_cinfo);
  141. /* disable and clear irqs */
  142. hdmi_wp_clear_irqenable(&hdmi->wp, 0xffffffff);
  143. hdmi_wp_set_irqstatus(&hdmi->wp,
  144. hdmi_wp_get_irqstatus(&hdmi->wp));
  145. r = dss_pll_enable(&hdmi->pll.pll);
  146. if (r) {
  147. DSSERR("Failed to enable PLL\n");
  148. goto err_pll_enable;
  149. }
  150. r = dss_pll_set_config(&hdmi->pll.pll, &hdmi_cinfo);
  151. if (r) {
  152. DSSERR("Failed to configure PLL\n");
  153. goto err_pll_cfg;
  154. }
  155. r = hdmi_phy_configure(&hdmi->phy, hdmi_cinfo.clkdco,
  156. hdmi_cinfo.clkout[0]);
  157. if (r) {
  158. DSSDBG("Failed to start PHY\n");
  159. goto err_phy_cfg;
  160. }
  161. r = hdmi_wp_set_phy_pwr(&hdmi->wp, HDMI_PHYPWRCMD_LDOON);
  162. if (r)
  163. goto err_phy_pwr;
  164. hdmi5_configure(&hdmi->core, &hdmi->wp, &hdmi->cfg);
  165. /* tv size */
  166. dss_mgr_set_timings(&hdmi->output, vm);
  167. r = dss_mgr_enable(&hdmi->output);
  168. if (r)
  169. goto err_mgr_enable;
  170. r = hdmi_wp_video_start(&hdmi->wp);
  171. if (r)
  172. goto err_vid_enable;
  173. hdmi_wp_set_irqenable(&hdmi->wp,
  174. HDMI_IRQ_LINK_CONNECT | HDMI_IRQ_LINK_DISCONNECT);
  175. return 0;
  176. err_vid_enable:
  177. dss_mgr_disable(&hdmi->output);
  178. err_mgr_enable:
  179. hdmi_wp_set_phy_pwr(&hdmi->wp, HDMI_PHYPWRCMD_OFF);
  180. err_phy_pwr:
  181. err_phy_cfg:
  182. err_pll_cfg:
  183. dss_pll_disable(&hdmi->pll.pll);
  184. err_pll_enable:
  185. hdmi_power_off_core(hdmi);
  186. return -EIO;
  187. }
  188. static void hdmi_power_off_full(struct omap_hdmi *hdmi)
  189. {
  190. hdmi_wp_clear_irqenable(&hdmi->wp, 0xffffffff);
  191. hdmi_wp_video_stop(&hdmi->wp);
  192. dss_mgr_disable(&hdmi->output);
  193. hdmi_wp_set_phy_pwr(&hdmi->wp, HDMI_PHYPWRCMD_OFF);
  194. dss_pll_disable(&hdmi->pll.pll);
  195. hdmi_power_off_core(hdmi);
  196. }
  197. static void hdmi_display_set_timings(struct omap_dss_device *dssdev,
  198. const struct videomode *vm)
  199. {
  200. struct omap_hdmi *hdmi = dssdev_to_hdmi(dssdev);
  201. mutex_lock(&hdmi->lock);
  202. hdmi->cfg.vm = *vm;
  203. dispc_set_tv_pclk(hdmi->dss->dispc, vm->pixelclock);
  204. mutex_unlock(&hdmi->lock);
  205. }
  206. static int hdmi_dump_regs(struct seq_file *s, void *p)
  207. {
  208. struct omap_hdmi *hdmi = s->private;
  209. mutex_lock(&hdmi->lock);
  210. if (hdmi_runtime_get(hdmi)) {
  211. mutex_unlock(&hdmi->lock);
  212. return 0;
  213. }
  214. hdmi_wp_dump(&hdmi->wp, s);
  215. hdmi_pll_dump(&hdmi->pll, s);
  216. hdmi_phy_dump(&hdmi->phy, s);
  217. hdmi5_core_dump(&hdmi->core, s);
  218. hdmi_runtime_put(hdmi);
  219. mutex_unlock(&hdmi->lock);
  220. return 0;
  221. }
  222. static int read_edid(struct omap_hdmi *hdmi, u8 *buf, int len)
  223. {
  224. int r;
  225. int idlemode;
  226. mutex_lock(&hdmi->lock);
  227. r = hdmi_runtime_get(hdmi);
  228. BUG_ON(r);
  229. idlemode = REG_GET(hdmi->wp.base, HDMI_WP_SYSCONFIG, 3, 2);
  230. /* No-idle mode */
  231. REG_FLD_MOD(hdmi->wp.base, HDMI_WP_SYSCONFIG, 1, 3, 2);
  232. r = hdmi5_read_edid(&hdmi->core, buf, len);
  233. REG_FLD_MOD(hdmi->wp.base, HDMI_WP_SYSCONFIG, idlemode, 3, 2);
  234. hdmi_runtime_put(hdmi);
  235. mutex_unlock(&hdmi->lock);
  236. return r;
  237. }
  238. static void hdmi_start_audio_stream(struct omap_hdmi *hd)
  239. {
  240. REG_FLD_MOD(hd->wp.base, HDMI_WP_SYSCONFIG, 1, 3, 2);
  241. hdmi_wp_audio_enable(&hd->wp, true);
  242. hdmi_wp_audio_core_req_enable(&hd->wp, true);
  243. }
  244. static void hdmi_stop_audio_stream(struct omap_hdmi *hd)
  245. {
  246. hdmi_wp_audio_core_req_enable(&hd->wp, false);
  247. hdmi_wp_audio_enable(&hd->wp, false);
  248. REG_FLD_MOD(hd->wp.base, HDMI_WP_SYSCONFIG, hd->wp_idlemode, 3, 2);
  249. }
  250. static int hdmi_display_enable(struct omap_dss_device *dssdev)
  251. {
  252. struct omap_hdmi *hdmi = dssdev_to_hdmi(dssdev);
  253. unsigned long flags;
  254. int r = 0;
  255. DSSDBG("ENTER hdmi_display_enable\n");
  256. mutex_lock(&hdmi->lock);
  257. if (!dssdev->dispc_channel_connected) {
  258. DSSERR("failed to enable display: no output/manager\n");
  259. r = -ENODEV;
  260. goto err0;
  261. }
  262. r = hdmi_power_on_full(hdmi);
  263. if (r) {
  264. DSSERR("failed to power on device\n");
  265. goto err0;
  266. }
  267. if (hdmi->audio_configured) {
  268. r = hdmi5_audio_config(&hdmi->core, &hdmi->wp,
  269. &hdmi->audio_config,
  270. hdmi->cfg.vm.pixelclock);
  271. if (r) {
  272. DSSERR("Error restoring audio configuration: %d", r);
  273. hdmi->audio_abort_cb(&hdmi->pdev->dev);
  274. hdmi->audio_configured = false;
  275. }
  276. }
  277. spin_lock_irqsave(&hdmi->audio_playing_lock, flags);
  278. if (hdmi->audio_configured && hdmi->audio_playing)
  279. hdmi_start_audio_stream(hdmi);
  280. hdmi->display_enabled = true;
  281. spin_unlock_irqrestore(&hdmi->audio_playing_lock, flags);
  282. mutex_unlock(&hdmi->lock);
  283. return 0;
  284. err0:
  285. mutex_unlock(&hdmi->lock);
  286. return r;
  287. }
  288. static void hdmi_display_disable(struct omap_dss_device *dssdev)
  289. {
  290. struct omap_hdmi *hdmi = dssdev_to_hdmi(dssdev);
  291. unsigned long flags;
  292. DSSDBG("Enter hdmi_display_disable\n");
  293. mutex_lock(&hdmi->lock);
  294. spin_lock_irqsave(&hdmi->audio_playing_lock, flags);
  295. hdmi_stop_audio_stream(hdmi);
  296. hdmi->display_enabled = false;
  297. spin_unlock_irqrestore(&hdmi->audio_playing_lock, flags);
  298. hdmi_power_off_full(hdmi);
  299. mutex_unlock(&hdmi->lock);
  300. }
  301. static int hdmi_core_enable(struct omap_hdmi *hdmi)
  302. {
  303. int r = 0;
  304. DSSDBG("ENTER omapdss_hdmi_core_enable\n");
  305. mutex_lock(&hdmi->lock);
  306. r = hdmi_power_on_core(hdmi);
  307. if (r) {
  308. DSSERR("failed to power on device\n");
  309. goto err0;
  310. }
  311. mutex_unlock(&hdmi->lock);
  312. return 0;
  313. err0:
  314. mutex_unlock(&hdmi->lock);
  315. return r;
  316. }
  317. static void hdmi_core_disable(struct omap_hdmi *hdmi)
  318. {
  319. DSSDBG("Enter omapdss_hdmi_core_disable\n");
  320. mutex_lock(&hdmi->lock);
  321. hdmi_power_off_core(hdmi);
  322. mutex_unlock(&hdmi->lock);
  323. }
  324. static int hdmi_connect(struct omap_dss_device *src,
  325. struct omap_dss_device *dst)
  326. {
  327. int r;
  328. r = omapdss_device_connect(dst->dss, dst, dst->next);
  329. if (r)
  330. return r;
  331. dst->dispc_channel_connected = true;
  332. return 0;
  333. }
  334. static void hdmi_disconnect(struct omap_dss_device *src,
  335. struct omap_dss_device *dst)
  336. {
  337. dst->dispc_channel_connected = false;
  338. omapdss_device_disconnect(dst, dst->next);
  339. }
  340. static int hdmi_read_edid(struct omap_dss_device *dssdev,
  341. u8 *edid, int len)
  342. {
  343. struct omap_hdmi *hdmi = dssdev_to_hdmi(dssdev);
  344. bool need_enable;
  345. int r;
  346. need_enable = hdmi->core_enabled == false;
  347. if (need_enable) {
  348. r = hdmi_core_enable(hdmi);
  349. if (r)
  350. return r;
  351. }
  352. r = read_edid(hdmi, edid, len);
  353. if (need_enable)
  354. hdmi_core_disable(hdmi);
  355. return r;
  356. }
  357. static int hdmi_set_infoframe(struct omap_dss_device *dssdev,
  358. const struct hdmi_avi_infoframe *avi)
  359. {
  360. struct omap_hdmi *hdmi = dssdev_to_hdmi(dssdev);
  361. hdmi->cfg.infoframe = *avi;
  362. return 0;
  363. }
  364. static int hdmi_set_hdmi_mode(struct omap_dss_device *dssdev,
  365. bool hdmi_mode)
  366. {
  367. struct omap_hdmi *hdmi = dssdev_to_hdmi(dssdev);
  368. hdmi->cfg.hdmi_dvi_mode = hdmi_mode ? HDMI_HDMI : HDMI_DVI;
  369. return 0;
  370. }
  371. static const struct omap_dss_device_ops hdmi_ops = {
  372. .connect = hdmi_connect,
  373. .disconnect = hdmi_disconnect,
  374. .enable = hdmi_display_enable,
  375. .disable = hdmi_display_disable,
  376. .set_timings = hdmi_display_set_timings,
  377. .read_edid = hdmi_read_edid,
  378. .hdmi = {
  379. .set_infoframe = hdmi_set_infoframe,
  380. .set_hdmi_mode = hdmi_set_hdmi_mode,
  381. },
  382. };
  383. /* -----------------------------------------------------------------------------
  384. * Audio Callbacks
  385. */
  386. static int hdmi_audio_startup(struct device *dev,
  387. void (*abort_cb)(struct device *dev))
  388. {
  389. struct omap_hdmi *hd = dev_get_drvdata(dev);
  390. mutex_lock(&hd->lock);
  391. WARN_ON(hd->audio_abort_cb != NULL);
  392. hd->audio_abort_cb = abort_cb;
  393. mutex_unlock(&hd->lock);
  394. return 0;
  395. }
  396. static int hdmi_audio_shutdown(struct device *dev)
  397. {
  398. struct omap_hdmi *hd = dev_get_drvdata(dev);
  399. mutex_lock(&hd->lock);
  400. hd->audio_abort_cb = NULL;
  401. hd->audio_configured = false;
  402. hd->audio_playing = false;
  403. mutex_unlock(&hd->lock);
  404. return 0;
  405. }
  406. static int hdmi_audio_start(struct device *dev)
  407. {
  408. struct omap_hdmi *hd = dev_get_drvdata(dev);
  409. unsigned long flags;
  410. spin_lock_irqsave(&hd->audio_playing_lock, flags);
  411. if (hd->display_enabled) {
  412. if (!hdmi_mode_has_audio(&hd->cfg))
  413. DSSERR("%s: Video mode does not support audio\n",
  414. __func__);
  415. hdmi_start_audio_stream(hd);
  416. }
  417. hd->audio_playing = true;
  418. spin_unlock_irqrestore(&hd->audio_playing_lock, flags);
  419. return 0;
  420. }
  421. static void hdmi_audio_stop(struct device *dev)
  422. {
  423. struct omap_hdmi *hd = dev_get_drvdata(dev);
  424. unsigned long flags;
  425. if (!hdmi_mode_has_audio(&hd->cfg))
  426. DSSERR("%s: Video mode does not support audio\n", __func__);
  427. spin_lock_irqsave(&hd->audio_playing_lock, flags);
  428. if (hd->display_enabled)
  429. hdmi_stop_audio_stream(hd);
  430. hd->audio_playing = false;
  431. spin_unlock_irqrestore(&hd->audio_playing_lock, flags);
  432. }
  433. static int hdmi_audio_config(struct device *dev,
  434. struct omap_dss_audio *dss_audio)
  435. {
  436. struct omap_hdmi *hd = dev_get_drvdata(dev);
  437. int ret = 0;
  438. mutex_lock(&hd->lock);
  439. if (hd->display_enabled) {
  440. ret = hdmi5_audio_config(&hd->core, &hd->wp, dss_audio,
  441. hd->cfg.vm.pixelclock);
  442. if (ret)
  443. goto out;
  444. }
  445. hd->audio_configured = true;
  446. hd->audio_config = *dss_audio;
  447. out:
  448. mutex_unlock(&hd->lock);
  449. return ret;
  450. }
  451. static const struct omap_hdmi_audio_ops hdmi_audio_ops = {
  452. .audio_startup = hdmi_audio_startup,
  453. .audio_shutdown = hdmi_audio_shutdown,
  454. .audio_start = hdmi_audio_start,
  455. .audio_stop = hdmi_audio_stop,
  456. .audio_config = hdmi_audio_config,
  457. };
  458. static int hdmi_audio_register(struct omap_hdmi *hdmi)
  459. {
  460. struct omap_hdmi_audio_pdata pdata = {
  461. .dev = &hdmi->pdev->dev,
  462. .version = 5,
  463. .audio_dma_addr = hdmi_wp_get_audio_dma_addr(&hdmi->wp),
  464. .ops = &hdmi_audio_ops,
  465. };
  466. hdmi->audio_pdev = platform_device_register_data(
  467. &hdmi->pdev->dev, "omap-hdmi-audio", PLATFORM_DEVID_AUTO,
  468. &pdata, sizeof(pdata));
  469. if (IS_ERR(hdmi->audio_pdev))
  470. return PTR_ERR(hdmi->audio_pdev);
  471. hdmi_runtime_get(hdmi);
  472. hdmi->wp_idlemode =
  473. REG_GET(hdmi->wp.base, HDMI_WP_SYSCONFIG, 3, 2);
  474. hdmi_runtime_put(hdmi);
  475. return 0;
  476. }
  477. /* -----------------------------------------------------------------------------
  478. * Component Bind & Unbind
  479. */
  480. static int hdmi5_bind(struct device *dev, struct device *master, void *data)
  481. {
  482. struct dss_device *dss = dss_get_device(master);
  483. struct omap_hdmi *hdmi = dev_get_drvdata(dev);
  484. int r;
  485. hdmi->dss = dss;
  486. r = hdmi_pll_init(dss, hdmi->pdev, &hdmi->pll, &hdmi->wp);
  487. if (r)
  488. return r;
  489. r = hdmi_audio_register(hdmi);
  490. if (r) {
  491. DSSERR("Registering HDMI audio failed %d\n", r);
  492. goto err_pll_uninit;
  493. }
  494. hdmi->debugfs = dss_debugfs_create_file(dss, "hdmi", hdmi_dump_regs,
  495. hdmi);
  496. return 0;
  497. err_pll_uninit:
  498. hdmi_pll_uninit(&hdmi->pll);
  499. return r;
  500. }
  501. static void hdmi5_unbind(struct device *dev, struct device *master, void *data)
  502. {
  503. struct omap_hdmi *hdmi = dev_get_drvdata(dev);
  504. dss_debugfs_remove_file(hdmi->debugfs);
  505. if (hdmi->audio_pdev)
  506. platform_device_unregister(hdmi->audio_pdev);
  507. hdmi_pll_uninit(&hdmi->pll);
  508. }
  509. static const struct component_ops hdmi5_component_ops = {
  510. .bind = hdmi5_bind,
  511. .unbind = hdmi5_unbind,
  512. };
  513. /* -----------------------------------------------------------------------------
  514. * Probe & Remove, Suspend & Resume
  515. */
  516. static int hdmi5_init_output(struct omap_hdmi *hdmi)
  517. {
  518. struct omap_dss_device *out = &hdmi->output;
  519. int r;
  520. out->dev = &hdmi->pdev->dev;
  521. out->id = OMAP_DSS_OUTPUT_HDMI;
  522. out->output_type = OMAP_DISPLAY_TYPE_HDMI;
  523. out->name = "hdmi.0";
  524. out->dispc_channel = OMAP_DSS_CHANNEL_DIGIT;
  525. out->ops = &hdmi_ops;
  526. out->owner = THIS_MODULE;
  527. out->of_ports = BIT(0);
  528. out->ops_flags = OMAP_DSS_DEVICE_OP_EDID;
  529. out->next = omapdss_of_find_connected_device(out->dev->of_node, 0);
  530. if (IS_ERR(out->next)) {
  531. if (PTR_ERR(out->next) != -EPROBE_DEFER)
  532. dev_err(out->dev, "failed to find video sink\n");
  533. return PTR_ERR(out->next);
  534. }
  535. r = omapdss_output_validate(out);
  536. if (r) {
  537. omapdss_device_put(out->next);
  538. out->next = NULL;
  539. return r;
  540. }
  541. omapdss_device_register(out);
  542. return 0;
  543. }
  544. static void hdmi5_uninit_output(struct omap_hdmi *hdmi)
  545. {
  546. struct omap_dss_device *out = &hdmi->output;
  547. if (out->next)
  548. omapdss_device_put(out->next);
  549. omapdss_device_unregister(out);
  550. }
  551. static int hdmi5_probe_of(struct omap_hdmi *hdmi)
  552. {
  553. struct platform_device *pdev = hdmi->pdev;
  554. struct device_node *node = pdev->dev.of_node;
  555. struct device_node *ep;
  556. int r;
  557. ep = of_graph_get_endpoint_by_regs(node, 0, 0);
  558. if (!ep)
  559. return 0;
  560. r = hdmi_parse_lanes_of(pdev, ep, &hdmi->phy);
  561. of_node_put(ep);
  562. return r;
  563. }
  564. static int hdmi5_probe(struct platform_device *pdev)
  565. {
  566. struct omap_hdmi *hdmi;
  567. int irq;
  568. int r;
  569. hdmi = kzalloc(sizeof(*hdmi), GFP_KERNEL);
  570. if (!hdmi)
  571. return -ENOMEM;
  572. hdmi->pdev = pdev;
  573. dev_set_drvdata(&pdev->dev, hdmi);
  574. mutex_init(&hdmi->lock);
  575. spin_lock_init(&hdmi->audio_playing_lock);
  576. r = hdmi5_probe_of(hdmi);
  577. if (r)
  578. goto err_free;
  579. r = hdmi_wp_init(pdev, &hdmi->wp, 5);
  580. if (r)
  581. goto err_free;
  582. r = hdmi_phy_init(pdev, &hdmi->phy, 5);
  583. if (r)
  584. goto err_free;
  585. r = hdmi5_core_init(pdev, &hdmi->core);
  586. if (r)
  587. goto err_free;
  588. irq = platform_get_irq(pdev, 0);
  589. if (irq < 0) {
  590. DSSERR("platform_get_irq failed\n");
  591. r = -ENODEV;
  592. goto err_free;
  593. }
  594. r = devm_request_threaded_irq(&pdev->dev, irq,
  595. NULL, hdmi_irq_handler,
  596. IRQF_ONESHOT, "OMAP HDMI", hdmi);
  597. if (r) {
  598. DSSERR("HDMI IRQ request failed\n");
  599. goto err_free;
  600. }
  601. hdmi->vdda_reg = devm_regulator_get(&pdev->dev, "vdda");
  602. if (IS_ERR(hdmi->vdda_reg)) {
  603. r = PTR_ERR(hdmi->vdda_reg);
  604. if (r != -EPROBE_DEFER)
  605. DSSERR("can't get VDDA regulator\n");
  606. goto err_free;
  607. }
  608. pm_runtime_enable(&pdev->dev);
  609. r = hdmi5_init_output(hdmi);
  610. if (r)
  611. goto err_pm_disable;
  612. r = component_add(&pdev->dev, &hdmi5_component_ops);
  613. if (r)
  614. goto err_uninit_output;
  615. return 0;
  616. err_uninit_output:
  617. hdmi5_uninit_output(hdmi);
  618. err_pm_disable:
  619. pm_runtime_disable(&pdev->dev);
  620. err_free:
  621. kfree(hdmi);
  622. return r;
  623. }
  624. static int hdmi5_remove(struct platform_device *pdev)
  625. {
  626. struct omap_hdmi *hdmi = platform_get_drvdata(pdev);
  627. component_del(&pdev->dev, &hdmi5_component_ops);
  628. hdmi5_uninit_output(hdmi);
  629. pm_runtime_disable(&pdev->dev);
  630. kfree(hdmi);
  631. return 0;
  632. }
  633. static int hdmi_runtime_suspend(struct device *dev)
  634. {
  635. struct omap_hdmi *hdmi = dev_get_drvdata(dev);
  636. dispc_runtime_put(hdmi->dss->dispc);
  637. return 0;
  638. }
  639. static int hdmi_runtime_resume(struct device *dev)
  640. {
  641. struct omap_hdmi *hdmi = dev_get_drvdata(dev);
  642. int r;
  643. r = dispc_runtime_get(hdmi->dss->dispc);
  644. if (r < 0)
  645. return r;
  646. return 0;
  647. }
  648. static const struct dev_pm_ops hdmi_pm_ops = {
  649. .runtime_suspend = hdmi_runtime_suspend,
  650. .runtime_resume = hdmi_runtime_resume,
  651. };
  652. static const struct of_device_id hdmi_of_match[] = {
  653. { .compatible = "ti,omap5-hdmi", },
  654. { .compatible = "ti,dra7-hdmi", },
  655. {},
  656. };
  657. struct platform_driver omapdss_hdmi5hw_driver = {
  658. .probe = hdmi5_probe,
  659. .remove = hdmi5_remove,
  660. .driver = {
  661. .name = "omapdss_hdmi5",
  662. .pm = &hdmi_pm_ops,
  663. .of_match_table = hdmi_of_match,
  664. .suppress_bind_attrs = true,
  665. },
  666. };