mcbsp.c 4.7 KB

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  1. /*
  2. * linux/arch/arm/mach-omap2/mcbsp.c
  3. *
  4. * Copyright (C) 2008 Instituto Nokia de Tecnologia
  5. * Contact: Eduardo Valentin <eduardo.valentin@indt.org.br>
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License version 2 as
  9. * published by the Free Software Foundation.
  10. *
  11. * Multichannel mode not supported.
  12. */
  13. #include <linux/module.h>
  14. #include <linux/init.h>
  15. #include <linux/clk.h>
  16. #include <linux/err.h>
  17. #include <linux/io.h>
  18. #include <linux/platform_device.h>
  19. #include <linux/slab.h>
  20. #include <mach/irqs.h>
  21. #include <plat/dma.h>
  22. #include <plat/cpu.h>
  23. #include <plat/mcbsp.h>
  24. #include <plat/omap_device.h>
  25. #include <linux/pm_runtime.h>
  26. #include "control.h"
  27. /*
  28. * FIXME: Find a mechanism to enable/disable runtime the McBSP ICLK autoidle.
  29. * Sidetone needs non-gated ICLK and sidetone autoidle is broken.
  30. */
  31. #include "cm2xxx_3xxx.h"
  32. #include "cm-regbits-34xx.h"
  33. /* McBSP internal signal muxing function */
  34. static int omap2_mcbsp1_mux_rx_clk(struct device *dev, const char *signal,
  35. const char *src)
  36. {
  37. u32 v;
  38. v = omap_ctrl_readl(OMAP2_CONTROL_DEVCONF0);
  39. if (!strcmp(signal, "clkr")) {
  40. if (!strcmp(src, "clkr"))
  41. v &= ~OMAP2_MCBSP1_CLKR_MASK;
  42. else if (!strcmp(src, "clkx"))
  43. v |= OMAP2_MCBSP1_CLKR_MASK;
  44. else
  45. return -EINVAL;
  46. } else if (!strcmp(signal, "fsr")) {
  47. if (!strcmp(src, "fsr"))
  48. v &= ~OMAP2_MCBSP1_FSR_MASK;
  49. else if (!strcmp(src, "fsx"))
  50. v |= OMAP2_MCBSP1_FSR_MASK;
  51. else
  52. return -EINVAL;
  53. } else {
  54. return -EINVAL;
  55. }
  56. omap_ctrl_writel(v, OMAP2_CONTROL_DEVCONF0);
  57. return 0;
  58. }
  59. /* McBSP CLKS source switching function */
  60. static int omap2_mcbsp_set_clk_src(struct device *dev, struct clk *clk,
  61. const char *src)
  62. {
  63. struct clk *fck_src;
  64. char *fck_src_name;
  65. int r;
  66. if (!strcmp(src, "clks_ext"))
  67. fck_src_name = "pad_fck";
  68. else if (!strcmp(src, "clks_fclk"))
  69. fck_src_name = "prcm_fck";
  70. else
  71. return -EINVAL;
  72. fck_src = clk_get(dev, fck_src_name);
  73. if (IS_ERR_OR_NULL(fck_src)) {
  74. pr_err("omap-mcbsp: %s: could not clk_get() %s\n", "clks",
  75. fck_src_name);
  76. return -EINVAL;
  77. }
  78. pm_runtime_put_sync(dev);
  79. r = clk_set_parent(clk, fck_src);
  80. if (IS_ERR_VALUE(r)) {
  81. pr_err("omap-mcbsp: %s: could not clk_set_parent() to %s\n",
  82. "clks", fck_src_name);
  83. clk_put(fck_src);
  84. return -EINVAL;
  85. }
  86. pm_runtime_get_sync(dev);
  87. clk_put(fck_src);
  88. return 0;
  89. }
  90. static int omap3_enable_st_clock(unsigned int id, bool enable)
  91. {
  92. unsigned int w;
  93. /*
  94. * Sidetone uses McBSP ICLK - which must not idle when sidetones
  95. * are enabled or sidetones start sounding ugly.
  96. */
  97. w = omap2_cm_read_mod_reg(OMAP3430_PER_MOD, CM_AUTOIDLE);
  98. if (enable)
  99. w &= ~(1 << (id - 2));
  100. else
  101. w |= 1 << (id - 2);
  102. omap2_cm_write_mod_reg(w, OMAP3430_PER_MOD, CM_AUTOIDLE);
  103. return 0;
  104. }
  105. struct omap_device_pm_latency omap2_mcbsp_latency[] = {
  106. {
  107. .deactivate_func = omap_device_idle_hwmods,
  108. .activate_func = omap_device_enable_hwmods,
  109. .flags = OMAP_DEVICE_LATENCY_AUTO_ADJUST,
  110. },
  111. };
  112. static int omap_init_mcbsp(struct omap_hwmod *oh, void *unused)
  113. {
  114. int id, count = 1;
  115. char *name = "omap-mcbsp";
  116. struct omap_hwmod *oh_device[2];
  117. struct omap_mcbsp_platform_data *pdata = NULL;
  118. struct platform_device *pdev;
  119. sscanf(oh->name, "mcbsp%d", &id);
  120. pdata = kzalloc(sizeof(struct omap_mcbsp_platform_data), GFP_KERNEL);
  121. if (!pdata) {
  122. pr_err("%s: No memory for mcbsp\n", __func__);
  123. return -ENOMEM;
  124. }
  125. pdata->reg_step = 4;
  126. if (oh->class->rev < MCBSP_CONFIG_TYPE2) {
  127. pdata->reg_size = 2;
  128. } else {
  129. pdata->reg_size = 4;
  130. pdata->has_ccr = true;
  131. }
  132. if (oh->class->rev == MCBSP_CONFIG_TYPE3) {
  133. if (id == 2)
  134. /* The FIFO has 1024 + 256 locations */
  135. pdata->buffer_size = 0x500;
  136. else
  137. /* The FIFO has 128 locations */
  138. pdata->buffer_size = 0x80;
  139. }
  140. if (oh->class->rev >= MCBSP_CONFIG_TYPE3)
  141. pdata->has_wakeup = true;
  142. oh_device[0] = oh;
  143. if (oh->dev_attr) {
  144. oh_device[1] = omap_hwmod_lookup((
  145. (struct omap_mcbsp_dev_attr *)(oh->dev_attr))->sidetone);
  146. pdata->enable_st_clock = omap3_enable_st_clock;
  147. count++;
  148. }
  149. pdev = omap_device_build_ss(name, id, oh_device, count, pdata,
  150. sizeof(*pdata), omap2_mcbsp_latency,
  151. ARRAY_SIZE(omap2_mcbsp_latency), false);
  152. kfree(pdata);
  153. if (IS_ERR(pdev)) {
  154. pr_err("%s: Can't build omap_device for %s:%s.\n", __func__,
  155. name, oh->name);
  156. return PTR_ERR(pdev);
  157. }
  158. pdata->set_clk_src = omap2_mcbsp_set_clk_src;
  159. if (id == 1)
  160. pdata->mux_signal = omap2_mcbsp1_mux_rx_clk;
  161. omap_mcbsp_count++;
  162. return 0;
  163. }
  164. static int __init omap2_mcbsp_init(void)
  165. {
  166. omap_hwmod_for_each_by_class("mcbsp", omap_init_mcbsp, NULL);
  167. mcbsp_ptr = kzalloc(omap_mcbsp_count * sizeof(struct omap_mcbsp *),
  168. GFP_KERNEL);
  169. if (!mcbsp_ptr)
  170. return -ENOMEM;
  171. return omap_mcbsp_init();
  172. }
  173. arch_initcall(omap2_mcbsp_init);