ahci-platform.txt 2.5 KB

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  1. * AHCI SATA Controller
  2. SATA nodes are defined to describe on-chip Serial ATA controllers.
  3. Each SATA controller should have its own node.
  4. It is possible, but not required, to represent each port as a sub-node.
  5. It allows to enable each port independently when dealing with multiple
  6. PHYs.
  7. Required properties:
  8. - compatible : compatible string, one of:
  9. - "allwinner,sun4i-a10-ahci"
  10. - "hisilicon,hisi-ahci"
  11. - "cavium,octeon-7130-ahci"
  12. - "ibm,476gtr-ahci"
  13. - "marvell,armada-380-ahci"
  14. - "marvell,armada-3700-ahci"
  15. - "snps,dwc-ahci"
  16. - "snps,exynos5440-ahci"
  17. - "snps,spear-ahci"
  18. - "generic-ahci"
  19. - interrupts : <interrupt mapping for SATA IRQ>
  20. - reg : <registers mapping>
  21. Please note that when using "generic-ahci" you must also specify a SoC specific
  22. compatible:
  23. compatible = "manufacturer,soc-model-ahci", "generic-ahci";
  24. Optional properties:
  25. - dma-coherent : Present if dma operations are coherent
  26. - clocks : a list of phandle + clock specifier pairs
  27. - target-supply : regulator for SATA target power
  28. - phys : reference to the SATA PHY node
  29. - phy-names : must be "sata-phy"
  30. - ports-implemented : Mask that indicates which ports that the HBA supports
  31. are available for software to use. Useful if PORTS_IMPL
  32. is not programmed by the BIOS, which is true with
  33. some embedded SOC's.
  34. Required properties when using sub-nodes:
  35. - #address-cells : number of cells to encode an address
  36. - #size-cells : number of cells representing the size of an address
  37. Sub-nodes required properties:
  38. - reg : the port number
  39. And at least one of the following properties:
  40. - phys : reference to the SATA PHY node
  41. - target-supply : regulator for SATA target power
  42. Examples:
  43. sata@ffe08000 {
  44. compatible = "snps,spear-ahci";
  45. reg = <0xffe08000 0x1000>;
  46. interrupts = <115>;
  47. };
  48. ahci: sata@01c18000 {
  49. compatible = "allwinner,sun4i-a10-ahci";
  50. reg = <0x01c18000 0x1000>;
  51. interrupts = <56>;
  52. clocks = <&pll6 0>, <&ahb_gates 25>;
  53. target-supply = <&reg_ahci_5v>;
  54. };
  55. With sub-nodes:
  56. sata@f7e90000 {
  57. compatible = "marvell,berlin2q-achi", "generic-ahci";
  58. reg = <0xe90000 0x1000>;
  59. interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
  60. clocks = <&chip CLKID_SATA>;
  61. #address-cells = <1>;
  62. #size-cells = <0>;
  63. sata0: sata-port@0 {
  64. reg = <0>;
  65. phys = <&sata_phy 0>;
  66. target-supply = <&reg_sata0>;
  67. };
  68. sata1: sata-port@1 {
  69. reg = <1>;
  70. phys = <&sata_phy 1>;
  71. target-supply = <&reg_sata1>;;
  72. };
  73. };