xmon.c 77 KB

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  1. /*
  2. * Routines providing a simple monitor for use on the PowerMac.
  3. *
  4. * Copyright (C) 1996-2005 Paul Mackerras.
  5. * Copyright (C) 2001 PPC64 Team, IBM Corp
  6. * Copyrignt (C) 2006 Michael Ellerman, IBM Corp
  7. *
  8. * This program is free software; you can redistribute it and/or
  9. * modify it under the terms of the GNU General Public License
  10. * as published by the Free Software Foundation; either version
  11. * 2 of the License, or (at your option) any later version.
  12. */
  13. #include <linux/kernel.h>
  14. #include <linux/errno.h>
  15. #include <linux/sched/signal.h>
  16. #include <linux/smp.h>
  17. #include <linux/mm.h>
  18. #include <linux/reboot.h>
  19. #include <linux/delay.h>
  20. #include <linux/kallsyms.h>
  21. #include <linux/kmsg_dump.h>
  22. #include <linux/cpumask.h>
  23. #include <linux/export.h>
  24. #include <linux/sysrq.h>
  25. #include <linux/interrupt.h>
  26. #include <linux/irq.h>
  27. #include <linux/bug.h>
  28. #include <linux/nmi.h>
  29. #include <linux/ctype.h>
  30. #include <asm/debugfs.h>
  31. #include <asm/ptrace.h>
  32. #include <asm/string.h>
  33. #include <asm/prom.h>
  34. #include <asm/machdep.h>
  35. #include <asm/xmon.h>
  36. #include <asm/processor.h>
  37. #include <asm/pgtable.h>
  38. #include <asm/mmu.h>
  39. #include <asm/mmu_context.h>
  40. #include <asm/cputable.h>
  41. #include <asm/rtas.h>
  42. #include <asm/sstep.h>
  43. #include <asm/irq_regs.h>
  44. #include <asm/spu.h>
  45. #include <asm/spu_priv1.h>
  46. #include <asm/setjmp.h>
  47. #include <asm/reg.h>
  48. #include <asm/debug.h>
  49. #include <asm/hw_breakpoint.h>
  50. #include <asm/opal.h>
  51. #include <asm/firmware.h>
  52. #ifdef CONFIG_PPC64
  53. #include <asm/hvcall.h>
  54. #include <asm/paca.h>
  55. #endif
  56. #if defined(CONFIG_PPC_SPLPAR)
  57. #include <asm/plpar_wrappers.h>
  58. #else
  59. static inline long plapr_set_ciabr(unsigned long ciabr) {return 0; };
  60. #endif
  61. #include "nonstdio.h"
  62. #include "dis-asm.h"
  63. #ifdef CONFIG_SMP
  64. static cpumask_t cpus_in_xmon = CPU_MASK_NONE;
  65. static unsigned long xmon_taken = 1;
  66. static int xmon_owner;
  67. static int xmon_gate;
  68. #else
  69. #define xmon_owner 0
  70. #endif /* CONFIG_SMP */
  71. static unsigned long in_xmon __read_mostly = 0;
  72. static int xmon_on = IS_ENABLED(CONFIG_XMON_DEFAULT);
  73. static unsigned long adrs;
  74. static int size = 1;
  75. #define MAX_DUMP (128 * 1024)
  76. static unsigned long ndump = 64;
  77. static unsigned long nidump = 16;
  78. static unsigned long ncsum = 4096;
  79. static int termch;
  80. static char tmpstr[128];
  81. static long bus_error_jmp[JMP_BUF_LEN];
  82. static int catch_memory_errors;
  83. static int catch_spr_faults;
  84. static long *xmon_fault_jmp[NR_CPUS];
  85. /* Breakpoint stuff */
  86. struct bpt {
  87. unsigned long address;
  88. unsigned int instr[2];
  89. atomic_t ref_count;
  90. int enabled;
  91. unsigned long pad;
  92. };
  93. /* Bits in bpt.enabled */
  94. #define BP_CIABR 1
  95. #define BP_TRAP 2
  96. #define BP_DABR 4
  97. #define NBPTS 256
  98. static struct bpt bpts[NBPTS];
  99. static struct bpt dabr;
  100. static struct bpt *iabr;
  101. static unsigned bpinstr = 0x7fe00008; /* trap */
  102. #define BP_NUM(bp) ((bp) - bpts + 1)
  103. /* Prototypes */
  104. static int cmds(struct pt_regs *);
  105. static int mread(unsigned long, void *, int);
  106. static int mwrite(unsigned long, void *, int);
  107. static int handle_fault(struct pt_regs *);
  108. static void byterev(unsigned char *, int);
  109. static void memex(void);
  110. static int bsesc(void);
  111. static void dump(void);
  112. static void prdump(unsigned long, long);
  113. static int ppc_inst_dump(unsigned long, long, int);
  114. static void dump_log_buf(void);
  115. #ifdef CONFIG_PPC_POWERNV
  116. static void dump_opal_msglog(void);
  117. #else
  118. static inline void dump_opal_msglog(void)
  119. {
  120. printf("Machine is not running OPAL firmware.\n");
  121. }
  122. #endif
  123. static void backtrace(struct pt_regs *);
  124. static void excprint(struct pt_regs *);
  125. static void prregs(struct pt_regs *);
  126. static void memops(int);
  127. static void memlocate(void);
  128. static void memzcan(void);
  129. static void memdiffs(unsigned char *, unsigned char *, unsigned, unsigned);
  130. int skipbl(void);
  131. int scanhex(unsigned long *valp);
  132. static void scannl(void);
  133. static int hexdigit(int);
  134. void getstring(char *, int);
  135. static void flush_input(void);
  136. static int inchar(void);
  137. static void take_input(char *);
  138. static int read_spr(int, unsigned long *);
  139. static void write_spr(int, unsigned long);
  140. static void super_regs(void);
  141. static void remove_bpts(void);
  142. static void insert_bpts(void);
  143. static void remove_cpu_bpts(void);
  144. static void insert_cpu_bpts(void);
  145. static struct bpt *at_breakpoint(unsigned long pc);
  146. static struct bpt *in_breakpoint_table(unsigned long pc, unsigned long *offp);
  147. static int do_step(struct pt_regs *);
  148. static void bpt_cmds(void);
  149. static void cacheflush(void);
  150. static int cpu_cmd(void);
  151. static void csum(void);
  152. static void bootcmds(void);
  153. static void proccall(void);
  154. static void show_tasks(void);
  155. void dump_segments(void);
  156. static void symbol_lookup(void);
  157. static void xmon_show_stack(unsigned long sp, unsigned long lr,
  158. unsigned long pc);
  159. static void xmon_print_symbol(unsigned long address, const char *mid,
  160. const char *after);
  161. static const char *getvecname(unsigned long vec);
  162. static int do_spu_cmd(void);
  163. #ifdef CONFIG_44x
  164. static void dump_tlb_44x(void);
  165. #endif
  166. #ifdef CONFIG_PPC_BOOK3E
  167. static void dump_tlb_book3e(void);
  168. #endif
  169. #ifdef CONFIG_PPC64
  170. #define REG "%.16lx"
  171. #else
  172. #define REG "%.8lx"
  173. #endif
  174. #ifdef __LITTLE_ENDIAN__
  175. #define GETWORD(v) (((v)[3] << 24) + ((v)[2] << 16) + ((v)[1] << 8) + (v)[0])
  176. #else
  177. #define GETWORD(v) (((v)[0] << 24) + ((v)[1] << 16) + ((v)[2] << 8) + (v)[3])
  178. #endif
  179. static char *help_string = "\
  180. Commands:\n\
  181. b show breakpoints\n\
  182. bd set data breakpoint\n\
  183. bi set instruction breakpoint\n\
  184. bc clear breakpoint\n"
  185. #ifdef CONFIG_SMP
  186. "\
  187. c print cpus stopped in xmon\n\
  188. c# try to switch to cpu number h (in hex)\n"
  189. #endif
  190. "\
  191. C checksum\n\
  192. d dump bytes\n\
  193. d1 dump 1 byte values\n\
  194. d2 dump 2 byte values\n\
  195. d4 dump 4 byte values\n\
  196. d8 dump 8 byte values\n\
  197. di dump instructions\n\
  198. df dump float values\n\
  199. dd dump double values\n\
  200. dl dump the kernel log buffer\n"
  201. #ifdef CONFIG_PPC_POWERNV
  202. "\
  203. do dump the OPAL message log\n"
  204. #endif
  205. #ifdef CONFIG_PPC64
  206. "\
  207. dp[#] dump paca for current cpu, or cpu #\n\
  208. dpa dump paca for all possible cpus\n"
  209. #endif
  210. "\
  211. dr dump stream of raw bytes\n\
  212. dt dump the tracing buffers (uses printk)\n\
  213. e print exception information\n\
  214. f flush cache\n\
  215. la lookup symbol+offset of specified address\n\
  216. ls lookup address of specified symbol\n\
  217. m examine/change memory\n\
  218. mm move a block of memory\n\
  219. ms set a block of memory\n\
  220. md compare two blocks of memory\n\
  221. ml locate a block of memory\n\
  222. mz zero a block of memory\n\
  223. mi show information about memory allocation\n\
  224. p call a procedure\n\
  225. P list processes/tasks\n\
  226. r print registers\n\
  227. s single step\n"
  228. #ifdef CONFIG_SPU_BASE
  229. " ss stop execution on all spus\n\
  230. sr restore execution on stopped spus\n\
  231. sf # dump spu fields for spu # (in hex)\n\
  232. sd # dump spu local store for spu # (in hex)\n\
  233. sdi # disassemble spu local store for spu # (in hex)\n"
  234. #endif
  235. " S print special registers\n\
  236. Sa print all SPRs\n\
  237. Sr # read SPR #\n\
  238. Sw #v write v to SPR #\n\
  239. t print backtrace\n\
  240. x exit monitor and recover\n\
  241. X exit monitor and don't recover\n"
  242. #if defined(CONFIG_PPC64) && !defined(CONFIG_PPC_BOOK3E)
  243. " u dump segment table or SLB\n"
  244. #elif defined(CONFIG_PPC_STD_MMU_32)
  245. " u dump segment registers\n"
  246. #elif defined(CONFIG_44x) || defined(CONFIG_PPC_BOOK3E)
  247. " u dump TLB\n"
  248. #endif
  249. " ? help\n"
  250. " # n limit output to n lines per page (for dp, dpa, dl)\n"
  251. " zr reboot\n\
  252. zh halt\n"
  253. ;
  254. static struct pt_regs *xmon_regs;
  255. static inline void sync(void)
  256. {
  257. asm volatile("sync; isync");
  258. }
  259. static inline void store_inst(void *p)
  260. {
  261. asm volatile ("dcbst 0,%0; sync; icbi 0,%0; isync" : : "r" (p));
  262. }
  263. static inline void cflush(void *p)
  264. {
  265. asm volatile ("dcbf 0,%0; icbi 0,%0" : : "r" (p));
  266. }
  267. static inline void cinval(void *p)
  268. {
  269. asm volatile ("dcbi 0,%0; icbi 0,%0" : : "r" (p));
  270. }
  271. /**
  272. * write_ciabr() - write the CIABR SPR
  273. * @ciabr: The value to write.
  274. *
  275. * This function writes a value to the CIARB register either directly
  276. * through mtspr instruction if the kernel is in HV privilege mode or
  277. * call a hypervisor function to achieve the same in case the kernel
  278. * is in supervisor privilege mode.
  279. */
  280. static void write_ciabr(unsigned long ciabr)
  281. {
  282. if (!cpu_has_feature(CPU_FTR_ARCH_207S))
  283. return;
  284. if (cpu_has_feature(CPU_FTR_HVMODE)) {
  285. mtspr(SPRN_CIABR, ciabr);
  286. return;
  287. }
  288. plapr_set_ciabr(ciabr);
  289. }
  290. /**
  291. * set_ciabr() - set the CIABR
  292. * @addr: The value to set.
  293. *
  294. * This function sets the correct privilege value into the the HW
  295. * breakpoint address before writing it up in the CIABR register.
  296. */
  297. static void set_ciabr(unsigned long addr)
  298. {
  299. addr &= ~CIABR_PRIV;
  300. if (cpu_has_feature(CPU_FTR_HVMODE))
  301. addr |= CIABR_PRIV_HYPER;
  302. else
  303. addr |= CIABR_PRIV_SUPER;
  304. write_ciabr(addr);
  305. }
  306. /*
  307. * Disable surveillance (the service processor watchdog function)
  308. * while we are in xmon.
  309. * XXX we should re-enable it when we leave. :)
  310. */
  311. #define SURVEILLANCE_TOKEN 9000
  312. static inline void disable_surveillance(void)
  313. {
  314. #ifdef CONFIG_PPC_PSERIES
  315. /* Since this can't be a module, args should end up below 4GB. */
  316. static struct rtas_args args;
  317. int token;
  318. /*
  319. * At this point we have got all the cpus we can into
  320. * xmon, so there is hopefully no other cpu calling RTAS
  321. * at the moment, even though we don't take rtas.lock.
  322. * If we did try to take rtas.lock there would be a
  323. * real possibility of deadlock.
  324. */
  325. token = rtas_token("set-indicator");
  326. if (token == RTAS_UNKNOWN_SERVICE)
  327. return;
  328. rtas_call_unlocked(&args, token, 3, 1, NULL, SURVEILLANCE_TOKEN, 0, 0);
  329. #endif /* CONFIG_PPC_PSERIES */
  330. }
  331. #ifdef CONFIG_SMP
  332. static int xmon_speaker;
  333. static void get_output_lock(void)
  334. {
  335. int me = smp_processor_id() + 0x100;
  336. int last_speaker = 0, prev;
  337. long timeout;
  338. if (xmon_speaker == me)
  339. return;
  340. for (;;) {
  341. last_speaker = cmpxchg(&xmon_speaker, 0, me);
  342. if (last_speaker == 0)
  343. return;
  344. /*
  345. * Wait a full second for the lock, we might be on a slow
  346. * console, but check every 100us.
  347. */
  348. timeout = 10000;
  349. while (xmon_speaker == last_speaker) {
  350. if (--timeout > 0) {
  351. udelay(100);
  352. continue;
  353. }
  354. /* hostile takeover */
  355. prev = cmpxchg(&xmon_speaker, last_speaker, me);
  356. if (prev == last_speaker)
  357. return;
  358. break;
  359. }
  360. }
  361. }
  362. static void release_output_lock(void)
  363. {
  364. xmon_speaker = 0;
  365. }
  366. int cpus_are_in_xmon(void)
  367. {
  368. return !cpumask_empty(&cpus_in_xmon);
  369. }
  370. #endif
  371. static inline int unrecoverable_excp(struct pt_regs *regs)
  372. {
  373. #if defined(CONFIG_4xx) || defined(CONFIG_PPC_BOOK3E)
  374. /* We have no MSR_RI bit on 4xx or Book3e, so we simply return false */
  375. return 0;
  376. #else
  377. return ((regs->msr & MSR_RI) == 0);
  378. #endif
  379. }
  380. static int xmon_core(struct pt_regs *regs, int fromipi)
  381. {
  382. int cmd = 0;
  383. struct bpt *bp;
  384. long recurse_jmp[JMP_BUF_LEN];
  385. unsigned long offset;
  386. unsigned long flags;
  387. #ifdef CONFIG_SMP
  388. int cpu;
  389. int secondary;
  390. unsigned long timeout;
  391. #endif
  392. local_irq_save(flags);
  393. hard_irq_disable();
  394. bp = in_breakpoint_table(regs->nip, &offset);
  395. if (bp != NULL) {
  396. regs->nip = bp->address + offset;
  397. atomic_dec(&bp->ref_count);
  398. }
  399. remove_cpu_bpts();
  400. #ifdef CONFIG_SMP
  401. cpu = smp_processor_id();
  402. if (cpumask_test_cpu(cpu, &cpus_in_xmon)) {
  403. /*
  404. * We catch SPR read/write faults here because the 0x700, 0xf60
  405. * etc. handlers don't call debugger_fault_handler().
  406. */
  407. if (catch_spr_faults)
  408. longjmp(bus_error_jmp, 1);
  409. get_output_lock();
  410. excprint(regs);
  411. printf("cpu 0x%x: Exception %lx %s in xmon, "
  412. "returning to main loop\n",
  413. cpu, regs->trap, getvecname(TRAP(regs)));
  414. release_output_lock();
  415. longjmp(xmon_fault_jmp[cpu], 1);
  416. }
  417. if (setjmp(recurse_jmp) != 0) {
  418. if (!in_xmon || !xmon_gate) {
  419. get_output_lock();
  420. printf("xmon: WARNING: bad recursive fault "
  421. "on cpu 0x%x\n", cpu);
  422. release_output_lock();
  423. goto waiting;
  424. }
  425. secondary = !(xmon_taken && cpu == xmon_owner);
  426. goto cmdloop;
  427. }
  428. xmon_fault_jmp[cpu] = recurse_jmp;
  429. bp = NULL;
  430. if ((regs->msr & (MSR_IR|MSR_PR|MSR_64BIT)) == (MSR_IR|MSR_64BIT))
  431. bp = at_breakpoint(regs->nip);
  432. if (bp || unrecoverable_excp(regs))
  433. fromipi = 0;
  434. if (!fromipi) {
  435. get_output_lock();
  436. excprint(regs);
  437. if (bp) {
  438. printf("cpu 0x%x stopped at breakpoint 0x%lx (",
  439. cpu, BP_NUM(bp));
  440. xmon_print_symbol(regs->nip, " ", ")\n");
  441. }
  442. if (unrecoverable_excp(regs))
  443. printf("WARNING: exception is not recoverable, "
  444. "can't continue\n");
  445. release_output_lock();
  446. }
  447. cpumask_set_cpu(cpu, &cpus_in_xmon);
  448. waiting:
  449. secondary = 1;
  450. while (secondary && !xmon_gate) {
  451. if (in_xmon == 0) {
  452. if (fromipi)
  453. goto leave;
  454. secondary = test_and_set_bit(0, &in_xmon);
  455. }
  456. barrier();
  457. }
  458. if (!secondary && !xmon_gate) {
  459. /* we are the first cpu to come in */
  460. /* interrupt other cpu(s) */
  461. int ncpus = num_online_cpus();
  462. xmon_owner = cpu;
  463. mb();
  464. if (ncpus > 1) {
  465. smp_send_debugger_break();
  466. /* wait for other cpus to come in */
  467. for (timeout = 100000000; timeout != 0; --timeout) {
  468. if (cpumask_weight(&cpus_in_xmon) >= ncpus)
  469. break;
  470. barrier();
  471. }
  472. }
  473. remove_bpts();
  474. disable_surveillance();
  475. /* for breakpoint or single step, print the current instr. */
  476. if (bp || TRAP(regs) == 0xd00)
  477. ppc_inst_dump(regs->nip, 1, 0);
  478. printf("enter ? for help\n");
  479. mb();
  480. xmon_gate = 1;
  481. barrier();
  482. }
  483. cmdloop:
  484. while (in_xmon) {
  485. if (secondary) {
  486. if (cpu == xmon_owner) {
  487. if (!test_and_set_bit(0, &xmon_taken)) {
  488. secondary = 0;
  489. continue;
  490. }
  491. /* missed it */
  492. while (cpu == xmon_owner)
  493. barrier();
  494. }
  495. barrier();
  496. } else {
  497. cmd = cmds(regs);
  498. if (cmd != 0) {
  499. /* exiting xmon */
  500. insert_bpts();
  501. xmon_gate = 0;
  502. wmb();
  503. in_xmon = 0;
  504. break;
  505. }
  506. /* have switched to some other cpu */
  507. secondary = 1;
  508. }
  509. }
  510. leave:
  511. cpumask_clear_cpu(cpu, &cpus_in_xmon);
  512. xmon_fault_jmp[cpu] = NULL;
  513. #else
  514. /* UP is simple... */
  515. if (in_xmon) {
  516. printf("Exception %lx %s in xmon, returning to main loop\n",
  517. regs->trap, getvecname(TRAP(regs)));
  518. longjmp(xmon_fault_jmp[0], 1);
  519. }
  520. if (setjmp(recurse_jmp) == 0) {
  521. xmon_fault_jmp[0] = recurse_jmp;
  522. in_xmon = 1;
  523. excprint(regs);
  524. bp = at_breakpoint(regs->nip);
  525. if (bp) {
  526. printf("Stopped at breakpoint %lx (", BP_NUM(bp));
  527. xmon_print_symbol(regs->nip, " ", ")\n");
  528. }
  529. if (unrecoverable_excp(regs))
  530. printf("WARNING: exception is not recoverable, "
  531. "can't continue\n");
  532. remove_bpts();
  533. disable_surveillance();
  534. /* for breakpoint or single step, print the current instr. */
  535. if (bp || TRAP(regs) == 0xd00)
  536. ppc_inst_dump(regs->nip, 1, 0);
  537. printf("enter ? for help\n");
  538. }
  539. cmd = cmds(regs);
  540. insert_bpts();
  541. in_xmon = 0;
  542. #endif
  543. #ifdef CONFIG_BOOKE
  544. if (regs->msr & MSR_DE) {
  545. bp = at_breakpoint(regs->nip);
  546. if (bp != NULL) {
  547. regs->nip = (unsigned long) &bp->instr[0];
  548. atomic_inc(&bp->ref_count);
  549. }
  550. }
  551. #else
  552. if ((regs->msr & (MSR_IR|MSR_PR|MSR_64BIT)) == (MSR_IR|MSR_64BIT)) {
  553. bp = at_breakpoint(regs->nip);
  554. if (bp != NULL) {
  555. int stepped = emulate_step(regs, bp->instr[0]);
  556. if (stepped == 0) {
  557. regs->nip = (unsigned long) &bp->instr[0];
  558. atomic_inc(&bp->ref_count);
  559. } else if (stepped < 0) {
  560. printf("Couldn't single-step %s instruction\n",
  561. (IS_RFID(bp->instr[0])? "rfid": "mtmsrd"));
  562. }
  563. }
  564. }
  565. #endif
  566. insert_cpu_bpts();
  567. touch_nmi_watchdog();
  568. local_irq_restore(flags);
  569. return cmd != 'X' && cmd != EOF;
  570. }
  571. int xmon(struct pt_regs *excp)
  572. {
  573. struct pt_regs regs;
  574. if (excp == NULL) {
  575. ppc_save_regs(&regs);
  576. excp = &regs;
  577. }
  578. return xmon_core(excp, 0);
  579. }
  580. EXPORT_SYMBOL(xmon);
  581. irqreturn_t xmon_irq(int irq, void *d)
  582. {
  583. unsigned long flags;
  584. local_irq_save(flags);
  585. printf("Keyboard interrupt\n");
  586. xmon(get_irq_regs());
  587. local_irq_restore(flags);
  588. return IRQ_HANDLED;
  589. }
  590. static int xmon_bpt(struct pt_regs *regs)
  591. {
  592. struct bpt *bp;
  593. unsigned long offset;
  594. if ((regs->msr & (MSR_IR|MSR_PR|MSR_64BIT)) != (MSR_IR|MSR_64BIT))
  595. return 0;
  596. /* Are we at the trap at bp->instr[1] for some bp? */
  597. bp = in_breakpoint_table(regs->nip, &offset);
  598. if (bp != NULL && offset == 4) {
  599. regs->nip = bp->address + 4;
  600. atomic_dec(&bp->ref_count);
  601. return 1;
  602. }
  603. /* Are we at a breakpoint? */
  604. bp = at_breakpoint(regs->nip);
  605. if (!bp)
  606. return 0;
  607. xmon_core(regs, 0);
  608. return 1;
  609. }
  610. static int xmon_sstep(struct pt_regs *regs)
  611. {
  612. if (user_mode(regs))
  613. return 0;
  614. xmon_core(regs, 0);
  615. return 1;
  616. }
  617. static int xmon_break_match(struct pt_regs *regs)
  618. {
  619. if ((regs->msr & (MSR_IR|MSR_PR|MSR_64BIT)) != (MSR_IR|MSR_64BIT))
  620. return 0;
  621. if (dabr.enabled == 0)
  622. return 0;
  623. xmon_core(regs, 0);
  624. return 1;
  625. }
  626. static int xmon_iabr_match(struct pt_regs *regs)
  627. {
  628. if ((regs->msr & (MSR_IR|MSR_PR|MSR_64BIT)) != (MSR_IR|MSR_64BIT))
  629. return 0;
  630. if (iabr == NULL)
  631. return 0;
  632. xmon_core(regs, 0);
  633. return 1;
  634. }
  635. static int xmon_ipi(struct pt_regs *regs)
  636. {
  637. #ifdef CONFIG_SMP
  638. if (in_xmon && !cpumask_test_cpu(smp_processor_id(), &cpus_in_xmon))
  639. xmon_core(regs, 1);
  640. #endif
  641. return 0;
  642. }
  643. static int xmon_fault_handler(struct pt_regs *regs)
  644. {
  645. struct bpt *bp;
  646. unsigned long offset;
  647. if (in_xmon && catch_memory_errors)
  648. handle_fault(regs); /* doesn't return */
  649. if ((regs->msr & (MSR_IR|MSR_PR|MSR_64BIT)) == (MSR_IR|MSR_64BIT)) {
  650. bp = in_breakpoint_table(regs->nip, &offset);
  651. if (bp != NULL) {
  652. regs->nip = bp->address + offset;
  653. atomic_dec(&bp->ref_count);
  654. }
  655. }
  656. return 0;
  657. }
  658. static struct bpt *at_breakpoint(unsigned long pc)
  659. {
  660. int i;
  661. struct bpt *bp;
  662. bp = bpts;
  663. for (i = 0; i < NBPTS; ++i, ++bp)
  664. if (bp->enabled && pc == bp->address)
  665. return bp;
  666. return NULL;
  667. }
  668. static struct bpt *in_breakpoint_table(unsigned long nip, unsigned long *offp)
  669. {
  670. unsigned long off;
  671. off = nip - (unsigned long) bpts;
  672. if (off >= sizeof(bpts))
  673. return NULL;
  674. off %= sizeof(struct bpt);
  675. if (off != offsetof(struct bpt, instr[0])
  676. && off != offsetof(struct bpt, instr[1]))
  677. return NULL;
  678. *offp = off - offsetof(struct bpt, instr[0]);
  679. return (struct bpt *) (nip - off);
  680. }
  681. static struct bpt *new_breakpoint(unsigned long a)
  682. {
  683. struct bpt *bp;
  684. a &= ~3UL;
  685. bp = at_breakpoint(a);
  686. if (bp)
  687. return bp;
  688. for (bp = bpts; bp < &bpts[NBPTS]; ++bp) {
  689. if (!bp->enabled && atomic_read(&bp->ref_count) == 0) {
  690. bp->address = a;
  691. bp->instr[1] = bpinstr;
  692. store_inst(&bp->instr[1]);
  693. return bp;
  694. }
  695. }
  696. printf("Sorry, no free breakpoints. Please clear one first.\n");
  697. return NULL;
  698. }
  699. static void insert_bpts(void)
  700. {
  701. int i;
  702. struct bpt *bp;
  703. bp = bpts;
  704. for (i = 0; i < NBPTS; ++i, ++bp) {
  705. if ((bp->enabled & (BP_TRAP|BP_CIABR)) == 0)
  706. continue;
  707. if (mread(bp->address, &bp->instr[0], 4) != 4) {
  708. printf("Couldn't read instruction at %lx, "
  709. "disabling breakpoint there\n", bp->address);
  710. bp->enabled = 0;
  711. continue;
  712. }
  713. if (IS_MTMSRD(bp->instr[0]) || IS_RFID(bp->instr[0])) {
  714. printf("Breakpoint at %lx is on an mtmsrd or rfid "
  715. "instruction, disabling it\n", bp->address);
  716. bp->enabled = 0;
  717. continue;
  718. }
  719. store_inst(&bp->instr[0]);
  720. if (bp->enabled & BP_CIABR)
  721. continue;
  722. if (mwrite(bp->address, &bpinstr, 4) != 4) {
  723. printf("Couldn't write instruction at %lx, "
  724. "disabling breakpoint there\n", bp->address);
  725. bp->enabled &= ~BP_TRAP;
  726. continue;
  727. }
  728. store_inst((void *)bp->address);
  729. }
  730. }
  731. static void insert_cpu_bpts(void)
  732. {
  733. struct arch_hw_breakpoint brk;
  734. if (dabr.enabled) {
  735. brk.address = dabr.address;
  736. brk.type = (dabr.enabled & HW_BRK_TYPE_DABR) | HW_BRK_TYPE_PRIV_ALL;
  737. brk.len = 8;
  738. __set_breakpoint(&brk);
  739. }
  740. if (iabr)
  741. set_ciabr(iabr->address);
  742. }
  743. static void remove_bpts(void)
  744. {
  745. int i;
  746. struct bpt *bp;
  747. unsigned instr;
  748. bp = bpts;
  749. for (i = 0; i < NBPTS; ++i, ++bp) {
  750. if ((bp->enabled & (BP_TRAP|BP_CIABR)) != BP_TRAP)
  751. continue;
  752. if (mread(bp->address, &instr, 4) == 4
  753. && instr == bpinstr
  754. && mwrite(bp->address, &bp->instr, 4) != 4)
  755. printf("Couldn't remove breakpoint at %lx\n",
  756. bp->address);
  757. else
  758. store_inst((void *)bp->address);
  759. }
  760. }
  761. static void remove_cpu_bpts(void)
  762. {
  763. hw_breakpoint_disable();
  764. write_ciabr(0);
  765. }
  766. static void set_lpp_cmd(void)
  767. {
  768. unsigned long lpp;
  769. if (!scanhex(&lpp)) {
  770. printf("Invalid number.\n");
  771. lpp = 0;
  772. }
  773. xmon_set_pagination_lpp(lpp);
  774. }
  775. /* Command interpreting routine */
  776. static char *last_cmd;
  777. static int
  778. cmds(struct pt_regs *excp)
  779. {
  780. int cmd = 0;
  781. last_cmd = NULL;
  782. xmon_regs = excp;
  783. xmon_show_stack(excp->gpr[1], excp->link, excp->nip);
  784. for(;;) {
  785. #ifdef CONFIG_SMP
  786. printf("%x:", smp_processor_id());
  787. #endif /* CONFIG_SMP */
  788. printf("mon> ");
  789. flush_input();
  790. termch = 0;
  791. cmd = skipbl();
  792. if( cmd == '\n' ) {
  793. if (last_cmd == NULL)
  794. continue;
  795. take_input(last_cmd);
  796. last_cmd = NULL;
  797. cmd = inchar();
  798. }
  799. switch (cmd) {
  800. case 'm':
  801. cmd = inchar();
  802. switch (cmd) {
  803. case 'm':
  804. case 's':
  805. case 'd':
  806. memops(cmd);
  807. break;
  808. case 'l':
  809. memlocate();
  810. break;
  811. case 'z':
  812. memzcan();
  813. break;
  814. case 'i':
  815. show_mem(0, NULL);
  816. break;
  817. default:
  818. termch = cmd;
  819. memex();
  820. }
  821. break;
  822. case 'd':
  823. dump();
  824. break;
  825. case 'l':
  826. symbol_lookup();
  827. break;
  828. case 'r':
  829. prregs(excp); /* print regs */
  830. break;
  831. case 'e':
  832. excprint(excp);
  833. break;
  834. case 'S':
  835. super_regs();
  836. break;
  837. case 't':
  838. backtrace(excp);
  839. break;
  840. case 'f':
  841. cacheflush();
  842. break;
  843. case 's':
  844. if (do_spu_cmd() == 0)
  845. break;
  846. if (do_step(excp))
  847. return cmd;
  848. break;
  849. case 'x':
  850. case 'X':
  851. return cmd;
  852. case EOF:
  853. printf(" <no input ...>\n");
  854. mdelay(2000);
  855. return cmd;
  856. case '?':
  857. xmon_puts(help_string);
  858. break;
  859. case '#':
  860. set_lpp_cmd();
  861. break;
  862. case 'b':
  863. bpt_cmds();
  864. break;
  865. case 'C':
  866. csum();
  867. break;
  868. case 'c':
  869. if (cpu_cmd())
  870. return 0;
  871. break;
  872. case 'z':
  873. bootcmds();
  874. break;
  875. case 'p':
  876. proccall();
  877. break;
  878. case 'P':
  879. show_tasks();
  880. break;
  881. #ifdef CONFIG_PPC_STD_MMU
  882. case 'u':
  883. dump_segments();
  884. break;
  885. #elif defined(CONFIG_44x)
  886. case 'u':
  887. dump_tlb_44x();
  888. break;
  889. #elif defined(CONFIG_PPC_BOOK3E)
  890. case 'u':
  891. dump_tlb_book3e();
  892. break;
  893. #endif
  894. default:
  895. printf("Unrecognized command: ");
  896. do {
  897. if (' ' < cmd && cmd <= '~')
  898. putchar(cmd);
  899. else
  900. printf("\\x%x", cmd);
  901. cmd = inchar();
  902. } while (cmd != '\n');
  903. printf(" (type ? for help)\n");
  904. break;
  905. }
  906. }
  907. }
  908. #ifdef CONFIG_BOOKE
  909. static int do_step(struct pt_regs *regs)
  910. {
  911. regs->msr |= MSR_DE;
  912. mtspr(SPRN_DBCR0, mfspr(SPRN_DBCR0) | DBCR0_IC | DBCR0_IDM);
  913. return 1;
  914. }
  915. #else
  916. /*
  917. * Step a single instruction.
  918. * Some instructions we emulate, others we execute with MSR_SE set.
  919. */
  920. static int do_step(struct pt_regs *regs)
  921. {
  922. unsigned int instr;
  923. int stepped;
  924. /* check we are in 64-bit kernel mode, translation enabled */
  925. if ((regs->msr & (MSR_64BIT|MSR_PR|MSR_IR)) == (MSR_64BIT|MSR_IR)) {
  926. if (mread(regs->nip, &instr, 4) == 4) {
  927. stepped = emulate_step(regs, instr);
  928. if (stepped < 0) {
  929. printf("Couldn't single-step %s instruction\n",
  930. (IS_RFID(instr)? "rfid": "mtmsrd"));
  931. return 0;
  932. }
  933. if (stepped > 0) {
  934. regs->trap = 0xd00 | (regs->trap & 1);
  935. printf("stepped to ");
  936. xmon_print_symbol(regs->nip, " ", "\n");
  937. ppc_inst_dump(regs->nip, 1, 0);
  938. return 0;
  939. }
  940. }
  941. }
  942. regs->msr |= MSR_SE;
  943. return 1;
  944. }
  945. #endif
  946. static void bootcmds(void)
  947. {
  948. int cmd;
  949. cmd = inchar();
  950. if (cmd == 'r')
  951. ppc_md.restart(NULL);
  952. else if (cmd == 'h')
  953. ppc_md.halt();
  954. else if (cmd == 'p')
  955. if (pm_power_off)
  956. pm_power_off();
  957. }
  958. static int cpu_cmd(void)
  959. {
  960. #ifdef CONFIG_SMP
  961. unsigned long cpu, first_cpu, last_cpu;
  962. int timeout;
  963. if (!scanhex(&cpu)) {
  964. /* print cpus waiting or in xmon */
  965. printf("cpus stopped:");
  966. last_cpu = first_cpu = NR_CPUS;
  967. for_each_possible_cpu(cpu) {
  968. if (cpumask_test_cpu(cpu, &cpus_in_xmon)) {
  969. if (cpu == last_cpu + 1) {
  970. last_cpu = cpu;
  971. } else {
  972. if (last_cpu != first_cpu)
  973. printf("-0x%lx", last_cpu);
  974. last_cpu = first_cpu = cpu;
  975. printf(" 0x%lx", cpu);
  976. }
  977. }
  978. }
  979. if (last_cpu != first_cpu)
  980. printf("-0x%lx", last_cpu);
  981. printf("\n");
  982. return 0;
  983. }
  984. /* try to switch to cpu specified */
  985. if (!cpumask_test_cpu(cpu, &cpus_in_xmon)) {
  986. printf("cpu 0x%x isn't in xmon\n", cpu);
  987. return 0;
  988. }
  989. xmon_taken = 0;
  990. mb();
  991. xmon_owner = cpu;
  992. timeout = 10000000;
  993. while (!xmon_taken) {
  994. if (--timeout == 0) {
  995. if (test_and_set_bit(0, &xmon_taken))
  996. break;
  997. /* take control back */
  998. mb();
  999. xmon_owner = smp_processor_id();
  1000. printf("cpu 0x%x didn't take control\n", cpu);
  1001. return 0;
  1002. }
  1003. barrier();
  1004. }
  1005. return 1;
  1006. #else
  1007. return 0;
  1008. #endif /* CONFIG_SMP */
  1009. }
  1010. static unsigned short fcstab[256] = {
  1011. 0x0000, 0x1189, 0x2312, 0x329b, 0x4624, 0x57ad, 0x6536, 0x74bf,
  1012. 0x8c48, 0x9dc1, 0xaf5a, 0xbed3, 0xca6c, 0xdbe5, 0xe97e, 0xf8f7,
  1013. 0x1081, 0x0108, 0x3393, 0x221a, 0x56a5, 0x472c, 0x75b7, 0x643e,
  1014. 0x9cc9, 0x8d40, 0xbfdb, 0xae52, 0xdaed, 0xcb64, 0xf9ff, 0xe876,
  1015. 0x2102, 0x308b, 0x0210, 0x1399, 0x6726, 0x76af, 0x4434, 0x55bd,
  1016. 0xad4a, 0xbcc3, 0x8e58, 0x9fd1, 0xeb6e, 0xfae7, 0xc87c, 0xd9f5,
  1017. 0x3183, 0x200a, 0x1291, 0x0318, 0x77a7, 0x662e, 0x54b5, 0x453c,
  1018. 0xbdcb, 0xac42, 0x9ed9, 0x8f50, 0xfbef, 0xea66, 0xd8fd, 0xc974,
  1019. 0x4204, 0x538d, 0x6116, 0x709f, 0x0420, 0x15a9, 0x2732, 0x36bb,
  1020. 0xce4c, 0xdfc5, 0xed5e, 0xfcd7, 0x8868, 0x99e1, 0xab7a, 0xbaf3,
  1021. 0x5285, 0x430c, 0x7197, 0x601e, 0x14a1, 0x0528, 0x37b3, 0x263a,
  1022. 0xdecd, 0xcf44, 0xfddf, 0xec56, 0x98e9, 0x8960, 0xbbfb, 0xaa72,
  1023. 0x6306, 0x728f, 0x4014, 0x519d, 0x2522, 0x34ab, 0x0630, 0x17b9,
  1024. 0xef4e, 0xfec7, 0xcc5c, 0xddd5, 0xa96a, 0xb8e3, 0x8a78, 0x9bf1,
  1025. 0x7387, 0x620e, 0x5095, 0x411c, 0x35a3, 0x242a, 0x16b1, 0x0738,
  1026. 0xffcf, 0xee46, 0xdcdd, 0xcd54, 0xb9eb, 0xa862, 0x9af9, 0x8b70,
  1027. 0x8408, 0x9581, 0xa71a, 0xb693, 0xc22c, 0xd3a5, 0xe13e, 0xf0b7,
  1028. 0x0840, 0x19c9, 0x2b52, 0x3adb, 0x4e64, 0x5fed, 0x6d76, 0x7cff,
  1029. 0x9489, 0x8500, 0xb79b, 0xa612, 0xd2ad, 0xc324, 0xf1bf, 0xe036,
  1030. 0x18c1, 0x0948, 0x3bd3, 0x2a5a, 0x5ee5, 0x4f6c, 0x7df7, 0x6c7e,
  1031. 0xa50a, 0xb483, 0x8618, 0x9791, 0xe32e, 0xf2a7, 0xc03c, 0xd1b5,
  1032. 0x2942, 0x38cb, 0x0a50, 0x1bd9, 0x6f66, 0x7eef, 0x4c74, 0x5dfd,
  1033. 0xb58b, 0xa402, 0x9699, 0x8710, 0xf3af, 0xe226, 0xd0bd, 0xc134,
  1034. 0x39c3, 0x284a, 0x1ad1, 0x0b58, 0x7fe7, 0x6e6e, 0x5cf5, 0x4d7c,
  1035. 0xc60c, 0xd785, 0xe51e, 0xf497, 0x8028, 0x91a1, 0xa33a, 0xb2b3,
  1036. 0x4a44, 0x5bcd, 0x6956, 0x78df, 0x0c60, 0x1de9, 0x2f72, 0x3efb,
  1037. 0xd68d, 0xc704, 0xf59f, 0xe416, 0x90a9, 0x8120, 0xb3bb, 0xa232,
  1038. 0x5ac5, 0x4b4c, 0x79d7, 0x685e, 0x1ce1, 0x0d68, 0x3ff3, 0x2e7a,
  1039. 0xe70e, 0xf687, 0xc41c, 0xd595, 0xa12a, 0xb0a3, 0x8238, 0x93b1,
  1040. 0x6b46, 0x7acf, 0x4854, 0x59dd, 0x2d62, 0x3ceb, 0x0e70, 0x1ff9,
  1041. 0xf78f, 0xe606, 0xd49d, 0xc514, 0xb1ab, 0xa022, 0x92b9, 0x8330,
  1042. 0x7bc7, 0x6a4e, 0x58d5, 0x495c, 0x3de3, 0x2c6a, 0x1ef1, 0x0f78
  1043. };
  1044. #define FCS(fcs, c) (((fcs) >> 8) ^ fcstab[((fcs) ^ (c)) & 0xff])
  1045. static void
  1046. csum(void)
  1047. {
  1048. unsigned int i;
  1049. unsigned short fcs;
  1050. unsigned char v;
  1051. if (!scanhex(&adrs))
  1052. return;
  1053. if (!scanhex(&ncsum))
  1054. return;
  1055. fcs = 0xffff;
  1056. for (i = 0; i < ncsum; ++i) {
  1057. if (mread(adrs+i, &v, 1) == 0) {
  1058. printf("csum stopped at "REG"\n", adrs+i);
  1059. break;
  1060. }
  1061. fcs = FCS(fcs, v);
  1062. }
  1063. printf("%x\n", fcs);
  1064. }
  1065. /*
  1066. * Check if this is a suitable place to put a breakpoint.
  1067. */
  1068. static long check_bp_loc(unsigned long addr)
  1069. {
  1070. unsigned int instr;
  1071. addr &= ~3;
  1072. if (!is_kernel_addr(addr)) {
  1073. printf("Breakpoints may only be placed at kernel addresses\n");
  1074. return 0;
  1075. }
  1076. if (!mread(addr, &instr, sizeof(instr))) {
  1077. printf("Can't read instruction at address %lx\n", addr);
  1078. return 0;
  1079. }
  1080. if (IS_MTMSRD(instr) || IS_RFID(instr)) {
  1081. printf("Breakpoints may not be placed on mtmsrd or rfid "
  1082. "instructions\n");
  1083. return 0;
  1084. }
  1085. return 1;
  1086. }
  1087. static char *breakpoint_help_string =
  1088. "Breakpoint command usage:\n"
  1089. "b show breakpoints\n"
  1090. "b <addr> [cnt] set breakpoint at given instr addr\n"
  1091. "bc clear all breakpoints\n"
  1092. "bc <n/addr> clear breakpoint number n or at addr\n"
  1093. "bi <addr> [cnt] set hardware instr breakpoint (POWER8 only)\n"
  1094. "bd <addr> [cnt] set hardware data breakpoint\n"
  1095. "";
  1096. static void
  1097. bpt_cmds(void)
  1098. {
  1099. int cmd;
  1100. unsigned long a;
  1101. int mode, i;
  1102. struct bpt *bp;
  1103. const char badaddr[] = "Only kernel addresses are permitted "
  1104. "for breakpoints\n";
  1105. cmd = inchar();
  1106. switch (cmd) {
  1107. #ifndef CONFIG_8xx
  1108. case 'd': /* bd - hardware data breakpoint */
  1109. mode = 7;
  1110. cmd = inchar();
  1111. if (cmd == 'r')
  1112. mode = 5;
  1113. else if (cmd == 'w')
  1114. mode = 6;
  1115. else
  1116. termch = cmd;
  1117. dabr.address = 0;
  1118. dabr.enabled = 0;
  1119. if (scanhex(&dabr.address)) {
  1120. if (!is_kernel_addr(dabr.address)) {
  1121. printf(badaddr);
  1122. break;
  1123. }
  1124. dabr.address &= ~HW_BRK_TYPE_DABR;
  1125. dabr.enabled = mode | BP_DABR;
  1126. }
  1127. break;
  1128. case 'i': /* bi - hardware instr breakpoint */
  1129. if (!cpu_has_feature(CPU_FTR_ARCH_207S)) {
  1130. printf("Hardware instruction breakpoint "
  1131. "not supported on this cpu\n");
  1132. break;
  1133. }
  1134. if (iabr) {
  1135. iabr->enabled &= ~BP_CIABR;
  1136. iabr = NULL;
  1137. }
  1138. if (!scanhex(&a))
  1139. break;
  1140. if (!check_bp_loc(a))
  1141. break;
  1142. bp = new_breakpoint(a);
  1143. if (bp != NULL) {
  1144. bp->enabled |= BP_CIABR;
  1145. iabr = bp;
  1146. }
  1147. break;
  1148. #endif
  1149. case 'c':
  1150. if (!scanhex(&a)) {
  1151. /* clear all breakpoints */
  1152. for (i = 0; i < NBPTS; ++i)
  1153. bpts[i].enabled = 0;
  1154. iabr = NULL;
  1155. dabr.enabled = 0;
  1156. printf("All breakpoints cleared\n");
  1157. break;
  1158. }
  1159. if (a <= NBPTS && a >= 1) {
  1160. /* assume a breakpoint number */
  1161. bp = &bpts[a-1]; /* bp nums are 1 based */
  1162. } else {
  1163. /* assume a breakpoint address */
  1164. bp = at_breakpoint(a);
  1165. if (bp == NULL) {
  1166. printf("No breakpoint at %lx\n", a);
  1167. break;
  1168. }
  1169. }
  1170. printf("Cleared breakpoint %lx (", BP_NUM(bp));
  1171. xmon_print_symbol(bp->address, " ", ")\n");
  1172. bp->enabled = 0;
  1173. break;
  1174. default:
  1175. termch = cmd;
  1176. cmd = skipbl();
  1177. if (cmd == '?') {
  1178. printf(breakpoint_help_string);
  1179. break;
  1180. }
  1181. termch = cmd;
  1182. if (!scanhex(&a)) {
  1183. /* print all breakpoints */
  1184. printf(" type address\n");
  1185. if (dabr.enabled) {
  1186. printf(" data "REG" [", dabr.address);
  1187. if (dabr.enabled & 1)
  1188. printf("r");
  1189. if (dabr.enabled & 2)
  1190. printf("w");
  1191. printf("]\n");
  1192. }
  1193. for (bp = bpts; bp < &bpts[NBPTS]; ++bp) {
  1194. if (!bp->enabled)
  1195. continue;
  1196. printf("%2x %s ", BP_NUM(bp),
  1197. (bp->enabled & BP_CIABR) ? "inst": "trap");
  1198. xmon_print_symbol(bp->address, " ", "\n");
  1199. }
  1200. break;
  1201. }
  1202. if (!check_bp_loc(a))
  1203. break;
  1204. bp = new_breakpoint(a);
  1205. if (bp != NULL)
  1206. bp->enabled |= BP_TRAP;
  1207. break;
  1208. }
  1209. }
  1210. /* Very cheap human name for vector lookup. */
  1211. static
  1212. const char *getvecname(unsigned long vec)
  1213. {
  1214. char *ret;
  1215. switch (vec) {
  1216. case 0x100: ret = "(System Reset)"; break;
  1217. case 0x200: ret = "(Machine Check)"; break;
  1218. case 0x300: ret = "(Data Access)"; break;
  1219. case 0x380: ret = "(Data SLB Access)"; break;
  1220. case 0x400: ret = "(Instruction Access)"; break;
  1221. case 0x480: ret = "(Instruction SLB Access)"; break;
  1222. case 0x500: ret = "(Hardware Interrupt)"; break;
  1223. case 0x600: ret = "(Alignment)"; break;
  1224. case 0x700: ret = "(Program Check)"; break;
  1225. case 0x800: ret = "(FPU Unavailable)"; break;
  1226. case 0x900: ret = "(Decrementer)"; break;
  1227. case 0x980: ret = "(Hypervisor Decrementer)"; break;
  1228. case 0xa00: ret = "(Doorbell)"; break;
  1229. case 0xc00: ret = "(System Call)"; break;
  1230. case 0xd00: ret = "(Single Step)"; break;
  1231. case 0xe40: ret = "(Emulation Assist)"; break;
  1232. case 0xe60: ret = "(HMI)"; break;
  1233. case 0xe80: ret = "(Hypervisor Doorbell)"; break;
  1234. case 0xf00: ret = "(Performance Monitor)"; break;
  1235. case 0xf20: ret = "(Altivec Unavailable)"; break;
  1236. case 0x1300: ret = "(Instruction Breakpoint)"; break;
  1237. case 0x1500: ret = "(Denormalisation)"; break;
  1238. case 0x1700: ret = "(Altivec Assist)"; break;
  1239. default: ret = "";
  1240. }
  1241. return ret;
  1242. }
  1243. static void get_function_bounds(unsigned long pc, unsigned long *startp,
  1244. unsigned long *endp)
  1245. {
  1246. unsigned long size, offset;
  1247. const char *name;
  1248. *startp = *endp = 0;
  1249. if (pc == 0)
  1250. return;
  1251. if (setjmp(bus_error_jmp) == 0) {
  1252. catch_memory_errors = 1;
  1253. sync();
  1254. name = kallsyms_lookup(pc, &size, &offset, NULL, tmpstr);
  1255. if (name != NULL) {
  1256. *startp = pc - offset;
  1257. *endp = pc - offset + size;
  1258. }
  1259. sync();
  1260. }
  1261. catch_memory_errors = 0;
  1262. }
  1263. #define LRSAVE_OFFSET (STACK_FRAME_LR_SAVE * sizeof(unsigned long))
  1264. #define MARKER_OFFSET (STACK_FRAME_MARKER * sizeof(unsigned long))
  1265. static void xmon_show_stack(unsigned long sp, unsigned long lr,
  1266. unsigned long pc)
  1267. {
  1268. int max_to_print = 64;
  1269. unsigned long ip;
  1270. unsigned long newsp;
  1271. unsigned long marker;
  1272. struct pt_regs regs;
  1273. while (max_to_print--) {
  1274. if (!is_kernel_addr(sp)) {
  1275. if (sp != 0)
  1276. printf("SP (%lx) is in userspace\n", sp);
  1277. break;
  1278. }
  1279. if (!mread(sp + LRSAVE_OFFSET, &ip, sizeof(unsigned long))
  1280. || !mread(sp, &newsp, sizeof(unsigned long))) {
  1281. printf("Couldn't read stack frame at %lx\n", sp);
  1282. break;
  1283. }
  1284. /*
  1285. * For the first stack frame, try to work out if
  1286. * LR and/or the saved LR value in the bottommost
  1287. * stack frame are valid.
  1288. */
  1289. if ((pc | lr) != 0) {
  1290. unsigned long fnstart, fnend;
  1291. unsigned long nextip;
  1292. int printip = 1;
  1293. get_function_bounds(pc, &fnstart, &fnend);
  1294. nextip = 0;
  1295. if (newsp > sp)
  1296. mread(newsp + LRSAVE_OFFSET, &nextip,
  1297. sizeof(unsigned long));
  1298. if (lr == ip) {
  1299. if (!is_kernel_addr(lr)
  1300. || (fnstart <= lr && lr < fnend))
  1301. printip = 0;
  1302. } else if (lr == nextip) {
  1303. printip = 0;
  1304. } else if (is_kernel_addr(lr)
  1305. && !(fnstart <= lr && lr < fnend)) {
  1306. printf("[link register ] ");
  1307. xmon_print_symbol(lr, " ", "\n");
  1308. }
  1309. if (printip) {
  1310. printf("["REG"] ", sp);
  1311. xmon_print_symbol(ip, " ", " (unreliable)\n");
  1312. }
  1313. pc = lr = 0;
  1314. } else {
  1315. printf("["REG"] ", sp);
  1316. xmon_print_symbol(ip, " ", "\n");
  1317. }
  1318. /* Look for "regshere" marker to see if this is
  1319. an exception frame. */
  1320. if (mread(sp + MARKER_OFFSET, &marker, sizeof(unsigned long))
  1321. && marker == STACK_FRAME_REGS_MARKER) {
  1322. if (mread(sp + STACK_FRAME_OVERHEAD, &regs, sizeof(regs))
  1323. != sizeof(regs)) {
  1324. printf("Couldn't read registers at %lx\n",
  1325. sp + STACK_FRAME_OVERHEAD);
  1326. break;
  1327. }
  1328. printf("--- Exception: %lx %s at ", regs.trap,
  1329. getvecname(TRAP(&regs)));
  1330. pc = regs.nip;
  1331. lr = regs.link;
  1332. xmon_print_symbol(pc, " ", "\n");
  1333. }
  1334. if (newsp == 0)
  1335. break;
  1336. sp = newsp;
  1337. }
  1338. }
  1339. static void backtrace(struct pt_regs *excp)
  1340. {
  1341. unsigned long sp;
  1342. if (scanhex(&sp))
  1343. xmon_show_stack(sp, 0, 0);
  1344. else
  1345. xmon_show_stack(excp->gpr[1], excp->link, excp->nip);
  1346. scannl();
  1347. }
  1348. static void print_bug_trap(struct pt_regs *regs)
  1349. {
  1350. #ifdef CONFIG_BUG
  1351. const struct bug_entry *bug;
  1352. unsigned long addr;
  1353. if (regs->msr & MSR_PR)
  1354. return; /* not in kernel */
  1355. addr = regs->nip; /* address of trap instruction */
  1356. if (!is_kernel_addr(addr))
  1357. return;
  1358. bug = find_bug(regs->nip);
  1359. if (bug == NULL)
  1360. return;
  1361. if (is_warning_bug(bug))
  1362. return;
  1363. #ifdef CONFIG_DEBUG_BUGVERBOSE
  1364. printf("kernel BUG at %s:%u!\n",
  1365. bug->file, bug->line);
  1366. #else
  1367. printf("kernel BUG at %p!\n", (void *)bug->bug_addr);
  1368. #endif
  1369. #endif /* CONFIG_BUG */
  1370. }
  1371. static void excprint(struct pt_regs *fp)
  1372. {
  1373. unsigned long trap;
  1374. #ifdef CONFIG_SMP
  1375. printf("cpu 0x%x: ", smp_processor_id());
  1376. #endif /* CONFIG_SMP */
  1377. trap = TRAP(fp);
  1378. printf("Vector: %lx %s at [%lx]\n", fp->trap, getvecname(trap), fp);
  1379. printf(" pc: ");
  1380. xmon_print_symbol(fp->nip, ": ", "\n");
  1381. printf(" lr: ", fp->link);
  1382. xmon_print_symbol(fp->link, ": ", "\n");
  1383. printf(" sp: %lx\n", fp->gpr[1]);
  1384. printf(" msr: %lx\n", fp->msr);
  1385. if (trap == 0x300 || trap == 0x380 || trap == 0x600 || trap == 0x200) {
  1386. printf(" dar: %lx\n", fp->dar);
  1387. if (trap != 0x380)
  1388. printf(" dsisr: %lx\n", fp->dsisr);
  1389. }
  1390. printf(" current = 0x%lx\n", current);
  1391. #ifdef CONFIG_PPC64
  1392. printf(" paca = 0x%lx\t softe: %d\t irq_happened: 0x%02x\n",
  1393. local_paca, local_paca->soft_enabled, local_paca->irq_happened);
  1394. #endif
  1395. if (current) {
  1396. printf(" pid = %ld, comm = %s\n",
  1397. current->pid, current->comm);
  1398. }
  1399. if (trap == 0x700)
  1400. print_bug_trap(fp);
  1401. printf(linux_banner);
  1402. }
  1403. static void prregs(struct pt_regs *fp)
  1404. {
  1405. int n, trap;
  1406. unsigned long base;
  1407. struct pt_regs regs;
  1408. if (scanhex(&base)) {
  1409. if (setjmp(bus_error_jmp) == 0) {
  1410. catch_memory_errors = 1;
  1411. sync();
  1412. regs = *(struct pt_regs *)base;
  1413. sync();
  1414. __delay(200);
  1415. } else {
  1416. catch_memory_errors = 0;
  1417. printf("*** Error reading registers from "REG"\n",
  1418. base);
  1419. return;
  1420. }
  1421. catch_memory_errors = 0;
  1422. fp = &regs;
  1423. }
  1424. #ifdef CONFIG_PPC64
  1425. if (FULL_REGS(fp)) {
  1426. for (n = 0; n < 16; ++n)
  1427. printf("R%.2ld = "REG" R%.2ld = "REG"\n",
  1428. n, fp->gpr[n], n+16, fp->gpr[n+16]);
  1429. } else {
  1430. for (n = 0; n < 7; ++n)
  1431. printf("R%.2ld = "REG" R%.2ld = "REG"\n",
  1432. n, fp->gpr[n], n+7, fp->gpr[n+7]);
  1433. }
  1434. #else
  1435. for (n = 0; n < 32; ++n) {
  1436. printf("R%.2d = %.8x%s", n, fp->gpr[n],
  1437. (n & 3) == 3? "\n": " ");
  1438. if (n == 12 && !FULL_REGS(fp)) {
  1439. printf("\n");
  1440. break;
  1441. }
  1442. }
  1443. #endif
  1444. printf("pc = ");
  1445. xmon_print_symbol(fp->nip, " ", "\n");
  1446. if (TRAP(fp) != 0xc00 && cpu_has_feature(CPU_FTR_CFAR)) {
  1447. printf("cfar= ");
  1448. xmon_print_symbol(fp->orig_gpr3, " ", "\n");
  1449. }
  1450. printf("lr = ");
  1451. xmon_print_symbol(fp->link, " ", "\n");
  1452. printf("msr = "REG" cr = %.8lx\n", fp->msr, fp->ccr);
  1453. printf("ctr = "REG" xer = "REG" trap = %4lx\n",
  1454. fp->ctr, fp->xer, fp->trap);
  1455. trap = TRAP(fp);
  1456. if (trap == 0x300 || trap == 0x380 || trap == 0x600)
  1457. printf("dar = "REG" dsisr = %.8lx\n", fp->dar, fp->dsisr);
  1458. }
  1459. static void cacheflush(void)
  1460. {
  1461. int cmd;
  1462. unsigned long nflush;
  1463. cmd = inchar();
  1464. if (cmd != 'i')
  1465. termch = cmd;
  1466. scanhex((void *)&adrs);
  1467. if (termch != '\n')
  1468. termch = 0;
  1469. nflush = 1;
  1470. scanhex(&nflush);
  1471. nflush = (nflush + L1_CACHE_BYTES - 1) / L1_CACHE_BYTES;
  1472. if (setjmp(bus_error_jmp) == 0) {
  1473. catch_memory_errors = 1;
  1474. sync();
  1475. if (cmd != 'i') {
  1476. for (; nflush > 0; --nflush, adrs += L1_CACHE_BYTES)
  1477. cflush((void *) adrs);
  1478. } else {
  1479. for (; nflush > 0; --nflush, adrs += L1_CACHE_BYTES)
  1480. cinval((void *) adrs);
  1481. }
  1482. sync();
  1483. /* wait a little while to see if we get a machine check */
  1484. __delay(200);
  1485. }
  1486. catch_memory_errors = 0;
  1487. }
  1488. extern unsigned long xmon_mfspr(int spr, unsigned long default_value);
  1489. extern void xmon_mtspr(int spr, unsigned long value);
  1490. static int
  1491. read_spr(int n, unsigned long *vp)
  1492. {
  1493. unsigned long ret = -1UL;
  1494. int ok = 0;
  1495. if (setjmp(bus_error_jmp) == 0) {
  1496. catch_spr_faults = 1;
  1497. sync();
  1498. ret = xmon_mfspr(n, *vp);
  1499. sync();
  1500. *vp = ret;
  1501. ok = 1;
  1502. }
  1503. catch_spr_faults = 0;
  1504. return ok;
  1505. }
  1506. static void
  1507. write_spr(int n, unsigned long val)
  1508. {
  1509. if (setjmp(bus_error_jmp) == 0) {
  1510. catch_spr_faults = 1;
  1511. sync();
  1512. xmon_mtspr(n, val);
  1513. sync();
  1514. } else {
  1515. printf("SPR 0x%03x (%4d) Faulted during write\n", n, n);
  1516. }
  1517. catch_spr_faults = 0;
  1518. }
  1519. static void dump_206_sprs(void)
  1520. {
  1521. #ifdef CONFIG_PPC64
  1522. if (!cpu_has_feature(CPU_FTR_ARCH_206))
  1523. return;
  1524. /* Actually some of these pre-date 2.06, but whatevs */
  1525. printf("srr0 = %.16x srr1 = %.16x dsisr = %.8x\n",
  1526. mfspr(SPRN_SRR0), mfspr(SPRN_SRR1), mfspr(SPRN_DSISR));
  1527. printf("dscr = %.16x ppr = %.16x pir = %.8x\n",
  1528. mfspr(SPRN_DSCR), mfspr(SPRN_PPR), mfspr(SPRN_PIR));
  1529. if (!(mfmsr() & MSR_HV))
  1530. return;
  1531. printf("sdr1 = %.16x hdar = %.16x hdsisr = %.8x\n",
  1532. mfspr(SPRN_SDR1), mfspr(SPRN_HDAR), mfspr(SPRN_HDSISR));
  1533. printf("hsrr0 = %.16x hsrr1 = %.16x hdec = %.8x\n",
  1534. mfspr(SPRN_HSRR0), mfspr(SPRN_HSRR1), mfspr(SPRN_HDEC));
  1535. printf("lpcr = %.16x pcr = %.16x lpidr = %.8x\n",
  1536. mfspr(SPRN_LPCR), mfspr(SPRN_PCR), mfspr(SPRN_LPID));
  1537. printf("hsprg0 = %.16x hsprg1 = %.16x\n",
  1538. mfspr(SPRN_HSPRG0), mfspr(SPRN_HSPRG1));
  1539. printf("dabr = %.16x dabrx = %.16x\n",
  1540. mfspr(SPRN_DABR), mfspr(SPRN_DABRX));
  1541. #endif
  1542. }
  1543. static void dump_207_sprs(void)
  1544. {
  1545. #ifdef CONFIG_PPC64
  1546. unsigned long msr;
  1547. if (!cpu_has_feature(CPU_FTR_ARCH_207S))
  1548. return;
  1549. printf("dpdes = %.16x tir = %.16x cir = %.8x\n",
  1550. mfspr(SPRN_DPDES), mfspr(SPRN_TIR), mfspr(SPRN_CIR));
  1551. printf("fscr = %.16x tar = %.16x pspb = %.8x\n",
  1552. mfspr(SPRN_FSCR), mfspr(SPRN_TAR), mfspr(SPRN_PSPB));
  1553. msr = mfmsr();
  1554. if (msr & MSR_TM) {
  1555. /* Only if TM has been enabled in the kernel */
  1556. printf("tfhar = %.16x tfiar = %.16x texasr = %.16x\n",
  1557. mfspr(SPRN_TFHAR), mfspr(SPRN_TFIAR),
  1558. mfspr(SPRN_TEXASR));
  1559. }
  1560. printf("mmcr0 = %.16x mmcr1 = %.16x mmcr2 = %.16x\n",
  1561. mfspr(SPRN_MMCR0), mfspr(SPRN_MMCR1), mfspr(SPRN_MMCR2));
  1562. printf("pmc1 = %.8x pmc2 = %.8x pmc3 = %.8x pmc4 = %.8x\n",
  1563. mfspr(SPRN_PMC1), mfspr(SPRN_PMC2),
  1564. mfspr(SPRN_PMC3), mfspr(SPRN_PMC4));
  1565. printf("mmcra = %.16x siar = %.16x pmc5 = %.8x\n",
  1566. mfspr(SPRN_MMCRA), mfspr(SPRN_SIAR), mfspr(SPRN_PMC5));
  1567. printf("sdar = %.16x sier = %.16x pmc6 = %.8x\n",
  1568. mfspr(SPRN_SDAR), mfspr(SPRN_SIER), mfspr(SPRN_PMC6));
  1569. printf("ebbhr = %.16x ebbrr = %.16x bescr = %.16x\n",
  1570. mfspr(SPRN_EBBHR), mfspr(SPRN_EBBRR), mfspr(SPRN_BESCR));
  1571. if (!(msr & MSR_HV))
  1572. return;
  1573. printf("hfscr = %.16x dhdes = %.16x rpr = %.16x\n",
  1574. mfspr(SPRN_HFSCR), mfspr(SPRN_DHDES), mfspr(SPRN_RPR));
  1575. printf("dawr = %.16x dawrx = %.16x ciabr = %.16x\n",
  1576. mfspr(SPRN_DAWR), mfspr(SPRN_DAWRX), mfspr(SPRN_CIABR));
  1577. #endif
  1578. }
  1579. static void dump_one_spr(int spr, bool show_unimplemented)
  1580. {
  1581. unsigned long val;
  1582. val = 0xdeadbeef;
  1583. if (!read_spr(spr, &val)) {
  1584. printf("SPR 0x%03x (%4d) Faulted during read\n", spr, spr);
  1585. return;
  1586. }
  1587. if (val == 0xdeadbeef) {
  1588. /* Looks like read was a nop, confirm */
  1589. val = 0x0badcafe;
  1590. if (!read_spr(spr, &val)) {
  1591. printf("SPR 0x%03x (%4d) Faulted during read\n", spr, spr);
  1592. return;
  1593. }
  1594. if (val == 0x0badcafe) {
  1595. if (show_unimplemented)
  1596. printf("SPR 0x%03x (%4d) Unimplemented\n", spr, spr);
  1597. return;
  1598. }
  1599. }
  1600. printf("SPR 0x%03x (%4d) = 0x%lx\n", spr, spr, val);
  1601. }
  1602. static void super_regs(void)
  1603. {
  1604. static unsigned long regno;
  1605. int cmd;
  1606. int spr;
  1607. cmd = skipbl();
  1608. switch (cmd) {
  1609. case '\n': {
  1610. unsigned long sp, toc;
  1611. asm("mr %0,1" : "=r" (sp) :);
  1612. asm("mr %0,2" : "=r" (toc) :);
  1613. printf("msr = "REG" sprg0 = "REG"\n",
  1614. mfmsr(), mfspr(SPRN_SPRG0));
  1615. printf("pvr = "REG" sprg1 = "REG"\n",
  1616. mfspr(SPRN_PVR), mfspr(SPRN_SPRG1));
  1617. printf("dec = "REG" sprg2 = "REG"\n",
  1618. mfspr(SPRN_DEC), mfspr(SPRN_SPRG2));
  1619. printf("sp = "REG" sprg3 = "REG"\n", sp, mfspr(SPRN_SPRG3));
  1620. printf("toc = "REG" dar = "REG"\n", toc, mfspr(SPRN_DAR));
  1621. dump_206_sprs();
  1622. dump_207_sprs();
  1623. return;
  1624. }
  1625. case 'w': {
  1626. unsigned long val;
  1627. scanhex(&regno);
  1628. val = 0;
  1629. read_spr(regno, &val);
  1630. scanhex(&val);
  1631. write_spr(regno, val);
  1632. dump_one_spr(regno, true);
  1633. break;
  1634. }
  1635. case 'r':
  1636. scanhex(&regno);
  1637. dump_one_spr(regno, true);
  1638. break;
  1639. case 'a':
  1640. /* dump ALL SPRs */
  1641. for (spr = 1; spr < 1024; ++spr)
  1642. dump_one_spr(spr, false);
  1643. break;
  1644. }
  1645. scannl();
  1646. }
  1647. /*
  1648. * Stuff for reading and writing memory safely
  1649. */
  1650. static int
  1651. mread(unsigned long adrs, void *buf, int size)
  1652. {
  1653. volatile int n;
  1654. char *p, *q;
  1655. n = 0;
  1656. if (setjmp(bus_error_jmp) == 0) {
  1657. catch_memory_errors = 1;
  1658. sync();
  1659. p = (char *)adrs;
  1660. q = (char *)buf;
  1661. switch (size) {
  1662. case 2:
  1663. *(u16 *)q = *(u16 *)p;
  1664. break;
  1665. case 4:
  1666. *(u32 *)q = *(u32 *)p;
  1667. break;
  1668. case 8:
  1669. *(u64 *)q = *(u64 *)p;
  1670. break;
  1671. default:
  1672. for( ; n < size; ++n) {
  1673. *q++ = *p++;
  1674. sync();
  1675. }
  1676. }
  1677. sync();
  1678. /* wait a little while to see if we get a machine check */
  1679. __delay(200);
  1680. n = size;
  1681. }
  1682. catch_memory_errors = 0;
  1683. return n;
  1684. }
  1685. static int
  1686. mwrite(unsigned long adrs, void *buf, int size)
  1687. {
  1688. volatile int n;
  1689. char *p, *q;
  1690. n = 0;
  1691. if (setjmp(bus_error_jmp) == 0) {
  1692. catch_memory_errors = 1;
  1693. sync();
  1694. p = (char *) adrs;
  1695. q = (char *) buf;
  1696. switch (size) {
  1697. case 2:
  1698. *(u16 *)p = *(u16 *)q;
  1699. break;
  1700. case 4:
  1701. *(u32 *)p = *(u32 *)q;
  1702. break;
  1703. case 8:
  1704. *(u64 *)p = *(u64 *)q;
  1705. break;
  1706. default:
  1707. for ( ; n < size; ++n) {
  1708. *p++ = *q++;
  1709. sync();
  1710. }
  1711. }
  1712. sync();
  1713. /* wait a little while to see if we get a machine check */
  1714. __delay(200);
  1715. n = size;
  1716. } else {
  1717. printf("*** Error writing address "REG"\n", adrs + n);
  1718. }
  1719. catch_memory_errors = 0;
  1720. return n;
  1721. }
  1722. static int fault_type;
  1723. static int fault_except;
  1724. static char *fault_chars[] = { "--", "**", "##" };
  1725. static int handle_fault(struct pt_regs *regs)
  1726. {
  1727. fault_except = TRAP(regs);
  1728. switch (TRAP(regs)) {
  1729. case 0x200:
  1730. fault_type = 0;
  1731. break;
  1732. case 0x300:
  1733. case 0x380:
  1734. fault_type = 1;
  1735. break;
  1736. default:
  1737. fault_type = 2;
  1738. }
  1739. longjmp(bus_error_jmp, 1);
  1740. return 0;
  1741. }
  1742. #define SWAP(a, b, t) ((t) = (a), (a) = (b), (b) = (t))
  1743. static void
  1744. byterev(unsigned char *val, int size)
  1745. {
  1746. int t;
  1747. switch (size) {
  1748. case 2:
  1749. SWAP(val[0], val[1], t);
  1750. break;
  1751. case 4:
  1752. SWAP(val[0], val[3], t);
  1753. SWAP(val[1], val[2], t);
  1754. break;
  1755. case 8: /* is there really any use for this? */
  1756. SWAP(val[0], val[7], t);
  1757. SWAP(val[1], val[6], t);
  1758. SWAP(val[2], val[5], t);
  1759. SWAP(val[3], val[4], t);
  1760. break;
  1761. }
  1762. }
  1763. static int brev;
  1764. static int mnoread;
  1765. static char *memex_help_string =
  1766. "Memory examine command usage:\n"
  1767. "m [addr] [flags] examine/change memory\n"
  1768. " addr is optional. will start where left off.\n"
  1769. " flags may include chars from this set:\n"
  1770. " b modify by bytes (default)\n"
  1771. " w modify by words (2 byte)\n"
  1772. " l modify by longs (4 byte)\n"
  1773. " d modify by doubleword (8 byte)\n"
  1774. " r toggle reverse byte order mode\n"
  1775. " n do not read memory (for i/o spaces)\n"
  1776. " . ok to read (default)\n"
  1777. "NOTE: flags are saved as defaults\n"
  1778. "";
  1779. static char *memex_subcmd_help_string =
  1780. "Memory examine subcommands:\n"
  1781. " hexval write this val to current location\n"
  1782. " 'string' write chars from string to this location\n"
  1783. " ' increment address\n"
  1784. " ^ decrement address\n"
  1785. " / increment addr by 0x10. //=0x100, ///=0x1000, etc\n"
  1786. " \\ decrement addr by 0x10. \\\\=0x100, \\\\\\=0x1000, etc\n"
  1787. " ` clear no-read flag\n"
  1788. " ; stay at this addr\n"
  1789. " v change to byte mode\n"
  1790. " w change to word (2 byte) mode\n"
  1791. " l change to long (4 byte) mode\n"
  1792. " u change to doubleword (8 byte) mode\n"
  1793. " m addr change current addr\n"
  1794. " n toggle no-read flag\n"
  1795. " r toggle byte reverse flag\n"
  1796. " < count back up count bytes\n"
  1797. " > count skip forward count bytes\n"
  1798. " x exit this mode\n"
  1799. "";
  1800. static void
  1801. memex(void)
  1802. {
  1803. int cmd, inc, i, nslash;
  1804. unsigned long n;
  1805. unsigned char val[16];
  1806. scanhex((void *)&adrs);
  1807. cmd = skipbl();
  1808. if (cmd == '?') {
  1809. printf(memex_help_string);
  1810. return;
  1811. } else {
  1812. termch = cmd;
  1813. }
  1814. last_cmd = "m\n";
  1815. while ((cmd = skipbl()) != '\n') {
  1816. switch( cmd ){
  1817. case 'b': size = 1; break;
  1818. case 'w': size = 2; break;
  1819. case 'l': size = 4; break;
  1820. case 'd': size = 8; break;
  1821. case 'r': brev = !brev; break;
  1822. case 'n': mnoread = 1; break;
  1823. case '.': mnoread = 0; break;
  1824. }
  1825. }
  1826. if( size <= 0 )
  1827. size = 1;
  1828. else if( size > 8 )
  1829. size = 8;
  1830. for(;;){
  1831. if (!mnoread)
  1832. n = mread(adrs, val, size);
  1833. printf(REG"%c", adrs, brev? 'r': ' ');
  1834. if (!mnoread) {
  1835. if (brev)
  1836. byterev(val, size);
  1837. putchar(' ');
  1838. for (i = 0; i < n; ++i)
  1839. printf("%.2x", val[i]);
  1840. for (; i < size; ++i)
  1841. printf("%s", fault_chars[fault_type]);
  1842. }
  1843. putchar(' ');
  1844. inc = size;
  1845. nslash = 0;
  1846. for(;;){
  1847. if( scanhex(&n) ){
  1848. for (i = 0; i < size; ++i)
  1849. val[i] = n >> (i * 8);
  1850. if (!brev)
  1851. byterev(val, size);
  1852. mwrite(adrs, val, size);
  1853. inc = size;
  1854. }
  1855. cmd = skipbl();
  1856. if (cmd == '\n')
  1857. break;
  1858. inc = 0;
  1859. switch (cmd) {
  1860. case '\'':
  1861. for(;;){
  1862. n = inchar();
  1863. if( n == '\\' )
  1864. n = bsesc();
  1865. else if( n == '\'' )
  1866. break;
  1867. for (i = 0; i < size; ++i)
  1868. val[i] = n >> (i * 8);
  1869. if (!brev)
  1870. byterev(val, size);
  1871. mwrite(adrs, val, size);
  1872. adrs += size;
  1873. }
  1874. adrs -= size;
  1875. inc = size;
  1876. break;
  1877. case ',':
  1878. adrs += size;
  1879. break;
  1880. case '.':
  1881. mnoread = 0;
  1882. break;
  1883. case ';':
  1884. break;
  1885. case 'x':
  1886. case EOF:
  1887. scannl();
  1888. return;
  1889. case 'b':
  1890. case 'v':
  1891. size = 1;
  1892. break;
  1893. case 'w':
  1894. size = 2;
  1895. break;
  1896. case 'l':
  1897. size = 4;
  1898. break;
  1899. case 'u':
  1900. size = 8;
  1901. break;
  1902. case '^':
  1903. adrs -= size;
  1904. break;
  1905. case '/':
  1906. if (nslash > 0)
  1907. adrs -= 1 << nslash;
  1908. else
  1909. nslash = 0;
  1910. nslash += 4;
  1911. adrs += 1 << nslash;
  1912. break;
  1913. case '\\':
  1914. if (nslash < 0)
  1915. adrs += 1 << -nslash;
  1916. else
  1917. nslash = 0;
  1918. nslash -= 4;
  1919. adrs -= 1 << -nslash;
  1920. break;
  1921. case 'm':
  1922. scanhex((void *)&adrs);
  1923. break;
  1924. case 'n':
  1925. mnoread = 1;
  1926. break;
  1927. case 'r':
  1928. brev = !brev;
  1929. break;
  1930. case '<':
  1931. n = size;
  1932. scanhex(&n);
  1933. adrs -= n;
  1934. break;
  1935. case '>':
  1936. n = size;
  1937. scanhex(&n);
  1938. adrs += n;
  1939. break;
  1940. case '?':
  1941. printf(memex_subcmd_help_string);
  1942. break;
  1943. }
  1944. }
  1945. adrs += inc;
  1946. }
  1947. }
  1948. static int
  1949. bsesc(void)
  1950. {
  1951. int c;
  1952. c = inchar();
  1953. switch( c ){
  1954. case 'n': c = '\n'; break;
  1955. case 'r': c = '\r'; break;
  1956. case 'b': c = '\b'; break;
  1957. case 't': c = '\t'; break;
  1958. }
  1959. return c;
  1960. }
  1961. static void xmon_rawdump (unsigned long adrs, long ndump)
  1962. {
  1963. long n, m, r, nr;
  1964. unsigned char temp[16];
  1965. for (n = ndump; n > 0;) {
  1966. r = n < 16? n: 16;
  1967. nr = mread(adrs, temp, r);
  1968. adrs += nr;
  1969. for (m = 0; m < r; ++m) {
  1970. if (m < nr)
  1971. printf("%.2x", temp[m]);
  1972. else
  1973. printf("%s", fault_chars[fault_type]);
  1974. }
  1975. n -= r;
  1976. if (nr < r)
  1977. break;
  1978. }
  1979. printf("\n");
  1980. }
  1981. #ifdef CONFIG_PPC64
  1982. static void dump_one_paca(int cpu)
  1983. {
  1984. struct paca_struct *p;
  1985. #ifdef CONFIG_PPC_STD_MMU_64
  1986. int i = 0;
  1987. #endif
  1988. if (setjmp(bus_error_jmp) != 0) {
  1989. printf("*** Error dumping paca for cpu 0x%x!\n", cpu);
  1990. return;
  1991. }
  1992. catch_memory_errors = 1;
  1993. sync();
  1994. p = &paca[cpu];
  1995. printf("paca for cpu 0x%x @ %p:\n", cpu, p);
  1996. printf(" %-*s = %s\n", 20, "possible", cpu_possible(cpu) ? "yes" : "no");
  1997. printf(" %-*s = %s\n", 20, "present", cpu_present(cpu) ? "yes" : "no");
  1998. printf(" %-*s = %s\n", 20, "online", cpu_online(cpu) ? "yes" : "no");
  1999. #define DUMP(paca, name, format) \
  2000. printf(" %-*s = %#-*"format"\t(0x%lx)\n", 20, #name, 18, paca->name, \
  2001. offsetof(struct paca_struct, name));
  2002. DUMP(p, lock_token, "x");
  2003. DUMP(p, paca_index, "x");
  2004. DUMP(p, kernel_toc, "lx");
  2005. DUMP(p, kernelbase, "lx");
  2006. DUMP(p, kernel_msr, "lx");
  2007. DUMP(p, emergency_sp, "p");
  2008. #ifdef CONFIG_PPC_BOOK3S_64
  2009. DUMP(p, mc_emergency_sp, "p");
  2010. DUMP(p, in_mce, "x");
  2011. DUMP(p, hmi_event_available, "x");
  2012. #endif
  2013. DUMP(p, data_offset, "lx");
  2014. DUMP(p, hw_cpu_id, "x");
  2015. DUMP(p, cpu_start, "x");
  2016. DUMP(p, kexec_state, "x");
  2017. #ifdef CONFIG_PPC_STD_MMU_64
  2018. for (i = 0; i < SLB_NUM_BOLTED; i++) {
  2019. u64 esid, vsid;
  2020. if (!p->slb_shadow_ptr)
  2021. continue;
  2022. esid = be64_to_cpu(p->slb_shadow_ptr->save_area[i].esid);
  2023. vsid = be64_to_cpu(p->slb_shadow_ptr->save_area[i].vsid);
  2024. if (esid || vsid) {
  2025. printf(" slb_shadow[%d]: = 0x%016lx 0x%016lx\n",
  2026. i, esid, vsid);
  2027. }
  2028. }
  2029. DUMP(p, vmalloc_sllp, "x");
  2030. DUMP(p, slb_cache_ptr, "x");
  2031. for (i = 0; i < SLB_CACHE_ENTRIES; i++)
  2032. printf(" slb_cache[%d]: = 0x%016lx\n", i, p->slb_cache[i]);
  2033. #endif
  2034. DUMP(p, dscr_default, "llx");
  2035. #ifdef CONFIG_PPC_BOOK3E
  2036. DUMP(p, pgd, "p");
  2037. DUMP(p, kernel_pgd, "p");
  2038. DUMP(p, tcd_ptr, "p");
  2039. DUMP(p, mc_kstack, "p");
  2040. DUMP(p, crit_kstack, "p");
  2041. DUMP(p, dbg_kstack, "p");
  2042. #endif
  2043. DUMP(p, __current, "p");
  2044. DUMP(p, kstack, "lx");
  2045. DUMP(p, stab_rr, "lx");
  2046. DUMP(p, saved_r1, "lx");
  2047. DUMP(p, trap_save, "x");
  2048. DUMP(p, soft_enabled, "x");
  2049. DUMP(p, irq_happened, "x");
  2050. DUMP(p, io_sync, "x");
  2051. DUMP(p, irq_work_pending, "x");
  2052. DUMP(p, nap_state_lost, "x");
  2053. DUMP(p, sprg_vdso, "llx");
  2054. #ifdef CONFIG_PPC_TRANSACTIONAL_MEM
  2055. DUMP(p, tm_scratch, "llx");
  2056. #endif
  2057. #ifdef CONFIG_PPC_POWERNV
  2058. DUMP(p, core_idle_state_ptr, "p");
  2059. DUMP(p, thread_idle_state, "x");
  2060. DUMP(p, thread_mask, "x");
  2061. DUMP(p, subcore_sibling_mask, "x");
  2062. #endif
  2063. DUMP(p, accounting.utime, "llx");
  2064. DUMP(p, accounting.stime, "llx");
  2065. DUMP(p, accounting.utime_scaled, "llx");
  2066. DUMP(p, accounting.starttime, "llx");
  2067. DUMP(p, accounting.starttime_user, "llx");
  2068. DUMP(p, accounting.startspurr, "llx");
  2069. DUMP(p, accounting.utime_sspurr, "llx");
  2070. DUMP(p, accounting.steal_time, "llx");
  2071. #undef DUMP
  2072. catch_memory_errors = 0;
  2073. sync();
  2074. }
  2075. static void dump_all_pacas(void)
  2076. {
  2077. int cpu;
  2078. if (num_possible_cpus() == 0) {
  2079. printf("No possible cpus, use 'dp #' to dump individual cpus\n");
  2080. return;
  2081. }
  2082. for_each_possible_cpu(cpu)
  2083. dump_one_paca(cpu);
  2084. }
  2085. static void dump_pacas(void)
  2086. {
  2087. unsigned long num;
  2088. int c;
  2089. c = inchar();
  2090. if (c == 'a') {
  2091. dump_all_pacas();
  2092. return;
  2093. }
  2094. termch = c; /* Put c back, it wasn't 'a' */
  2095. if (scanhex(&num))
  2096. dump_one_paca(num);
  2097. else
  2098. dump_one_paca(xmon_owner);
  2099. }
  2100. #endif
  2101. static void dump_by_size(unsigned long addr, long count, int size)
  2102. {
  2103. unsigned char temp[16];
  2104. int i, j;
  2105. u64 val;
  2106. count = ALIGN(count, 16);
  2107. for (i = 0; i < count; i += 16, addr += 16) {
  2108. printf(REG, addr);
  2109. if (mread(addr, temp, 16) != 16) {
  2110. printf("\nFaulted reading %d bytes from 0x"REG"\n", 16, addr);
  2111. return;
  2112. }
  2113. for (j = 0; j < 16; j += size) {
  2114. putchar(' ');
  2115. switch (size) {
  2116. case 1: val = temp[j]; break;
  2117. case 2: val = *(u16 *)&temp[j]; break;
  2118. case 4: val = *(u32 *)&temp[j]; break;
  2119. case 8: val = *(u64 *)&temp[j]; break;
  2120. default: val = 0;
  2121. }
  2122. printf("%0*lx", size * 2, val);
  2123. }
  2124. printf("\n");
  2125. }
  2126. }
  2127. static void
  2128. dump(void)
  2129. {
  2130. static char last[] = { "d?\n" };
  2131. int c;
  2132. c = inchar();
  2133. #ifdef CONFIG_PPC64
  2134. if (c == 'p') {
  2135. xmon_start_pagination();
  2136. dump_pacas();
  2137. xmon_end_pagination();
  2138. return;
  2139. }
  2140. #endif
  2141. if (c == '\n')
  2142. termch = c;
  2143. scanhex((void *)&adrs);
  2144. if (termch != '\n')
  2145. termch = 0;
  2146. if (c == 'i') {
  2147. scanhex(&nidump);
  2148. if (nidump == 0)
  2149. nidump = 16;
  2150. else if (nidump > MAX_DUMP)
  2151. nidump = MAX_DUMP;
  2152. adrs += ppc_inst_dump(adrs, nidump, 1);
  2153. last_cmd = "di\n";
  2154. } else if (c == 'l') {
  2155. dump_log_buf();
  2156. } else if (c == 'o') {
  2157. dump_opal_msglog();
  2158. } else if (c == 't') {
  2159. ftrace_dump(DUMP_ALL);
  2160. tracing_on();
  2161. } else if (c == 'r') {
  2162. scanhex(&ndump);
  2163. if (ndump == 0)
  2164. ndump = 64;
  2165. xmon_rawdump(adrs, ndump);
  2166. adrs += ndump;
  2167. last_cmd = "dr\n";
  2168. } else {
  2169. scanhex(&ndump);
  2170. if (ndump == 0)
  2171. ndump = 64;
  2172. else if (ndump > MAX_DUMP)
  2173. ndump = MAX_DUMP;
  2174. switch (c) {
  2175. case '8':
  2176. case '4':
  2177. case '2':
  2178. case '1':
  2179. ndump = ALIGN(ndump, 16);
  2180. dump_by_size(adrs, ndump, c - '0');
  2181. last[1] = c;
  2182. last_cmd = last;
  2183. break;
  2184. default:
  2185. prdump(adrs, ndump);
  2186. last_cmd = "d\n";
  2187. }
  2188. adrs += ndump;
  2189. }
  2190. }
  2191. static void
  2192. prdump(unsigned long adrs, long ndump)
  2193. {
  2194. long n, m, c, r, nr;
  2195. unsigned char temp[16];
  2196. for (n = ndump; n > 0;) {
  2197. printf(REG, adrs);
  2198. putchar(' ');
  2199. r = n < 16? n: 16;
  2200. nr = mread(adrs, temp, r);
  2201. adrs += nr;
  2202. for (m = 0; m < r; ++m) {
  2203. if ((m & (sizeof(long) - 1)) == 0 && m > 0)
  2204. putchar(' ');
  2205. if (m < nr)
  2206. printf("%.2x", temp[m]);
  2207. else
  2208. printf("%s", fault_chars[fault_type]);
  2209. }
  2210. for (; m < 16; ++m) {
  2211. if ((m & (sizeof(long) - 1)) == 0)
  2212. putchar(' ');
  2213. printf(" ");
  2214. }
  2215. printf(" |");
  2216. for (m = 0; m < r; ++m) {
  2217. if (m < nr) {
  2218. c = temp[m];
  2219. putchar(' ' <= c && c <= '~'? c: '.');
  2220. } else
  2221. putchar(' ');
  2222. }
  2223. n -= r;
  2224. for (; m < 16; ++m)
  2225. putchar(' ');
  2226. printf("|\n");
  2227. if (nr < r)
  2228. break;
  2229. }
  2230. }
  2231. typedef int (*instruction_dump_func)(unsigned long inst, unsigned long addr);
  2232. static int
  2233. generic_inst_dump(unsigned long adr, long count, int praddr,
  2234. instruction_dump_func dump_func)
  2235. {
  2236. int nr, dotted;
  2237. unsigned long first_adr;
  2238. unsigned long inst, last_inst = 0;
  2239. unsigned char val[4];
  2240. dotted = 0;
  2241. for (first_adr = adr; count > 0; --count, adr += 4) {
  2242. nr = mread(adr, val, 4);
  2243. if (nr == 0) {
  2244. if (praddr) {
  2245. const char *x = fault_chars[fault_type];
  2246. printf(REG" %s%s%s%s\n", adr, x, x, x, x);
  2247. }
  2248. break;
  2249. }
  2250. inst = GETWORD(val);
  2251. if (adr > first_adr && inst == last_inst) {
  2252. if (!dotted) {
  2253. printf(" ...\n");
  2254. dotted = 1;
  2255. }
  2256. continue;
  2257. }
  2258. dotted = 0;
  2259. last_inst = inst;
  2260. if (praddr)
  2261. printf(REG" %.8x", adr, inst);
  2262. printf("\t");
  2263. dump_func(inst, adr);
  2264. printf("\n");
  2265. }
  2266. return adr - first_adr;
  2267. }
  2268. static int
  2269. ppc_inst_dump(unsigned long adr, long count, int praddr)
  2270. {
  2271. return generic_inst_dump(adr, count, praddr, print_insn_powerpc);
  2272. }
  2273. void
  2274. print_address(unsigned long addr)
  2275. {
  2276. xmon_print_symbol(addr, "\t# ", "");
  2277. }
  2278. void
  2279. dump_log_buf(void)
  2280. {
  2281. struct kmsg_dumper dumper = { .active = 1 };
  2282. unsigned char buf[128];
  2283. size_t len;
  2284. if (setjmp(bus_error_jmp) != 0) {
  2285. printf("Error dumping printk buffer!\n");
  2286. return;
  2287. }
  2288. catch_memory_errors = 1;
  2289. sync();
  2290. kmsg_dump_rewind_nolock(&dumper);
  2291. xmon_start_pagination();
  2292. while (kmsg_dump_get_line_nolock(&dumper, false, buf, sizeof(buf), &len)) {
  2293. buf[len] = '\0';
  2294. printf("%s", buf);
  2295. }
  2296. xmon_end_pagination();
  2297. sync();
  2298. /* wait a little while to see if we get a machine check */
  2299. __delay(200);
  2300. catch_memory_errors = 0;
  2301. }
  2302. #ifdef CONFIG_PPC_POWERNV
  2303. static void dump_opal_msglog(void)
  2304. {
  2305. unsigned char buf[128];
  2306. ssize_t res;
  2307. loff_t pos = 0;
  2308. if (!firmware_has_feature(FW_FEATURE_OPAL)) {
  2309. printf("Machine is not running OPAL firmware.\n");
  2310. return;
  2311. }
  2312. if (setjmp(bus_error_jmp) != 0) {
  2313. printf("Error dumping OPAL msglog!\n");
  2314. return;
  2315. }
  2316. catch_memory_errors = 1;
  2317. sync();
  2318. xmon_start_pagination();
  2319. while ((res = opal_msglog_copy(buf, pos, sizeof(buf) - 1))) {
  2320. if (res < 0) {
  2321. printf("Error dumping OPAL msglog! Error: %zd\n", res);
  2322. break;
  2323. }
  2324. buf[res] = '\0';
  2325. printf("%s", buf);
  2326. pos += res;
  2327. }
  2328. xmon_end_pagination();
  2329. sync();
  2330. /* wait a little while to see if we get a machine check */
  2331. __delay(200);
  2332. catch_memory_errors = 0;
  2333. }
  2334. #endif
  2335. /*
  2336. * Memory operations - move, set, print differences
  2337. */
  2338. static unsigned long mdest; /* destination address */
  2339. static unsigned long msrc; /* source address */
  2340. static unsigned long mval; /* byte value to set memory to */
  2341. static unsigned long mcount; /* # bytes to affect */
  2342. static unsigned long mdiffs; /* max # differences to print */
  2343. static void
  2344. memops(int cmd)
  2345. {
  2346. scanhex((void *)&mdest);
  2347. if( termch != '\n' )
  2348. termch = 0;
  2349. scanhex((void *)(cmd == 's'? &mval: &msrc));
  2350. if( termch != '\n' )
  2351. termch = 0;
  2352. scanhex((void *)&mcount);
  2353. switch( cmd ){
  2354. case 'm':
  2355. memmove((void *)mdest, (void *)msrc, mcount);
  2356. break;
  2357. case 's':
  2358. memset((void *)mdest, mval, mcount);
  2359. break;
  2360. case 'd':
  2361. if( termch != '\n' )
  2362. termch = 0;
  2363. scanhex((void *)&mdiffs);
  2364. memdiffs((unsigned char *)mdest, (unsigned char *)msrc, mcount, mdiffs);
  2365. break;
  2366. }
  2367. }
  2368. static void
  2369. memdiffs(unsigned char *p1, unsigned char *p2, unsigned nb, unsigned maxpr)
  2370. {
  2371. unsigned n, prt;
  2372. prt = 0;
  2373. for( n = nb; n > 0; --n )
  2374. if( *p1++ != *p2++ )
  2375. if( ++prt <= maxpr )
  2376. printf("%.16x %.2x # %.16x %.2x\n", p1 - 1,
  2377. p1[-1], p2 - 1, p2[-1]);
  2378. if( prt > maxpr )
  2379. printf("Total of %d differences\n", prt);
  2380. }
  2381. static unsigned mend;
  2382. static unsigned mask;
  2383. static void
  2384. memlocate(void)
  2385. {
  2386. unsigned a, n;
  2387. unsigned char val[4];
  2388. last_cmd = "ml";
  2389. scanhex((void *)&mdest);
  2390. if (termch != '\n') {
  2391. termch = 0;
  2392. scanhex((void *)&mend);
  2393. if (termch != '\n') {
  2394. termch = 0;
  2395. scanhex((void *)&mval);
  2396. mask = ~0;
  2397. if (termch != '\n') termch = 0;
  2398. scanhex((void *)&mask);
  2399. }
  2400. }
  2401. n = 0;
  2402. for (a = mdest; a < mend; a += 4) {
  2403. if (mread(a, val, 4) == 4
  2404. && ((GETWORD(val) ^ mval) & mask) == 0) {
  2405. printf("%.16x: %.16x\n", a, GETWORD(val));
  2406. if (++n >= 10)
  2407. break;
  2408. }
  2409. }
  2410. }
  2411. static unsigned long mskip = 0x1000;
  2412. static unsigned long mlim = 0xffffffff;
  2413. static void
  2414. memzcan(void)
  2415. {
  2416. unsigned char v;
  2417. unsigned a;
  2418. int ok, ook;
  2419. scanhex(&mdest);
  2420. if (termch != '\n') termch = 0;
  2421. scanhex(&mskip);
  2422. if (termch != '\n') termch = 0;
  2423. scanhex(&mlim);
  2424. ook = 0;
  2425. for (a = mdest; a < mlim; a += mskip) {
  2426. ok = mread(a, &v, 1);
  2427. if (ok && !ook) {
  2428. printf("%.8x .. ", a);
  2429. } else if (!ok && ook)
  2430. printf("%.8x\n", a - mskip);
  2431. ook = ok;
  2432. if (a + mskip < a)
  2433. break;
  2434. }
  2435. if (ook)
  2436. printf("%.8x\n", a - mskip);
  2437. }
  2438. static void show_task(struct task_struct *tsk)
  2439. {
  2440. char state;
  2441. /*
  2442. * Cloned from kdb_task_state_char(), which is not entirely
  2443. * appropriate for calling from xmon. This could be moved
  2444. * to a common, generic, routine used by both.
  2445. */
  2446. state = (tsk->state == 0) ? 'R' :
  2447. (tsk->state < 0) ? 'U' :
  2448. (tsk->state & TASK_UNINTERRUPTIBLE) ? 'D' :
  2449. (tsk->state & TASK_STOPPED) ? 'T' :
  2450. (tsk->state & TASK_TRACED) ? 'C' :
  2451. (tsk->exit_state & EXIT_ZOMBIE) ? 'Z' :
  2452. (tsk->exit_state & EXIT_DEAD) ? 'E' :
  2453. (tsk->state & TASK_INTERRUPTIBLE) ? 'S' : '?';
  2454. printf("%p %016lx %6d %6d %c %2d %s\n", tsk,
  2455. tsk->thread.ksp,
  2456. tsk->pid, tsk->parent->pid,
  2457. state, task_thread_info(tsk)->cpu,
  2458. tsk->comm);
  2459. }
  2460. static void show_tasks(void)
  2461. {
  2462. unsigned long tskv;
  2463. struct task_struct *tsk = NULL;
  2464. printf(" task_struct ->thread.ksp PID PPID S P CMD\n");
  2465. if (scanhex(&tskv))
  2466. tsk = (struct task_struct *)tskv;
  2467. if (setjmp(bus_error_jmp) != 0) {
  2468. catch_memory_errors = 0;
  2469. printf("*** Error dumping task %p\n", tsk);
  2470. return;
  2471. }
  2472. catch_memory_errors = 1;
  2473. sync();
  2474. if (tsk)
  2475. show_task(tsk);
  2476. else
  2477. for_each_process(tsk)
  2478. show_task(tsk);
  2479. sync();
  2480. __delay(200);
  2481. catch_memory_errors = 0;
  2482. }
  2483. static void proccall(void)
  2484. {
  2485. unsigned long args[8];
  2486. unsigned long ret;
  2487. int i;
  2488. typedef unsigned long (*callfunc_t)(unsigned long, unsigned long,
  2489. unsigned long, unsigned long, unsigned long,
  2490. unsigned long, unsigned long, unsigned long);
  2491. callfunc_t func;
  2492. if (!scanhex(&adrs))
  2493. return;
  2494. if (termch != '\n')
  2495. termch = 0;
  2496. for (i = 0; i < 8; ++i)
  2497. args[i] = 0;
  2498. for (i = 0; i < 8; ++i) {
  2499. if (!scanhex(&args[i]) || termch == '\n')
  2500. break;
  2501. termch = 0;
  2502. }
  2503. func = (callfunc_t) adrs;
  2504. ret = 0;
  2505. if (setjmp(bus_error_jmp) == 0) {
  2506. catch_memory_errors = 1;
  2507. sync();
  2508. ret = func(args[0], args[1], args[2], args[3],
  2509. args[4], args[5], args[6], args[7]);
  2510. sync();
  2511. printf("return value is 0x%lx\n", ret);
  2512. } else {
  2513. printf("*** %x exception occurred\n", fault_except);
  2514. }
  2515. catch_memory_errors = 0;
  2516. }
  2517. /* Input scanning routines */
  2518. int
  2519. skipbl(void)
  2520. {
  2521. int c;
  2522. if( termch != 0 ){
  2523. c = termch;
  2524. termch = 0;
  2525. } else
  2526. c = inchar();
  2527. while( c == ' ' || c == '\t' )
  2528. c = inchar();
  2529. return c;
  2530. }
  2531. #define N_PTREGS 44
  2532. static char *regnames[N_PTREGS] = {
  2533. "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
  2534. "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
  2535. "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23",
  2536. "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31",
  2537. "pc", "msr", "or3", "ctr", "lr", "xer", "ccr",
  2538. #ifdef CONFIG_PPC64
  2539. "softe",
  2540. #else
  2541. "mq",
  2542. #endif
  2543. "trap", "dar", "dsisr", "res"
  2544. };
  2545. int
  2546. scanhex(unsigned long *vp)
  2547. {
  2548. int c, d;
  2549. unsigned long v;
  2550. c = skipbl();
  2551. if (c == '%') {
  2552. /* parse register name */
  2553. char regname[8];
  2554. int i;
  2555. for (i = 0; i < sizeof(regname) - 1; ++i) {
  2556. c = inchar();
  2557. if (!isalnum(c)) {
  2558. termch = c;
  2559. break;
  2560. }
  2561. regname[i] = c;
  2562. }
  2563. regname[i] = 0;
  2564. for (i = 0; i < N_PTREGS; ++i) {
  2565. if (strcmp(regnames[i], regname) == 0) {
  2566. if (xmon_regs == NULL) {
  2567. printf("regs not available\n");
  2568. return 0;
  2569. }
  2570. *vp = ((unsigned long *)xmon_regs)[i];
  2571. return 1;
  2572. }
  2573. }
  2574. printf("invalid register name '%%%s'\n", regname);
  2575. return 0;
  2576. }
  2577. /* skip leading "0x" if any */
  2578. if (c == '0') {
  2579. c = inchar();
  2580. if (c == 'x') {
  2581. c = inchar();
  2582. } else {
  2583. d = hexdigit(c);
  2584. if (d == EOF) {
  2585. termch = c;
  2586. *vp = 0;
  2587. return 1;
  2588. }
  2589. }
  2590. } else if (c == '$') {
  2591. int i;
  2592. for (i=0; i<63; i++) {
  2593. c = inchar();
  2594. if (isspace(c) || c == '\0') {
  2595. termch = c;
  2596. break;
  2597. }
  2598. tmpstr[i] = c;
  2599. }
  2600. tmpstr[i++] = 0;
  2601. *vp = 0;
  2602. if (setjmp(bus_error_jmp) == 0) {
  2603. catch_memory_errors = 1;
  2604. sync();
  2605. *vp = kallsyms_lookup_name(tmpstr);
  2606. sync();
  2607. }
  2608. catch_memory_errors = 0;
  2609. if (!(*vp)) {
  2610. printf("unknown symbol '%s'\n", tmpstr);
  2611. return 0;
  2612. }
  2613. return 1;
  2614. }
  2615. d = hexdigit(c);
  2616. if (d == EOF) {
  2617. termch = c;
  2618. return 0;
  2619. }
  2620. v = 0;
  2621. do {
  2622. v = (v << 4) + d;
  2623. c = inchar();
  2624. d = hexdigit(c);
  2625. } while (d != EOF);
  2626. termch = c;
  2627. *vp = v;
  2628. return 1;
  2629. }
  2630. static void
  2631. scannl(void)
  2632. {
  2633. int c;
  2634. c = termch;
  2635. termch = 0;
  2636. while( c != '\n' )
  2637. c = inchar();
  2638. }
  2639. static int hexdigit(int c)
  2640. {
  2641. if( '0' <= c && c <= '9' )
  2642. return c - '0';
  2643. if( 'A' <= c && c <= 'F' )
  2644. return c - ('A' - 10);
  2645. if( 'a' <= c && c <= 'f' )
  2646. return c - ('a' - 10);
  2647. return EOF;
  2648. }
  2649. void
  2650. getstring(char *s, int size)
  2651. {
  2652. int c;
  2653. c = skipbl();
  2654. do {
  2655. if( size > 1 ){
  2656. *s++ = c;
  2657. --size;
  2658. }
  2659. c = inchar();
  2660. } while( c != ' ' && c != '\t' && c != '\n' );
  2661. termch = c;
  2662. *s = 0;
  2663. }
  2664. static char line[256];
  2665. static char *lineptr;
  2666. static void
  2667. flush_input(void)
  2668. {
  2669. lineptr = NULL;
  2670. }
  2671. static int
  2672. inchar(void)
  2673. {
  2674. if (lineptr == NULL || *lineptr == 0) {
  2675. if (xmon_gets(line, sizeof(line)) == NULL) {
  2676. lineptr = NULL;
  2677. return EOF;
  2678. }
  2679. lineptr = line;
  2680. }
  2681. return *lineptr++;
  2682. }
  2683. static void
  2684. take_input(char *str)
  2685. {
  2686. lineptr = str;
  2687. }
  2688. static void
  2689. symbol_lookup(void)
  2690. {
  2691. int type = inchar();
  2692. unsigned long addr;
  2693. static char tmp[64];
  2694. switch (type) {
  2695. case 'a':
  2696. if (scanhex(&addr))
  2697. xmon_print_symbol(addr, ": ", "\n");
  2698. termch = 0;
  2699. break;
  2700. case 's':
  2701. getstring(tmp, 64);
  2702. if (setjmp(bus_error_jmp) == 0) {
  2703. catch_memory_errors = 1;
  2704. sync();
  2705. addr = kallsyms_lookup_name(tmp);
  2706. if (addr)
  2707. printf("%s: %lx\n", tmp, addr);
  2708. else
  2709. printf("Symbol '%s' not found.\n", tmp);
  2710. sync();
  2711. }
  2712. catch_memory_errors = 0;
  2713. termch = 0;
  2714. break;
  2715. }
  2716. }
  2717. /* Print an address in numeric and symbolic form (if possible) */
  2718. static void xmon_print_symbol(unsigned long address, const char *mid,
  2719. const char *after)
  2720. {
  2721. char *modname;
  2722. const char *name = NULL;
  2723. unsigned long offset, size;
  2724. printf(REG, address);
  2725. if (setjmp(bus_error_jmp) == 0) {
  2726. catch_memory_errors = 1;
  2727. sync();
  2728. name = kallsyms_lookup(address, &size, &offset, &modname,
  2729. tmpstr);
  2730. sync();
  2731. /* wait a little while to see if we get a machine check */
  2732. __delay(200);
  2733. }
  2734. catch_memory_errors = 0;
  2735. if (name) {
  2736. printf("%s%s+%#lx/%#lx", mid, name, offset, size);
  2737. if (modname)
  2738. printf(" [%s]", modname);
  2739. }
  2740. printf("%s", after);
  2741. }
  2742. #ifdef CONFIG_PPC_STD_MMU_64
  2743. void dump_segments(void)
  2744. {
  2745. int i;
  2746. unsigned long esid,vsid;
  2747. unsigned long llp;
  2748. printf("SLB contents of cpu 0x%x\n", smp_processor_id());
  2749. for (i = 0; i < mmu_slb_size; i++) {
  2750. asm volatile("slbmfee %0,%1" : "=r" (esid) : "r" (i));
  2751. asm volatile("slbmfev %0,%1" : "=r" (vsid) : "r" (i));
  2752. if (esid || vsid) {
  2753. printf("%02d %016lx %016lx", i, esid, vsid);
  2754. if (esid & SLB_ESID_V) {
  2755. llp = vsid & SLB_VSID_LLP;
  2756. if (vsid & SLB_VSID_B_1T) {
  2757. printf(" 1T ESID=%9lx VSID=%13lx LLP:%3lx \n",
  2758. GET_ESID_1T(esid),
  2759. (vsid & ~SLB_VSID_B) >> SLB_VSID_SHIFT_1T,
  2760. llp);
  2761. } else {
  2762. printf(" 256M ESID=%9lx VSID=%13lx LLP:%3lx \n",
  2763. GET_ESID(esid),
  2764. (vsid & ~SLB_VSID_B) >> SLB_VSID_SHIFT,
  2765. llp);
  2766. }
  2767. } else
  2768. printf("\n");
  2769. }
  2770. }
  2771. }
  2772. #endif
  2773. #ifdef CONFIG_PPC_STD_MMU_32
  2774. void dump_segments(void)
  2775. {
  2776. int i;
  2777. printf("sr0-15 =");
  2778. for (i = 0; i < 16; ++i)
  2779. printf(" %x", mfsrin(i));
  2780. printf("\n");
  2781. }
  2782. #endif
  2783. #ifdef CONFIG_44x
  2784. static void dump_tlb_44x(void)
  2785. {
  2786. int i;
  2787. for (i = 0; i < PPC44x_TLB_SIZE; i++) {
  2788. unsigned long w0,w1,w2;
  2789. asm volatile("tlbre %0,%1,0" : "=r" (w0) : "r" (i));
  2790. asm volatile("tlbre %0,%1,1" : "=r" (w1) : "r" (i));
  2791. asm volatile("tlbre %0,%1,2" : "=r" (w2) : "r" (i));
  2792. printf("[%02x] %08x %08x %08x ", i, w0, w1, w2);
  2793. if (w0 & PPC44x_TLB_VALID) {
  2794. printf("V %08x -> %01x%08x %c%c%c%c%c",
  2795. w0 & PPC44x_TLB_EPN_MASK,
  2796. w1 & PPC44x_TLB_ERPN_MASK,
  2797. w1 & PPC44x_TLB_RPN_MASK,
  2798. (w2 & PPC44x_TLB_W) ? 'W' : 'w',
  2799. (w2 & PPC44x_TLB_I) ? 'I' : 'i',
  2800. (w2 & PPC44x_TLB_M) ? 'M' : 'm',
  2801. (w2 & PPC44x_TLB_G) ? 'G' : 'g',
  2802. (w2 & PPC44x_TLB_E) ? 'E' : 'e');
  2803. }
  2804. printf("\n");
  2805. }
  2806. }
  2807. #endif /* CONFIG_44x */
  2808. #ifdef CONFIG_PPC_BOOK3E
  2809. static void dump_tlb_book3e(void)
  2810. {
  2811. u32 mmucfg, pidmask, lpidmask;
  2812. u64 ramask;
  2813. int i, tlb, ntlbs, pidsz, lpidsz, rasz, lrat = 0;
  2814. int mmu_version;
  2815. static const char *pgsz_names[] = {
  2816. " 1K",
  2817. " 2K",
  2818. " 4K",
  2819. " 8K",
  2820. " 16K",
  2821. " 32K",
  2822. " 64K",
  2823. "128K",
  2824. "256K",
  2825. "512K",
  2826. " 1M",
  2827. " 2M",
  2828. " 4M",
  2829. " 8M",
  2830. " 16M",
  2831. " 32M",
  2832. " 64M",
  2833. "128M",
  2834. "256M",
  2835. "512M",
  2836. " 1G",
  2837. " 2G",
  2838. " 4G",
  2839. " 8G",
  2840. " 16G",
  2841. " 32G",
  2842. " 64G",
  2843. "128G",
  2844. "256G",
  2845. "512G",
  2846. " 1T",
  2847. " 2T",
  2848. };
  2849. /* Gather some infos about the MMU */
  2850. mmucfg = mfspr(SPRN_MMUCFG);
  2851. mmu_version = (mmucfg & 3) + 1;
  2852. ntlbs = ((mmucfg >> 2) & 3) + 1;
  2853. pidsz = ((mmucfg >> 6) & 0x1f) + 1;
  2854. lpidsz = (mmucfg >> 24) & 0xf;
  2855. rasz = (mmucfg >> 16) & 0x7f;
  2856. if ((mmu_version > 1) && (mmucfg & 0x10000))
  2857. lrat = 1;
  2858. printf("Book3E MMU MAV=%d.0,%d TLBs,%d-bit PID,%d-bit LPID,%d-bit RA\n",
  2859. mmu_version, ntlbs, pidsz, lpidsz, rasz);
  2860. pidmask = (1ul << pidsz) - 1;
  2861. lpidmask = (1ul << lpidsz) - 1;
  2862. ramask = (1ull << rasz) - 1;
  2863. for (tlb = 0; tlb < ntlbs; tlb++) {
  2864. u32 tlbcfg;
  2865. int nent, assoc, new_cc = 1;
  2866. printf("TLB %d:\n------\n", tlb);
  2867. switch(tlb) {
  2868. case 0:
  2869. tlbcfg = mfspr(SPRN_TLB0CFG);
  2870. break;
  2871. case 1:
  2872. tlbcfg = mfspr(SPRN_TLB1CFG);
  2873. break;
  2874. case 2:
  2875. tlbcfg = mfspr(SPRN_TLB2CFG);
  2876. break;
  2877. case 3:
  2878. tlbcfg = mfspr(SPRN_TLB3CFG);
  2879. break;
  2880. default:
  2881. printf("Unsupported TLB number !\n");
  2882. continue;
  2883. }
  2884. nent = tlbcfg & 0xfff;
  2885. assoc = (tlbcfg >> 24) & 0xff;
  2886. for (i = 0; i < nent; i++) {
  2887. u32 mas0 = MAS0_TLBSEL(tlb);
  2888. u32 mas1 = MAS1_TSIZE(BOOK3E_PAGESZ_4K);
  2889. u64 mas2 = 0;
  2890. u64 mas7_mas3;
  2891. int esel = i, cc = i;
  2892. if (assoc != 0) {
  2893. cc = i / assoc;
  2894. esel = i % assoc;
  2895. mas2 = cc * 0x1000;
  2896. }
  2897. mas0 |= MAS0_ESEL(esel);
  2898. mtspr(SPRN_MAS0, mas0);
  2899. mtspr(SPRN_MAS1, mas1);
  2900. mtspr(SPRN_MAS2, mas2);
  2901. asm volatile("tlbre 0,0,0" : : : "memory");
  2902. mas1 = mfspr(SPRN_MAS1);
  2903. mas2 = mfspr(SPRN_MAS2);
  2904. mas7_mas3 = mfspr(SPRN_MAS7_MAS3);
  2905. if (assoc && (i % assoc) == 0)
  2906. new_cc = 1;
  2907. if (!(mas1 & MAS1_VALID))
  2908. continue;
  2909. if (assoc == 0)
  2910. printf("%04x- ", i);
  2911. else if (new_cc)
  2912. printf("%04x-%c", cc, 'A' + esel);
  2913. else
  2914. printf(" |%c", 'A' + esel);
  2915. new_cc = 0;
  2916. printf(" %016llx %04x %s %c%c AS%c",
  2917. mas2 & ~0x3ffull,
  2918. (mas1 >> 16) & 0x3fff,
  2919. pgsz_names[(mas1 >> 7) & 0x1f],
  2920. mas1 & MAS1_IND ? 'I' : ' ',
  2921. mas1 & MAS1_IPROT ? 'P' : ' ',
  2922. mas1 & MAS1_TS ? '1' : '0');
  2923. printf(" %c%c%c%c%c%c%c",
  2924. mas2 & MAS2_X0 ? 'a' : ' ',
  2925. mas2 & MAS2_X1 ? 'v' : ' ',
  2926. mas2 & MAS2_W ? 'w' : ' ',
  2927. mas2 & MAS2_I ? 'i' : ' ',
  2928. mas2 & MAS2_M ? 'm' : ' ',
  2929. mas2 & MAS2_G ? 'g' : ' ',
  2930. mas2 & MAS2_E ? 'e' : ' ');
  2931. printf(" %016llx", mas7_mas3 & ramask & ~0x7ffull);
  2932. if (mas1 & MAS1_IND)
  2933. printf(" %s\n",
  2934. pgsz_names[(mas7_mas3 >> 1) & 0x1f]);
  2935. else
  2936. printf(" U%c%c%c S%c%c%c\n",
  2937. mas7_mas3 & MAS3_UX ? 'x' : ' ',
  2938. mas7_mas3 & MAS3_UW ? 'w' : ' ',
  2939. mas7_mas3 & MAS3_UR ? 'r' : ' ',
  2940. mas7_mas3 & MAS3_SX ? 'x' : ' ',
  2941. mas7_mas3 & MAS3_SW ? 'w' : ' ',
  2942. mas7_mas3 & MAS3_SR ? 'r' : ' ');
  2943. }
  2944. }
  2945. }
  2946. #endif /* CONFIG_PPC_BOOK3E */
  2947. static void xmon_init(int enable)
  2948. {
  2949. if (enable) {
  2950. __debugger = xmon;
  2951. __debugger_ipi = xmon_ipi;
  2952. __debugger_bpt = xmon_bpt;
  2953. __debugger_sstep = xmon_sstep;
  2954. __debugger_iabr_match = xmon_iabr_match;
  2955. __debugger_break_match = xmon_break_match;
  2956. __debugger_fault_handler = xmon_fault_handler;
  2957. } else {
  2958. __debugger = NULL;
  2959. __debugger_ipi = NULL;
  2960. __debugger_bpt = NULL;
  2961. __debugger_sstep = NULL;
  2962. __debugger_iabr_match = NULL;
  2963. __debugger_break_match = NULL;
  2964. __debugger_fault_handler = NULL;
  2965. }
  2966. }
  2967. #ifdef CONFIG_MAGIC_SYSRQ
  2968. static void sysrq_handle_xmon(int key)
  2969. {
  2970. /* ensure xmon is enabled */
  2971. xmon_init(1);
  2972. debugger(get_irq_regs());
  2973. if (!xmon_on)
  2974. xmon_init(0);
  2975. }
  2976. static struct sysrq_key_op sysrq_xmon_op = {
  2977. .handler = sysrq_handle_xmon,
  2978. .help_msg = "xmon(x)",
  2979. .action_msg = "Entering xmon",
  2980. };
  2981. static int __init setup_xmon_sysrq(void)
  2982. {
  2983. register_sysrq_key('x', &sysrq_xmon_op);
  2984. return 0;
  2985. }
  2986. device_initcall(setup_xmon_sysrq);
  2987. #endif /* CONFIG_MAGIC_SYSRQ */
  2988. #ifdef CONFIG_DEBUG_FS
  2989. static int xmon_dbgfs_set(void *data, u64 val)
  2990. {
  2991. xmon_on = !!val;
  2992. xmon_init(xmon_on);
  2993. return 0;
  2994. }
  2995. static int xmon_dbgfs_get(void *data, u64 *val)
  2996. {
  2997. *val = xmon_on;
  2998. return 0;
  2999. }
  3000. DEFINE_SIMPLE_ATTRIBUTE(xmon_dbgfs_ops, xmon_dbgfs_get,
  3001. xmon_dbgfs_set, "%llu\n");
  3002. static int __init setup_xmon_dbgfs(void)
  3003. {
  3004. debugfs_create_file("xmon", 0600, powerpc_debugfs_root, NULL,
  3005. &xmon_dbgfs_ops);
  3006. return 0;
  3007. }
  3008. device_initcall(setup_xmon_dbgfs);
  3009. #endif /* CONFIG_DEBUG_FS */
  3010. static int xmon_early __initdata;
  3011. static int __init early_parse_xmon(char *p)
  3012. {
  3013. if (!p || strncmp(p, "early", 5) == 0) {
  3014. /* just "xmon" is equivalent to "xmon=early" */
  3015. xmon_init(1);
  3016. xmon_early = 1;
  3017. xmon_on = 1;
  3018. } else if (strncmp(p, "on", 2) == 0) {
  3019. xmon_init(1);
  3020. xmon_on = 1;
  3021. } else if (strncmp(p, "off", 3) == 0)
  3022. xmon_on = 0;
  3023. else
  3024. return 1;
  3025. return 0;
  3026. }
  3027. early_param("xmon", early_parse_xmon);
  3028. void __init xmon_setup(void)
  3029. {
  3030. if (xmon_on)
  3031. xmon_init(1);
  3032. if (xmon_early)
  3033. debugger(NULL);
  3034. }
  3035. #ifdef CONFIG_SPU_BASE
  3036. struct spu_info {
  3037. struct spu *spu;
  3038. u64 saved_mfc_sr1_RW;
  3039. u32 saved_spu_runcntl_RW;
  3040. unsigned long dump_addr;
  3041. u8 stopped_ok;
  3042. };
  3043. #define XMON_NUM_SPUS 16 /* Enough for current hardware */
  3044. static struct spu_info spu_info[XMON_NUM_SPUS];
  3045. void xmon_register_spus(struct list_head *list)
  3046. {
  3047. struct spu *spu;
  3048. list_for_each_entry(spu, list, full_list) {
  3049. if (spu->number >= XMON_NUM_SPUS) {
  3050. WARN_ON(1);
  3051. continue;
  3052. }
  3053. spu_info[spu->number].spu = spu;
  3054. spu_info[spu->number].stopped_ok = 0;
  3055. spu_info[spu->number].dump_addr = (unsigned long)
  3056. spu_info[spu->number].spu->local_store;
  3057. }
  3058. }
  3059. static void stop_spus(void)
  3060. {
  3061. struct spu *spu;
  3062. int i;
  3063. u64 tmp;
  3064. for (i = 0; i < XMON_NUM_SPUS; i++) {
  3065. if (!spu_info[i].spu)
  3066. continue;
  3067. if (setjmp(bus_error_jmp) == 0) {
  3068. catch_memory_errors = 1;
  3069. sync();
  3070. spu = spu_info[i].spu;
  3071. spu_info[i].saved_spu_runcntl_RW =
  3072. in_be32(&spu->problem->spu_runcntl_RW);
  3073. tmp = spu_mfc_sr1_get(spu);
  3074. spu_info[i].saved_mfc_sr1_RW = tmp;
  3075. tmp &= ~MFC_STATE1_MASTER_RUN_CONTROL_MASK;
  3076. spu_mfc_sr1_set(spu, tmp);
  3077. sync();
  3078. __delay(200);
  3079. spu_info[i].stopped_ok = 1;
  3080. printf("Stopped spu %.2d (was %s)\n", i,
  3081. spu_info[i].saved_spu_runcntl_RW ?
  3082. "running" : "stopped");
  3083. } else {
  3084. catch_memory_errors = 0;
  3085. printf("*** Error stopping spu %.2d\n", i);
  3086. }
  3087. catch_memory_errors = 0;
  3088. }
  3089. }
  3090. static void restart_spus(void)
  3091. {
  3092. struct spu *spu;
  3093. int i;
  3094. for (i = 0; i < XMON_NUM_SPUS; i++) {
  3095. if (!spu_info[i].spu)
  3096. continue;
  3097. if (!spu_info[i].stopped_ok) {
  3098. printf("*** Error, spu %d was not successfully stopped"
  3099. ", not restarting\n", i);
  3100. continue;
  3101. }
  3102. if (setjmp(bus_error_jmp) == 0) {
  3103. catch_memory_errors = 1;
  3104. sync();
  3105. spu = spu_info[i].spu;
  3106. spu_mfc_sr1_set(spu, spu_info[i].saved_mfc_sr1_RW);
  3107. out_be32(&spu->problem->spu_runcntl_RW,
  3108. spu_info[i].saved_spu_runcntl_RW);
  3109. sync();
  3110. __delay(200);
  3111. printf("Restarted spu %.2d\n", i);
  3112. } else {
  3113. catch_memory_errors = 0;
  3114. printf("*** Error restarting spu %.2d\n", i);
  3115. }
  3116. catch_memory_errors = 0;
  3117. }
  3118. }
  3119. #define DUMP_WIDTH 23
  3120. #define DUMP_VALUE(format, field, value) \
  3121. do { \
  3122. if (setjmp(bus_error_jmp) == 0) { \
  3123. catch_memory_errors = 1; \
  3124. sync(); \
  3125. printf(" %-*s = "format"\n", DUMP_WIDTH, \
  3126. #field, value); \
  3127. sync(); \
  3128. __delay(200); \
  3129. } else { \
  3130. catch_memory_errors = 0; \
  3131. printf(" %-*s = *** Error reading field.\n", \
  3132. DUMP_WIDTH, #field); \
  3133. } \
  3134. catch_memory_errors = 0; \
  3135. } while (0)
  3136. #define DUMP_FIELD(obj, format, field) \
  3137. DUMP_VALUE(format, field, obj->field)
  3138. static void dump_spu_fields(struct spu *spu)
  3139. {
  3140. printf("Dumping spu fields at address %p:\n", spu);
  3141. DUMP_FIELD(spu, "0x%x", number);
  3142. DUMP_FIELD(spu, "%s", name);
  3143. DUMP_FIELD(spu, "0x%lx", local_store_phys);
  3144. DUMP_FIELD(spu, "0x%p", local_store);
  3145. DUMP_FIELD(spu, "0x%lx", ls_size);
  3146. DUMP_FIELD(spu, "0x%x", node);
  3147. DUMP_FIELD(spu, "0x%lx", flags);
  3148. DUMP_FIELD(spu, "%d", class_0_pending);
  3149. DUMP_FIELD(spu, "0x%lx", class_0_dar);
  3150. DUMP_FIELD(spu, "0x%lx", class_1_dar);
  3151. DUMP_FIELD(spu, "0x%lx", class_1_dsisr);
  3152. DUMP_FIELD(spu, "0x%lx", irqs[0]);
  3153. DUMP_FIELD(spu, "0x%lx", irqs[1]);
  3154. DUMP_FIELD(spu, "0x%lx", irqs[2]);
  3155. DUMP_FIELD(spu, "0x%x", slb_replace);
  3156. DUMP_FIELD(spu, "%d", pid);
  3157. DUMP_FIELD(spu, "0x%p", mm);
  3158. DUMP_FIELD(spu, "0x%p", ctx);
  3159. DUMP_FIELD(spu, "0x%p", rq);
  3160. DUMP_FIELD(spu, "0x%p", timestamp);
  3161. DUMP_FIELD(spu, "0x%lx", problem_phys);
  3162. DUMP_FIELD(spu, "0x%p", problem);
  3163. DUMP_VALUE("0x%x", problem->spu_runcntl_RW,
  3164. in_be32(&spu->problem->spu_runcntl_RW));
  3165. DUMP_VALUE("0x%x", problem->spu_status_R,
  3166. in_be32(&spu->problem->spu_status_R));
  3167. DUMP_VALUE("0x%x", problem->spu_npc_RW,
  3168. in_be32(&spu->problem->spu_npc_RW));
  3169. DUMP_FIELD(spu, "0x%p", priv2);
  3170. DUMP_FIELD(spu, "0x%p", pdata);
  3171. }
  3172. int
  3173. spu_inst_dump(unsigned long adr, long count, int praddr)
  3174. {
  3175. return generic_inst_dump(adr, count, praddr, print_insn_spu);
  3176. }
  3177. static void dump_spu_ls(unsigned long num, int subcmd)
  3178. {
  3179. unsigned long offset, addr, ls_addr;
  3180. if (setjmp(bus_error_jmp) == 0) {
  3181. catch_memory_errors = 1;
  3182. sync();
  3183. ls_addr = (unsigned long)spu_info[num].spu->local_store;
  3184. sync();
  3185. __delay(200);
  3186. } else {
  3187. catch_memory_errors = 0;
  3188. printf("*** Error: accessing spu info for spu %d\n", num);
  3189. return;
  3190. }
  3191. catch_memory_errors = 0;
  3192. if (scanhex(&offset))
  3193. addr = ls_addr + offset;
  3194. else
  3195. addr = spu_info[num].dump_addr;
  3196. if (addr >= ls_addr + LS_SIZE) {
  3197. printf("*** Error: address outside of local store\n");
  3198. return;
  3199. }
  3200. switch (subcmd) {
  3201. case 'i':
  3202. addr += spu_inst_dump(addr, 16, 1);
  3203. last_cmd = "sdi\n";
  3204. break;
  3205. default:
  3206. prdump(addr, 64);
  3207. addr += 64;
  3208. last_cmd = "sd\n";
  3209. break;
  3210. }
  3211. spu_info[num].dump_addr = addr;
  3212. }
  3213. static int do_spu_cmd(void)
  3214. {
  3215. static unsigned long num = 0;
  3216. int cmd, subcmd = 0;
  3217. cmd = inchar();
  3218. switch (cmd) {
  3219. case 's':
  3220. stop_spus();
  3221. break;
  3222. case 'r':
  3223. restart_spus();
  3224. break;
  3225. case 'd':
  3226. subcmd = inchar();
  3227. if (isxdigit(subcmd) || subcmd == '\n')
  3228. termch = subcmd;
  3229. case 'f':
  3230. scanhex(&num);
  3231. if (num >= XMON_NUM_SPUS || !spu_info[num].spu) {
  3232. printf("*** Error: invalid spu number\n");
  3233. return 0;
  3234. }
  3235. switch (cmd) {
  3236. case 'f':
  3237. dump_spu_fields(spu_info[num].spu);
  3238. break;
  3239. default:
  3240. dump_spu_ls(num, subcmd);
  3241. break;
  3242. }
  3243. break;
  3244. default:
  3245. return -1;
  3246. }
  3247. return 0;
  3248. }
  3249. #else /* ! CONFIG_SPU_BASE */
  3250. static int do_spu_cmd(void)
  3251. {
  3252. return -1;
  3253. }
  3254. #endif