mcdi.c 54 KB

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  1. /****************************************************************************
  2. * Driver for Solarflare network controllers and boards
  3. * Copyright 2008-2013 Solarflare Communications Inc.
  4. *
  5. * This program is free software; you can redistribute it and/or modify it
  6. * under the terms of the GNU General Public License version 2 as published
  7. * by the Free Software Foundation, incorporated herein by reference.
  8. */
  9. #include <linux/delay.h>
  10. #include <asm/cmpxchg.h>
  11. #include "net_driver.h"
  12. #include "nic.h"
  13. #include "io.h"
  14. #include "farch_regs.h"
  15. #include "mcdi_pcol.h"
  16. #include "phy.h"
  17. /**************************************************************************
  18. *
  19. * Management-Controller-to-Driver Interface
  20. *
  21. **************************************************************************
  22. */
  23. #define MCDI_RPC_TIMEOUT (10 * HZ)
  24. /* A reboot/assertion causes the MCDI status word to be set after the
  25. * command word is set or a REBOOT event is sent. If we notice a reboot
  26. * via these mechanisms then wait 250ms for the status word to be set.
  27. */
  28. #define MCDI_STATUS_DELAY_US 100
  29. #define MCDI_STATUS_DELAY_COUNT 2500
  30. #define MCDI_STATUS_SLEEP_MS \
  31. (MCDI_STATUS_DELAY_US * MCDI_STATUS_DELAY_COUNT / 1000)
  32. #define SEQ_MASK \
  33. EFX_MASK32(EFX_WIDTH(MCDI_HEADER_SEQ))
  34. struct efx_mcdi_async_param {
  35. struct list_head list;
  36. unsigned int cmd;
  37. size_t inlen;
  38. size_t outlen;
  39. bool quiet;
  40. efx_mcdi_async_completer *complete;
  41. unsigned long cookie;
  42. /* followed by request/response buffer */
  43. };
  44. static void efx_mcdi_timeout_async(unsigned long context);
  45. static int efx_mcdi_drv_attach(struct efx_nic *efx, bool driver_operating,
  46. bool *was_attached_out);
  47. static bool efx_mcdi_poll_once(struct efx_nic *efx);
  48. static void efx_mcdi_abandon(struct efx_nic *efx);
  49. int efx_mcdi_init(struct efx_nic *efx)
  50. {
  51. struct efx_mcdi_iface *mcdi;
  52. bool already_attached;
  53. int rc = -ENOMEM;
  54. efx->mcdi = kzalloc(sizeof(*efx->mcdi), GFP_KERNEL);
  55. if (!efx->mcdi)
  56. goto fail;
  57. mcdi = efx_mcdi(efx);
  58. mcdi->efx = efx;
  59. #ifdef CONFIG_SFC_MCDI_LOGGING
  60. /* consuming code assumes buffer is page-sized */
  61. mcdi->logging_buffer = (char *)__get_free_page(GFP_KERNEL);
  62. if (!mcdi->logging_buffer)
  63. goto fail1;
  64. #endif
  65. init_waitqueue_head(&mcdi->wq);
  66. spin_lock_init(&mcdi->iface_lock);
  67. mcdi->state = MCDI_STATE_QUIESCENT;
  68. mcdi->mode = MCDI_MODE_POLL;
  69. spin_lock_init(&mcdi->async_lock);
  70. INIT_LIST_HEAD(&mcdi->async_list);
  71. setup_timer(&mcdi->async_timer, efx_mcdi_timeout_async,
  72. (unsigned long)mcdi);
  73. (void) efx_mcdi_poll_reboot(efx);
  74. mcdi->new_epoch = true;
  75. /* Recover from a failed assertion before probing */
  76. rc = efx_mcdi_handle_assertion(efx);
  77. if (rc)
  78. goto fail2;
  79. /* Let the MC (and BMC, if this is a LOM) know that the driver
  80. * is loaded. We should do this before we reset the NIC.
  81. */
  82. rc = efx_mcdi_drv_attach(efx, true, &already_attached);
  83. if (rc) {
  84. netif_err(efx, probe, efx->net_dev,
  85. "Unable to register driver with MCPU\n");
  86. goto fail2;
  87. }
  88. if (already_attached)
  89. /* Not a fatal error */
  90. netif_err(efx, probe, efx->net_dev,
  91. "Host already registered with MCPU\n");
  92. if (efx->mcdi->fn_flags &
  93. (1 << MC_CMD_DRV_ATTACH_EXT_OUT_FLAG_PRIMARY))
  94. efx->primary = efx;
  95. return 0;
  96. fail2:
  97. #ifdef CONFIG_SFC_MCDI_LOGGING
  98. free_page((unsigned long)mcdi->logging_buffer);
  99. fail1:
  100. #endif
  101. kfree(efx->mcdi);
  102. efx->mcdi = NULL;
  103. fail:
  104. return rc;
  105. }
  106. void efx_mcdi_fini(struct efx_nic *efx)
  107. {
  108. if (!efx->mcdi)
  109. return;
  110. BUG_ON(efx->mcdi->iface.state != MCDI_STATE_QUIESCENT);
  111. /* Relinquish the device (back to the BMC, if this is a LOM) */
  112. efx_mcdi_drv_attach(efx, false, NULL);
  113. #ifdef CONFIG_SFC_MCDI_LOGGING
  114. free_page((unsigned long)efx->mcdi->iface.logging_buffer);
  115. #endif
  116. kfree(efx->mcdi);
  117. }
  118. static void efx_mcdi_send_request(struct efx_nic *efx, unsigned cmd,
  119. const efx_dword_t *inbuf, size_t inlen)
  120. {
  121. struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
  122. #ifdef CONFIG_SFC_MCDI_LOGGING
  123. char *buf = mcdi->logging_buffer; /* page-sized */
  124. #endif
  125. efx_dword_t hdr[2];
  126. size_t hdr_len;
  127. u32 xflags, seqno;
  128. BUG_ON(mcdi->state == MCDI_STATE_QUIESCENT);
  129. /* Serialise with efx_mcdi_ev_cpl() and efx_mcdi_ev_death() */
  130. spin_lock_bh(&mcdi->iface_lock);
  131. ++mcdi->seqno;
  132. spin_unlock_bh(&mcdi->iface_lock);
  133. seqno = mcdi->seqno & SEQ_MASK;
  134. xflags = 0;
  135. if (mcdi->mode == MCDI_MODE_EVENTS)
  136. xflags |= MCDI_HEADER_XFLAGS_EVREQ;
  137. if (efx->type->mcdi_max_ver == 1) {
  138. /* MCDI v1 */
  139. EFX_POPULATE_DWORD_7(hdr[0],
  140. MCDI_HEADER_RESPONSE, 0,
  141. MCDI_HEADER_RESYNC, 1,
  142. MCDI_HEADER_CODE, cmd,
  143. MCDI_HEADER_DATALEN, inlen,
  144. MCDI_HEADER_SEQ, seqno,
  145. MCDI_HEADER_XFLAGS, xflags,
  146. MCDI_HEADER_NOT_EPOCH, !mcdi->new_epoch);
  147. hdr_len = 4;
  148. } else {
  149. /* MCDI v2 */
  150. BUG_ON(inlen > MCDI_CTL_SDU_LEN_MAX_V2);
  151. EFX_POPULATE_DWORD_7(hdr[0],
  152. MCDI_HEADER_RESPONSE, 0,
  153. MCDI_HEADER_RESYNC, 1,
  154. MCDI_HEADER_CODE, MC_CMD_V2_EXTN,
  155. MCDI_HEADER_DATALEN, 0,
  156. MCDI_HEADER_SEQ, seqno,
  157. MCDI_HEADER_XFLAGS, xflags,
  158. MCDI_HEADER_NOT_EPOCH, !mcdi->new_epoch);
  159. EFX_POPULATE_DWORD_2(hdr[1],
  160. MC_CMD_V2_EXTN_IN_EXTENDED_CMD, cmd,
  161. MC_CMD_V2_EXTN_IN_ACTUAL_LEN, inlen);
  162. hdr_len = 8;
  163. }
  164. #ifdef CONFIG_SFC_MCDI_LOGGING
  165. if (!WARN_ON_ONCE(!buf)) {
  166. int bytes = 0;
  167. int i;
  168. /* Lengths should always be a whole number of dwords, so scream
  169. * if they're not.
  170. */
  171. WARN_ON_ONCE(hdr_len % 4);
  172. WARN_ON_ONCE(inlen % 4);
  173. /* We own the logging buffer, as only one MCDI can be in
  174. * progress on a NIC at any one time. So no need for locking.
  175. */
  176. for (i = 0; i < hdr_len / 4 && bytes < PAGE_SIZE; i++)
  177. bytes += snprintf(buf + bytes, PAGE_SIZE - bytes,
  178. " %08x", le32_to_cpu(hdr[i].u32[0]));
  179. for (i = 0; i < inlen / 4 && bytes < PAGE_SIZE; i++)
  180. bytes += snprintf(buf + bytes, PAGE_SIZE - bytes,
  181. " %08x", le32_to_cpu(inbuf[i].u32[0]));
  182. netif_info(efx, hw, efx->net_dev, "MCDI RPC REQ:%s\n", buf);
  183. }
  184. #endif
  185. efx->type->mcdi_request(efx, hdr, hdr_len, inbuf, inlen);
  186. mcdi->new_epoch = false;
  187. }
  188. static int efx_mcdi_errno(unsigned int mcdi_err)
  189. {
  190. switch (mcdi_err) {
  191. case 0:
  192. return 0;
  193. #define TRANSLATE_ERROR(name) \
  194. case MC_CMD_ERR_ ## name: \
  195. return -name;
  196. TRANSLATE_ERROR(EPERM);
  197. TRANSLATE_ERROR(ENOENT);
  198. TRANSLATE_ERROR(EINTR);
  199. TRANSLATE_ERROR(EAGAIN);
  200. TRANSLATE_ERROR(EACCES);
  201. TRANSLATE_ERROR(EBUSY);
  202. TRANSLATE_ERROR(EINVAL);
  203. TRANSLATE_ERROR(EDEADLK);
  204. TRANSLATE_ERROR(ENOSYS);
  205. TRANSLATE_ERROR(ETIME);
  206. TRANSLATE_ERROR(EALREADY);
  207. TRANSLATE_ERROR(ENOSPC);
  208. #undef TRANSLATE_ERROR
  209. case MC_CMD_ERR_ENOTSUP:
  210. return -EOPNOTSUPP;
  211. case MC_CMD_ERR_ALLOC_FAIL:
  212. return -ENOBUFS;
  213. case MC_CMD_ERR_MAC_EXIST:
  214. return -EADDRINUSE;
  215. default:
  216. return -EPROTO;
  217. }
  218. }
  219. static void efx_mcdi_read_response_header(struct efx_nic *efx)
  220. {
  221. struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
  222. unsigned int respseq, respcmd, error;
  223. #ifdef CONFIG_SFC_MCDI_LOGGING
  224. char *buf = mcdi->logging_buffer; /* page-sized */
  225. #endif
  226. efx_dword_t hdr;
  227. efx->type->mcdi_read_response(efx, &hdr, 0, 4);
  228. respseq = EFX_DWORD_FIELD(hdr, MCDI_HEADER_SEQ);
  229. respcmd = EFX_DWORD_FIELD(hdr, MCDI_HEADER_CODE);
  230. error = EFX_DWORD_FIELD(hdr, MCDI_HEADER_ERROR);
  231. if (respcmd != MC_CMD_V2_EXTN) {
  232. mcdi->resp_hdr_len = 4;
  233. mcdi->resp_data_len = EFX_DWORD_FIELD(hdr, MCDI_HEADER_DATALEN);
  234. } else {
  235. efx->type->mcdi_read_response(efx, &hdr, 4, 4);
  236. mcdi->resp_hdr_len = 8;
  237. mcdi->resp_data_len =
  238. EFX_DWORD_FIELD(hdr, MC_CMD_V2_EXTN_IN_ACTUAL_LEN);
  239. }
  240. #ifdef CONFIG_SFC_MCDI_LOGGING
  241. if (!WARN_ON_ONCE(!buf)) {
  242. size_t hdr_len, data_len;
  243. int bytes = 0;
  244. int i;
  245. WARN_ON_ONCE(mcdi->resp_hdr_len % 4);
  246. hdr_len = mcdi->resp_hdr_len / 4;
  247. /* MCDI_DECLARE_BUF ensures that underlying buffer is padded
  248. * to dword size, and the MCDI buffer is always dword size
  249. */
  250. data_len = DIV_ROUND_UP(mcdi->resp_data_len, 4);
  251. /* We own the logging buffer, as only one MCDI can be in
  252. * progress on a NIC at any one time. So no need for locking.
  253. */
  254. for (i = 0; i < hdr_len && bytes < PAGE_SIZE; i++) {
  255. efx->type->mcdi_read_response(efx, &hdr, (i * 4), 4);
  256. bytes += snprintf(buf + bytes, PAGE_SIZE - bytes,
  257. " %08x", le32_to_cpu(hdr.u32[0]));
  258. }
  259. for (i = 0; i < data_len && bytes < PAGE_SIZE; i++) {
  260. efx->type->mcdi_read_response(efx, &hdr,
  261. mcdi->resp_hdr_len + (i * 4), 4);
  262. bytes += snprintf(buf + bytes, PAGE_SIZE - bytes,
  263. " %08x", le32_to_cpu(hdr.u32[0]));
  264. }
  265. netif_info(efx, hw, efx->net_dev, "MCDI RPC RESP:%s\n", buf);
  266. }
  267. #endif
  268. if (error && mcdi->resp_data_len == 0) {
  269. netif_err(efx, hw, efx->net_dev, "MC rebooted\n");
  270. mcdi->resprc = -EIO;
  271. } else if ((respseq ^ mcdi->seqno) & SEQ_MASK) {
  272. netif_err(efx, hw, efx->net_dev,
  273. "MC response mismatch tx seq 0x%x rx seq 0x%x\n",
  274. respseq, mcdi->seqno);
  275. mcdi->resprc = -EIO;
  276. } else if (error) {
  277. efx->type->mcdi_read_response(efx, &hdr, mcdi->resp_hdr_len, 4);
  278. mcdi->resprc =
  279. efx_mcdi_errno(EFX_DWORD_FIELD(hdr, EFX_DWORD_0));
  280. } else {
  281. mcdi->resprc = 0;
  282. }
  283. }
  284. static bool efx_mcdi_poll_once(struct efx_nic *efx)
  285. {
  286. struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
  287. rmb();
  288. if (!efx->type->mcdi_poll_response(efx))
  289. return false;
  290. spin_lock_bh(&mcdi->iface_lock);
  291. efx_mcdi_read_response_header(efx);
  292. spin_unlock_bh(&mcdi->iface_lock);
  293. return true;
  294. }
  295. static int efx_mcdi_poll(struct efx_nic *efx)
  296. {
  297. struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
  298. unsigned long time, finish;
  299. unsigned int spins;
  300. int rc;
  301. /* Check for a reboot atomically with respect to efx_mcdi_copyout() */
  302. rc = efx_mcdi_poll_reboot(efx);
  303. if (rc) {
  304. spin_lock_bh(&mcdi->iface_lock);
  305. mcdi->resprc = rc;
  306. mcdi->resp_hdr_len = 0;
  307. mcdi->resp_data_len = 0;
  308. spin_unlock_bh(&mcdi->iface_lock);
  309. return 0;
  310. }
  311. /* Poll for completion. Poll quickly (once a us) for the 1st jiffy,
  312. * because generally mcdi responses are fast. After that, back off
  313. * and poll once a jiffy (approximately)
  314. */
  315. spins = TICK_USEC;
  316. finish = jiffies + MCDI_RPC_TIMEOUT;
  317. while (1) {
  318. if (spins != 0) {
  319. --spins;
  320. udelay(1);
  321. } else {
  322. schedule_timeout_uninterruptible(1);
  323. }
  324. time = jiffies;
  325. if (efx_mcdi_poll_once(efx))
  326. break;
  327. if (time_after(time, finish))
  328. return -ETIMEDOUT;
  329. }
  330. /* Return rc=0 like wait_event_timeout() */
  331. return 0;
  332. }
  333. /* Test and clear MC-rebooted flag for this port/function; reset
  334. * software state as necessary.
  335. */
  336. int efx_mcdi_poll_reboot(struct efx_nic *efx)
  337. {
  338. if (!efx->mcdi)
  339. return 0;
  340. return efx->type->mcdi_poll_reboot(efx);
  341. }
  342. static bool efx_mcdi_acquire_async(struct efx_mcdi_iface *mcdi)
  343. {
  344. return cmpxchg(&mcdi->state,
  345. MCDI_STATE_QUIESCENT, MCDI_STATE_RUNNING_ASYNC) ==
  346. MCDI_STATE_QUIESCENT;
  347. }
  348. static void efx_mcdi_acquire_sync(struct efx_mcdi_iface *mcdi)
  349. {
  350. /* Wait until the interface becomes QUIESCENT and we win the race
  351. * to mark it RUNNING_SYNC.
  352. */
  353. wait_event(mcdi->wq,
  354. cmpxchg(&mcdi->state,
  355. MCDI_STATE_QUIESCENT, MCDI_STATE_RUNNING_SYNC) ==
  356. MCDI_STATE_QUIESCENT);
  357. }
  358. static int efx_mcdi_await_completion(struct efx_nic *efx)
  359. {
  360. struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
  361. if (wait_event_timeout(mcdi->wq, mcdi->state == MCDI_STATE_COMPLETED,
  362. MCDI_RPC_TIMEOUT) == 0)
  363. return -ETIMEDOUT;
  364. /* Check if efx_mcdi_set_mode() switched us back to polled completions.
  365. * In which case, poll for completions directly. If efx_mcdi_ev_cpl()
  366. * completed the request first, then we'll just end up completing the
  367. * request again, which is safe.
  368. *
  369. * We need an smp_rmb() to synchronise with efx_mcdi_mode_poll(), which
  370. * wait_event_timeout() implicitly provides.
  371. */
  372. if (mcdi->mode == MCDI_MODE_POLL)
  373. return efx_mcdi_poll(efx);
  374. return 0;
  375. }
  376. /* If the interface is RUNNING_SYNC, switch to COMPLETED and wake the
  377. * requester. Return whether this was done. Does not take any locks.
  378. */
  379. static bool efx_mcdi_complete_sync(struct efx_mcdi_iface *mcdi)
  380. {
  381. if (cmpxchg(&mcdi->state,
  382. MCDI_STATE_RUNNING_SYNC, MCDI_STATE_COMPLETED) ==
  383. MCDI_STATE_RUNNING_SYNC) {
  384. wake_up(&mcdi->wq);
  385. return true;
  386. }
  387. return false;
  388. }
  389. static void efx_mcdi_release(struct efx_mcdi_iface *mcdi)
  390. {
  391. if (mcdi->mode == MCDI_MODE_EVENTS) {
  392. struct efx_mcdi_async_param *async;
  393. struct efx_nic *efx = mcdi->efx;
  394. /* Process the asynchronous request queue */
  395. spin_lock_bh(&mcdi->async_lock);
  396. async = list_first_entry_or_null(
  397. &mcdi->async_list, struct efx_mcdi_async_param, list);
  398. if (async) {
  399. mcdi->state = MCDI_STATE_RUNNING_ASYNC;
  400. efx_mcdi_send_request(efx, async->cmd,
  401. (const efx_dword_t *)(async + 1),
  402. async->inlen);
  403. mod_timer(&mcdi->async_timer,
  404. jiffies + MCDI_RPC_TIMEOUT);
  405. }
  406. spin_unlock_bh(&mcdi->async_lock);
  407. if (async)
  408. return;
  409. }
  410. mcdi->state = MCDI_STATE_QUIESCENT;
  411. wake_up(&mcdi->wq);
  412. }
  413. /* If the interface is RUNNING_ASYNC, switch to COMPLETED, call the
  414. * asynchronous completion function, and release the interface.
  415. * Return whether this was done. Must be called in bh-disabled
  416. * context. Will take iface_lock and async_lock.
  417. */
  418. static bool efx_mcdi_complete_async(struct efx_mcdi_iface *mcdi, bool timeout)
  419. {
  420. struct efx_nic *efx = mcdi->efx;
  421. struct efx_mcdi_async_param *async;
  422. size_t hdr_len, data_len, err_len;
  423. efx_dword_t *outbuf;
  424. MCDI_DECLARE_BUF_ERR(errbuf);
  425. int rc;
  426. if (cmpxchg(&mcdi->state,
  427. MCDI_STATE_RUNNING_ASYNC, MCDI_STATE_COMPLETED) !=
  428. MCDI_STATE_RUNNING_ASYNC)
  429. return false;
  430. spin_lock(&mcdi->iface_lock);
  431. if (timeout) {
  432. /* Ensure that if the completion event arrives later,
  433. * the seqno check in efx_mcdi_ev_cpl() will fail
  434. */
  435. ++mcdi->seqno;
  436. ++mcdi->credits;
  437. rc = -ETIMEDOUT;
  438. hdr_len = 0;
  439. data_len = 0;
  440. } else {
  441. rc = mcdi->resprc;
  442. hdr_len = mcdi->resp_hdr_len;
  443. data_len = mcdi->resp_data_len;
  444. }
  445. spin_unlock(&mcdi->iface_lock);
  446. /* Stop the timer. In case the timer function is running, we
  447. * must wait for it to return so that there is no possibility
  448. * of it aborting the next request.
  449. */
  450. if (!timeout)
  451. del_timer_sync(&mcdi->async_timer);
  452. spin_lock(&mcdi->async_lock);
  453. async = list_first_entry(&mcdi->async_list,
  454. struct efx_mcdi_async_param, list);
  455. list_del(&async->list);
  456. spin_unlock(&mcdi->async_lock);
  457. outbuf = (efx_dword_t *)(async + 1);
  458. efx->type->mcdi_read_response(efx, outbuf, hdr_len,
  459. min(async->outlen, data_len));
  460. if (!timeout && rc && !async->quiet) {
  461. err_len = min(sizeof(errbuf), data_len);
  462. efx->type->mcdi_read_response(efx, errbuf, hdr_len,
  463. sizeof(errbuf));
  464. efx_mcdi_display_error(efx, async->cmd, async->inlen, errbuf,
  465. err_len, rc);
  466. }
  467. async->complete(efx, async->cookie, rc, outbuf, data_len);
  468. kfree(async);
  469. efx_mcdi_release(mcdi);
  470. return true;
  471. }
  472. static void efx_mcdi_ev_cpl(struct efx_nic *efx, unsigned int seqno,
  473. unsigned int datalen, unsigned int mcdi_err)
  474. {
  475. struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
  476. bool wake = false;
  477. spin_lock(&mcdi->iface_lock);
  478. if ((seqno ^ mcdi->seqno) & SEQ_MASK) {
  479. if (mcdi->credits)
  480. /* The request has been cancelled */
  481. --mcdi->credits;
  482. else
  483. netif_err(efx, hw, efx->net_dev,
  484. "MC response mismatch tx seq 0x%x rx "
  485. "seq 0x%x\n", seqno, mcdi->seqno);
  486. } else {
  487. if (efx->type->mcdi_max_ver >= 2) {
  488. /* MCDI v2 responses don't fit in an event */
  489. efx_mcdi_read_response_header(efx);
  490. } else {
  491. mcdi->resprc = efx_mcdi_errno(mcdi_err);
  492. mcdi->resp_hdr_len = 4;
  493. mcdi->resp_data_len = datalen;
  494. }
  495. wake = true;
  496. }
  497. spin_unlock(&mcdi->iface_lock);
  498. if (wake) {
  499. if (!efx_mcdi_complete_async(mcdi, false))
  500. (void) efx_mcdi_complete_sync(mcdi);
  501. /* If the interface isn't RUNNING_ASYNC or
  502. * RUNNING_SYNC then we've received a duplicate
  503. * completion after we've already transitioned back to
  504. * QUIESCENT. [A subsequent invocation would increment
  505. * seqno, so would have failed the seqno check].
  506. */
  507. }
  508. }
  509. static void efx_mcdi_timeout_async(unsigned long context)
  510. {
  511. struct efx_mcdi_iface *mcdi = (struct efx_mcdi_iface *)context;
  512. efx_mcdi_complete_async(mcdi, true);
  513. }
  514. static int
  515. efx_mcdi_check_supported(struct efx_nic *efx, unsigned int cmd, size_t inlen)
  516. {
  517. if (efx->type->mcdi_max_ver < 0 ||
  518. (efx->type->mcdi_max_ver < 2 &&
  519. cmd > MC_CMD_CMD_SPACE_ESCAPE_7))
  520. return -EINVAL;
  521. if (inlen > MCDI_CTL_SDU_LEN_MAX_V2 ||
  522. (efx->type->mcdi_max_ver < 2 &&
  523. inlen > MCDI_CTL_SDU_LEN_MAX_V1))
  524. return -EMSGSIZE;
  525. return 0;
  526. }
  527. static int _efx_mcdi_rpc_finish(struct efx_nic *efx, unsigned cmd, size_t inlen,
  528. efx_dword_t *outbuf, size_t outlen,
  529. size_t *outlen_actual, bool quiet)
  530. {
  531. struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
  532. MCDI_DECLARE_BUF_ERR(errbuf);
  533. int rc;
  534. if (mcdi->mode == MCDI_MODE_POLL)
  535. rc = efx_mcdi_poll(efx);
  536. else
  537. rc = efx_mcdi_await_completion(efx);
  538. if (rc != 0) {
  539. netif_err(efx, hw, efx->net_dev,
  540. "MC command 0x%x inlen %d mode %d timed out\n",
  541. cmd, (int)inlen, mcdi->mode);
  542. if (mcdi->mode == MCDI_MODE_EVENTS && efx_mcdi_poll_once(efx)) {
  543. netif_err(efx, hw, efx->net_dev,
  544. "MCDI request was completed without an event\n");
  545. rc = 0;
  546. }
  547. efx_mcdi_abandon(efx);
  548. /* Close the race with efx_mcdi_ev_cpl() executing just too late
  549. * and completing a request we've just cancelled, by ensuring
  550. * that the seqno check therein fails.
  551. */
  552. spin_lock_bh(&mcdi->iface_lock);
  553. ++mcdi->seqno;
  554. ++mcdi->credits;
  555. spin_unlock_bh(&mcdi->iface_lock);
  556. }
  557. if (rc != 0) {
  558. if (outlen_actual)
  559. *outlen_actual = 0;
  560. } else {
  561. size_t hdr_len, data_len, err_len;
  562. /* At the very least we need a memory barrier here to ensure
  563. * we pick up changes from efx_mcdi_ev_cpl(). Protect against
  564. * a spurious efx_mcdi_ev_cpl() running concurrently by
  565. * acquiring the iface_lock. */
  566. spin_lock_bh(&mcdi->iface_lock);
  567. rc = mcdi->resprc;
  568. hdr_len = mcdi->resp_hdr_len;
  569. data_len = mcdi->resp_data_len;
  570. err_len = min(sizeof(errbuf), data_len);
  571. spin_unlock_bh(&mcdi->iface_lock);
  572. BUG_ON(rc > 0);
  573. efx->type->mcdi_read_response(efx, outbuf, hdr_len,
  574. min(outlen, data_len));
  575. if (outlen_actual)
  576. *outlen_actual = data_len;
  577. efx->type->mcdi_read_response(efx, errbuf, hdr_len, err_len);
  578. if (cmd == MC_CMD_REBOOT && rc == -EIO) {
  579. /* Don't reset if MC_CMD_REBOOT returns EIO */
  580. } else if (rc == -EIO || rc == -EINTR) {
  581. netif_err(efx, hw, efx->net_dev, "MC fatal error %d\n",
  582. -rc);
  583. efx_schedule_reset(efx, RESET_TYPE_MC_FAILURE);
  584. } else if (rc && !quiet) {
  585. efx_mcdi_display_error(efx, cmd, inlen, errbuf, err_len,
  586. rc);
  587. }
  588. if (rc == -EIO || rc == -EINTR) {
  589. msleep(MCDI_STATUS_SLEEP_MS);
  590. efx_mcdi_poll_reboot(efx);
  591. mcdi->new_epoch = true;
  592. }
  593. }
  594. efx_mcdi_release(mcdi);
  595. return rc;
  596. }
  597. static int _efx_mcdi_rpc(struct efx_nic *efx, unsigned cmd,
  598. const efx_dword_t *inbuf, size_t inlen,
  599. efx_dword_t *outbuf, size_t outlen,
  600. size_t *outlen_actual, bool quiet)
  601. {
  602. int rc;
  603. rc = efx_mcdi_rpc_start(efx, cmd, inbuf, inlen);
  604. if (rc) {
  605. if (outlen_actual)
  606. *outlen_actual = 0;
  607. return rc;
  608. }
  609. return _efx_mcdi_rpc_finish(efx, cmd, inlen, outbuf, outlen,
  610. outlen_actual, quiet);
  611. }
  612. int efx_mcdi_rpc(struct efx_nic *efx, unsigned cmd,
  613. const efx_dword_t *inbuf, size_t inlen,
  614. efx_dword_t *outbuf, size_t outlen,
  615. size_t *outlen_actual)
  616. {
  617. return _efx_mcdi_rpc(efx, cmd, inbuf, inlen, outbuf, outlen,
  618. outlen_actual, false);
  619. }
  620. /* Normally, on receiving an error code in the MCDI response,
  621. * efx_mcdi_rpc will log an error message containing (among other
  622. * things) the raw error code, by means of efx_mcdi_display_error.
  623. * This _quiet version suppresses that; if the caller wishes to log
  624. * the error conditionally on the return code, it should call this
  625. * function and is then responsible for calling efx_mcdi_display_error
  626. * as needed.
  627. */
  628. int efx_mcdi_rpc_quiet(struct efx_nic *efx, unsigned cmd,
  629. const efx_dword_t *inbuf, size_t inlen,
  630. efx_dword_t *outbuf, size_t outlen,
  631. size_t *outlen_actual)
  632. {
  633. return _efx_mcdi_rpc(efx, cmd, inbuf, inlen, outbuf, outlen,
  634. outlen_actual, true);
  635. }
  636. int efx_mcdi_rpc_start(struct efx_nic *efx, unsigned cmd,
  637. const efx_dword_t *inbuf, size_t inlen)
  638. {
  639. struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
  640. int rc;
  641. rc = efx_mcdi_check_supported(efx, cmd, inlen);
  642. if (rc)
  643. return rc;
  644. if (efx->mc_bist_for_other_fn)
  645. return -ENETDOWN;
  646. if (mcdi->mode == MCDI_MODE_FAIL)
  647. return -ENETDOWN;
  648. efx_mcdi_acquire_sync(mcdi);
  649. efx_mcdi_send_request(efx, cmd, inbuf, inlen);
  650. return 0;
  651. }
  652. static int _efx_mcdi_rpc_async(struct efx_nic *efx, unsigned int cmd,
  653. const efx_dword_t *inbuf, size_t inlen,
  654. size_t outlen,
  655. efx_mcdi_async_completer *complete,
  656. unsigned long cookie, bool quiet)
  657. {
  658. struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
  659. struct efx_mcdi_async_param *async;
  660. int rc;
  661. rc = efx_mcdi_check_supported(efx, cmd, inlen);
  662. if (rc)
  663. return rc;
  664. if (efx->mc_bist_for_other_fn)
  665. return -ENETDOWN;
  666. async = kmalloc(sizeof(*async) + ALIGN(max(inlen, outlen), 4),
  667. GFP_ATOMIC);
  668. if (!async)
  669. return -ENOMEM;
  670. async->cmd = cmd;
  671. async->inlen = inlen;
  672. async->outlen = outlen;
  673. async->quiet = quiet;
  674. async->complete = complete;
  675. async->cookie = cookie;
  676. memcpy(async + 1, inbuf, inlen);
  677. spin_lock_bh(&mcdi->async_lock);
  678. if (mcdi->mode == MCDI_MODE_EVENTS) {
  679. list_add_tail(&async->list, &mcdi->async_list);
  680. /* If this is at the front of the queue, try to start it
  681. * immediately
  682. */
  683. if (mcdi->async_list.next == &async->list &&
  684. efx_mcdi_acquire_async(mcdi)) {
  685. efx_mcdi_send_request(efx, cmd, inbuf, inlen);
  686. mod_timer(&mcdi->async_timer,
  687. jiffies + MCDI_RPC_TIMEOUT);
  688. }
  689. } else {
  690. kfree(async);
  691. rc = -ENETDOWN;
  692. }
  693. spin_unlock_bh(&mcdi->async_lock);
  694. return rc;
  695. }
  696. /**
  697. * efx_mcdi_rpc_async - Schedule an MCDI command to run asynchronously
  698. * @efx: NIC through which to issue the command
  699. * @cmd: Command type number
  700. * @inbuf: Command parameters
  701. * @inlen: Length of command parameters, in bytes
  702. * @outlen: Length to allocate for response buffer, in bytes
  703. * @complete: Function to be called on completion or cancellation.
  704. * @cookie: Arbitrary value to be passed to @complete.
  705. *
  706. * This function does not sleep and therefore may be called in atomic
  707. * context. It will fail if event queues are disabled or if MCDI
  708. * event completions have been disabled due to an error.
  709. *
  710. * If it succeeds, the @complete function will be called exactly once
  711. * in atomic context, when one of the following occurs:
  712. * (a) the completion event is received (in NAPI context)
  713. * (b) event queues are disabled (in the process that disables them)
  714. * (c) the request times-out (in timer context)
  715. */
  716. int
  717. efx_mcdi_rpc_async(struct efx_nic *efx, unsigned int cmd,
  718. const efx_dword_t *inbuf, size_t inlen, size_t outlen,
  719. efx_mcdi_async_completer *complete, unsigned long cookie)
  720. {
  721. return _efx_mcdi_rpc_async(efx, cmd, inbuf, inlen, outlen, complete,
  722. cookie, false);
  723. }
  724. int efx_mcdi_rpc_async_quiet(struct efx_nic *efx, unsigned int cmd,
  725. const efx_dword_t *inbuf, size_t inlen,
  726. size_t outlen, efx_mcdi_async_completer *complete,
  727. unsigned long cookie)
  728. {
  729. return _efx_mcdi_rpc_async(efx, cmd, inbuf, inlen, outlen, complete,
  730. cookie, true);
  731. }
  732. int efx_mcdi_rpc_finish(struct efx_nic *efx, unsigned cmd, size_t inlen,
  733. efx_dword_t *outbuf, size_t outlen,
  734. size_t *outlen_actual)
  735. {
  736. return _efx_mcdi_rpc_finish(efx, cmd, inlen, outbuf, outlen,
  737. outlen_actual, false);
  738. }
  739. int efx_mcdi_rpc_finish_quiet(struct efx_nic *efx, unsigned cmd, size_t inlen,
  740. efx_dword_t *outbuf, size_t outlen,
  741. size_t *outlen_actual)
  742. {
  743. return _efx_mcdi_rpc_finish(efx, cmd, inlen, outbuf, outlen,
  744. outlen_actual, true);
  745. }
  746. void efx_mcdi_display_error(struct efx_nic *efx, unsigned cmd,
  747. size_t inlen, efx_dword_t *outbuf,
  748. size_t outlen, int rc)
  749. {
  750. int code = 0, err_arg = 0;
  751. if (outlen >= MC_CMD_ERR_CODE_OFST + 4)
  752. code = MCDI_DWORD(outbuf, ERR_CODE);
  753. if (outlen >= MC_CMD_ERR_ARG_OFST + 4)
  754. err_arg = MCDI_DWORD(outbuf, ERR_ARG);
  755. netif_err(efx, hw, efx->net_dev,
  756. "MC command 0x%x inlen %d failed rc=%d (raw=%d) arg=%d\n",
  757. cmd, (int)inlen, rc, code, err_arg);
  758. }
  759. /* Switch to polled MCDI completions. This can be called in various
  760. * error conditions with various locks held, so it must be lockless.
  761. * Caller is responsible for flushing asynchronous requests later.
  762. */
  763. void efx_mcdi_mode_poll(struct efx_nic *efx)
  764. {
  765. struct efx_mcdi_iface *mcdi;
  766. if (!efx->mcdi)
  767. return;
  768. mcdi = efx_mcdi(efx);
  769. /* If already in polling mode, nothing to do.
  770. * If in fail-fast state, don't switch to polled completion.
  771. * FLR recovery will do that later.
  772. */
  773. if (mcdi->mode == MCDI_MODE_POLL || mcdi->mode == MCDI_MODE_FAIL)
  774. return;
  775. /* We can switch from event completion to polled completion, because
  776. * mcdi requests are always completed in shared memory. We do this by
  777. * switching the mode to POLL'd then completing the request.
  778. * efx_mcdi_await_completion() will then call efx_mcdi_poll().
  779. *
  780. * We need an smp_wmb() to synchronise with efx_mcdi_await_completion(),
  781. * which efx_mcdi_complete_sync() provides for us.
  782. */
  783. mcdi->mode = MCDI_MODE_POLL;
  784. efx_mcdi_complete_sync(mcdi);
  785. }
  786. /* Flush any running or queued asynchronous requests, after event processing
  787. * is stopped
  788. */
  789. void efx_mcdi_flush_async(struct efx_nic *efx)
  790. {
  791. struct efx_mcdi_async_param *async, *next;
  792. struct efx_mcdi_iface *mcdi;
  793. if (!efx->mcdi)
  794. return;
  795. mcdi = efx_mcdi(efx);
  796. /* We must be in poll or fail mode so no more requests can be queued */
  797. BUG_ON(mcdi->mode == MCDI_MODE_EVENTS);
  798. del_timer_sync(&mcdi->async_timer);
  799. /* If a request is still running, make sure we give the MC
  800. * time to complete it so that the response won't overwrite our
  801. * next request.
  802. */
  803. if (mcdi->state == MCDI_STATE_RUNNING_ASYNC) {
  804. efx_mcdi_poll(efx);
  805. mcdi->state = MCDI_STATE_QUIESCENT;
  806. }
  807. /* Nothing else will access the async list now, so it is safe
  808. * to walk it without holding async_lock. If we hold it while
  809. * calling a completer then lockdep may warn that we have
  810. * acquired locks in the wrong order.
  811. */
  812. list_for_each_entry_safe(async, next, &mcdi->async_list, list) {
  813. async->complete(efx, async->cookie, -ENETDOWN, NULL, 0);
  814. list_del(&async->list);
  815. kfree(async);
  816. }
  817. }
  818. void efx_mcdi_mode_event(struct efx_nic *efx)
  819. {
  820. struct efx_mcdi_iface *mcdi;
  821. if (!efx->mcdi)
  822. return;
  823. mcdi = efx_mcdi(efx);
  824. /* If already in event completion mode, nothing to do.
  825. * If in fail-fast state, don't switch to event completion. FLR
  826. * recovery will do that later.
  827. */
  828. if (mcdi->mode == MCDI_MODE_EVENTS || mcdi->mode == MCDI_MODE_FAIL)
  829. return;
  830. /* We can't switch from polled to event completion in the middle of a
  831. * request, because the completion method is specified in the request.
  832. * So acquire the interface to serialise the requestors. We don't need
  833. * to acquire the iface_lock to change the mode here, but we do need a
  834. * write memory barrier ensure that efx_mcdi_rpc() sees it, which
  835. * efx_mcdi_acquire() provides.
  836. */
  837. efx_mcdi_acquire_sync(mcdi);
  838. mcdi->mode = MCDI_MODE_EVENTS;
  839. efx_mcdi_release(mcdi);
  840. }
  841. static void efx_mcdi_ev_death(struct efx_nic *efx, int rc)
  842. {
  843. struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
  844. /* If there is an outstanding MCDI request, it has been terminated
  845. * either by a BADASSERT or REBOOT event. If the mcdi interface is
  846. * in polled mode, then do nothing because the MC reboot handler will
  847. * set the header correctly. However, if the mcdi interface is waiting
  848. * for a CMDDONE event it won't receive it [and since all MCDI events
  849. * are sent to the same queue, we can't be racing with
  850. * efx_mcdi_ev_cpl()]
  851. *
  852. * If there is an outstanding asynchronous request, we can't
  853. * complete it now (efx_mcdi_complete() would deadlock). The
  854. * reset process will take care of this.
  855. *
  856. * There's a race here with efx_mcdi_send_request(), because
  857. * we might receive a REBOOT event *before* the request has
  858. * been copied out. In polled mode (during startup) this is
  859. * irrelevant, because efx_mcdi_complete_sync() is ignored. In
  860. * event mode, this condition is just an edge-case of
  861. * receiving a REBOOT event after posting the MCDI
  862. * request. Did the mc reboot before or after the copyout? The
  863. * best we can do always is just return failure.
  864. */
  865. spin_lock(&mcdi->iface_lock);
  866. if (efx_mcdi_complete_sync(mcdi)) {
  867. if (mcdi->mode == MCDI_MODE_EVENTS) {
  868. mcdi->resprc = rc;
  869. mcdi->resp_hdr_len = 0;
  870. mcdi->resp_data_len = 0;
  871. ++mcdi->credits;
  872. }
  873. } else {
  874. int count;
  875. /* Consume the status word since efx_mcdi_rpc_finish() won't */
  876. for (count = 0; count < MCDI_STATUS_DELAY_COUNT; ++count) {
  877. if (efx_mcdi_poll_reboot(efx))
  878. break;
  879. udelay(MCDI_STATUS_DELAY_US);
  880. }
  881. mcdi->new_epoch = true;
  882. /* Nobody was waiting for an MCDI request, so trigger a reset */
  883. efx_schedule_reset(efx, RESET_TYPE_MC_FAILURE);
  884. }
  885. spin_unlock(&mcdi->iface_lock);
  886. }
  887. /* The MC is going down in to BIST mode. set the BIST flag to block
  888. * new MCDI, cancel any outstanding MCDI and and schedule a BIST-type reset
  889. * (which doesn't actually execute a reset, it waits for the controlling
  890. * function to reset it).
  891. */
  892. static void efx_mcdi_ev_bist(struct efx_nic *efx)
  893. {
  894. struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
  895. spin_lock(&mcdi->iface_lock);
  896. efx->mc_bist_for_other_fn = true;
  897. if (efx_mcdi_complete_sync(mcdi)) {
  898. if (mcdi->mode == MCDI_MODE_EVENTS) {
  899. mcdi->resprc = -EIO;
  900. mcdi->resp_hdr_len = 0;
  901. mcdi->resp_data_len = 0;
  902. ++mcdi->credits;
  903. }
  904. }
  905. mcdi->new_epoch = true;
  906. efx_schedule_reset(efx, RESET_TYPE_MC_BIST);
  907. spin_unlock(&mcdi->iface_lock);
  908. }
  909. /* MCDI timeouts seen, so make all MCDI calls fail-fast and issue an FLR to try
  910. * to recover.
  911. */
  912. static void efx_mcdi_abandon(struct efx_nic *efx)
  913. {
  914. struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
  915. if (xchg(&mcdi->mode, MCDI_MODE_FAIL) == MCDI_MODE_FAIL)
  916. return; /* it had already been done */
  917. netif_dbg(efx, hw, efx->net_dev, "MCDI is timing out; trying to recover\n");
  918. efx_schedule_reset(efx, RESET_TYPE_MCDI_TIMEOUT);
  919. }
  920. /* Called from falcon_process_eventq for MCDI events */
  921. void efx_mcdi_process_event(struct efx_channel *channel,
  922. efx_qword_t *event)
  923. {
  924. struct efx_nic *efx = channel->efx;
  925. int code = EFX_QWORD_FIELD(*event, MCDI_EVENT_CODE);
  926. u32 data = EFX_QWORD_FIELD(*event, MCDI_EVENT_DATA);
  927. switch (code) {
  928. case MCDI_EVENT_CODE_BADSSERT:
  929. netif_err(efx, hw, efx->net_dev,
  930. "MC watchdog or assertion failure at 0x%x\n", data);
  931. efx_mcdi_ev_death(efx, -EINTR);
  932. break;
  933. case MCDI_EVENT_CODE_PMNOTICE:
  934. netif_info(efx, wol, efx->net_dev, "MCDI PM event.\n");
  935. break;
  936. case MCDI_EVENT_CODE_CMDDONE:
  937. efx_mcdi_ev_cpl(efx,
  938. MCDI_EVENT_FIELD(*event, CMDDONE_SEQ),
  939. MCDI_EVENT_FIELD(*event, CMDDONE_DATALEN),
  940. MCDI_EVENT_FIELD(*event, CMDDONE_ERRNO));
  941. break;
  942. case MCDI_EVENT_CODE_LINKCHANGE:
  943. efx_mcdi_process_link_change(efx, event);
  944. break;
  945. case MCDI_EVENT_CODE_SENSOREVT:
  946. efx_mcdi_sensor_event(efx, event);
  947. break;
  948. case MCDI_EVENT_CODE_SCHEDERR:
  949. netif_dbg(efx, hw, efx->net_dev,
  950. "MC Scheduler alert (0x%x)\n", data);
  951. break;
  952. case MCDI_EVENT_CODE_REBOOT:
  953. case MCDI_EVENT_CODE_MC_REBOOT:
  954. netif_info(efx, hw, efx->net_dev, "MC Reboot\n");
  955. efx_mcdi_ev_death(efx, -EIO);
  956. break;
  957. case MCDI_EVENT_CODE_MC_BIST:
  958. netif_info(efx, hw, efx->net_dev, "MC entered BIST mode\n");
  959. efx_mcdi_ev_bist(efx);
  960. break;
  961. case MCDI_EVENT_CODE_MAC_STATS_DMA:
  962. /* MAC stats are gather lazily. We can ignore this. */
  963. break;
  964. case MCDI_EVENT_CODE_FLR:
  965. if (efx->type->sriov_flr)
  966. efx->type->sriov_flr(efx,
  967. MCDI_EVENT_FIELD(*event, FLR_VF));
  968. break;
  969. case MCDI_EVENT_CODE_PTP_RX:
  970. case MCDI_EVENT_CODE_PTP_FAULT:
  971. case MCDI_EVENT_CODE_PTP_PPS:
  972. efx_ptp_event(efx, event);
  973. break;
  974. case MCDI_EVENT_CODE_PTP_TIME:
  975. efx_time_sync_event(channel, event);
  976. break;
  977. case MCDI_EVENT_CODE_TX_FLUSH:
  978. case MCDI_EVENT_CODE_RX_FLUSH:
  979. /* Two flush events will be sent: one to the same event
  980. * queue as completions, and one to event queue 0.
  981. * In the latter case the {RX,TX}_FLUSH_TO_DRIVER
  982. * flag will be set, and we should ignore the event
  983. * because we want to wait for all completions.
  984. */
  985. BUILD_BUG_ON(MCDI_EVENT_TX_FLUSH_TO_DRIVER_LBN !=
  986. MCDI_EVENT_RX_FLUSH_TO_DRIVER_LBN);
  987. if (!MCDI_EVENT_FIELD(*event, TX_FLUSH_TO_DRIVER))
  988. efx_ef10_handle_drain_event(efx);
  989. break;
  990. case MCDI_EVENT_CODE_TX_ERR:
  991. case MCDI_EVENT_CODE_RX_ERR:
  992. netif_err(efx, hw, efx->net_dev,
  993. "%s DMA error (event: "EFX_QWORD_FMT")\n",
  994. code == MCDI_EVENT_CODE_TX_ERR ? "TX" : "RX",
  995. EFX_QWORD_VAL(*event));
  996. efx_schedule_reset(efx, RESET_TYPE_DMA_ERROR);
  997. break;
  998. default:
  999. netif_err(efx, hw, efx->net_dev, "Unknown MCDI event 0x%x\n",
  1000. code);
  1001. }
  1002. }
  1003. /**************************************************************************
  1004. *
  1005. * Specific request functions
  1006. *
  1007. **************************************************************************
  1008. */
  1009. void efx_mcdi_print_fwver(struct efx_nic *efx, char *buf, size_t len)
  1010. {
  1011. MCDI_DECLARE_BUF(outbuf, MC_CMD_GET_VERSION_OUT_LEN);
  1012. size_t outlength;
  1013. const __le16 *ver_words;
  1014. size_t offset;
  1015. int rc;
  1016. BUILD_BUG_ON(MC_CMD_GET_VERSION_IN_LEN != 0);
  1017. rc = efx_mcdi_rpc(efx, MC_CMD_GET_VERSION, NULL, 0,
  1018. outbuf, sizeof(outbuf), &outlength);
  1019. if (rc)
  1020. goto fail;
  1021. if (outlength < MC_CMD_GET_VERSION_OUT_LEN) {
  1022. rc = -EIO;
  1023. goto fail;
  1024. }
  1025. ver_words = (__le16 *)MCDI_PTR(outbuf, GET_VERSION_OUT_VERSION);
  1026. offset = snprintf(buf, len, "%u.%u.%u.%u",
  1027. le16_to_cpu(ver_words[0]), le16_to_cpu(ver_words[1]),
  1028. le16_to_cpu(ver_words[2]), le16_to_cpu(ver_words[3]));
  1029. /* EF10 may have multiple datapath firmware variants within a
  1030. * single version. Report which variants are running.
  1031. */
  1032. if (efx_nic_rev(efx) >= EFX_REV_HUNT_A0) {
  1033. struct efx_ef10_nic_data *nic_data = efx->nic_data;
  1034. offset += snprintf(buf + offset, len - offset, " rx%x tx%x",
  1035. nic_data->rx_dpcpu_fw_id,
  1036. nic_data->tx_dpcpu_fw_id);
  1037. /* It's theoretically possible for the string to exceed 31
  1038. * characters, though in practice the first three version
  1039. * components are short enough that this doesn't happen.
  1040. */
  1041. if (WARN_ON(offset >= len))
  1042. buf[0] = 0;
  1043. }
  1044. return;
  1045. fail:
  1046. netif_err(efx, probe, efx->net_dev, "%s: failed rc=%d\n", __func__, rc);
  1047. buf[0] = 0;
  1048. }
  1049. static int efx_mcdi_drv_attach(struct efx_nic *efx, bool driver_operating,
  1050. bool *was_attached)
  1051. {
  1052. MCDI_DECLARE_BUF(inbuf, MC_CMD_DRV_ATTACH_IN_LEN);
  1053. MCDI_DECLARE_BUF(outbuf, MC_CMD_DRV_ATTACH_EXT_OUT_LEN);
  1054. size_t outlen;
  1055. int rc;
  1056. MCDI_SET_DWORD(inbuf, DRV_ATTACH_IN_NEW_STATE,
  1057. driver_operating ? 1 : 0);
  1058. MCDI_SET_DWORD(inbuf, DRV_ATTACH_IN_UPDATE, 1);
  1059. MCDI_SET_DWORD(inbuf, DRV_ATTACH_IN_FIRMWARE_ID, MC_CMD_FW_LOW_LATENCY);
  1060. rc = efx_mcdi_rpc_quiet(efx, MC_CMD_DRV_ATTACH, inbuf, sizeof(inbuf),
  1061. outbuf, sizeof(outbuf), &outlen);
  1062. /* If we're not the primary PF, trying to ATTACH with a FIRMWARE_ID
  1063. * specified will fail with EPERM, and we have to tell the MC we don't
  1064. * care what firmware we get.
  1065. */
  1066. if (rc == -EPERM) {
  1067. netif_dbg(efx, probe, efx->net_dev,
  1068. "efx_mcdi_drv_attach with fw-variant setting failed EPERM, trying without it\n");
  1069. MCDI_SET_DWORD(inbuf, DRV_ATTACH_IN_FIRMWARE_ID,
  1070. MC_CMD_FW_DONT_CARE);
  1071. rc = efx_mcdi_rpc_quiet(efx, MC_CMD_DRV_ATTACH, inbuf,
  1072. sizeof(inbuf), outbuf, sizeof(outbuf),
  1073. &outlen);
  1074. }
  1075. if (rc) {
  1076. efx_mcdi_display_error(efx, MC_CMD_DRV_ATTACH, sizeof(inbuf),
  1077. outbuf, outlen, rc);
  1078. goto fail;
  1079. }
  1080. if (outlen < MC_CMD_DRV_ATTACH_OUT_LEN) {
  1081. rc = -EIO;
  1082. goto fail;
  1083. }
  1084. if (driver_operating) {
  1085. if (outlen >= MC_CMD_DRV_ATTACH_EXT_OUT_LEN) {
  1086. efx->mcdi->fn_flags =
  1087. MCDI_DWORD(outbuf,
  1088. DRV_ATTACH_EXT_OUT_FUNC_FLAGS);
  1089. } else {
  1090. /* Synthesise flags for Siena */
  1091. efx->mcdi->fn_flags =
  1092. 1 << MC_CMD_DRV_ATTACH_EXT_OUT_FLAG_LINKCTRL |
  1093. 1 << MC_CMD_DRV_ATTACH_EXT_OUT_FLAG_TRUSTED |
  1094. (efx_port_num(efx) == 0) <<
  1095. MC_CMD_DRV_ATTACH_EXT_OUT_FLAG_PRIMARY;
  1096. }
  1097. }
  1098. /* We currently assume we have control of the external link
  1099. * and are completely trusted by firmware. Abort probing
  1100. * if that's not true for this function.
  1101. */
  1102. if (was_attached != NULL)
  1103. *was_attached = MCDI_DWORD(outbuf, DRV_ATTACH_OUT_OLD_STATE);
  1104. return 0;
  1105. fail:
  1106. netif_err(efx, probe, efx->net_dev, "%s: failed rc=%d\n", __func__, rc);
  1107. return rc;
  1108. }
  1109. int efx_mcdi_get_board_cfg(struct efx_nic *efx, u8 *mac_address,
  1110. u16 *fw_subtype_list, u32 *capabilities)
  1111. {
  1112. MCDI_DECLARE_BUF(outbuf, MC_CMD_GET_BOARD_CFG_OUT_LENMAX);
  1113. size_t outlen, i;
  1114. int port_num = efx_port_num(efx);
  1115. int rc;
  1116. BUILD_BUG_ON(MC_CMD_GET_BOARD_CFG_IN_LEN != 0);
  1117. /* we need __aligned(2) for ether_addr_copy */
  1118. BUILD_BUG_ON(MC_CMD_GET_BOARD_CFG_OUT_MAC_ADDR_BASE_PORT0_OFST & 1);
  1119. BUILD_BUG_ON(MC_CMD_GET_BOARD_CFG_OUT_MAC_ADDR_BASE_PORT1_OFST & 1);
  1120. rc = efx_mcdi_rpc(efx, MC_CMD_GET_BOARD_CFG, NULL, 0,
  1121. outbuf, sizeof(outbuf), &outlen);
  1122. if (rc)
  1123. goto fail;
  1124. if (outlen < MC_CMD_GET_BOARD_CFG_OUT_LENMIN) {
  1125. rc = -EIO;
  1126. goto fail;
  1127. }
  1128. if (mac_address)
  1129. ether_addr_copy(mac_address,
  1130. port_num ?
  1131. MCDI_PTR(outbuf, GET_BOARD_CFG_OUT_MAC_ADDR_BASE_PORT1) :
  1132. MCDI_PTR(outbuf, GET_BOARD_CFG_OUT_MAC_ADDR_BASE_PORT0));
  1133. if (fw_subtype_list) {
  1134. for (i = 0;
  1135. i < MCDI_VAR_ARRAY_LEN(outlen,
  1136. GET_BOARD_CFG_OUT_FW_SUBTYPE_LIST);
  1137. i++)
  1138. fw_subtype_list[i] = MCDI_ARRAY_WORD(
  1139. outbuf, GET_BOARD_CFG_OUT_FW_SUBTYPE_LIST, i);
  1140. for (; i < MC_CMD_GET_BOARD_CFG_OUT_FW_SUBTYPE_LIST_MAXNUM; i++)
  1141. fw_subtype_list[i] = 0;
  1142. }
  1143. if (capabilities) {
  1144. if (port_num)
  1145. *capabilities = MCDI_DWORD(outbuf,
  1146. GET_BOARD_CFG_OUT_CAPABILITIES_PORT1);
  1147. else
  1148. *capabilities = MCDI_DWORD(outbuf,
  1149. GET_BOARD_CFG_OUT_CAPABILITIES_PORT0);
  1150. }
  1151. return 0;
  1152. fail:
  1153. netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d len=%d\n",
  1154. __func__, rc, (int)outlen);
  1155. return rc;
  1156. }
  1157. int efx_mcdi_log_ctrl(struct efx_nic *efx, bool evq, bool uart, u32 dest_evq)
  1158. {
  1159. MCDI_DECLARE_BUF(inbuf, MC_CMD_LOG_CTRL_IN_LEN);
  1160. u32 dest = 0;
  1161. int rc;
  1162. if (uart)
  1163. dest |= MC_CMD_LOG_CTRL_IN_LOG_DEST_UART;
  1164. if (evq)
  1165. dest |= MC_CMD_LOG_CTRL_IN_LOG_DEST_EVQ;
  1166. MCDI_SET_DWORD(inbuf, LOG_CTRL_IN_LOG_DEST, dest);
  1167. MCDI_SET_DWORD(inbuf, LOG_CTRL_IN_LOG_DEST_EVQ, dest_evq);
  1168. BUILD_BUG_ON(MC_CMD_LOG_CTRL_OUT_LEN != 0);
  1169. rc = efx_mcdi_rpc(efx, MC_CMD_LOG_CTRL, inbuf, sizeof(inbuf),
  1170. NULL, 0, NULL);
  1171. return rc;
  1172. }
  1173. int efx_mcdi_nvram_types(struct efx_nic *efx, u32 *nvram_types_out)
  1174. {
  1175. MCDI_DECLARE_BUF(outbuf, MC_CMD_NVRAM_TYPES_OUT_LEN);
  1176. size_t outlen;
  1177. int rc;
  1178. BUILD_BUG_ON(MC_CMD_NVRAM_TYPES_IN_LEN != 0);
  1179. rc = efx_mcdi_rpc(efx, MC_CMD_NVRAM_TYPES, NULL, 0,
  1180. outbuf, sizeof(outbuf), &outlen);
  1181. if (rc)
  1182. goto fail;
  1183. if (outlen < MC_CMD_NVRAM_TYPES_OUT_LEN) {
  1184. rc = -EIO;
  1185. goto fail;
  1186. }
  1187. *nvram_types_out = MCDI_DWORD(outbuf, NVRAM_TYPES_OUT_TYPES);
  1188. return 0;
  1189. fail:
  1190. netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d\n",
  1191. __func__, rc);
  1192. return rc;
  1193. }
  1194. int efx_mcdi_nvram_info(struct efx_nic *efx, unsigned int type,
  1195. size_t *size_out, size_t *erase_size_out,
  1196. bool *protected_out)
  1197. {
  1198. MCDI_DECLARE_BUF(inbuf, MC_CMD_NVRAM_INFO_IN_LEN);
  1199. MCDI_DECLARE_BUF(outbuf, MC_CMD_NVRAM_INFO_OUT_LEN);
  1200. size_t outlen;
  1201. int rc;
  1202. MCDI_SET_DWORD(inbuf, NVRAM_INFO_IN_TYPE, type);
  1203. rc = efx_mcdi_rpc(efx, MC_CMD_NVRAM_INFO, inbuf, sizeof(inbuf),
  1204. outbuf, sizeof(outbuf), &outlen);
  1205. if (rc)
  1206. goto fail;
  1207. if (outlen < MC_CMD_NVRAM_INFO_OUT_LEN) {
  1208. rc = -EIO;
  1209. goto fail;
  1210. }
  1211. *size_out = MCDI_DWORD(outbuf, NVRAM_INFO_OUT_SIZE);
  1212. *erase_size_out = MCDI_DWORD(outbuf, NVRAM_INFO_OUT_ERASESIZE);
  1213. *protected_out = !!(MCDI_DWORD(outbuf, NVRAM_INFO_OUT_FLAGS) &
  1214. (1 << MC_CMD_NVRAM_INFO_OUT_PROTECTED_LBN));
  1215. return 0;
  1216. fail:
  1217. netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d\n", __func__, rc);
  1218. return rc;
  1219. }
  1220. static int efx_mcdi_nvram_test(struct efx_nic *efx, unsigned int type)
  1221. {
  1222. MCDI_DECLARE_BUF(inbuf, MC_CMD_NVRAM_TEST_IN_LEN);
  1223. MCDI_DECLARE_BUF(outbuf, MC_CMD_NVRAM_TEST_OUT_LEN);
  1224. int rc;
  1225. MCDI_SET_DWORD(inbuf, NVRAM_TEST_IN_TYPE, type);
  1226. rc = efx_mcdi_rpc(efx, MC_CMD_NVRAM_TEST, inbuf, sizeof(inbuf),
  1227. outbuf, sizeof(outbuf), NULL);
  1228. if (rc)
  1229. return rc;
  1230. switch (MCDI_DWORD(outbuf, NVRAM_TEST_OUT_RESULT)) {
  1231. case MC_CMD_NVRAM_TEST_PASS:
  1232. case MC_CMD_NVRAM_TEST_NOTSUPP:
  1233. return 0;
  1234. default:
  1235. return -EIO;
  1236. }
  1237. }
  1238. int efx_mcdi_nvram_test_all(struct efx_nic *efx)
  1239. {
  1240. u32 nvram_types;
  1241. unsigned int type;
  1242. int rc;
  1243. rc = efx_mcdi_nvram_types(efx, &nvram_types);
  1244. if (rc)
  1245. goto fail1;
  1246. type = 0;
  1247. while (nvram_types != 0) {
  1248. if (nvram_types & 1) {
  1249. rc = efx_mcdi_nvram_test(efx, type);
  1250. if (rc)
  1251. goto fail2;
  1252. }
  1253. type++;
  1254. nvram_types >>= 1;
  1255. }
  1256. return 0;
  1257. fail2:
  1258. netif_err(efx, hw, efx->net_dev, "%s: failed type=%u\n",
  1259. __func__, type);
  1260. fail1:
  1261. netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d\n", __func__, rc);
  1262. return rc;
  1263. }
  1264. /* Returns 1 if an assertion was read, 0 if no assertion had fired,
  1265. * negative on error.
  1266. */
  1267. static int efx_mcdi_read_assertion(struct efx_nic *efx)
  1268. {
  1269. MCDI_DECLARE_BUF(inbuf, MC_CMD_GET_ASSERTS_IN_LEN);
  1270. MCDI_DECLARE_BUF(outbuf, MC_CMD_GET_ASSERTS_OUT_LEN);
  1271. unsigned int flags, index;
  1272. const char *reason;
  1273. size_t outlen;
  1274. int retry;
  1275. int rc;
  1276. /* Attempt to read any stored assertion state before we reboot
  1277. * the mcfw out of the assertion handler. Retry twice, once
  1278. * because a boot-time assertion might cause this command to fail
  1279. * with EINTR. And once again because GET_ASSERTS can race with
  1280. * MC_CMD_REBOOT running on the other port. */
  1281. retry = 2;
  1282. do {
  1283. MCDI_SET_DWORD(inbuf, GET_ASSERTS_IN_CLEAR, 1);
  1284. rc = efx_mcdi_rpc_quiet(efx, MC_CMD_GET_ASSERTS,
  1285. inbuf, MC_CMD_GET_ASSERTS_IN_LEN,
  1286. outbuf, sizeof(outbuf), &outlen);
  1287. if (rc == -EPERM)
  1288. return 0;
  1289. } while ((rc == -EINTR || rc == -EIO) && retry-- > 0);
  1290. if (rc) {
  1291. efx_mcdi_display_error(efx, MC_CMD_GET_ASSERTS,
  1292. MC_CMD_GET_ASSERTS_IN_LEN, outbuf,
  1293. outlen, rc);
  1294. return rc;
  1295. }
  1296. if (outlen < MC_CMD_GET_ASSERTS_OUT_LEN)
  1297. return -EIO;
  1298. /* Print out any recorded assertion state */
  1299. flags = MCDI_DWORD(outbuf, GET_ASSERTS_OUT_GLOBAL_FLAGS);
  1300. if (flags == MC_CMD_GET_ASSERTS_FLAGS_NO_FAILS)
  1301. return 0;
  1302. reason = (flags == MC_CMD_GET_ASSERTS_FLAGS_SYS_FAIL)
  1303. ? "system-level assertion"
  1304. : (flags == MC_CMD_GET_ASSERTS_FLAGS_THR_FAIL)
  1305. ? "thread-level assertion"
  1306. : (flags == MC_CMD_GET_ASSERTS_FLAGS_WDOG_FIRED)
  1307. ? "watchdog reset"
  1308. : "unknown assertion";
  1309. netif_err(efx, hw, efx->net_dev,
  1310. "MCPU %s at PC = 0x%.8x in thread 0x%.8x\n", reason,
  1311. MCDI_DWORD(outbuf, GET_ASSERTS_OUT_SAVED_PC_OFFS),
  1312. MCDI_DWORD(outbuf, GET_ASSERTS_OUT_THREAD_OFFS));
  1313. /* Print out the registers */
  1314. for (index = 0;
  1315. index < MC_CMD_GET_ASSERTS_OUT_GP_REGS_OFFS_NUM;
  1316. index++)
  1317. netif_err(efx, hw, efx->net_dev, "R%.2d (?): 0x%.8x\n",
  1318. 1 + index,
  1319. MCDI_ARRAY_DWORD(outbuf, GET_ASSERTS_OUT_GP_REGS_OFFS,
  1320. index));
  1321. return 1;
  1322. }
  1323. static int efx_mcdi_exit_assertion(struct efx_nic *efx)
  1324. {
  1325. MCDI_DECLARE_BUF(inbuf, MC_CMD_REBOOT_IN_LEN);
  1326. int rc;
  1327. /* If the MC is running debug firmware, it might now be
  1328. * waiting for a debugger to attach, but we just want it to
  1329. * reboot. We set a flag that makes the command a no-op if it
  1330. * has already done so.
  1331. * The MCDI will thus return either 0 or -EIO.
  1332. */
  1333. BUILD_BUG_ON(MC_CMD_REBOOT_OUT_LEN != 0);
  1334. MCDI_SET_DWORD(inbuf, REBOOT_IN_FLAGS,
  1335. MC_CMD_REBOOT_FLAGS_AFTER_ASSERTION);
  1336. rc = efx_mcdi_rpc_quiet(efx, MC_CMD_REBOOT, inbuf, MC_CMD_REBOOT_IN_LEN,
  1337. NULL, 0, NULL);
  1338. if (rc == -EIO)
  1339. rc = 0;
  1340. if (rc)
  1341. efx_mcdi_display_error(efx, MC_CMD_REBOOT, MC_CMD_REBOOT_IN_LEN,
  1342. NULL, 0, rc);
  1343. return rc;
  1344. }
  1345. int efx_mcdi_handle_assertion(struct efx_nic *efx)
  1346. {
  1347. int rc;
  1348. rc = efx_mcdi_read_assertion(efx);
  1349. if (rc <= 0)
  1350. return rc;
  1351. return efx_mcdi_exit_assertion(efx);
  1352. }
  1353. void efx_mcdi_set_id_led(struct efx_nic *efx, enum efx_led_mode mode)
  1354. {
  1355. MCDI_DECLARE_BUF(inbuf, MC_CMD_SET_ID_LED_IN_LEN);
  1356. int rc;
  1357. BUILD_BUG_ON(EFX_LED_OFF != MC_CMD_LED_OFF);
  1358. BUILD_BUG_ON(EFX_LED_ON != MC_CMD_LED_ON);
  1359. BUILD_BUG_ON(EFX_LED_DEFAULT != MC_CMD_LED_DEFAULT);
  1360. BUILD_BUG_ON(MC_CMD_SET_ID_LED_OUT_LEN != 0);
  1361. MCDI_SET_DWORD(inbuf, SET_ID_LED_IN_STATE, mode);
  1362. rc = efx_mcdi_rpc(efx, MC_CMD_SET_ID_LED, inbuf, sizeof(inbuf),
  1363. NULL, 0, NULL);
  1364. }
  1365. static int efx_mcdi_reset_func(struct efx_nic *efx)
  1366. {
  1367. MCDI_DECLARE_BUF(inbuf, MC_CMD_ENTITY_RESET_IN_LEN);
  1368. int rc;
  1369. BUILD_BUG_ON(MC_CMD_ENTITY_RESET_OUT_LEN != 0);
  1370. MCDI_POPULATE_DWORD_1(inbuf, ENTITY_RESET_IN_FLAG,
  1371. ENTITY_RESET_IN_FUNCTION_RESOURCE_RESET, 1);
  1372. rc = efx_mcdi_rpc(efx, MC_CMD_ENTITY_RESET, inbuf, sizeof(inbuf),
  1373. NULL, 0, NULL);
  1374. return rc;
  1375. }
  1376. static int efx_mcdi_reset_mc(struct efx_nic *efx)
  1377. {
  1378. MCDI_DECLARE_BUF(inbuf, MC_CMD_REBOOT_IN_LEN);
  1379. int rc;
  1380. BUILD_BUG_ON(MC_CMD_REBOOT_OUT_LEN != 0);
  1381. MCDI_SET_DWORD(inbuf, REBOOT_IN_FLAGS, 0);
  1382. rc = efx_mcdi_rpc(efx, MC_CMD_REBOOT, inbuf, sizeof(inbuf),
  1383. NULL, 0, NULL);
  1384. /* White is black, and up is down */
  1385. if (rc == -EIO)
  1386. return 0;
  1387. if (rc == 0)
  1388. rc = -EIO;
  1389. return rc;
  1390. }
  1391. enum reset_type efx_mcdi_map_reset_reason(enum reset_type reason)
  1392. {
  1393. return RESET_TYPE_RECOVER_OR_ALL;
  1394. }
  1395. int efx_mcdi_reset(struct efx_nic *efx, enum reset_type method)
  1396. {
  1397. int rc;
  1398. /* If MCDI is down, we can't handle_assertion */
  1399. if (method == RESET_TYPE_MCDI_TIMEOUT) {
  1400. rc = pci_reset_function(efx->pci_dev);
  1401. if (rc)
  1402. return rc;
  1403. /* Re-enable polled MCDI completion */
  1404. if (efx->mcdi) {
  1405. struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
  1406. mcdi->mode = MCDI_MODE_POLL;
  1407. }
  1408. return 0;
  1409. }
  1410. /* Recover from a failed assertion pre-reset */
  1411. rc = efx_mcdi_handle_assertion(efx);
  1412. if (rc)
  1413. return rc;
  1414. if (method == RESET_TYPE_DATAPATH)
  1415. return 0;
  1416. else if (method == RESET_TYPE_WORLD)
  1417. return efx_mcdi_reset_mc(efx);
  1418. else
  1419. return efx_mcdi_reset_func(efx);
  1420. }
  1421. static int efx_mcdi_wol_filter_set(struct efx_nic *efx, u32 type,
  1422. const u8 *mac, int *id_out)
  1423. {
  1424. MCDI_DECLARE_BUF(inbuf, MC_CMD_WOL_FILTER_SET_IN_LEN);
  1425. MCDI_DECLARE_BUF(outbuf, MC_CMD_WOL_FILTER_SET_OUT_LEN);
  1426. size_t outlen;
  1427. int rc;
  1428. MCDI_SET_DWORD(inbuf, WOL_FILTER_SET_IN_WOL_TYPE, type);
  1429. MCDI_SET_DWORD(inbuf, WOL_FILTER_SET_IN_FILTER_MODE,
  1430. MC_CMD_FILTER_MODE_SIMPLE);
  1431. ether_addr_copy(MCDI_PTR(inbuf, WOL_FILTER_SET_IN_MAGIC_MAC), mac);
  1432. rc = efx_mcdi_rpc(efx, MC_CMD_WOL_FILTER_SET, inbuf, sizeof(inbuf),
  1433. outbuf, sizeof(outbuf), &outlen);
  1434. if (rc)
  1435. goto fail;
  1436. if (outlen < MC_CMD_WOL_FILTER_SET_OUT_LEN) {
  1437. rc = -EIO;
  1438. goto fail;
  1439. }
  1440. *id_out = (int)MCDI_DWORD(outbuf, WOL_FILTER_SET_OUT_FILTER_ID);
  1441. return 0;
  1442. fail:
  1443. *id_out = -1;
  1444. netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d\n", __func__, rc);
  1445. return rc;
  1446. }
  1447. int
  1448. efx_mcdi_wol_filter_set_magic(struct efx_nic *efx, const u8 *mac, int *id_out)
  1449. {
  1450. return efx_mcdi_wol_filter_set(efx, MC_CMD_WOL_TYPE_MAGIC, mac, id_out);
  1451. }
  1452. int efx_mcdi_wol_filter_get_magic(struct efx_nic *efx, int *id_out)
  1453. {
  1454. MCDI_DECLARE_BUF(outbuf, MC_CMD_WOL_FILTER_GET_OUT_LEN);
  1455. size_t outlen;
  1456. int rc;
  1457. rc = efx_mcdi_rpc(efx, MC_CMD_WOL_FILTER_GET, NULL, 0,
  1458. outbuf, sizeof(outbuf), &outlen);
  1459. if (rc)
  1460. goto fail;
  1461. if (outlen < MC_CMD_WOL_FILTER_GET_OUT_LEN) {
  1462. rc = -EIO;
  1463. goto fail;
  1464. }
  1465. *id_out = (int)MCDI_DWORD(outbuf, WOL_FILTER_GET_OUT_FILTER_ID);
  1466. return 0;
  1467. fail:
  1468. *id_out = -1;
  1469. netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d\n", __func__, rc);
  1470. return rc;
  1471. }
  1472. int efx_mcdi_wol_filter_remove(struct efx_nic *efx, int id)
  1473. {
  1474. MCDI_DECLARE_BUF(inbuf, MC_CMD_WOL_FILTER_REMOVE_IN_LEN);
  1475. int rc;
  1476. MCDI_SET_DWORD(inbuf, WOL_FILTER_REMOVE_IN_FILTER_ID, (u32)id);
  1477. rc = efx_mcdi_rpc(efx, MC_CMD_WOL_FILTER_REMOVE, inbuf, sizeof(inbuf),
  1478. NULL, 0, NULL);
  1479. return rc;
  1480. }
  1481. int efx_mcdi_flush_rxqs(struct efx_nic *efx)
  1482. {
  1483. struct efx_channel *channel;
  1484. struct efx_rx_queue *rx_queue;
  1485. MCDI_DECLARE_BUF(inbuf,
  1486. MC_CMD_FLUSH_RX_QUEUES_IN_LEN(EFX_MAX_CHANNELS));
  1487. int rc, count;
  1488. BUILD_BUG_ON(EFX_MAX_CHANNELS >
  1489. MC_CMD_FLUSH_RX_QUEUES_IN_QID_OFST_MAXNUM);
  1490. count = 0;
  1491. efx_for_each_channel(channel, efx) {
  1492. efx_for_each_channel_rx_queue(rx_queue, channel) {
  1493. if (rx_queue->flush_pending) {
  1494. rx_queue->flush_pending = false;
  1495. atomic_dec(&efx->rxq_flush_pending);
  1496. MCDI_SET_ARRAY_DWORD(
  1497. inbuf, FLUSH_RX_QUEUES_IN_QID_OFST,
  1498. count, efx_rx_queue_index(rx_queue));
  1499. count++;
  1500. }
  1501. }
  1502. }
  1503. rc = efx_mcdi_rpc(efx, MC_CMD_FLUSH_RX_QUEUES, inbuf,
  1504. MC_CMD_FLUSH_RX_QUEUES_IN_LEN(count), NULL, 0, NULL);
  1505. WARN_ON(rc < 0);
  1506. return rc;
  1507. }
  1508. int efx_mcdi_wol_filter_reset(struct efx_nic *efx)
  1509. {
  1510. int rc;
  1511. rc = efx_mcdi_rpc(efx, MC_CMD_WOL_FILTER_RESET, NULL, 0, NULL, 0, NULL);
  1512. return rc;
  1513. }
  1514. int efx_mcdi_set_workaround(struct efx_nic *efx, u32 type, bool enabled)
  1515. {
  1516. MCDI_DECLARE_BUF(inbuf, MC_CMD_WORKAROUND_IN_LEN);
  1517. BUILD_BUG_ON(MC_CMD_WORKAROUND_OUT_LEN != 0);
  1518. MCDI_SET_DWORD(inbuf, WORKAROUND_IN_TYPE, type);
  1519. MCDI_SET_DWORD(inbuf, WORKAROUND_IN_ENABLED, enabled);
  1520. return efx_mcdi_rpc(efx, MC_CMD_WORKAROUND, inbuf, sizeof(inbuf),
  1521. NULL, 0, NULL);
  1522. }
  1523. int efx_mcdi_get_workarounds(struct efx_nic *efx, unsigned int *impl_out,
  1524. unsigned int *enabled_out)
  1525. {
  1526. MCDI_DECLARE_BUF(outbuf, MC_CMD_GET_WORKAROUNDS_OUT_LEN);
  1527. size_t outlen;
  1528. int rc;
  1529. rc = efx_mcdi_rpc(efx, MC_CMD_GET_WORKAROUNDS, NULL, 0,
  1530. outbuf, sizeof(outbuf), &outlen);
  1531. if (rc)
  1532. goto fail;
  1533. if (outlen < MC_CMD_GET_WORKAROUNDS_OUT_LEN) {
  1534. rc = -EIO;
  1535. goto fail;
  1536. }
  1537. if (impl_out)
  1538. *impl_out = MCDI_DWORD(outbuf, GET_WORKAROUNDS_OUT_IMPLEMENTED);
  1539. if (enabled_out)
  1540. *enabled_out = MCDI_DWORD(outbuf, GET_WORKAROUNDS_OUT_ENABLED);
  1541. return 0;
  1542. fail:
  1543. netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d\n", __func__, rc);
  1544. return rc;
  1545. }
  1546. #ifdef CONFIG_SFC_MTD
  1547. #define EFX_MCDI_NVRAM_LEN_MAX 128
  1548. static int efx_mcdi_nvram_update_start(struct efx_nic *efx, unsigned int type)
  1549. {
  1550. MCDI_DECLARE_BUF(inbuf, MC_CMD_NVRAM_UPDATE_START_IN_LEN);
  1551. int rc;
  1552. MCDI_SET_DWORD(inbuf, NVRAM_UPDATE_START_IN_TYPE, type);
  1553. BUILD_BUG_ON(MC_CMD_NVRAM_UPDATE_START_OUT_LEN != 0);
  1554. rc = efx_mcdi_rpc(efx, MC_CMD_NVRAM_UPDATE_START, inbuf, sizeof(inbuf),
  1555. NULL, 0, NULL);
  1556. return rc;
  1557. }
  1558. static int efx_mcdi_nvram_read(struct efx_nic *efx, unsigned int type,
  1559. loff_t offset, u8 *buffer, size_t length)
  1560. {
  1561. MCDI_DECLARE_BUF(inbuf, MC_CMD_NVRAM_READ_IN_LEN);
  1562. MCDI_DECLARE_BUF(outbuf,
  1563. MC_CMD_NVRAM_READ_OUT_LEN(EFX_MCDI_NVRAM_LEN_MAX));
  1564. size_t outlen;
  1565. int rc;
  1566. MCDI_SET_DWORD(inbuf, NVRAM_READ_IN_TYPE, type);
  1567. MCDI_SET_DWORD(inbuf, NVRAM_READ_IN_OFFSET, offset);
  1568. MCDI_SET_DWORD(inbuf, NVRAM_READ_IN_LENGTH, length);
  1569. rc = efx_mcdi_rpc(efx, MC_CMD_NVRAM_READ, inbuf, sizeof(inbuf),
  1570. outbuf, sizeof(outbuf), &outlen);
  1571. if (rc)
  1572. return rc;
  1573. memcpy(buffer, MCDI_PTR(outbuf, NVRAM_READ_OUT_READ_BUFFER), length);
  1574. return 0;
  1575. }
  1576. static int efx_mcdi_nvram_write(struct efx_nic *efx, unsigned int type,
  1577. loff_t offset, const u8 *buffer, size_t length)
  1578. {
  1579. MCDI_DECLARE_BUF(inbuf,
  1580. MC_CMD_NVRAM_WRITE_IN_LEN(EFX_MCDI_NVRAM_LEN_MAX));
  1581. int rc;
  1582. MCDI_SET_DWORD(inbuf, NVRAM_WRITE_IN_TYPE, type);
  1583. MCDI_SET_DWORD(inbuf, NVRAM_WRITE_IN_OFFSET, offset);
  1584. MCDI_SET_DWORD(inbuf, NVRAM_WRITE_IN_LENGTH, length);
  1585. memcpy(MCDI_PTR(inbuf, NVRAM_WRITE_IN_WRITE_BUFFER), buffer, length);
  1586. BUILD_BUG_ON(MC_CMD_NVRAM_WRITE_OUT_LEN != 0);
  1587. rc = efx_mcdi_rpc(efx, MC_CMD_NVRAM_WRITE, inbuf,
  1588. ALIGN(MC_CMD_NVRAM_WRITE_IN_LEN(length), 4),
  1589. NULL, 0, NULL);
  1590. return rc;
  1591. }
  1592. static int efx_mcdi_nvram_erase(struct efx_nic *efx, unsigned int type,
  1593. loff_t offset, size_t length)
  1594. {
  1595. MCDI_DECLARE_BUF(inbuf, MC_CMD_NVRAM_ERASE_IN_LEN);
  1596. int rc;
  1597. MCDI_SET_DWORD(inbuf, NVRAM_ERASE_IN_TYPE, type);
  1598. MCDI_SET_DWORD(inbuf, NVRAM_ERASE_IN_OFFSET, offset);
  1599. MCDI_SET_DWORD(inbuf, NVRAM_ERASE_IN_LENGTH, length);
  1600. BUILD_BUG_ON(MC_CMD_NVRAM_ERASE_OUT_LEN != 0);
  1601. rc = efx_mcdi_rpc(efx, MC_CMD_NVRAM_ERASE, inbuf, sizeof(inbuf),
  1602. NULL, 0, NULL);
  1603. return rc;
  1604. }
  1605. static int efx_mcdi_nvram_update_finish(struct efx_nic *efx, unsigned int type)
  1606. {
  1607. MCDI_DECLARE_BUF(inbuf, MC_CMD_NVRAM_UPDATE_FINISH_IN_LEN);
  1608. int rc;
  1609. MCDI_SET_DWORD(inbuf, NVRAM_UPDATE_FINISH_IN_TYPE, type);
  1610. BUILD_BUG_ON(MC_CMD_NVRAM_UPDATE_FINISH_OUT_LEN != 0);
  1611. rc = efx_mcdi_rpc(efx, MC_CMD_NVRAM_UPDATE_FINISH, inbuf, sizeof(inbuf),
  1612. NULL, 0, NULL);
  1613. return rc;
  1614. }
  1615. int efx_mcdi_mtd_read(struct mtd_info *mtd, loff_t start,
  1616. size_t len, size_t *retlen, u8 *buffer)
  1617. {
  1618. struct efx_mcdi_mtd_partition *part = to_efx_mcdi_mtd_partition(mtd);
  1619. struct efx_nic *efx = mtd->priv;
  1620. loff_t offset = start;
  1621. loff_t end = min_t(loff_t, start + len, mtd->size);
  1622. size_t chunk;
  1623. int rc = 0;
  1624. while (offset < end) {
  1625. chunk = min_t(size_t, end - offset, EFX_MCDI_NVRAM_LEN_MAX);
  1626. rc = efx_mcdi_nvram_read(efx, part->nvram_type, offset,
  1627. buffer, chunk);
  1628. if (rc)
  1629. goto out;
  1630. offset += chunk;
  1631. buffer += chunk;
  1632. }
  1633. out:
  1634. *retlen = offset - start;
  1635. return rc;
  1636. }
  1637. int efx_mcdi_mtd_erase(struct mtd_info *mtd, loff_t start, size_t len)
  1638. {
  1639. struct efx_mcdi_mtd_partition *part = to_efx_mcdi_mtd_partition(mtd);
  1640. struct efx_nic *efx = mtd->priv;
  1641. loff_t offset = start & ~((loff_t)(mtd->erasesize - 1));
  1642. loff_t end = min_t(loff_t, start + len, mtd->size);
  1643. size_t chunk = part->common.mtd.erasesize;
  1644. int rc = 0;
  1645. if (!part->updating) {
  1646. rc = efx_mcdi_nvram_update_start(efx, part->nvram_type);
  1647. if (rc)
  1648. goto out;
  1649. part->updating = true;
  1650. }
  1651. /* The MCDI interface can in fact do multiple erase blocks at once;
  1652. * but erasing may be slow, so we make multiple calls here to avoid
  1653. * tripping the MCDI RPC timeout. */
  1654. while (offset < end) {
  1655. rc = efx_mcdi_nvram_erase(efx, part->nvram_type, offset,
  1656. chunk);
  1657. if (rc)
  1658. goto out;
  1659. offset += chunk;
  1660. }
  1661. out:
  1662. return rc;
  1663. }
  1664. int efx_mcdi_mtd_write(struct mtd_info *mtd, loff_t start,
  1665. size_t len, size_t *retlen, const u8 *buffer)
  1666. {
  1667. struct efx_mcdi_mtd_partition *part = to_efx_mcdi_mtd_partition(mtd);
  1668. struct efx_nic *efx = mtd->priv;
  1669. loff_t offset = start;
  1670. loff_t end = min_t(loff_t, start + len, mtd->size);
  1671. size_t chunk;
  1672. int rc = 0;
  1673. if (!part->updating) {
  1674. rc = efx_mcdi_nvram_update_start(efx, part->nvram_type);
  1675. if (rc)
  1676. goto out;
  1677. part->updating = true;
  1678. }
  1679. while (offset < end) {
  1680. chunk = min_t(size_t, end - offset, EFX_MCDI_NVRAM_LEN_MAX);
  1681. rc = efx_mcdi_nvram_write(efx, part->nvram_type, offset,
  1682. buffer, chunk);
  1683. if (rc)
  1684. goto out;
  1685. offset += chunk;
  1686. buffer += chunk;
  1687. }
  1688. out:
  1689. *retlen = offset - start;
  1690. return rc;
  1691. }
  1692. int efx_mcdi_mtd_sync(struct mtd_info *mtd)
  1693. {
  1694. struct efx_mcdi_mtd_partition *part = to_efx_mcdi_mtd_partition(mtd);
  1695. struct efx_nic *efx = mtd->priv;
  1696. int rc = 0;
  1697. if (part->updating) {
  1698. part->updating = false;
  1699. rc = efx_mcdi_nvram_update_finish(efx, part->nvram_type);
  1700. }
  1701. return rc;
  1702. }
  1703. void efx_mcdi_mtd_rename(struct efx_mtd_partition *part)
  1704. {
  1705. struct efx_mcdi_mtd_partition *mcdi_part =
  1706. container_of(part, struct efx_mcdi_mtd_partition, common);
  1707. struct efx_nic *efx = part->mtd.priv;
  1708. snprintf(part->name, sizeof(part->name), "%s %s:%02x",
  1709. efx->name, part->type_name, mcdi_part->fw_subtype);
  1710. }
  1711. #endif /* CONFIG_SFC_MTD */