ixgbevf_main.c 131 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /* Copyright(c) 1999 - 2018 Intel Corporation. */
  3. /******************************************************************************
  4. Copyright (c)2006 - 2007 Myricom, Inc. for some LRO specific code
  5. ******************************************************************************/
  6. #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  7. #include <linux/types.h>
  8. #include <linux/bitops.h>
  9. #include <linux/module.h>
  10. #include <linux/pci.h>
  11. #include <linux/netdevice.h>
  12. #include <linux/vmalloc.h>
  13. #include <linux/string.h>
  14. #include <linux/in.h>
  15. #include <linux/ip.h>
  16. #include <linux/tcp.h>
  17. #include <linux/sctp.h>
  18. #include <linux/ipv6.h>
  19. #include <linux/slab.h>
  20. #include <net/checksum.h>
  21. #include <net/ip6_checksum.h>
  22. #include <linux/ethtool.h>
  23. #include <linux/if.h>
  24. #include <linux/if_vlan.h>
  25. #include <linux/prefetch.h>
  26. #include <net/mpls.h>
  27. #include <linux/bpf.h>
  28. #include <linux/bpf_trace.h>
  29. #include <linux/atomic.h>
  30. #include "ixgbevf.h"
  31. const char ixgbevf_driver_name[] = "ixgbevf";
  32. static const char ixgbevf_driver_string[] =
  33. "Intel(R) 10 Gigabit PCI Express Virtual Function Network Driver";
  34. #define DRV_VERSION "4.1.0-k"
  35. const char ixgbevf_driver_version[] = DRV_VERSION;
  36. static char ixgbevf_copyright[] =
  37. "Copyright (c) 2009 - 2015 Intel Corporation.";
  38. static const struct ixgbevf_info *ixgbevf_info_tbl[] = {
  39. [board_82599_vf] = &ixgbevf_82599_vf_info,
  40. [board_82599_vf_hv] = &ixgbevf_82599_vf_hv_info,
  41. [board_X540_vf] = &ixgbevf_X540_vf_info,
  42. [board_X540_vf_hv] = &ixgbevf_X540_vf_hv_info,
  43. [board_X550_vf] = &ixgbevf_X550_vf_info,
  44. [board_X550_vf_hv] = &ixgbevf_X550_vf_hv_info,
  45. [board_X550EM_x_vf] = &ixgbevf_X550EM_x_vf_info,
  46. [board_X550EM_x_vf_hv] = &ixgbevf_X550EM_x_vf_hv_info,
  47. [board_x550em_a_vf] = &ixgbevf_x550em_a_vf_info,
  48. };
  49. /* ixgbevf_pci_tbl - PCI Device ID Table
  50. *
  51. * Wildcard entries (PCI_ANY_ID) should come last
  52. * Last entry must be all 0s
  53. *
  54. * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
  55. * Class, Class Mask, private data (not used) }
  56. */
  57. static const struct pci_device_id ixgbevf_pci_tbl[] = {
  58. {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_VF), board_82599_vf },
  59. {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_VF_HV), board_82599_vf_hv },
  60. {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X540_VF), board_X540_vf },
  61. {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X540_VF_HV), board_X540_vf_hv },
  62. {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550_VF), board_X550_vf },
  63. {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550_VF_HV), board_X550_vf_hv },
  64. {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_X_VF), board_X550EM_x_vf },
  65. {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_X_VF_HV), board_X550EM_x_vf_hv},
  66. {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_A_VF), board_x550em_a_vf },
  67. /* required last entry */
  68. {0, }
  69. };
  70. MODULE_DEVICE_TABLE(pci, ixgbevf_pci_tbl);
  71. MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
  72. MODULE_DESCRIPTION("Intel(R) 10 Gigabit Virtual Function Network Driver");
  73. MODULE_LICENSE("GPL");
  74. MODULE_VERSION(DRV_VERSION);
  75. #define DEFAULT_MSG_ENABLE (NETIF_MSG_DRV|NETIF_MSG_PROBE|NETIF_MSG_LINK)
  76. static int debug = -1;
  77. module_param(debug, int, 0);
  78. MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
  79. static struct workqueue_struct *ixgbevf_wq;
  80. static void ixgbevf_service_event_schedule(struct ixgbevf_adapter *adapter)
  81. {
  82. if (!test_bit(__IXGBEVF_DOWN, &adapter->state) &&
  83. !test_bit(__IXGBEVF_REMOVING, &adapter->state) &&
  84. !test_and_set_bit(__IXGBEVF_SERVICE_SCHED, &adapter->state))
  85. queue_work(ixgbevf_wq, &adapter->service_task);
  86. }
  87. static void ixgbevf_service_event_complete(struct ixgbevf_adapter *adapter)
  88. {
  89. BUG_ON(!test_bit(__IXGBEVF_SERVICE_SCHED, &adapter->state));
  90. /* flush memory to make sure state is correct before next watchdog */
  91. smp_mb__before_atomic();
  92. clear_bit(__IXGBEVF_SERVICE_SCHED, &adapter->state);
  93. }
  94. /* forward decls */
  95. static void ixgbevf_queue_reset_subtask(struct ixgbevf_adapter *adapter);
  96. static void ixgbevf_set_itr(struct ixgbevf_q_vector *q_vector);
  97. static void ixgbevf_free_all_rx_resources(struct ixgbevf_adapter *adapter);
  98. static bool ixgbevf_can_reuse_rx_page(struct ixgbevf_rx_buffer *rx_buffer);
  99. static void ixgbevf_reuse_rx_page(struct ixgbevf_ring *rx_ring,
  100. struct ixgbevf_rx_buffer *old_buff);
  101. static void ixgbevf_remove_adapter(struct ixgbe_hw *hw)
  102. {
  103. struct ixgbevf_adapter *adapter = hw->back;
  104. if (!hw->hw_addr)
  105. return;
  106. hw->hw_addr = NULL;
  107. dev_err(&adapter->pdev->dev, "Adapter removed\n");
  108. if (test_bit(__IXGBEVF_SERVICE_INITED, &adapter->state))
  109. ixgbevf_service_event_schedule(adapter);
  110. }
  111. static void ixgbevf_check_remove(struct ixgbe_hw *hw, u32 reg)
  112. {
  113. u32 value;
  114. /* The following check not only optimizes a bit by not
  115. * performing a read on the status register when the
  116. * register just read was a status register read that
  117. * returned IXGBE_FAILED_READ_REG. It also blocks any
  118. * potential recursion.
  119. */
  120. if (reg == IXGBE_VFSTATUS) {
  121. ixgbevf_remove_adapter(hw);
  122. return;
  123. }
  124. value = ixgbevf_read_reg(hw, IXGBE_VFSTATUS);
  125. if (value == IXGBE_FAILED_READ_REG)
  126. ixgbevf_remove_adapter(hw);
  127. }
  128. u32 ixgbevf_read_reg(struct ixgbe_hw *hw, u32 reg)
  129. {
  130. u8 __iomem *reg_addr = READ_ONCE(hw->hw_addr);
  131. u32 value;
  132. if (IXGBE_REMOVED(reg_addr))
  133. return IXGBE_FAILED_READ_REG;
  134. value = readl(reg_addr + reg);
  135. if (unlikely(value == IXGBE_FAILED_READ_REG))
  136. ixgbevf_check_remove(hw, reg);
  137. return value;
  138. }
  139. /**
  140. * ixgbevf_set_ivar - set IVAR registers - maps interrupt causes to vectors
  141. * @adapter: pointer to adapter struct
  142. * @direction: 0 for Rx, 1 for Tx, -1 for other causes
  143. * @queue: queue to map the corresponding interrupt to
  144. * @msix_vector: the vector to map to the corresponding queue
  145. **/
  146. static void ixgbevf_set_ivar(struct ixgbevf_adapter *adapter, s8 direction,
  147. u8 queue, u8 msix_vector)
  148. {
  149. u32 ivar, index;
  150. struct ixgbe_hw *hw = &adapter->hw;
  151. if (direction == -1) {
  152. /* other causes */
  153. msix_vector |= IXGBE_IVAR_ALLOC_VAL;
  154. ivar = IXGBE_READ_REG(hw, IXGBE_VTIVAR_MISC);
  155. ivar &= ~0xFF;
  156. ivar |= msix_vector;
  157. IXGBE_WRITE_REG(hw, IXGBE_VTIVAR_MISC, ivar);
  158. } else {
  159. /* Tx or Rx causes */
  160. msix_vector |= IXGBE_IVAR_ALLOC_VAL;
  161. index = ((16 * (queue & 1)) + (8 * direction));
  162. ivar = IXGBE_READ_REG(hw, IXGBE_VTIVAR(queue >> 1));
  163. ivar &= ~(0xFF << index);
  164. ivar |= (msix_vector << index);
  165. IXGBE_WRITE_REG(hw, IXGBE_VTIVAR(queue >> 1), ivar);
  166. }
  167. }
  168. static u64 ixgbevf_get_tx_completed(struct ixgbevf_ring *ring)
  169. {
  170. return ring->stats.packets;
  171. }
  172. static u32 ixgbevf_get_tx_pending(struct ixgbevf_ring *ring)
  173. {
  174. struct ixgbevf_adapter *adapter = netdev_priv(ring->netdev);
  175. struct ixgbe_hw *hw = &adapter->hw;
  176. u32 head = IXGBE_READ_REG(hw, IXGBE_VFTDH(ring->reg_idx));
  177. u32 tail = IXGBE_READ_REG(hw, IXGBE_VFTDT(ring->reg_idx));
  178. if (head != tail)
  179. return (head < tail) ?
  180. tail - head : (tail + ring->count - head);
  181. return 0;
  182. }
  183. static inline bool ixgbevf_check_tx_hang(struct ixgbevf_ring *tx_ring)
  184. {
  185. u32 tx_done = ixgbevf_get_tx_completed(tx_ring);
  186. u32 tx_done_old = tx_ring->tx_stats.tx_done_old;
  187. u32 tx_pending = ixgbevf_get_tx_pending(tx_ring);
  188. clear_check_for_tx_hang(tx_ring);
  189. /* Check for a hung queue, but be thorough. This verifies
  190. * that a transmit has been completed since the previous
  191. * check AND there is at least one packet pending. The
  192. * ARMED bit is set to indicate a potential hang.
  193. */
  194. if ((tx_done_old == tx_done) && tx_pending) {
  195. /* make sure it is true for two checks in a row */
  196. return test_and_set_bit(__IXGBEVF_HANG_CHECK_ARMED,
  197. &tx_ring->state);
  198. }
  199. /* reset the countdown */
  200. clear_bit(__IXGBEVF_HANG_CHECK_ARMED, &tx_ring->state);
  201. /* update completed stats and continue */
  202. tx_ring->tx_stats.tx_done_old = tx_done;
  203. return false;
  204. }
  205. static void ixgbevf_tx_timeout_reset(struct ixgbevf_adapter *adapter)
  206. {
  207. /* Do the reset outside of interrupt context */
  208. if (!test_bit(__IXGBEVF_DOWN, &adapter->state)) {
  209. set_bit(__IXGBEVF_RESET_REQUESTED, &adapter->state);
  210. ixgbevf_service_event_schedule(adapter);
  211. }
  212. }
  213. /**
  214. * ixgbevf_tx_timeout - Respond to a Tx Hang
  215. * @netdev: network interface device structure
  216. **/
  217. static void ixgbevf_tx_timeout(struct net_device *netdev)
  218. {
  219. struct ixgbevf_adapter *adapter = netdev_priv(netdev);
  220. ixgbevf_tx_timeout_reset(adapter);
  221. }
  222. /**
  223. * ixgbevf_clean_tx_irq - Reclaim resources after transmit completes
  224. * @q_vector: board private structure
  225. * @tx_ring: tx ring to clean
  226. * @napi_budget: Used to determine if we are in netpoll
  227. **/
  228. static bool ixgbevf_clean_tx_irq(struct ixgbevf_q_vector *q_vector,
  229. struct ixgbevf_ring *tx_ring, int napi_budget)
  230. {
  231. struct ixgbevf_adapter *adapter = q_vector->adapter;
  232. struct ixgbevf_tx_buffer *tx_buffer;
  233. union ixgbe_adv_tx_desc *tx_desc;
  234. unsigned int total_bytes = 0, total_packets = 0;
  235. unsigned int budget = tx_ring->count / 2;
  236. unsigned int i = tx_ring->next_to_clean;
  237. if (test_bit(__IXGBEVF_DOWN, &adapter->state))
  238. return true;
  239. tx_buffer = &tx_ring->tx_buffer_info[i];
  240. tx_desc = IXGBEVF_TX_DESC(tx_ring, i);
  241. i -= tx_ring->count;
  242. do {
  243. union ixgbe_adv_tx_desc *eop_desc = tx_buffer->next_to_watch;
  244. /* if next_to_watch is not set then there is no work pending */
  245. if (!eop_desc)
  246. break;
  247. /* prevent any other reads prior to eop_desc */
  248. smp_rmb();
  249. /* if DD is not set pending work has not been completed */
  250. if (!(eop_desc->wb.status & cpu_to_le32(IXGBE_TXD_STAT_DD)))
  251. break;
  252. /* clear next_to_watch to prevent false hangs */
  253. tx_buffer->next_to_watch = NULL;
  254. /* update the statistics for this packet */
  255. total_bytes += tx_buffer->bytecount;
  256. total_packets += tx_buffer->gso_segs;
  257. /* free the skb */
  258. if (ring_is_xdp(tx_ring))
  259. page_frag_free(tx_buffer->data);
  260. else
  261. napi_consume_skb(tx_buffer->skb, napi_budget);
  262. /* unmap skb header data */
  263. dma_unmap_single(tx_ring->dev,
  264. dma_unmap_addr(tx_buffer, dma),
  265. dma_unmap_len(tx_buffer, len),
  266. DMA_TO_DEVICE);
  267. /* clear tx_buffer data */
  268. dma_unmap_len_set(tx_buffer, len, 0);
  269. /* unmap remaining buffers */
  270. while (tx_desc != eop_desc) {
  271. tx_buffer++;
  272. tx_desc++;
  273. i++;
  274. if (unlikely(!i)) {
  275. i -= tx_ring->count;
  276. tx_buffer = tx_ring->tx_buffer_info;
  277. tx_desc = IXGBEVF_TX_DESC(tx_ring, 0);
  278. }
  279. /* unmap any remaining paged data */
  280. if (dma_unmap_len(tx_buffer, len)) {
  281. dma_unmap_page(tx_ring->dev,
  282. dma_unmap_addr(tx_buffer, dma),
  283. dma_unmap_len(tx_buffer, len),
  284. DMA_TO_DEVICE);
  285. dma_unmap_len_set(tx_buffer, len, 0);
  286. }
  287. }
  288. /* move us one more past the eop_desc for start of next pkt */
  289. tx_buffer++;
  290. tx_desc++;
  291. i++;
  292. if (unlikely(!i)) {
  293. i -= tx_ring->count;
  294. tx_buffer = tx_ring->tx_buffer_info;
  295. tx_desc = IXGBEVF_TX_DESC(tx_ring, 0);
  296. }
  297. /* issue prefetch for next Tx descriptor */
  298. prefetch(tx_desc);
  299. /* update budget accounting */
  300. budget--;
  301. } while (likely(budget));
  302. i += tx_ring->count;
  303. tx_ring->next_to_clean = i;
  304. u64_stats_update_begin(&tx_ring->syncp);
  305. tx_ring->stats.bytes += total_bytes;
  306. tx_ring->stats.packets += total_packets;
  307. u64_stats_update_end(&tx_ring->syncp);
  308. q_vector->tx.total_bytes += total_bytes;
  309. q_vector->tx.total_packets += total_packets;
  310. if (check_for_tx_hang(tx_ring) && ixgbevf_check_tx_hang(tx_ring)) {
  311. struct ixgbe_hw *hw = &adapter->hw;
  312. union ixgbe_adv_tx_desc *eop_desc;
  313. eop_desc = tx_ring->tx_buffer_info[i].next_to_watch;
  314. pr_err("Detected Tx Unit Hang%s\n"
  315. " Tx Queue <%d>\n"
  316. " TDH, TDT <%x>, <%x>\n"
  317. " next_to_use <%x>\n"
  318. " next_to_clean <%x>\n"
  319. "tx_buffer_info[next_to_clean]\n"
  320. " next_to_watch <%p>\n"
  321. " eop_desc->wb.status <%x>\n"
  322. " time_stamp <%lx>\n"
  323. " jiffies <%lx>\n",
  324. ring_is_xdp(tx_ring) ? " XDP" : "",
  325. tx_ring->queue_index,
  326. IXGBE_READ_REG(hw, IXGBE_VFTDH(tx_ring->reg_idx)),
  327. IXGBE_READ_REG(hw, IXGBE_VFTDT(tx_ring->reg_idx)),
  328. tx_ring->next_to_use, i,
  329. eop_desc, (eop_desc ? eop_desc->wb.status : 0),
  330. tx_ring->tx_buffer_info[i].time_stamp, jiffies);
  331. if (!ring_is_xdp(tx_ring))
  332. netif_stop_subqueue(tx_ring->netdev,
  333. tx_ring->queue_index);
  334. /* schedule immediate reset if we believe we hung */
  335. ixgbevf_tx_timeout_reset(adapter);
  336. return true;
  337. }
  338. if (ring_is_xdp(tx_ring))
  339. return !!budget;
  340. #define TX_WAKE_THRESHOLD (DESC_NEEDED * 2)
  341. if (unlikely(total_packets && netif_carrier_ok(tx_ring->netdev) &&
  342. (ixgbevf_desc_unused(tx_ring) >= TX_WAKE_THRESHOLD))) {
  343. /* Make sure that anybody stopping the queue after this
  344. * sees the new next_to_clean.
  345. */
  346. smp_mb();
  347. if (__netif_subqueue_stopped(tx_ring->netdev,
  348. tx_ring->queue_index) &&
  349. !test_bit(__IXGBEVF_DOWN, &adapter->state)) {
  350. netif_wake_subqueue(tx_ring->netdev,
  351. tx_ring->queue_index);
  352. ++tx_ring->tx_stats.restart_queue;
  353. }
  354. }
  355. return !!budget;
  356. }
  357. /**
  358. * ixgbevf_rx_skb - Helper function to determine proper Rx method
  359. * @q_vector: structure containing interrupt and ring information
  360. * @skb: packet to send up
  361. **/
  362. static void ixgbevf_rx_skb(struct ixgbevf_q_vector *q_vector,
  363. struct sk_buff *skb)
  364. {
  365. napi_gro_receive(&q_vector->napi, skb);
  366. }
  367. #define IXGBE_RSS_L4_TYPES_MASK \
  368. ((1ul << IXGBE_RXDADV_RSSTYPE_IPV4_TCP) | \
  369. (1ul << IXGBE_RXDADV_RSSTYPE_IPV4_UDP) | \
  370. (1ul << IXGBE_RXDADV_RSSTYPE_IPV6_TCP) | \
  371. (1ul << IXGBE_RXDADV_RSSTYPE_IPV6_UDP))
  372. static inline void ixgbevf_rx_hash(struct ixgbevf_ring *ring,
  373. union ixgbe_adv_rx_desc *rx_desc,
  374. struct sk_buff *skb)
  375. {
  376. u16 rss_type;
  377. if (!(ring->netdev->features & NETIF_F_RXHASH))
  378. return;
  379. rss_type = le16_to_cpu(rx_desc->wb.lower.lo_dword.hs_rss.pkt_info) &
  380. IXGBE_RXDADV_RSSTYPE_MASK;
  381. if (!rss_type)
  382. return;
  383. skb_set_hash(skb, le32_to_cpu(rx_desc->wb.lower.hi_dword.rss),
  384. (IXGBE_RSS_L4_TYPES_MASK & (1ul << rss_type)) ?
  385. PKT_HASH_TYPE_L4 : PKT_HASH_TYPE_L3);
  386. }
  387. /**
  388. * ixgbevf_rx_checksum - indicate in skb if hw indicated a good cksum
  389. * @ring: structure containig ring specific data
  390. * @rx_desc: current Rx descriptor being processed
  391. * @skb: skb currently being received and modified
  392. **/
  393. static inline void ixgbevf_rx_checksum(struct ixgbevf_ring *ring,
  394. union ixgbe_adv_rx_desc *rx_desc,
  395. struct sk_buff *skb)
  396. {
  397. skb_checksum_none_assert(skb);
  398. /* Rx csum disabled */
  399. if (!(ring->netdev->features & NETIF_F_RXCSUM))
  400. return;
  401. /* if IP and error */
  402. if (ixgbevf_test_staterr(rx_desc, IXGBE_RXD_STAT_IPCS) &&
  403. ixgbevf_test_staterr(rx_desc, IXGBE_RXDADV_ERR_IPE)) {
  404. ring->rx_stats.csum_err++;
  405. return;
  406. }
  407. if (!ixgbevf_test_staterr(rx_desc, IXGBE_RXD_STAT_L4CS))
  408. return;
  409. if (ixgbevf_test_staterr(rx_desc, IXGBE_RXDADV_ERR_TCPE)) {
  410. ring->rx_stats.csum_err++;
  411. return;
  412. }
  413. /* It must be a TCP or UDP packet with a valid checksum */
  414. skb->ip_summed = CHECKSUM_UNNECESSARY;
  415. }
  416. /**
  417. * ixgbevf_process_skb_fields - Populate skb header fields from Rx descriptor
  418. * @rx_ring: rx descriptor ring packet is being transacted on
  419. * @rx_desc: pointer to the EOP Rx descriptor
  420. * @skb: pointer to current skb being populated
  421. *
  422. * This function checks the ring, descriptor, and packet information in
  423. * order to populate the checksum, VLAN, protocol, and other fields within
  424. * the skb.
  425. **/
  426. static void ixgbevf_process_skb_fields(struct ixgbevf_ring *rx_ring,
  427. union ixgbe_adv_rx_desc *rx_desc,
  428. struct sk_buff *skb)
  429. {
  430. ixgbevf_rx_hash(rx_ring, rx_desc, skb);
  431. ixgbevf_rx_checksum(rx_ring, rx_desc, skb);
  432. if (ixgbevf_test_staterr(rx_desc, IXGBE_RXD_STAT_VP)) {
  433. u16 vid = le16_to_cpu(rx_desc->wb.upper.vlan);
  434. unsigned long *active_vlans = netdev_priv(rx_ring->netdev);
  435. if (test_bit(vid & VLAN_VID_MASK, active_vlans))
  436. __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), vid);
  437. }
  438. skb->protocol = eth_type_trans(skb, rx_ring->netdev);
  439. }
  440. static
  441. struct ixgbevf_rx_buffer *ixgbevf_get_rx_buffer(struct ixgbevf_ring *rx_ring,
  442. const unsigned int size)
  443. {
  444. struct ixgbevf_rx_buffer *rx_buffer;
  445. rx_buffer = &rx_ring->rx_buffer_info[rx_ring->next_to_clean];
  446. prefetchw(rx_buffer->page);
  447. /* we are reusing so sync this buffer for CPU use */
  448. dma_sync_single_range_for_cpu(rx_ring->dev,
  449. rx_buffer->dma,
  450. rx_buffer->page_offset,
  451. size,
  452. DMA_FROM_DEVICE);
  453. rx_buffer->pagecnt_bias--;
  454. return rx_buffer;
  455. }
  456. static void ixgbevf_put_rx_buffer(struct ixgbevf_ring *rx_ring,
  457. struct ixgbevf_rx_buffer *rx_buffer,
  458. struct sk_buff *skb)
  459. {
  460. if (ixgbevf_can_reuse_rx_page(rx_buffer)) {
  461. /* hand second half of page back to the ring */
  462. ixgbevf_reuse_rx_page(rx_ring, rx_buffer);
  463. } else {
  464. if (IS_ERR(skb))
  465. /* We are not reusing the buffer so unmap it and free
  466. * any references we are holding to it
  467. */
  468. dma_unmap_page_attrs(rx_ring->dev, rx_buffer->dma,
  469. ixgbevf_rx_pg_size(rx_ring),
  470. DMA_FROM_DEVICE,
  471. IXGBEVF_RX_DMA_ATTR);
  472. __page_frag_cache_drain(rx_buffer->page,
  473. rx_buffer->pagecnt_bias);
  474. }
  475. /* clear contents of rx_buffer */
  476. rx_buffer->page = NULL;
  477. }
  478. /**
  479. * ixgbevf_is_non_eop - process handling of non-EOP buffers
  480. * @rx_ring: Rx ring being processed
  481. * @rx_desc: Rx descriptor for current buffer
  482. *
  483. * This function updates next to clean. If the buffer is an EOP buffer
  484. * this function exits returning false, otherwise it will place the
  485. * sk_buff in the next buffer to be chained and return true indicating
  486. * that this is in fact a non-EOP buffer.
  487. **/
  488. static bool ixgbevf_is_non_eop(struct ixgbevf_ring *rx_ring,
  489. union ixgbe_adv_rx_desc *rx_desc)
  490. {
  491. u32 ntc = rx_ring->next_to_clean + 1;
  492. /* fetch, update, and store next to clean */
  493. ntc = (ntc < rx_ring->count) ? ntc : 0;
  494. rx_ring->next_to_clean = ntc;
  495. prefetch(IXGBEVF_RX_DESC(rx_ring, ntc));
  496. if (likely(ixgbevf_test_staterr(rx_desc, IXGBE_RXD_STAT_EOP)))
  497. return false;
  498. return true;
  499. }
  500. static inline unsigned int ixgbevf_rx_offset(struct ixgbevf_ring *rx_ring)
  501. {
  502. return ring_uses_build_skb(rx_ring) ? IXGBEVF_SKB_PAD : 0;
  503. }
  504. static bool ixgbevf_alloc_mapped_page(struct ixgbevf_ring *rx_ring,
  505. struct ixgbevf_rx_buffer *bi)
  506. {
  507. struct page *page = bi->page;
  508. dma_addr_t dma;
  509. /* since we are recycling buffers we should seldom need to alloc */
  510. if (likely(page))
  511. return true;
  512. /* alloc new page for storage */
  513. page = dev_alloc_pages(ixgbevf_rx_pg_order(rx_ring));
  514. if (unlikely(!page)) {
  515. rx_ring->rx_stats.alloc_rx_page_failed++;
  516. return false;
  517. }
  518. /* map page for use */
  519. dma = dma_map_page_attrs(rx_ring->dev, page, 0,
  520. ixgbevf_rx_pg_size(rx_ring),
  521. DMA_FROM_DEVICE, IXGBEVF_RX_DMA_ATTR);
  522. /* if mapping failed free memory back to system since
  523. * there isn't much point in holding memory we can't use
  524. */
  525. if (dma_mapping_error(rx_ring->dev, dma)) {
  526. __free_pages(page, ixgbevf_rx_pg_order(rx_ring));
  527. rx_ring->rx_stats.alloc_rx_page_failed++;
  528. return false;
  529. }
  530. bi->dma = dma;
  531. bi->page = page;
  532. bi->page_offset = ixgbevf_rx_offset(rx_ring);
  533. bi->pagecnt_bias = 1;
  534. rx_ring->rx_stats.alloc_rx_page++;
  535. return true;
  536. }
  537. /**
  538. * ixgbevf_alloc_rx_buffers - Replace used receive buffers; packet split
  539. * @rx_ring: rx descriptor ring (for a specific queue) to setup buffers on
  540. * @cleaned_count: number of buffers to replace
  541. **/
  542. static void ixgbevf_alloc_rx_buffers(struct ixgbevf_ring *rx_ring,
  543. u16 cleaned_count)
  544. {
  545. union ixgbe_adv_rx_desc *rx_desc;
  546. struct ixgbevf_rx_buffer *bi;
  547. unsigned int i = rx_ring->next_to_use;
  548. /* nothing to do or no valid netdev defined */
  549. if (!cleaned_count || !rx_ring->netdev)
  550. return;
  551. rx_desc = IXGBEVF_RX_DESC(rx_ring, i);
  552. bi = &rx_ring->rx_buffer_info[i];
  553. i -= rx_ring->count;
  554. do {
  555. if (!ixgbevf_alloc_mapped_page(rx_ring, bi))
  556. break;
  557. /* sync the buffer for use by the device */
  558. dma_sync_single_range_for_device(rx_ring->dev, bi->dma,
  559. bi->page_offset,
  560. ixgbevf_rx_bufsz(rx_ring),
  561. DMA_FROM_DEVICE);
  562. /* Refresh the desc even if pkt_addr didn't change
  563. * because each write-back erases this info.
  564. */
  565. rx_desc->read.pkt_addr = cpu_to_le64(bi->dma + bi->page_offset);
  566. rx_desc++;
  567. bi++;
  568. i++;
  569. if (unlikely(!i)) {
  570. rx_desc = IXGBEVF_RX_DESC(rx_ring, 0);
  571. bi = rx_ring->rx_buffer_info;
  572. i -= rx_ring->count;
  573. }
  574. /* clear the length for the next_to_use descriptor */
  575. rx_desc->wb.upper.length = 0;
  576. cleaned_count--;
  577. } while (cleaned_count);
  578. i += rx_ring->count;
  579. if (rx_ring->next_to_use != i) {
  580. /* record the next descriptor to use */
  581. rx_ring->next_to_use = i;
  582. /* update next to alloc since we have filled the ring */
  583. rx_ring->next_to_alloc = i;
  584. /* Force memory writes to complete before letting h/w
  585. * know there are new descriptors to fetch. (Only
  586. * applicable for weak-ordered memory model archs,
  587. * such as IA-64).
  588. */
  589. wmb();
  590. ixgbevf_write_tail(rx_ring, i);
  591. }
  592. }
  593. /**
  594. * ixgbevf_cleanup_headers - Correct corrupted or empty headers
  595. * @rx_ring: rx descriptor ring packet is being transacted on
  596. * @rx_desc: pointer to the EOP Rx descriptor
  597. * @skb: pointer to current skb being fixed
  598. *
  599. * Check for corrupted packet headers caused by senders on the local L2
  600. * embedded NIC switch not setting up their Tx Descriptors right. These
  601. * should be very rare.
  602. *
  603. * Also address the case where we are pulling data in on pages only
  604. * and as such no data is present in the skb header.
  605. *
  606. * In addition if skb is not at least 60 bytes we need to pad it so that
  607. * it is large enough to qualify as a valid Ethernet frame.
  608. *
  609. * Returns true if an error was encountered and skb was freed.
  610. **/
  611. static bool ixgbevf_cleanup_headers(struct ixgbevf_ring *rx_ring,
  612. union ixgbe_adv_rx_desc *rx_desc,
  613. struct sk_buff *skb)
  614. {
  615. /* XDP packets use error pointer so abort at this point */
  616. if (IS_ERR(skb))
  617. return true;
  618. /* verify that the packet does not have any known errors */
  619. if (unlikely(ixgbevf_test_staterr(rx_desc,
  620. IXGBE_RXDADV_ERR_FRAME_ERR_MASK))) {
  621. struct net_device *netdev = rx_ring->netdev;
  622. if (!(netdev->features & NETIF_F_RXALL)) {
  623. dev_kfree_skb_any(skb);
  624. return true;
  625. }
  626. }
  627. /* if eth_skb_pad returns an error the skb was freed */
  628. if (eth_skb_pad(skb))
  629. return true;
  630. return false;
  631. }
  632. /**
  633. * ixgbevf_reuse_rx_page - page flip buffer and store it back on the ring
  634. * @rx_ring: rx descriptor ring to store buffers on
  635. * @old_buff: donor buffer to have page reused
  636. *
  637. * Synchronizes page for reuse by the adapter
  638. **/
  639. static void ixgbevf_reuse_rx_page(struct ixgbevf_ring *rx_ring,
  640. struct ixgbevf_rx_buffer *old_buff)
  641. {
  642. struct ixgbevf_rx_buffer *new_buff;
  643. u16 nta = rx_ring->next_to_alloc;
  644. new_buff = &rx_ring->rx_buffer_info[nta];
  645. /* update, and store next to alloc */
  646. nta++;
  647. rx_ring->next_to_alloc = (nta < rx_ring->count) ? nta : 0;
  648. /* transfer page from old buffer to new buffer */
  649. new_buff->page = old_buff->page;
  650. new_buff->dma = old_buff->dma;
  651. new_buff->page_offset = old_buff->page_offset;
  652. new_buff->pagecnt_bias = old_buff->pagecnt_bias;
  653. }
  654. static inline bool ixgbevf_page_is_reserved(struct page *page)
  655. {
  656. return (page_to_nid(page) != numa_mem_id()) || page_is_pfmemalloc(page);
  657. }
  658. static bool ixgbevf_can_reuse_rx_page(struct ixgbevf_rx_buffer *rx_buffer)
  659. {
  660. unsigned int pagecnt_bias = rx_buffer->pagecnt_bias;
  661. struct page *page = rx_buffer->page;
  662. /* avoid re-using remote pages */
  663. if (unlikely(ixgbevf_page_is_reserved(page)))
  664. return false;
  665. #if (PAGE_SIZE < 8192)
  666. /* if we are only owner of page we can reuse it */
  667. if (unlikely((page_ref_count(page) - pagecnt_bias) > 1))
  668. return false;
  669. #else
  670. #define IXGBEVF_LAST_OFFSET \
  671. (SKB_WITH_OVERHEAD(PAGE_SIZE) - IXGBEVF_RXBUFFER_2048)
  672. if (rx_buffer->page_offset > IXGBEVF_LAST_OFFSET)
  673. return false;
  674. #endif
  675. /* If we have drained the page fragment pool we need to update
  676. * the pagecnt_bias and page count so that we fully restock the
  677. * number of references the driver holds.
  678. */
  679. if (unlikely(!pagecnt_bias)) {
  680. page_ref_add(page, USHRT_MAX);
  681. rx_buffer->pagecnt_bias = USHRT_MAX;
  682. }
  683. return true;
  684. }
  685. /**
  686. * ixgbevf_add_rx_frag - Add contents of Rx buffer to sk_buff
  687. * @rx_ring: rx descriptor ring to transact packets on
  688. * @rx_buffer: buffer containing page to add
  689. * @skb: sk_buff to place the data into
  690. * @size: size of buffer to be added
  691. *
  692. * This function will add the data contained in rx_buffer->page to the skb.
  693. **/
  694. static void ixgbevf_add_rx_frag(struct ixgbevf_ring *rx_ring,
  695. struct ixgbevf_rx_buffer *rx_buffer,
  696. struct sk_buff *skb,
  697. unsigned int size)
  698. {
  699. #if (PAGE_SIZE < 8192)
  700. unsigned int truesize = ixgbevf_rx_pg_size(rx_ring) / 2;
  701. #else
  702. unsigned int truesize = ring_uses_build_skb(rx_ring) ?
  703. SKB_DATA_ALIGN(IXGBEVF_SKB_PAD + size) :
  704. SKB_DATA_ALIGN(size);
  705. #endif
  706. skb_add_rx_frag(skb, skb_shinfo(skb)->nr_frags, rx_buffer->page,
  707. rx_buffer->page_offset, size, truesize);
  708. #if (PAGE_SIZE < 8192)
  709. rx_buffer->page_offset ^= truesize;
  710. #else
  711. rx_buffer->page_offset += truesize;
  712. #endif
  713. }
  714. static
  715. struct sk_buff *ixgbevf_construct_skb(struct ixgbevf_ring *rx_ring,
  716. struct ixgbevf_rx_buffer *rx_buffer,
  717. struct xdp_buff *xdp,
  718. union ixgbe_adv_rx_desc *rx_desc)
  719. {
  720. unsigned int size = xdp->data_end - xdp->data;
  721. #if (PAGE_SIZE < 8192)
  722. unsigned int truesize = ixgbevf_rx_pg_size(rx_ring) / 2;
  723. #else
  724. unsigned int truesize = SKB_DATA_ALIGN(xdp->data_end -
  725. xdp->data_hard_start);
  726. #endif
  727. unsigned int headlen;
  728. struct sk_buff *skb;
  729. /* prefetch first cache line of first page */
  730. prefetch(xdp->data);
  731. #if L1_CACHE_BYTES < 128
  732. prefetch(xdp->data + L1_CACHE_BYTES);
  733. #endif
  734. /* Note, we get here by enabling legacy-rx via:
  735. *
  736. * ethtool --set-priv-flags <dev> legacy-rx on
  737. *
  738. * In this mode, we currently get 0 extra XDP headroom as
  739. * opposed to having legacy-rx off, where we process XDP
  740. * packets going to stack via ixgbevf_build_skb().
  741. *
  742. * For ixgbevf_construct_skb() mode it means that the
  743. * xdp->data_meta will always point to xdp->data, since
  744. * the helper cannot expand the head. Should this ever
  745. * changed in future for legacy-rx mode on, then lets also
  746. * add xdp->data_meta handling here.
  747. */
  748. /* allocate a skb to store the frags */
  749. skb = napi_alloc_skb(&rx_ring->q_vector->napi, IXGBEVF_RX_HDR_SIZE);
  750. if (unlikely(!skb))
  751. return NULL;
  752. /* Determine available headroom for copy */
  753. headlen = size;
  754. if (headlen > IXGBEVF_RX_HDR_SIZE)
  755. headlen = eth_get_headlen(xdp->data, IXGBEVF_RX_HDR_SIZE);
  756. /* align pull length to size of long to optimize memcpy performance */
  757. memcpy(__skb_put(skb, headlen), xdp->data,
  758. ALIGN(headlen, sizeof(long)));
  759. /* update all of the pointers */
  760. size -= headlen;
  761. if (size) {
  762. skb_add_rx_frag(skb, 0, rx_buffer->page,
  763. (xdp->data + headlen) -
  764. page_address(rx_buffer->page),
  765. size, truesize);
  766. #if (PAGE_SIZE < 8192)
  767. rx_buffer->page_offset ^= truesize;
  768. #else
  769. rx_buffer->page_offset += truesize;
  770. #endif
  771. } else {
  772. rx_buffer->pagecnt_bias++;
  773. }
  774. return skb;
  775. }
  776. static inline void ixgbevf_irq_enable_queues(struct ixgbevf_adapter *adapter,
  777. u32 qmask)
  778. {
  779. struct ixgbe_hw *hw = &adapter->hw;
  780. IXGBE_WRITE_REG(hw, IXGBE_VTEIMS, qmask);
  781. }
  782. static struct sk_buff *ixgbevf_build_skb(struct ixgbevf_ring *rx_ring,
  783. struct ixgbevf_rx_buffer *rx_buffer,
  784. struct xdp_buff *xdp,
  785. union ixgbe_adv_rx_desc *rx_desc)
  786. {
  787. unsigned int metasize = xdp->data - xdp->data_meta;
  788. #if (PAGE_SIZE < 8192)
  789. unsigned int truesize = ixgbevf_rx_pg_size(rx_ring) / 2;
  790. #else
  791. unsigned int truesize = SKB_DATA_ALIGN(sizeof(struct skb_shared_info)) +
  792. SKB_DATA_ALIGN(xdp->data_end -
  793. xdp->data_hard_start);
  794. #endif
  795. struct sk_buff *skb;
  796. /* Prefetch first cache line of first page. If xdp->data_meta
  797. * is unused, this points to xdp->data, otherwise, we likely
  798. * have a consumer accessing first few bytes of meta data,
  799. * and then actual data.
  800. */
  801. prefetch(xdp->data_meta);
  802. #if L1_CACHE_BYTES < 128
  803. prefetch(xdp->data_meta + L1_CACHE_BYTES);
  804. #endif
  805. /* build an skb around the page buffer */
  806. skb = build_skb(xdp->data_hard_start, truesize);
  807. if (unlikely(!skb))
  808. return NULL;
  809. /* update pointers within the skb to store the data */
  810. skb_reserve(skb, xdp->data - xdp->data_hard_start);
  811. __skb_put(skb, xdp->data_end - xdp->data);
  812. if (metasize)
  813. skb_metadata_set(skb, metasize);
  814. /* update buffer offset */
  815. #if (PAGE_SIZE < 8192)
  816. rx_buffer->page_offset ^= truesize;
  817. #else
  818. rx_buffer->page_offset += truesize;
  819. #endif
  820. return skb;
  821. }
  822. #define IXGBEVF_XDP_PASS 0
  823. #define IXGBEVF_XDP_CONSUMED 1
  824. #define IXGBEVF_XDP_TX 2
  825. static int ixgbevf_xmit_xdp_ring(struct ixgbevf_ring *ring,
  826. struct xdp_buff *xdp)
  827. {
  828. struct ixgbevf_tx_buffer *tx_buffer;
  829. union ixgbe_adv_tx_desc *tx_desc;
  830. u32 len, cmd_type;
  831. dma_addr_t dma;
  832. u16 i;
  833. len = xdp->data_end - xdp->data;
  834. if (unlikely(!ixgbevf_desc_unused(ring)))
  835. return IXGBEVF_XDP_CONSUMED;
  836. dma = dma_map_single(ring->dev, xdp->data, len, DMA_TO_DEVICE);
  837. if (dma_mapping_error(ring->dev, dma))
  838. return IXGBEVF_XDP_CONSUMED;
  839. /* record the location of the first descriptor for this packet */
  840. tx_buffer = &ring->tx_buffer_info[ring->next_to_use];
  841. tx_buffer->bytecount = len;
  842. tx_buffer->gso_segs = 1;
  843. tx_buffer->protocol = 0;
  844. i = ring->next_to_use;
  845. tx_desc = IXGBEVF_TX_DESC(ring, i);
  846. dma_unmap_len_set(tx_buffer, len, len);
  847. dma_unmap_addr_set(tx_buffer, dma, dma);
  848. tx_buffer->data = xdp->data;
  849. tx_desc->read.buffer_addr = cpu_to_le64(dma);
  850. /* put descriptor type bits */
  851. cmd_type = IXGBE_ADVTXD_DTYP_DATA |
  852. IXGBE_ADVTXD_DCMD_DEXT |
  853. IXGBE_ADVTXD_DCMD_IFCS;
  854. cmd_type |= len | IXGBE_TXD_CMD;
  855. tx_desc->read.cmd_type_len = cpu_to_le32(cmd_type);
  856. tx_desc->read.olinfo_status =
  857. cpu_to_le32((len << IXGBE_ADVTXD_PAYLEN_SHIFT) |
  858. IXGBE_ADVTXD_CC);
  859. /* Avoid any potential race with cleanup */
  860. smp_wmb();
  861. /* set next_to_watch value indicating a packet is present */
  862. i++;
  863. if (i == ring->count)
  864. i = 0;
  865. tx_buffer->next_to_watch = tx_desc;
  866. ring->next_to_use = i;
  867. return IXGBEVF_XDP_TX;
  868. }
  869. static struct sk_buff *ixgbevf_run_xdp(struct ixgbevf_adapter *adapter,
  870. struct ixgbevf_ring *rx_ring,
  871. struct xdp_buff *xdp)
  872. {
  873. int result = IXGBEVF_XDP_PASS;
  874. struct ixgbevf_ring *xdp_ring;
  875. struct bpf_prog *xdp_prog;
  876. u32 act;
  877. rcu_read_lock();
  878. xdp_prog = READ_ONCE(rx_ring->xdp_prog);
  879. if (!xdp_prog)
  880. goto xdp_out;
  881. act = bpf_prog_run_xdp(xdp_prog, xdp);
  882. switch (act) {
  883. case XDP_PASS:
  884. break;
  885. case XDP_TX:
  886. xdp_ring = adapter->xdp_ring[rx_ring->queue_index];
  887. result = ixgbevf_xmit_xdp_ring(xdp_ring, xdp);
  888. break;
  889. default:
  890. bpf_warn_invalid_xdp_action(act);
  891. /* fallthrough */
  892. case XDP_ABORTED:
  893. trace_xdp_exception(rx_ring->netdev, xdp_prog, act);
  894. /* fallthrough -- handle aborts by dropping packet */
  895. case XDP_DROP:
  896. result = IXGBEVF_XDP_CONSUMED;
  897. break;
  898. }
  899. xdp_out:
  900. rcu_read_unlock();
  901. return ERR_PTR(-result);
  902. }
  903. static void ixgbevf_rx_buffer_flip(struct ixgbevf_ring *rx_ring,
  904. struct ixgbevf_rx_buffer *rx_buffer,
  905. unsigned int size)
  906. {
  907. #if (PAGE_SIZE < 8192)
  908. unsigned int truesize = ixgbevf_rx_pg_size(rx_ring) / 2;
  909. rx_buffer->page_offset ^= truesize;
  910. #else
  911. unsigned int truesize = ring_uses_build_skb(rx_ring) ?
  912. SKB_DATA_ALIGN(IXGBEVF_SKB_PAD + size) :
  913. SKB_DATA_ALIGN(size);
  914. rx_buffer->page_offset += truesize;
  915. #endif
  916. }
  917. static int ixgbevf_clean_rx_irq(struct ixgbevf_q_vector *q_vector,
  918. struct ixgbevf_ring *rx_ring,
  919. int budget)
  920. {
  921. unsigned int total_rx_bytes = 0, total_rx_packets = 0;
  922. struct ixgbevf_adapter *adapter = q_vector->adapter;
  923. u16 cleaned_count = ixgbevf_desc_unused(rx_ring);
  924. struct sk_buff *skb = rx_ring->skb;
  925. bool xdp_xmit = false;
  926. struct xdp_buff xdp;
  927. xdp.rxq = &rx_ring->xdp_rxq;
  928. while (likely(total_rx_packets < budget)) {
  929. struct ixgbevf_rx_buffer *rx_buffer;
  930. union ixgbe_adv_rx_desc *rx_desc;
  931. unsigned int size;
  932. /* return some buffers to hardware, one at a time is too slow */
  933. if (cleaned_count >= IXGBEVF_RX_BUFFER_WRITE) {
  934. ixgbevf_alloc_rx_buffers(rx_ring, cleaned_count);
  935. cleaned_count = 0;
  936. }
  937. rx_desc = IXGBEVF_RX_DESC(rx_ring, rx_ring->next_to_clean);
  938. size = le16_to_cpu(rx_desc->wb.upper.length);
  939. if (!size)
  940. break;
  941. /* This memory barrier is needed to keep us from reading
  942. * any other fields out of the rx_desc until we know the
  943. * RXD_STAT_DD bit is set
  944. */
  945. rmb();
  946. rx_buffer = ixgbevf_get_rx_buffer(rx_ring, size);
  947. /* retrieve a buffer from the ring */
  948. if (!skb) {
  949. xdp.data = page_address(rx_buffer->page) +
  950. rx_buffer->page_offset;
  951. xdp.data_meta = xdp.data;
  952. xdp.data_hard_start = xdp.data -
  953. ixgbevf_rx_offset(rx_ring);
  954. xdp.data_end = xdp.data + size;
  955. skb = ixgbevf_run_xdp(adapter, rx_ring, &xdp);
  956. }
  957. if (IS_ERR(skb)) {
  958. if (PTR_ERR(skb) == -IXGBEVF_XDP_TX) {
  959. xdp_xmit = true;
  960. ixgbevf_rx_buffer_flip(rx_ring, rx_buffer,
  961. size);
  962. } else {
  963. rx_buffer->pagecnt_bias++;
  964. }
  965. total_rx_packets++;
  966. total_rx_bytes += size;
  967. } else if (skb) {
  968. ixgbevf_add_rx_frag(rx_ring, rx_buffer, skb, size);
  969. } else if (ring_uses_build_skb(rx_ring)) {
  970. skb = ixgbevf_build_skb(rx_ring, rx_buffer,
  971. &xdp, rx_desc);
  972. } else {
  973. skb = ixgbevf_construct_skb(rx_ring, rx_buffer,
  974. &xdp, rx_desc);
  975. }
  976. /* exit if we failed to retrieve a buffer */
  977. if (!skb) {
  978. rx_ring->rx_stats.alloc_rx_buff_failed++;
  979. rx_buffer->pagecnt_bias++;
  980. break;
  981. }
  982. ixgbevf_put_rx_buffer(rx_ring, rx_buffer, skb);
  983. cleaned_count++;
  984. /* fetch next buffer in frame if non-eop */
  985. if (ixgbevf_is_non_eop(rx_ring, rx_desc))
  986. continue;
  987. /* verify the packet layout is correct */
  988. if (ixgbevf_cleanup_headers(rx_ring, rx_desc, skb)) {
  989. skb = NULL;
  990. continue;
  991. }
  992. /* probably a little skewed due to removing CRC */
  993. total_rx_bytes += skb->len;
  994. /* Workaround hardware that can't do proper VEPA multicast
  995. * source pruning.
  996. */
  997. if ((skb->pkt_type == PACKET_BROADCAST ||
  998. skb->pkt_type == PACKET_MULTICAST) &&
  999. ether_addr_equal(rx_ring->netdev->dev_addr,
  1000. eth_hdr(skb)->h_source)) {
  1001. dev_kfree_skb_irq(skb);
  1002. continue;
  1003. }
  1004. /* populate checksum, VLAN, and protocol */
  1005. ixgbevf_process_skb_fields(rx_ring, rx_desc, skb);
  1006. ixgbevf_rx_skb(q_vector, skb);
  1007. /* reset skb pointer */
  1008. skb = NULL;
  1009. /* update budget accounting */
  1010. total_rx_packets++;
  1011. }
  1012. /* place incomplete frames back on ring for completion */
  1013. rx_ring->skb = skb;
  1014. if (xdp_xmit) {
  1015. struct ixgbevf_ring *xdp_ring =
  1016. adapter->xdp_ring[rx_ring->queue_index];
  1017. /* Force memory writes to complete before letting h/w
  1018. * know there are new descriptors to fetch.
  1019. */
  1020. wmb();
  1021. ixgbevf_write_tail(xdp_ring, xdp_ring->next_to_use);
  1022. }
  1023. u64_stats_update_begin(&rx_ring->syncp);
  1024. rx_ring->stats.packets += total_rx_packets;
  1025. rx_ring->stats.bytes += total_rx_bytes;
  1026. u64_stats_update_end(&rx_ring->syncp);
  1027. q_vector->rx.total_packets += total_rx_packets;
  1028. q_vector->rx.total_bytes += total_rx_bytes;
  1029. return total_rx_packets;
  1030. }
  1031. /**
  1032. * ixgbevf_poll - NAPI polling calback
  1033. * @napi: napi struct with our devices info in it
  1034. * @budget: amount of work driver is allowed to do this pass, in packets
  1035. *
  1036. * This function will clean more than one or more rings associated with a
  1037. * q_vector.
  1038. **/
  1039. static int ixgbevf_poll(struct napi_struct *napi, int budget)
  1040. {
  1041. struct ixgbevf_q_vector *q_vector =
  1042. container_of(napi, struct ixgbevf_q_vector, napi);
  1043. struct ixgbevf_adapter *adapter = q_vector->adapter;
  1044. struct ixgbevf_ring *ring;
  1045. int per_ring_budget, work_done = 0;
  1046. bool clean_complete = true;
  1047. ixgbevf_for_each_ring(ring, q_vector->tx) {
  1048. if (!ixgbevf_clean_tx_irq(q_vector, ring, budget))
  1049. clean_complete = false;
  1050. }
  1051. if (budget <= 0)
  1052. return budget;
  1053. /* attempt to distribute budget to each queue fairly, but don't allow
  1054. * the budget to go below 1 because we'll exit polling
  1055. */
  1056. if (q_vector->rx.count > 1)
  1057. per_ring_budget = max(budget/q_vector->rx.count, 1);
  1058. else
  1059. per_ring_budget = budget;
  1060. ixgbevf_for_each_ring(ring, q_vector->rx) {
  1061. int cleaned = ixgbevf_clean_rx_irq(q_vector, ring,
  1062. per_ring_budget);
  1063. work_done += cleaned;
  1064. if (cleaned >= per_ring_budget)
  1065. clean_complete = false;
  1066. }
  1067. /* If all work not completed, return budget and keep polling */
  1068. if (!clean_complete)
  1069. return budget;
  1070. /* all work done, exit the polling mode */
  1071. napi_complete_done(napi, work_done);
  1072. if (adapter->rx_itr_setting == 1)
  1073. ixgbevf_set_itr(q_vector);
  1074. if (!test_bit(__IXGBEVF_DOWN, &adapter->state) &&
  1075. !test_bit(__IXGBEVF_REMOVING, &adapter->state))
  1076. ixgbevf_irq_enable_queues(adapter,
  1077. BIT(q_vector->v_idx));
  1078. return 0;
  1079. }
  1080. /**
  1081. * ixgbevf_write_eitr - write VTEITR register in hardware specific way
  1082. * @q_vector: structure containing interrupt and ring information
  1083. **/
  1084. void ixgbevf_write_eitr(struct ixgbevf_q_vector *q_vector)
  1085. {
  1086. struct ixgbevf_adapter *adapter = q_vector->adapter;
  1087. struct ixgbe_hw *hw = &adapter->hw;
  1088. int v_idx = q_vector->v_idx;
  1089. u32 itr_reg = q_vector->itr & IXGBE_MAX_EITR;
  1090. /* set the WDIS bit to not clear the timer bits and cause an
  1091. * immediate assertion of the interrupt
  1092. */
  1093. itr_reg |= IXGBE_EITR_CNT_WDIS;
  1094. IXGBE_WRITE_REG(hw, IXGBE_VTEITR(v_idx), itr_reg);
  1095. }
  1096. /**
  1097. * ixgbevf_configure_msix - Configure MSI-X hardware
  1098. * @adapter: board private structure
  1099. *
  1100. * ixgbevf_configure_msix sets up the hardware to properly generate MSI-X
  1101. * interrupts.
  1102. **/
  1103. static void ixgbevf_configure_msix(struct ixgbevf_adapter *adapter)
  1104. {
  1105. struct ixgbevf_q_vector *q_vector;
  1106. int q_vectors, v_idx;
  1107. q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
  1108. adapter->eims_enable_mask = 0;
  1109. /* Populate the IVAR table and set the ITR values to the
  1110. * corresponding register.
  1111. */
  1112. for (v_idx = 0; v_idx < q_vectors; v_idx++) {
  1113. struct ixgbevf_ring *ring;
  1114. q_vector = adapter->q_vector[v_idx];
  1115. ixgbevf_for_each_ring(ring, q_vector->rx)
  1116. ixgbevf_set_ivar(adapter, 0, ring->reg_idx, v_idx);
  1117. ixgbevf_for_each_ring(ring, q_vector->tx)
  1118. ixgbevf_set_ivar(adapter, 1, ring->reg_idx, v_idx);
  1119. if (q_vector->tx.ring && !q_vector->rx.ring) {
  1120. /* Tx only vector */
  1121. if (adapter->tx_itr_setting == 1)
  1122. q_vector->itr = IXGBE_12K_ITR;
  1123. else
  1124. q_vector->itr = adapter->tx_itr_setting;
  1125. } else {
  1126. /* Rx or Rx/Tx vector */
  1127. if (adapter->rx_itr_setting == 1)
  1128. q_vector->itr = IXGBE_20K_ITR;
  1129. else
  1130. q_vector->itr = adapter->rx_itr_setting;
  1131. }
  1132. /* add q_vector eims value to global eims_enable_mask */
  1133. adapter->eims_enable_mask |= BIT(v_idx);
  1134. ixgbevf_write_eitr(q_vector);
  1135. }
  1136. ixgbevf_set_ivar(adapter, -1, 1, v_idx);
  1137. /* setup eims_other and add value to global eims_enable_mask */
  1138. adapter->eims_other = BIT(v_idx);
  1139. adapter->eims_enable_mask |= adapter->eims_other;
  1140. }
  1141. enum latency_range {
  1142. lowest_latency = 0,
  1143. low_latency = 1,
  1144. bulk_latency = 2,
  1145. latency_invalid = 255
  1146. };
  1147. /**
  1148. * ixgbevf_update_itr - update the dynamic ITR value based on statistics
  1149. * @q_vector: structure containing interrupt and ring information
  1150. * @ring_container: structure containing ring performance data
  1151. *
  1152. * Stores a new ITR value based on packets and byte
  1153. * counts during the last interrupt. The advantage of per interrupt
  1154. * computation is faster updates and more accurate ITR for the current
  1155. * traffic pattern. Constants in this function were computed
  1156. * based on theoretical maximum wire speed and thresholds were set based
  1157. * on testing data as well as attempting to minimize response time
  1158. * while increasing bulk throughput.
  1159. **/
  1160. static void ixgbevf_update_itr(struct ixgbevf_q_vector *q_vector,
  1161. struct ixgbevf_ring_container *ring_container)
  1162. {
  1163. int bytes = ring_container->total_bytes;
  1164. int packets = ring_container->total_packets;
  1165. u32 timepassed_us;
  1166. u64 bytes_perint;
  1167. u8 itr_setting = ring_container->itr;
  1168. if (packets == 0)
  1169. return;
  1170. /* simple throttle rate management
  1171. * 0-20MB/s lowest (100000 ints/s)
  1172. * 20-100MB/s low (20000 ints/s)
  1173. * 100-1249MB/s bulk (12000 ints/s)
  1174. */
  1175. /* what was last interrupt timeslice? */
  1176. timepassed_us = q_vector->itr >> 2;
  1177. bytes_perint = bytes / timepassed_us; /* bytes/usec */
  1178. switch (itr_setting) {
  1179. case lowest_latency:
  1180. if (bytes_perint > 10)
  1181. itr_setting = low_latency;
  1182. break;
  1183. case low_latency:
  1184. if (bytes_perint > 20)
  1185. itr_setting = bulk_latency;
  1186. else if (bytes_perint <= 10)
  1187. itr_setting = lowest_latency;
  1188. break;
  1189. case bulk_latency:
  1190. if (bytes_perint <= 20)
  1191. itr_setting = low_latency;
  1192. break;
  1193. }
  1194. /* clear work counters since we have the values we need */
  1195. ring_container->total_bytes = 0;
  1196. ring_container->total_packets = 0;
  1197. /* write updated itr to ring container */
  1198. ring_container->itr = itr_setting;
  1199. }
  1200. static void ixgbevf_set_itr(struct ixgbevf_q_vector *q_vector)
  1201. {
  1202. u32 new_itr = q_vector->itr;
  1203. u8 current_itr;
  1204. ixgbevf_update_itr(q_vector, &q_vector->tx);
  1205. ixgbevf_update_itr(q_vector, &q_vector->rx);
  1206. current_itr = max(q_vector->rx.itr, q_vector->tx.itr);
  1207. switch (current_itr) {
  1208. /* counts and packets in update_itr are dependent on these numbers */
  1209. case lowest_latency:
  1210. new_itr = IXGBE_100K_ITR;
  1211. break;
  1212. case low_latency:
  1213. new_itr = IXGBE_20K_ITR;
  1214. break;
  1215. case bulk_latency:
  1216. new_itr = IXGBE_12K_ITR;
  1217. break;
  1218. default:
  1219. break;
  1220. }
  1221. if (new_itr != q_vector->itr) {
  1222. /* do an exponential smoothing */
  1223. new_itr = (10 * new_itr * q_vector->itr) /
  1224. ((9 * new_itr) + q_vector->itr);
  1225. /* save the algorithm value here */
  1226. q_vector->itr = new_itr;
  1227. ixgbevf_write_eitr(q_vector);
  1228. }
  1229. }
  1230. static irqreturn_t ixgbevf_msix_other(int irq, void *data)
  1231. {
  1232. struct ixgbevf_adapter *adapter = data;
  1233. struct ixgbe_hw *hw = &adapter->hw;
  1234. hw->mac.get_link_status = 1;
  1235. ixgbevf_service_event_schedule(adapter);
  1236. IXGBE_WRITE_REG(hw, IXGBE_VTEIMS, adapter->eims_other);
  1237. return IRQ_HANDLED;
  1238. }
  1239. /**
  1240. * ixgbevf_msix_clean_rings - single unshared vector rx clean (all queues)
  1241. * @irq: unused
  1242. * @data: pointer to our q_vector struct for this interrupt vector
  1243. **/
  1244. static irqreturn_t ixgbevf_msix_clean_rings(int irq, void *data)
  1245. {
  1246. struct ixgbevf_q_vector *q_vector = data;
  1247. /* EIAM disabled interrupts (on this vector) for us */
  1248. if (q_vector->rx.ring || q_vector->tx.ring)
  1249. napi_schedule_irqoff(&q_vector->napi);
  1250. return IRQ_HANDLED;
  1251. }
  1252. /**
  1253. * ixgbevf_request_msix_irqs - Initialize MSI-X interrupts
  1254. * @adapter: board private structure
  1255. *
  1256. * ixgbevf_request_msix_irqs allocates MSI-X vectors and requests
  1257. * interrupts from the kernel.
  1258. **/
  1259. static int ixgbevf_request_msix_irqs(struct ixgbevf_adapter *adapter)
  1260. {
  1261. struct net_device *netdev = adapter->netdev;
  1262. int q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
  1263. unsigned int ri = 0, ti = 0;
  1264. int vector, err;
  1265. for (vector = 0; vector < q_vectors; vector++) {
  1266. struct ixgbevf_q_vector *q_vector = adapter->q_vector[vector];
  1267. struct msix_entry *entry = &adapter->msix_entries[vector];
  1268. if (q_vector->tx.ring && q_vector->rx.ring) {
  1269. snprintf(q_vector->name, sizeof(q_vector->name),
  1270. "%s-TxRx-%u", netdev->name, ri++);
  1271. ti++;
  1272. } else if (q_vector->rx.ring) {
  1273. snprintf(q_vector->name, sizeof(q_vector->name),
  1274. "%s-rx-%u", netdev->name, ri++);
  1275. } else if (q_vector->tx.ring) {
  1276. snprintf(q_vector->name, sizeof(q_vector->name),
  1277. "%s-tx-%u", netdev->name, ti++);
  1278. } else {
  1279. /* skip this unused q_vector */
  1280. continue;
  1281. }
  1282. err = request_irq(entry->vector, &ixgbevf_msix_clean_rings, 0,
  1283. q_vector->name, q_vector);
  1284. if (err) {
  1285. hw_dbg(&adapter->hw,
  1286. "request_irq failed for MSIX interrupt Error: %d\n",
  1287. err);
  1288. goto free_queue_irqs;
  1289. }
  1290. }
  1291. err = request_irq(adapter->msix_entries[vector].vector,
  1292. &ixgbevf_msix_other, 0, netdev->name, adapter);
  1293. if (err) {
  1294. hw_dbg(&adapter->hw, "request_irq for msix_other failed: %d\n",
  1295. err);
  1296. goto free_queue_irqs;
  1297. }
  1298. return 0;
  1299. free_queue_irqs:
  1300. while (vector) {
  1301. vector--;
  1302. free_irq(adapter->msix_entries[vector].vector,
  1303. adapter->q_vector[vector]);
  1304. }
  1305. /* This failure is non-recoverable - it indicates the system is
  1306. * out of MSIX vector resources and the VF driver cannot run
  1307. * without them. Set the number of msix vectors to zero
  1308. * indicating that not enough can be allocated. The error
  1309. * will be returned to the user indicating device open failed.
  1310. * Any further attempts to force the driver to open will also
  1311. * fail. The only way to recover is to unload the driver and
  1312. * reload it again. If the system has recovered some MSIX
  1313. * vectors then it may succeed.
  1314. */
  1315. adapter->num_msix_vectors = 0;
  1316. return err;
  1317. }
  1318. /**
  1319. * ixgbevf_request_irq - initialize interrupts
  1320. * @adapter: board private structure
  1321. *
  1322. * Attempts to configure interrupts using the best available
  1323. * capabilities of the hardware and kernel.
  1324. **/
  1325. static int ixgbevf_request_irq(struct ixgbevf_adapter *adapter)
  1326. {
  1327. int err = ixgbevf_request_msix_irqs(adapter);
  1328. if (err)
  1329. hw_dbg(&adapter->hw, "request_irq failed, Error %d\n", err);
  1330. return err;
  1331. }
  1332. static void ixgbevf_free_irq(struct ixgbevf_adapter *adapter)
  1333. {
  1334. int i, q_vectors;
  1335. if (!adapter->msix_entries)
  1336. return;
  1337. q_vectors = adapter->num_msix_vectors;
  1338. i = q_vectors - 1;
  1339. free_irq(adapter->msix_entries[i].vector, adapter);
  1340. i--;
  1341. for (; i >= 0; i--) {
  1342. /* free only the irqs that were actually requested */
  1343. if (!adapter->q_vector[i]->rx.ring &&
  1344. !adapter->q_vector[i]->tx.ring)
  1345. continue;
  1346. free_irq(adapter->msix_entries[i].vector,
  1347. adapter->q_vector[i]);
  1348. }
  1349. }
  1350. /**
  1351. * ixgbevf_irq_disable - Mask off interrupt generation on the NIC
  1352. * @adapter: board private structure
  1353. **/
  1354. static inline void ixgbevf_irq_disable(struct ixgbevf_adapter *adapter)
  1355. {
  1356. struct ixgbe_hw *hw = &adapter->hw;
  1357. int i;
  1358. IXGBE_WRITE_REG(hw, IXGBE_VTEIAM, 0);
  1359. IXGBE_WRITE_REG(hw, IXGBE_VTEIMC, ~0);
  1360. IXGBE_WRITE_REG(hw, IXGBE_VTEIAC, 0);
  1361. IXGBE_WRITE_FLUSH(hw);
  1362. for (i = 0; i < adapter->num_msix_vectors; i++)
  1363. synchronize_irq(adapter->msix_entries[i].vector);
  1364. }
  1365. /**
  1366. * ixgbevf_irq_enable - Enable default interrupt generation settings
  1367. * @adapter: board private structure
  1368. **/
  1369. static inline void ixgbevf_irq_enable(struct ixgbevf_adapter *adapter)
  1370. {
  1371. struct ixgbe_hw *hw = &adapter->hw;
  1372. IXGBE_WRITE_REG(hw, IXGBE_VTEIAM, adapter->eims_enable_mask);
  1373. IXGBE_WRITE_REG(hw, IXGBE_VTEIAC, adapter->eims_enable_mask);
  1374. IXGBE_WRITE_REG(hw, IXGBE_VTEIMS, adapter->eims_enable_mask);
  1375. }
  1376. /**
  1377. * ixgbevf_configure_tx_ring - Configure 82599 VF Tx ring after Reset
  1378. * @adapter: board private structure
  1379. * @ring: structure containing ring specific data
  1380. *
  1381. * Configure the Tx descriptor ring after a reset.
  1382. **/
  1383. static void ixgbevf_configure_tx_ring(struct ixgbevf_adapter *adapter,
  1384. struct ixgbevf_ring *ring)
  1385. {
  1386. struct ixgbe_hw *hw = &adapter->hw;
  1387. u64 tdba = ring->dma;
  1388. int wait_loop = 10;
  1389. u32 txdctl = IXGBE_TXDCTL_ENABLE;
  1390. u8 reg_idx = ring->reg_idx;
  1391. /* disable queue to avoid issues while updating state */
  1392. IXGBE_WRITE_REG(hw, IXGBE_VFTXDCTL(reg_idx), IXGBE_TXDCTL_SWFLSH);
  1393. IXGBE_WRITE_FLUSH(hw);
  1394. IXGBE_WRITE_REG(hw, IXGBE_VFTDBAL(reg_idx), tdba & DMA_BIT_MASK(32));
  1395. IXGBE_WRITE_REG(hw, IXGBE_VFTDBAH(reg_idx), tdba >> 32);
  1396. IXGBE_WRITE_REG(hw, IXGBE_VFTDLEN(reg_idx),
  1397. ring->count * sizeof(union ixgbe_adv_tx_desc));
  1398. /* disable head writeback */
  1399. IXGBE_WRITE_REG(hw, IXGBE_VFTDWBAH(reg_idx), 0);
  1400. IXGBE_WRITE_REG(hw, IXGBE_VFTDWBAL(reg_idx), 0);
  1401. /* enable relaxed ordering */
  1402. IXGBE_WRITE_REG(hw, IXGBE_VFDCA_TXCTRL(reg_idx),
  1403. (IXGBE_DCA_TXCTRL_DESC_RRO_EN |
  1404. IXGBE_DCA_TXCTRL_DATA_RRO_EN));
  1405. /* reset head and tail pointers */
  1406. IXGBE_WRITE_REG(hw, IXGBE_VFTDH(reg_idx), 0);
  1407. IXGBE_WRITE_REG(hw, IXGBE_VFTDT(reg_idx), 0);
  1408. ring->tail = adapter->io_addr + IXGBE_VFTDT(reg_idx);
  1409. /* reset ntu and ntc to place SW in sync with hardwdare */
  1410. ring->next_to_clean = 0;
  1411. ring->next_to_use = 0;
  1412. /* In order to avoid issues WTHRESH + PTHRESH should always be equal
  1413. * to or less than the number of on chip descriptors, which is
  1414. * currently 40.
  1415. */
  1416. txdctl |= (8 << 16); /* WTHRESH = 8 */
  1417. /* Setting PTHRESH to 32 both improves performance */
  1418. txdctl |= (1u << 8) | /* HTHRESH = 1 */
  1419. 32; /* PTHRESH = 32 */
  1420. /* reinitialize tx_buffer_info */
  1421. memset(ring->tx_buffer_info, 0,
  1422. sizeof(struct ixgbevf_tx_buffer) * ring->count);
  1423. clear_bit(__IXGBEVF_HANG_CHECK_ARMED, &ring->state);
  1424. IXGBE_WRITE_REG(hw, IXGBE_VFTXDCTL(reg_idx), txdctl);
  1425. /* poll to verify queue is enabled */
  1426. do {
  1427. usleep_range(1000, 2000);
  1428. txdctl = IXGBE_READ_REG(hw, IXGBE_VFTXDCTL(reg_idx));
  1429. } while (--wait_loop && !(txdctl & IXGBE_TXDCTL_ENABLE));
  1430. if (!wait_loop)
  1431. hw_dbg(hw, "Could not enable Tx Queue %d\n", reg_idx);
  1432. }
  1433. /**
  1434. * ixgbevf_configure_tx - Configure 82599 VF Transmit Unit after Reset
  1435. * @adapter: board private structure
  1436. *
  1437. * Configure the Tx unit of the MAC after a reset.
  1438. **/
  1439. static void ixgbevf_configure_tx(struct ixgbevf_adapter *adapter)
  1440. {
  1441. u32 i;
  1442. /* Setup the HW Tx Head and Tail descriptor pointers */
  1443. for (i = 0; i < adapter->num_tx_queues; i++)
  1444. ixgbevf_configure_tx_ring(adapter, adapter->tx_ring[i]);
  1445. for (i = 0; i < adapter->num_xdp_queues; i++)
  1446. ixgbevf_configure_tx_ring(adapter, adapter->xdp_ring[i]);
  1447. }
  1448. #define IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT 2
  1449. static void ixgbevf_configure_srrctl(struct ixgbevf_adapter *adapter,
  1450. struct ixgbevf_ring *ring, int index)
  1451. {
  1452. struct ixgbe_hw *hw = &adapter->hw;
  1453. u32 srrctl;
  1454. srrctl = IXGBE_SRRCTL_DROP_EN;
  1455. srrctl |= IXGBEVF_RX_HDR_SIZE << IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT;
  1456. if (ring_uses_large_buffer(ring))
  1457. srrctl |= IXGBEVF_RXBUFFER_3072 >> IXGBE_SRRCTL_BSIZEPKT_SHIFT;
  1458. else
  1459. srrctl |= IXGBEVF_RXBUFFER_2048 >> IXGBE_SRRCTL_BSIZEPKT_SHIFT;
  1460. srrctl |= IXGBE_SRRCTL_DESCTYPE_ADV_ONEBUF;
  1461. IXGBE_WRITE_REG(hw, IXGBE_VFSRRCTL(index), srrctl);
  1462. }
  1463. static void ixgbevf_setup_psrtype(struct ixgbevf_adapter *adapter)
  1464. {
  1465. struct ixgbe_hw *hw = &adapter->hw;
  1466. /* PSRTYPE must be initialized in 82599 */
  1467. u32 psrtype = IXGBE_PSRTYPE_TCPHDR | IXGBE_PSRTYPE_UDPHDR |
  1468. IXGBE_PSRTYPE_IPV4HDR | IXGBE_PSRTYPE_IPV6HDR |
  1469. IXGBE_PSRTYPE_L2HDR;
  1470. if (adapter->num_rx_queues > 1)
  1471. psrtype |= BIT(29);
  1472. IXGBE_WRITE_REG(hw, IXGBE_VFPSRTYPE, psrtype);
  1473. }
  1474. #define IXGBEVF_MAX_RX_DESC_POLL 10
  1475. static void ixgbevf_disable_rx_queue(struct ixgbevf_adapter *adapter,
  1476. struct ixgbevf_ring *ring)
  1477. {
  1478. struct ixgbe_hw *hw = &adapter->hw;
  1479. int wait_loop = IXGBEVF_MAX_RX_DESC_POLL;
  1480. u32 rxdctl;
  1481. u8 reg_idx = ring->reg_idx;
  1482. if (IXGBE_REMOVED(hw->hw_addr))
  1483. return;
  1484. rxdctl = IXGBE_READ_REG(hw, IXGBE_VFRXDCTL(reg_idx));
  1485. rxdctl &= ~IXGBE_RXDCTL_ENABLE;
  1486. /* write value back with RXDCTL.ENABLE bit cleared */
  1487. IXGBE_WRITE_REG(hw, IXGBE_VFRXDCTL(reg_idx), rxdctl);
  1488. /* the hardware may take up to 100us to really disable the Rx queue */
  1489. do {
  1490. udelay(10);
  1491. rxdctl = IXGBE_READ_REG(hw, IXGBE_VFRXDCTL(reg_idx));
  1492. } while (--wait_loop && (rxdctl & IXGBE_RXDCTL_ENABLE));
  1493. if (!wait_loop)
  1494. pr_err("RXDCTL.ENABLE queue %d not cleared while polling\n",
  1495. reg_idx);
  1496. }
  1497. static void ixgbevf_rx_desc_queue_enable(struct ixgbevf_adapter *adapter,
  1498. struct ixgbevf_ring *ring)
  1499. {
  1500. struct ixgbe_hw *hw = &adapter->hw;
  1501. int wait_loop = IXGBEVF_MAX_RX_DESC_POLL;
  1502. u32 rxdctl;
  1503. u8 reg_idx = ring->reg_idx;
  1504. if (IXGBE_REMOVED(hw->hw_addr))
  1505. return;
  1506. do {
  1507. usleep_range(1000, 2000);
  1508. rxdctl = IXGBE_READ_REG(hw, IXGBE_VFRXDCTL(reg_idx));
  1509. } while (--wait_loop && !(rxdctl & IXGBE_RXDCTL_ENABLE));
  1510. if (!wait_loop)
  1511. pr_err("RXDCTL.ENABLE queue %d not set while polling\n",
  1512. reg_idx);
  1513. }
  1514. /**
  1515. * ixgbevf_init_rss_key - Initialize adapter RSS key
  1516. * @adapter: device handle
  1517. *
  1518. * Allocates and initializes the RSS key if it is not allocated.
  1519. **/
  1520. static inline int ixgbevf_init_rss_key(struct ixgbevf_adapter *adapter)
  1521. {
  1522. u32 *rss_key;
  1523. if (!adapter->rss_key) {
  1524. rss_key = kzalloc(IXGBEVF_RSS_HASH_KEY_SIZE, GFP_KERNEL);
  1525. if (unlikely(!rss_key))
  1526. return -ENOMEM;
  1527. netdev_rss_key_fill(rss_key, IXGBEVF_RSS_HASH_KEY_SIZE);
  1528. adapter->rss_key = rss_key;
  1529. }
  1530. return 0;
  1531. }
  1532. static void ixgbevf_setup_vfmrqc(struct ixgbevf_adapter *adapter)
  1533. {
  1534. struct ixgbe_hw *hw = &adapter->hw;
  1535. u32 vfmrqc = 0, vfreta = 0;
  1536. u16 rss_i = adapter->num_rx_queues;
  1537. u8 i, j;
  1538. /* Fill out hash function seeds */
  1539. for (i = 0; i < IXGBEVF_VFRSSRK_REGS; i++)
  1540. IXGBE_WRITE_REG(hw, IXGBE_VFRSSRK(i), *(adapter->rss_key + i));
  1541. for (i = 0, j = 0; i < IXGBEVF_X550_VFRETA_SIZE; i++, j++) {
  1542. if (j == rss_i)
  1543. j = 0;
  1544. adapter->rss_indir_tbl[i] = j;
  1545. vfreta |= j << (i & 0x3) * 8;
  1546. if ((i & 3) == 3) {
  1547. IXGBE_WRITE_REG(hw, IXGBE_VFRETA(i >> 2), vfreta);
  1548. vfreta = 0;
  1549. }
  1550. }
  1551. /* Perform hash on these packet types */
  1552. vfmrqc |= IXGBE_VFMRQC_RSS_FIELD_IPV4 |
  1553. IXGBE_VFMRQC_RSS_FIELD_IPV4_TCP |
  1554. IXGBE_VFMRQC_RSS_FIELD_IPV6 |
  1555. IXGBE_VFMRQC_RSS_FIELD_IPV6_TCP;
  1556. vfmrqc |= IXGBE_VFMRQC_RSSEN;
  1557. IXGBE_WRITE_REG(hw, IXGBE_VFMRQC, vfmrqc);
  1558. }
  1559. static void ixgbevf_configure_rx_ring(struct ixgbevf_adapter *adapter,
  1560. struct ixgbevf_ring *ring)
  1561. {
  1562. struct ixgbe_hw *hw = &adapter->hw;
  1563. union ixgbe_adv_rx_desc *rx_desc;
  1564. u64 rdba = ring->dma;
  1565. u32 rxdctl;
  1566. u8 reg_idx = ring->reg_idx;
  1567. /* disable queue to avoid issues while updating state */
  1568. rxdctl = IXGBE_READ_REG(hw, IXGBE_VFRXDCTL(reg_idx));
  1569. ixgbevf_disable_rx_queue(adapter, ring);
  1570. IXGBE_WRITE_REG(hw, IXGBE_VFRDBAL(reg_idx), rdba & DMA_BIT_MASK(32));
  1571. IXGBE_WRITE_REG(hw, IXGBE_VFRDBAH(reg_idx), rdba >> 32);
  1572. IXGBE_WRITE_REG(hw, IXGBE_VFRDLEN(reg_idx),
  1573. ring->count * sizeof(union ixgbe_adv_rx_desc));
  1574. #ifndef CONFIG_SPARC
  1575. /* enable relaxed ordering */
  1576. IXGBE_WRITE_REG(hw, IXGBE_VFDCA_RXCTRL(reg_idx),
  1577. IXGBE_DCA_RXCTRL_DESC_RRO_EN);
  1578. #else
  1579. IXGBE_WRITE_REG(hw, IXGBE_VFDCA_RXCTRL(reg_idx),
  1580. IXGBE_DCA_RXCTRL_DESC_RRO_EN |
  1581. IXGBE_DCA_RXCTRL_DATA_WRO_EN);
  1582. #endif
  1583. /* reset head and tail pointers */
  1584. IXGBE_WRITE_REG(hw, IXGBE_VFRDH(reg_idx), 0);
  1585. IXGBE_WRITE_REG(hw, IXGBE_VFRDT(reg_idx), 0);
  1586. ring->tail = adapter->io_addr + IXGBE_VFRDT(reg_idx);
  1587. /* initialize rx_buffer_info */
  1588. memset(ring->rx_buffer_info, 0,
  1589. sizeof(struct ixgbevf_rx_buffer) * ring->count);
  1590. /* initialize Rx descriptor 0 */
  1591. rx_desc = IXGBEVF_RX_DESC(ring, 0);
  1592. rx_desc->wb.upper.length = 0;
  1593. /* reset ntu and ntc to place SW in sync with hardwdare */
  1594. ring->next_to_clean = 0;
  1595. ring->next_to_use = 0;
  1596. ring->next_to_alloc = 0;
  1597. ixgbevf_configure_srrctl(adapter, ring, reg_idx);
  1598. /* RXDCTL.RLPML does not work on 82599 */
  1599. if (adapter->hw.mac.type != ixgbe_mac_82599_vf) {
  1600. rxdctl &= ~(IXGBE_RXDCTL_RLPMLMASK |
  1601. IXGBE_RXDCTL_RLPML_EN);
  1602. #if (PAGE_SIZE < 8192)
  1603. /* Limit the maximum frame size so we don't overrun the skb */
  1604. if (ring_uses_build_skb(ring) &&
  1605. !ring_uses_large_buffer(ring))
  1606. rxdctl |= IXGBEVF_MAX_FRAME_BUILD_SKB |
  1607. IXGBE_RXDCTL_RLPML_EN;
  1608. #endif
  1609. }
  1610. rxdctl |= IXGBE_RXDCTL_ENABLE | IXGBE_RXDCTL_VME;
  1611. IXGBE_WRITE_REG(hw, IXGBE_VFRXDCTL(reg_idx), rxdctl);
  1612. ixgbevf_rx_desc_queue_enable(adapter, ring);
  1613. ixgbevf_alloc_rx_buffers(ring, ixgbevf_desc_unused(ring));
  1614. }
  1615. static void ixgbevf_set_rx_buffer_len(struct ixgbevf_adapter *adapter,
  1616. struct ixgbevf_ring *rx_ring)
  1617. {
  1618. struct net_device *netdev = adapter->netdev;
  1619. unsigned int max_frame = netdev->mtu + ETH_HLEN + ETH_FCS_LEN;
  1620. /* set build_skb and buffer size flags */
  1621. clear_ring_build_skb_enabled(rx_ring);
  1622. clear_ring_uses_large_buffer(rx_ring);
  1623. if (adapter->flags & IXGBEVF_FLAGS_LEGACY_RX)
  1624. return;
  1625. set_ring_build_skb_enabled(rx_ring);
  1626. if (PAGE_SIZE < 8192) {
  1627. if (max_frame <= IXGBEVF_MAX_FRAME_BUILD_SKB)
  1628. return;
  1629. set_ring_uses_large_buffer(rx_ring);
  1630. }
  1631. }
  1632. /**
  1633. * ixgbevf_configure_rx - Configure 82599 VF Receive Unit after Reset
  1634. * @adapter: board private structure
  1635. *
  1636. * Configure the Rx unit of the MAC after a reset.
  1637. **/
  1638. static void ixgbevf_configure_rx(struct ixgbevf_adapter *adapter)
  1639. {
  1640. struct ixgbe_hw *hw = &adapter->hw;
  1641. struct net_device *netdev = adapter->netdev;
  1642. int i, ret;
  1643. ixgbevf_setup_psrtype(adapter);
  1644. if (hw->mac.type >= ixgbe_mac_X550_vf)
  1645. ixgbevf_setup_vfmrqc(adapter);
  1646. spin_lock_bh(&adapter->mbx_lock);
  1647. /* notify the PF of our intent to use this size of frame */
  1648. ret = hw->mac.ops.set_rlpml(hw, netdev->mtu + ETH_HLEN + ETH_FCS_LEN);
  1649. spin_unlock_bh(&adapter->mbx_lock);
  1650. if (ret)
  1651. dev_err(&adapter->pdev->dev,
  1652. "Failed to set MTU at %d\n", netdev->mtu);
  1653. /* Setup the HW Rx Head and Tail Descriptor Pointers and
  1654. * the Base and Length of the Rx Descriptor Ring
  1655. */
  1656. for (i = 0; i < adapter->num_rx_queues; i++) {
  1657. struct ixgbevf_ring *rx_ring = adapter->rx_ring[i];
  1658. ixgbevf_set_rx_buffer_len(adapter, rx_ring);
  1659. ixgbevf_configure_rx_ring(adapter, rx_ring);
  1660. }
  1661. }
  1662. static int ixgbevf_vlan_rx_add_vid(struct net_device *netdev,
  1663. __be16 proto, u16 vid)
  1664. {
  1665. struct ixgbevf_adapter *adapter = netdev_priv(netdev);
  1666. struct ixgbe_hw *hw = &adapter->hw;
  1667. int err;
  1668. spin_lock_bh(&adapter->mbx_lock);
  1669. /* add VID to filter table */
  1670. err = hw->mac.ops.set_vfta(hw, vid, 0, true);
  1671. spin_unlock_bh(&adapter->mbx_lock);
  1672. /* translate error return types so error makes sense */
  1673. if (err == IXGBE_ERR_MBX)
  1674. return -EIO;
  1675. if (err == IXGBE_ERR_INVALID_ARGUMENT)
  1676. return -EACCES;
  1677. set_bit(vid, adapter->active_vlans);
  1678. return err;
  1679. }
  1680. static int ixgbevf_vlan_rx_kill_vid(struct net_device *netdev,
  1681. __be16 proto, u16 vid)
  1682. {
  1683. struct ixgbevf_adapter *adapter = netdev_priv(netdev);
  1684. struct ixgbe_hw *hw = &adapter->hw;
  1685. int err;
  1686. spin_lock_bh(&adapter->mbx_lock);
  1687. /* remove VID from filter table */
  1688. err = hw->mac.ops.set_vfta(hw, vid, 0, false);
  1689. spin_unlock_bh(&adapter->mbx_lock);
  1690. clear_bit(vid, adapter->active_vlans);
  1691. return err;
  1692. }
  1693. static void ixgbevf_restore_vlan(struct ixgbevf_adapter *adapter)
  1694. {
  1695. u16 vid;
  1696. for_each_set_bit(vid, adapter->active_vlans, VLAN_N_VID)
  1697. ixgbevf_vlan_rx_add_vid(adapter->netdev,
  1698. htons(ETH_P_8021Q), vid);
  1699. }
  1700. static int ixgbevf_write_uc_addr_list(struct net_device *netdev)
  1701. {
  1702. struct ixgbevf_adapter *adapter = netdev_priv(netdev);
  1703. struct ixgbe_hw *hw = &adapter->hw;
  1704. int count = 0;
  1705. if ((netdev_uc_count(netdev)) > 10) {
  1706. pr_err("Too many unicast filters - No Space\n");
  1707. return -ENOSPC;
  1708. }
  1709. if (!netdev_uc_empty(netdev)) {
  1710. struct netdev_hw_addr *ha;
  1711. netdev_for_each_uc_addr(ha, netdev) {
  1712. hw->mac.ops.set_uc_addr(hw, ++count, ha->addr);
  1713. udelay(200);
  1714. }
  1715. } else {
  1716. /* If the list is empty then send message to PF driver to
  1717. * clear all MAC VLANs on this VF.
  1718. */
  1719. hw->mac.ops.set_uc_addr(hw, 0, NULL);
  1720. }
  1721. return count;
  1722. }
  1723. /**
  1724. * ixgbevf_set_rx_mode - Multicast and unicast set
  1725. * @netdev: network interface device structure
  1726. *
  1727. * The set_rx_method entry point is called whenever the multicast address
  1728. * list, unicast address list or the network interface flags are updated.
  1729. * This routine is responsible for configuring the hardware for proper
  1730. * multicast mode and configuring requested unicast filters.
  1731. **/
  1732. static void ixgbevf_set_rx_mode(struct net_device *netdev)
  1733. {
  1734. struct ixgbevf_adapter *adapter = netdev_priv(netdev);
  1735. struct ixgbe_hw *hw = &adapter->hw;
  1736. unsigned int flags = netdev->flags;
  1737. int xcast_mode;
  1738. /* request the most inclusive mode we need */
  1739. if (flags & IFF_PROMISC)
  1740. xcast_mode = IXGBEVF_XCAST_MODE_PROMISC;
  1741. else if (flags & IFF_ALLMULTI)
  1742. xcast_mode = IXGBEVF_XCAST_MODE_ALLMULTI;
  1743. else if (flags & (IFF_BROADCAST | IFF_MULTICAST))
  1744. xcast_mode = IXGBEVF_XCAST_MODE_MULTI;
  1745. else
  1746. xcast_mode = IXGBEVF_XCAST_MODE_NONE;
  1747. spin_lock_bh(&adapter->mbx_lock);
  1748. hw->mac.ops.update_xcast_mode(hw, xcast_mode);
  1749. /* reprogram multicast list */
  1750. hw->mac.ops.update_mc_addr_list(hw, netdev);
  1751. ixgbevf_write_uc_addr_list(netdev);
  1752. spin_unlock_bh(&adapter->mbx_lock);
  1753. }
  1754. static void ixgbevf_napi_enable_all(struct ixgbevf_adapter *adapter)
  1755. {
  1756. int q_idx;
  1757. struct ixgbevf_q_vector *q_vector;
  1758. int q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
  1759. for (q_idx = 0; q_idx < q_vectors; q_idx++) {
  1760. q_vector = adapter->q_vector[q_idx];
  1761. napi_enable(&q_vector->napi);
  1762. }
  1763. }
  1764. static void ixgbevf_napi_disable_all(struct ixgbevf_adapter *adapter)
  1765. {
  1766. int q_idx;
  1767. struct ixgbevf_q_vector *q_vector;
  1768. int q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
  1769. for (q_idx = 0; q_idx < q_vectors; q_idx++) {
  1770. q_vector = adapter->q_vector[q_idx];
  1771. napi_disable(&q_vector->napi);
  1772. }
  1773. }
  1774. static int ixgbevf_configure_dcb(struct ixgbevf_adapter *adapter)
  1775. {
  1776. struct ixgbe_hw *hw = &adapter->hw;
  1777. unsigned int def_q = 0;
  1778. unsigned int num_tcs = 0;
  1779. unsigned int num_rx_queues = adapter->num_rx_queues;
  1780. unsigned int num_tx_queues = adapter->num_tx_queues;
  1781. int err;
  1782. spin_lock_bh(&adapter->mbx_lock);
  1783. /* fetch queue configuration from the PF */
  1784. err = ixgbevf_get_queues(hw, &num_tcs, &def_q);
  1785. spin_unlock_bh(&adapter->mbx_lock);
  1786. if (err)
  1787. return err;
  1788. if (num_tcs > 1) {
  1789. /* we need only one Tx queue */
  1790. num_tx_queues = 1;
  1791. /* update default Tx ring register index */
  1792. adapter->tx_ring[0]->reg_idx = def_q;
  1793. /* we need as many queues as traffic classes */
  1794. num_rx_queues = num_tcs;
  1795. }
  1796. /* if we have a bad config abort request queue reset */
  1797. if ((adapter->num_rx_queues != num_rx_queues) ||
  1798. (adapter->num_tx_queues != num_tx_queues)) {
  1799. /* force mailbox timeout to prevent further messages */
  1800. hw->mbx.timeout = 0;
  1801. /* wait for watchdog to come around and bail us out */
  1802. set_bit(__IXGBEVF_QUEUE_RESET_REQUESTED, &adapter->state);
  1803. }
  1804. return 0;
  1805. }
  1806. static void ixgbevf_configure(struct ixgbevf_adapter *adapter)
  1807. {
  1808. ixgbevf_configure_dcb(adapter);
  1809. ixgbevf_set_rx_mode(adapter->netdev);
  1810. ixgbevf_restore_vlan(adapter);
  1811. ixgbevf_configure_tx(adapter);
  1812. ixgbevf_configure_rx(adapter);
  1813. }
  1814. static void ixgbevf_save_reset_stats(struct ixgbevf_adapter *adapter)
  1815. {
  1816. /* Only save pre-reset stats if there are some */
  1817. if (adapter->stats.vfgprc || adapter->stats.vfgptc) {
  1818. adapter->stats.saved_reset_vfgprc += adapter->stats.vfgprc -
  1819. adapter->stats.base_vfgprc;
  1820. adapter->stats.saved_reset_vfgptc += adapter->stats.vfgptc -
  1821. adapter->stats.base_vfgptc;
  1822. adapter->stats.saved_reset_vfgorc += adapter->stats.vfgorc -
  1823. adapter->stats.base_vfgorc;
  1824. adapter->stats.saved_reset_vfgotc += adapter->stats.vfgotc -
  1825. adapter->stats.base_vfgotc;
  1826. adapter->stats.saved_reset_vfmprc += adapter->stats.vfmprc -
  1827. adapter->stats.base_vfmprc;
  1828. }
  1829. }
  1830. static void ixgbevf_init_last_counter_stats(struct ixgbevf_adapter *adapter)
  1831. {
  1832. struct ixgbe_hw *hw = &adapter->hw;
  1833. adapter->stats.last_vfgprc = IXGBE_READ_REG(hw, IXGBE_VFGPRC);
  1834. adapter->stats.last_vfgorc = IXGBE_READ_REG(hw, IXGBE_VFGORC_LSB);
  1835. adapter->stats.last_vfgorc |=
  1836. (((u64)(IXGBE_READ_REG(hw, IXGBE_VFGORC_MSB))) << 32);
  1837. adapter->stats.last_vfgptc = IXGBE_READ_REG(hw, IXGBE_VFGPTC);
  1838. adapter->stats.last_vfgotc = IXGBE_READ_REG(hw, IXGBE_VFGOTC_LSB);
  1839. adapter->stats.last_vfgotc |=
  1840. (((u64)(IXGBE_READ_REG(hw, IXGBE_VFGOTC_MSB))) << 32);
  1841. adapter->stats.last_vfmprc = IXGBE_READ_REG(hw, IXGBE_VFMPRC);
  1842. adapter->stats.base_vfgprc = adapter->stats.last_vfgprc;
  1843. adapter->stats.base_vfgorc = adapter->stats.last_vfgorc;
  1844. adapter->stats.base_vfgptc = adapter->stats.last_vfgptc;
  1845. adapter->stats.base_vfgotc = adapter->stats.last_vfgotc;
  1846. adapter->stats.base_vfmprc = adapter->stats.last_vfmprc;
  1847. }
  1848. static void ixgbevf_negotiate_api(struct ixgbevf_adapter *adapter)
  1849. {
  1850. struct ixgbe_hw *hw = &adapter->hw;
  1851. int api[] = { ixgbe_mbox_api_13,
  1852. ixgbe_mbox_api_12,
  1853. ixgbe_mbox_api_11,
  1854. ixgbe_mbox_api_10,
  1855. ixgbe_mbox_api_unknown };
  1856. int err, idx = 0;
  1857. spin_lock_bh(&adapter->mbx_lock);
  1858. while (api[idx] != ixgbe_mbox_api_unknown) {
  1859. err = hw->mac.ops.negotiate_api_version(hw, api[idx]);
  1860. if (!err)
  1861. break;
  1862. idx++;
  1863. }
  1864. spin_unlock_bh(&adapter->mbx_lock);
  1865. }
  1866. static void ixgbevf_up_complete(struct ixgbevf_adapter *adapter)
  1867. {
  1868. struct net_device *netdev = adapter->netdev;
  1869. struct ixgbe_hw *hw = &adapter->hw;
  1870. ixgbevf_configure_msix(adapter);
  1871. spin_lock_bh(&adapter->mbx_lock);
  1872. if (is_valid_ether_addr(hw->mac.addr))
  1873. hw->mac.ops.set_rar(hw, 0, hw->mac.addr, 0);
  1874. else
  1875. hw->mac.ops.set_rar(hw, 0, hw->mac.perm_addr, 0);
  1876. spin_unlock_bh(&adapter->mbx_lock);
  1877. smp_mb__before_atomic();
  1878. clear_bit(__IXGBEVF_DOWN, &adapter->state);
  1879. ixgbevf_napi_enable_all(adapter);
  1880. /* clear any pending interrupts, may auto mask */
  1881. IXGBE_READ_REG(hw, IXGBE_VTEICR);
  1882. ixgbevf_irq_enable(adapter);
  1883. /* enable transmits */
  1884. netif_tx_start_all_queues(netdev);
  1885. ixgbevf_save_reset_stats(adapter);
  1886. ixgbevf_init_last_counter_stats(adapter);
  1887. hw->mac.get_link_status = 1;
  1888. mod_timer(&adapter->service_timer, jiffies);
  1889. }
  1890. void ixgbevf_up(struct ixgbevf_adapter *adapter)
  1891. {
  1892. ixgbevf_configure(adapter);
  1893. ixgbevf_up_complete(adapter);
  1894. }
  1895. /**
  1896. * ixgbevf_clean_rx_ring - Free Rx Buffers per Queue
  1897. * @rx_ring: ring to free buffers from
  1898. **/
  1899. static void ixgbevf_clean_rx_ring(struct ixgbevf_ring *rx_ring)
  1900. {
  1901. u16 i = rx_ring->next_to_clean;
  1902. /* Free Rx ring sk_buff */
  1903. if (rx_ring->skb) {
  1904. dev_kfree_skb(rx_ring->skb);
  1905. rx_ring->skb = NULL;
  1906. }
  1907. /* Free all the Rx ring pages */
  1908. while (i != rx_ring->next_to_alloc) {
  1909. struct ixgbevf_rx_buffer *rx_buffer;
  1910. rx_buffer = &rx_ring->rx_buffer_info[i];
  1911. /* Invalidate cache lines that may have been written to by
  1912. * device so that we avoid corrupting memory.
  1913. */
  1914. dma_sync_single_range_for_cpu(rx_ring->dev,
  1915. rx_buffer->dma,
  1916. rx_buffer->page_offset,
  1917. ixgbevf_rx_bufsz(rx_ring),
  1918. DMA_FROM_DEVICE);
  1919. /* free resources associated with mapping */
  1920. dma_unmap_page_attrs(rx_ring->dev,
  1921. rx_buffer->dma,
  1922. ixgbevf_rx_pg_size(rx_ring),
  1923. DMA_FROM_DEVICE,
  1924. IXGBEVF_RX_DMA_ATTR);
  1925. __page_frag_cache_drain(rx_buffer->page,
  1926. rx_buffer->pagecnt_bias);
  1927. i++;
  1928. if (i == rx_ring->count)
  1929. i = 0;
  1930. }
  1931. rx_ring->next_to_alloc = 0;
  1932. rx_ring->next_to_clean = 0;
  1933. rx_ring->next_to_use = 0;
  1934. }
  1935. /**
  1936. * ixgbevf_clean_tx_ring - Free Tx Buffers
  1937. * @tx_ring: ring to be cleaned
  1938. **/
  1939. static void ixgbevf_clean_tx_ring(struct ixgbevf_ring *tx_ring)
  1940. {
  1941. u16 i = tx_ring->next_to_clean;
  1942. struct ixgbevf_tx_buffer *tx_buffer = &tx_ring->tx_buffer_info[i];
  1943. while (i != tx_ring->next_to_use) {
  1944. union ixgbe_adv_tx_desc *eop_desc, *tx_desc;
  1945. /* Free all the Tx ring sk_buffs */
  1946. if (ring_is_xdp(tx_ring))
  1947. page_frag_free(tx_buffer->data);
  1948. else
  1949. dev_kfree_skb_any(tx_buffer->skb);
  1950. /* unmap skb header data */
  1951. dma_unmap_single(tx_ring->dev,
  1952. dma_unmap_addr(tx_buffer, dma),
  1953. dma_unmap_len(tx_buffer, len),
  1954. DMA_TO_DEVICE);
  1955. /* check for eop_desc to determine the end of the packet */
  1956. eop_desc = tx_buffer->next_to_watch;
  1957. tx_desc = IXGBEVF_TX_DESC(tx_ring, i);
  1958. /* unmap remaining buffers */
  1959. while (tx_desc != eop_desc) {
  1960. tx_buffer++;
  1961. tx_desc++;
  1962. i++;
  1963. if (unlikely(i == tx_ring->count)) {
  1964. i = 0;
  1965. tx_buffer = tx_ring->tx_buffer_info;
  1966. tx_desc = IXGBEVF_TX_DESC(tx_ring, 0);
  1967. }
  1968. /* unmap any remaining paged data */
  1969. if (dma_unmap_len(tx_buffer, len))
  1970. dma_unmap_page(tx_ring->dev,
  1971. dma_unmap_addr(tx_buffer, dma),
  1972. dma_unmap_len(tx_buffer, len),
  1973. DMA_TO_DEVICE);
  1974. }
  1975. /* move us one more past the eop_desc for start of next pkt */
  1976. tx_buffer++;
  1977. i++;
  1978. if (unlikely(i == tx_ring->count)) {
  1979. i = 0;
  1980. tx_buffer = tx_ring->tx_buffer_info;
  1981. }
  1982. }
  1983. /* reset next_to_use and next_to_clean */
  1984. tx_ring->next_to_use = 0;
  1985. tx_ring->next_to_clean = 0;
  1986. }
  1987. /**
  1988. * ixgbevf_clean_all_rx_rings - Free Rx Buffers for all queues
  1989. * @adapter: board private structure
  1990. **/
  1991. static void ixgbevf_clean_all_rx_rings(struct ixgbevf_adapter *adapter)
  1992. {
  1993. int i;
  1994. for (i = 0; i < adapter->num_rx_queues; i++)
  1995. ixgbevf_clean_rx_ring(adapter->rx_ring[i]);
  1996. }
  1997. /**
  1998. * ixgbevf_clean_all_tx_rings - Free Tx Buffers for all queues
  1999. * @adapter: board private structure
  2000. **/
  2001. static void ixgbevf_clean_all_tx_rings(struct ixgbevf_adapter *adapter)
  2002. {
  2003. int i;
  2004. for (i = 0; i < adapter->num_tx_queues; i++)
  2005. ixgbevf_clean_tx_ring(adapter->tx_ring[i]);
  2006. for (i = 0; i < adapter->num_xdp_queues; i++)
  2007. ixgbevf_clean_tx_ring(adapter->xdp_ring[i]);
  2008. }
  2009. void ixgbevf_down(struct ixgbevf_adapter *adapter)
  2010. {
  2011. struct net_device *netdev = adapter->netdev;
  2012. struct ixgbe_hw *hw = &adapter->hw;
  2013. int i;
  2014. /* signal that we are down to the interrupt handler */
  2015. if (test_and_set_bit(__IXGBEVF_DOWN, &adapter->state))
  2016. return; /* do nothing if already down */
  2017. /* disable all enabled Rx queues */
  2018. for (i = 0; i < adapter->num_rx_queues; i++)
  2019. ixgbevf_disable_rx_queue(adapter, adapter->rx_ring[i]);
  2020. usleep_range(10000, 20000);
  2021. netif_tx_stop_all_queues(netdev);
  2022. /* call carrier off first to avoid false dev_watchdog timeouts */
  2023. netif_carrier_off(netdev);
  2024. netif_tx_disable(netdev);
  2025. ixgbevf_irq_disable(adapter);
  2026. ixgbevf_napi_disable_all(adapter);
  2027. del_timer_sync(&adapter->service_timer);
  2028. /* disable transmits in the hardware now that interrupts are off */
  2029. for (i = 0; i < adapter->num_tx_queues; i++) {
  2030. u8 reg_idx = adapter->tx_ring[i]->reg_idx;
  2031. IXGBE_WRITE_REG(hw, IXGBE_VFTXDCTL(reg_idx),
  2032. IXGBE_TXDCTL_SWFLSH);
  2033. }
  2034. for (i = 0; i < adapter->num_xdp_queues; i++) {
  2035. u8 reg_idx = adapter->xdp_ring[i]->reg_idx;
  2036. IXGBE_WRITE_REG(hw, IXGBE_VFTXDCTL(reg_idx),
  2037. IXGBE_TXDCTL_SWFLSH);
  2038. }
  2039. if (!pci_channel_offline(adapter->pdev))
  2040. ixgbevf_reset(adapter);
  2041. ixgbevf_clean_all_tx_rings(adapter);
  2042. ixgbevf_clean_all_rx_rings(adapter);
  2043. }
  2044. void ixgbevf_reinit_locked(struct ixgbevf_adapter *adapter)
  2045. {
  2046. WARN_ON(in_interrupt());
  2047. while (test_and_set_bit(__IXGBEVF_RESETTING, &adapter->state))
  2048. msleep(1);
  2049. ixgbevf_down(adapter);
  2050. ixgbevf_up(adapter);
  2051. clear_bit(__IXGBEVF_RESETTING, &adapter->state);
  2052. }
  2053. void ixgbevf_reset(struct ixgbevf_adapter *adapter)
  2054. {
  2055. struct ixgbe_hw *hw = &adapter->hw;
  2056. struct net_device *netdev = adapter->netdev;
  2057. if (hw->mac.ops.reset_hw(hw)) {
  2058. hw_dbg(hw, "PF still resetting\n");
  2059. } else {
  2060. hw->mac.ops.init_hw(hw);
  2061. ixgbevf_negotiate_api(adapter);
  2062. }
  2063. if (is_valid_ether_addr(adapter->hw.mac.addr)) {
  2064. ether_addr_copy(netdev->dev_addr, adapter->hw.mac.addr);
  2065. ether_addr_copy(netdev->perm_addr, adapter->hw.mac.addr);
  2066. }
  2067. adapter->last_reset = jiffies;
  2068. }
  2069. static int ixgbevf_acquire_msix_vectors(struct ixgbevf_adapter *adapter,
  2070. int vectors)
  2071. {
  2072. int vector_threshold;
  2073. /* We'll want at least 2 (vector_threshold):
  2074. * 1) TxQ[0] + RxQ[0] handler
  2075. * 2) Other (Link Status Change, etc.)
  2076. */
  2077. vector_threshold = MIN_MSIX_COUNT;
  2078. /* The more we get, the more we will assign to Tx/Rx Cleanup
  2079. * for the separate queues...where Rx Cleanup >= Tx Cleanup.
  2080. * Right now, we simply care about how many we'll get; we'll
  2081. * set them up later while requesting irq's.
  2082. */
  2083. vectors = pci_enable_msix_range(adapter->pdev, adapter->msix_entries,
  2084. vector_threshold, vectors);
  2085. if (vectors < 0) {
  2086. dev_err(&adapter->pdev->dev,
  2087. "Unable to allocate MSI-X interrupts\n");
  2088. kfree(adapter->msix_entries);
  2089. adapter->msix_entries = NULL;
  2090. return vectors;
  2091. }
  2092. /* Adjust for only the vectors we'll use, which is minimum
  2093. * of max_msix_q_vectors + NON_Q_VECTORS, or the number of
  2094. * vectors we were allocated.
  2095. */
  2096. adapter->num_msix_vectors = vectors;
  2097. return 0;
  2098. }
  2099. /**
  2100. * ixgbevf_set_num_queues - Allocate queues for device, feature dependent
  2101. * @adapter: board private structure to initialize
  2102. *
  2103. * This is the top level queue allocation routine. The order here is very
  2104. * important, starting with the "most" number of features turned on at once,
  2105. * and ending with the smallest set of features. This way large combinations
  2106. * can be allocated if they're turned on, and smaller combinations are the
  2107. * fallthrough conditions.
  2108. *
  2109. **/
  2110. static void ixgbevf_set_num_queues(struct ixgbevf_adapter *adapter)
  2111. {
  2112. struct ixgbe_hw *hw = &adapter->hw;
  2113. unsigned int def_q = 0;
  2114. unsigned int num_tcs = 0;
  2115. int err;
  2116. /* Start with base case */
  2117. adapter->num_rx_queues = 1;
  2118. adapter->num_tx_queues = 1;
  2119. adapter->num_xdp_queues = 0;
  2120. spin_lock_bh(&adapter->mbx_lock);
  2121. /* fetch queue configuration from the PF */
  2122. err = ixgbevf_get_queues(hw, &num_tcs, &def_q);
  2123. spin_unlock_bh(&adapter->mbx_lock);
  2124. if (err)
  2125. return;
  2126. /* we need as many queues as traffic classes */
  2127. if (num_tcs > 1) {
  2128. adapter->num_rx_queues = num_tcs;
  2129. } else {
  2130. u16 rss = min_t(u16, num_online_cpus(), IXGBEVF_MAX_RSS_QUEUES);
  2131. switch (hw->api_version) {
  2132. case ixgbe_mbox_api_11:
  2133. case ixgbe_mbox_api_12:
  2134. case ixgbe_mbox_api_13:
  2135. if (adapter->xdp_prog &&
  2136. hw->mac.max_tx_queues == rss)
  2137. rss = rss > 3 ? 2 : 1;
  2138. adapter->num_rx_queues = rss;
  2139. adapter->num_tx_queues = rss;
  2140. adapter->num_xdp_queues = adapter->xdp_prog ? rss : 0;
  2141. default:
  2142. break;
  2143. }
  2144. }
  2145. }
  2146. /**
  2147. * ixgbevf_set_interrupt_capability - set MSI-X or FAIL if not supported
  2148. * @adapter: board private structure to initialize
  2149. *
  2150. * Attempt to configure the interrupts using the best available
  2151. * capabilities of the hardware and the kernel.
  2152. **/
  2153. static int ixgbevf_set_interrupt_capability(struct ixgbevf_adapter *adapter)
  2154. {
  2155. int vector, v_budget;
  2156. /* It's easy to be greedy for MSI-X vectors, but it really
  2157. * doesn't do us much good if we have a lot more vectors
  2158. * than CPU's. So let's be conservative and only ask for
  2159. * (roughly) the same number of vectors as there are CPU's.
  2160. * The default is to use pairs of vectors.
  2161. */
  2162. v_budget = max(adapter->num_rx_queues, adapter->num_tx_queues);
  2163. v_budget = min_t(int, v_budget, num_online_cpus());
  2164. v_budget += NON_Q_VECTORS;
  2165. adapter->msix_entries = kcalloc(v_budget,
  2166. sizeof(struct msix_entry), GFP_KERNEL);
  2167. if (!adapter->msix_entries)
  2168. return -ENOMEM;
  2169. for (vector = 0; vector < v_budget; vector++)
  2170. adapter->msix_entries[vector].entry = vector;
  2171. /* A failure in MSI-X entry allocation isn't fatal, but the VF driver
  2172. * does not support any other modes, so we will simply fail here. Note
  2173. * that we clean up the msix_entries pointer else-where.
  2174. */
  2175. return ixgbevf_acquire_msix_vectors(adapter, v_budget);
  2176. }
  2177. static void ixgbevf_add_ring(struct ixgbevf_ring *ring,
  2178. struct ixgbevf_ring_container *head)
  2179. {
  2180. ring->next = head->ring;
  2181. head->ring = ring;
  2182. head->count++;
  2183. }
  2184. /**
  2185. * ixgbevf_alloc_q_vector - Allocate memory for a single interrupt vector
  2186. * @adapter: board private structure to initialize
  2187. * @v_idx: index of vector in adapter struct
  2188. * @txr_count: number of Tx rings for q vector
  2189. * @txr_idx: index of first Tx ring to assign
  2190. * @xdp_count: total number of XDP rings to allocate
  2191. * @xdp_idx: index of first XDP ring to allocate
  2192. * @rxr_count: number of Rx rings for q vector
  2193. * @rxr_idx: index of first Rx ring to assign
  2194. *
  2195. * We allocate one q_vector. If allocation fails we return -ENOMEM.
  2196. **/
  2197. static int ixgbevf_alloc_q_vector(struct ixgbevf_adapter *adapter, int v_idx,
  2198. int txr_count, int txr_idx,
  2199. int xdp_count, int xdp_idx,
  2200. int rxr_count, int rxr_idx)
  2201. {
  2202. struct ixgbevf_q_vector *q_vector;
  2203. int reg_idx = txr_idx + xdp_idx;
  2204. struct ixgbevf_ring *ring;
  2205. int ring_count, size;
  2206. ring_count = txr_count + xdp_count + rxr_count;
  2207. size = sizeof(*q_vector) + (sizeof(*ring) * ring_count);
  2208. /* allocate q_vector and rings */
  2209. q_vector = kzalloc(size, GFP_KERNEL);
  2210. if (!q_vector)
  2211. return -ENOMEM;
  2212. /* initialize NAPI */
  2213. netif_napi_add(adapter->netdev, &q_vector->napi, ixgbevf_poll, 64);
  2214. /* tie q_vector and adapter together */
  2215. adapter->q_vector[v_idx] = q_vector;
  2216. q_vector->adapter = adapter;
  2217. q_vector->v_idx = v_idx;
  2218. /* initialize pointer to rings */
  2219. ring = q_vector->ring;
  2220. while (txr_count) {
  2221. /* assign generic ring traits */
  2222. ring->dev = &adapter->pdev->dev;
  2223. ring->netdev = adapter->netdev;
  2224. /* configure backlink on ring */
  2225. ring->q_vector = q_vector;
  2226. /* update q_vector Tx values */
  2227. ixgbevf_add_ring(ring, &q_vector->tx);
  2228. /* apply Tx specific ring traits */
  2229. ring->count = adapter->tx_ring_count;
  2230. ring->queue_index = txr_idx;
  2231. ring->reg_idx = reg_idx;
  2232. /* assign ring to adapter */
  2233. adapter->tx_ring[txr_idx] = ring;
  2234. /* update count and index */
  2235. txr_count--;
  2236. txr_idx++;
  2237. reg_idx++;
  2238. /* push pointer to next ring */
  2239. ring++;
  2240. }
  2241. while (xdp_count) {
  2242. /* assign generic ring traits */
  2243. ring->dev = &adapter->pdev->dev;
  2244. ring->netdev = adapter->netdev;
  2245. /* configure backlink on ring */
  2246. ring->q_vector = q_vector;
  2247. /* update q_vector Tx values */
  2248. ixgbevf_add_ring(ring, &q_vector->tx);
  2249. /* apply Tx specific ring traits */
  2250. ring->count = adapter->tx_ring_count;
  2251. ring->queue_index = xdp_idx;
  2252. ring->reg_idx = reg_idx;
  2253. set_ring_xdp(ring);
  2254. /* assign ring to adapter */
  2255. adapter->xdp_ring[xdp_idx] = ring;
  2256. /* update count and index */
  2257. xdp_count--;
  2258. xdp_idx++;
  2259. reg_idx++;
  2260. /* push pointer to next ring */
  2261. ring++;
  2262. }
  2263. while (rxr_count) {
  2264. /* assign generic ring traits */
  2265. ring->dev = &adapter->pdev->dev;
  2266. ring->netdev = adapter->netdev;
  2267. /* configure backlink on ring */
  2268. ring->q_vector = q_vector;
  2269. /* update q_vector Rx values */
  2270. ixgbevf_add_ring(ring, &q_vector->rx);
  2271. /* apply Rx specific ring traits */
  2272. ring->count = adapter->rx_ring_count;
  2273. ring->queue_index = rxr_idx;
  2274. ring->reg_idx = rxr_idx;
  2275. /* assign ring to adapter */
  2276. adapter->rx_ring[rxr_idx] = ring;
  2277. /* update count and index */
  2278. rxr_count--;
  2279. rxr_idx++;
  2280. /* push pointer to next ring */
  2281. ring++;
  2282. }
  2283. return 0;
  2284. }
  2285. /**
  2286. * ixgbevf_free_q_vector - Free memory allocated for specific interrupt vector
  2287. * @adapter: board private structure to initialize
  2288. * @v_idx: index of vector in adapter struct
  2289. *
  2290. * This function frees the memory allocated to the q_vector. In addition if
  2291. * NAPI is enabled it will delete any references to the NAPI struct prior
  2292. * to freeing the q_vector.
  2293. **/
  2294. static void ixgbevf_free_q_vector(struct ixgbevf_adapter *adapter, int v_idx)
  2295. {
  2296. struct ixgbevf_q_vector *q_vector = adapter->q_vector[v_idx];
  2297. struct ixgbevf_ring *ring;
  2298. ixgbevf_for_each_ring(ring, q_vector->tx) {
  2299. if (ring_is_xdp(ring))
  2300. adapter->xdp_ring[ring->queue_index] = NULL;
  2301. else
  2302. adapter->tx_ring[ring->queue_index] = NULL;
  2303. }
  2304. ixgbevf_for_each_ring(ring, q_vector->rx)
  2305. adapter->rx_ring[ring->queue_index] = NULL;
  2306. adapter->q_vector[v_idx] = NULL;
  2307. netif_napi_del(&q_vector->napi);
  2308. /* ixgbevf_get_stats() might access the rings on this vector,
  2309. * we must wait a grace period before freeing it.
  2310. */
  2311. kfree_rcu(q_vector, rcu);
  2312. }
  2313. /**
  2314. * ixgbevf_alloc_q_vectors - Allocate memory for interrupt vectors
  2315. * @adapter: board private structure to initialize
  2316. *
  2317. * We allocate one q_vector per queue interrupt. If allocation fails we
  2318. * return -ENOMEM.
  2319. **/
  2320. static int ixgbevf_alloc_q_vectors(struct ixgbevf_adapter *adapter)
  2321. {
  2322. int q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
  2323. int rxr_remaining = adapter->num_rx_queues;
  2324. int txr_remaining = adapter->num_tx_queues;
  2325. int xdp_remaining = adapter->num_xdp_queues;
  2326. int rxr_idx = 0, txr_idx = 0, xdp_idx = 0, v_idx = 0;
  2327. int err;
  2328. if (q_vectors >= (rxr_remaining + txr_remaining + xdp_remaining)) {
  2329. for (; rxr_remaining; v_idx++, q_vectors--) {
  2330. int rqpv = DIV_ROUND_UP(rxr_remaining, q_vectors);
  2331. err = ixgbevf_alloc_q_vector(adapter, v_idx,
  2332. 0, 0, 0, 0, rqpv, rxr_idx);
  2333. if (err)
  2334. goto err_out;
  2335. /* update counts and index */
  2336. rxr_remaining -= rqpv;
  2337. rxr_idx += rqpv;
  2338. }
  2339. }
  2340. for (; q_vectors; v_idx++, q_vectors--) {
  2341. int rqpv = DIV_ROUND_UP(rxr_remaining, q_vectors);
  2342. int tqpv = DIV_ROUND_UP(txr_remaining, q_vectors);
  2343. int xqpv = DIV_ROUND_UP(xdp_remaining, q_vectors);
  2344. err = ixgbevf_alloc_q_vector(adapter, v_idx,
  2345. tqpv, txr_idx,
  2346. xqpv, xdp_idx,
  2347. rqpv, rxr_idx);
  2348. if (err)
  2349. goto err_out;
  2350. /* update counts and index */
  2351. rxr_remaining -= rqpv;
  2352. rxr_idx += rqpv;
  2353. txr_remaining -= tqpv;
  2354. txr_idx += tqpv;
  2355. xdp_remaining -= xqpv;
  2356. xdp_idx += xqpv;
  2357. }
  2358. return 0;
  2359. err_out:
  2360. while (v_idx) {
  2361. v_idx--;
  2362. ixgbevf_free_q_vector(adapter, v_idx);
  2363. }
  2364. return -ENOMEM;
  2365. }
  2366. /**
  2367. * ixgbevf_free_q_vectors - Free memory allocated for interrupt vectors
  2368. * @adapter: board private structure to initialize
  2369. *
  2370. * This function frees the memory allocated to the q_vectors. In addition if
  2371. * NAPI is enabled it will delete any references to the NAPI struct prior
  2372. * to freeing the q_vector.
  2373. **/
  2374. static void ixgbevf_free_q_vectors(struct ixgbevf_adapter *adapter)
  2375. {
  2376. int q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
  2377. while (q_vectors) {
  2378. q_vectors--;
  2379. ixgbevf_free_q_vector(adapter, q_vectors);
  2380. }
  2381. }
  2382. /**
  2383. * ixgbevf_reset_interrupt_capability - Reset MSIX setup
  2384. * @adapter: board private structure
  2385. *
  2386. **/
  2387. static void ixgbevf_reset_interrupt_capability(struct ixgbevf_adapter *adapter)
  2388. {
  2389. if (!adapter->msix_entries)
  2390. return;
  2391. pci_disable_msix(adapter->pdev);
  2392. kfree(adapter->msix_entries);
  2393. adapter->msix_entries = NULL;
  2394. }
  2395. /**
  2396. * ixgbevf_init_interrupt_scheme - Determine if MSIX is supported and init
  2397. * @adapter: board private structure to initialize
  2398. *
  2399. **/
  2400. static int ixgbevf_init_interrupt_scheme(struct ixgbevf_adapter *adapter)
  2401. {
  2402. int err;
  2403. /* Number of supported queues */
  2404. ixgbevf_set_num_queues(adapter);
  2405. err = ixgbevf_set_interrupt_capability(adapter);
  2406. if (err) {
  2407. hw_dbg(&adapter->hw,
  2408. "Unable to setup interrupt capabilities\n");
  2409. goto err_set_interrupt;
  2410. }
  2411. err = ixgbevf_alloc_q_vectors(adapter);
  2412. if (err) {
  2413. hw_dbg(&adapter->hw, "Unable to allocate memory for queue vectors\n");
  2414. goto err_alloc_q_vectors;
  2415. }
  2416. hw_dbg(&adapter->hw, "Multiqueue %s: Rx Queue count = %u, Tx Queue count = %u XDP Queue count %u\n",
  2417. (adapter->num_rx_queues > 1) ? "Enabled" : "Disabled",
  2418. adapter->num_rx_queues, adapter->num_tx_queues,
  2419. adapter->num_xdp_queues);
  2420. set_bit(__IXGBEVF_DOWN, &adapter->state);
  2421. return 0;
  2422. err_alloc_q_vectors:
  2423. ixgbevf_reset_interrupt_capability(adapter);
  2424. err_set_interrupt:
  2425. return err;
  2426. }
  2427. /**
  2428. * ixgbevf_clear_interrupt_scheme - Clear the current interrupt scheme settings
  2429. * @adapter: board private structure to clear interrupt scheme on
  2430. *
  2431. * We go through and clear interrupt specific resources and reset the structure
  2432. * to pre-load conditions
  2433. **/
  2434. static void ixgbevf_clear_interrupt_scheme(struct ixgbevf_adapter *adapter)
  2435. {
  2436. adapter->num_tx_queues = 0;
  2437. adapter->num_xdp_queues = 0;
  2438. adapter->num_rx_queues = 0;
  2439. ixgbevf_free_q_vectors(adapter);
  2440. ixgbevf_reset_interrupt_capability(adapter);
  2441. }
  2442. /**
  2443. * ixgbevf_sw_init - Initialize general software structures
  2444. * @adapter: board private structure to initialize
  2445. *
  2446. * ixgbevf_sw_init initializes the Adapter private data structure.
  2447. * Fields are initialized based on PCI device information and
  2448. * OS network device settings (MTU size).
  2449. **/
  2450. static int ixgbevf_sw_init(struct ixgbevf_adapter *adapter)
  2451. {
  2452. struct ixgbe_hw *hw = &adapter->hw;
  2453. struct pci_dev *pdev = adapter->pdev;
  2454. struct net_device *netdev = adapter->netdev;
  2455. int err;
  2456. /* PCI config space info */
  2457. hw->vendor_id = pdev->vendor;
  2458. hw->device_id = pdev->device;
  2459. hw->revision_id = pdev->revision;
  2460. hw->subsystem_vendor_id = pdev->subsystem_vendor;
  2461. hw->subsystem_device_id = pdev->subsystem_device;
  2462. hw->mbx.ops.init_params(hw);
  2463. if (hw->mac.type >= ixgbe_mac_X550_vf) {
  2464. err = ixgbevf_init_rss_key(adapter);
  2465. if (err)
  2466. goto out;
  2467. }
  2468. /* assume legacy case in which PF would only give VF 2 queues */
  2469. hw->mac.max_tx_queues = 2;
  2470. hw->mac.max_rx_queues = 2;
  2471. /* lock to protect mailbox accesses */
  2472. spin_lock_init(&adapter->mbx_lock);
  2473. err = hw->mac.ops.reset_hw(hw);
  2474. if (err) {
  2475. dev_info(&pdev->dev,
  2476. "PF still in reset state. Is the PF interface up?\n");
  2477. } else {
  2478. err = hw->mac.ops.init_hw(hw);
  2479. if (err) {
  2480. pr_err("init_shared_code failed: %d\n", err);
  2481. goto out;
  2482. }
  2483. ixgbevf_negotiate_api(adapter);
  2484. err = hw->mac.ops.get_mac_addr(hw, hw->mac.addr);
  2485. if (err)
  2486. dev_info(&pdev->dev, "Error reading MAC address\n");
  2487. else if (is_zero_ether_addr(adapter->hw.mac.addr))
  2488. dev_info(&pdev->dev,
  2489. "MAC address not assigned by administrator.\n");
  2490. ether_addr_copy(netdev->dev_addr, hw->mac.addr);
  2491. }
  2492. if (!is_valid_ether_addr(netdev->dev_addr)) {
  2493. dev_info(&pdev->dev, "Assigning random MAC address\n");
  2494. eth_hw_addr_random(netdev);
  2495. ether_addr_copy(hw->mac.addr, netdev->dev_addr);
  2496. ether_addr_copy(hw->mac.perm_addr, netdev->dev_addr);
  2497. }
  2498. /* Enable dynamic interrupt throttling rates */
  2499. adapter->rx_itr_setting = 1;
  2500. adapter->tx_itr_setting = 1;
  2501. /* set default ring sizes */
  2502. adapter->tx_ring_count = IXGBEVF_DEFAULT_TXD;
  2503. adapter->rx_ring_count = IXGBEVF_DEFAULT_RXD;
  2504. set_bit(__IXGBEVF_DOWN, &adapter->state);
  2505. return 0;
  2506. out:
  2507. return err;
  2508. }
  2509. #define UPDATE_VF_COUNTER_32bit(reg, last_counter, counter) \
  2510. { \
  2511. u32 current_counter = IXGBE_READ_REG(hw, reg); \
  2512. if (current_counter < last_counter) \
  2513. counter += 0x100000000LL; \
  2514. last_counter = current_counter; \
  2515. counter &= 0xFFFFFFFF00000000LL; \
  2516. counter |= current_counter; \
  2517. }
  2518. #define UPDATE_VF_COUNTER_36bit(reg_lsb, reg_msb, last_counter, counter) \
  2519. { \
  2520. u64 current_counter_lsb = IXGBE_READ_REG(hw, reg_lsb); \
  2521. u64 current_counter_msb = IXGBE_READ_REG(hw, reg_msb); \
  2522. u64 current_counter = (current_counter_msb << 32) | \
  2523. current_counter_lsb; \
  2524. if (current_counter < last_counter) \
  2525. counter += 0x1000000000LL; \
  2526. last_counter = current_counter; \
  2527. counter &= 0xFFFFFFF000000000LL; \
  2528. counter |= current_counter; \
  2529. }
  2530. /**
  2531. * ixgbevf_update_stats - Update the board statistics counters.
  2532. * @adapter: board private structure
  2533. **/
  2534. void ixgbevf_update_stats(struct ixgbevf_adapter *adapter)
  2535. {
  2536. struct ixgbe_hw *hw = &adapter->hw;
  2537. u64 alloc_rx_page_failed = 0, alloc_rx_buff_failed = 0;
  2538. u64 alloc_rx_page = 0, hw_csum_rx_error = 0;
  2539. int i;
  2540. if (test_bit(__IXGBEVF_DOWN, &adapter->state) ||
  2541. test_bit(__IXGBEVF_RESETTING, &adapter->state))
  2542. return;
  2543. UPDATE_VF_COUNTER_32bit(IXGBE_VFGPRC, adapter->stats.last_vfgprc,
  2544. adapter->stats.vfgprc);
  2545. UPDATE_VF_COUNTER_32bit(IXGBE_VFGPTC, adapter->stats.last_vfgptc,
  2546. adapter->stats.vfgptc);
  2547. UPDATE_VF_COUNTER_36bit(IXGBE_VFGORC_LSB, IXGBE_VFGORC_MSB,
  2548. adapter->stats.last_vfgorc,
  2549. adapter->stats.vfgorc);
  2550. UPDATE_VF_COUNTER_36bit(IXGBE_VFGOTC_LSB, IXGBE_VFGOTC_MSB,
  2551. adapter->stats.last_vfgotc,
  2552. adapter->stats.vfgotc);
  2553. UPDATE_VF_COUNTER_32bit(IXGBE_VFMPRC, adapter->stats.last_vfmprc,
  2554. adapter->stats.vfmprc);
  2555. for (i = 0; i < adapter->num_rx_queues; i++) {
  2556. struct ixgbevf_ring *rx_ring = adapter->rx_ring[i];
  2557. hw_csum_rx_error += rx_ring->rx_stats.csum_err;
  2558. alloc_rx_page_failed += rx_ring->rx_stats.alloc_rx_page_failed;
  2559. alloc_rx_buff_failed += rx_ring->rx_stats.alloc_rx_buff_failed;
  2560. alloc_rx_page += rx_ring->rx_stats.alloc_rx_page;
  2561. }
  2562. adapter->hw_csum_rx_error = hw_csum_rx_error;
  2563. adapter->alloc_rx_page_failed = alloc_rx_page_failed;
  2564. adapter->alloc_rx_buff_failed = alloc_rx_buff_failed;
  2565. adapter->alloc_rx_page = alloc_rx_page;
  2566. }
  2567. /**
  2568. * ixgbevf_service_timer - Timer Call-back
  2569. * @t: pointer to timer_list struct
  2570. **/
  2571. static void ixgbevf_service_timer(struct timer_list *t)
  2572. {
  2573. struct ixgbevf_adapter *adapter = from_timer(adapter, t,
  2574. service_timer);
  2575. /* Reset the timer */
  2576. mod_timer(&adapter->service_timer, (HZ * 2) + jiffies);
  2577. ixgbevf_service_event_schedule(adapter);
  2578. }
  2579. static void ixgbevf_reset_subtask(struct ixgbevf_adapter *adapter)
  2580. {
  2581. if (!test_and_clear_bit(__IXGBEVF_RESET_REQUESTED, &adapter->state))
  2582. return;
  2583. /* If we're already down or resetting, just bail */
  2584. if (test_bit(__IXGBEVF_DOWN, &adapter->state) ||
  2585. test_bit(__IXGBEVF_REMOVING, &adapter->state) ||
  2586. test_bit(__IXGBEVF_RESETTING, &adapter->state))
  2587. return;
  2588. adapter->tx_timeout_count++;
  2589. rtnl_lock();
  2590. ixgbevf_reinit_locked(adapter);
  2591. rtnl_unlock();
  2592. }
  2593. /**
  2594. * ixgbevf_check_hang_subtask - check for hung queues and dropped interrupts
  2595. * @adapter: pointer to the device adapter structure
  2596. *
  2597. * This function serves two purposes. First it strobes the interrupt lines
  2598. * in order to make certain interrupts are occurring. Secondly it sets the
  2599. * bits needed to check for TX hangs. As a result we should immediately
  2600. * determine if a hang has occurred.
  2601. **/
  2602. static void ixgbevf_check_hang_subtask(struct ixgbevf_adapter *adapter)
  2603. {
  2604. struct ixgbe_hw *hw = &adapter->hw;
  2605. u32 eics = 0;
  2606. int i;
  2607. /* If we're down or resetting, just bail */
  2608. if (test_bit(__IXGBEVF_DOWN, &adapter->state) ||
  2609. test_bit(__IXGBEVF_RESETTING, &adapter->state))
  2610. return;
  2611. /* Force detection of hung controller */
  2612. if (netif_carrier_ok(adapter->netdev)) {
  2613. for (i = 0; i < adapter->num_tx_queues; i++)
  2614. set_check_for_tx_hang(adapter->tx_ring[i]);
  2615. for (i = 0; i < adapter->num_xdp_queues; i++)
  2616. set_check_for_tx_hang(adapter->xdp_ring[i]);
  2617. }
  2618. /* get one bit for every active Tx/Rx interrupt vector */
  2619. for (i = 0; i < adapter->num_msix_vectors - NON_Q_VECTORS; i++) {
  2620. struct ixgbevf_q_vector *qv = adapter->q_vector[i];
  2621. if (qv->rx.ring || qv->tx.ring)
  2622. eics |= BIT(i);
  2623. }
  2624. /* Cause software interrupt to ensure rings are cleaned */
  2625. IXGBE_WRITE_REG(hw, IXGBE_VTEICS, eics);
  2626. }
  2627. /**
  2628. * ixgbevf_watchdog_update_link - update the link status
  2629. * @adapter: pointer to the device adapter structure
  2630. **/
  2631. static void ixgbevf_watchdog_update_link(struct ixgbevf_adapter *adapter)
  2632. {
  2633. struct ixgbe_hw *hw = &adapter->hw;
  2634. u32 link_speed = adapter->link_speed;
  2635. bool link_up = adapter->link_up;
  2636. s32 err;
  2637. spin_lock_bh(&adapter->mbx_lock);
  2638. err = hw->mac.ops.check_link(hw, &link_speed, &link_up, false);
  2639. spin_unlock_bh(&adapter->mbx_lock);
  2640. /* if check for link returns error we will need to reset */
  2641. if (err && time_after(jiffies, adapter->last_reset + (10 * HZ))) {
  2642. set_bit(__IXGBEVF_RESET_REQUESTED, &adapter->state);
  2643. link_up = false;
  2644. }
  2645. adapter->link_up = link_up;
  2646. adapter->link_speed = link_speed;
  2647. }
  2648. /**
  2649. * ixgbevf_watchdog_link_is_up - update netif_carrier status and
  2650. * print link up message
  2651. * @adapter: pointer to the device adapter structure
  2652. **/
  2653. static void ixgbevf_watchdog_link_is_up(struct ixgbevf_adapter *adapter)
  2654. {
  2655. struct net_device *netdev = adapter->netdev;
  2656. /* only continue if link was previously down */
  2657. if (netif_carrier_ok(netdev))
  2658. return;
  2659. dev_info(&adapter->pdev->dev, "NIC Link is Up %s\n",
  2660. (adapter->link_speed == IXGBE_LINK_SPEED_10GB_FULL) ?
  2661. "10 Gbps" :
  2662. (adapter->link_speed == IXGBE_LINK_SPEED_1GB_FULL) ?
  2663. "1 Gbps" :
  2664. (adapter->link_speed == IXGBE_LINK_SPEED_100_FULL) ?
  2665. "100 Mbps" :
  2666. "unknown speed");
  2667. netif_carrier_on(netdev);
  2668. }
  2669. /**
  2670. * ixgbevf_watchdog_link_is_down - update netif_carrier status and
  2671. * print link down message
  2672. * @adapter: pointer to the adapter structure
  2673. **/
  2674. static void ixgbevf_watchdog_link_is_down(struct ixgbevf_adapter *adapter)
  2675. {
  2676. struct net_device *netdev = adapter->netdev;
  2677. adapter->link_speed = 0;
  2678. /* only continue if link was up previously */
  2679. if (!netif_carrier_ok(netdev))
  2680. return;
  2681. dev_info(&adapter->pdev->dev, "NIC Link is Down\n");
  2682. netif_carrier_off(netdev);
  2683. }
  2684. /**
  2685. * ixgbevf_watchdog_subtask - worker thread to bring link up
  2686. * @adapter: board private structure
  2687. **/
  2688. static void ixgbevf_watchdog_subtask(struct ixgbevf_adapter *adapter)
  2689. {
  2690. /* if interface is down do nothing */
  2691. if (test_bit(__IXGBEVF_DOWN, &adapter->state) ||
  2692. test_bit(__IXGBEVF_RESETTING, &adapter->state))
  2693. return;
  2694. ixgbevf_watchdog_update_link(adapter);
  2695. if (adapter->link_up)
  2696. ixgbevf_watchdog_link_is_up(adapter);
  2697. else
  2698. ixgbevf_watchdog_link_is_down(adapter);
  2699. ixgbevf_update_stats(adapter);
  2700. }
  2701. /**
  2702. * ixgbevf_service_task - manages and runs subtasks
  2703. * @work: pointer to work_struct containing our data
  2704. **/
  2705. static void ixgbevf_service_task(struct work_struct *work)
  2706. {
  2707. struct ixgbevf_adapter *adapter = container_of(work,
  2708. struct ixgbevf_adapter,
  2709. service_task);
  2710. struct ixgbe_hw *hw = &adapter->hw;
  2711. if (IXGBE_REMOVED(hw->hw_addr)) {
  2712. if (!test_bit(__IXGBEVF_DOWN, &adapter->state)) {
  2713. rtnl_lock();
  2714. ixgbevf_down(adapter);
  2715. rtnl_unlock();
  2716. }
  2717. return;
  2718. }
  2719. ixgbevf_queue_reset_subtask(adapter);
  2720. ixgbevf_reset_subtask(adapter);
  2721. ixgbevf_watchdog_subtask(adapter);
  2722. ixgbevf_check_hang_subtask(adapter);
  2723. ixgbevf_service_event_complete(adapter);
  2724. }
  2725. /**
  2726. * ixgbevf_free_tx_resources - Free Tx Resources per Queue
  2727. * @tx_ring: Tx descriptor ring for a specific queue
  2728. *
  2729. * Free all transmit software resources
  2730. **/
  2731. void ixgbevf_free_tx_resources(struct ixgbevf_ring *tx_ring)
  2732. {
  2733. ixgbevf_clean_tx_ring(tx_ring);
  2734. vfree(tx_ring->tx_buffer_info);
  2735. tx_ring->tx_buffer_info = NULL;
  2736. /* if not set, then don't free */
  2737. if (!tx_ring->desc)
  2738. return;
  2739. dma_free_coherent(tx_ring->dev, tx_ring->size, tx_ring->desc,
  2740. tx_ring->dma);
  2741. tx_ring->desc = NULL;
  2742. }
  2743. /**
  2744. * ixgbevf_free_all_tx_resources - Free Tx Resources for All Queues
  2745. * @adapter: board private structure
  2746. *
  2747. * Free all transmit software resources
  2748. **/
  2749. static void ixgbevf_free_all_tx_resources(struct ixgbevf_adapter *adapter)
  2750. {
  2751. int i;
  2752. for (i = 0; i < adapter->num_tx_queues; i++)
  2753. if (adapter->tx_ring[i]->desc)
  2754. ixgbevf_free_tx_resources(adapter->tx_ring[i]);
  2755. for (i = 0; i < adapter->num_xdp_queues; i++)
  2756. if (adapter->xdp_ring[i]->desc)
  2757. ixgbevf_free_tx_resources(adapter->xdp_ring[i]);
  2758. }
  2759. /**
  2760. * ixgbevf_setup_tx_resources - allocate Tx resources (Descriptors)
  2761. * @tx_ring: Tx descriptor ring (for a specific queue) to setup
  2762. *
  2763. * Return 0 on success, negative on failure
  2764. **/
  2765. int ixgbevf_setup_tx_resources(struct ixgbevf_ring *tx_ring)
  2766. {
  2767. struct ixgbevf_adapter *adapter = netdev_priv(tx_ring->netdev);
  2768. int size;
  2769. size = sizeof(struct ixgbevf_tx_buffer) * tx_ring->count;
  2770. tx_ring->tx_buffer_info = vmalloc(size);
  2771. if (!tx_ring->tx_buffer_info)
  2772. goto err;
  2773. u64_stats_init(&tx_ring->syncp);
  2774. /* round up to nearest 4K */
  2775. tx_ring->size = tx_ring->count * sizeof(union ixgbe_adv_tx_desc);
  2776. tx_ring->size = ALIGN(tx_ring->size, 4096);
  2777. tx_ring->desc = dma_alloc_coherent(tx_ring->dev, tx_ring->size,
  2778. &tx_ring->dma, GFP_KERNEL);
  2779. if (!tx_ring->desc)
  2780. goto err;
  2781. return 0;
  2782. err:
  2783. vfree(tx_ring->tx_buffer_info);
  2784. tx_ring->tx_buffer_info = NULL;
  2785. hw_dbg(&adapter->hw, "Unable to allocate memory for the transmit descriptor ring\n");
  2786. return -ENOMEM;
  2787. }
  2788. /**
  2789. * ixgbevf_setup_all_tx_resources - allocate all queues Tx resources
  2790. * @adapter: board private structure
  2791. *
  2792. * If this function returns with an error, then it's possible one or
  2793. * more of the rings is populated (while the rest are not). It is the
  2794. * callers duty to clean those orphaned rings.
  2795. *
  2796. * Return 0 on success, negative on failure
  2797. **/
  2798. static int ixgbevf_setup_all_tx_resources(struct ixgbevf_adapter *adapter)
  2799. {
  2800. int i, j = 0, err = 0;
  2801. for (i = 0; i < adapter->num_tx_queues; i++) {
  2802. err = ixgbevf_setup_tx_resources(adapter->tx_ring[i]);
  2803. if (!err)
  2804. continue;
  2805. hw_dbg(&adapter->hw, "Allocation for Tx Queue %u failed\n", i);
  2806. goto err_setup_tx;
  2807. }
  2808. for (j = 0; j < adapter->num_xdp_queues; j++) {
  2809. err = ixgbevf_setup_tx_resources(adapter->xdp_ring[j]);
  2810. if (!err)
  2811. continue;
  2812. hw_dbg(&adapter->hw, "Allocation for XDP Queue %u failed\n", j);
  2813. goto err_setup_tx;
  2814. }
  2815. return 0;
  2816. err_setup_tx:
  2817. /* rewind the index freeing the rings as we go */
  2818. while (j--)
  2819. ixgbevf_free_tx_resources(adapter->xdp_ring[j]);
  2820. while (i--)
  2821. ixgbevf_free_tx_resources(adapter->tx_ring[i]);
  2822. return err;
  2823. }
  2824. /**
  2825. * ixgbevf_setup_rx_resources - allocate Rx resources (Descriptors)
  2826. * @adapter: board private structure
  2827. * @rx_ring: Rx descriptor ring (for a specific queue) to setup
  2828. *
  2829. * Returns 0 on success, negative on failure
  2830. **/
  2831. int ixgbevf_setup_rx_resources(struct ixgbevf_adapter *adapter,
  2832. struct ixgbevf_ring *rx_ring)
  2833. {
  2834. int size;
  2835. size = sizeof(struct ixgbevf_rx_buffer) * rx_ring->count;
  2836. rx_ring->rx_buffer_info = vmalloc(size);
  2837. if (!rx_ring->rx_buffer_info)
  2838. goto err;
  2839. u64_stats_init(&rx_ring->syncp);
  2840. /* Round up to nearest 4K */
  2841. rx_ring->size = rx_ring->count * sizeof(union ixgbe_adv_rx_desc);
  2842. rx_ring->size = ALIGN(rx_ring->size, 4096);
  2843. rx_ring->desc = dma_alloc_coherent(rx_ring->dev, rx_ring->size,
  2844. &rx_ring->dma, GFP_KERNEL);
  2845. if (!rx_ring->desc)
  2846. goto err;
  2847. /* XDP RX-queue info */
  2848. if (xdp_rxq_info_reg(&rx_ring->xdp_rxq, adapter->netdev,
  2849. rx_ring->queue_index) < 0)
  2850. goto err;
  2851. rx_ring->xdp_prog = adapter->xdp_prog;
  2852. return 0;
  2853. err:
  2854. vfree(rx_ring->rx_buffer_info);
  2855. rx_ring->rx_buffer_info = NULL;
  2856. dev_err(rx_ring->dev, "Unable to allocate memory for the Rx descriptor ring\n");
  2857. return -ENOMEM;
  2858. }
  2859. /**
  2860. * ixgbevf_setup_all_rx_resources - allocate all queues Rx resources
  2861. * @adapter: board private structure
  2862. *
  2863. * If this function returns with an error, then it's possible one or
  2864. * more of the rings is populated (while the rest are not). It is the
  2865. * callers duty to clean those orphaned rings.
  2866. *
  2867. * Return 0 on success, negative on failure
  2868. **/
  2869. static int ixgbevf_setup_all_rx_resources(struct ixgbevf_adapter *adapter)
  2870. {
  2871. int i, err = 0;
  2872. for (i = 0; i < adapter->num_rx_queues; i++) {
  2873. err = ixgbevf_setup_rx_resources(adapter, adapter->rx_ring[i]);
  2874. if (!err)
  2875. continue;
  2876. hw_dbg(&adapter->hw, "Allocation for Rx Queue %u failed\n", i);
  2877. goto err_setup_rx;
  2878. }
  2879. return 0;
  2880. err_setup_rx:
  2881. /* rewind the index freeing the rings as we go */
  2882. while (i--)
  2883. ixgbevf_free_rx_resources(adapter->rx_ring[i]);
  2884. return err;
  2885. }
  2886. /**
  2887. * ixgbevf_free_rx_resources - Free Rx Resources
  2888. * @rx_ring: ring to clean the resources from
  2889. *
  2890. * Free all receive software resources
  2891. **/
  2892. void ixgbevf_free_rx_resources(struct ixgbevf_ring *rx_ring)
  2893. {
  2894. ixgbevf_clean_rx_ring(rx_ring);
  2895. rx_ring->xdp_prog = NULL;
  2896. xdp_rxq_info_unreg(&rx_ring->xdp_rxq);
  2897. vfree(rx_ring->rx_buffer_info);
  2898. rx_ring->rx_buffer_info = NULL;
  2899. dma_free_coherent(rx_ring->dev, rx_ring->size, rx_ring->desc,
  2900. rx_ring->dma);
  2901. rx_ring->desc = NULL;
  2902. }
  2903. /**
  2904. * ixgbevf_free_all_rx_resources - Free Rx Resources for All Queues
  2905. * @adapter: board private structure
  2906. *
  2907. * Free all receive software resources
  2908. **/
  2909. static void ixgbevf_free_all_rx_resources(struct ixgbevf_adapter *adapter)
  2910. {
  2911. int i;
  2912. for (i = 0; i < adapter->num_rx_queues; i++)
  2913. if (adapter->rx_ring[i]->desc)
  2914. ixgbevf_free_rx_resources(adapter->rx_ring[i]);
  2915. }
  2916. /**
  2917. * ixgbevf_open - Called when a network interface is made active
  2918. * @netdev: network interface device structure
  2919. *
  2920. * Returns 0 on success, negative value on failure
  2921. *
  2922. * The open entry point is called when a network interface is made
  2923. * active by the system (IFF_UP). At this point all resources needed
  2924. * for transmit and receive operations are allocated, the interrupt
  2925. * handler is registered with the OS, the watchdog timer is started,
  2926. * and the stack is notified that the interface is ready.
  2927. **/
  2928. int ixgbevf_open(struct net_device *netdev)
  2929. {
  2930. struct ixgbevf_adapter *adapter = netdev_priv(netdev);
  2931. struct ixgbe_hw *hw = &adapter->hw;
  2932. int err;
  2933. /* A previous failure to open the device because of a lack of
  2934. * available MSIX vector resources may have reset the number
  2935. * of msix vectors variable to zero. The only way to recover
  2936. * is to unload/reload the driver and hope that the system has
  2937. * been able to recover some MSIX vector resources.
  2938. */
  2939. if (!adapter->num_msix_vectors)
  2940. return -ENOMEM;
  2941. if (hw->adapter_stopped) {
  2942. ixgbevf_reset(adapter);
  2943. /* if adapter is still stopped then PF isn't up and
  2944. * the VF can't start.
  2945. */
  2946. if (hw->adapter_stopped) {
  2947. err = IXGBE_ERR_MBX;
  2948. pr_err("Unable to start - perhaps the PF Driver isn't up yet\n");
  2949. goto err_setup_reset;
  2950. }
  2951. }
  2952. /* disallow open during test */
  2953. if (test_bit(__IXGBEVF_TESTING, &adapter->state))
  2954. return -EBUSY;
  2955. netif_carrier_off(netdev);
  2956. /* allocate transmit descriptors */
  2957. err = ixgbevf_setup_all_tx_resources(adapter);
  2958. if (err)
  2959. goto err_setup_tx;
  2960. /* allocate receive descriptors */
  2961. err = ixgbevf_setup_all_rx_resources(adapter);
  2962. if (err)
  2963. goto err_setup_rx;
  2964. ixgbevf_configure(adapter);
  2965. err = ixgbevf_request_irq(adapter);
  2966. if (err)
  2967. goto err_req_irq;
  2968. /* Notify the stack of the actual queue counts. */
  2969. err = netif_set_real_num_tx_queues(netdev, adapter->num_tx_queues);
  2970. if (err)
  2971. goto err_set_queues;
  2972. err = netif_set_real_num_rx_queues(netdev, adapter->num_rx_queues);
  2973. if (err)
  2974. goto err_set_queues;
  2975. ixgbevf_up_complete(adapter);
  2976. return 0;
  2977. err_set_queues:
  2978. ixgbevf_free_irq(adapter);
  2979. err_req_irq:
  2980. ixgbevf_free_all_rx_resources(adapter);
  2981. err_setup_rx:
  2982. ixgbevf_free_all_tx_resources(adapter);
  2983. err_setup_tx:
  2984. ixgbevf_reset(adapter);
  2985. err_setup_reset:
  2986. return err;
  2987. }
  2988. /**
  2989. * ixgbevf_close_suspend - actions necessary to both suspend and close flows
  2990. * @adapter: the private adapter struct
  2991. *
  2992. * This function should contain the necessary work common to both suspending
  2993. * and closing of the device.
  2994. */
  2995. static void ixgbevf_close_suspend(struct ixgbevf_adapter *adapter)
  2996. {
  2997. ixgbevf_down(adapter);
  2998. ixgbevf_free_irq(adapter);
  2999. ixgbevf_free_all_tx_resources(adapter);
  3000. ixgbevf_free_all_rx_resources(adapter);
  3001. }
  3002. /**
  3003. * ixgbevf_close - Disables a network interface
  3004. * @netdev: network interface device structure
  3005. *
  3006. * Returns 0, this is not allowed to fail
  3007. *
  3008. * The close entry point is called when an interface is de-activated
  3009. * by the OS. The hardware is still under the drivers control, but
  3010. * needs to be disabled. A global MAC reset is issued to stop the
  3011. * hardware, and all transmit and receive resources are freed.
  3012. **/
  3013. int ixgbevf_close(struct net_device *netdev)
  3014. {
  3015. struct ixgbevf_adapter *adapter = netdev_priv(netdev);
  3016. if (netif_device_present(netdev))
  3017. ixgbevf_close_suspend(adapter);
  3018. return 0;
  3019. }
  3020. static void ixgbevf_queue_reset_subtask(struct ixgbevf_adapter *adapter)
  3021. {
  3022. struct net_device *dev = adapter->netdev;
  3023. if (!test_and_clear_bit(__IXGBEVF_QUEUE_RESET_REQUESTED,
  3024. &adapter->state))
  3025. return;
  3026. /* if interface is down do nothing */
  3027. if (test_bit(__IXGBEVF_DOWN, &adapter->state) ||
  3028. test_bit(__IXGBEVF_RESETTING, &adapter->state))
  3029. return;
  3030. /* Hardware has to reinitialize queues and interrupts to
  3031. * match packet buffer alignment. Unfortunately, the
  3032. * hardware is not flexible enough to do this dynamically.
  3033. */
  3034. rtnl_lock();
  3035. if (netif_running(dev))
  3036. ixgbevf_close(dev);
  3037. ixgbevf_clear_interrupt_scheme(adapter);
  3038. ixgbevf_init_interrupt_scheme(adapter);
  3039. if (netif_running(dev))
  3040. ixgbevf_open(dev);
  3041. rtnl_unlock();
  3042. }
  3043. static void ixgbevf_tx_ctxtdesc(struct ixgbevf_ring *tx_ring,
  3044. u32 vlan_macip_lens, u32 type_tucmd,
  3045. u32 mss_l4len_idx)
  3046. {
  3047. struct ixgbe_adv_tx_context_desc *context_desc;
  3048. u16 i = tx_ring->next_to_use;
  3049. context_desc = IXGBEVF_TX_CTXTDESC(tx_ring, i);
  3050. i++;
  3051. tx_ring->next_to_use = (i < tx_ring->count) ? i : 0;
  3052. /* set bits to identify this as an advanced context descriptor */
  3053. type_tucmd |= IXGBE_TXD_CMD_DEXT | IXGBE_ADVTXD_DTYP_CTXT;
  3054. context_desc->vlan_macip_lens = cpu_to_le32(vlan_macip_lens);
  3055. context_desc->seqnum_seed = 0;
  3056. context_desc->type_tucmd_mlhl = cpu_to_le32(type_tucmd);
  3057. context_desc->mss_l4len_idx = cpu_to_le32(mss_l4len_idx);
  3058. }
  3059. static int ixgbevf_tso(struct ixgbevf_ring *tx_ring,
  3060. struct ixgbevf_tx_buffer *first,
  3061. u8 *hdr_len)
  3062. {
  3063. u32 vlan_macip_lens, type_tucmd, mss_l4len_idx;
  3064. struct sk_buff *skb = first->skb;
  3065. union {
  3066. struct iphdr *v4;
  3067. struct ipv6hdr *v6;
  3068. unsigned char *hdr;
  3069. } ip;
  3070. union {
  3071. struct tcphdr *tcp;
  3072. unsigned char *hdr;
  3073. } l4;
  3074. u32 paylen, l4_offset;
  3075. int err;
  3076. if (skb->ip_summed != CHECKSUM_PARTIAL)
  3077. return 0;
  3078. if (!skb_is_gso(skb))
  3079. return 0;
  3080. err = skb_cow_head(skb, 0);
  3081. if (err < 0)
  3082. return err;
  3083. if (eth_p_mpls(first->protocol))
  3084. ip.hdr = skb_inner_network_header(skb);
  3085. else
  3086. ip.hdr = skb_network_header(skb);
  3087. l4.hdr = skb_checksum_start(skb);
  3088. /* ADV DTYP TUCMD MKRLOC/ISCSIHEDLEN */
  3089. type_tucmd = IXGBE_ADVTXD_TUCMD_L4T_TCP;
  3090. /* initialize outer IP header fields */
  3091. if (ip.v4->version == 4) {
  3092. unsigned char *csum_start = skb_checksum_start(skb);
  3093. unsigned char *trans_start = ip.hdr + (ip.v4->ihl * 4);
  3094. /* IP header will have to cancel out any data that
  3095. * is not a part of the outer IP header
  3096. */
  3097. ip.v4->check = csum_fold(csum_partial(trans_start,
  3098. csum_start - trans_start,
  3099. 0));
  3100. type_tucmd |= IXGBE_ADVTXD_TUCMD_IPV4;
  3101. ip.v4->tot_len = 0;
  3102. first->tx_flags |= IXGBE_TX_FLAGS_TSO |
  3103. IXGBE_TX_FLAGS_CSUM |
  3104. IXGBE_TX_FLAGS_IPV4;
  3105. } else {
  3106. ip.v6->payload_len = 0;
  3107. first->tx_flags |= IXGBE_TX_FLAGS_TSO |
  3108. IXGBE_TX_FLAGS_CSUM;
  3109. }
  3110. /* determine offset of inner transport header */
  3111. l4_offset = l4.hdr - skb->data;
  3112. /* compute length of segmentation header */
  3113. *hdr_len = (l4.tcp->doff * 4) + l4_offset;
  3114. /* remove payload length from inner checksum */
  3115. paylen = skb->len - l4_offset;
  3116. csum_replace_by_diff(&l4.tcp->check, htonl(paylen));
  3117. /* update gso size and bytecount with header size */
  3118. first->gso_segs = skb_shinfo(skb)->gso_segs;
  3119. first->bytecount += (first->gso_segs - 1) * *hdr_len;
  3120. /* mss_l4len_id: use 1 as index for TSO */
  3121. mss_l4len_idx = (*hdr_len - l4_offset) << IXGBE_ADVTXD_L4LEN_SHIFT;
  3122. mss_l4len_idx |= skb_shinfo(skb)->gso_size << IXGBE_ADVTXD_MSS_SHIFT;
  3123. mss_l4len_idx |= (1u << IXGBE_ADVTXD_IDX_SHIFT);
  3124. /* vlan_macip_lens: HEADLEN, MACLEN, VLAN tag */
  3125. vlan_macip_lens = l4.hdr - ip.hdr;
  3126. vlan_macip_lens |= (ip.hdr - skb->data) << IXGBE_ADVTXD_MACLEN_SHIFT;
  3127. vlan_macip_lens |= first->tx_flags & IXGBE_TX_FLAGS_VLAN_MASK;
  3128. ixgbevf_tx_ctxtdesc(tx_ring, vlan_macip_lens,
  3129. type_tucmd, mss_l4len_idx);
  3130. return 1;
  3131. }
  3132. static inline bool ixgbevf_ipv6_csum_is_sctp(struct sk_buff *skb)
  3133. {
  3134. unsigned int offset = 0;
  3135. ipv6_find_hdr(skb, &offset, IPPROTO_SCTP, NULL, NULL);
  3136. return offset == skb_checksum_start_offset(skb);
  3137. }
  3138. static void ixgbevf_tx_csum(struct ixgbevf_ring *tx_ring,
  3139. struct ixgbevf_tx_buffer *first)
  3140. {
  3141. struct sk_buff *skb = first->skb;
  3142. u32 vlan_macip_lens = 0;
  3143. u32 type_tucmd = 0;
  3144. if (skb->ip_summed != CHECKSUM_PARTIAL)
  3145. goto no_csum;
  3146. switch (skb->csum_offset) {
  3147. case offsetof(struct tcphdr, check):
  3148. type_tucmd = IXGBE_ADVTXD_TUCMD_L4T_TCP;
  3149. /* fall through */
  3150. case offsetof(struct udphdr, check):
  3151. break;
  3152. case offsetof(struct sctphdr, checksum):
  3153. /* validate that this is actually an SCTP request */
  3154. if (((first->protocol == htons(ETH_P_IP)) &&
  3155. (ip_hdr(skb)->protocol == IPPROTO_SCTP)) ||
  3156. ((first->protocol == htons(ETH_P_IPV6)) &&
  3157. ixgbevf_ipv6_csum_is_sctp(skb))) {
  3158. type_tucmd = IXGBE_ADVTXD_TUCMD_L4T_SCTP;
  3159. break;
  3160. }
  3161. /* fall through */
  3162. default:
  3163. skb_checksum_help(skb);
  3164. goto no_csum;
  3165. }
  3166. /* update TX checksum flag */
  3167. first->tx_flags |= IXGBE_TX_FLAGS_CSUM;
  3168. vlan_macip_lens = skb_checksum_start_offset(skb) -
  3169. skb_network_offset(skb);
  3170. no_csum:
  3171. /* vlan_macip_lens: MACLEN, VLAN tag */
  3172. vlan_macip_lens |= skb_network_offset(skb) << IXGBE_ADVTXD_MACLEN_SHIFT;
  3173. vlan_macip_lens |= first->tx_flags & IXGBE_TX_FLAGS_VLAN_MASK;
  3174. ixgbevf_tx_ctxtdesc(tx_ring, vlan_macip_lens, type_tucmd, 0);
  3175. }
  3176. static __le32 ixgbevf_tx_cmd_type(u32 tx_flags)
  3177. {
  3178. /* set type for advanced descriptor with frame checksum insertion */
  3179. __le32 cmd_type = cpu_to_le32(IXGBE_ADVTXD_DTYP_DATA |
  3180. IXGBE_ADVTXD_DCMD_IFCS |
  3181. IXGBE_ADVTXD_DCMD_DEXT);
  3182. /* set HW VLAN bit if VLAN is present */
  3183. if (tx_flags & IXGBE_TX_FLAGS_VLAN)
  3184. cmd_type |= cpu_to_le32(IXGBE_ADVTXD_DCMD_VLE);
  3185. /* set segmentation enable bits for TSO/FSO */
  3186. if (tx_flags & IXGBE_TX_FLAGS_TSO)
  3187. cmd_type |= cpu_to_le32(IXGBE_ADVTXD_DCMD_TSE);
  3188. return cmd_type;
  3189. }
  3190. static void ixgbevf_tx_olinfo_status(union ixgbe_adv_tx_desc *tx_desc,
  3191. u32 tx_flags, unsigned int paylen)
  3192. {
  3193. __le32 olinfo_status = cpu_to_le32(paylen << IXGBE_ADVTXD_PAYLEN_SHIFT);
  3194. /* enable L4 checksum for TSO and TX checksum offload */
  3195. if (tx_flags & IXGBE_TX_FLAGS_CSUM)
  3196. olinfo_status |= cpu_to_le32(IXGBE_ADVTXD_POPTS_TXSM);
  3197. /* enble IPv4 checksum for TSO */
  3198. if (tx_flags & IXGBE_TX_FLAGS_IPV4)
  3199. olinfo_status |= cpu_to_le32(IXGBE_ADVTXD_POPTS_IXSM);
  3200. /* use index 1 context for TSO/FSO/FCOE */
  3201. if (tx_flags & IXGBE_TX_FLAGS_TSO)
  3202. olinfo_status |= cpu_to_le32(1u << IXGBE_ADVTXD_IDX_SHIFT);
  3203. /* Check Context must be set if Tx switch is enabled, which it
  3204. * always is for case where virtual functions are running
  3205. */
  3206. olinfo_status |= cpu_to_le32(IXGBE_ADVTXD_CC);
  3207. tx_desc->read.olinfo_status = olinfo_status;
  3208. }
  3209. static void ixgbevf_tx_map(struct ixgbevf_ring *tx_ring,
  3210. struct ixgbevf_tx_buffer *first,
  3211. const u8 hdr_len)
  3212. {
  3213. struct sk_buff *skb = first->skb;
  3214. struct ixgbevf_tx_buffer *tx_buffer;
  3215. union ixgbe_adv_tx_desc *tx_desc;
  3216. struct skb_frag_struct *frag;
  3217. dma_addr_t dma;
  3218. unsigned int data_len, size;
  3219. u32 tx_flags = first->tx_flags;
  3220. __le32 cmd_type = ixgbevf_tx_cmd_type(tx_flags);
  3221. u16 i = tx_ring->next_to_use;
  3222. tx_desc = IXGBEVF_TX_DESC(tx_ring, i);
  3223. ixgbevf_tx_olinfo_status(tx_desc, tx_flags, skb->len - hdr_len);
  3224. size = skb_headlen(skb);
  3225. data_len = skb->data_len;
  3226. dma = dma_map_single(tx_ring->dev, skb->data, size, DMA_TO_DEVICE);
  3227. tx_buffer = first;
  3228. for (frag = &skb_shinfo(skb)->frags[0];; frag++) {
  3229. if (dma_mapping_error(tx_ring->dev, dma))
  3230. goto dma_error;
  3231. /* record length, and DMA address */
  3232. dma_unmap_len_set(tx_buffer, len, size);
  3233. dma_unmap_addr_set(tx_buffer, dma, dma);
  3234. tx_desc->read.buffer_addr = cpu_to_le64(dma);
  3235. while (unlikely(size > IXGBE_MAX_DATA_PER_TXD)) {
  3236. tx_desc->read.cmd_type_len =
  3237. cmd_type | cpu_to_le32(IXGBE_MAX_DATA_PER_TXD);
  3238. i++;
  3239. tx_desc++;
  3240. if (i == tx_ring->count) {
  3241. tx_desc = IXGBEVF_TX_DESC(tx_ring, 0);
  3242. i = 0;
  3243. }
  3244. tx_desc->read.olinfo_status = 0;
  3245. dma += IXGBE_MAX_DATA_PER_TXD;
  3246. size -= IXGBE_MAX_DATA_PER_TXD;
  3247. tx_desc->read.buffer_addr = cpu_to_le64(dma);
  3248. }
  3249. if (likely(!data_len))
  3250. break;
  3251. tx_desc->read.cmd_type_len = cmd_type | cpu_to_le32(size);
  3252. i++;
  3253. tx_desc++;
  3254. if (i == tx_ring->count) {
  3255. tx_desc = IXGBEVF_TX_DESC(tx_ring, 0);
  3256. i = 0;
  3257. }
  3258. tx_desc->read.olinfo_status = 0;
  3259. size = skb_frag_size(frag);
  3260. data_len -= size;
  3261. dma = skb_frag_dma_map(tx_ring->dev, frag, 0, size,
  3262. DMA_TO_DEVICE);
  3263. tx_buffer = &tx_ring->tx_buffer_info[i];
  3264. }
  3265. /* write last descriptor with RS and EOP bits */
  3266. cmd_type |= cpu_to_le32(size) | cpu_to_le32(IXGBE_TXD_CMD);
  3267. tx_desc->read.cmd_type_len = cmd_type;
  3268. /* set the timestamp */
  3269. first->time_stamp = jiffies;
  3270. /* Force memory writes to complete before letting h/w know there
  3271. * are new descriptors to fetch. (Only applicable for weak-ordered
  3272. * memory model archs, such as IA-64).
  3273. *
  3274. * We also need this memory barrier (wmb) to make certain all of the
  3275. * status bits have been updated before next_to_watch is written.
  3276. */
  3277. wmb();
  3278. /* set next_to_watch value indicating a packet is present */
  3279. first->next_to_watch = tx_desc;
  3280. i++;
  3281. if (i == tx_ring->count)
  3282. i = 0;
  3283. tx_ring->next_to_use = i;
  3284. /* notify HW of packet */
  3285. ixgbevf_write_tail(tx_ring, i);
  3286. return;
  3287. dma_error:
  3288. dev_err(tx_ring->dev, "TX DMA map failed\n");
  3289. tx_buffer = &tx_ring->tx_buffer_info[i];
  3290. /* clear dma mappings for failed tx_buffer_info map */
  3291. while (tx_buffer != first) {
  3292. if (dma_unmap_len(tx_buffer, len))
  3293. dma_unmap_page(tx_ring->dev,
  3294. dma_unmap_addr(tx_buffer, dma),
  3295. dma_unmap_len(tx_buffer, len),
  3296. DMA_TO_DEVICE);
  3297. dma_unmap_len_set(tx_buffer, len, 0);
  3298. if (i-- == 0)
  3299. i += tx_ring->count;
  3300. tx_buffer = &tx_ring->tx_buffer_info[i];
  3301. }
  3302. if (dma_unmap_len(tx_buffer, len))
  3303. dma_unmap_single(tx_ring->dev,
  3304. dma_unmap_addr(tx_buffer, dma),
  3305. dma_unmap_len(tx_buffer, len),
  3306. DMA_TO_DEVICE);
  3307. dma_unmap_len_set(tx_buffer, len, 0);
  3308. dev_kfree_skb_any(tx_buffer->skb);
  3309. tx_buffer->skb = NULL;
  3310. tx_ring->next_to_use = i;
  3311. }
  3312. static int __ixgbevf_maybe_stop_tx(struct ixgbevf_ring *tx_ring, int size)
  3313. {
  3314. netif_stop_subqueue(tx_ring->netdev, tx_ring->queue_index);
  3315. /* Herbert's original patch had:
  3316. * smp_mb__after_netif_stop_queue();
  3317. * but since that doesn't exist yet, just open code it.
  3318. */
  3319. smp_mb();
  3320. /* We need to check again in a case another CPU has just
  3321. * made room available.
  3322. */
  3323. if (likely(ixgbevf_desc_unused(tx_ring) < size))
  3324. return -EBUSY;
  3325. /* A reprieve! - use start_queue because it doesn't call schedule */
  3326. netif_start_subqueue(tx_ring->netdev, tx_ring->queue_index);
  3327. ++tx_ring->tx_stats.restart_queue;
  3328. return 0;
  3329. }
  3330. static int ixgbevf_maybe_stop_tx(struct ixgbevf_ring *tx_ring, int size)
  3331. {
  3332. if (likely(ixgbevf_desc_unused(tx_ring) >= size))
  3333. return 0;
  3334. return __ixgbevf_maybe_stop_tx(tx_ring, size);
  3335. }
  3336. static int ixgbevf_xmit_frame_ring(struct sk_buff *skb,
  3337. struct ixgbevf_ring *tx_ring)
  3338. {
  3339. struct ixgbevf_tx_buffer *first;
  3340. int tso;
  3341. u32 tx_flags = 0;
  3342. u16 count = TXD_USE_COUNT(skb_headlen(skb));
  3343. #if PAGE_SIZE > IXGBE_MAX_DATA_PER_TXD
  3344. unsigned short f;
  3345. #endif
  3346. u8 hdr_len = 0;
  3347. u8 *dst_mac = skb_header_pointer(skb, 0, 0, NULL);
  3348. if (!dst_mac || is_link_local_ether_addr(dst_mac)) {
  3349. dev_kfree_skb_any(skb);
  3350. return NETDEV_TX_OK;
  3351. }
  3352. /* need: 1 descriptor per page * PAGE_SIZE/IXGBE_MAX_DATA_PER_TXD,
  3353. * + 1 desc for skb_headlen/IXGBE_MAX_DATA_PER_TXD,
  3354. * + 2 desc gap to keep tail from touching head,
  3355. * + 1 desc for context descriptor,
  3356. * otherwise try next time
  3357. */
  3358. #if PAGE_SIZE > IXGBE_MAX_DATA_PER_TXD
  3359. for (f = 0; f < skb_shinfo(skb)->nr_frags; f++)
  3360. count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size);
  3361. #else
  3362. count += skb_shinfo(skb)->nr_frags;
  3363. #endif
  3364. if (ixgbevf_maybe_stop_tx(tx_ring, count + 3)) {
  3365. tx_ring->tx_stats.tx_busy++;
  3366. return NETDEV_TX_BUSY;
  3367. }
  3368. /* record the location of the first descriptor for this packet */
  3369. first = &tx_ring->tx_buffer_info[tx_ring->next_to_use];
  3370. first->skb = skb;
  3371. first->bytecount = skb->len;
  3372. first->gso_segs = 1;
  3373. if (skb_vlan_tag_present(skb)) {
  3374. tx_flags |= skb_vlan_tag_get(skb);
  3375. tx_flags <<= IXGBE_TX_FLAGS_VLAN_SHIFT;
  3376. tx_flags |= IXGBE_TX_FLAGS_VLAN;
  3377. }
  3378. /* record initial flags and protocol */
  3379. first->tx_flags = tx_flags;
  3380. first->protocol = vlan_get_protocol(skb);
  3381. tso = ixgbevf_tso(tx_ring, first, &hdr_len);
  3382. if (tso < 0)
  3383. goto out_drop;
  3384. else if (!tso)
  3385. ixgbevf_tx_csum(tx_ring, first);
  3386. ixgbevf_tx_map(tx_ring, first, hdr_len);
  3387. ixgbevf_maybe_stop_tx(tx_ring, DESC_NEEDED);
  3388. return NETDEV_TX_OK;
  3389. out_drop:
  3390. dev_kfree_skb_any(first->skb);
  3391. first->skb = NULL;
  3392. return NETDEV_TX_OK;
  3393. }
  3394. static netdev_tx_t ixgbevf_xmit_frame(struct sk_buff *skb, struct net_device *netdev)
  3395. {
  3396. struct ixgbevf_adapter *adapter = netdev_priv(netdev);
  3397. struct ixgbevf_ring *tx_ring;
  3398. if (skb->len <= 0) {
  3399. dev_kfree_skb_any(skb);
  3400. return NETDEV_TX_OK;
  3401. }
  3402. /* The minimum packet size for olinfo paylen is 17 so pad the skb
  3403. * in order to meet this minimum size requirement.
  3404. */
  3405. if (skb->len < 17) {
  3406. if (skb_padto(skb, 17))
  3407. return NETDEV_TX_OK;
  3408. skb->len = 17;
  3409. }
  3410. tx_ring = adapter->tx_ring[skb->queue_mapping];
  3411. return ixgbevf_xmit_frame_ring(skb, tx_ring);
  3412. }
  3413. /**
  3414. * ixgbevf_set_mac - Change the Ethernet Address of the NIC
  3415. * @netdev: network interface device structure
  3416. * @p: pointer to an address structure
  3417. *
  3418. * Returns 0 on success, negative on failure
  3419. **/
  3420. static int ixgbevf_set_mac(struct net_device *netdev, void *p)
  3421. {
  3422. struct ixgbevf_adapter *adapter = netdev_priv(netdev);
  3423. struct ixgbe_hw *hw = &adapter->hw;
  3424. struct sockaddr *addr = p;
  3425. int err;
  3426. if (!is_valid_ether_addr(addr->sa_data))
  3427. return -EADDRNOTAVAIL;
  3428. spin_lock_bh(&adapter->mbx_lock);
  3429. err = hw->mac.ops.set_rar(hw, 0, addr->sa_data, 0);
  3430. spin_unlock_bh(&adapter->mbx_lock);
  3431. if (err)
  3432. return -EPERM;
  3433. ether_addr_copy(hw->mac.addr, addr->sa_data);
  3434. ether_addr_copy(hw->mac.perm_addr, addr->sa_data);
  3435. ether_addr_copy(netdev->dev_addr, addr->sa_data);
  3436. return 0;
  3437. }
  3438. /**
  3439. * ixgbevf_change_mtu - Change the Maximum Transfer Unit
  3440. * @netdev: network interface device structure
  3441. * @new_mtu: new value for maximum frame size
  3442. *
  3443. * Returns 0 on success, negative on failure
  3444. **/
  3445. static int ixgbevf_change_mtu(struct net_device *netdev, int new_mtu)
  3446. {
  3447. struct ixgbevf_adapter *adapter = netdev_priv(netdev);
  3448. struct ixgbe_hw *hw = &adapter->hw;
  3449. int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN;
  3450. int ret;
  3451. /* prevent MTU being changed to a size unsupported by XDP */
  3452. if (adapter->xdp_prog) {
  3453. dev_warn(&adapter->pdev->dev, "MTU cannot be changed while XDP program is loaded\n");
  3454. return -EPERM;
  3455. }
  3456. spin_lock_bh(&adapter->mbx_lock);
  3457. /* notify the PF of our intent to use this size of frame */
  3458. ret = hw->mac.ops.set_rlpml(hw, max_frame);
  3459. spin_unlock_bh(&adapter->mbx_lock);
  3460. if (ret)
  3461. return -EINVAL;
  3462. hw_dbg(hw, "changing MTU from %d to %d\n",
  3463. netdev->mtu, new_mtu);
  3464. /* must set new MTU before calling down or up */
  3465. netdev->mtu = new_mtu;
  3466. if (netif_running(netdev))
  3467. ixgbevf_reinit_locked(adapter);
  3468. return 0;
  3469. }
  3470. #ifdef CONFIG_NET_POLL_CONTROLLER
  3471. /* Polling 'interrupt' - used by things like netconsole to send skbs
  3472. * without having to re-enable interrupts. It's not called while
  3473. * the interrupt routine is executing.
  3474. */
  3475. static void ixgbevf_netpoll(struct net_device *netdev)
  3476. {
  3477. struct ixgbevf_adapter *adapter = netdev_priv(netdev);
  3478. int i;
  3479. /* if interface is down do nothing */
  3480. if (test_bit(__IXGBEVF_DOWN, &adapter->state))
  3481. return;
  3482. for (i = 0; i < adapter->num_rx_queues; i++)
  3483. ixgbevf_msix_clean_rings(0, adapter->q_vector[i]);
  3484. }
  3485. #endif /* CONFIG_NET_POLL_CONTROLLER */
  3486. static int ixgbevf_suspend(struct pci_dev *pdev, pm_message_t state)
  3487. {
  3488. struct net_device *netdev = pci_get_drvdata(pdev);
  3489. struct ixgbevf_adapter *adapter = netdev_priv(netdev);
  3490. #ifdef CONFIG_PM
  3491. int retval = 0;
  3492. #endif
  3493. rtnl_lock();
  3494. netif_device_detach(netdev);
  3495. if (netif_running(netdev))
  3496. ixgbevf_close_suspend(adapter);
  3497. ixgbevf_clear_interrupt_scheme(adapter);
  3498. rtnl_unlock();
  3499. #ifdef CONFIG_PM
  3500. retval = pci_save_state(pdev);
  3501. if (retval)
  3502. return retval;
  3503. #endif
  3504. if (!test_and_set_bit(__IXGBEVF_DISABLED, &adapter->state))
  3505. pci_disable_device(pdev);
  3506. return 0;
  3507. }
  3508. #ifdef CONFIG_PM
  3509. static int ixgbevf_resume(struct pci_dev *pdev)
  3510. {
  3511. struct net_device *netdev = pci_get_drvdata(pdev);
  3512. struct ixgbevf_adapter *adapter = netdev_priv(netdev);
  3513. u32 err;
  3514. pci_restore_state(pdev);
  3515. /* pci_restore_state clears dev->state_saved so call
  3516. * pci_save_state to restore it.
  3517. */
  3518. pci_save_state(pdev);
  3519. err = pci_enable_device_mem(pdev);
  3520. if (err) {
  3521. dev_err(&pdev->dev, "Cannot enable PCI device from suspend\n");
  3522. return err;
  3523. }
  3524. adapter->hw.hw_addr = adapter->io_addr;
  3525. smp_mb__before_atomic();
  3526. clear_bit(__IXGBEVF_DISABLED, &adapter->state);
  3527. pci_set_master(pdev);
  3528. ixgbevf_reset(adapter);
  3529. rtnl_lock();
  3530. err = ixgbevf_init_interrupt_scheme(adapter);
  3531. if (!err && netif_running(netdev))
  3532. err = ixgbevf_open(netdev);
  3533. rtnl_unlock();
  3534. if (err)
  3535. return err;
  3536. netif_device_attach(netdev);
  3537. return err;
  3538. }
  3539. #endif /* CONFIG_PM */
  3540. static void ixgbevf_shutdown(struct pci_dev *pdev)
  3541. {
  3542. ixgbevf_suspend(pdev, PMSG_SUSPEND);
  3543. }
  3544. static void ixgbevf_get_tx_ring_stats(struct rtnl_link_stats64 *stats,
  3545. const struct ixgbevf_ring *ring)
  3546. {
  3547. u64 bytes, packets;
  3548. unsigned int start;
  3549. if (ring) {
  3550. do {
  3551. start = u64_stats_fetch_begin_irq(&ring->syncp);
  3552. bytes = ring->stats.bytes;
  3553. packets = ring->stats.packets;
  3554. } while (u64_stats_fetch_retry_irq(&ring->syncp, start));
  3555. stats->tx_bytes += bytes;
  3556. stats->tx_packets += packets;
  3557. }
  3558. }
  3559. static void ixgbevf_get_stats(struct net_device *netdev,
  3560. struct rtnl_link_stats64 *stats)
  3561. {
  3562. struct ixgbevf_adapter *adapter = netdev_priv(netdev);
  3563. unsigned int start;
  3564. u64 bytes, packets;
  3565. const struct ixgbevf_ring *ring;
  3566. int i;
  3567. ixgbevf_update_stats(adapter);
  3568. stats->multicast = adapter->stats.vfmprc - adapter->stats.base_vfmprc;
  3569. rcu_read_lock();
  3570. for (i = 0; i < adapter->num_rx_queues; i++) {
  3571. ring = adapter->rx_ring[i];
  3572. do {
  3573. start = u64_stats_fetch_begin_irq(&ring->syncp);
  3574. bytes = ring->stats.bytes;
  3575. packets = ring->stats.packets;
  3576. } while (u64_stats_fetch_retry_irq(&ring->syncp, start));
  3577. stats->rx_bytes += bytes;
  3578. stats->rx_packets += packets;
  3579. }
  3580. for (i = 0; i < adapter->num_tx_queues; i++) {
  3581. ring = adapter->tx_ring[i];
  3582. ixgbevf_get_tx_ring_stats(stats, ring);
  3583. }
  3584. for (i = 0; i < adapter->num_xdp_queues; i++) {
  3585. ring = adapter->xdp_ring[i];
  3586. ixgbevf_get_tx_ring_stats(stats, ring);
  3587. }
  3588. rcu_read_unlock();
  3589. }
  3590. #define IXGBEVF_MAX_MAC_HDR_LEN 127
  3591. #define IXGBEVF_MAX_NETWORK_HDR_LEN 511
  3592. static netdev_features_t
  3593. ixgbevf_features_check(struct sk_buff *skb, struct net_device *dev,
  3594. netdev_features_t features)
  3595. {
  3596. unsigned int network_hdr_len, mac_hdr_len;
  3597. /* Make certain the headers can be described by a context descriptor */
  3598. mac_hdr_len = skb_network_header(skb) - skb->data;
  3599. if (unlikely(mac_hdr_len > IXGBEVF_MAX_MAC_HDR_LEN))
  3600. return features & ~(NETIF_F_HW_CSUM |
  3601. NETIF_F_SCTP_CRC |
  3602. NETIF_F_HW_VLAN_CTAG_TX |
  3603. NETIF_F_TSO |
  3604. NETIF_F_TSO6);
  3605. network_hdr_len = skb_checksum_start(skb) - skb_network_header(skb);
  3606. if (unlikely(network_hdr_len > IXGBEVF_MAX_NETWORK_HDR_LEN))
  3607. return features & ~(NETIF_F_HW_CSUM |
  3608. NETIF_F_SCTP_CRC |
  3609. NETIF_F_TSO |
  3610. NETIF_F_TSO6);
  3611. /* We can only support IPV4 TSO in tunnels if we can mangle the
  3612. * inner IP ID field, so strip TSO if MANGLEID is not supported.
  3613. */
  3614. if (skb->encapsulation && !(features & NETIF_F_TSO_MANGLEID))
  3615. features &= ~NETIF_F_TSO;
  3616. return features;
  3617. }
  3618. static int ixgbevf_xdp_setup(struct net_device *dev, struct bpf_prog *prog)
  3619. {
  3620. int i, frame_size = dev->mtu + ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN;
  3621. struct ixgbevf_adapter *adapter = netdev_priv(dev);
  3622. struct bpf_prog *old_prog;
  3623. /* verify ixgbevf ring attributes are sufficient for XDP */
  3624. for (i = 0; i < adapter->num_rx_queues; i++) {
  3625. struct ixgbevf_ring *ring = adapter->rx_ring[i];
  3626. if (frame_size > ixgbevf_rx_bufsz(ring))
  3627. return -EINVAL;
  3628. }
  3629. old_prog = xchg(&adapter->xdp_prog, prog);
  3630. /* If transitioning XDP modes reconfigure rings */
  3631. if (!!prog != !!old_prog) {
  3632. /* Hardware has to reinitialize queues and interrupts to
  3633. * match packet buffer alignment. Unfortunately, the
  3634. * hardware is not flexible enough to do this dynamically.
  3635. */
  3636. if (netif_running(dev))
  3637. ixgbevf_close(dev);
  3638. ixgbevf_clear_interrupt_scheme(adapter);
  3639. ixgbevf_init_interrupt_scheme(adapter);
  3640. if (netif_running(dev))
  3641. ixgbevf_open(dev);
  3642. } else {
  3643. for (i = 0; i < adapter->num_rx_queues; i++)
  3644. xchg(&adapter->rx_ring[i]->xdp_prog, adapter->xdp_prog);
  3645. }
  3646. if (old_prog)
  3647. bpf_prog_put(old_prog);
  3648. return 0;
  3649. }
  3650. static int ixgbevf_xdp(struct net_device *dev, struct netdev_bpf *xdp)
  3651. {
  3652. struct ixgbevf_adapter *adapter = netdev_priv(dev);
  3653. switch (xdp->command) {
  3654. case XDP_SETUP_PROG:
  3655. return ixgbevf_xdp_setup(dev, xdp->prog);
  3656. case XDP_QUERY_PROG:
  3657. xdp->prog_attached = !!(adapter->xdp_prog);
  3658. xdp->prog_id = adapter->xdp_prog ?
  3659. adapter->xdp_prog->aux->id : 0;
  3660. return 0;
  3661. default:
  3662. return -EINVAL;
  3663. }
  3664. }
  3665. static const struct net_device_ops ixgbevf_netdev_ops = {
  3666. .ndo_open = ixgbevf_open,
  3667. .ndo_stop = ixgbevf_close,
  3668. .ndo_start_xmit = ixgbevf_xmit_frame,
  3669. .ndo_set_rx_mode = ixgbevf_set_rx_mode,
  3670. .ndo_get_stats64 = ixgbevf_get_stats,
  3671. .ndo_validate_addr = eth_validate_addr,
  3672. .ndo_set_mac_address = ixgbevf_set_mac,
  3673. .ndo_change_mtu = ixgbevf_change_mtu,
  3674. .ndo_tx_timeout = ixgbevf_tx_timeout,
  3675. .ndo_vlan_rx_add_vid = ixgbevf_vlan_rx_add_vid,
  3676. .ndo_vlan_rx_kill_vid = ixgbevf_vlan_rx_kill_vid,
  3677. #ifdef CONFIG_NET_POLL_CONTROLLER
  3678. .ndo_poll_controller = ixgbevf_netpoll,
  3679. #endif
  3680. .ndo_features_check = ixgbevf_features_check,
  3681. .ndo_bpf = ixgbevf_xdp,
  3682. };
  3683. static void ixgbevf_assign_netdev_ops(struct net_device *dev)
  3684. {
  3685. dev->netdev_ops = &ixgbevf_netdev_ops;
  3686. ixgbevf_set_ethtool_ops(dev);
  3687. dev->watchdog_timeo = 5 * HZ;
  3688. }
  3689. /**
  3690. * ixgbevf_probe - Device Initialization Routine
  3691. * @pdev: PCI device information struct
  3692. * @ent: entry in ixgbevf_pci_tbl
  3693. *
  3694. * Returns 0 on success, negative on failure
  3695. *
  3696. * ixgbevf_probe initializes an adapter identified by a pci_dev structure.
  3697. * The OS initialization, configuring of the adapter private structure,
  3698. * and a hardware reset occur.
  3699. **/
  3700. static int ixgbevf_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
  3701. {
  3702. struct net_device *netdev;
  3703. struct ixgbevf_adapter *adapter = NULL;
  3704. struct ixgbe_hw *hw = NULL;
  3705. const struct ixgbevf_info *ii = ixgbevf_info_tbl[ent->driver_data];
  3706. int err, pci_using_dac;
  3707. bool disable_dev = false;
  3708. err = pci_enable_device(pdev);
  3709. if (err)
  3710. return err;
  3711. if (!dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64))) {
  3712. pci_using_dac = 1;
  3713. } else {
  3714. err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
  3715. if (err) {
  3716. dev_err(&pdev->dev, "No usable DMA configuration, aborting\n");
  3717. goto err_dma;
  3718. }
  3719. pci_using_dac = 0;
  3720. }
  3721. err = pci_request_regions(pdev, ixgbevf_driver_name);
  3722. if (err) {
  3723. dev_err(&pdev->dev, "pci_request_regions failed 0x%x\n", err);
  3724. goto err_pci_reg;
  3725. }
  3726. pci_set_master(pdev);
  3727. netdev = alloc_etherdev_mq(sizeof(struct ixgbevf_adapter),
  3728. MAX_TX_QUEUES);
  3729. if (!netdev) {
  3730. err = -ENOMEM;
  3731. goto err_alloc_etherdev;
  3732. }
  3733. SET_NETDEV_DEV(netdev, &pdev->dev);
  3734. adapter = netdev_priv(netdev);
  3735. adapter->netdev = netdev;
  3736. adapter->pdev = pdev;
  3737. hw = &adapter->hw;
  3738. hw->back = adapter;
  3739. adapter->msg_enable = netif_msg_init(debug, DEFAULT_MSG_ENABLE);
  3740. /* call save state here in standalone driver because it relies on
  3741. * adapter struct to exist, and needs to call netdev_priv
  3742. */
  3743. pci_save_state(pdev);
  3744. hw->hw_addr = ioremap(pci_resource_start(pdev, 0),
  3745. pci_resource_len(pdev, 0));
  3746. adapter->io_addr = hw->hw_addr;
  3747. if (!hw->hw_addr) {
  3748. err = -EIO;
  3749. goto err_ioremap;
  3750. }
  3751. ixgbevf_assign_netdev_ops(netdev);
  3752. /* Setup HW API */
  3753. memcpy(&hw->mac.ops, ii->mac_ops, sizeof(hw->mac.ops));
  3754. hw->mac.type = ii->mac;
  3755. memcpy(&hw->mbx.ops, &ixgbevf_mbx_ops,
  3756. sizeof(struct ixgbe_mbx_operations));
  3757. /* setup the private structure */
  3758. err = ixgbevf_sw_init(adapter);
  3759. if (err)
  3760. goto err_sw_init;
  3761. /* The HW MAC address was set and/or determined in sw_init */
  3762. if (!is_valid_ether_addr(netdev->dev_addr)) {
  3763. pr_err("invalid MAC address\n");
  3764. err = -EIO;
  3765. goto err_sw_init;
  3766. }
  3767. netdev->hw_features = NETIF_F_SG |
  3768. NETIF_F_TSO |
  3769. NETIF_F_TSO6 |
  3770. NETIF_F_RXCSUM |
  3771. NETIF_F_HW_CSUM |
  3772. NETIF_F_SCTP_CRC;
  3773. #define IXGBEVF_GSO_PARTIAL_FEATURES (NETIF_F_GSO_GRE | \
  3774. NETIF_F_GSO_GRE_CSUM | \
  3775. NETIF_F_GSO_IPXIP4 | \
  3776. NETIF_F_GSO_IPXIP6 | \
  3777. NETIF_F_GSO_UDP_TUNNEL | \
  3778. NETIF_F_GSO_UDP_TUNNEL_CSUM)
  3779. netdev->gso_partial_features = IXGBEVF_GSO_PARTIAL_FEATURES;
  3780. netdev->hw_features |= NETIF_F_GSO_PARTIAL |
  3781. IXGBEVF_GSO_PARTIAL_FEATURES;
  3782. netdev->features = netdev->hw_features;
  3783. if (pci_using_dac)
  3784. netdev->features |= NETIF_F_HIGHDMA;
  3785. netdev->vlan_features |= netdev->features | NETIF_F_TSO_MANGLEID;
  3786. netdev->mpls_features |= NETIF_F_SG |
  3787. NETIF_F_TSO |
  3788. NETIF_F_TSO6 |
  3789. NETIF_F_HW_CSUM;
  3790. netdev->mpls_features |= IXGBEVF_GSO_PARTIAL_FEATURES;
  3791. netdev->hw_enc_features |= netdev->vlan_features;
  3792. /* set this bit last since it cannot be part of vlan_features */
  3793. netdev->features |= NETIF_F_HW_VLAN_CTAG_FILTER |
  3794. NETIF_F_HW_VLAN_CTAG_RX |
  3795. NETIF_F_HW_VLAN_CTAG_TX;
  3796. netdev->priv_flags |= IFF_UNICAST_FLT;
  3797. /* MTU range: 68 - 1504 or 9710 */
  3798. netdev->min_mtu = ETH_MIN_MTU;
  3799. switch (adapter->hw.api_version) {
  3800. case ixgbe_mbox_api_11:
  3801. case ixgbe_mbox_api_12:
  3802. case ixgbe_mbox_api_13:
  3803. netdev->max_mtu = IXGBE_MAX_JUMBO_FRAME_SIZE -
  3804. (ETH_HLEN + ETH_FCS_LEN);
  3805. break;
  3806. default:
  3807. if (adapter->hw.mac.type != ixgbe_mac_82599_vf)
  3808. netdev->max_mtu = IXGBE_MAX_JUMBO_FRAME_SIZE -
  3809. (ETH_HLEN + ETH_FCS_LEN);
  3810. else
  3811. netdev->max_mtu = ETH_DATA_LEN + ETH_FCS_LEN;
  3812. break;
  3813. }
  3814. if (IXGBE_REMOVED(hw->hw_addr)) {
  3815. err = -EIO;
  3816. goto err_sw_init;
  3817. }
  3818. timer_setup(&adapter->service_timer, ixgbevf_service_timer, 0);
  3819. INIT_WORK(&adapter->service_task, ixgbevf_service_task);
  3820. set_bit(__IXGBEVF_SERVICE_INITED, &adapter->state);
  3821. clear_bit(__IXGBEVF_SERVICE_SCHED, &adapter->state);
  3822. err = ixgbevf_init_interrupt_scheme(adapter);
  3823. if (err)
  3824. goto err_sw_init;
  3825. strcpy(netdev->name, "eth%d");
  3826. err = register_netdev(netdev);
  3827. if (err)
  3828. goto err_register;
  3829. pci_set_drvdata(pdev, netdev);
  3830. netif_carrier_off(netdev);
  3831. ixgbevf_init_last_counter_stats(adapter);
  3832. /* print the VF info */
  3833. dev_info(&pdev->dev, "%pM\n", netdev->dev_addr);
  3834. dev_info(&pdev->dev, "MAC: %d\n", hw->mac.type);
  3835. switch (hw->mac.type) {
  3836. case ixgbe_mac_X550_vf:
  3837. dev_info(&pdev->dev, "Intel(R) X550 Virtual Function\n");
  3838. break;
  3839. case ixgbe_mac_X540_vf:
  3840. dev_info(&pdev->dev, "Intel(R) X540 Virtual Function\n");
  3841. break;
  3842. case ixgbe_mac_82599_vf:
  3843. default:
  3844. dev_info(&pdev->dev, "Intel(R) 82599 Virtual Function\n");
  3845. break;
  3846. }
  3847. return 0;
  3848. err_register:
  3849. ixgbevf_clear_interrupt_scheme(adapter);
  3850. err_sw_init:
  3851. ixgbevf_reset_interrupt_capability(adapter);
  3852. iounmap(adapter->io_addr);
  3853. kfree(adapter->rss_key);
  3854. err_ioremap:
  3855. disable_dev = !test_and_set_bit(__IXGBEVF_DISABLED, &adapter->state);
  3856. free_netdev(netdev);
  3857. err_alloc_etherdev:
  3858. pci_release_regions(pdev);
  3859. err_pci_reg:
  3860. err_dma:
  3861. if (!adapter || disable_dev)
  3862. pci_disable_device(pdev);
  3863. return err;
  3864. }
  3865. /**
  3866. * ixgbevf_remove - Device Removal Routine
  3867. * @pdev: PCI device information struct
  3868. *
  3869. * ixgbevf_remove is called by the PCI subsystem to alert the driver
  3870. * that it should release a PCI device. The could be caused by a
  3871. * Hot-Plug event, or because the driver is going to be removed from
  3872. * memory.
  3873. **/
  3874. static void ixgbevf_remove(struct pci_dev *pdev)
  3875. {
  3876. struct net_device *netdev = pci_get_drvdata(pdev);
  3877. struct ixgbevf_adapter *adapter;
  3878. bool disable_dev;
  3879. if (!netdev)
  3880. return;
  3881. adapter = netdev_priv(netdev);
  3882. set_bit(__IXGBEVF_REMOVING, &adapter->state);
  3883. cancel_work_sync(&adapter->service_task);
  3884. if (netdev->reg_state == NETREG_REGISTERED)
  3885. unregister_netdev(netdev);
  3886. ixgbevf_clear_interrupt_scheme(adapter);
  3887. ixgbevf_reset_interrupt_capability(adapter);
  3888. iounmap(adapter->io_addr);
  3889. pci_release_regions(pdev);
  3890. hw_dbg(&adapter->hw, "Remove complete\n");
  3891. kfree(adapter->rss_key);
  3892. disable_dev = !test_and_set_bit(__IXGBEVF_DISABLED, &adapter->state);
  3893. free_netdev(netdev);
  3894. if (disable_dev)
  3895. pci_disable_device(pdev);
  3896. }
  3897. /**
  3898. * ixgbevf_io_error_detected - called when PCI error is detected
  3899. * @pdev: Pointer to PCI device
  3900. * @state: The current pci connection state
  3901. *
  3902. * This function is called after a PCI bus error affecting
  3903. * this device has been detected.
  3904. **/
  3905. static pci_ers_result_t ixgbevf_io_error_detected(struct pci_dev *pdev,
  3906. pci_channel_state_t state)
  3907. {
  3908. struct net_device *netdev = pci_get_drvdata(pdev);
  3909. struct ixgbevf_adapter *adapter = netdev_priv(netdev);
  3910. if (!test_bit(__IXGBEVF_SERVICE_INITED, &adapter->state))
  3911. return PCI_ERS_RESULT_DISCONNECT;
  3912. rtnl_lock();
  3913. netif_device_detach(netdev);
  3914. if (netif_running(netdev))
  3915. ixgbevf_close_suspend(adapter);
  3916. if (state == pci_channel_io_perm_failure) {
  3917. rtnl_unlock();
  3918. return PCI_ERS_RESULT_DISCONNECT;
  3919. }
  3920. if (!test_and_set_bit(__IXGBEVF_DISABLED, &adapter->state))
  3921. pci_disable_device(pdev);
  3922. rtnl_unlock();
  3923. /* Request a slot slot reset. */
  3924. return PCI_ERS_RESULT_NEED_RESET;
  3925. }
  3926. /**
  3927. * ixgbevf_io_slot_reset - called after the pci bus has been reset.
  3928. * @pdev: Pointer to PCI device
  3929. *
  3930. * Restart the card from scratch, as if from a cold-boot. Implementation
  3931. * resembles the first-half of the ixgbevf_resume routine.
  3932. **/
  3933. static pci_ers_result_t ixgbevf_io_slot_reset(struct pci_dev *pdev)
  3934. {
  3935. struct net_device *netdev = pci_get_drvdata(pdev);
  3936. struct ixgbevf_adapter *adapter = netdev_priv(netdev);
  3937. if (pci_enable_device_mem(pdev)) {
  3938. dev_err(&pdev->dev,
  3939. "Cannot re-enable PCI device after reset.\n");
  3940. return PCI_ERS_RESULT_DISCONNECT;
  3941. }
  3942. adapter->hw.hw_addr = adapter->io_addr;
  3943. smp_mb__before_atomic();
  3944. clear_bit(__IXGBEVF_DISABLED, &adapter->state);
  3945. pci_set_master(pdev);
  3946. ixgbevf_reset(adapter);
  3947. return PCI_ERS_RESULT_RECOVERED;
  3948. }
  3949. /**
  3950. * ixgbevf_io_resume - called when traffic can start flowing again.
  3951. * @pdev: Pointer to PCI device
  3952. *
  3953. * This callback is called when the error recovery driver tells us that
  3954. * its OK to resume normal operation. Implementation resembles the
  3955. * second-half of the ixgbevf_resume routine.
  3956. **/
  3957. static void ixgbevf_io_resume(struct pci_dev *pdev)
  3958. {
  3959. struct net_device *netdev = pci_get_drvdata(pdev);
  3960. rtnl_lock();
  3961. if (netif_running(netdev))
  3962. ixgbevf_open(netdev);
  3963. netif_device_attach(netdev);
  3964. rtnl_unlock();
  3965. }
  3966. /* PCI Error Recovery (ERS) */
  3967. static const struct pci_error_handlers ixgbevf_err_handler = {
  3968. .error_detected = ixgbevf_io_error_detected,
  3969. .slot_reset = ixgbevf_io_slot_reset,
  3970. .resume = ixgbevf_io_resume,
  3971. };
  3972. static struct pci_driver ixgbevf_driver = {
  3973. .name = ixgbevf_driver_name,
  3974. .id_table = ixgbevf_pci_tbl,
  3975. .probe = ixgbevf_probe,
  3976. .remove = ixgbevf_remove,
  3977. #ifdef CONFIG_PM
  3978. /* Power Management Hooks */
  3979. .suspend = ixgbevf_suspend,
  3980. .resume = ixgbevf_resume,
  3981. #endif
  3982. .shutdown = ixgbevf_shutdown,
  3983. .err_handler = &ixgbevf_err_handler
  3984. };
  3985. /**
  3986. * ixgbevf_init_module - Driver Registration Routine
  3987. *
  3988. * ixgbevf_init_module is the first routine called when the driver is
  3989. * loaded. All it does is register with the PCI subsystem.
  3990. **/
  3991. static int __init ixgbevf_init_module(void)
  3992. {
  3993. pr_info("%s - version %s\n", ixgbevf_driver_string,
  3994. ixgbevf_driver_version);
  3995. pr_info("%s\n", ixgbevf_copyright);
  3996. ixgbevf_wq = create_singlethread_workqueue(ixgbevf_driver_name);
  3997. if (!ixgbevf_wq) {
  3998. pr_err("%s: Failed to create workqueue\n", ixgbevf_driver_name);
  3999. return -ENOMEM;
  4000. }
  4001. return pci_register_driver(&ixgbevf_driver);
  4002. }
  4003. module_init(ixgbevf_init_module);
  4004. /**
  4005. * ixgbevf_exit_module - Driver Exit Cleanup Routine
  4006. *
  4007. * ixgbevf_exit_module is called just before the driver is removed
  4008. * from memory.
  4009. **/
  4010. static void __exit ixgbevf_exit_module(void)
  4011. {
  4012. pci_unregister_driver(&ixgbevf_driver);
  4013. if (ixgbevf_wq) {
  4014. destroy_workqueue(ixgbevf_wq);
  4015. ixgbevf_wq = NULL;
  4016. }
  4017. }
  4018. #ifdef DEBUG
  4019. /**
  4020. * ixgbevf_get_hw_dev_name - return device name string
  4021. * used by hardware layer to print debugging information
  4022. * @hw: pointer to private hardware struct
  4023. **/
  4024. char *ixgbevf_get_hw_dev_name(struct ixgbe_hw *hw)
  4025. {
  4026. struct ixgbevf_adapter *adapter = hw->back;
  4027. return adapter->netdev->name;
  4028. }
  4029. #endif
  4030. module_exit(ixgbevf_exit_module);
  4031. /* ixgbevf_main.c */