omap3-igep.dtsi 4.7 KB

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  1. /*
  2. * Common device tree for IGEP boards based on AM/DM37x
  3. *
  4. * Copyright (C) 2012 Javier Martinez Canillas <javier@collabora.co.uk>
  5. * Copyright (C) 2012 Enric Balletbo i Serra <eballetbo@gmail.com>
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License version 2 as
  9. * published by the Free Software Foundation.
  10. */
  11. /dts-v1/;
  12. #include "omap36xx.dtsi"
  13. / {
  14. memory {
  15. device_type = "memory";
  16. reg = <0x80000000 0x20000000>; /* 512 MB */
  17. };
  18. sound {
  19. compatible = "ti,omap-twl4030";
  20. ti,model = "igep2";
  21. ti,mcbsp = <&mcbsp2>;
  22. };
  23. vdd33: regulator-vdd33 {
  24. compatible = "regulator-fixed";
  25. regulator-name = "vdd33";
  26. regulator-always-on;
  27. };
  28. };
  29. &omap3_pmx_core {
  30. uart1_pins: pinmux_uart1_pins {
  31. pinctrl-single,pins = <
  32. 0x152 (PIN_INPUT | MUX_MODE0) /* uart1_rx.uart1_rx */
  33. 0x14c (PIN_OUTPUT |MUX_MODE0) /* uart1_tx.uart1_tx */
  34. >;
  35. };
  36. uart3_pins: pinmux_uart3_pins {
  37. pinctrl-single,pins = <
  38. 0x16e (PIN_INPUT | MUX_MODE0) /* uart3_rx.uart3_rx */
  39. 0x170 (PIN_OUTPUT | MUX_MODE0) /* uart3_tx.uart3_tx */
  40. >;
  41. };
  42. mcbsp2_pins: pinmux_mcbsp2_pins {
  43. pinctrl-single,pins = <
  44. 0x10c (PIN_INPUT | MUX_MODE0) /* mcbsp2_fsx.mcbsp2_fsx */
  45. 0x10e (PIN_INPUT | MUX_MODE0) /* mcbsp2_clkx.mcbsp2_clkx */
  46. 0x110 (PIN_INPUT | MUX_MODE0) /* mcbsp2_dr.mcbsp2.dr */
  47. 0x112 (PIN_OUTPUT | MUX_MODE0) /* mcbsp2_dx.mcbsp2_dx */
  48. >;
  49. };
  50. mmc1_pins: pinmux_mmc1_pins {
  51. pinctrl-single,pins = <
  52. 0x114 (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_clk.sdmmc1_clk */
  53. 0x116 (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_cmd.sdmmc1_cmd */
  54. 0x118 (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat0.sdmmc1_dat0 */
  55. 0x11a (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat1.sdmmc1_dat1 */
  56. 0x11c (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat2.sdmmc1_dat2 */
  57. 0x11e (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat3.sdmmc1_dat3 */
  58. >;
  59. };
  60. mmc2_pins: pinmux_mmc2_pins {
  61. pinctrl-single,pins = <
  62. 0x128 (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_clk.sdmmc2_clk */
  63. 0x12a (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_cmd.sdmmc2_cmd */
  64. 0x12c (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat0.sdmmc2_dat0 */
  65. 0x12e (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat1.sdmmc2_dat1 */
  66. 0x130 (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat2.sdmmc2_dat2 */
  67. 0x132 (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat3.sdmmc2_dat3 */
  68. >;
  69. };
  70. i2c1_pins: pinmux_i2c1_pins {
  71. pinctrl-single,pins = <
  72. 0x18a (PIN_INPUT | MUX_MODE0) /* i2c1_scl.i2c1_scl */
  73. 0x18c (PIN_INPUT | MUX_MODE0) /* i2c1_sda.i2c1_sda */
  74. >;
  75. };
  76. i2c3_pins: pinmux_i2c3_pins {
  77. pinctrl-single,pins = <
  78. 0x192 (PIN_INPUT | MUX_MODE0) /* i2c3_scl.i2c3_scl */
  79. 0x194 (PIN_INPUT | MUX_MODE0) /* i2c3_sda.i2c3_sda */
  80. >;
  81. };
  82. };
  83. &gpmc {
  84. nand@0,0 {
  85. linux,mtd-name= "micron,mt29c4g96maz";
  86. reg = <0 0 4>; /* CS0, offset 0, IO size 4 */
  87. nand-bus-width = <16>;
  88. gpmc,device-width = <2>;
  89. ti,nand-ecc-opt = "bch8";
  90. gpmc,sync-clk-ps = <0>;
  91. gpmc,cs-on-ns = <0>;
  92. gpmc,cs-rd-off-ns = <44>;
  93. gpmc,cs-wr-off-ns = <44>;
  94. gpmc,adv-on-ns = <6>;
  95. gpmc,adv-rd-off-ns = <34>;
  96. gpmc,adv-wr-off-ns = <44>;
  97. gpmc,we-off-ns = <40>;
  98. gpmc,oe-off-ns = <54>;
  99. gpmc,access-ns = <64>;
  100. gpmc,rd-cycle-ns = <82>;
  101. gpmc,wr-cycle-ns = <82>;
  102. gpmc,wr-access-ns = <40>;
  103. gpmc,wr-data-mux-bus-ns = <0>;
  104. #address-cells = <1>;
  105. #size-cells = <1>;
  106. partition@0 {
  107. label = "SPL";
  108. reg = <0 0x100000>;
  109. };
  110. partition@80000 {
  111. label = "U-Boot";
  112. reg = <0x100000 0x180000>;
  113. };
  114. partition@1c0000 {
  115. label = "Environment";
  116. reg = <0x280000 0x100000>;
  117. };
  118. partition@280000 {
  119. label = "Kernel";
  120. reg = <0x380000 0x300000>;
  121. };
  122. partition@780000 {
  123. label = "Filesystem";
  124. reg = <0x680000 0x1f980000>;
  125. };
  126. };
  127. };
  128. &i2c1 {
  129. pinctrl-names = "default";
  130. pinctrl-0 = <&i2c1_pins>;
  131. clock-frequency = <2600000>;
  132. twl: twl@48 {
  133. reg = <0x48>;
  134. interrupts = <7>; /* SYS_NIRQ cascaded to intc */
  135. interrupt-parent = <&intc>;
  136. twl_audio: audio {
  137. compatible = "ti,twl4030-audio";
  138. codec {
  139. };
  140. };
  141. };
  142. };
  143. #include "twl4030.dtsi"
  144. #include "twl4030_omap3.dtsi"
  145. &i2c3 {
  146. pinctrl-names = "default";
  147. pinctrl-0 = <&i2c3_pins>;
  148. };
  149. &mcbsp2 {
  150. pinctrl-names = "default";
  151. pinctrl-0 = <&mcbsp2_pins>;
  152. status = "okay";
  153. };
  154. &mmc1 {
  155. pinctrl-names = "default";
  156. pinctrl-0 = <&mmc1_pins>;
  157. vmmc-supply = <&vmmc1>;
  158. vmmc_aux-supply = <&vsim>;
  159. bus-width = <4>;
  160. };
  161. &mmc3 {
  162. status = "disabled";
  163. };
  164. &uart1 {
  165. pinctrl-names = "default";
  166. pinctrl-0 = <&uart1_pins>;
  167. };
  168. &uart3 {
  169. pinctrl-names = "default";
  170. pinctrl-0 = <&uart3_pins>;
  171. };
  172. &twl_gpio {
  173. ti,use-leds;
  174. };
  175. &usb_otg_hs {
  176. interface-type = <0>;
  177. usb-phy = <&usb2_phy>;
  178. phys = <&usb2_phy>;
  179. phy-names = "usb2-phy";
  180. mode = <3>;
  181. power = <50>;
  182. };