fpga-mgr.c 9.5 KB

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  1. /*
  2. * FPGA Manager Core
  3. *
  4. * Copyright (C) 2013-2015 Altera Corporation
  5. *
  6. * With code from the mailing list:
  7. * Copyright (C) 2013 Xilinx, Inc.
  8. *
  9. * This program is free software; you can redistribute it and/or modify it
  10. * under the terms and conditions of the GNU General Public License,
  11. * version 2, as published by the Free Software Foundation.
  12. *
  13. * This program is distributed in the hope it will be useful, but WITHOUT
  14. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  15. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  16. * more details.
  17. *
  18. * You should have received a copy of the GNU General Public License along with
  19. * this program. If not, see <http://www.gnu.org/licenses/>.
  20. */
  21. #include <linux/firmware.h>
  22. #include <linux/fpga/fpga-mgr.h>
  23. #include <linux/idr.h>
  24. #include <linux/module.h>
  25. #include <linux/of.h>
  26. #include <linux/mutex.h>
  27. #include <linux/slab.h>
  28. static DEFINE_IDA(fpga_mgr_ida);
  29. static struct class *fpga_mgr_class;
  30. /**
  31. * fpga_mgr_buf_load - load fpga from image in buffer
  32. * @mgr: fpga manager
  33. * @flags: flags setting fpga confuration modes
  34. * @buf: buffer contain fpga image
  35. * @count: byte count of buf
  36. *
  37. * Step the low level fpga manager through the device-specific steps of getting
  38. * an FPGA ready to be configured, writing the image to it, then doing whatever
  39. * post-configuration steps necessary.
  40. *
  41. * Return: 0 on success, negative error code otherwise.
  42. */
  43. int fpga_mgr_buf_load(struct fpga_manager *mgr, u32 flags, const char *buf,
  44. size_t count)
  45. {
  46. struct device *dev = &mgr->dev;
  47. int ret;
  48. if (!mgr)
  49. return -ENODEV;
  50. /*
  51. * Call the low level driver's write_init function. This will do the
  52. * device-specific things to get the FPGA into the state where it is
  53. * ready to receive an FPGA image.
  54. */
  55. mgr->state = FPGA_MGR_STATE_WRITE_INIT;
  56. ret = mgr->mops->write_init(mgr, flags, buf, count);
  57. if (ret) {
  58. dev_err(dev, "Error preparing FPGA for writing\n");
  59. mgr->state = FPGA_MGR_STATE_WRITE_INIT_ERR;
  60. return ret;
  61. }
  62. /*
  63. * Write the FPGA image to the FPGA.
  64. */
  65. mgr->state = FPGA_MGR_STATE_WRITE;
  66. ret = mgr->mops->write(mgr, buf, count);
  67. if (ret) {
  68. dev_err(dev, "Error while writing image data to FPGA\n");
  69. mgr->state = FPGA_MGR_STATE_WRITE_ERR;
  70. return ret;
  71. }
  72. /*
  73. * After all the FPGA image has been written, do the device specific
  74. * steps to finish and set the FPGA into operating mode.
  75. */
  76. mgr->state = FPGA_MGR_STATE_WRITE_COMPLETE;
  77. ret = mgr->mops->write_complete(mgr, flags);
  78. if (ret) {
  79. dev_err(dev, "Error after writing image data to FPGA\n");
  80. mgr->state = FPGA_MGR_STATE_WRITE_COMPLETE_ERR;
  81. return ret;
  82. }
  83. mgr->state = FPGA_MGR_STATE_OPERATING;
  84. return 0;
  85. }
  86. EXPORT_SYMBOL_GPL(fpga_mgr_buf_load);
  87. /**
  88. * fpga_mgr_firmware_load - request firmware and load to fpga
  89. * @mgr: fpga manager
  90. * @flags: flags setting fpga confuration modes
  91. * @image_name: name of image file on the firmware search path
  92. *
  93. * Request an FPGA image using the firmware class, then write out to the FPGA.
  94. * Update the state before each step to provide info on what step failed if
  95. * there is a failure.
  96. *
  97. * Return: 0 on success, negative error code otherwise.
  98. */
  99. int fpga_mgr_firmware_load(struct fpga_manager *mgr, u32 flags,
  100. const char *image_name)
  101. {
  102. struct device *dev = &mgr->dev;
  103. const struct firmware *fw;
  104. int ret;
  105. if (!mgr)
  106. return -ENODEV;
  107. dev_info(dev, "writing %s to %s\n", image_name, mgr->name);
  108. mgr->state = FPGA_MGR_STATE_FIRMWARE_REQ;
  109. ret = request_firmware(&fw, image_name, dev);
  110. if (ret) {
  111. mgr->state = FPGA_MGR_STATE_FIRMWARE_REQ_ERR;
  112. dev_err(dev, "Error requesting firmware %s\n", image_name);
  113. return ret;
  114. }
  115. ret = fpga_mgr_buf_load(mgr, flags, fw->data, fw->size);
  116. if (ret)
  117. return ret;
  118. release_firmware(fw);
  119. return 0;
  120. }
  121. EXPORT_SYMBOL_GPL(fpga_mgr_firmware_load);
  122. static const char * const state_str[] = {
  123. [FPGA_MGR_STATE_UNKNOWN] = "unknown",
  124. [FPGA_MGR_STATE_POWER_OFF] = "power off",
  125. [FPGA_MGR_STATE_POWER_UP] = "power up",
  126. [FPGA_MGR_STATE_RESET] = "reset",
  127. /* requesting FPGA image from firmware */
  128. [FPGA_MGR_STATE_FIRMWARE_REQ] = "firmware request",
  129. [FPGA_MGR_STATE_FIRMWARE_REQ_ERR] = "firmware request error",
  130. /* Preparing FPGA to receive image */
  131. [FPGA_MGR_STATE_WRITE_INIT] = "write init",
  132. [FPGA_MGR_STATE_WRITE_INIT_ERR] = "write init error",
  133. /* Writing image to FPGA */
  134. [FPGA_MGR_STATE_WRITE] = "write",
  135. [FPGA_MGR_STATE_WRITE_ERR] = "write error",
  136. /* Finishing configuration after image has been written */
  137. [FPGA_MGR_STATE_WRITE_COMPLETE] = "write complete",
  138. [FPGA_MGR_STATE_WRITE_COMPLETE_ERR] = "write complete error",
  139. /* FPGA reports to be in normal operating mode */
  140. [FPGA_MGR_STATE_OPERATING] = "operating",
  141. };
  142. static ssize_t name_show(struct device *dev,
  143. struct device_attribute *attr, char *buf)
  144. {
  145. struct fpga_manager *mgr = to_fpga_manager(dev);
  146. return sprintf(buf, "%s\n", mgr->name);
  147. }
  148. static ssize_t state_show(struct device *dev,
  149. struct device_attribute *attr, char *buf)
  150. {
  151. struct fpga_manager *mgr = to_fpga_manager(dev);
  152. return sprintf(buf, "%s\n", state_str[mgr->state]);
  153. }
  154. static DEVICE_ATTR_RO(name);
  155. static DEVICE_ATTR_RO(state);
  156. static struct attribute *fpga_mgr_attrs[] = {
  157. &dev_attr_name.attr,
  158. &dev_attr_state.attr,
  159. NULL,
  160. };
  161. ATTRIBUTE_GROUPS(fpga_mgr);
  162. static int fpga_mgr_of_node_match(struct device *dev, const void *data)
  163. {
  164. return dev->of_node == data;
  165. }
  166. /**
  167. * of_fpga_mgr_get - get an exclusive reference to a fpga mgr
  168. * @node: device node
  169. *
  170. * Given a device node, get an exclusive reference to a fpga mgr.
  171. *
  172. * Return: fpga manager struct or IS_ERR() condition containing error code.
  173. */
  174. struct fpga_manager *of_fpga_mgr_get(struct device_node *node)
  175. {
  176. struct fpga_manager *mgr;
  177. struct device *dev;
  178. if (!node)
  179. return ERR_PTR(-EINVAL);
  180. dev = class_find_device(fpga_mgr_class, NULL, node,
  181. fpga_mgr_of_node_match);
  182. if (!dev)
  183. return ERR_PTR(-ENODEV);
  184. mgr = to_fpga_manager(dev);
  185. put_device(dev);
  186. if (!mgr)
  187. return ERR_PTR(-ENODEV);
  188. /* Get exclusive use of fpga manager */
  189. if (!mutex_trylock(&mgr->ref_mutex))
  190. return ERR_PTR(-EBUSY);
  191. if (!try_module_get(THIS_MODULE)) {
  192. mutex_unlock(&mgr->ref_mutex);
  193. return ERR_PTR(-ENODEV);
  194. }
  195. return mgr;
  196. }
  197. EXPORT_SYMBOL_GPL(of_fpga_mgr_get);
  198. /**
  199. * fpga_mgr_put - release a reference to a fpga manager
  200. * @mgr: fpga manager structure
  201. */
  202. void fpga_mgr_put(struct fpga_manager *mgr)
  203. {
  204. if (mgr) {
  205. module_put(THIS_MODULE);
  206. mutex_unlock(&mgr->ref_mutex);
  207. }
  208. }
  209. EXPORT_SYMBOL_GPL(fpga_mgr_put);
  210. /**
  211. * fpga_mgr_register - register a low level fpga manager driver
  212. * @dev: fpga manager device from pdev
  213. * @name: fpga manager name
  214. * @mops: pointer to structure of fpga manager ops
  215. * @priv: fpga manager private data
  216. *
  217. * Return: 0 on success, negative error code otherwise.
  218. */
  219. int fpga_mgr_register(struct device *dev, const char *name,
  220. const struct fpga_manager_ops *mops,
  221. void *priv)
  222. {
  223. struct fpga_manager *mgr;
  224. const char *dt_label;
  225. int id, ret;
  226. if (!mops || !mops->write_init || !mops->write ||
  227. !mops->write_complete || !mops->state) {
  228. dev_err(dev, "Attempt to register without fpga_manager_ops\n");
  229. return -EINVAL;
  230. }
  231. if (!name || !strlen(name)) {
  232. dev_err(dev, "Attempt to register with no name!\n");
  233. return -EINVAL;
  234. }
  235. mgr = kzalloc(sizeof(*mgr), GFP_KERNEL);
  236. if (!mgr)
  237. return -ENOMEM;
  238. id = ida_simple_get(&fpga_mgr_ida, 0, 0, GFP_KERNEL);
  239. if (id < 0) {
  240. ret = id;
  241. goto error_kfree;
  242. }
  243. mutex_init(&mgr->ref_mutex);
  244. mgr->name = name;
  245. mgr->mops = mops;
  246. mgr->priv = priv;
  247. /*
  248. * Initialize framework state by requesting low level driver read state
  249. * from device. FPGA may be in reset mode or may have been programmed
  250. * by bootloader or EEPROM.
  251. */
  252. mgr->state = mgr->mops->state(mgr);
  253. device_initialize(&mgr->dev);
  254. mgr->dev.class = fpga_mgr_class;
  255. mgr->dev.parent = dev;
  256. mgr->dev.of_node = dev->of_node;
  257. mgr->dev.id = id;
  258. dev_set_drvdata(dev, mgr);
  259. dt_label = of_get_property(mgr->dev.of_node, "label", NULL);
  260. if (dt_label)
  261. ret = dev_set_name(&mgr->dev, "%s", dt_label);
  262. else
  263. ret = dev_set_name(&mgr->dev, "fpga%d", id);
  264. ret = device_add(&mgr->dev);
  265. if (ret)
  266. goto error_device;
  267. dev_info(&mgr->dev, "%s registered\n", mgr->name);
  268. return 0;
  269. error_device:
  270. ida_simple_remove(&fpga_mgr_ida, id);
  271. error_kfree:
  272. kfree(mgr);
  273. return ret;
  274. }
  275. EXPORT_SYMBOL_GPL(fpga_mgr_register);
  276. /**
  277. * fpga_mgr_unregister - unregister a low level fpga manager driver
  278. * @dev: fpga manager device from pdev
  279. */
  280. void fpga_mgr_unregister(struct device *dev)
  281. {
  282. struct fpga_manager *mgr = dev_get_drvdata(dev);
  283. dev_info(&mgr->dev, "%s %s\n", __func__, mgr->name);
  284. /*
  285. * If the low level driver provides a method for putting fpga into
  286. * a desired state upon unregister, do it.
  287. */
  288. if (mgr->mops->fpga_remove)
  289. mgr->mops->fpga_remove(mgr);
  290. device_unregister(&mgr->dev);
  291. }
  292. EXPORT_SYMBOL_GPL(fpga_mgr_unregister);
  293. static void fpga_mgr_dev_release(struct device *dev)
  294. {
  295. struct fpga_manager *mgr = to_fpga_manager(dev);
  296. ida_simple_remove(&fpga_mgr_ida, mgr->dev.id);
  297. kfree(mgr);
  298. }
  299. static int __init fpga_mgr_class_init(void)
  300. {
  301. pr_info("FPGA manager framework\n");
  302. fpga_mgr_class = class_create(THIS_MODULE, "fpga_manager");
  303. if (IS_ERR(fpga_mgr_class))
  304. return PTR_ERR(fpga_mgr_class);
  305. fpga_mgr_class->dev_groups = fpga_mgr_groups;
  306. fpga_mgr_class->dev_release = fpga_mgr_dev_release;
  307. return 0;
  308. }
  309. static void __exit fpga_mgr_class_exit(void)
  310. {
  311. class_destroy(fpga_mgr_class);
  312. ida_destroy(&fpga_mgr_ida);
  313. }
  314. MODULE_AUTHOR("Alan Tull <atull@opensource.altera.com>");
  315. MODULE_DESCRIPTION("FPGA manager framework");
  316. MODULE_LICENSE("GPL v2");
  317. subsys_initcall(fpga_mgr_class_init);
  318. module_exit(fpga_mgr_class_exit);