bcm958742k.dts 2.4 KB

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  1. /*
  2. * BSD LICENSE
  3. *
  4. * Copyright(c) 2016-2017 Broadcom. All rights reserved.
  5. *
  6. * Redistribution and use in source and binary forms, with or without
  7. * modification, are permitted provided that the following conditions
  8. * are met:
  9. *
  10. * * Redistributions of source code must retain the above copyright
  11. * notice, this list of conditions and the following disclaimer.
  12. * * Redistributions in binary form must reproduce the above copyright
  13. * notice, this list of conditions and the following disclaimer in
  14. * the documentation and/or other materials provided with the
  15. * distribution.
  16. * * Neither the name of Broadcom nor the names of its
  17. * contributors may be used to endorse or promote products derived
  18. * from this software without specific prior written permission.
  19. *
  20. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  21. * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  22. * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  23. * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  24. * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  25. * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  26. * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  27. * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  28. * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  29. * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  30. * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  31. */
  32. /dts-v1/;
  33. #include "bcm958742-base.dtsi"
  34. / {
  35. compatible = "brcm,bcm958742k", "brcm,stingray";
  36. model = "Stingray Combo SVK (BCM958742K)";
  37. };
  38. &gphy0 {
  39. enet-phy-lane-swap;
  40. };
  41. &sdio0 {
  42. mmc-ddr-1_8v;
  43. };
  44. &uart2 {
  45. status = "okay";
  46. };
  47. &uart3 {
  48. status = "okay";
  49. };
  50. &ssp0 {
  51. pinctrl-0 = <&spi0_pins>;
  52. pinctrl-names = "default";
  53. cs-gpios = <&gpio_hsls 34 0>;
  54. status = "okay";
  55. spi-flash@0 {
  56. compatible = "jedec,spi-nor";
  57. reg = <0>;
  58. spi-max-frequency = <20000000>;
  59. #address-cells = <1>;
  60. #size-cells = <1>;
  61. };
  62. };
  63. &ssp1 {
  64. pinctrl-0 = <&spi1_pins>;
  65. pinctrl-names = "default";
  66. cs-gpios = <&gpio_hsls 96 0>;
  67. status = "okay";
  68. spi-flash@0 {
  69. compatible = "jedec,spi-nor";
  70. reg = <0>;
  71. spi-max-frequency = <20000000>;
  72. #address-cells = <1>;
  73. #size-cells = <1>;
  74. };
  75. };