smp.c 29 KB

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  1. /*
  2. * SMP related functions
  3. *
  4. * Copyright IBM Corp. 1999, 2012
  5. * Author(s): Denis Joseph Barrow,
  6. * Martin Schwidefsky <schwidefsky@de.ibm.com>,
  7. * Heiko Carstens <heiko.carstens@de.ibm.com>,
  8. *
  9. * based on other smp stuff by
  10. * (c) 1995 Alan Cox, CymruNET Ltd <alan@cymru.net>
  11. * (c) 1998 Ingo Molnar
  12. *
  13. * The code outside of smp.c uses logical cpu numbers, only smp.c does
  14. * the translation of logical to physical cpu ids. All new code that
  15. * operates on physical cpu numbers needs to go into smp.c.
  16. */
  17. #define KMSG_COMPONENT "cpu"
  18. #define pr_fmt(fmt) KMSG_COMPONENT ": " fmt
  19. #include <linux/workqueue.h>
  20. #include <linux/module.h>
  21. #include <linux/init.h>
  22. #include <linux/mm.h>
  23. #include <linux/err.h>
  24. #include <linux/spinlock.h>
  25. #include <linux/kernel_stat.h>
  26. #include <linux/delay.h>
  27. #include <linux/interrupt.h>
  28. #include <linux/irqflags.h>
  29. #include <linux/cpu.h>
  30. #include <linux/slab.h>
  31. #include <linux/crash_dump.h>
  32. #include <asm/asm-offsets.h>
  33. #include <asm/switch_to.h>
  34. #include <asm/facility.h>
  35. #include <asm/ipl.h>
  36. #include <asm/setup.h>
  37. #include <asm/irq.h>
  38. #include <asm/tlbflush.h>
  39. #include <asm/vtimer.h>
  40. #include <asm/lowcore.h>
  41. #include <asm/sclp.h>
  42. #include <asm/vdso.h>
  43. #include <asm/debug.h>
  44. #include <asm/os_info.h>
  45. #include <asm/sigp.h>
  46. #include <asm/idle.h>
  47. #include "entry.h"
  48. enum {
  49. ec_schedule = 0,
  50. ec_call_function_single,
  51. ec_stop_cpu,
  52. };
  53. enum {
  54. CPU_STATE_STANDBY,
  55. CPU_STATE_CONFIGURED,
  56. };
  57. static DEFINE_PER_CPU(struct cpu *, cpu_device);
  58. struct pcpu {
  59. struct _lowcore *lowcore; /* lowcore page(s) for the cpu */
  60. unsigned long ec_mask; /* bit mask for ec_xxx functions */
  61. signed char state; /* physical cpu state */
  62. signed char polarization; /* physical polarization */
  63. u16 address; /* physical cpu address */
  64. };
  65. static u8 boot_cpu_type;
  66. static struct pcpu pcpu_devices[NR_CPUS];
  67. unsigned int smp_cpu_mt_shift;
  68. EXPORT_SYMBOL(smp_cpu_mt_shift);
  69. unsigned int smp_cpu_mtid;
  70. EXPORT_SYMBOL(smp_cpu_mtid);
  71. static unsigned int smp_max_threads __initdata = -1U;
  72. static int __init early_nosmt(char *s)
  73. {
  74. smp_max_threads = 1;
  75. return 0;
  76. }
  77. early_param("nosmt", early_nosmt);
  78. static int __init early_smt(char *s)
  79. {
  80. get_option(&s, &smp_max_threads);
  81. return 0;
  82. }
  83. early_param("smt", early_smt);
  84. /*
  85. * The smp_cpu_state_mutex must be held when changing the state or polarization
  86. * member of a pcpu data structure within the pcpu_devices arreay.
  87. */
  88. DEFINE_MUTEX(smp_cpu_state_mutex);
  89. /*
  90. * Signal processor helper functions.
  91. */
  92. static inline int __pcpu_sigp_relax(u16 addr, u8 order, unsigned long parm,
  93. u32 *status)
  94. {
  95. int cc;
  96. while (1) {
  97. cc = __pcpu_sigp(addr, order, parm, NULL);
  98. if (cc != SIGP_CC_BUSY)
  99. return cc;
  100. cpu_relax();
  101. }
  102. }
  103. static int pcpu_sigp_retry(struct pcpu *pcpu, u8 order, u32 parm)
  104. {
  105. int cc, retry;
  106. for (retry = 0; ; retry++) {
  107. cc = __pcpu_sigp(pcpu->address, order, parm, NULL);
  108. if (cc != SIGP_CC_BUSY)
  109. break;
  110. if (retry >= 3)
  111. udelay(10);
  112. }
  113. return cc;
  114. }
  115. static inline int pcpu_stopped(struct pcpu *pcpu)
  116. {
  117. u32 uninitialized_var(status);
  118. if (__pcpu_sigp(pcpu->address, SIGP_SENSE,
  119. 0, &status) != SIGP_CC_STATUS_STORED)
  120. return 0;
  121. return !!(status & (SIGP_STATUS_CHECK_STOP|SIGP_STATUS_STOPPED));
  122. }
  123. static inline int pcpu_running(struct pcpu *pcpu)
  124. {
  125. if (__pcpu_sigp(pcpu->address, SIGP_SENSE_RUNNING,
  126. 0, NULL) != SIGP_CC_STATUS_STORED)
  127. return 1;
  128. /* Status stored condition code is equivalent to cpu not running. */
  129. return 0;
  130. }
  131. /*
  132. * Find struct pcpu by cpu address.
  133. */
  134. static struct pcpu *pcpu_find_address(const struct cpumask *mask, u16 address)
  135. {
  136. int cpu;
  137. for_each_cpu(cpu, mask)
  138. if (pcpu_devices[cpu].address == address)
  139. return pcpu_devices + cpu;
  140. return NULL;
  141. }
  142. static void pcpu_ec_call(struct pcpu *pcpu, int ec_bit)
  143. {
  144. int order;
  145. if (test_and_set_bit(ec_bit, &pcpu->ec_mask))
  146. return;
  147. order = pcpu_running(pcpu) ? SIGP_EXTERNAL_CALL : SIGP_EMERGENCY_SIGNAL;
  148. pcpu_sigp_retry(pcpu, order, 0);
  149. }
  150. #define ASYNC_FRAME_OFFSET (ASYNC_SIZE - STACK_FRAME_OVERHEAD - __PT_SIZE)
  151. #define PANIC_FRAME_OFFSET (PAGE_SIZE - STACK_FRAME_OVERHEAD - __PT_SIZE)
  152. static int pcpu_alloc_lowcore(struct pcpu *pcpu, int cpu)
  153. {
  154. unsigned long async_stack, panic_stack;
  155. struct _lowcore *lc;
  156. if (pcpu != &pcpu_devices[0]) {
  157. pcpu->lowcore = (struct _lowcore *)
  158. __get_free_pages(GFP_KERNEL | GFP_DMA, LC_ORDER);
  159. async_stack = __get_free_pages(GFP_KERNEL, ASYNC_ORDER);
  160. panic_stack = __get_free_page(GFP_KERNEL);
  161. if (!pcpu->lowcore || !panic_stack || !async_stack)
  162. goto out;
  163. } else {
  164. async_stack = pcpu->lowcore->async_stack - ASYNC_FRAME_OFFSET;
  165. panic_stack = pcpu->lowcore->panic_stack - PANIC_FRAME_OFFSET;
  166. }
  167. lc = pcpu->lowcore;
  168. memcpy(lc, &S390_lowcore, 512);
  169. memset((char *) lc + 512, 0, sizeof(*lc) - 512);
  170. lc->async_stack = async_stack + ASYNC_FRAME_OFFSET;
  171. lc->panic_stack = panic_stack + PANIC_FRAME_OFFSET;
  172. lc->cpu_nr = cpu;
  173. lc->spinlock_lockval = arch_spin_lockval(cpu);
  174. if (MACHINE_HAS_VX)
  175. lc->vector_save_area_addr =
  176. (unsigned long) &lc->vector_save_area;
  177. if (vdso_alloc_per_cpu(lc))
  178. goto out;
  179. lowcore_ptr[cpu] = lc;
  180. pcpu_sigp_retry(pcpu, SIGP_SET_PREFIX, (u32)(unsigned long) lc);
  181. return 0;
  182. out:
  183. if (pcpu != &pcpu_devices[0]) {
  184. free_page(panic_stack);
  185. free_pages(async_stack, ASYNC_ORDER);
  186. free_pages((unsigned long) pcpu->lowcore, LC_ORDER);
  187. }
  188. return -ENOMEM;
  189. }
  190. #ifdef CONFIG_HOTPLUG_CPU
  191. static void pcpu_free_lowcore(struct pcpu *pcpu)
  192. {
  193. pcpu_sigp_retry(pcpu, SIGP_SET_PREFIX, 0);
  194. lowcore_ptr[pcpu - pcpu_devices] = NULL;
  195. vdso_free_per_cpu(pcpu->lowcore);
  196. if (pcpu == &pcpu_devices[0])
  197. return;
  198. free_page(pcpu->lowcore->panic_stack-PANIC_FRAME_OFFSET);
  199. free_pages(pcpu->lowcore->async_stack-ASYNC_FRAME_OFFSET, ASYNC_ORDER);
  200. free_pages((unsigned long) pcpu->lowcore, LC_ORDER);
  201. }
  202. #endif /* CONFIG_HOTPLUG_CPU */
  203. static void pcpu_prepare_secondary(struct pcpu *pcpu, int cpu)
  204. {
  205. struct _lowcore *lc = pcpu->lowcore;
  206. if (MACHINE_HAS_TLB_LC)
  207. cpumask_set_cpu(cpu, &init_mm.context.cpu_attach_mask);
  208. cpumask_set_cpu(cpu, mm_cpumask(&init_mm));
  209. atomic_inc(&init_mm.context.attach_count);
  210. lc->cpu_nr = cpu;
  211. lc->spinlock_lockval = arch_spin_lockval(cpu);
  212. lc->percpu_offset = __per_cpu_offset[cpu];
  213. lc->kernel_asce = S390_lowcore.kernel_asce;
  214. lc->machine_flags = S390_lowcore.machine_flags;
  215. lc->user_timer = lc->system_timer = lc->steal_timer = 0;
  216. __ctl_store(lc->cregs_save_area, 0, 15);
  217. save_access_regs((unsigned int *) lc->access_regs_save_area);
  218. memcpy(lc->stfle_fac_list, S390_lowcore.stfle_fac_list,
  219. MAX_FACILITY_BIT/8);
  220. }
  221. static void pcpu_attach_task(struct pcpu *pcpu, struct task_struct *tsk)
  222. {
  223. struct _lowcore *lc = pcpu->lowcore;
  224. struct thread_info *ti = task_thread_info(tsk);
  225. lc->kernel_stack = (unsigned long) task_stack_page(tsk)
  226. + THREAD_SIZE - STACK_FRAME_OVERHEAD - sizeof(struct pt_regs);
  227. lc->thread_info = (unsigned long) task_thread_info(tsk);
  228. lc->current_task = (unsigned long) tsk;
  229. lc->user_timer = ti->user_timer;
  230. lc->system_timer = ti->system_timer;
  231. lc->steal_timer = 0;
  232. }
  233. static void pcpu_start_fn(struct pcpu *pcpu, void (*func)(void *), void *data)
  234. {
  235. struct _lowcore *lc = pcpu->lowcore;
  236. lc->restart_stack = lc->kernel_stack;
  237. lc->restart_fn = (unsigned long) func;
  238. lc->restart_data = (unsigned long) data;
  239. lc->restart_source = -1UL;
  240. pcpu_sigp_retry(pcpu, SIGP_RESTART, 0);
  241. }
  242. /*
  243. * Call function via PSW restart on pcpu and stop the current cpu.
  244. */
  245. static void pcpu_delegate(struct pcpu *pcpu, void (*func)(void *),
  246. void *data, unsigned long stack)
  247. {
  248. struct _lowcore *lc = lowcore_ptr[pcpu - pcpu_devices];
  249. unsigned long source_cpu = stap();
  250. __load_psw_mask(PSW_KERNEL_BITS);
  251. if (pcpu->address == source_cpu)
  252. func(data); /* should not return */
  253. /* Stop target cpu (if func returns this stops the current cpu). */
  254. pcpu_sigp_retry(pcpu, SIGP_STOP, 0);
  255. /* Restart func on the target cpu and stop the current cpu. */
  256. mem_assign_absolute(lc->restart_stack, stack);
  257. mem_assign_absolute(lc->restart_fn, (unsigned long) func);
  258. mem_assign_absolute(lc->restart_data, (unsigned long) data);
  259. mem_assign_absolute(lc->restart_source, source_cpu);
  260. asm volatile(
  261. "0: sigp 0,%0,%2 # sigp restart to target cpu\n"
  262. " brc 2,0b # busy, try again\n"
  263. "1: sigp 0,%1,%3 # sigp stop to current cpu\n"
  264. " brc 2,1b # busy, try again\n"
  265. : : "d" (pcpu->address), "d" (source_cpu),
  266. "K" (SIGP_RESTART), "K" (SIGP_STOP)
  267. : "0", "1", "cc");
  268. for (;;) ;
  269. }
  270. /*
  271. * Enable additional logical cpus for multi-threading.
  272. */
  273. static int pcpu_set_smt(unsigned int mtid)
  274. {
  275. register unsigned long reg1 asm ("1") = (unsigned long) mtid;
  276. int cc;
  277. if (smp_cpu_mtid == mtid)
  278. return 0;
  279. asm volatile(
  280. " sigp %1,0,%2 # sigp set multi-threading\n"
  281. " ipm %0\n"
  282. " srl %0,28\n"
  283. : "=d" (cc) : "d" (reg1), "K" (SIGP_SET_MULTI_THREADING)
  284. : "cc");
  285. if (cc == 0) {
  286. smp_cpu_mtid = mtid;
  287. smp_cpu_mt_shift = 0;
  288. while (smp_cpu_mtid >= (1U << smp_cpu_mt_shift))
  289. smp_cpu_mt_shift++;
  290. pcpu_devices[0].address = stap();
  291. }
  292. return cc;
  293. }
  294. /*
  295. * Call function on an online CPU.
  296. */
  297. void smp_call_online_cpu(void (*func)(void *), void *data)
  298. {
  299. struct pcpu *pcpu;
  300. /* Use the current cpu if it is online. */
  301. pcpu = pcpu_find_address(cpu_online_mask, stap());
  302. if (!pcpu)
  303. /* Use the first online cpu. */
  304. pcpu = pcpu_devices + cpumask_first(cpu_online_mask);
  305. pcpu_delegate(pcpu, func, data, (unsigned long) restart_stack);
  306. }
  307. /*
  308. * Call function on the ipl CPU.
  309. */
  310. void smp_call_ipl_cpu(void (*func)(void *), void *data)
  311. {
  312. pcpu_delegate(&pcpu_devices[0], func, data,
  313. pcpu_devices->lowcore->panic_stack -
  314. PANIC_FRAME_OFFSET + PAGE_SIZE);
  315. }
  316. int smp_find_processor_id(u16 address)
  317. {
  318. int cpu;
  319. for_each_present_cpu(cpu)
  320. if (pcpu_devices[cpu].address == address)
  321. return cpu;
  322. return -1;
  323. }
  324. int smp_vcpu_scheduled(int cpu)
  325. {
  326. return pcpu_running(pcpu_devices + cpu);
  327. }
  328. void smp_yield_cpu(int cpu)
  329. {
  330. if (MACHINE_HAS_DIAG9C)
  331. asm volatile("diag %0,0,0x9c"
  332. : : "d" (pcpu_devices[cpu].address));
  333. else if (MACHINE_HAS_DIAG44)
  334. asm volatile("diag 0,0,0x44");
  335. }
  336. /*
  337. * Send cpus emergency shutdown signal. This gives the cpus the
  338. * opportunity to complete outstanding interrupts.
  339. */
  340. static void smp_emergency_stop(cpumask_t *cpumask)
  341. {
  342. u64 end;
  343. int cpu;
  344. end = get_tod_clock() + (1000000UL << 12);
  345. for_each_cpu(cpu, cpumask) {
  346. struct pcpu *pcpu = pcpu_devices + cpu;
  347. set_bit(ec_stop_cpu, &pcpu->ec_mask);
  348. while (__pcpu_sigp(pcpu->address, SIGP_EMERGENCY_SIGNAL,
  349. 0, NULL) == SIGP_CC_BUSY &&
  350. get_tod_clock() < end)
  351. cpu_relax();
  352. }
  353. while (get_tod_clock() < end) {
  354. for_each_cpu(cpu, cpumask)
  355. if (pcpu_stopped(pcpu_devices + cpu))
  356. cpumask_clear_cpu(cpu, cpumask);
  357. if (cpumask_empty(cpumask))
  358. break;
  359. cpu_relax();
  360. }
  361. }
  362. /*
  363. * Stop all cpus but the current one.
  364. */
  365. void smp_send_stop(void)
  366. {
  367. cpumask_t cpumask;
  368. int cpu;
  369. /* Disable all interrupts/machine checks */
  370. __load_psw_mask(PSW_KERNEL_BITS | PSW_MASK_DAT);
  371. trace_hardirqs_off();
  372. debug_set_critical();
  373. cpumask_copy(&cpumask, cpu_online_mask);
  374. cpumask_clear_cpu(smp_processor_id(), &cpumask);
  375. if (oops_in_progress)
  376. smp_emergency_stop(&cpumask);
  377. /* stop all processors */
  378. for_each_cpu(cpu, &cpumask) {
  379. struct pcpu *pcpu = pcpu_devices + cpu;
  380. pcpu_sigp_retry(pcpu, SIGP_STOP, 0);
  381. while (!pcpu_stopped(pcpu))
  382. cpu_relax();
  383. }
  384. }
  385. /*
  386. * This is the main routine where commands issued by other
  387. * cpus are handled.
  388. */
  389. static void smp_handle_ext_call(void)
  390. {
  391. unsigned long bits;
  392. /* handle bit signal external calls */
  393. bits = xchg(&pcpu_devices[smp_processor_id()].ec_mask, 0);
  394. if (test_bit(ec_stop_cpu, &bits))
  395. smp_stop_cpu();
  396. if (test_bit(ec_schedule, &bits))
  397. scheduler_ipi();
  398. if (test_bit(ec_call_function_single, &bits))
  399. generic_smp_call_function_single_interrupt();
  400. }
  401. static void do_ext_call_interrupt(struct ext_code ext_code,
  402. unsigned int param32, unsigned long param64)
  403. {
  404. inc_irq_stat(ext_code.code == 0x1202 ? IRQEXT_EXC : IRQEXT_EMS);
  405. smp_handle_ext_call();
  406. }
  407. void arch_send_call_function_ipi_mask(const struct cpumask *mask)
  408. {
  409. int cpu;
  410. for_each_cpu(cpu, mask)
  411. pcpu_ec_call(pcpu_devices + cpu, ec_call_function_single);
  412. }
  413. void arch_send_call_function_single_ipi(int cpu)
  414. {
  415. pcpu_ec_call(pcpu_devices + cpu, ec_call_function_single);
  416. }
  417. /*
  418. * this function sends a 'reschedule' IPI to another CPU.
  419. * it goes straight through and wastes no time serializing
  420. * anything. Worst case is that we lose a reschedule ...
  421. */
  422. void smp_send_reschedule(int cpu)
  423. {
  424. pcpu_ec_call(pcpu_devices + cpu, ec_schedule);
  425. }
  426. /*
  427. * parameter area for the set/clear control bit callbacks
  428. */
  429. struct ec_creg_mask_parms {
  430. unsigned long orval;
  431. unsigned long andval;
  432. int cr;
  433. };
  434. /*
  435. * callback for setting/clearing control bits
  436. */
  437. static void smp_ctl_bit_callback(void *info)
  438. {
  439. struct ec_creg_mask_parms *pp = info;
  440. unsigned long cregs[16];
  441. __ctl_store(cregs, 0, 15);
  442. cregs[pp->cr] = (cregs[pp->cr] & pp->andval) | pp->orval;
  443. __ctl_load(cregs, 0, 15);
  444. }
  445. /*
  446. * Set a bit in a control register of all cpus
  447. */
  448. void smp_ctl_set_bit(int cr, int bit)
  449. {
  450. struct ec_creg_mask_parms parms = { 1UL << bit, -1UL, cr };
  451. on_each_cpu(smp_ctl_bit_callback, &parms, 1);
  452. }
  453. EXPORT_SYMBOL(smp_ctl_set_bit);
  454. /*
  455. * Clear a bit in a control register of all cpus
  456. */
  457. void smp_ctl_clear_bit(int cr, int bit)
  458. {
  459. struct ec_creg_mask_parms parms = { 0, ~(1UL << bit), cr };
  460. on_each_cpu(smp_ctl_bit_callback, &parms, 1);
  461. }
  462. EXPORT_SYMBOL(smp_ctl_clear_bit);
  463. #ifdef CONFIG_CRASH_DUMP
  464. static inline void __smp_store_cpu_state(int cpu, u16 address, int is_boot_cpu)
  465. {
  466. void *lc = pcpu_devices[0].lowcore;
  467. struct save_area_ext *sa_ext;
  468. unsigned long vx_sa;
  469. sa_ext = dump_save_area_create(cpu);
  470. if (!sa_ext)
  471. panic("could not allocate memory for save area\n");
  472. if (is_boot_cpu) {
  473. /* Copy the registers of the boot CPU. */
  474. copy_oldmem_page(1, (void *) &sa_ext->sa, sizeof(sa_ext->sa),
  475. SAVE_AREA_BASE - PAGE_SIZE, 0);
  476. if (MACHINE_HAS_VX)
  477. save_vx_regs_safe(sa_ext->vx_regs);
  478. return;
  479. }
  480. /* Get the registers of a non-boot cpu. */
  481. __pcpu_sigp_relax(address, SIGP_STOP_AND_STORE_STATUS, 0, NULL);
  482. memcpy_real(&sa_ext->sa, lc + SAVE_AREA_BASE, sizeof(sa_ext->sa));
  483. if (!MACHINE_HAS_VX)
  484. return;
  485. /* Get the VX registers */
  486. vx_sa = __get_free_page(GFP_KERNEL);
  487. if (!vx_sa)
  488. panic("could not allocate memory for VX save area\n");
  489. __pcpu_sigp_relax(address, SIGP_STORE_ADDITIONAL_STATUS, vx_sa, NULL);
  490. memcpy(sa_ext->vx_regs, (void *) vx_sa, sizeof(sa_ext->vx_regs));
  491. free_page(vx_sa);
  492. }
  493. /*
  494. * Collect CPU state of the previous, crashed system.
  495. * There are four cases:
  496. * 1) standard zfcp dump
  497. * condition: OLDMEM_BASE == NULL && ipl_info.type == IPL_TYPE_FCP_DUMP
  498. * The state for all CPUs except the boot CPU needs to be collected
  499. * with sigp stop-and-store-status. The boot CPU state is located in
  500. * the absolute lowcore of the memory stored in the HSA. The zcore code
  501. * will allocate the save area and copy the boot CPU state from the HSA.
  502. * 2) stand-alone kdump for SCSI (zfcp dump with swapped memory)
  503. * condition: OLDMEM_BASE != NULL && ipl_info.type == IPL_TYPE_FCP_DUMP
  504. * The state for all CPUs except the boot CPU needs to be collected
  505. * with sigp stop-and-store-status. The firmware or the boot-loader
  506. * stored the registers of the boot CPU in the absolute lowcore in the
  507. * memory of the old system.
  508. * 3) kdump and the old kernel did not store the CPU state,
  509. * or stand-alone kdump for DASD
  510. * condition: OLDMEM_BASE != NULL && !is_kdump_kernel()
  511. * The state for all CPUs except the boot CPU needs to be collected
  512. * with sigp stop-and-store-status. The kexec code or the boot-loader
  513. * stored the registers of the boot CPU in the memory of the old system.
  514. * 4) kdump and the old kernel stored the CPU state
  515. * condition: OLDMEM_BASE != NULL && is_kdump_kernel()
  516. * The state of all CPUs is stored in ELF sections in the memory of the
  517. * old system. The ELF sections are picked up by the crash_dump code
  518. * via elfcorehdr_addr.
  519. */
  520. static void __init smp_store_cpu_states(struct sclp_cpu_info *info)
  521. {
  522. unsigned int cpu, address, i, j;
  523. int is_boot_cpu;
  524. if (is_kdump_kernel())
  525. /* Previous system stored the CPU states. Nothing to do. */
  526. return;
  527. if (!(OLDMEM_BASE || ipl_info.type == IPL_TYPE_FCP_DUMP))
  528. /* No previous system present, normal boot. */
  529. return;
  530. /* Set multi-threading state to the previous system. */
  531. pcpu_set_smt(sclp_get_mtid_prev());
  532. /* Collect CPU states. */
  533. cpu = 0;
  534. for (i = 0; i < info->configured; i++) {
  535. /* Skip CPUs with different CPU type. */
  536. if (info->has_cpu_type && info->cpu[i].type != boot_cpu_type)
  537. continue;
  538. for (j = 0; j <= smp_cpu_mtid; j++, cpu++) {
  539. address = (info->cpu[i].core_id << smp_cpu_mt_shift) + j;
  540. is_boot_cpu = (address == pcpu_devices[0].address);
  541. if (is_boot_cpu && !OLDMEM_BASE)
  542. /* Skip boot CPU for standard zfcp dump. */
  543. continue;
  544. /* Get state for this CPu. */
  545. __smp_store_cpu_state(cpu, address, is_boot_cpu);
  546. }
  547. }
  548. }
  549. int smp_store_status(int cpu)
  550. {
  551. unsigned long vx_sa;
  552. struct pcpu *pcpu;
  553. pcpu = pcpu_devices + cpu;
  554. if (__pcpu_sigp_relax(pcpu->address, SIGP_STOP_AND_STORE_STATUS,
  555. 0, NULL) != SIGP_CC_ORDER_CODE_ACCEPTED)
  556. return -EIO;
  557. if (!MACHINE_HAS_VX)
  558. return 0;
  559. vx_sa = __pa(pcpu->lowcore->vector_save_area_addr);
  560. __pcpu_sigp_relax(pcpu->address, SIGP_STORE_ADDITIONAL_STATUS,
  561. vx_sa, NULL);
  562. return 0;
  563. }
  564. #endif /* CONFIG_CRASH_DUMP */
  565. void smp_cpu_set_polarization(int cpu, int val)
  566. {
  567. pcpu_devices[cpu].polarization = val;
  568. }
  569. int smp_cpu_get_polarization(int cpu)
  570. {
  571. return pcpu_devices[cpu].polarization;
  572. }
  573. static struct sclp_cpu_info *smp_get_cpu_info(void)
  574. {
  575. static int use_sigp_detection;
  576. struct sclp_cpu_info *info;
  577. int address;
  578. info = kzalloc(sizeof(*info), GFP_KERNEL);
  579. if (info && (use_sigp_detection || sclp_get_cpu_info(info))) {
  580. use_sigp_detection = 1;
  581. for (address = 0; address <= MAX_CPU_ADDRESS;
  582. address += (1U << smp_cpu_mt_shift)) {
  583. if (__pcpu_sigp_relax(address, SIGP_SENSE, 0, NULL) ==
  584. SIGP_CC_NOT_OPERATIONAL)
  585. continue;
  586. info->cpu[info->configured].core_id =
  587. address >> smp_cpu_mt_shift;
  588. info->configured++;
  589. }
  590. info->combined = info->configured;
  591. }
  592. return info;
  593. }
  594. static int smp_add_present_cpu(int cpu);
  595. static int __smp_rescan_cpus(struct sclp_cpu_info *info, int sysfs_add)
  596. {
  597. struct pcpu *pcpu;
  598. cpumask_t avail;
  599. int cpu, nr, i, j;
  600. u16 address;
  601. nr = 0;
  602. cpumask_xor(&avail, cpu_possible_mask, cpu_present_mask);
  603. cpu = cpumask_first(&avail);
  604. for (i = 0; (i < info->combined) && (cpu < nr_cpu_ids); i++) {
  605. if (info->has_cpu_type && info->cpu[i].type != boot_cpu_type)
  606. continue;
  607. address = info->cpu[i].core_id << smp_cpu_mt_shift;
  608. for (j = 0; j <= smp_cpu_mtid; j++) {
  609. if (pcpu_find_address(cpu_present_mask, address + j))
  610. continue;
  611. pcpu = pcpu_devices + cpu;
  612. pcpu->address = address + j;
  613. pcpu->state =
  614. (cpu >= info->configured*(smp_cpu_mtid + 1)) ?
  615. CPU_STATE_STANDBY : CPU_STATE_CONFIGURED;
  616. smp_cpu_set_polarization(cpu, POLARIZATION_UNKNOWN);
  617. set_cpu_present(cpu, true);
  618. if (sysfs_add && smp_add_present_cpu(cpu) != 0)
  619. set_cpu_present(cpu, false);
  620. else
  621. nr++;
  622. cpu = cpumask_next(cpu, &avail);
  623. if (cpu >= nr_cpu_ids)
  624. break;
  625. }
  626. }
  627. return nr;
  628. }
  629. static void __init smp_detect_cpus(void)
  630. {
  631. unsigned int cpu, mtid, c_cpus, s_cpus;
  632. struct sclp_cpu_info *info;
  633. u16 address;
  634. /* Get CPU information */
  635. info = smp_get_cpu_info();
  636. if (!info)
  637. panic("smp_detect_cpus failed to allocate memory\n");
  638. /* Find boot CPU type */
  639. if (info->has_cpu_type) {
  640. address = stap();
  641. for (cpu = 0; cpu < info->combined; cpu++)
  642. if (info->cpu[cpu].core_id == address) {
  643. /* The boot cpu dictates the cpu type. */
  644. boot_cpu_type = info->cpu[cpu].type;
  645. break;
  646. }
  647. if (cpu >= info->combined)
  648. panic("Could not find boot CPU type");
  649. }
  650. #ifdef CONFIG_CRASH_DUMP
  651. /* Collect CPU state of previous system */
  652. smp_store_cpu_states(info);
  653. #endif
  654. /* Set multi-threading state for the current system */
  655. mtid = sclp_get_mtid(boot_cpu_type);
  656. mtid = (mtid < smp_max_threads) ? mtid : smp_max_threads - 1;
  657. pcpu_set_smt(mtid);
  658. /* Print number of CPUs */
  659. c_cpus = s_cpus = 0;
  660. for (cpu = 0; cpu < info->combined; cpu++) {
  661. if (info->has_cpu_type && info->cpu[cpu].type != boot_cpu_type)
  662. continue;
  663. if (cpu < info->configured)
  664. c_cpus += smp_cpu_mtid + 1;
  665. else
  666. s_cpus += smp_cpu_mtid + 1;
  667. }
  668. pr_info("%d configured CPUs, %d standby CPUs\n", c_cpus, s_cpus);
  669. /* Add CPUs present at boot */
  670. get_online_cpus();
  671. __smp_rescan_cpus(info, 0);
  672. put_online_cpus();
  673. kfree(info);
  674. }
  675. /*
  676. * Activate a secondary processor.
  677. */
  678. static void smp_start_secondary(void *cpuvoid)
  679. {
  680. S390_lowcore.last_update_clock = get_tod_clock();
  681. S390_lowcore.restart_stack = (unsigned long) restart_stack;
  682. S390_lowcore.restart_fn = (unsigned long) do_restart;
  683. S390_lowcore.restart_data = 0;
  684. S390_lowcore.restart_source = -1UL;
  685. restore_access_regs(S390_lowcore.access_regs_save_area);
  686. __ctl_load(S390_lowcore.cregs_save_area, 0, 15);
  687. __load_psw_mask(PSW_KERNEL_BITS | PSW_MASK_DAT);
  688. cpu_init();
  689. preempt_disable();
  690. init_cpu_timer();
  691. vtime_init();
  692. pfault_init();
  693. notify_cpu_starting(smp_processor_id());
  694. set_cpu_online(smp_processor_id(), true);
  695. inc_irq_stat(CPU_RST);
  696. local_irq_enable();
  697. cpu_startup_entry(CPUHP_ONLINE);
  698. }
  699. /* Upping and downing of CPUs */
  700. int __cpu_up(unsigned int cpu, struct task_struct *tidle)
  701. {
  702. struct pcpu *pcpu;
  703. int base, i, rc;
  704. pcpu = pcpu_devices + cpu;
  705. if (pcpu->state != CPU_STATE_CONFIGURED)
  706. return -EIO;
  707. base = cpu - (cpu % (smp_cpu_mtid + 1));
  708. for (i = 0; i <= smp_cpu_mtid; i++) {
  709. if (base + i < nr_cpu_ids)
  710. if (cpu_online(base + i))
  711. break;
  712. }
  713. /*
  714. * If this is the first CPU of the core to get online
  715. * do an initial CPU reset.
  716. */
  717. if (i > smp_cpu_mtid &&
  718. pcpu_sigp_retry(pcpu_devices + base, SIGP_INITIAL_CPU_RESET, 0) !=
  719. SIGP_CC_ORDER_CODE_ACCEPTED)
  720. return -EIO;
  721. rc = pcpu_alloc_lowcore(pcpu, cpu);
  722. if (rc)
  723. return rc;
  724. pcpu_prepare_secondary(pcpu, cpu);
  725. pcpu_attach_task(pcpu, tidle);
  726. pcpu_start_fn(pcpu, smp_start_secondary, NULL);
  727. while (!cpu_online(cpu))
  728. cpu_relax();
  729. return 0;
  730. }
  731. static unsigned int setup_possible_cpus __initdata;
  732. static int __init _setup_possible_cpus(char *s)
  733. {
  734. get_option(&s, &setup_possible_cpus);
  735. return 0;
  736. }
  737. early_param("possible_cpus", _setup_possible_cpus);
  738. #ifdef CONFIG_HOTPLUG_CPU
  739. int __cpu_disable(void)
  740. {
  741. unsigned long cregs[16];
  742. /* Handle possible pending IPIs */
  743. smp_handle_ext_call();
  744. set_cpu_online(smp_processor_id(), false);
  745. /* Disable pseudo page faults on this cpu. */
  746. pfault_fini();
  747. /* Disable interrupt sources via control register. */
  748. __ctl_store(cregs, 0, 15);
  749. cregs[0] &= ~0x0000ee70UL; /* disable all external interrupts */
  750. cregs[6] &= ~0xff000000UL; /* disable all I/O interrupts */
  751. cregs[14] &= ~0x1f000000UL; /* disable most machine checks */
  752. __ctl_load(cregs, 0, 15);
  753. clear_cpu_flag(CIF_NOHZ_DELAY);
  754. return 0;
  755. }
  756. void __cpu_die(unsigned int cpu)
  757. {
  758. struct pcpu *pcpu;
  759. /* Wait until target cpu is down */
  760. pcpu = pcpu_devices + cpu;
  761. while (!pcpu_stopped(pcpu))
  762. cpu_relax();
  763. pcpu_free_lowcore(pcpu);
  764. atomic_dec(&init_mm.context.attach_count);
  765. cpumask_clear_cpu(cpu, mm_cpumask(&init_mm));
  766. if (MACHINE_HAS_TLB_LC)
  767. cpumask_clear_cpu(cpu, &init_mm.context.cpu_attach_mask);
  768. }
  769. void __noreturn cpu_die(void)
  770. {
  771. idle_task_exit();
  772. pcpu_sigp_retry(pcpu_devices + smp_processor_id(), SIGP_STOP, 0);
  773. for (;;) ;
  774. }
  775. #endif /* CONFIG_HOTPLUG_CPU */
  776. void __init smp_fill_possible_mask(void)
  777. {
  778. unsigned int possible, sclp, cpu;
  779. sclp = min(smp_max_threads, sclp_get_mtid_max() + 1);
  780. sclp = sclp_get_max_cpu()*sclp ?: nr_cpu_ids;
  781. possible = setup_possible_cpus ?: nr_cpu_ids;
  782. possible = min(possible, sclp);
  783. for (cpu = 0; cpu < possible && cpu < nr_cpu_ids; cpu++)
  784. set_cpu_possible(cpu, true);
  785. }
  786. void __init smp_prepare_cpus(unsigned int max_cpus)
  787. {
  788. /* request the 0x1201 emergency signal external interrupt */
  789. if (register_external_irq(EXT_IRQ_EMERGENCY_SIG, do_ext_call_interrupt))
  790. panic("Couldn't request external interrupt 0x1201");
  791. /* request the 0x1202 external call external interrupt */
  792. if (register_external_irq(EXT_IRQ_EXTERNAL_CALL, do_ext_call_interrupt))
  793. panic("Couldn't request external interrupt 0x1202");
  794. smp_detect_cpus();
  795. }
  796. void __init smp_prepare_boot_cpu(void)
  797. {
  798. struct pcpu *pcpu = pcpu_devices;
  799. pcpu->state = CPU_STATE_CONFIGURED;
  800. pcpu->address = stap();
  801. pcpu->lowcore = (struct _lowcore *)(unsigned long) store_prefix();
  802. S390_lowcore.percpu_offset = __per_cpu_offset[0];
  803. smp_cpu_set_polarization(0, POLARIZATION_UNKNOWN);
  804. set_cpu_present(0, true);
  805. set_cpu_online(0, true);
  806. }
  807. void __init smp_cpus_done(unsigned int max_cpus)
  808. {
  809. }
  810. void __init smp_setup_processor_id(void)
  811. {
  812. S390_lowcore.cpu_nr = 0;
  813. S390_lowcore.spinlock_lockval = arch_spin_lockval(0);
  814. }
  815. /*
  816. * the frequency of the profiling timer can be changed
  817. * by writing a multiplier value into /proc/profile.
  818. *
  819. * usually you want to run this on all CPUs ;)
  820. */
  821. int setup_profiling_timer(unsigned int multiplier)
  822. {
  823. return 0;
  824. }
  825. #ifdef CONFIG_HOTPLUG_CPU
  826. static ssize_t cpu_configure_show(struct device *dev,
  827. struct device_attribute *attr, char *buf)
  828. {
  829. ssize_t count;
  830. mutex_lock(&smp_cpu_state_mutex);
  831. count = sprintf(buf, "%d\n", pcpu_devices[dev->id].state);
  832. mutex_unlock(&smp_cpu_state_mutex);
  833. return count;
  834. }
  835. static ssize_t cpu_configure_store(struct device *dev,
  836. struct device_attribute *attr,
  837. const char *buf, size_t count)
  838. {
  839. struct pcpu *pcpu;
  840. int cpu, val, rc, i;
  841. char delim;
  842. if (sscanf(buf, "%d %c", &val, &delim) != 1)
  843. return -EINVAL;
  844. if (val != 0 && val != 1)
  845. return -EINVAL;
  846. get_online_cpus();
  847. mutex_lock(&smp_cpu_state_mutex);
  848. rc = -EBUSY;
  849. /* disallow configuration changes of online cpus and cpu 0 */
  850. cpu = dev->id;
  851. cpu -= cpu % (smp_cpu_mtid + 1);
  852. if (cpu == 0)
  853. goto out;
  854. for (i = 0; i <= smp_cpu_mtid; i++)
  855. if (cpu_online(cpu + i))
  856. goto out;
  857. pcpu = pcpu_devices + cpu;
  858. rc = 0;
  859. switch (val) {
  860. case 0:
  861. if (pcpu->state != CPU_STATE_CONFIGURED)
  862. break;
  863. rc = sclp_cpu_deconfigure(pcpu->address >> smp_cpu_mt_shift);
  864. if (rc)
  865. break;
  866. for (i = 0; i <= smp_cpu_mtid; i++) {
  867. if (cpu + i >= nr_cpu_ids || !cpu_present(cpu + i))
  868. continue;
  869. pcpu[i].state = CPU_STATE_STANDBY;
  870. smp_cpu_set_polarization(cpu + i,
  871. POLARIZATION_UNKNOWN);
  872. }
  873. topology_expect_change();
  874. break;
  875. case 1:
  876. if (pcpu->state != CPU_STATE_STANDBY)
  877. break;
  878. rc = sclp_cpu_configure(pcpu->address >> smp_cpu_mt_shift);
  879. if (rc)
  880. break;
  881. for (i = 0; i <= smp_cpu_mtid; i++) {
  882. if (cpu + i >= nr_cpu_ids || !cpu_present(cpu + i))
  883. continue;
  884. pcpu[i].state = CPU_STATE_CONFIGURED;
  885. smp_cpu_set_polarization(cpu + i,
  886. POLARIZATION_UNKNOWN);
  887. }
  888. topology_expect_change();
  889. break;
  890. default:
  891. break;
  892. }
  893. out:
  894. mutex_unlock(&smp_cpu_state_mutex);
  895. put_online_cpus();
  896. return rc ? rc : count;
  897. }
  898. static DEVICE_ATTR(configure, 0644, cpu_configure_show, cpu_configure_store);
  899. #endif /* CONFIG_HOTPLUG_CPU */
  900. static ssize_t show_cpu_address(struct device *dev,
  901. struct device_attribute *attr, char *buf)
  902. {
  903. return sprintf(buf, "%d\n", pcpu_devices[dev->id].address);
  904. }
  905. static DEVICE_ATTR(address, 0444, show_cpu_address, NULL);
  906. static struct attribute *cpu_common_attrs[] = {
  907. #ifdef CONFIG_HOTPLUG_CPU
  908. &dev_attr_configure.attr,
  909. #endif
  910. &dev_attr_address.attr,
  911. NULL,
  912. };
  913. static struct attribute_group cpu_common_attr_group = {
  914. .attrs = cpu_common_attrs,
  915. };
  916. static struct attribute *cpu_online_attrs[] = {
  917. &dev_attr_idle_count.attr,
  918. &dev_attr_idle_time_us.attr,
  919. NULL,
  920. };
  921. static struct attribute_group cpu_online_attr_group = {
  922. .attrs = cpu_online_attrs,
  923. };
  924. static int smp_cpu_notify(struct notifier_block *self, unsigned long action,
  925. void *hcpu)
  926. {
  927. unsigned int cpu = (unsigned int)(long)hcpu;
  928. struct device *s = &per_cpu(cpu_device, cpu)->dev;
  929. int err = 0;
  930. switch (action & ~CPU_TASKS_FROZEN) {
  931. case CPU_ONLINE:
  932. err = sysfs_create_group(&s->kobj, &cpu_online_attr_group);
  933. break;
  934. case CPU_DEAD:
  935. sysfs_remove_group(&s->kobj, &cpu_online_attr_group);
  936. break;
  937. }
  938. return notifier_from_errno(err);
  939. }
  940. static int smp_add_present_cpu(int cpu)
  941. {
  942. struct device *s;
  943. struct cpu *c;
  944. int rc;
  945. c = kzalloc(sizeof(*c), GFP_KERNEL);
  946. if (!c)
  947. return -ENOMEM;
  948. per_cpu(cpu_device, cpu) = c;
  949. s = &c->dev;
  950. c->hotpluggable = 1;
  951. rc = register_cpu(c, cpu);
  952. if (rc)
  953. goto out;
  954. rc = sysfs_create_group(&s->kobj, &cpu_common_attr_group);
  955. if (rc)
  956. goto out_cpu;
  957. if (cpu_online(cpu)) {
  958. rc = sysfs_create_group(&s->kobj, &cpu_online_attr_group);
  959. if (rc)
  960. goto out_online;
  961. }
  962. rc = topology_cpu_init(c);
  963. if (rc)
  964. goto out_topology;
  965. return 0;
  966. out_topology:
  967. if (cpu_online(cpu))
  968. sysfs_remove_group(&s->kobj, &cpu_online_attr_group);
  969. out_online:
  970. sysfs_remove_group(&s->kobj, &cpu_common_attr_group);
  971. out_cpu:
  972. #ifdef CONFIG_HOTPLUG_CPU
  973. unregister_cpu(c);
  974. #endif
  975. out:
  976. return rc;
  977. }
  978. #ifdef CONFIG_HOTPLUG_CPU
  979. int __ref smp_rescan_cpus(void)
  980. {
  981. struct sclp_cpu_info *info;
  982. int nr;
  983. info = smp_get_cpu_info();
  984. if (!info)
  985. return -ENOMEM;
  986. get_online_cpus();
  987. mutex_lock(&smp_cpu_state_mutex);
  988. nr = __smp_rescan_cpus(info, 1);
  989. mutex_unlock(&smp_cpu_state_mutex);
  990. put_online_cpus();
  991. kfree(info);
  992. if (nr)
  993. topology_schedule_update();
  994. return 0;
  995. }
  996. static ssize_t __ref rescan_store(struct device *dev,
  997. struct device_attribute *attr,
  998. const char *buf,
  999. size_t count)
  1000. {
  1001. int rc;
  1002. rc = smp_rescan_cpus();
  1003. return rc ? rc : count;
  1004. }
  1005. static DEVICE_ATTR(rescan, 0200, NULL, rescan_store);
  1006. #endif /* CONFIG_HOTPLUG_CPU */
  1007. static int __init s390_smp_init(void)
  1008. {
  1009. int cpu, rc = 0;
  1010. #ifdef CONFIG_HOTPLUG_CPU
  1011. rc = device_create_file(cpu_subsys.dev_root, &dev_attr_rescan);
  1012. if (rc)
  1013. return rc;
  1014. #endif
  1015. cpu_notifier_register_begin();
  1016. for_each_present_cpu(cpu) {
  1017. rc = smp_add_present_cpu(cpu);
  1018. if (rc)
  1019. goto out;
  1020. }
  1021. __hotcpu_notifier(smp_cpu_notify, 0);
  1022. out:
  1023. cpu_notifier_register_done();
  1024. return rc;
  1025. }
  1026. subsys_initcall(s390_smp_init);