mmu.h 4.0 KB

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  1. #ifndef _ASM_POWERPC_MMU_H_
  2. #define _ASM_POWERPC_MMU_H_
  3. #ifdef __KERNEL__
  4. #include <asm/asm-compat.h>
  5. #include <asm/feature-fixups.h>
  6. /*
  7. * MMU features bit definitions
  8. */
  9. /*
  10. * First half is MMU families
  11. */
  12. #define MMU_FTR_HPTE_TABLE ASM_CONST(0x00000001)
  13. #define MMU_FTR_TYPE_8xx ASM_CONST(0x00000002)
  14. #define MMU_FTR_TYPE_40x ASM_CONST(0x00000004)
  15. #define MMU_FTR_TYPE_44x ASM_CONST(0x00000008)
  16. #define MMU_FTR_TYPE_FSL_E ASM_CONST(0x00000010)
  17. #define MMU_FTR_TYPE_3E ASM_CONST(0x00000020)
  18. /*
  19. * This is individual features
  20. */
  21. /* Enable use of high BAT registers */
  22. #define MMU_FTR_USE_HIGH_BATS ASM_CONST(0x00010000)
  23. /* Enable >32-bit physical addresses on 32-bit processor, only used
  24. * by CONFIG_6xx currently as BookE supports that from day 1
  25. */
  26. #define MMU_FTR_BIG_PHYS ASM_CONST(0x00020000)
  27. /* Enable use of broadcast TLB invalidations. We don't always set it
  28. * on processors that support it due to other constraints with the
  29. * use of such invalidations
  30. */
  31. #define MMU_FTR_USE_TLBIVAX_BCAST ASM_CONST(0x00040000)
  32. /* Enable use of tlbilx invalidate instructions.
  33. */
  34. #define MMU_FTR_USE_TLBILX ASM_CONST(0x00080000)
  35. /* This indicates that the processor cannot handle multiple outstanding
  36. * broadcast tlbivax or tlbsync. This makes the code use a spinlock
  37. * around such invalidate forms.
  38. */
  39. #define MMU_FTR_LOCK_BCAST_INVAL ASM_CONST(0x00100000)
  40. /* This indicates that the processor doesn't handle way selection
  41. * properly and needs SW to track and update the LRU state. This
  42. * is specific to an errata on e300c2/c3/c4 class parts
  43. */
  44. #define MMU_FTR_NEED_DTLB_SW_LRU ASM_CONST(0x00200000)
  45. /* This indicates that the processor uses the ISA 2.06 server tlbie
  46. * mnemonics
  47. */
  48. #define MMU_FTR_TLBIE_206 ASM_CONST(0x00400000)
  49. #ifndef __ASSEMBLY__
  50. #include <asm/cputable.h>
  51. static inline int mmu_has_feature(unsigned long feature)
  52. {
  53. return (cur_cpu_spec->mmu_features & feature);
  54. }
  55. extern unsigned int __start___mmu_ftr_fixup, __stop___mmu_ftr_fixup;
  56. /* MMU initialization (64-bit only fo now) */
  57. extern void early_init_mmu(void);
  58. extern void early_init_mmu_secondary(void);
  59. #endif /* !__ASSEMBLY__ */
  60. /* The kernel use the constants below to index in the page sizes array.
  61. * The use of fixed constants for this purpose is better for performances
  62. * of the low level hash refill handlers.
  63. *
  64. * A non supported page size has a "shift" field set to 0
  65. *
  66. * Any new page size being implemented can get a new entry in here. Whether
  67. * the kernel will use it or not is a different matter though. The actual page
  68. * size used by hugetlbfs is not defined here and may be made variable
  69. *
  70. * Note: This array ended up being a false good idea as it's growing to the
  71. * point where I wonder if we should replace it with something different,
  72. * to think about, feedback welcome. --BenH.
  73. */
  74. /* There are #define as they have to be used in assembly
  75. *
  76. * WARNING: If you change this list, make sure to update the array of
  77. * names currently in arch/powerpc/mm/hugetlbpage.c or bad things will
  78. * happen
  79. */
  80. #define MMU_PAGE_4K 0
  81. #define MMU_PAGE_16K 1
  82. #define MMU_PAGE_64K 2
  83. #define MMU_PAGE_64K_AP 3 /* "Admixed pages" (hash64 only) */
  84. #define MMU_PAGE_256K 4
  85. #define MMU_PAGE_1M 5
  86. #define MMU_PAGE_8M 6
  87. #define MMU_PAGE_16M 7
  88. #define MMU_PAGE_256M 8
  89. #define MMU_PAGE_1G 9
  90. #define MMU_PAGE_16G 10
  91. #define MMU_PAGE_64G 11
  92. #define MMU_PAGE_COUNT 12
  93. #if defined(CONFIG_PPC_STD_MMU_64)
  94. /* 64-bit classic hash table MMU */
  95. # include <asm/mmu-hash64.h>
  96. #elif defined(CONFIG_PPC_STD_MMU_32)
  97. /* 32-bit classic hash table MMU */
  98. # include <asm/mmu-hash32.h>
  99. #elif defined(CONFIG_40x)
  100. /* 40x-style software loaded TLB */
  101. # include <asm/mmu-40x.h>
  102. #elif defined(CONFIG_44x)
  103. /* 44x-style software loaded TLB */
  104. # include <asm/mmu-44x.h>
  105. #elif defined(CONFIG_PPC_BOOK3E_MMU)
  106. /* Freescale Book-E software loaded TLB or Book-3e (ISA 2.06+) MMU */
  107. # include <asm/mmu-book3e.h>
  108. #elif defined (CONFIG_PPC_8xx)
  109. /* Motorola/Freescale 8xx software loaded TLB */
  110. # include <asm/mmu-8xx.h>
  111. #endif
  112. #endif /* __KERNEL__ */
  113. #endif /* _ASM_POWERPC_MMU_H_ */