intel_panel.c 54 KB

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  1. /*
  2. * Copyright © 2006-2010 Intel Corporation
  3. * Copyright (c) 2006 Dave Airlie <airlied@linux.ie>
  4. *
  5. * Permission is hereby granted, free of charge, to any person obtaining a
  6. * copy of this software and associated documentation files (the "Software"),
  7. * to deal in the Software without restriction, including without limitation
  8. * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  9. * and/or sell copies of the Software, and to permit persons to whom the
  10. * Software is furnished to do so, subject to the following conditions:
  11. *
  12. * The above copyright notice and this permission notice (including the next
  13. * paragraph) shall be included in all copies or substantial portions of the
  14. * Software.
  15. *
  16. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18. * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  19. * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  20. * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  21. * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  22. * DEALINGS IN THE SOFTWARE.
  23. *
  24. * Authors:
  25. * Eric Anholt <eric@anholt.net>
  26. * Dave Airlie <airlied@linux.ie>
  27. * Jesse Barnes <jesse.barnes@intel.com>
  28. * Chris Wilson <chris@chris-wilson.co.uk>
  29. */
  30. #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  31. #include <linux/kernel.h>
  32. #include <linux/moduleparam.h>
  33. #include <linux/pwm.h>
  34. #include "intel_drv.h"
  35. #define CRC_PMIC_PWM_PERIOD_NS 21333
  36. void
  37. intel_fixed_panel_mode(const struct drm_display_mode *fixed_mode,
  38. struct drm_display_mode *adjusted_mode)
  39. {
  40. drm_mode_copy(adjusted_mode, fixed_mode);
  41. drm_mode_set_crtcinfo(adjusted_mode, 0);
  42. }
  43. /**
  44. * intel_find_panel_downclock - find the reduced downclock for LVDS in EDID
  45. * @dev: drm device
  46. * @fixed_mode : panel native mode
  47. * @connector: LVDS/eDP connector
  48. *
  49. * Return downclock_avail
  50. * Find the reduced downclock for LVDS/eDP in EDID.
  51. */
  52. struct drm_display_mode *
  53. intel_find_panel_downclock(struct drm_device *dev,
  54. struct drm_display_mode *fixed_mode,
  55. struct drm_connector *connector)
  56. {
  57. struct drm_display_mode *scan, *tmp_mode;
  58. int temp_downclock;
  59. temp_downclock = fixed_mode->clock;
  60. tmp_mode = NULL;
  61. list_for_each_entry(scan, &connector->probed_modes, head) {
  62. /*
  63. * If one mode has the same resolution with the fixed_panel
  64. * mode while they have the different refresh rate, it means
  65. * that the reduced downclock is found. In such
  66. * case we can set the different FPx0/1 to dynamically select
  67. * between low and high frequency.
  68. */
  69. if (scan->hdisplay == fixed_mode->hdisplay &&
  70. scan->hsync_start == fixed_mode->hsync_start &&
  71. scan->hsync_end == fixed_mode->hsync_end &&
  72. scan->htotal == fixed_mode->htotal &&
  73. scan->vdisplay == fixed_mode->vdisplay &&
  74. scan->vsync_start == fixed_mode->vsync_start &&
  75. scan->vsync_end == fixed_mode->vsync_end &&
  76. scan->vtotal == fixed_mode->vtotal) {
  77. if (scan->clock < temp_downclock) {
  78. /*
  79. * The downclock is already found. But we
  80. * expect to find the lower downclock.
  81. */
  82. temp_downclock = scan->clock;
  83. tmp_mode = scan;
  84. }
  85. }
  86. }
  87. if (temp_downclock < fixed_mode->clock)
  88. return drm_mode_duplicate(dev, tmp_mode);
  89. else
  90. return NULL;
  91. }
  92. /* adjusted_mode has been preset to be the panel's fixed mode */
  93. void
  94. intel_pch_panel_fitting(struct intel_crtc *intel_crtc,
  95. struct intel_crtc_state *pipe_config,
  96. int fitting_mode)
  97. {
  98. const struct drm_display_mode *adjusted_mode = &pipe_config->base.adjusted_mode;
  99. int x = 0, y = 0, width = 0, height = 0;
  100. /* Native modes don't need fitting */
  101. if (adjusted_mode->crtc_hdisplay == pipe_config->pipe_src_w &&
  102. adjusted_mode->crtc_vdisplay == pipe_config->pipe_src_h)
  103. goto done;
  104. switch (fitting_mode) {
  105. case DRM_MODE_SCALE_CENTER:
  106. width = pipe_config->pipe_src_w;
  107. height = pipe_config->pipe_src_h;
  108. x = (adjusted_mode->crtc_hdisplay - width + 1)/2;
  109. y = (adjusted_mode->crtc_vdisplay - height + 1)/2;
  110. break;
  111. case DRM_MODE_SCALE_ASPECT:
  112. /* Scale but preserve the aspect ratio */
  113. {
  114. u32 scaled_width = adjusted_mode->crtc_hdisplay
  115. * pipe_config->pipe_src_h;
  116. u32 scaled_height = pipe_config->pipe_src_w
  117. * adjusted_mode->crtc_vdisplay;
  118. if (scaled_width > scaled_height) { /* pillar */
  119. width = scaled_height / pipe_config->pipe_src_h;
  120. if (width & 1)
  121. width++;
  122. x = (adjusted_mode->crtc_hdisplay - width + 1) / 2;
  123. y = 0;
  124. height = adjusted_mode->crtc_vdisplay;
  125. } else if (scaled_width < scaled_height) { /* letter */
  126. height = scaled_width / pipe_config->pipe_src_w;
  127. if (height & 1)
  128. height++;
  129. y = (adjusted_mode->crtc_vdisplay - height + 1) / 2;
  130. x = 0;
  131. width = adjusted_mode->crtc_hdisplay;
  132. } else {
  133. x = y = 0;
  134. width = adjusted_mode->crtc_hdisplay;
  135. height = adjusted_mode->crtc_vdisplay;
  136. }
  137. }
  138. break;
  139. case DRM_MODE_SCALE_FULLSCREEN:
  140. x = y = 0;
  141. width = adjusted_mode->crtc_hdisplay;
  142. height = adjusted_mode->crtc_vdisplay;
  143. break;
  144. default:
  145. WARN(1, "bad panel fit mode: %d\n", fitting_mode);
  146. return;
  147. }
  148. done:
  149. pipe_config->pch_pfit.pos = (x << 16) | y;
  150. pipe_config->pch_pfit.size = (width << 16) | height;
  151. pipe_config->pch_pfit.enabled = pipe_config->pch_pfit.size != 0;
  152. }
  153. static void
  154. centre_horizontally(struct drm_display_mode *adjusted_mode,
  155. int width)
  156. {
  157. u32 border, sync_pos, blank_width, sync_width;
  158. /* keep the hsync and hblank widths constant */
  159. sync_width = adjusted_mode->crtc_hsync_end - adjusted_mode->crtc_hsync_start;
  160. blank_width = adjusted_mode->crtc_hblank_end - adjusted_mode->crtc_hblank_start;
  161. sync_pos = (blank_width - sync_width + 1) / 2;
  162. border = (adjusted_mode->crtc_hdisplay - width + 1) / 2;
  163. border += border & 1; /* make the border even */
  164. adjusted_mode->crtc_hdisplay = width;
  165. adjusted_mode->crtc_hblank_start = width + border;
  166. adjusted_mode->crtc_hblank_end = adjusted_mode->crtc_hblank_start + blank_width;
  167. adjusted_mode->crtc_hsync_start = adjusted_mode->crtc_hblank_start + sync_pos;
  168. adjusted_mode->crtc_hsync_end = adjusted_mode->crtc_hsync_start + sync_width;
  169. }
  170. static void
  171. centre_vertically(struct drm_display_mode *adjusted_mode,
  172. int height)
  173. {
  174. u32 border, sync_pos, blank_width, sync_width;
  175. /* keep the vsync and vblank widths constant */
  176. sync_width = adjusted_mode->crtc_vsync_end - adjusted_mode->crtc_vsync_start;
  177. blank_width = adjusted_mode->crtc_vblank_end - adjusted_mode->crtc_vblank_start;
  178. sync_pos = (blank_width - sync_width + 1) / 2;
  179. border = (adjusted_mode->crtc_vdisplay - height + 1) / 2;
  180. adjusted_mode->crtc_vdisplay = height;
  181. adjusted_mode->crtc_vblank_start = height + border;
  182. adjusted_mode->crtc_vblank_end = adjusted_mode->crtc_vblank_start + blank_width;
  183. adjusted_mode->crtc_vsync_start = adjusted_mode->crtc_vblank_start + sync_pos;
  184. adjusted_mode->crtc_vsync_end = adjusted_mode->crtc_vsync_start + sync_width;
  185. }
  186. static inline u32 panel_fitter_scaling(u32 source, u32 target)
  187. {
  188. /*
  189. * Floating point operation is not supported. So the FACTOR
  190. * is defined, which can avoid the floating point computation
  191. * when calculating the panel ratio.
  192. */
  193. #define ACCURACY 12
  194. #define FACTOR (1 << ACCURACY)
  195. u32 ratio = source * FACTOR / target;
  196. return (FACTOR * ratio + FACTOR/2) / FACTOR;
  197. }
  198. static void i965_scale_aspect(struct intel_crtc_state *pipe_config,
  199. u32 *pfit_control)
  200. {
  201. const struct drm_display_mode *adjusted_mode = &pipe_config->base.adjusted_mode;
  202. u32 scaled_width = adjusted_mode->crtc_hdisplay *
  203. pipe_config->pipe_src_h;
  204. u32 scaled_height = pipe_config->pipe_src_w *
  205. adjusted_mode->crtc_vdisplay;
  206. /* 965+ is easy, it does everything in hw */
  207. if (scaled_width > scaled_height)
  208. *pfit_control |= PFIT_ENABLE |
  209. PFIT_SCALING_PILLAR;
  210. else if (scaled_width < scaled_height)
  211. *pfit_control |= PFIT_ENABLE |
  212. PFIT_SCALING_LETTER;
  213. else if (adjusted_mode->crtc_hdisplay != pipe_config->pipe_src_w)
  214. *pfit_control |= PFIT_ENABLE | PFIT_SCALING_AUTO;
  215. }
  216. static void i9xx_scale_aspect(struct intel_crtc_state *pipe_config,
  217. u32 *pfit_control, u32 *pfit_pgm_ratios,
  218. u32 *border)
  219. {
  220. struct drm_display_mode *adjusted_mode = &pipe_config->base.adjusted_mode;
  221. u32 scaled_width = adjusted_mode->crtc_hdisplay *
  222. pipe_config->pipe_src_h;
  223. u32 scaled_height = pipe_config->pipe_src_w *
  224. adjusted_mode->crtc_vdisplay;
  225. u32 bits;
  226. /*
  227. * For earlier chips we have to calculate the scaling
  228. * ratio by hand and program it into the
  229. * PFIT_PGM_RATIO register
  230. */
  231. if (scaled_width > scaled_height) { /* pillar */
  232. centre_horizontally(adjusted_mode,
  233. scaled_height /
  234. pipe_config->pipe_src_h);
  235. *border = LVDS_BORDER_ENABLE;
  236. if (pipe_config->pipe_src_h != adjusted_mode->crtc_vdisplay) {
  237. bits = panel_fitter_scaling(pipe_config->pipe_src_h,
  238. adjusted_mode->crtc_vdisplay);
  239. *pfit_pgm_ratios |= (bits << PFIT_HORIZ_SCALE_SHIFT |
  240. bits << PFIT_VERT_SCALE_SHIFT);
  241. *pfit_control |= (PFIT_ENABLE |
  242. VERT_INTERP_BILINEAR |
  243. HORIZ_INTERP_BILINEAR);
  244. }
  245. } else if (scaled_width < scaled_height) { /* letter */
  246. centre_vertically(adjusted_mode,
  247. scaled_width /
  248. pipe_config->pipe_src_w);
  249. *border = LVDS_BORDER_ENABLE;
  250. if (pipe_config->pipe_src_w != adjusted_mode->crtc_hdisplay) {
  251. bits = panel_fitter_scaling(pipe_config->pipe_src_w,
  252. adjusted_mode->crtc_hdisplay);
  253. *pfit_pgm_ratios |= (bits << PFIT_HORIZ_SCALE_SHIFT |
  254. bits << PFIT_VERT_SCALE_SHIFT);
  255. *pfit_control |= (PFIT_ENABLE |
  256. VERT_INTERP_BILINEAR |
  257. HORIZ_INTERP_BILINEAR);
  258. }
  259. } else {
  260. /* Aspects match, Let hw scale both directions */
  261. *pfit_control |= (PFIT_ENABLE |
  262. VERT_AUTO_SCALE | HORIZ_AUTO_SCALE |
  263. VERT_INTERP_BILINEAR |
  264. HORIZ_INTERP_BILINEAR);
  265. }
  266. }
  267. void intel_gmch_panel_fitting(struct intel_crtc *intel_crtc,
  268. struct intel_crtc_state *pipe_config,
  269. int fitting_mode)
  270. {
  271. struct drm_device *dev = intel_crtc->base.dev;
  272. u32 pfit_control = 0, pfit_pgm_ratios = 0, border = 0;
  273. struct drm_display_mode *adjusted_mode = &pipe_config->base.adjusted_mode;
  274. /* Native modes don't need fitting */
  275. if (adjusted_mode->crtc_hdisplay == pipe_config->pipe_src_w &&
  276. adjusted_mode->crtc_vdisplay == pipe_config->pipe_src_h)
  277. goto out;
  278. switch (fitting_mode) {
  279. case DRM_MODE_SCALE_CENTER:
  280. /*
  281. * For centered modes, we have to calculate border widths &
  282. * heights and modify the values programmed into the CRTC.
  283. */
  284. centre_horizontally(adjusted_mode, pipe_config->pipe_src_w);
  285. centre_vertically(adjusted_mode, pipe_config->pipe_src_h);
  286. border = LVDS_BORDER_ENABLE;
  287. break;
  288. case DRM_MODE_SCALE_ASPECT:
  289. /* Scale but preserve the aspect ratio */
  290. if (INTEL_INFO(dev)->gen >= 4)
  291. i965_scale_aspect(pipe_config, &pfit_control);
  292. else
  293. i9xx_scale_aspect(pipe_config, &pfit_control,
  294. &pfit_pgm_ratios, &border);
  295. break;
  296. case DRM_MODE_SCALE_FULLSCREEN:
  297. /*
  298. * Full scaling, even if it changes the aspect ratio.
  299. * Fortunately this is all done for us in hw.
  300. */
  301. if (pipe_config->pipe_src_h != adjusted_mode->crtc_vdisplay ||
  302. pipe_config->pipe_src_w != adjusted_mode->crtc_hdisplay) {
  303. pfit_control |= PFIT_ENABLE;
  304. if (INTEL_INFO(dev)->gen >= 4)
  305. pfit_control |= PFIT_SCALING_AUTO;
  306. else
  307. pfit_control |= (VERT_AUTO_SCALE |
  308. VERT_INTERP_BILINEAR |
  309. HORIZ_AUTO_SCALE |
  310. HORIZ_INTERP_BILINEAR);
  311. }
  312. break;
  313. default:
  314. WARN(1, "bad panel fit mode: %d\n", fitting_mode);
  315. return;
  316. }
  317. /* 965+ wants fuzzy fitting */
  318. /* FIXME: handle multiple panels by failing gracefully */
  319. if (INTEL_INFO(dev)->gen >= 4)
  320. pfit_control |= ((intel_crtc->pipe << PFIT_PIPE_SHIFT) |
  321. PFIT_FILTER_FUZZY);
  322. out:
  323. if ((pfit_control & PFIT_ENABLE) == 0) {
  324. pfit_control = 0;
  325. pfit_pgm_ratios = 0;
  326. }
  327. /* Make sure pre-965 set dither correctly for 18bpp panels. */
  328. if (INTEL_INFO(dev)->gen < 4 && pipe_config->pipe_bpp == 18)
  329. pfit_control |= PANEL_8TO6_DITHER_ENABLE;
  330. pipe_config->gmch_pfit.control = pfit_control;
  331. pipe_config->gmch_pfit.pgm_ratios = pfit_pgm_ratios;
  332. pipe_config->gmch_pfit.lvds_border_bits = border;
  333. }
  334. enum drm_connector_status
  335. intel_panel_detect(struct drm_device *dev)
  336. {
  337. struct drm_i915_private *dev_priv = dev->dev_private;
  338. /* Assume that the BIOS does not lie through the OpRegion... */
  339. if (!i915.panel_ignore_lid && dev_priv->opregion.lid_state) {
  340. return *dev_priv->opregion.lid_state & 0x1 ?
  341. connector_status_connected :
  342. connector_status_disconnected;
  343. }
  344. switch (i915.panel_ignore_lid) {
  345. case -2:
  346. return connector_status_connected;
  347. case -1:
  348. return connector_status_disconnected;
  349. default:
  350. return connector_status_unknown;
  351. }
  352. }
  353. /**
  354. * scale - scale values from one range to another
  355. *
  356. * @source_val: value in range [@source_min..@source_max]
  357. *
  358. * Return @source_val in range [@source_min..@source_max] scaled to range
  359. * [@target_min..@target_max].
  360. */
  361. static uint32_t scale(uint32_t source_val,
  362. uint32_t source_min, uint32_t source_max,
  363. uint32_t target_min, uint32_t target_max)
  364. {
  365. uint64_t target_val;
  366. WARN_ON(source_min > source_max);
  367. WARN_ON(target_min > target_max);
  368. /* defensive */
  369. source_val = clamp(source_val, source_min, source_max);
  370. /* avoid overflows */
  371. target_val = DIV_ROUND_CLOSEST_ULL((uint64_t)(source_val - source_min) *
  372. (target_max - target_min), source_max - source_min);
  373. target_val += target_min;
  374. return target_val;
  375. }
  376. /* Scale user_level in range [0..user_max] to [hw_min..hw_max]. */
  377. static inline u32 scale_user_to_hw(struct intel_connector *connector,
  378. u32 user_level, u32 user_max)
  379. {
  380. struct intel_panel *panel = &connector->panel;
  381. return scale(user_level, 0, user_max,
  382. panel->backlight.min, panel->backlight.max);
  383. }
  384. /* Scale user_level in range [0..user_max] to [0..hw_max], clamping the result
  385. * to [hw_min..hw_max]. */
  386. static inline u32 clamp_user_to_hw(struct intel_connector *connector,
  387. u32 user_level, u32 user_max)
  388. {
  389. struct intel_panel *panel = &connector->panel;
  390. u32 hw_level;
  391. hw_level = scale(user_level, 0, user_max, 0, panel->backlight.max);
  392. hw_level = clamp(hw_level, panel->backlight.min, panel->backlight.max);
  393. return hw_level;
  394. }
  395. /* Scale hw_level in range [hw_min..hw_max] to [0..user_max]. */
  396. static inline u32 scale_hw_to_user(struct intel_connector *connector,
  397. u32 hw_level, u32 user_max)
  398. {
  399. struct intel_panel *panel = &connector->panel;
  400. return scale(hw_level, panel->backlight.min, panel->backlight.max,
  401. 0, user_max);
  402. }
  403. static u32 intel_panel_compute_brightness(struct intel_connector *connector,
  404. u32 val)
  405. {
  406. struct drm_device *dev = connector->base.dev;
  407. struct drm_i915_private *dev_priv = dev->dev_private;
  408. struct intel_panel *panel = &connector->panel;
  409. WARN_ON(panel->backlight.max == 0);
  410. if (i915.invert_brightness < 0)
  411. return val;
  412. if (i915.invert_brightness > 0 ||
  413. dev_priv->quirks & QUIRK_INVERT_BRIGHTNESS) {
  414. return panel->backlight.max - val;
  415. }
  416. return val;
  417. }
  418. static u32 lpt_get_backlight(struct intel_connector *connector)
  419. {
  420. struct drm_device *dev = connector->base.dev;
  421. struct drm_i915_private *dev_priv = dev->dev_private;
  422. return I915_READ(BLC_PWM_PCH_CTL2) & BACKLIGHT_DUTY_CYCLE_MASK;
  423. }
  424. static u32 pch_get_backlight(struct intel_connector *connector)
  425. {
  426. struct drm_device *dev = connector->base.dev;
  427. struct drm_i915_private *dev_priv = dev->dev_private;
  428. return I915_READ(BLC_PWM_CPU_CTL) & BACKLIGHT_DUTY_CYCLE_MASK;
  429. }
  430. static u32 i9xx_get_backlight(struct intel_connector *connector)
  431. {
  432. struct drm_device *dev = connector->base.dev;
  433. struct drm_i915_private *dev_priv = dev->dev_private;
  434. struct intel_panel *panel = &connector->panel;
  435. u32 val;
  436. val = I915_READ(BLC_PWM_CTL) & BACKLIGHT_DUTY_CYCLE_MASK;
  437. if (INTEL_INFO(dev)->gen < 4)
  438. val >>= 1;
  439. if (panel->backlight.combination_mode) {
  440. u8 lbpc;
  441. pci_read_config_byte(dev->pdev, PCI_LBPC, &lbpc);
  442. val *= lbpc;
  443. }
  444. return val;
  445. }
  446. static u32 _vlv_get_backlight(struct drm_device *dev, enum pipe pipe)
  447. {
  448. struct drm_i915_private *dev_priv = dev->dev_private;
  449. if (WARN_ON(pipe != PIPE_A && pipe != PIPE_B))
  450. return 0;
  451. return I915_READ(VLV_BLC_PWM_CTL(pipe)) & BACKLIGHT_DUTY_CYCLE_MASK;
  452. }
  453. static u32 vlv_get_backlight(struct intel_connector *connector)
  454. {
  455. struct drm_device *dev = connector->base.dev;
  456. enum pipe pipe = intel_get_pipe_from_connector(connector);
  457. return _vlv_get_backlight(dev, pipe);
  458. }
  459. static u32 bxt_get_backlight(struct intel_connector *connector)
  460. {
  461. struct drm_device *dev = connector->base.dev;
  462. struct intel_panel *panel = &connector->panel;
  463. struct drm_i915_private *dev_priv = dev->dev_private;
  464. return I915_READ(BXT_BLC_PWM_DUTY(panel->backlight.controller));
  465. }
  466. static u32 pwm_get_backlight(struct intel_connector *connector)
  467. {
  468. struct intel_panel *panel = &connector->panel;
  469. int duty_ns;
  470. duty_ns = pwm_get_duty_cycle(panel->backlight.pwm);
  471. return DIV_ROUND_UP(duty_ns * 100, CRC_PMIC_PWM_PERIOD_NS);
  472. }
  473. static u32 intel_panel_get_backlight(struct intel_connector *connector)
  474. {
  475. struct drm_device *dev = connector->base.dev;
  476. struct drm_i915_private *dev_priv = dev->dev_private;
  477. struct intel_panel *panel = &connector->panel;
  478. u32 val = 0;
  479. mutex_lock(&dev_priv->backlight_lock);
  480. if (panel->backlight.enabled) {
  481. val = panel->backlight.get(connector);
  482. val = intel_panel_compute_brightness(connector, val);
  483. }
  484. mutex_unlock(&dev_priv->backlight_lock);
  485. DRM_DEBUG_DRIVER("get backlight PWM = %d\n", val);
  486. return val;
  487. }
  488. static void lpt_set_backlight(struct intel_connector *connector, u32 level)
  489. {
  490. struct drm_device *dev = connector->base.dev;
  491. struct drm_i915_private *dev_priv = dev->dev_private;
  492. u32 val = I915_READ(BLC_PWM_PCH_CTL2) & ~BACKLIGHT_DUTY_CYCLE_MASK;
  493. I915_WRITE(BLC_PWM_PCH_CTL2, val | level);
  494. }
  495. static void pch_set_backlight(struct intel_connector *connector, u32 level)
  496. {
  497. struct drm_device *dev = connector->base.dev;
  498. struct drm_i915_private *dev_priv = dev->dev_private;
  499. u32 tmp;
  500. tmp = I915_READ(BLC_PWM_CPU_CTL) & ~BACKLIGHT_DUTY_CYCLE_MASK;
  501. I915_WRITE(BLC_PWM_CPU_CTL, tmp | level);
  502. }
  503. static void i9xx_set_backlight(struct intel_connector *connector, u32 level)
  504. {
  505. struct drm_device *dev = connector->base.dev;
  506. struct drm_i915_private *dev_priv = dev->dev_private;
  507. struct intel_panel *panel = &connector->panel;
  508. u32 tmp, mask;
  509. WARN_ON(panel->backlight.max == 0);
  510. if (panel->backlight.combination_mode) {
  511. u8 lbpc;
  512. lbpc = level * 0xfe / panel->backlight.max + 1;
  513. level /= lbpc;
  514. pci_write_config_byte(dev->pdev, PCI_LBPC, lbpc);
  515. }
  516. if (IS_GEN4(dev)) {
  517. mask = BACKLIGHT_DUTY_CYCLE_MASK;
  518. } else {
  519. level <<= 1;
  520. mask = BACKLIGHT_DUTY_CYCLE_MASK_PNV;
  521. }
  522. tmp = I915_READ(BLC_PWM_CTL) & ~mask;
  523. I915_WRITE(BLC_PWM_CTL, tmp | level);
  524. }
  525. static void vlv_set_backlight(struct intel_connector *connector, u32 level)
  526. {
  527. struct drm_device *dev = connector->base.dev;
  528. struct drm_i915_private *dev_priv = dev->dev_private;
  529. enum pipe pipe = intel_get_pipe_from_connector(connector);
  530. u32 tmp;
  531. if (WARN_ON(pipe != PIPE_A && pipe != PIPE_B))
  532. return;
  533. tmp = I915_READ(VLV_BLC_PWM_CTL(pipe)) & ~BACKLIGHT_DUTY_CYCLE_MASK;
  534. I915_WRITE(VLV_BLC_PWM_CTL(pipe), tmp | level);
  535. }
  536. static void bxt_set_backlight(struct intel_connector *connector, u32 level)
  537. {
  538. struct drm_device *dev = connector->base.dev;
  539. struct drm_i915_private *dev_priv = dev->dev_private;
  540. struct intel_panel *panel = &connector->panel;
  541. I915_WRITE(BXT_BLC_PWM_DUTY(panel->backlight.controller), level);
  542. }
  543. static void pwm_set_backlight(struct intel_connector *connector, u32 level)
  544. {
  545. struct intel_panel *panel = &connector->panel;
  546. int duty_ns = DIV_ROUND_UP(level * CRC_PMIC_PWM_PERIOD_NS, 100);
  547. pwm_config(panel->backlight.pwm, duty_ns, CRC_PMIC_PWM_PERIOD_NS);
  548. }
  549. static void
  550. intel_panel_actually_set_backlight(struct intel_connector *connector, u32 level)
  551. {
  552. struct intel_panel *panel = &connector->panel;
  553. DRM_DEBUG_DRIVER("set backlight PWM = %d\n", level);
  554. level = intel_panel_compute_brightness(connector, level);
  555. panel->backlight.set(connector, level);
  556. }
  557. /* set backlight brightness to level in range [0..max], scaling wrt hw min */
  558. static void intel_panel_set_backlight(struct intel_connector *connector,
  559. u32 user_level, u32 user_max)
  560. {
  561. struct drm_device *dev = connector->base.dev;
  562. struct drm_i915_private *dev_priv = dev->dev_private;
  563. struct intel_panel *panel = &connector->panel;
  564. u32 hw_level;
  565. if (!panel->backlight.present)
  566. return;
  567. mutex_lock(&dev_priv->backlight_lock);
  568. WARN_ON(panel->backlight.max == 0);
  569. hw_level = scale_user_to_hw(connector, user_level, user_max);
  570. panel->backlight.level = hw_level;
  571. if (panel->backlight.enabled)
  572. intel_panel_actually_set_backlight(connector, hw_level);
  573. mutex_unlock(&dev_priv->backlight_lock);
  574. }
  575. /* set backlight brightness to level in range [0..max], assuming hw min is
  576. * respected.
  577. */
  578. void intel_panel_set_backlight_acpi(struct intel_connector *connector,
  579. u32 user_level, u32 user_max)
  580. {
  581. struct drm_device *dev = connector->base.dev;
  582. struct drm_i915_private *dev_priv = dev->dev_private;
  583. struct intel_panel *panel = &connector->panel;
  584. enum pipe pipe = intel_get_pipe_from_connector(connector);
  585. u32 hw_level;
  586. /*
  587. * INVALID_PIPE may occur during driver init because
  588. * connection_mutex isn't held across the entire backlight
  589. * setup + modeset readout, and the BIOS can issue the
  590. * requests at any time.
  591. */
  592. if (!panel->backlight.present || pipe == INVALID_PIPE)
  593. return;
  594. mutex_lock(&dev_priv->backlight_lock);
  595. WARN_ON(panel->backlight.max == 0);
  596. hw_level = clamp_user_to_hw(connector, user_level, user_max);
  597. panel->backlight.level = hw_level;
  598. if (panel->backlight.device)
  599. panel->backlight.device->props.brightness =
  600. scale_hw_to_user(connector,
  601. panel->backlight.level,
  602. panel->backlight.device->props.max_brightness);
  603. if (panel->backlight.enabled)
  604. intel_panel_actually_set_backlight(connector, hw_level);
  605. mutex_unlock(&dev_priv->backlight_lock);
  606. }
  607. static void lpt_disable_backlight(struct intel_connector *connector)
  608. {
  609. struct drm_device *dev = connector->base.dev;
  610. struct drm_i915_private *dev_priv = dev->dev_private;
  611. u32 tmp;
  612. intel_panel_actually_set_backlight(connector, 0);
  613. /*
  614. * Although we don't support or enable CPU PWM with LPT/SPT based
  615. * systems, it may have been enabled prior to loading the
  616. * driver. Disable to avoid warnings on LCPLL disable.
  617. *
  618. * This needs rework if we need to add support for CPU PWM on PCH split
  619. * platforms.
  620. */
  621. tmp = I915_READ(BLC_PWM_CPU_CTL2);
  622. if (tmp & BLM_PWM_ENABLE) {
  623. DRM_DEBUG_KMS("cpu backlight was enabled, disabling\n");
  624. I915_WRITE(BLC_PWM_CPU_CTL2, tmp & ~BLM_PWM_ENABLE);
  625. }
  626. tmp = I915_READ(BLC_PWM_PCH_CTL1);
  627. I915_WRITE(BLC_PWM_PCH_CTL1, tmp & ~BLM_PCH_PWM_ENABLE);
  628. }
  629. static void pch_disable_backlight(struct intel_connector *connector)
  630. {
  631. struct drm_device *dev = connector->base.dev;
  632. struct drm_i915_private *dev_priv = dev->dev_private;
  633. u32 tmp;
  634. intel_panel_actually_set_backlight(connector, 0);
  635. tmp = I915_READ(BLC_PWM_CPU_CTL2);
  636. I915_WRITE(BLC_PWM_CPU_CTL2, tmp & ~BLM_PWM_ENABLE);
  637. tmp = I915_READ(BLC_PWM_PCH_CTL1);
  638. I915_WRITE(BLC_PWM_PCH_CTL1, tmp & ~BLM_PCH_PWM_ENABLE);
  639. }
  640. static void i9xx_disable_backlight(struct intel_connector *connector)
  641. {
  642. intel_panel_actually_set_backlight(connector, 0);
  643. }
  644. static void i965_disable_backlight(struct intel_connector *connector)
  645. {
  646. struct drm_device *dev = connector->base.dev;
  647. struct drm_i915_private *dev_priv = dev->dev_private;
  648. u32 tmp;
  649. intel_panel_actually_set_backlight(connector, 0);
  650. tmp = I915_READ(BLC_PWM_CTL2);
  651. I915_WRITE(BLC_PWM_CTL2, tmp & ~BLM_PWM_ENABLE);
  652. }
  653. static void vlv_disable_backlight(struct intel_connector *connector)
  654. {
  655. struct drm_device *dev = connector->base.dev;
  656. struct drm_i915_private *dev_priv = dev->dev_private;
  657. enum pipe pipe = intel_get_pipe_from_connector(connector);
  658. u32 tmp;
  659. if (WARN_ON(pipe != PIPE_A && pipe != PIPE_B))
  660. return;
  661. intel_panel_actually_set_backlight(connector, 0);
  662. tmp = I915_READ(VLV_BLC_PWM_CTL2(pipe));
  663. I915_WRITE(VLV_BLC_PWM_CTL2(pipe), tmp & ~BLM_PWM_ENABLE);
  664. }
  665. static void bxt_disable_backlight(struct intel_connector *connector)
  666. {
  667. struct drm_device *dev = connector->base.dev;
  668. struct drm_i915_private *dev_priv = dev->dev_private;
  669. struct intel_panel *panel = &connector->panel;
  670. u32 tmp, val;
  671. intel_panel_actually_set_backlight(connector, 0);
  672. tmp = I915_READ(BXT_BLC_PWM_CTL(panel->backlight.controller));
  673. I915_WRITE(BXT_BLC_PWM_CTL(panel->backlight.controller),
  674. tmp & ~BXT_BLC_PWM_ENABLE);
  675. if (panel->backlight.controller == 1) {
  676. val = I915_READ(UTIL_PIN_CTL);
  677. val &= ~UTIL_PIN_ENABLE;
  678. I915_WRITE(UTIL_PIN_CTL, val);
  679. }
  680. }
  681. static void pwm_disable_backlight(struct intel_connector *connector)
  682. {
  683. struct intel_panel *panel = &connector->panel;
  684. /* Disable the backlight */
  685. pwm_config(panel->backlight.pwm, 0, CRC_PMIC_PWM_PERIOD_NS);
  686. usleep_range(2000, 3000);
  687. pwm_disable(panel->backlight.pwm);
  688. }
  689. void intel_panel_disable_backlight(struct intel_connector *connector)
  690. {
  691. struct drm_device *dev = connector->base.dev;
  692. struct drm_i915_private *dev_priv = dev->dev_private;
  693. struct intel_panel *panel = &connector->panel;
  694. if (!panel->backlight.present)
  695. return;
  696. /*
  697. * Do not disable backlight on the vga_switcheroo path. When switching
  698. * away from i915, the other client may depend on i915 to handle the
  699. * backlight. This will leave the backlight on unnecessarily when
  700. * another client is not activated.
  701. */
  702. if (dev->switch_power_state == DRM_SWITCH_POWER_CHANGING) {
  703. DRM_DEBUG_DRIVER("Skipping backlight disable on vga switch\n");
  704. return;
  705. }
  706. mutex_lock(&dev_priv->backlight_lock);
  707. if (panel->backlight.device)
  708. panel->backlight.device->props.power = FB_BLANK_POWERDOWN;
  709. panel->backlight.enabled = false;
  710. panel->backlight.disable(connector);
  711. mutex_unlock(&dev_priv->backlight_lock);
  712. }
  713. static void lpt_enable_backlight(struct intel_connector *connector)
  714. {
  715. struct drm_device *dev = connector->base.dev;
  716. struct drm_i915_private *dev_priv = dev->dev_private;
  717. struct intel_panel *panel = &connector->panel;
  718. u32 pch_ctl1, pch_ctl2;
  719. pch_ctl1 = I915_READ(BLC_PWM_PCH_CTL1);
  720. if (pch_ctl1 & BLM_PCH_PWM_ENABLE) {
  721. DRM_DEBUG_KMS("pch backlight already enabled\n");
  722. pch_ctl1 &= ~BLM_PCH_PWM_ENABLE;
  723. I915_WRITE(BLC_PWM_PCH_CTL1, pch_ctl1);
  724. }
  725. pch_ctl2 = panel->backlight.max << 16;
  726. I915_WRITE(BLC_PWM_PCH_CTL2, pch_ctl2);
  727. pch_ctl1 = 0;
  728. if (panel->backlight.active_low_pwm)
  729. pch_ctl1 |= BLM_PCH_POLARITY;
  730. /* After LPT, override is the default. */
  731. if (HAS_PCH_LPT(dev_priv))
  732. pch_ctl1 |= BLM_PCH_OVERRIDE_ENABLE;
  733. I915_WRITE(BLC_PWM_PCH_CTL1, pch_ctl1);
  734. POSTING_READ(BLC_PWM_PCH_CTL1);
  735. I915_WRITE(BLC_PWM_PCH_CTL1, pch_ctl1 | BLM_PCH_PWM_ENABLE);
  736. /* This won't stick until the above enable. */
  737. intel_panel_actually_set_backlight(connector, panel->backlight.level);
  738. }
  739. static void pch_enable_backlight(struct intel_connector *connector)
  740. {
  741. struct drm_device *dev = connector->base.dev;
  742. struct drm_i915_private *dev_priv = dev->dev_private;
  743. struct intel_panel *panel = &connector->panel;
  744. enum pipe pipe = intel_get_pipe_from_connector(connector);
  745. enum transcoder cpu_transcoder =
  746. intel_pipe_to_cpu_transcoder(dev_priv, pipe);
  747. u32 cpu_ctl2, pch_ctl1, pch_ctl2;
  748. cpu_ctl2 = I915_READ(BLC_PWM_CPU_CTL2);
  749. if (cpu_ctl2 & BLM_PWM_ENABLE) {
  750. DRM_DEBUG_KMS("cpu backlight already enabled\n");
  751. cpu_ctl2 &= ~BLM_PWM_ENABLE;
  752. I915_WRITE(BLC_PWM_CPU_CTL2, cpu_ctl2);
  753. }
  754. pch_ctl1 = I915_READ(BLC_PWM_PCH_CTL1);
  755. if (pch_ctl1 & BLM_PCH_PWM_ENABLE) {
  756. DRM_DEBUG_KMS("pch backlight already enabled\n");
  757. pch_ctl1 &= ~BLM_PCH_PWM_ENABLE;
  758. I915_WRITE(BLC_PWM_PCH_CTL1, pch_ctl1);
  759. }
  760. if (cpu_transcoder == TRANSCODER_EDP)
  761. cpu_ctl2 = BLM_TRANSCODER_EDP;
  762. else
  763. cpu_ctl2 = BLM_PIPE(cpu_transcoder);
  764. I915_WRITE(BLC_PWM_CPU_CTL2, cpu_ctl2);
  765. POSTING_READ(BLC_PWM_CPU_CTL2);
  766. I915_WRITE(BLC_PWM_CPU_CTL2, cpu_ctl2 | BLM_PWM_ENABLE);
  767. /* This won't stick until the above enable. */
  768. intel_panel_actually_set_backlight(connector, panel->backlight.level);
  769. pch_ctl2 = panel->backlight.max << 16;
  770. I915_WRITE(BLC_PWM_PCH_CTL2, pch_ctl2);
  771. pch_ctl1 = 0;
  772. if (panel->backlight.active_low_pwm)
  773. pch_ctl1 |= BLM_PCH_POLARITY;
  774. I915_WRITE(BLC_PWM_PCH_CTL1, pch_ctl1);
  775. POSTING_READ(BLC_PWM_PCH_CTL1);
  776. I915_WRITE(BLC_PWM_PCH_CTL1, pch_ctl1 | BLM_PCH_PWM_ENABLE);
  777. }
  778. static void i9xx_enable_backlight(struct intel_connector *connector)
  779. {
  780. struct drm_device *dev = connector->base.dev;
  781. struct drm_i915_private *dev_priv = dev->dev_private;
  782. struct intel_panel *panel = &connector->panel;
  783. u32 ctl, freq;
  784. ctl = I915_READ(BLC_PWM_CTL);
  785. if (ctl & BACKLIGHT_DUTY_CYCLE_MASK_PNV) {
  786. DRM_DEBUG_KMS("backlight already enabled\n");
  787. I915_WRITE(BLC_PWM_CTL, 0);
  788. }
  789. freq = panel->backlight.max;
  790. if (panel->backlight.combination_mode)
  791. freq /= 0xff;
  792. ctl = freq << 17;
  793. if (panel->backlight.combination_mode)
  794. ctl |= BLM_LEGACY_MODE;
  795. if (IS_PINEVIEW(dev) && panel->backlight.active_low_pwm)
  796. ctl |= BLM_POLARITY_PNV;
  797. I915_WRITE(BLC_PWM_CTL, ctl);
  798. POSTING_READ(BLC_PWM_CTL);
  799. /* XXX: combine this into above write? */
  800. intel_panel_actually_set_backlight(connector, panel->backlight.level);
  801. /*
  802. * Needed to enable backlight on some 855gm models. BLC_HIST_CTL is
  803. * 855gm only, but checking for gen2 is safe, as 855gm is the only gen2
  804. * that has backlight.
  805. */
  806. if (IS_GEN2(dev))
  807. I915_WRITE(BLC_HIST_CTL, BLM_HISTOGRAM_ENABLE);
  808. }
  809. static void i965_enable_backlight(struct intel_connector *connector)
  810. {
  811. struct drm_device *dev = connector->base.dev;
  812. struct drm_i915_private *dev_priv = dev->dev_private;
  813. struct intel_panel *panel = &connector->panel;
  814. enum pipe pipe = intel_get_pipe_from_connector(connector);
  815. u32 ctl, ctl2, freq;
  816. ctl2 = I915_READ(BLC_PWM_CTL2);
  817. if (ctl2 & BLM_PWM_ENABLE) {
  818. DRM_DEBUG_KMS("backlight already enabled\n");
  819. ctl2 &= ~BLM_PWM_ENABLE;
  820. I915_WRITE(BLC_PWM_CTL2, ctl2);
  821. }
  822. freq = panel->backlight.max;
  823. if (panel->backlight.combination_mode)
  824. freq /= 0xff;
  825. ctl = freq << 16;
  826. I915_WRITE(BLC_PWM_CTL, ctl);
  827. ctl2 = BLM_PIPE(pipe);
  828. if (panel->backlight.combination_mode)
  829. ctl2 |= BLM_COMBINATION_MODE;
  830. if (panel->backlight.active_low_pwm)
  831. ctl2 |= BLM_POLARITY_I965;
  832. I915_WRITE(BLC_PWM_CTL2, ctl2);
  833. POSTING_READ(BLC_PWM_CTL2);
  834. I915_WRITE(BLC_PWM_CTL2, ctl2 | BLM_PWM_ENABLE);
  835. intel_panel_actually_set_backlight(connector, panel->backlight.level);
  836. }
  837. static void vlv_enable_backlight(struct intel_connector *connector)
  838. {
  839. struct drm_device *dev = connector->base.dev;
  840. struct drm_i915_private *dev_priv = dev->dev_private;
  841. struct intel_panel *panel = &connector->panel;
  842. enum pipe pipe = intel_get_pipe_from_connector(connector);
  843. u32 ctl, ctl2;
  844. if (WARN_ON(pipe != PIPE_A && pipe != PIPE_B))
  845. return;
  846. ctl2 = I915_READ(VLV_BLC_PWM_CTL2(pipe));
  847. if (ctl2 & BLM_PWM_ENABLE) {
  848. DRM_DEBUG_KMS("backlight already enabled\n");
  849. ctl2 &= ~BLM_PWM_ENABLE;
  850. I915_WRITE(VLV_BLC_PWM_CTL2(pipe), ctl2);
  851. }
  852. ctl = panel->backlight.max << 16;
  853. I915_WRITE(VLV_BLC_PWM_CTL(pipe), ctl);
  854. /* XXX: combine this into above write? */
  855. intel_panel_actually_set_backlight(connector, panel->backlight.level);
  856. ctl2 = 0;
  857. if (panel->backlight.active_low_pwm)
  858. ctl2 |= BLM_POLARITY_I965;
  859. I915_WRITE(VLV_BLC_PWM_CTL2(pipe), ctl2);
  860. POSTING_READ(VLV_BLC_PWM_CTL2(pipe));
  861. I915_WRITE(VLV_BLC_PWM_CTL2(pipe), ctl2 | BLM_PWM_ENABLE);
  862. }
  863. static void bxt_enable_backlight(struct intel_connector *connector)
  864. {
  865. struct drm_device *dev = connector->base.dev;
  866. struct drm_i915_private *dev_priv = dev->dev_private;
  867. struct intel_panel *panel = &connector->panel;
  868. enum pipe pipe = intel_get_pipe_from_connector(connector);
  869. u32 pwm_ctl, val;
  870. /* To use 2nd set of backlight registers, utility pin has to be
  871. * enabled with PWM mode.
  872. * The field should only be changed when the utility pin is disabled
  873. */
  874. if (panel->backlight.controller == 1) {
  875. val = I915_READ(UTIL_PIN_CTL);
  876. if (val & UTIL_PIN_ENABLE) {
  877. DRM_DEBUG_KMS("util pin already enabled\n");
  878. val &= ~UTIL_PIN_ENABLE;
  879. I915_WRITE(UTIL_PIN_CTL, val);
  880. }
  881. val = 0;
  882. if (panel->backlight.util_pin_active_low)
  883. val |= UTIL_PIN_POLARITY;
  884. I915_WRITE(UTIL_PIN_CTL, val | UTIL_PIN_PIPE(pipe) |
  885. UTIL_PIN_MODE_PWM | UTIL_PIN_ENABLE);
  886. }
  887. pwm_ctl = I915_READ(BXT_BLC_PWM_CTL(panel->backlight.controller));
  888. if (pwm_ctl & BXT_BLC_PWM_ENABLE) {
  889. DRM_DEBUG_KMS("backlight already enabled\n");
  890. pwm_ctl &= ~BXT_BLC_PWM_ENABLE;
  891. I915_WRITE(BXT_BLC_PWM_CTL(panel->backlight.controller),
  892. pwm_ctl);
  893. }
  894. I915_WRITE(BXT_BLC_PWM_FREQ(panel->backlight.controller),
  895. panel->backlight.max);
  896. intel_panel_actually_set_backlight(connector, panel->backlight.level);
  897. pwm_ctl = 0;
  898. if (panel->backlight.active_low_pwm)
  899. pwm_ctl |= BXT_BLC_PWM_POLARITY;
  900. I915_WRITE(BXT_BLC_PWM_CTL(panel->backlight.controller), pwm_ctl);
  901. POSTING_READ(BXT_BLC_PWM_CTL(panel->backlight.controller));
  902. I915_WRITE(BXT_BLC_PWM_CTL(panel->backlight.controller),
  903. pwm_ctl | BXT_BLC_PWM_ENABLE);
  904. }
  905. static void pwm_enable_backlight(struct intel_connector *connector)
  906. {
  907. struct intel_panel *panel = &connector->panel;
  908. pwm_enable(panel->backlight.pwm);
  909. intel_panel_actually_set_backlight(connector, panel->backlight.level);
  910. }
  911. void intel_panel_enable_backlight(struct intel_connector *connector)
  912. {
  913. struct drm_device *dev = connector->base.dev;
  914. struct drm_i915_private *dev_priv = dev->dev_private;
  915. struct intel_panel *panel = &connector->panel;
  916. enum pipe pipe = intel_get_pipe_from_connector(connector);
  917. if (!panel->backlight.present)
  918. return;
  919. DRM_DEBUG_KMS("pipe %c\n", pipe_name(pipe));
  920. mutex_lock(&dev_priv->backlight_lock);
  921. WARN_ON(panel->backlight.max == 0);
  922. if (panel->backlight.level <= panel->backlight.min) {
  923. panel->backlight.level = panel->backlight.max;
  924. if (panel->backlight.device)
  925. panel->backlight.device->props.brightness =
  926. scale_hw_to_user(connector,
  927. panel->backlight.level,
  928. panel->backlight.device->props.max_brightness);
  929. }
  930. panel->backlight.enable(connector);
  931. panel->backlight.enabled = true;
  932. if (panel->backlight.device)
  933. panel->backlight.device->props.power = FB_BLANK_UNBLANK;
  934. mutex_unlock(&dev_priv->backlight_lock);
  935. }
  936. #if IS_ENABLED(CONFIG_BACKLIGHT_CLASS_DEVICE)
  937. static int intel_backlight_device_update_status(struct backlight_device *bd)
  938. {
  939. struct intel_connector *connector = bl_get_data(bd);
  940. struct intel_panel *panel = &connector->panel;
  941. struct drm_device *dev = connector->base.dev;
  942. drm_modeset_lock(&dev->mode_config.connection_mutex, NULL);
  943. DRM_DEBUG_KMS("updating intel_backlight, brightness=%d/%d\n",
  944. bd->props.brightness, bd->props.max_brightness);
  945. intel_panel_set_backlight(connector, bd->props.brightness,
  946. bd->props.max_brightness);
  947. /*
  948. * Allow flipping bl_power as a sub-state of enabled. Sadly the
  949. * backlight class device does not make it easy to to differentiate
  950. * between callbacks for brightness and bl_power, so our backlight_power
  951. * callback needs to take this into account.
  952. */
  953. if (panel->backlight.enabled) {
  954. if (panel->backlight.power) {
  955. bool enable = bd->props.power == FB_BLANK_UNBLANK &&
  956. bd->props.brightness != 0;
  957. panel->backlight.power(connector, enable);
  958. }
  959. } else {
  960. bd->props.power = FB_BLANK_POWERDOWN;
  961. }
  962. drm_modeset_unlock(&dev->mode_config.connection_mutex);
  963. return 0;
  964. }
  965. static int intel_backlight_device_get_brightness(struct backlight_device *bd)
  966. {
  967. struct intel_connector *connector = bl_get_data(bd);
  968. struct drm_device *dev = connector->base.dev;
  969. struct drm_i915_private *dev_priv = dev->dev_private;
  970. u32 hw_level;
  971. int ret;
  972. intel_runtime_pm_get(dev_priv);
  973. drm_modeset_lock(&dev->mode_config.connection_mutex, NULL);
  974. hw_level = intel_panel_get_backlight(connector);
  975. ret = scale_hw_to_user(connector, hw_level, bd->props.max_brightness);
  976. drm_modeset_unlock(&dev->mode_config.connection_mutex);
  977. intel_runtime_pm_put(dev_priv);
  978. return ret;
  979. }
  980. static const struct backlight_ops intel_backlight_device_ops = {
  981. .update_status = intel_backlight_device_update_status,
  982. .get_brightness = intel_backlight_device_get_brightness,
  983. };
  984. static int intel_backlight_device_register(struct intel_connector *connector)
  985. {
  986. struct intel_panel *panel = &connector->panel;
  987. struct backlight_properties props;
  988. if (WARN_ON(panel->backlight.device))
  989. return -ENODEV;
  990. if (!panel->backlight.present)
  991. return 0;
  992. WARN_ON(panel->backlight.max == 0);
  993. memset(&props, 0, sizeof(props));
  994. props.type = BACKLIGHT_RAW;
  995. /*
  996. * Note: Everything should work even if the backlight device max
  997. * presented to the userspace is arbitrarily chosen.
  998. */
  999. props.max_brightness = panel->backlight.max;
  1000. props.brightness = scale_hw_to_user(connector,
  1001. panel->backlight.level,
  1002. props.max_brightness);
  1003. if (panel->backlight.enabled)
  1004. props.power = FB_BLANK_UNBLANK;
  1005. else
  1006. props.power = FB_BLANK_POWERDOWN;
  1007. /*
  1008. * Note: using the same name independent of the connector prevents
  1009. * registration of multiple backlight devices in the driver.
  1010. */
  1011. panel->backlight.device =
  1012. backlight_device_register("intel_backlight",
  1013. connector->base.kdev,
  1014. connector,
  1015. &intel_backlight_device_ops, &props);
  1016. if (IS_ERR(panel->backlight.device)) {
  1017. DRM_ERROR("Failed to register backlight: %ld\n",
  1018. PTR_ERR(panel->backlight.device));
  1019. panel->backlight.device = NULL;
  1020. return -ENODEV;
  1021. }
  1022. DRM_DEBUG_KMS("Connector %s backlight sysfs interface registered\n",
  1023. connector->base.name);
  1024. return 0;
  1025. }
  1026. static void intel_backlight_device_unregister(struct intel_connector *connector)
  1027. {
  1028. struct intel_panel *panel = &connector->panel;
  1029. if (panel->backlight.device) {
  1030. backlight_device_unregister(panel->backlight.device);
  1031. panel->backlight.device = NULL;
  1032. }
  1033. }
  1034. #else /* CONFIG_BACKLIGHT_CLASS_DEVICE */
  1035. static int intel_backlight_device_register(struct intel_connector *connector)
  1036. {
  1037. return 0;
  1038. }
  1039. static void intel_backlight_device_unregister(struct intel_connector *connector)
  1040. {
  1041. }
  1042. #endif /* CONFIG_BACKLIGHT_CLASS_DEVICE */
  1043. /*
  1044. * BXT: PWM clock frequency = 19.2 MHz.
  1045. */
  1046. static u32 bxt_hz_to_pwm(struct intel_connector *connector, u32 pwm_freq_hz)
  1047. {
  1048. return KHz(19200) / pwm_freq_hz;
  1049. }
  1050. /*
  1051. * SPT: This value represents the period of the PWM stream in clock periods
  1052. * multiplied by 16 (default increment) or 128 (alternate increment selected in
  1053. * SCHICKEN_1 bit 0). PWM clock is 24 MHz.
  1054. */
  1055. static u32 spt_hz_to_pwm(struct intel_connector *connector, u32 pwm_freq_hz)
  1056. {
  1057. struct drm_device *dev = connector->base.dev;
  1058. struct drm_i915_private *dev_priv = dev->dev_private;
  1059. u32 mul, clock;
  1060. if (I915_READ(SOUTH_CHICKEN1) & SPT_PWM_GRANULARITY)
  1061. mul = 128;
  1062. else
  1063. mul = 16;
  1064. clock = MHz(24);
  1065. return clock / (pwm_freq_hz * mul);
  1066. }
  1067. /*
  1068. * LPT: This value represents the period of the PWM stream in clock periods
  1069. * multiplied by 128 (default increment) or 16 (alternate increment, selected in
  1070. * LPT SOUTH_CHICKEN2 register bit 5).
  1071. */
  1072. static u32 lpt_hz_to_pwm(struct intel_connector *connector, u32 pwm_freq_hz)
  1073. {
  1074. struct drm_device *dev = connector->base.dev;
  1075. struct drm_i915_private *dev_priv = dev->dev_private;
  1076. u32 mul, clock;
  1077. if (I915_READ(SOUTH_CHICKEN2) & LPT_PWM_GRANULARITY)
  1078. mul = 16;
  1079. else
  1080. mul = 128;
  1081. if (HAS_PCH_LPT_H(dev_priv))
  1082. clock = MHz(135); /* LPT:H */
  1083. else
  1084. clock = MHz(24); /* LPT:LP */
  1085. return clock / (pwm_freq_hz * mul);
  1086. }
  1087. /*
  1088. * ILK/SNB/IVB: This value represents the period of the PWM stream in PCH
  1089. * display raw clocks multiplied by 128.
  1090. */
  1091. static u32 pch_hz_to_pwm(struct intel_connector *connector, u32 pwm_freq_hz)
  1092. {
  1093. struct drm_device *dev = connector->base.dev;
  1094. int clock = MHz(intel_pch_rawclk(dev));
  1095. return clock / (pwm_freq_hz * 128);
  1096. }
  1097. /*
  1098. * Gen2: This field determines the number of time base events (display core
  1099. * clock frequency/32) in total for a complete cycle of modulated backlight
  1100. * control.
  1101. *
  1102. * Gen3: A time base event equals the display core clock ([DevPNV] HRAW clock)
  1103. * divided by 32.
  1104. */
  1105. static u32 i9xx_hz_to_pwm(struct intel_connector *connector, u32 pwm_freq_hz)
  1106. {
  1107. struct drm_device *dev = connector->base.dev;
  1108. struct drm_i915_private *dev_priv = dev->dev_private;
  1109. int clock;
  1110. if (IS_PINEVIEW(dev))
  1111. clock = MHz(intel_hrawclk(dev));
  1112. else
  1113. clock = 1000 * dev_priv->cdclk_freq;
  1114. return clock / (pwm_freq_hz * 32);
  1115. }
  1116. /*
  1117. * Gen4: This value represents the period of the PWM stream in display core
  1118. * clocks ([DevCTG] HRAW clocks) multiplied by 128.
  1119. *
  1120. */
  1121. static u32 i965_hz_to_pwm(struct intel_connector *connector, u32 pwm_freq_hz)
  1122. {
  1123. struct drm_device *dev = connector->base.dev;
  1124. struct drm_i915_private *dev_priv = dev->dev_private;
  1125. int clock;
  1126. if (IS_G4X(dev_priv))
  1127. clock = MHz(intel_hrawclk(dev));
  1128. else
  1129. clock = 1000 * dev_priv->cdclk_freq;
  1130. return clock / (pwm_freq_hz * 128);
  1131. }
  1132. /*
  1133. * VLV: This value represents the period of the PWM stream in display core
  1134. * clocks ([DevCTG] 200MHz HRAW clocks) multiplied by 128 or 25MHz S0IX clocks
  1135. * multiplied by 16. CHV uses a 19.2MHz S0IX clock.
  1136. */
  1137. static u32 vlv_hz_to_pwm(struct intel_connector *connector, u32 pwm_freq_hz)
  1138. {
  1139. struct drm_device *dev = connector->base.dev;
  1140. struct drm_i915_private *dev_priv = dev->dev_private;
  1141. int clock;
  1142. if ((I915_READ(CBR1_VLV) & CBR_PWM_CLOCK_MUX_SELECT) == 0) {
  1143. if (IS_CHERRYVIEW(dev))
  1144. return KHz(19200) / (pwm_freq_hz * 16);
  1145. else
  1146. return MHz(25) / (pwm_freq_hz * 16);
  1147. } else {
  1148. clock = intel_hrawclk(dev);
  1149. return MHz(clock) / (pwm_freq_hz * 128);
  1150. }
  1151. }
  1152. static u32 get_backlight_max_vbt(struct intel_connector *connector)
  1153. {
  1154. struct drm_device *dev = connector->base.dev;
  1155. struct drm_i915_private *dev_priv = dev->dev_private;
  1156. struct intel_panel *panel = &connector->panel;
  1157. u16 pwm_freq_hz = dev_priv->vbt.backlight.pwm_freq_hz;
  1158. u32 pwm;
  1159. if (!panel->backlight.hz_to_pwm) {
  1160. DRM_DEBUG_KMS("backlight frequency conversion not supported\n");
  1161. return 0;
  1162. }
  1163. if (pwm_freq_hz) {
  1164. DRM_DEBUG_KMS("VBT defined backlight frequency %u Hz\n",
  1165. pwm_freq_hz);
  1166. } else {
  1167. pwm_freq_hz = 200;
  1168. DRM_DEBUG_KMS("default backlight frequency %u Hz\n",
  1169. pwm_freq_hz);
  1170. }
  1171. pwm = panel->backlight.hz_to_pwm(connector, pwm_freq_hz);
  1172. if (!pwm) {
  1173. DRM_DEBUG_KMS("backlight frequency conversion failed\n");
  1174. return 0;
  1175. }
  1176. return pwm;
  1177. }
  1178. /*
  1179. * Note: The setup hooks can't assume pipe is set!
  1180. */
  1181. static u32 get_backlight_min_vbt(struct intel_connector *connector)
  1182. {
  1183. struct drm_device *dev = connector->base.dev;
  1184. struct drm_i915_private *dev_priv = dev->dev_private;
  1185. struct intel_panel *panel = &connector->panel;
  1186. int min;
  1187. WARN_ON(panel->backlight.max == 0);
  1188. /*
  1189. * XXX: If the vbt value is 255, it makes min equal to max, which leads
  1190. * to problems. There are such machines out there. Either our
  1191. * interpretation is wrong or the vbt has bogus data. Or both. Safeguard
  1192. * against this by letting the minimum be at most (arbitrarily chosen)
  1193. * 25% of the max.
  1194. */
  1195. min = clamp_t(int, dev_priv->vbt.backlight.min_brightness, 0, 64);
  1196. if (min != dev_priv->vbt.backlight.min_brightness) {
  1197. DRM_DEBUG_KMS("clamping VBT min backlight %d/255 to %d/255\n",
  1198. dev_priv->vbt.backlight.min_brightness, min);
  1199. }
  1200. /* vbt value is a coefficient in range [0..255] */
  1201. return scale(min, 0, 255, 0, panel->backlight.max);
  1202. }
  1203. static int lpt_setup_backlight(struct intel_connector *connector, enum pipe unused)
  1204. {
  1205. struct drm_device *dev = connector->base.dev;
  1206. struct drm_i915_private *dev_priv = dev->dev_private;
  1207. struct intel_panel *panel = &connector->panel;
  1208. u32 pch_ctl1, pch_ctl2, val;
  1209. pch_ctl1 = I915_READ(BLC_PWM_PCH_CTL1);
  1210. panel->backlight.active_low_pwm = pch_ctl1 & BLM_PCH_POLARITY;
  1211. pch_ctl2 = I915_READ(BLC_PWM_PCH_CTL2);
  1212. panel->backlight.max = pch_ctl2 >> 16;
  1213. if (!panel->backlight.max)
  1214. panel->backlight.max = get_backlight_max_vbt(connector);
  1215. if (!panel->backlight.max)
  1216. return -ENODEV;
  1217. panel->backlight.min = get_backlight_min_vbt(connector);
  1218. val = lpt_get_backlight(connector);
  1219. panel->backlight.level = intel_panel_compute_brightness(connector, val);
  1220. panel->backlight.enabled = (pch_ctl1 & BLM_PCH_PWM_ENABLE) &&
  1221. panel->backlight.level != 0;
  1222. return 0;
  1223. }
  1224. static int pch_setup_backlight(struct intel_connector *connector, enum pipe unused)
  1225. {
  1226. struct drm_device *dev = connector->base.dev;
  1227. struct drm_i915_private *dev_priv = dev->dev_private;
  1228. struct intel_panel *panel = &connector->panel;
  1229. u32 cpu_ctl2, pch_ctl1, pch_ctl2, val;
  1230. pch_ctl1 = I915_READ(BLC_PWM_PCH_CTL1);
  1231. panel->backlight.active_low_pwm = pch_ctl1 & BLM_PCH_POLARITY;
  1232. pch_ctl2 = I915_READ(BLC_PWM_PCH_CTL2);
  1233. panel->backlight.max = pch_ctl2 >> 16;
  1234. if (!panel->backlight.max)
  1235. panel->backlight.max = get_backlight_max_vbt(connector);
  1236. if (!panel->backlight.max)
  1237. return -ENODEV;
  1238. panel->backlight.min = get_backlight_min_vbt(connector);
  1239. val = pch_get_backlight(connector);
  1240. panel->backlight.level = intel_panel_compute_brightness(connector, val);
  1241. cpu_ctl2 = I915_READ(BLC_PWM_CPU_CTL2);
  1242. panel->backlight.enabled = (cpu_ctl2 & BLM_PWM_ENABLE) &&
  1243. (pch_ctl1 & BLM_PCH_PWM_ENABLE) && panel->backlight.level != 0;
  1244. return 0;
  1245. }
  1246. static int i9xx_setup_backlight(struct intel_connector *connector, enum pipe unused)
  1247. {
  1248. struct drm_device *dev = connector->base.dev;
  1249. struct drm_i915_private *dev_priv = dev->dev_private;
  1250. struct intel_panel *panel = &connector->panel;
  1251. u32 ctl, val;
  1252. ctl = I915_READ(BLC_PWM_CTL);
  1253. if (IS_GEN2(dev) || IS_I915GM(dev) || IS_I945GM(dev))
  1254. panel->backlight.combination_mode = ctl & BLM_LEGACY_MODE;
  1255. if (IS_PINEVIEW(dev))
  1256. panel->backlight.active_low_pwm = ctl & BLM_POLARITY_PNV;
  1257. panel->backlight.max = ctl >> 17;
  1258. if (!panel->backlight.max) {
  1259. panel->backlight.max = get_backlight_max_vbt(connector);
  1260. panel->backlight.max >>= 1;
  1261. }
  1262. if (!panel->backlight.max)
  1263. return -ENODEV;
  1264. if (panel->backlight.combination_mode)
  1265. panel->backlight.max *= 0xff;
  1266. panel->backlight.min = get_backlight_min_vbt(connector);
  1267. val = i9xx_get_backlight(connector);
  1268. panel->backlight.level = intel_panel_compute_brightness(connector, val);
  1269. panel->backlight.enabled = panel->backlight.level != 0;
  1270. return 0;
  1271. }
  1272. static int i965_setup_backlight(struct intel_connector *connector, enum pipe unused)
  1273. {
  1274. struct drm_device *dev = connector->base.dev;
  1275. struct drm_i915_private *dev_priv = dev->dev_private;
  1276. struct intel_panel *panel = &connector->panel;
  1277. u32 ctl, ctl2, val;
  1278. ctl2 = I915_READ(BLC_PWM_CTL2);
  1279. panel->backlight.combination_mode = ctl2 & BLM_COMBINATION_MODE;
  1280. panel->backlight.active_low_pwm = ctl2 & BLM_POLARITY_I965;
  1281. ctl = I915_READ(BLC_PWM_CTL);
  1282. panel->backlight.max = ctl >> 16;
  1283. if (!panel->backlight.max)
  1284. panel->backlight.max = get_backlight_max_vbt(connector);
  1285. if (!panel->backlight.max)
  1286. return -ENODEV;
  1287. if (panel->backlight.combination_mode)
  1288. panel->backlight.max *= 0xff;
  1289. panel->backlight.min = get_backlight_min_vbt(connector);
  1290. val = i9xx_get_backlight(connector);
  1291. panel->backlight.level = intel_panel_compute_brightness(connector, val);
  1292. panel->backlight.enabled = (ctl2 & BLM_PWM_ENABLE) &&
  1293. panel->backlight.level != 0;
  1294. return 0;
  1295. }
  1296. static int vlv_setup_backlight(struct intel_connector *connector, enum pipe pipe)
  1297. {
  1298. struct drm_device *dev = connector->base.dev;
  1299. struct drm_i915_private *dev_priv = dev->dev_private;
  1300. struct intel_panel *panel = &connector->panel;
  1301. u32 ctl, ctl2, val;
  1302. if (WARN_ON(pipe != PIPE_A && pipe != PIPE_B))
  1303. return -ENODEV;
  1304. ctl2 = I915_READ(VLV_BLC_PWM_CTL2(pipe));
  1305. panel->backlight.active_low_pwm = ctl2 & BLM_POLARITY_I965;
  1306. ctl = I915_READ(VLV_BLC_PWM_CTL(pipe));
  1307. panel->backlight.max = ctl >> 16;
  1308. if (!panel->backlight.max)
  1309. panel->backlight.max = get_backlight_max_vbt(connector);
  1310. if (!panel->backlight.max)
  1311. return -ENODEV;
  1312. panel->backlight.min = get_backlight_min_vbt(connector);
  1313. val = _vlv_get_backlight(dev, pipe);
  1314. panel->backlight.level = intel_panel_compute_brightness(connector, val);
  1315. panel->backlight.enabled = (ctl2 & BLM_PWM_ENABLE) &&
  1316. panel->backlight.level != 0;
  1317. return 0;
  1318. }
  1319. static int
  1320. bxt_setup_backlight(struct intel_connector *connector, enum pipe unused)
  1321. {
  1322. struct drm_device *dev = connector->base.dev;
  1323. struct drm_i915_private *dev_priv = dev->dev_private;
  1324. struct intel_panel *panel = &connector->panel;
  1325. u32 pwm_ctl, val;
  1326. /*
  1327. * For BXT hard coding the Backlight controller to 0.
  1328. * TODO : Read the controller value from VBT and generalize
  1329. */
  1330. panel->backlight.controller = 0;
  1331. pwm_ctl = I915_READ(BXT_BLC_PWM_CTL(panel->backlight.controller));
  1332. /* Keeping the check if controller 1 is to be programmed.
  1333. * This will come into affect once the VBT parsing
  1334. * is fixed for controller selection, and controller 1 is used
  1335. * for a prticular display configuration.
  1336. */
  1337. if (panel->backlight.controller == 1) {
  1338. val = I915_READ(UTIL_PIN_CTL);
  1339. panel->backlight.util_pin_active_low =
  1340. val & UTIL_PIN_POLARITY;
  1341. }
  1342. panel->backlight.active_low_pwm = pwm_ctl & BXT_BLC_PWM_POLARITY;
  1343. panel->backlight.max =
  1344. I915_READ(BXT_BLC_PWM_FREQ(panel->backlight.controller));
  1345. if (!panel->backlight.max)
  1346. panel->backlight.max = get_backlight_max_vbt(connector);
  1347. if (!panel->backlight.max)
  1348. return -ENODEV;
  1349. val = bxt_get_backlight(connector);
  1350. panel->backlight.level = intel_panel_compute_brightness(connector, val);
  1351. panel->backlight.enabled = (pwm_ctl & BXT_BLC_PWM_ENABLE) &&
  1352. panel->backlight.level != 0;
  1353. return 0;
  1354. }
  1355. static int pwm_setup_backlight(struct intel_connector *connector,
  1356. enum pipe pipe)
  1357. {
  1358. struct drm_device *dev = connector->base.dev;
  1359. struct intel_panel *panel = &connector->panel;
  1360. int retval;
  1361. /* Get the PWM chip for backlight control */
  1362. panel->backlight.pwm = pwm_get(dev->dev, "pwm_backlight");
  1363. if (IS_ERR(panel->backlight.pwm)) {
  1364. DRM_ERROR("Failed to own the pwm chip\n");
  1365. panel->backlight.pwm = NULL;
  1366. return -ENODEV;
  1367. }
  1368. retval = pwm_config(panel->backlight.pwm, CRC_PMIC_PWM_PERIOD_NS,
  1369. CRC_PMIC_PWM_PERIOD_NS);
  1370. if (retval < 0) {
  1371. DRM_ERROR("Failed to configure the pwm chip\n");
  1372. pwm_put(panel->backlight.pwm);
  1373. panel->backlight.pwm = NULL;
  1374. return retval;
  1375. }
  1376. panel->backlight.min = 0; /* 0% */
  1377. panel->backlight.max = 100; /* 100% */
  1378. panel->backlight.level = DIV_ROUND_UP(
  1379. pwm_get_duty_cycle(panel->backlight.pwm) * 100,
  1380. CRC_PMIC_PWM_PERIOD_NS);
  1381. panel->backlight.enabled = panel->backlight.level != 0;
  1382. return 0;
  1383. }
  1384. int intel_panel_setup_backlight(struct drm_connector *connector, enum pipe pipe)
  1385. {
  1386. struct drm_device *dev = connector->dev;
  1387. struct drm_i915_private *dev_priv = dev->dev_private;
  1388. struct intel_connector *intel_connector = to_intel_connector(connector);
  1389. struct intel_panel *panel = &intel_connector->panel;
  1390. int ret;
  1391. if (!dev_priv->vbt.backlight.present) {
  1392. if (dev_priv->quirks & QUIRK_BACKLIGHT_PRESENT) {
  1393. DRM_DEBUG_KMS("no backlight present per VBT, but present per quirk\n");
  1394. } else {
  1395. DRM_DEBUG_KMS("no backlight present per VBT\n");
  1396. return 0;
  1397. }
  1398. }
  1399. /* ensure intel_panel has been initialized first */
  1400. if (WARN_ON(!panel->backlight.setup))
  1401. return -ENODEV;
  1402. /* set level and max in panel struct */
  1403. mutex_lock(&dev_priv->backlight_lock);
  1404. ret = panel->backlight.setup(intel_connector, pipe);
  1405. mutex_unlock(&dev_priv->backlight_lock);
  1406. if (ret) {
  1407. DRM_DEBUG_KMS("failed to setup backlight for connector %s\n",
  1408. connector->name);
  1409. return ret;
  1410. }
  1411. panel->backlight.present = true;
  1412. DRM_DEBUG_KMS("Connector %s backlight initialized, %s, brightness %u/%u\n",
  1413. connector->name,
  1414. panel->backlight.enabled ? "enabled" : "disabled",
  1415. panel->backlight.level, panel->backlight.max);
  1416. return 0;
  1417. }
  1418. void intel_panel_destroy_backlight(struct drm_connector *connector)
  1419. {
  1420. struct intel_connector *intel_connector = to_intel_connector(connector);
  1421. struct intel_panel *panel = &intel_connector->panel;
  1422. /* dispose of the pwm */
  1423. if (panel->backlight.pwm)
  1424. pwm_put(panel->backlight.pwm);
  1425. panel->backlight.present = false;
  1426. }
  1427. /* Set up chip specific backlight functions */
  1428. static void
  1429. intel_panel_init_backlight_funcs(struct intel_panel *panel)
  1430. {
  1431. struct intel_connector *intel_connector =
  1432. container_of(panel, struct intel_connector, panel);
  1433. struct drm_device *dev = intel_connector->base.dev;
  1434. struct drm_i915_private *dev_priv = dev->dev_private;
  1435. if (IS_BROXTON(dev)) {
  1436. panel->backlight.setup = bxt_setup_backlight;
  1437. panel->backlight.enable = bxt_enable_backlight;
  1438. panel->backlight.disable = bxt_disable_backlight;
  1439. panel->backlight.set = bxt_set_backlight;
  1440. panel->backlight.get = bxt_get_backlight;
  1441. panel->backlight.hz_to_pwm = bxt_hz_to_pwm;
  1442. } else if (HAS_PCH_LPT(dev) || HAS_PCH_SPT(dev)) {
  1443. panel->backlight.setup = lpt_setup_backlight;
  1444. panel->backlight.enable = lpt_enable_backlight;
  1445. panel->backlight.disable = lpt_disable_backlight;
  1446. panel->backlight.set = lpt_set_backlight;
  1447. panel->backlight.get = lpt_get_backlight;
  1448. if (HAS_PCH_LPT(dev))
  1449. panel->backlight.hz_to_pwm = lpt_hz_to_pwm;
  1450. else
  1451. panel->backlight.hz_to_pwm = spt_hz_to_pwm;
  1452. } else if (HAS_PCH_SPLIT(dev)) {
  1453. panel->backlight.setup = pch_setup_backlight;
  1454. panel->backlight.enable = pch_enable_backlight;
  1455. panel->backlight.disable = pch_disable_backlight;
  1456. panel->backlight.set = pch_set_backlight;
  1457. panel->backlight.get = pch_get_backlight;
  1458. panel->backlight.hz_to_pwm = pch_hz_to_pwm;
  1459. } else if (IS_VALLEYVIEW(dev)) {
  1460. if (dev_priv->vbt.has_mipi) {
  1461. panel->backlight.setup = pwm_setup_backlight;
  1462. panel->backlight.enable = pwm_enable_backlight;
  1463. panel->backlight.disable = pwm_disable_backlight;
  1464. panel->backlight.set = pwm_set_backlight;
  1465. panel->backlight.get = pwm_get_backlight;
  1466. } else {
  1467. panel->backlight.setup = vlv_setup_backlight;
  1468. panel->backlight.enable = vlv_enable_backlight;
  1469. panel->backlight.disable = vlv_disable_backlight;
  1470. panel->backlight.set = vlv_set_backlight;
  1471. panel->backlight.get = vlv_get_backlight;
  1472. panel->backlight.hz_to_pwm = vlv_hz_to_pwm;
  1473. }
  1474. } else if (IS_GEN4(dev)) {
  1475. panel->backlight.setup = i965_setup_backlight;
  1476. panel->backlight.enable = i965_enable_backlight;
  1477. panel->backlight.disable = i965_disable_backlight;
  1478. panel->backlight.set = i9xx_set_backlight;
  1479. panel->backlight.get = i9xx_get_backlight;
  1480. panel->backlight.hz_to_pwm = i965_hz_to_pwm;
  1481. } else {
  1482. panel->backlight.setup = i9xx_setup_backlight;
  1483. panel->backlight.enable = i9xx_enable_backlight;
  1484. panel->backlight.disable = i9xx_disable_backlight;
  1485. panel->backlight.set = i9xx_set_backlight;
  1486. panel->backlight.get = i9xx_get_backlight;
  1487. panel->backlight.hz_to_pwm = i9xx_hz_to_pwm;
  1488. }
  1489. }
  1490. int intel_panel_init(struct intel_panel *panel,
  1491. struct drm_display_mode *fixed_mode,
  1492. struct drm_display_mode *downclock_mode)
  1493. {
  1494. intel_panel_init_backlight_funcs(panel);
  1495. panel->fixed_mode = fixed_mode;
  1496. panel->downclock_mode = downclock_mode;
  1497. return 0;
  1498. }
  1499. void intel_panel_fini(struct intel_panel *panel)
  1500. {
  1501. struct intel_connector *intel_connector =
  1502. container_of(panel, struct intel_connector, panel);
  1503. if (panel->fixed_mode)
  1504. drm_mode_destroy(intel_connector->base.dev, panel->fixed_mode);
  1505. if (panel->downclock_mode)
  1506. drm_mode_destroy(intel_connector->base.dev,
  1507. panel->downclock_mode);
  1508. }
  1509. void intel_backlight_register(struct drm_device *dev)
  1510. {
  1511. struct intel_connector *connector;
  1512. list_for_each_entry(connector, &dev->mode_config.connector_list, base.head)
  1513. intel_backlight_device_register(connector);
  1514. }
  1515. void intel_backlight_unregister(struct drm_device *dev)
  1516. {
  1517. struct intel_connector *connector;
  1518. list_for_each_entry(connector, &dev->mode_config.connector_list, base.head)
  1519. intel_backlight_device_unregister(connector);
  1520. }