hid-cp2112.c 36 KB

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  1. /*
  2. * hid-cp2112.c - Silicon Labs HID USB to SMBus master bridge
  3. * Copyright (c) 2013,2014 Uplogix, Inc.
  4. * David Barksdale <dbarksdale@uplogix.com>
  5. *
  6. * This program is free software; you can redistribute it and/or modify it
  7. * under the terms and conditions of the GNU General Public License,
  8. * version 2, as published by the Free Software Foundation.
  9. *
  10. * This program is distributed in the hope it will be useful, but WITHOUT
  11. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  12. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  13. * more details.
  14. */
  15. /*
  16. * The Silicon Labs CP2112 chip is a USB HID device which provides an
  17. * SMBus controller for talking to slave devices and 8 GPIO pins. The
  18. * host communicates with the CP2112 via raw HID reports.
  19. *
  20. * Data Sheet:
  21. * http://www.silabs.com/Support%20Documents/TechnicalDocs/CP2112.pdf
  22. * Programming Interface Specification:
  23. * http://www.silabs.com/Support%20Documents/TechnicalDocs/AN495.pdf
  24. */
  25. #include <linux/gpio.h>
  26. #include <linux/gpio/driver.h>
  27. #include <linux/hid.h>
  28. #include <linux/hidraw.h>
  29. #include <linux/i2c.h>
  30. #include <linux/module.h>
  31. #include <linux/nls.h>
  32. #include <linux/usb/ch9.h>
  33. #include "hid-ids.h"
  34. #define CP2112_REPORT_MAX_LENGTH 64
  35. #define CP2112_GPIO_CONFIG_LENGTH 5
  36. #define CP2112_GPIO_GET_LENGTH 2
  37. #define CP2112_GPIO_SET_LENGTH 3
  38. enum {
  39. CP2112_GPIO_CONFIG = 0x02,
  40. CP2112_GPIO_GET = 0x03,
  41. CP2112_GPIO_SET = 0x04,
  42. CP2112_GET_VERSION_INFO = 0x05,
  43. CP2112_SMBUS_CONFIG = 0x06,
  44. CP2112_DATA_READ_REQUEST = 0x10,
  45. CP2112_DATA_WRITE_READ_REQUEST = 0x11,
  46. CP2112_DATA_READ_FORCE_SEND = 0x12,
  47. CP2112_DATA_READ_RESPONSE = 0x13,
  48. CP2112_DATA_WRITE_REQUEST = 0x14,
  49. CP2112_TRANSFER_STATUS_REQUEST = 0x15,
  50. CP2112_TRANSFER_STATUS_RESPONSE = 0x16,
  51. CP2112_CANCEL_TRANSFER = 0x17,
  52. CP2112_LOCK_BYTE = 0x20,
  53. CP2112_USB_CONFIG = 0x21,
  54. CP2112_MANUFACTURER_STRING = 0x22,
  55. CP2112_PRODUCT_STRING = 0x23,
  56. CP2112_SERIAL_STRING = 0x24,
  57. };
  58. enum {
  59. STATUS0_IDLE = 0x00,
  60. STATUS0_BUSY = 0x01,
  61. STATUS0_COMPLETE = 0x02,
  62. STATUS0_ERROR = 0x03,
  63. };
  64. enum {
  65. STATUS1_TIMEOUT_NACK = 0x00,
  66. STATUS1_TIMEOUT_BUS = 0x01,
  67. STATUS1_ARBITRATION_LOST = 0x02,
  68. STATUS1_READ_INCOMPLETE = 0x03,
  69. STATUS1_WRITE_INCOMPLETE = 0x04,
  70. STATUS1_SUCCESS = 0x05,
  71. };
  72. struct cp2112_smbus_config_report {
  73. u8 report; /* CP2112_SMBUS_CONFIG */
  74. __be32 clock_speed; /* Hz */
  75. u8 device_address; /* Stored in the upper 7 bits */
  76. u8 auto_send_read; /* 1 = enabled, 0 = disabled */
  77. __be16 write_timeout; /* ms, 0 = no timeout */
  78. __be16 read_timeout; /* ms, 0 = no timeout */
  79. u8 scl_low_timeout; /* 1 = enabled, 0 = disabled */
  80. __be16 retry_time; /* # of retries, 0 = no limit */
  81. } __packed;
  82. struct cp2112_usb_config_report {
  83. u8 report; /* CP2112_USB_CONFIG */
  84. __le16 vid; /* Vendor ID */
  85. __le16 pid; /* Product ID */
  86. u8 max_power; /* Power requested in 2mA units */
  87. u8 power_mode; /* 0x00 = bus powered
  88. 0x01 = self powered & regulator off
  89. 0x02 = self powered & regulator on */
  90. u8 release_major;
  91. u8 release_minor;
  92. u8 mask; /* What fields to program */
  93. } __packed;
  94. struct cp2112_read_req_report {
  95. u8 report; /* CP2112_DATA_READ_REQUEST */
  96. u8 slave_address;
  97. __be16 length;
  98. } __packed;
  99. struct cp2112_write_read_req_report {
  100. u8 report; /* CP2112_DATA_WRITE_READ_REQUEST */
  101. u8 slave_address;
  102. __be16 length;
  103. u8 target_address_length;
  104. u8 target_address[16];
  105. } __packed;
  106. struct cp2112_write_req_report {
  107. u8 report; /* CP2112_DATA_WRITE_REQUEST */
  108. u8 slave_address;
  109. u8 length;
  110. u8 data[61];
  111. } __packed;
  112. struct cp2112_force_read_report {
  113. u8 report; /* CP2112_DATA_READ_FORCE_SEND */
  114. __be16 length;
  115. } __packed;
  116. struct cp2112_xfer_status_report {
  117. u8 report; /* CP2112_TRANSFER_STATUS_RESPONSE */
  118. u8 status0; /* STATUS0_* */
  119. u8 status1; /* STATUS1_* */
  120. __be16 retries;
  121. __be16 length;
  122. } __packed;
  123. struct cp2112_string_report {
  124. u8 dummy; /* force .string to be aligned */
  125. u8 report; /* CP2112_*_STRING */
  126. u8 length; /* length in bytes of everyting after .report */
  127. u8 type; /* USB_DT_STRING */
  128. wchar_t string[30]; /* UTF16_LITTLE_ENDIAN string */
  129. } __packed;
  130. /* Number of times to request transfer status before giving up waiting for a
  131. transfer to complete. This may need to be changed if SMBUS clock, retries,
  132. or read/write/scl_low timeout settings are changed. */
  133. static const int XFER_STATUS_RETRIES = 10;
  134. /* Time in ms to wait for a CP2112_DATA_READ_RESPONSE or
  135. CP2112_TRANSFER_STATUS_RESPONSE. */
  136. static const int RESPONSE_TIMEOUT = 50;
  137. static const struct hid_device_id cp2112_devices[] = {
  138. { HID_USB_DEVICE(USB_VENDOR_ID_CYGNAL, USB_DEVICE_ID_CYGNAL_CP2112) },
  139. { }
  140. };
  141. MODULE_DEVICE_TABLE(hid, cp2112_devices);
  142. struct cp2112_device {
  143. struct i2c_adapter adap;
  144. struct hid_device *hdev;
  145. wait_queue_head_t wait;
  146. u8 read_data[61];
  147. u8 read_length;
  148. u8 hwversion;
  149. int xfer_status;
  150. atomic_t read_avail;
  151. atomic_t xfer_avail;
  152. struct gpio_chip gc;
  153. u8 *in_out_buffer;
  154. struct mutex lock;
  155. struct gpio_desc *desc[8];
  156. bool gpio_poll;
  157. struct delayed_work gpio_poll_worker;
  158. unsigned long irq_mask;
  159. u8 gpio_prev_state;
  160. };
  161. static int gpio_push_pull = 0xFF;
  162. module_param(gpio_push_pull, int, S_IRUGO | S_IWUSR);
  163. MODULE_PARM_DESC(gpio_push_pull, "GPIO push-pull configuration bitmask");
  164. static int cp2112_gpio_direction_input(struct gpio_chip *chip, unsigned offset)
  165. {
  166. struct cp2112_device *dev = gpiochip_get_data(chip);
  167. struct hid_device *hdev = dev->hdev;
  168. u8 *buf = dev->in_out_buffer;
  169. int ret;
  170. mutex_lock(&dev->lock);
  171. ret = hid_hw_raw_request(hdev, CP2112_GPIO_CONFIG, buf,
  172. CP2112_GPIO_CONFIG_LENGTH, HID_FEATURE_REPORT,
  173. HID_REQ_GET_REPORT);
  174. if (ret != CP2112_GPIO_CONFIG_LENGTH) {
  175. hid_err(hdev, "error requesting GPIO config: %d\n", ret);
  176. goto exit;
  177. }
  178. buf[1] &= ~(1 << offset);
  179. buf[2] = gpio_push_pull;
  180. ret = hid_hw_raw_request(hdev, CP2112_GPIO_CONFIG, buf,
  181. CP2112_GPIO_CONFIG_LENGTH, HID_FEATURE_REPORT,
  182. HID_REQ_SET_REPORT);
  183. if (ret < 0) {
  184. hid_err(hdev, "error setting GPIO config: %d\n", ret);
  185. goto exit;
  186. }
  187. ret = 0;
  188. exit:
  189. mutex_unlock(&dev->lock);
  190. return ret < 0 ? ret : -EIO;
  191. }
  192. static void cp2112_gpio_set(struct gpio_chip *chip, unsigned offset, int value)
  193. {
  194. struct cp2112_device *dev = gpiochip_get_data(chip);
  195. struct hid_device *hdev = dev->hdev;
  196. u8 *buf = dev->in_out_buffer;
  197. int ret;
  198. mutex_lock(&dev->lock);
  199. buf[0] = CP2112_GPIO_SET;
  200. buf[1] = value ? 0xff : 0;
  201. buf[2] = 1 << offset;
  202. ret = hid_hw_raw_request(hdev, CP2112_GPIO_SET, buf,
  203. CP2112_GPIO_SET_LENGTH, HID_FEATURE_REPORT,
  204. HID_REQ_SET_REPORT);
  205. if (ret < 0)
  206. hid_err(hdev, "error setting GPIO values: %d\n", ret);
  207. mutex_unlock(&dev->lock);
  208. }
  209. static int cp2112_gpio_get_all(struct gpio_chip *chip)
  210. {
  211. struct cp2112_device *dev = gpiochip_get_data(chip);
  212. struct hid_device *hdev = dev->hdev;
  213. u8 *buf = dev->in_out_buffer;
  214. int ret;
  215. mutex_lock(&dev->lock);
  216. ret = hid_hw_raw_request(hdev, CP2112_GPIO_GET, buf,
  217. CP2112_GPIO_GET_LENGTH, HID_FEATURE_REPORT,
  218. HID_REQ_GET_REPORT);
  219. if (ret != CP2112_GPIO_GET_LENGTH) {
  220. hid_err(hdev, "error requesting GPIO values: %d\n", ret);
  221. ret = ret < 0 ? ret : -EIO;
  222. goto exit;
  223. }
  224. ret = buf[1];
  225. exit:
  226. mutex_unlock(&dev->lock);
  227. return ret;
  228. }
  229. static int cp2112_gpio_get(struct gpio_chip *chip, unsigned int offset)
  230. {
  231. int ret;
  232. ret = cp2112_gpio_get_all(chip);
  233. if (ret < 0)
  234. return ret;
  235. return (ret >> offset) & 1;
  236. }
  237. static int cp2112_gpio_direction_output(struct gpio_chip *chip,
  238. unsigned offset, int value)
  239. {
  240. struct cp2112_device *dev = gpiochip_get_data(chip);
  241. struct hid_device *hdev = dev->hdev;
  242. u8 *buf = dev->in_out_buffer;
  243. int ret;
  244. mutex_lock(&dev->lock);
  245. ret = hid_hw_raw_request(hdev, CP2112_GPIO_CONFIG, buf,
  246. CP2112_GPIO_CONFIG_LENGTH, HID_FEATURE_REPORT,
  247. HID_REQ_GET_REPORT);
  248. if (ret != CP2112_GPIO_CONFIG_LENGTH) {
  249. hid_err(hdev, "error requesting GPIO config: %d\n", ret);
  250. goto fail;
  251. }
  252. buf[1] |= 1 << offset;
  253. buf[2] = gpio_push_pull;
  254. ret = hid_hw_raw_request(hdev, CP2112_GPIO_CONFIG, buf,
  255. CP2112_GPIO_CONFIG_LENGTH, HID_FEATURE_REPORT,
  256. HID_REQ_SET_REPORT);
  257. if (ret < 0) {
  258. hid_err(hdev, "error setting GPIO config: %d\n", ret);
  259. goto fail;
  260. }
  261. mutex_unlock(&dev->lock);
  262. /*
  263. * Set gpio value when output direction is already set,
  264. * as specified in AN495, Rev. 0.2, cpt. 4.4
  265. */
  266. cp2112_gpio_set(chip, offset, value);
  267. return 0;
  268. fail:
  269. mutex_unlock(&dev->lock);
  270. return ret < 0 ? ret : -EIO;
  271. }
  272. static int cp2112_hid_get(struct hid_device *hdev, unsigned char report_number,
  273. u8 *data, size_t count, unsigned char report_type)
  274. {
  275. u8 *buf;
  276. int ret;
  277. buf = kmalloc(count, GFP_KERNEL);
  278. if (!buf)
  279. return -ENOMEM;
  280. ret = hid_hw_raw_request(hdev, report_number, buf, count,
  281. report_type, HID_REQ_GET_REPORT);
  282. memcpy(data, buf, count);
  283. kfree(buf);
  284. return ret;
  285. }
  286. static int cp2112_hid_output(struct hid_device *hdev, u8 *data, size_t count,
  287. unsigned char report_type)
  288. {
  289. u8 *buf;
  290. int ret;
  291. buf = kmemdup(data, count, GFP_KERNEL);
  292. if (!buf)
  293. return -ENOMEM;
  294. if (report_type == HID_OUTPUT_REPORT)
  295. ret = hid_hw_output_report(hdev, buf, count);
  296. else
  297. ret = hid_hw_raw_request(hdev, buf[0], buf, count, report_type,
  298. HID_REQ_SET_REPORT);
  299. kfree(buf);
  300. return ret;
  301. }
  302. static int cp2112_wait(struct cp2112_device *dev, atomic_t *avail)
  303. {
  304. int ret = 0;
  305. /* We have sent either a CP2112_TRANSFER_STATUS_REQUEST or a
  306. * CP2112_DATA_READ_FORCE_SEND and we are waiting for the response to
  307. * come in cp2112_raw_event or timeout. There will only be one of these
  308. * in flight at any one time. The timeout is extremely large and is a
  309. * last resort if the CP2112 has died. If we do timeout we don't expect
  310. * to receive the response which would cause data races, it's not like
  311. * we can do anything about it anyway.
  312. */
  313. ret = wait_event_interruptible_timeout(dev->wait,
  314. atomic_read(avail), msecs_to_jiffies(RESPONSE_TIMEOUT));
  315. if (-ERESTARTSYS == ret)
  316. return ret;
  317. if (!ret)
  318. return -ETIMEDOUT;
  319. atomic_set(avail, 0);
  320. return 0;
  321. }
  322. static int cp2112_xfer_status(struct cp2112_device *dev)
  323. {
  324. struct hid_device *hdev = dev->hdev;
  325. u8 buf[2];
  326. int ret;
  327. buf[0] = CP2112_TRANSFER_STATUS_REQUEST;
  328. buf[1] = 0x01;
  329. atomic_set(&dev->xfer_avail, 0);
  330. ret = cp2112_hid_output(hdev, buf, 2, HID_OUTPUT_REPORT);
  331. if (ret < 0) {
  332. hid_warn(hdev, "Error requesting status: %d\n", ret);
  333. return ret;
  334. }
  335. ret = cp2112_wait(dev, &dev->xfer_avail);
  336. if (ret)
  337. return ret;
  338. return dev->xfer_status;
  339. }
  340. static int cp2112_read(struct cp2112_device *dev, u8 *data, size_t size)
  341. {
  342. struct hid_device *hdev = dev->hdev;
  343. struct cp2112_force_read_report report;
  344. int ret;
  345. if (size > sizeof(dev->read_data))
  346. size = sizeof(dev->read_data);
  347. report.report = CP2112_DATA_READ_FORCE_SEND;
  348. report.length = cpu_to_be16(size);
  349. atomic_set(&dev->read_avail, 0);
  350. ret = cp2112_hid_output(hdev, &report.report, sizeof(report),
  351. HID_OUTPUT_REPORT);
  352. if (ret < 0) {
  353. hid_warn(hdev, "Error requesting data: %d\n", ret);
  354. return ret;
  355. }
  356. ret = cp2112_wait(dev, &dev->read_avail);
  357. if (ret)
  358. return ret;
  359. hid_dbg(hdev, "read %d of %zd bytes requested\n",
  360. dev->read_length, size);
  361. if (size > dev->read_length)
  362. size = dev->read_length;
  363. memcpy(data, dev->read_data, size);
  364. return dev->read_length;
  365. }
  366. static int cp2112_read_req(void *buf, u8 slave_address, u16 length)
  367. {
  368. struct cp2112_read_req_report *report = buf;
  369. if (length < 1 || length > 512)
  370. return -EINVAL;
  371. report->report = CP2112_DATA_READ_REQUEST;
  372. report->slave_address = slave_address << 1;
  373. report->length = cpu_to_be16(length);
  374. return sizeof(*report);
  375. }
  376. static int cp2112_write_read_req(void *buf, u8 slave_address, u16 length,
  377. u8 command, u8 *data, u8 data_length)
  378. {
  379. struct cp2112_write_read_req_report *report = buf;
  380. if (length < 1 || length > 512
  381. || data_length > sizeof(report->target_address) - 1)
  382. return -EINVAL;
  383. report->report = CP2112_DATA_WRITE_READ_REQUEST;
  384. report->slave_address = slave_address << 1;
  385. report->length = cpu_to_be16(length);
  386. report->target_address_length = data_length + 1;
  387. report->target_address[0] = command;
  388. memcpy(&report->target_address[1], data, data_length);
  389. return data_length + 6;
  390. }
  391. static int cp2112_write_req(void *buf, u8 slave_address, u8 command, u8 *data,
  392. u8 data_length)
  393. {
  394. struct cp2112_write_req_report *report = buf;
  395. if (data_length > sizeof(report->data) - 1)
  396. return -EINVAL;
  397. report->report = CP2112_DATA_WRITE_REQUEST;
  398. report->slave_address = slave_address << 1;
  399. report->length = data_length + 1;
  400. report->data[0] = command;
  401. memcpy(&report->data[1], data, data_length);
  402. return data_length + 4;
  403. }
  404. static int cp2112_i2c_write_req(void *buf, u8 slave_address, u8 *data,
  405. u8 data_length)
  406. {
  407. struct cp2112_write_req_report *report = buf;
  408. if (data_length > sizeof(report->data))
  409. return -EINVAL;
  410. report->report = CP2112_DATA_WRITE_REQUEST;
  411. report->slave_address = slave_address << 1;
  412. report->length = data_length;
  413. memcpy(report->data, data, data_length);
  414. return data_length + 3;
  415. }
  416. static int cp2112_i2c_write_read_req(void *buf, u8 slave_address,
  417. u8 *addr, int addr_length,
  418. int read_length)
  419. {
  420. struct cp2112_write_read_req_report *report = buf;
  421. if (read_length < 1 || read_length > 512 ||
  422. addr_length > sizeof(report->target_address))
  423. return -EINVAL;
  424. report->report = CP2112_DATA_WRITE_READ_REQUEST;
  425. report->slave_address = slave_address << 1;
  426. report->length = cpu_to_be16(read_length);
  427. report->target_address_length = addr_length;
  428. memcpy(report->target_address, addr, addr_length);
  429. return addr_length + 5;
  430. }
  431. static int cp2112_i2c_xfer(struct i2c_adapter *adap, struct i2c_msg *msgs,
  432. int num)
  433. {
  434. struct cp2112_device *dev = (struct cp2112_device *)adap->algo_data;
  435. struct hid_device *hdev = dev->hdev;
  436. u8 buf[64];
  437. ssize_t count;
  438. ssize_t read_length = 0;
  439. u8 *read_buf = NULL;
  440. unsigned int retries;
  441. int ret;
  442. hid_dbg(hdev, "I2C %d messages\n", num);
  443. if (num == 1) {
  444. if (msgs->flags & I2C_M_RD) {
  445. hid_dbg(hdev, "I2C read %#04x len %d\n",
  446. msgs->addr, msgs->len);
  447. read_length = msgs->len;
  448. read_buf = msgs->buf;
  449. count = cp2112_read_req(buf, msgs->addr, msgs->len);
  450. } else {
  451. hid_dbg(hdev, "I2C write %#04x len %d\n",
  452. msgs->addr, msgs->len);
  453. count = cp2112_i2c_write_req(buf, msgs->addr,
  454. msgs->buf, msgs->len);
  455. }
  456. if (count < 0)
  457. return count;
  458. } else if (dev->hwversion > 1 && /* no repeated start in rev 1 */
  459. num == 2 &&
  460. msgs[0].addr == msgs[1].addr &&
  461. !(msgs[0].flags & I2C_M_RD) && (msgs[1].flags & I2C_M_RD)) {
  462. hid_dbg(hdev, "I2C write-read %#04x wlen %d rlen %d\n",
  463. msgs[0].addr, msgs[0].len, msgs[1].len);
  464. read_length = msgs[1].len;
  465. read_buf = msgs[1].buf;
  466. count = cp2112_i2c_write_read_req(buf, msgs[0].addr,
  467. msgs[0].buf, msgs[0].len, msgs[1].len);
  468. if (count < 0)
  469. return count;
  470. } else {
  471. hid_err(hdev,
  472. "Multi-message I2C transactions not supported\n");
  473. return -EOPNOTSUPP;
  474. }
  475. ret = hid_hw_power(hdev, PM_HINT_FULLON);
  476. if (ret < 0) {
  477. hid_err(hdev, "power management error: %d\n", ret);
  478. return ret;
  479. }
  480. ret = cp2112_hid_output(hdev, buf, count, HID_OUTPUT_REPORT);
  481. if (ret < 0) {
  482. hid_warn(hdev, "Error starting transaction: %d\n", ret);
  483. goto power_normal;
  484. }
  485. for (retries = 0; retries < XFER_STATUS_RETRIES; ++retries) {
  486. ret = cp2112_xfer_status(dev);
  487. if (-EBUSY == ret)
  488. continue;
  489. if (ret < 0)
  490. goto power_normal;
  491. break;
  492. }
  493. if (XFER_STATUS_RETRIES <= retries) {
  494. hid_warn(hdev, "Transfer timed out, cancelling.\n");
  495. buf[0] = CP2112_CANCEL_TRANSFER;
  496. buf[1] = 0x01;
  497. ret = cp2112_hid_output(hdev, buf, 2, HID_OUTPUT_REPORT);
  498. if (ret < 0)
  499. hid_warn(hdev, "Error cancelling transaction: %d\n",
  500. ret);
  501. ret = -ETIMEDOUT;
  502. goto power_normal;
  503. }
  504. for (count = 0; count < read_length;) {
  505. ret = cp2112_read(dev, read_buf + count, read_length - count);
  506. if (ret < 0)
  507. goto power_normal;
  508. if (ret == 0) {
  509. hid_err(hdev, "read returned 0\n");
  510. ret = -EIO;
  511. goto power_normal;
  512. }
  513. count += ret;
  514. if (count > read_length) {
  515. /*
  516. * The hardware returned too much data.
  517. * This is mostly harmless because cp2112_read()
  518. * has a limit check so didn't overrun our
  519. * buffer. Nevertheless, we return an error
  520. * because something is seriously wrong and
  521. * it shouldn't go unnoticed.
  522. */
  523. hid_err(hdev, "long read: %d > %zd\n",
  524. ret, read_length - count + ret);
  525. ret = -EIO;
  526. goto power_normal;
  527. }
  528. }
  529. /* return the number of transferred messages */
  530. ret = num;
  531. power_normal:
  532. hid_hw_power(hdev, PM_HINT_NORMAL);
  533. hid_dbg(hdev, "I2C transfer finished: %d\n", ret);
  534. return ret;
  535. }
  536. static int cp2112_xfer(struct i2c_adapter *adap, u16 addr,
  537. unsigned short flags, char read_write, u8 command,
  538. int size, union i2c_smbus_data *data)
  539. {
  540. struct cp2112_device *dev = (struct cp2112_device *)adap->algo_data;
  541. struct hid_device *hdev = dev->hdev;
  542. u8 buf[64];
  543. __le16 word;
  544. ssize_t count;
  545. size_t read_length = 0;
  546. unsigned int retries;
  547. int ret;
  548. hid_dbg(hdev, "%s addr 0x%x flags 0x%x cmd 0x%x size %d\n",
  549. read_write == I2C_SMBUS_WRITE ? "write" : "read",
  550. addr, flags, command, size);
  551. switch (size) {
  552. case I2C_SMBUS_BYTE:
  553. read_length = 1;
  554. if (I2C_SMBUS_READ == read_write)
  555. count = cp2112_read_req(buf, addr, read_length);
  556. else
  557. count = cp2112_write_req(buf, addr, command, NULL,
  558. 0);
  559. break;
  560. case I2C_SMBUS_BYTE_DATA:
  561. read_length = 1;
  562. if (I2C_SMBUS_READ == read_write)
  563. count = cp2112_write_read_req(buf, addr, read_length,
  564. command, NULL, 0);
  565. else
  566. count = cp2112_write_req(buf, addr, command,
  567. &data->byte, 1);
  568. break;
  569. case I2C_SMBUS_WORD_DATA:
  570. read_length = 2;
  571. word = cpu_to_le16(data->word);
  572. if (I2C_SMBUS_READ == read_write)
  573. count = cp2112_write_read_req(buf, addr, read_length,
  574. command, NULL, 0);
  575. else
  576. count = cp2112_write_req(buf, addr, command,
  577. (u8 *)&word, 2);
  578. break;
  579. case I2C_SMBUS_PROC_CALL:
  580. size = I2C_SMBUS_WORD_DATA;
  581. read_write = I2C_SMBUS_READ;
  582. read_length = 2;
  583. word = cpu_to_le16(data->word);
  584. count = cp2112_write_read_req(buf, addr, read_length, command,
  585. (u8 *)&word, 2);
  586. break;
  587. case I2C_SMBUS_I2C_BLOCK_DATA:
  588. size = I2C_SMBUS_BLOCK_DATA;
  589. /* fallthrough */
  590. case I2C_SMBUS_BLOCK_DATA:
  591. if (I2C_SMBUS_READ == read_write) {
  592. count = cp2112_write_read_req(buf, addr,
  593. I2C_SMBUS_BLOCK_MAX,
  594. command, NULL, 0);
  595. } else {
  596. count = cp2112_write_req(buf, addr, command,
  597. data->block,
  598. data->block[0] + 1);
  599. }
  600. break;
  601. case I2C_SMBUS_BLOCK_PROC_CALL:
  602. size = I2C_SMBUS_BLOCK_DATA;
  603. read_write = I2C_SMBUS_READ;
  604. count = cp2112_write_read_req(buf, addr, I2C_SMBUS_BLOCK_MAX,
  605. command, data->block,
  606. data->block[0] + 1);
  607. break;
  608. default:
  609. hid_warn(hdev, "Unsupported transaction %d\n", size);
  610. return -EOPNOTSUPP;
  611. }
  612. if (count < 0)
  613. return count;
  614. ret = hid_hw_power(hdev, PM_HINT_FULLON);
  615. if (ret < 0) {
  616. hid_err(hdev, "power management error: %d\n", ret);
  617. return ret;
  618. }
  619. ret = cp2112_hid_output(hdev, buf, count, HID_OUTPUT_REPORT);
  620. if (ret < 0) {
  621. hid_warn(hdev, "Error starting transaction: %d\n", ret);
  622. goto power_normal;
  623. }
  624. for (retries = 0; retries < XFER_STATUS_RETRIES; ++retries) {
  625. ret = cp2112_xfer_status(dev);
  626. if (-EBUSY == ret)
  627. continue;
  628. if (ret < 0)
  629. goto power_normal;
  630. break;
  631. }
  632. if (XFER_STATUS_RETRIES <= retries) {
  633. hid_warn(hdev, "Transfer timed out, cancelling.\n");
  634. buf[0] = CP2112_CANCEL_TRANSFER;
  635. buf[1] = 0x01;
  636. ret = cp2112_hid_output(hdev, buf, 2, HID_OUTPUT_REPORT);
  637. if (ret < 0)
  638. hid_warn(hdev, "Error cancelling transaction: %d\n",
  639. ret);
  640. ret = -ETIMEDOUT;
  641. goto power_normal;
  642. }
  643. if (I2C_SMBUS_WRITE == read_write) {
  644. ret = 0;
  645. goto power_normal;
  646. }
  647. if (I2C_SMBUS_BLOCK_DATA == size)
  648. read_length = ret;
  649. ret = cp2112_read(dev, buf, read_length);
  650. if (ret < 0)
  651. goto power_normal;
  652. if (ret != read_length) {
  653. hid_warn(hdev, "short read: %d < %zd\n", ret, read_length);
  654. ret = -EIO;
  655. goto power_normal;
  656. }
  657. switch (size) {
  658. case I2C_SMBUS_BYTE:
  659. case I2C_SMBUS_BYTE_DATA:
  660. data->byte = buf[0];
  661. break;
  662. case I2C_SMBUS_WORD_DATA:
  663. data->word = le16_to_cpup((__le16 *)buf);
  664. break;
  665. case I2C_SMBUS_BLOCK_DATA:
  666. if (read_length > I2C_SMBUS_BLOCK_MAX) {
  667. ret = -EPROTO;
  668. goto power_normal;
  669. }
  670. memcpy(data->block, buf, read_length);
  671. break;
  672. }
  673. ret = 0;
  674. power_normal:
  675. hid_hw_power(hdev, PM_HINT_NORMAL);
  676. hid_dbg(hdev, "transfer finished: %d\n", ret);
  677. return ret;
  678. }
  679. static u32 cp2112_functionality(struct i2c_adapter *adap)
  680. {
  681. return I2C_FUNC_I2C |
  682. I2C_FUNC_SMBUS_BYTE |
  683. I2C_FUNC_SMBUS_BYTE_DATA |
  684. I2C_FUNC_SMBUS_WORD_DATA |
  685. I2C_FUNC_SMBUS_BLOCK_DATA |
  686. I2C_FUNC_SMBUS_I2C_BLOCK |
  687. I2C_FUNC_SMBUS_PROC_CALL |
  688. I2C_FUNC_SMBUS_BLOCK_PROC_CALL;
  689. }
  690. static const struct i2c_algorithm smbus_algorithm = {
  691. .master_xfer = cp2112_i2c_xfer,
  692. .smbus_xfer = cp2112_xfer,
  693. .functionality = cp2112_functionality,
  694. };
  695. static int cp2112_get_usb_config(struct hid_device *hdev,
  696. struct cp2112_usb_config_report *cfg)
  697. {
  698. int ret;
  699. ret = cp2112_hid_get(hdev, CP2112_USB_CONFIG, (u8 *)cfg, sizeof(*cfg),
  700. HID_FEATURE_REPORT);
  701. if (ret != sizeof(*cfg)) {
  702. hid_err(hdev, "error reading usb config: %d\n", ret);
  703. if (ret < 0)
  704. return ret;
  705. return -EIO;
  706. }
  707. return 0;
  708. }
  709. static int cp2112_set_usb_config(struct hid_device *hdev,
  710. struct cp2112_usb_config_report *cfg)
  711. {
  712. int ret;
  713. BUG_ON(cfg->report != CP2112_USB_CONFIG);
  714. ret = cp2112_hid_output(hdev, (u8 *)cfg, sizeof(*cfg),
  715. HID_FEATURE_REPORT);
  716. if (ret != sizeof(*cfg)) {
  717. hid_err(hdev, "error writing usb config: %d\n", ret);
  718. if (ret < 0)
  719. return ret;
  720. return -EIO;
  721. }
  722. return 0;
  723. }
  724. static void chmod_sysfs_attrs(struct hid_device *hdev);
  725. #define CP2112_CONFIG_ATTR(name, store, format, ...) \
  726. static ssize_t name##_store(struct device *kdev, \
  727. struct device_attribute *attr, const char *buf, \
  728. size_t count) \
  729. { \
  730. struct hid_device *hdev = to_hid_device(kdev); \
  731. struct cp2112_usb_config_report cfg; \
  732. int ret = cp2112_get_usb_config(hdev, &cfg); \
  733. if (ret) \
  734. return ret; \
  735. store; \
  736. ret = cp2112_set_usb_config(hdev, &cfg); \
  737. if (ret) \
  738. return ret; \
  739. chmod_sysfs_attrs(hdev); \
  740. return count; \
  741. } \
  742. static ssize_t name##_show(struct device *kdev, \
  743. struct device_attribute *attr, char *buf) \
  744. { \
  745. struct hid_device *hdev = to_hid_device(kdev); \
  746. struct cp2112_usb_config_report cfg; \
  747. int ret = cp2112_get_usb_config(hdev, &cfg); \
  748. if (ret) \
  749. return ret; \
  750. return scnprintf(buf, PAGE_SIZE, format, ##__VA_ARGS__); \
  751. } \
  752. static DEVICE_ATTR_RW(name);
  753. CP2112_CONFIG_ATTR(vendor_id, ({
  754. u16 vid;
  755. if (sscanf(buf, "%hi", &vid) != 1)
  756. return -EINVAL;
  757. cfg.vid = cpu_to_le16(vid);
  758. cfg.mask = 0x01;
  759. }), "0x%04x\n", le16_to_cpu(cfg.vid));
  760. CP2112_CONFIG_ATTR(product_id, ({
  761. u16 pid;
  762. if (sscanf(buf, "%hi", &pid) != 1)
  763. return -EINVAL;
  764. cfg.pid = cpu_to_le16(pid);
  765. cfg.mask = 0x02;
  766. }), "0x%04x\n", le16_to_cpu(cfg.pid));
  767. CP2112_CONFIG_ATTR(max_power, ({
  768. int mA;
  769. if (sscanf(buf, "%i", &mA) != 1)
  770. return -EINVAL;
  771. cfg.max_power = (mA + 1) / 2;
  772. cfg.mask = 0x04;
  773. }), "%u mA\n", cfg.max_power * 2);
  774. CP2112_CONFIG_ATTR(power_mode, ({
  775. if (sscanf(buf, "%hhi", &cfg.power_mode) != 1)
  776. return -EINVAL;
  777. cfg.mask = 0x08;
  778. }), "%u\n", cfg.power_mode);
  779. CP2112_CONFIG_ATTR(release_version, ({
  780. if (sscanf(buf, "%hhi.%hhi", &cfg.release_major, &cfg.release_minor)
  781. != 2)
  782. return -EINVAL;
  783. cfg.mask = 0x10;
  784. }), "%u.%u\n", cfg.release_major, cfg.release_minor);
  785. #undef CP2112_CONFIG_ATTR
  786. struct cp2112_pstring_attribute {
  787. struct device_attribute attr;
  788. unsigned char report;
  789. };
  790. static ssize_t pstr_store(struct device *kdev,
  791. struct device_attribute *kattr, const char *buf,
  792. size_t count)
  793. {
  794. struct hid_device *hdev = to_hid_device(kdev);
  795. struct cp2112_pstring_attribute *attr =
  796. container_of(kattr, struct cp2112_pstring_attribute, attr);
  797. struct cp2112_string_report report;
  798. int ret;
  799. memset(&report, 0, sizeof(report));
  800. ret = utf8s_to_utf16s(buf, count, UTF16_LITTLE_ENDIAN,
  801. report.string, ARRAY_SIZE(report.string));
  802. report.report = attr->report;
  803. report.length = ret * sizeof(report.string[0]) + 2;
  804. report.type = USB_DT_STRING;
  805. ret = cp2112_hid_output(hdev, &report.report, report.length + 1,
  806. HID_FEATURE_REPORT);
  807. if (ret != report.length + 1) {
  808. hid_err(hdev, "error writing %s string: %d\n", kattr->attr.name,
  809. ret);
  810. if (ret < 0)
  811. return ret;
  812. return -EIO;
  813. }
  814. chmod_sysfs_attrs(hdev);
  815. return count;
  816. }
  817. static ssize_t pstr_show(struct device *kdev,
  818. struct device_attribute *kattr, char *buf)
  819. {
  820. struct hid_device *hdev = to_hid_device(kdev);
  821. struct cp2112_pstring_attribute *attr =
  822. container_of(kattr, struct cp2112_pstring_attribute, attr);
  823. struct cp2112_string_report report;
  824. u8 length;
  825. int ret;
  826. ret = cp2112_hid_get(hdev, attr->report, &report.report,
  827. sizeof(report) - 1, HID_FEATURE_REPORT);
  828. if (ret < 3) {
  829. hid_err(hdev, "error reading %s string: %d\n", kattr->attr.name,
  830. ret);
  831. if (ret < 0)
  832. return ret;
  833. return -EIO;
  834. }
  835. if (report.length < 2) {
  836. hid_err(hdev, "invalid %s string length: %d\n",
  837. kattr->attr.name, report.length);
  838. return -EIO;
  839. }
  840. length = report.length > ret - 1 ? ret - 1 : report.length;
  841. length = (length - 2) / sizeof(report.string[0]);
  842. ret = utf16s_to_utf8s(report.string, length, UTF16_LITTLE_ENDIAN, buf,
  843. PAGE_SIZE - 1);
  844. buf[ret++] = '\n';
  845. return ret;
  846. }
  847. #define CP2112_PSTR_ATTR(name, _report) \
  848. static struct cp2112_pstring_attribute dev_attr_##name = { \
  849. .attr = __ATTR(name, (S_IWUSR | S_IRUGO), pstr_show, pstr_store), \
  850. .report = _report, \
  851. };
  852. CP2112_PSTR_ATTR(manufacturer, CP2112_MANUFACTURER_STRING);
  853. CP2112_PSTR_ATTR(product, CP2112_PRODUCT_STRING);
  854. CP2112_PSTR_ATTR(serial, CP2112_SERIAL_STRING);
  855. #undef CP2112_PSTR_ATTR
  856. static const struct attribute_group cp2112_attr_group = {
  857. .attrs = (struct attribute *[]){
  858. &dev_attr_vendor_id.attr,
  859. &dev_attr_product_id.attr,
  860. &dev_attr_max_power.attr,
  861. &dev_attr_power_mode.attr,
  862. &dev_attr_release_version.attr,
  863. &dev_attr_manufacturer.attr.attr,
  864. &dev_attr_product.attr.attr,
  865. &dev_attr_serial.attr.attr,
  866. NULL
  867. }
  868. };
  869. /* Chmoding our sysfs attributes is simply a way to expose which fields in the
  870. * PROM have already been programmed. We do not depend on this preventing
  871. * writing to these attributes since the CP2112 will simply ignore writes to
  872. * already-programmed fields. This is why there is no sense in fixing this
  873. * racy behaviour.
  874. */
  875. static void chmod_sysfs_attrs(struct hid_device *hdev)
  876. {
  877. struct attribute **attr;
  878. u8 buf[2];
  879. int ret;
  880. ret = cp2112_hid_get(hdev, CP2112_LOCK_BYTE, buf, sizeof(buf),
  881. HID_FEATURE_REPORT);
  882. if (ret != sizeof(buf)) {
  883. hid_err(hdev, "error reading lock byte: %d\n", ret);
  884. return;
  885. }
  886. for (attr = cp2112_attr_group.attrs; *attr; ++attr) {
  887. umode_t mode = (buf[1] & 1) ? S_IWUSR | S_IRUGO : S_IRUGO;
  888. ret = sysfs_chmod_file(&hdev->dev.kobj, *attr, mode);
  889. if (ret < 0)
  890. hid_err(hdev, "error chmoding sysfs file %s\n",
  891. (*attr)->name);
  892. buf[1] >>= 1;
  893. }
  894. }
  895. static void cp2112_gpio_irq_ack(struct irq_data *d)
  896. {
  897. }
  898. static void cp2112_gpio_irq_mask(struct irq_data *d)
  899. {
  900. struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
  901. struct cp2112_device *dev = gpiochip_get_data(gc);
  902. __clear_bit(d->hwirq, &dev->irq_mask);
  903. }
  904. static void cp2112_gpio_irq_unmask(struct irq_data *d)
  905. {
  906. struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
  907. struct cp2112_device *dev = gpiochip_get_data(gc);
  908. __set_bit(d->hwirq, &dev->irq_mask);
  909. }
  910. static void cp2112_gpio_poll_callback(struct work_struct *work)
  911. {
  912. struct cp2112_device *dev = container_of(work, struct cp2112_device,
  913. gpio_poll_worker.work);
  914. struct irq_data *d;
  915. u8 gpio_mask;
  916. u8 virqs = (u8)dev->irq_mask;
  917. u32 irq_type;
  918. int irq, virq, ret;
  919. ret = cp2112_gpio_get_all(&dev->gc);
  920. if (ret == -ENODEV) /* the hardware has been disconnected */
  921. return;
  922. if (ret < 0)
  923. goto exit;
  924. gpio_mask = ret;
  925. while (virqs) {
  926. virq = ffs(virqs) - 1;
  927. virqs &= ~BIT(virq);
  928. if (!dev->gc.to_irq)
  929. break;
  930. irq = dev->gc.to_irq(&dev->gc, virq);
  931. d = irq_get_irq_data(irq);
  932. if (!d)
  933. continue;
  934. irq_type = irqd_get_trigger_type(d);
  935. if (gpio_mask & BIT(virq)) {
  936. /* Level High */
  937. if (irq_type & IRQ_TYPE_LEVEL_HIGH)
  938. handle_nested_irq(irq);
  939. if ((irq_type & IRQ_TYPE_EDGE_RISING) &&
  940. !(dev->gpio_prev_state & BIT(virq)))
  941. handle_nested_irq(irq);
  942. } else {
  943. /* Level Low */
  944. if (irq_type & IRQ_TYPE_LEVEL_LOW)
  945. handle_nested_irq(irq);
  946. if ((irq_type & IRQ_TYPE_EDGE_FALLING) &&
  947. (dev->gpio_prev_state & BIT(virq)))
  948. handle_nested_irq(irq);
  949. }
  950. }
  951. dev->gpio_prev_state = gpio_mask;
  952. exit:
  953. if (dev->gpio_poll)
  954. schedule_delayed_work(&dev->gpio_poll_worker, 10);
  955. }
  956. static unsigned int cp2112_gpio_irq_startup(struct irq_data *d)
  957. {
  958. struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
  959. struct cp2112_device *dev = gpiochip_get_data(gc);
  960. INIT_DELAYED_WORK(&dev->gpio_poll_worker, cp2112_gpio_poll_callback);
  961. cp2112_gpio_direction_input(gc, d->hwirq);
  962. if (!dev->gpio_poll) {
  963. dev->gpio_poll = true;
  964. schedule_delayed_work(&dev->gpio_poll_worker, 0);
  965. }
  966. cp2112_gpio_irq_unmask(d);
  967. return 0;
  968. }
  969. static void cp2112_gpio_irq_shutdown(struct irq_data *d)
  970. {
  971. struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
  972. struct cp2112_device *dev = gpiochip_get_data(gc);
  973. cancel_delayed_work_sync(&dev->gpio_poll_worker);
  974. }
  975. static int cp2112_gpio_irq_type(struct irq_data *d, unsigned int type)
  976. {
  977. return 0;
  978. }
  979. static struct irq_chip cp2112_gpio_irqchip = {
  980. .name = "cp2112-gpio",
  981. .irq_startup = cp2112_gpio_irq_startup,
  982. .irq_shutdown = cp2112_gpio_irq_shutdown,
  983. .irq_ack = cp2112_gpio_irq_ack,
  984. .irq_mask = cp2112_gpio_irq_mask,
  985. .irq_unmask = cp2112_gpio_irq_unmask,
  986. .irq_set_type = cp2112_gpio_irq_type,
  987. };
  988. static int __maybe_unused cp2112_allocate_irq(struct cp2112_device *dev,
  989. int pin)
  990. {
  991. int ret;
  992. if (dev->desc[pin])
  993. return -EINVAL;
  994. dev->desc[pin] = gpiochip_request_own_desc(&dev->gc, pin,
  995. "HID/I2C:Event");
  996. if (IS_ERR(dev->desc[pin])) {
  997. dev_err(dev->gc.parent, "Failed to request GPIO\n");
  998. return PTR_ERR(dev->desc[pin]);
  999. }
  1000. ret = gpiochip_lock_as_irq(&dev->gc, pin);
  1001. if (ret) {
  1002. dev_err(dev->gc.parent, "Failed to lock GPIO as interrupt\n");
  1003. goto err_desc;
  1004. }
  1005. ret = gpiod_to_irq(dev->desc[pin]);
  1006. if (ret < 0) {
  1007. dev_err(dev->gc.parent, "Failed to translate GPIO to IRQ\n");
  1008. goto err_lock;
  1009. }
  1010. return ret;
  1011. err_lock:
  1012. gpiochip_unlock_as_irq(&dev->gc, pin);
  1013. err_desc:
  1014. gpiochip_free_own_desc(dev->desc[pin]);
  1015. dev->desc[pin] = NULL;
  1016. return ret;
  1017. }
  1018. static int cp2112_probe(struct hid_device *hdev, const struct hid_device_id *id)
  1019. {
  1020. struct cp2112_device *dev;
  1021. u8 buf[3];
  1022. struct cp2112_smbus_config_report config;
  1023. int ret;
  1024. dev = devm_kzalloc(&hdev->dev, sizeof(*dev), GFP_KERNEL);
  1025. if (!dev)
  1026. return -ENOMEM;
  1027. dev->in_out_buffer = devm_kzalloc(&hdev->dev, CP2112_REPORT_MAX_LENGTH,
  1028. GFP_KERNEL);
  1029. if (!dev->in_out_buffer)
  1030. return -ENOMEM;
  1031. mutex_init(&dev->lock);
  1032. ret = hid_parse(hdev);
  1033. if (ret) {
  1034. hid_err(hdev, "parse failed\n");
  1035. return ret;
  1036. }
  1037. ret = hid_hw_start(hdev, HID_CONNECT_HIDRAW);
  1038. if (ret) {
  1039. hid_err(hdev, "hw start failed\n");
  1040. return ret;
  1041. }
  1042. ret = hid_hw_open(hdev);
  1043. if (ret) {
  1044. hid_err(hdev, "hw open failed\n");
  1045. goto err_hid_stop;
  1046. }
  1047. ret = hid_hw_power(hdev, PM_HINT_FULLON);
  1048. if (ret < 0) {
  1049. hid_err(hdev, "power management error: %d\n", ret);
  1050. goto err_hid_close;
  1051. }
  1052. ret = cp2112_hid_get(hdev, CP2112_GET_VERSION_INFO, buf, sizeof(buf),
  1053. HID_FEATURE_REPORT);
  1054. if (ret != sizeof(buf)) {
  1055. hid_err(hdev, "error requesting version\n");
  1056. if (ret >= 0)
  1057. ret = -EIO;
  1058. goto err_power_normal;
  1059. }
  1060. hid_info(hdev, "Part Number: 0x%02X Device Version: 0x%02X\n",
  1061. buf[1], buf[2]);
  1062. ret = cp2112_hid_get(hdev, CP2112_SMBUS_CONFIG, (u8 *)&config,
  1063. sizeof(config), HID_FEATURE_REPORT);
  1064. if (ret != sizeof(config)) {
  1065. hid_err(hdev, "error requesting SMBus config\n");
  1066. if (ret >= 0)
  1067. ret = -EIO;
  1068. goto err_power_normal;
  1069. }
  1070. config.retry_time = cpu_to_be16(1);
  1071. ret = cp2112_hid_output(hdev, (u8 *)&config, sizeof(config),
  1072. HID_FEATURE_REPORT);
  1073. if (ret != sizeof(config)) {
  1074. hid_err(hdev, "error setting SMBus config\n");
  1075. if (ret >= 0)
  1076. ret = -EIO;
  1077. goto err_power_normal;
  1078. }
  1079. hid_set_drvdata(hdev, (void *)dev);
  1080. dev->hdev = hdev;
  1081. dev->adap.owner = THIS_MODULE;
  1082. dev->adap.class = I2C_CLASS_HWMON;
  1083. dev->adap.algo = &smbus_algorithm;
  1084. dev->adap.algo_data = dev;
  1085. dev->adap.dev.parent = &hdev->dev;
  1086. snprintf(dev->adap.name, sizeof(dev->adap.name),
  1087. "CP2112 SMBus Bridge on hidraw%d",
  1088. ((struct hidraw *)hdev->hidraw)->minor);
  1089. dev->hwversion = buf[2];
  1090. init_waitqueue_head(&dev->wait);
  1091. hid_device_io_start(hdev);
  1092. ret = i2c_add_adapter(&dev->adap);
  1093. hid_device_io_stop(hdev);
  1094. if (ret) {
  1095. hid_err(hdev, "error registering i2c adapter\n");
  1096. goto err_power_normal;
  1097. }
  1098. hid_dbg(hdev, "adapter registered\n");
  1099. dev->gc.label = "cp2112_gpio";
  1100. dev->gc.direction_input = cp2112_gpio_direction_input;
  1101. dev->gc.direction_output = cp2112_gpio_direction_output;
  1102. dev->gc.set = cp2112_gpio_set;
  1103. dev->gc.get = cp2112_gpio_get;
  1104. dev->gc.base = -1;
  1105. dev->gc.ngpio = 8;
  1106. dev->gc.can_sleep = 1;
  1107. dev->gc.parent = &hdev->dev;
  1108. ret = gpiochip_add_data(&dev->gc, dev);
  1109. if (ret < 0) {
  1110. hid_err(hdev, "error registering gpio chip\n");
  1111. goto err_free_i2c;
  1112. }
  1113. ret = sysfs_create_group(&hdev->dev.kobj, &cp2112_attr_group);
  1114. if (ret < 0) {
  1115. hid_err(hdev, "error creating sysfs attrs\n");
  1116. goto err_gpiochip_remove;
  1117. }
  1118. chmod_sysfs_attrs(hdev);
  1119. hid_hw_power(hdev, PM_HINT_NORMAL);
  1120. ret = gpiochip_irqchip_add(&dev->gc, &cp2112_gpio_irqchip, 0,
  1121. handle_simple_irq, IRQ_TYPE_NONE);
  1122. if (ret) {
  1123. dev_err(dev->gc.parent, "failed to add IRQ chip\n");
  1124. goto err_sysfs_remove;
  1125. }
  1126. return ret;
  1127. err_sysfs_remove:
  1128. sysfs_remove_group(&hdev->dev.kobj, &cp2112_attr_group);
  1129. err_gpiochip_remove:
  1130. gpiochip_remove(&dev->gc);
  1131. err_free_i2c:
  1132. i2c_del_adapter(&dev->adap);
  1133. err_power_normal:
  1134. hid_hw_power(hdev, PM_HINT_NORMAL);
  1135. err_hid_close:
  1136. hid_hw_close(hdev);
  1137. err_hid_stop:
  1138. hid_hw_stop(hdev);
  1139. return ret;
  1140. }
  1141. static void cp2112_remove(struct hid_device *hdev)
  1142. {
  1143. struct cp2112_device *dev = hid_get_drvdata(hdev);
  1144. int i;
  1145. sysfs_remove_group(&hdev->dev.kobj, &cp2112_attr_group);
  1146. i2c_del_adapter(&dev->adap);
  1147. if (dev->gpio_poll) {
  1148. dev->gpio_poll = false;
  1149. cancel_delayed_work_sync(&dev->gpio_poll_worker);
  1150. }
  1151. for (i = 0; i < ARRAY_SIZE(dev->desc); i++) {
  1152. gpiochip_unlock_as_irq(&dev->gc, i);
  1153. gpiochip_free_own_desc(dev->desc[i]);
  1154. }
  1155. gpiochip_remove(&dev->gc);
  1156. /* i2c_del_adapter has finished removing all i2c devices from our
  1157. * adapter. Well behaved devices should no longer call our cp2112_xfer
  1158. * and should have waited for any pending calls to finish. It has also
  1159. * waited for device_unregister(&adap->dev) to complete. Therefore we
  1160. * can safely free our struct cp2112_device.
  1161. */
  1162. hid_hw_close(hdev);
  1163. hid_hw_stop(hdev);
  1164. }
  1165. static int cp2112_raw_event(struct hid_device *hdev, struct hid_report *report,
  1166. u8 *data, int size)
  1167. {
  1168. struct cp2112_device *dev = hid_get_drvdata(hdev);
  1169. struct cp2112_xfer_status_report *xfer = (void *)data;
  1170. switch (data[0]) {
  1171. case CP2112_TRANSFER_STATUS_RESPONSE:
  1172. hid_dbg(hdev, "xfer status: %02x %02x %04x %04x\n",
  1173. xfer->status0, xfer->status1,
  1174. be16_to_cpu(xfer->retries), be16_to_cpu(xfer->length));
  1175. switch (xfer->status0) {
  1176. case STATUS0_IDLE:
  1177. dev->xfer_status = -EAGAIN;
  1178. break;
  1179. case STATUS0_BUSY:
  1180. dev->xfer_status = -EBUSY;
  1181. break;
  1182. case STATUS0_COMPLETE:
  1183. dev->xfer_status = be16_to_cpu(xfer->length);
  1184. break;
  1185. case STATUS0_ERROR:
  1186. switch (xfer->status1) {
  1187. case STATUS1_TIMEOUT_NACK:
  1188. case STATUS1_TIMEOUT_BUS:
  1189. dev->xfer_status = -ETIMEDOUT;
  1190. break;
  1191. default:
  1192. dev->xfer_status = -EIO;
  1193. break;
  1194. }
  1195. break;
  1196. default:
  1197. dev->xfer_status = -EINVAL;
  1198. break;
  1199. }
  1200. atomic_set(&dev->xfer_avail, 1);
  1201. break;
  1202. case CP2112_DATA_READ_RESPONSE:
  1203. hid_dbg(hdev, "read response: %02x %02x\n", data[1], data[2]);
  1204. dev->read_length = data[2];
  1205. if (dev->read_length > sizeof(dev->read_data))
  1206. dev->read_length = sizeof(dev->read_data);
  1207. memcpy(dev->read_data, &data[3], dev->read_length);
  1208. atomic_set(&dev->read_avail, 1);
  1209. break;
  1210. default:
  1211. hid_err(hdev, "unknown report\n");
  1212. return 0;
  1213. }
  1214. wake_up_interruptible(&dev->wait);
  1215. return 1;
  1216. }
  1217. static struct hid_driver cp2112_driver = {
  1218. .name = "cp2112",
  1219. .id_table = cp2112_devices,
  1220. .probe = cp2112_probe,
  1221. .remove = cp2112_remove,
  1222. .raw_event = cp2112_raw_event,
  1223. };
  1224. module_hid_driver(cp2112_driver);
  1225. MODULE_DESCRIPTION("Silicon Labs HID USB to SMBus master bridge");
  1226. MODULE_AUTHOR("David Barksdale <dbarksdale@uplogix.com>");
  1227. MODULE_LICENSE("GPL");