vfio_pci.c 37 KB

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  1. /*
  2. * Copyright (C) 2012 Red Hat, Inc. All rights reserved.
  3. * Author: Alex Williamson <alex.williamson@redhat.com>
  4. *
  5. * This program is free software; you can redistribute it and/or modify
  6. * it under the terms of the GNU General Public License version 2 as
  7. * published by the Free Software Foundation.
  8. *
  9. * Derived from original vfio:
  10. * Copyright 2010 Cisco Systems, Inc. All rights reserved.
  11. * Author: Tom Lyon, pugs@cisco.com
  12. */
  13. #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  14. #include <linux/device.h>
  15. #include <linux/eventfd.h>
  16. #include <linux/file.h>
  17. #include <linux/interrupt.h>
  18. #include <linux/iommu.h>
  19. #include <linux/module.h>
  20. #include <linux/mutex.h>
  21. #include <linux/notifier.h>
  22. #include <linux/pci.h>
  23. #include <linux/pm_runtime.h>
  24. #include <linux/slab.h>
  25. #include <linux/types.h>
  26. #include <linux/uaccess.h>
  27. #include <linux/vfio.h>
  28. #include <linux/vgaarb.h>
  29. #include <linux/nospec.h>
  30. #include "vfio_pci_private.h"
  31. #define DRIVER_VERSION "0.2"
  32. #define DRIVER_AUTHOR "Alex Williamson <alex.williamson@redhat.com>"
  33. #define DRIVER_DESC "VFIO PCI - User Level meta-driver"
  34. static char ids[1024] __initdata;
  35. module_param_string(ids, ids, sizeof(ids), 0);
  36. MODULE_PARM_DESC(ids, "Initial PCI IDs to add to the vfio driver, format is \"vendor:device[:subvendor[:subdevice[:class[:class_mask]]]]\" and multiple comma separated entries can be specified");
  37. static bool nointxmask;
  38. module_param_named(nointxmask, nointxmask, bool, S_IRUGO | S_IWUSR);
  39. MODULE_PARM_DESC(nointxmask,
  40. "Disable support for PCI 2.3 style INTx masking. If this resolves problems for specific devices, report lspci -vvvxxx to linux-pci@vger.kernel.org so the device can be fixed automatically via the broken_intx_masking flag.");
  41. #ifdef CONFIG_VFIO_PCI_VGA
  42. static bool disable_vga;
  43. module_param(disable_vga, bool, S_IRUGO);
  44. MODULE_PARM_DESC(disable_vga, "Disable VGA resource access through vfio-pci");
  45. #endif
  46. static bool disable_idle_d3;
  47. module_param(disable_idle_d3, bool, S_IRUGO | S_IWUSR);
  48. MODULE_PARM_DESC(disable_idle_d3,
  49. "Disable using the PCI D3 low power state for idle, unused devices");
  50. static DEFINE_MUTEX(driver_lock);
  51. static inline bool vfio_vga_disabled(void)
  52. {
  53. #ifdef CONFIG_VFIO_PCI_VGA
  54. return disable_vga;
  55. #else
  56. return true;
  57. #endif
  58. }
  59. /*
  60. * Our VGA arbiter participation is limited since we don't know anything
  61. * about the device itself. However, if the device is the only VGA device
  62. * downstream of a bridge and VFIO VGA support is disabled, then we can
  63. * safely return legacy VGA IO and memory as not decoded since the user
  64. * has no way to get to it and routing can be disabled externally at the
  65. * bridge.
  66. */
  67. static unsigned int vfio_pci_set_vga_decode(void *opaque, bool single_vga)
  68. {
  69. struct vfio_pci_device *vdev = opaque;
  70. struct pci_dev *tmp = NULL, *pdev = vdev->pdev;
  71. unsigned char max_busnr;
  72. unsigned int decodes;
  73. if (single_vga || !vfio_vga_disabled() || pci_is_root_bus(pdev->bus))
  74. return VGA_RSRC_NORMAL_IO | VGA_RSRC_NORMAL_MEM |
  75. VGA_RSRC_LEGACY_IO | VGA_RSRC_LEGACY_MEM;
  76. max_busnr = pci_bus_max_busnr(pdev->bus);
  77. decodes = VGA_RSRC_NORMAL_IO | VGA_RSRC_NORMAL_MEM;
  78. while ((tmp = pci_get_class(PCI_CLASS_DISPLAY_VGA << 8, tmp)) != NULL) {
  79. if (tmp == pdev ||
  80. pci_domain_nr(tmp->bus) != pci_domain_nr(pdev->bus) ||
  81. pci_is_root_bus(tmp->bus))
  82. continue;
  83. if (tmp->bus->number >= pdev->bus->number &&
  84. tmp->bus->number <= max_busnr) {
  85. pci_dev_put(tmp);
  86. decodes |= VGA_RSRC_LEGACY_IO | VGA_RSRC_LEGACY_MEM;
  87. break;
  88. }
  89. }
  90. return decodes;
  91. }
  92. static inline bool vfio_pci_is_vga(struct pci_dev *pdev)
  93. {
  94. return (pdev->class >> 8) == PCI_CLASS_DISPLAY_VGA;
  95. }
  96. static void vfio_pci_probe_mmaps(struct vfio_pci_device *vdev)
  97. {
  98. struct resource *res;
  99. int bar;
  100. struct vfio_pci_dummy_resource *dummy_res;
  101. INIT_LIST_HEAD(&vdev->dummy_resources_list);
  102. for (bar = PCI_STD_RESOURCES; bar <= PCI_STD_RESOURCE_END; bar++) {
  103. res = vdev->pdev->resource + bar;
  104. if (!IS_ENABLED(CONFIG_VFIO_PCI_MMAP))
  105. goto no_mmap;
  106. if (!(res->flags & IORESOURCE_MEM))
  107. goto no_mmap;
  108. /*
  109. * The PCI core shouldn't set up a resource with a
  110. * type but zero size. But there may be bugs that
  111. * cause us to do that.
  112. */
  113. if (!resource_size(res))
  114. goto no_mmap;
  115. if (resource_size(res) >= PAGE_SIZE) {
  116. vdev->bar_mmap_supported[bar] = true;
  117. continue;
  118. }
  119. if (!(res->start & ~PAGE_MASK)) {
  120. /*
  121. * Add a dummy resource to reserve the remainder
  122. * of the exclusive page in case that hot-add
  123. * device's bar is assigned into it.
  124. */
  125. dummy_res = kzalloc(sizeof(*dummy_res), GFP_KERNEL);
  126. if (dummy_res == NULL)
  127. goto no_mmap;
  128. dummy_res->resource.name = "vfio sub-page reserved";
  129. dummy_res->resource.start = res->end + 1;
  130. dummy_res->resource.end = res->start + PAGE_SIZE - 1;
  131. dummy_res->resource.flags = res->flags;
  132. if (request_resource(res->parent,
  133. &dummy_res->resource)) {
  134. kfree(dummy_res);
  135. goto no_mmap;
  136. }
  137. dummy_res->index = bar;
  138. list_add(&dummy_res->res_next,
  139. &vdev->dummy_resources_list);
  140. vdev->bar_mmap_supported[bar] = true;
  141. continue;
  142. }
  143. /*
  144. * Here we don't handle the case when the BAR is not page
  145. * aligned because we can't expect the BAR will be
  146. * assigned into the same location in a page in guest
  147. * when we passthrough the BAR. And it's hard to access
  148. * this BAR in userspace because we have no way to get
  149. * the BAR's location in a page.
  150. */
  151. no_mmap:
  152. vdev->bar_mmap_supported[bar] = false;
  153. }
  154. }
  155. static void vfio_pci_try_bus_reset(struct vfio_pci_device *vdev);
  156. static void vfio_pci_disable(struct vfio_pci_device *vdev);
  157. /*
  158. * INTx masking requires the ability to disable INTx signaling via PCI_COMMAND
  159. * _and_ the ability detect when the device is asserting INTx via PCI_STATUS.
  160. * If a device implements the former but not the latter we would typically
  161. * expect broken_intx_masking be set and require an exclusive interrupt.
  162. * However since we do have control of the device's ability to assert INTx,
  163. * we can instead pretend that the device does not implement INTx, virtualizing
  164. * the pin register to report zero and maintaining DisINTx set on the host.
  165. */
  166. static bool vfio_pci_nointx(struct pci_dev *pdev)
  167. {
  168. switch (pdev->vendor) {
  169. case PCI_VENDOR_ID_INTEL:
  170. switch (pdev->device) {
  171. /* All i40e (XL710/X710/XXV710) 10/20/25/40GbE NICs */
  172. case 0x1572:
  173. case 0x1574:
  174. case 0x1580 ... 0x1581:
  175. case 0x1583 ... 0x158b:
  176. case 0x37d0 ... 0x37d2:
  177. return true;
  178. default:
  179. return false;
  180. }
  181. }
  182. return false;
  183. }
  184. static int vfio_pci_enable(struct vfio_pci_device *vdev)
  185. {
  186. struct pci_dev *pdev = vdev->pdev;
  187. int ret;
  188. u16 cmd;
  189. u8 msix_pos;
  190. pci_set_power_state(pdev, PCI_D0);
  191. /* Don't allow our initial saved state to include busmaster */
  192. pci_clear_master(pdev);
  193. ret = pci_enable_device(pdev);
  194. if (ret)
  195. return ret;
  196. /* If reset fails because of the device lock, fail this path entirely */
  197. ret = pci_try_reset_function(pdev);
  198. if (ret == -EAGAIN) {
  199. pci_disable_device(pdev);
  200. return ret;
  201. }
  202. vdev->reset_works = !ret;
  203. pci_save_state(pdev);
  204. vdev->pci_saved_state = pci_store_saved_state(pdev);
  205. if (!vdev->pci_saved_state)
  206. pr_debug("%s: Couldn't store %s saved state\n",
  207. __func__, dev_name(&pdev->dev));
  208. if (likely(!nointxmask)) {
  209. if (vfio_pci_nointx(pdev)) {
  210. dev_info(&pdev->dev, "Masking broken INTx support\n");
  211. vdev->nointx = true;
  212. pci_intx(pdev, 0);
  213. } else
  214. vdev->pci_2_3 = pci_intx_mask_supported(pdev);
  215. }
  216. pci_read_config_word(pdev, PCI_COMMAND, &cmd);
  217. if (vdev->pci_2_3 && (cmd & PCI_COMMAND_INTX_DISABLE)) {
  218. cmd &= ~PCI_COMMAND_INTX_DISABLE;
  219. pci_write_config_word(pdev, PCI_COMMAND, cmd);
  220. }
  221. ret = vfio_config_init(vdev);
  222. if (ret) {
  223. kfree(vdev->pci_saved_state);
  224. vdev->pci_saved_state = NULL;
  225. pci_disable_device(pdev);
  226. return ret;
  227. }
  228. msix_pos = pdev->msix_cap;
  229. if (msix_pos) {
  230. u16 flags;
  231. u32 table;
  232. pci_read_config_word(pdev, msix_pos + PCI_MSIX_FLAGS, &flags);
  233. pci_read_config_dword(pdev, msix_pos + PCI_MSIX_TABLE, &table);
  234. vdev->msix_bar = table & PCI_MSIX_TABLE_BIR;
  235. vdev->msix_offset = table & PCI_MSIX_TABLE_OFFSET;
  236. vdev->msix_size = ((flags & PCI_MSIX_FLAGS_QSIZE) + 1) * 16;
  237. } else
  238. vdev->msix_bar = 0xFF;
  239. if (!vfio_vga_disabled() && vfio_pci_is_vga(pdev))
  240. vdev->has_vga = true;
  241. if (vfio_pci_is_vga(pdev) &&
  242. pdev->vendor == PCI_VENDOR_ID_INTEL &&
  243. IS_ENABLED(CONFIG_VFIO_PCI_IGD)) {
  244. ret = vfio_pci_igd_init(vdev);
  245. if (ret) {
  246. dev_warn(&vdev->pdev->dev,
  247. "Failed to setup Intel IGD regions\n");
  248. vfio_pci_disable(vdev);
  249. return ret;
  250. }
  251. }
  252. vfio_pci_probe_mmaps(vdev);
  253. return 0;
  254. }
  255. static void vfio_pci_disable(struct vfio_pci_device *vdev)
  256. {
  257. struct pci_dev *pdev = vdev->pdev;
  258. struct vfio_pci_dummy_resource *dummy_res, *tmp;
  259. struct vfio_pci_ioeventfd *ioeventfd, *ioeventfd_tmp;
  260. int i, bar;
  261. /* Stop the device from further DMA */
  262. pci_clear_master(pdev);
  263. vfio_pci_set_irqs_ioctl(vdev, VFIO_IRQ_SET_DATA_NONE |
  264. VFIO_IRQ_SET_ACTION_TRIGGER,
  265. vdev->irq_type, 0, 0, NULL);
  266. /* Device closed, don't need mutex here */
  267. list_for_each_entry_safe(ioeventfd, ioeventfd_tmp,
  268. &vdev->ioeventfds_list, next) {
  269. vfio_virqfd_disable(&ioeventfd->virqfd);
  270. list_del(&ioeventfd->next);
  271. kfree(ioeventfd);
  272. }
  273. vdev->ioeventfds_nr = 0;
  274. vdev->virq_disabled = false;
  275. for (i = 0; i < vdev->num_regions; i++)
  276. vdev->region[i].ops->release(vdev, &vdev->region[i]);
  277. vdev->num_regions = 0;
  278. kfree(vdev->region);
  279. vdev->region = NULL; /* don't krealloc a freed pointer */
  280. vfio_config_free(vdev);
  281. for (bar = PCI_STD_RESOURCES; bar <= PCI_STD_RESOURCE_END; bar++) {
  282. if (!vdev->barmap[bar])
  283. continue;
  284. pci_iounmap(pdev, vdev->barmap[bar]);
  285. pci_release_selected_regions(pdev, 1 << bar);
  286. vdev->barmap[bar] = NULL;
  287. }
  288. list_for_each_entry_safe(dummy_res, tmp,
  289. &vdev->dummy_resources_list, res_next) {
  290. list_del(&dummy_res->res_next);
  291. release_resource(&dummy_res->resource);
  292. kfree(dummy_res);
  293. }
  294. vdev->needs_reset = true;
  295. /*
  296. * If we have saved state, restore it. If we can reset the device,
  297. * even better. Resetting with current state seems better than
  298. * nothing, but saving and restoring current state without reset
  299. * is just busy work.
  300. */
  301. if (pci_load_and_free_saved_state(pdev, &vdev->pci_saved_state)) {
  302. pr_info("%s: Couldn't reload %s saved state\n",
  303. __func__, dev_name(&pdev->dev));
  304. if (!vdev->reset_works)
  305. goto out;
  306. pci_save_state(pdev);
  307. }
  308. /*
  309. * Disable INTx and MSI, presumably to avoid spurious interrupts
  310. * during reset. Stolen from pci_reset_function()
  311. */
  312. pci_write_config_word(pdev, PCI_COMMAND, PCI_COMMAND_INTX_DISABLE);
  313. /*
  314. * Try to reset the device. The success of this is dependent on
  315. * being able to lock the device, which is not always possible.
  316. */
  317. if (vdev->reset_works && !pci_try_reset_function(pdev))
  318. vdev->needs_reset = false;
  319. pci_restore_state(pdev);
  320. out:
  321. pci_disable_device(pdev);
  322. vfio_pci_try_bus_reset(vdev);
  323. if (!disable_idle_d3)
  324. pci_set_power_state(pdev, PCI_D3hot);
  325. }
  326. static void vfio_pci_release(void *device_data)
  327. {
  328. struct vfio_pci_device *vdev = device_data;
  329. mutex_lock(&driver_lock);
  330. if (!(--vdev->refcnt)) {
  331. vfio_spapr_pci_eeh_release(vdev->pdev);
  332. vfio_pci_disable(vdev);
  333. }
  334. mutex_unlock(&driver_lock);
  335. module_put(THIS_MODULE);
  336. }
  337. static int vfio_pci_open(void *device_data)
  338. {
  339. struct vfio_pci_device *vdev = device_data;
  340. int ret = 0;
  341. if (!try_module_get(THIS_MODULE))
  342. return -ENODEV;
  343. mutex_lock(&driver_lock);
  344. if (!vdev->refcnt) {
  345. ret = vfio_pci_enable(vdev);
  346. if (ret)
  347. goto error;
  348. vfio_spapr_pci_eeh_open(vdev->pdev);
  349. }
  350. vdev->refcnt++;
  351. error:
  352. mutex_unlock(&driver_lock);
  353. if (ret)
  354. module_put(THIS_MODULE);
  355. return ret;
  356. }
  357. static int vfio_pci_get_irq_count(struct vfio_pci_device *vdev, int irq_type)
  358. {
  359. if (irq_type == VFIO_PCI_INTX_IRQ_INDEX) {
  360. u8 pin;
  361. pci_read_config_byte(vdev->pdev, PCI_INTERRUPT_PIN, &pin);
  362. if (IS_ENABLED(CONFIG_VFIO_PCI_INTX) && !vdev->nointx && pin)
  363. return 1;
  364. } else if (irq_type == VFIO_PCI_MSI_IRQ_INDEX) {
  365. u8 pos;
  366. u16 flags;
  367. pos = vdev->pdev->msi_cap;
  368. if (pos) {
  369. pci_read_config_word(vdev->pdev,
  370. pos + PCI_MSI_FLAGS, &flags);
  371. return 1 << ((flags & PCI_MSI_FLAGS_QMASK) >> 1);
  372. }
  373. } else if (irq_type == VFIO_PCI_MSIX_IRQ_INDEX) {
  374. u8 pos;
  375. u16 flags;
  376. pos = vdev->pdev->msix_cap;
  377. if (pos) {
  378. pci_read_config_word(vdev->pdev,
  379. pos + PCI_MSIX_FLAGS, &flags);
  380. return (flags & PCI_MSIX_FLAGS_QSIZE) + 1;
  381. }
  382. } else if (irq_type == VFIO_PCI_ERR_IRQ_INDEX) {
  383. if (pci_is_pcie(vdev->pdev))
  384. return 1;
  385. } else if (irq_type == VFIO_PCI_REQ_IRQ_INDEX) {
  386. return 1;
  387. }
  388. return 0;
  389. }
  390. static int vfio_pci_count_devs(struct pci_dev *pdev, void *data)
  391. {
  392. (*(int *)data)++;
  393. return 0;
  394. }
  395. struct vfio_pci_fill_info {
  396. int max;
  397. int cur;
  398. struct vfio_pci_dependent_device *devices;
  399. };
  400. static int vfio_pci_fill_devs(struct pci_dev *pdev, void *data)
  401. {
  402. struct vfio_pci_fill_info *fill = data;
  403. struct iommu_group *iommu_group;
  404. if (fill->cur == fill->max)
  405. return -EAGAIN; /* Something changed, try again */
  406. iommu_group = iommu_group_get(&pdev->dev);
  407. if (!iommu_group)
  408. return -EPERM; /* Cannot reset non-isolated devices */
  409. fill->devices[fill->cur].group_id = iommu_group_id(iommu_group);
  410. fill->devices[fill->cur].segment = pci_domain_nr(pdev->bus);
  411. fill->devices[fill->cur].bus = pdev->bus->number;
  412. fill->devices[fill->cur].devfn = pdev->devfn;
  413. fill->cur++;
  414. iommu_group_put(iommu_group);
  415. return 0;
  416. }
  417. struct vfio_pci_group_entry {
  418. struct vfio_group *group;
  419. int id;
  420. };
  421. struct vfio_pci_group_info {
  422. int count;
  423. struct vfio_pci_group_entry *groups;
  424. };
  425. static int vfio_pci_validate_devs(struct pci_dev *pdev, void *data)
  426. {
  427. struct vfio_pci_group_info *info = data;
  428. struct iommu_group *group;
  429. int id, i;
  430. group = iommu_group_get(&pdev->dev);
  431. if (!group)
  432. return -EPERM;
  433. id = iommu_group_id(group);
  434. for (i = 0; i < info->count; i++)
  435. if (info->groups[i].id == id)
  436. break;
  437. iommu_group_put(group);
  438. return (i == info->count) ? -EINVAL : 0;
  439. }
  440. static bool vfio_pci_dev_below_slot(struct pci_dev *pdev, struct pci_slot *slot)
  441. {
  442. for (; pdev; pdev = pdev->bus->self)
  443. if (pdev->bus == slot->bus)
  444. return (pdev->slot == slot);
  445. return false;
  446. }
  447. struct vfio_pci_walk_info {
  448. int (*fn)(struct pci_dev *, void *data);
  449. void *data;
  450. struct pci_dev *pdev;
  451. bool slot;
  452. int ret;
  453. };
  454. static int vfio_pci_walk_wrapper(struct pci_dev *pdev, void *data)
  455. {
  456. struct vfio_pci_walk_info *walk = data;
  457. if (!walk->slot || vfio_pci_dev_below_slot(pdev, walk->pdev->slot))
  458. walk->ret = walk->fn(pdev, walk->data);
  459. return walk->ret;
  460. }
  461. static int vfio_pci_for_each_slot_or_bus(struct pci_dev *pdev,
  462. int (*fn)(struct pci_dev *,
  463. void *data), void *data,
  464. bool slot)
  465. {
  466. struct vfio_pci_walk_info walk = {
  467. .fn = fn, .data = data, .pdev = pdev, .slot = slot, .ret = 0,
  468. };
  469. pci_walk_bus(pdev->bus, vfio_pci_walk_wrapper, &walk);
  470. return walk.ret;
  471. }
  472. static int msix_mmappable_cap(struct vfio_pci_device *vdev,
  473. struct vfio_info_cap *caps)
  474. {
  475. struct vfio_info_cap_header header = {
  476. .id = VFIO_REGION_INFO_CAP_MSIX_MAPPABLE,
  477. .version = 1
  478. };
  479. return vfio_info_add_capability(caps, &header, sizeof(header));
  480. }
  481. int vfio_pci_register_dev_region(struct vfio_pci_device *vdev,
  482. unsigned int type, unsigned int subtype,
  483. const struct vfio_pci_regops *ops,
  484. size_t size, u32 flags, void *data)
  485. {
  486. struct vfio_pci_region *region;
  487. region = krealloc(vdev->region,
  488. (vdev->num_regions + 1) * sizeof(*region),
  489. GFP_KERNEL);
  490. if (!region)
  491. return -ENOMEM;
  492. vdev->region = region;
  493. vdev->region[vdev->num_regions].type = type;
  494. vdev->region[vdev->num_regions].subtype = subtype;
  495. vdev->region[vdev->num_regions].ops = ops;
  496. vdev->region[vdev->num_regions].size = size;
  497. vdev->region[vdev->num_regions].flags = flags;
  498. vdev->region[vdev->num_regions].data = data;
  499. vdev->num_regions++;
  500. return 0;
  501. }
  502. static long vfio_pci_ioctl(void *device_data,
  503. unsigned int cmd, unsigned long arg)
  504. {
  505. struct vfio_pci_device *vdev = device_data;
  506. unsigned long minsz;
  507. if (cmd == VFIO_DEVICE_GET_INFO) {
  508. struct vfio_device_info info;
  509. minsz = offsetofend(struct vfio_device_info, num_irqs);
  510. if (copy_from_user(&info, (void __user *)arg, minsz))
  511. return -EFAULT;
  512. if (info.argsz < minsz)
  513. return -EINVAL;
  514. info.flags = VFIO_DEVICE_FLAGS_PCI;
  515. if (vdev->reset_works)
  516. info.flags |= VFIO_DEVICE_FLAGS_RESET;
  517. info.num_regions = VFIO_PCI_NUM_REGIONS + vdev->num_regions;
  518. info.num_irqs = VFIO_PCI_NUM_IRQS;
  519. return copy_to_user((void __user *)arg, &info, minsz) ?
  520. -EFAULT : 0;
  521. } else if (cmd == VFIO_DEVICE_GET_REGION_INFO) {
  522. struct pci_dev *pdev = vdev->pdev;
  523. struct vfio_region_info info;
  524. struct vfio_info_cap caps = { .buf = NULL, .size = 0 };
  525. int i, ret;
  526. minsz = offsetofend(struct vfio_region_info, offset);
  527. if (copy_from_user(&info, (void __user *)arg, minsz))
  528. return -EFAULT;
  529. if (info.argsz < minsz)
  530. return -EINVAL;
  531. switch (info.index) {
  532. case VFIO_PCI_CONFIG_REGION_INDEX:
  533. info.offset = VFIO_PCI_INDEX_TO_OFFSET(info.index);
  534. info.size = pdev->cfg_size;
  535. info.flags = VFIO_REGION_INFO_FLAG_READ |
  536. VFIO_REGION_INFO_FLAG_WRITE;
  537. break;
  538. case VFIO_PCI_BAR0_REGION_INDEX ... VFIO_PCI_BAR5_REGION_INDEX:
  539. info.offset = VFIO_PCI_INDEX_TO_OFFSET(info.index);
  540. info.size = pci_resource_len(pdev, info.index);
  541. if (!info.size) {
  542. info.flags = 0;
  543. break;
  544. }
  545. info.flags = VFIO_REGION_INFO_FLAG_READ |
  546. VFIO_REGION_INFO_FLAG_WRITE;
  547. if (vdev->bar_mmap_supported[info.index]) {
  548. info.flags |= VFIO_REGION_INFO_FLAG_MMAP;
  549. if (info.index == vdev->msix_bar) {
  550. ret = msix_mmappable_cap(vdev, &caps);
  551. if (ret)
  552. return ret;
  553. }
  554. }
  555. break;
  556. case VFIO_PCI_ROM_REGION_INDEX:
  557. {
  558. void __iomem *io;
  559. size_t size;
  560. info.offset = VFIO_PCI_INDEX_TO_OFFSET(info.index);
  561. info.flags = 0;
  562. /* Report the BAR size, not the ROM size */
  563. info.size = pci_resource_len(pdev, info.index);
  564. if (!info.size) {
  565. /* Shadow ROMs appear as PCI option ROMs */
  566. if (pdev->resource[PCI_ROM_RESOURCE].flags &
  567. IORESOURCE_ROM_SHADOW)
  568. info.size = 0x20000;
  569. else
  570. break;
  571. }
  572. /* Is it really there? */
  573. io = pci_map_rom(pdev, &size);
  574. if (!io || !size) {
  575. info.size = 0;
  576. break;
  577. }
  578. pci_unmap_rom(pdev, io);
  579. info.flags = VFIO_REGION_INFO_FLAG_READ;
  580. break;
  581. }
  582. case VFIO_PCI_VGA_REGION_INDEX:
  583. if (!vdev->has_vga)
  584. return -EINVAL;
  585. info.offset = VFIO_PCI_INDEX_TO_OFFSET(info.index);
  586. info.size = 0xc0000;
  587. info.flags = VFIO_REGION_INFO_FLAG_READ |
  588. VFIO_REGION_INFO_FLAG_WRITE;
  589. break;
  590. default:
  591. {
  592. struct vfio_region_info_cap_type cap_type = {
  593. .header.id = VFIO_REGION_INFO_CAP_TYPE,
  594. .header.version = 1 };
  595. if (info.index >=
  596. VFIO_PCI_NUM_REGIONS + vdev->num_regions)
  597. return -EINVAL;
  598. info.index = array_index_nospec(info.index,
  599. VFIO_PCI_NUM_REGIONS +
  600. vdev->num_regions);
  601. i = info.index - VFIO_PCI_NUM_REGIONS;
  602. info.offset = VFIO_PCI_INDEX_TO_OFFSET(info.index);
  603. info.size = vdev->region[i].size;
  604. info.flags = vdev->region[i].flags;
  605. cap_type.type = vdev->region[i].type;
  606. cap_type.subtype = vdev->region[i].subtype;
  607. ret = vfio_info_add_capability(&caps, &cap_type.header,
  608. sizeof(cap_type));
  609. if (ret)
  610. return ret;
  611. }
  612. }
  613. if (caps.size) {
  614. info.flags |= VFIO_REGION_INFO_FLAG_CAPS;
  615. if (info.argsz < sizeof(info) + caps.size) {
  616. info.argsz = sizeof(info) + caps.size;
  617. info.cap_offset = 0;
  618. } else {
  619. vfio_info_cap_shift(&caps, sizeof(info));
  620. if (copy_to_user((void __user *)arg +
  621. sizeof(info), caps.buf,
  622. caps.size)) {
  623. kfree(caps.buf);
  624. return -EFAULT;
  625. }
  626. info.cap_offset = sizeof(info);
  627. }
  628. kfree(caps.buf);
  629. }
  630. return copy_to_user((void __user *)arg, &info, minsz) ?
  631. -EFAULT : 0;
  632. } else if (cmd == VFIO_DEVICE_GET_IRQ_INFO) {
  633. struct vfio_irq_info info;
  634. minsz = offsetofend(struct vfio_irq_info, count);
  635. if (copy_from_user(&info, (void __user *)arg, minsz))
  636. return -EFAULT;
  637. if (info.argsz < minsz || info.index >= VFIO_PCI_NUM_IRQS)
  638. return -EINVAL;
  639. switch (info.index) {
  640. case VFIO_PCI_INTX_IRQ_INDEX ... VFIO_PCI_MSIX_IRQ_INDEX:
  641. case VFIO_PCI_REQ_IRQ_INDEX:
  642. break;
  643. case VFIO_PCI_ERR_IRQ_INDEX:
  644. if (pci_is_pcie(vdev->pdev))
  645. break;
  646. /* fall through */
  647. default:
  648. return -EINVAL;
  649. }
  650. info.flags = VFIO_IRQ_INFO_EVENTFD;
  651. info.count = vfio_pci_get_irq_count(vdev, info.index);
  652. if (info.index == VFIO_PCI_INTX_IRQ_INDEX)
  653. info.flags |= (VFIO_IRQ_INFO_MASKABLE |
  654. VFIO_IRQ_INFO_AUTOMASKED);
  655. else
  656. info.flags |= VFIO_IRQ_INFO_NORESIZE;
  657. return copy_to_user((void __user *)arg, &info, minsz) ?
  658. -EFAULT : 0;
  659. } else if (cmd == VFIO_DEVICE_SET_IRQS) {
  660. struct vfio_irq_set hdr;
  661. u8 *data = NULL;
  662. int max, ret = 0;
  663. size_t data_size = 0;
  664. minsz = offsetofend(struct vfio_irq_set, count);
  665. if (copy_from_user(&hdr, (void __user *)arg, minsz))
  666. return -EFAULT;
  667. max = vfio_pci_get_irq_count(vdev, hdr.index);
  668. ret = vfio_set_irqs_validate_and_prepare(&hdr, max,
  669. VFIO_PCI_NUM_IRQS, &data_size);
  670. if (ret)
  671. return ret;
  672. if (data_size) {
  673. data = memdup_user((void __user *)(arg + minsz),
  674. data_size);
  675. if (IS_ERR(data))
  676. return PTR_ERR(data);
  677. }
  678. mutex_lock(&vdev->igate);
  679. ret = vfio_pci_set_irqs_ioctl(vdev, hdr.flags, hdr.index,
  680. hdr.start, hdr.count, data);
  681. mutex_unlock(&vdev->igate);
  682. kfree(data);
  683. return ret;
  684. } else if (cmd == VFIO_DEVICE_RESET) {
  685. return vdev->reset_works ?
  686. pci_try_reset_function(vdev->pdev) : -EINVAL;
  687. } else if (cmd == VFIO_DEVICE_GET_PCI_HOT_RESET_INFO) {
  688. struct vfio_pci_hot_reset_info hdr;
  689. struct vfio_pci_fill_info fill = { 0 };
  690. struct vfio_pci_dependent_device *devices = NULL;
  691. bool slot = false;
  692. int ret = 0;
  693. minsz = offsetofend(struct vfio_pci_hot_reset_info, count);
  694. if (copy_from_user(&hdr, (void __user *)arg, minsz))
  695. return -EFAULT;
  696. if (hdr.argsz < minsz)
  697. return -EINVAL;
  698. hdr.flags = 0;
  699. /* Can we do a slot or bus reset or neither? */
  700. if (!pci_probe_reset_slot(vdev->pdev->slot))
  701. slot = true;
  702. else if (pci_probe_reset_bus(vdev->pdev->bus))
  703. return -ENODEV;
  704. /* How many devices are affected? */
  705. ret = vfio_pci_for_each_slot_or_bus(vdev->pdev,
  706. vfio_pci_count_devs,
  707. &fill.max, slot);
  708. if (ret)
  709. return ret;
  710. WARN_ON(!fill.max); /* Should always be at least one */
  711. /*
  712. * If there's enough space, fill it now, otherwise return
  713. * -ENOSPC and the number of devices affected.
  714. */
  715. if (hdr.argsz < sizeof(hdr) + (fill.max * sizeof(*devices))) {
  716. ret = -ENOSPC;
  717. hdr.count = fill.max;
  718. goto reset_info_exit;
  719. }
  720. devices = kcalloc(fill.max, sizeof(*devices), GFP_KERNEL);
  721. if (!devices)
  722. return -ENOMEM;
  723. fill.devices = devices;
  724. ret = vfio_pci_for_each_slot_or_bus(vdev->pdev,
  725. vfio_pci_fill_devs,
  726. &fill, slot);
  727. /*
  728. * If a device was removed between counting and filling,
  729. * we may come up short of fill.max. If a device was
  730. * added, we'll have a return of -EAGAIN above.
  731. */
  732. if (!ret)
  733. hdr.count = fill.cur;
  734. reset_info_exit:
  735. if (copy_to_user((void __user *)arg, &hdr, minsz))
  736. ret = -EFAULT;
  737. if (!ret) {
  738. if (copy_to_user((void __user *)(arg + minsz), devices,
  739. hdr.count * sizeof(*devices)))
  740. ret = -EFAULT;
  741. }
  742. kfree(devices);
  743. return ret;
  744. } else if (cmd == VFIO_DEVICE_PCI_HOT_RESET) {
  745. struct vfio_pci_hot_reset hdr;
  746. int32_t *group_fds;
  747. struct vfio_pci_group_entry *groups;
  748. struct vfio_pci_group_info info;
  749. bool slot = false;
  750. int i, count = 0, ret = 0;
  751. minsz = offsetofend(struct vfio_pci_hot_reset, count);
  752. if (copy_from_user(&hdr, (void __user *)arg, minsz))
  753. return -EFAULT;
  754. if (hdr.argsz < minsz || hdr.flags)
  755. return -EINVAL;
  756. /* Can we do a slot or bus reset or neither? */
  757. if (!pci_probe_reset_slot(vdev->pdev->slot))
  758. slot = true;
  759. else if (pci_probe_reset_bus(vdev->pdev->bus))
  760. return -ENODEV;
  761. /*
  762. * We can't let userspace give us an arbitrarily large
  763. * buffer to copy, so verify how many we think there
  764. * could be. Note groups can have multiple devices so
  765. * one group per device is the max.
  766. */
  767. ret = vfio_pci_for_each_slot_or_bus(vdev->pdev,
  768. vfio_pci_count_devs,
  769. &count, slot);
  770. if (ret)
  771. return ret;
  772. /* Somewhere between 1 and count is OK */
  773. if (!hdr.count || hdr.count > count)
  774. return -EINVAL;
  775. group_fds = kcalloc(hdr.count, sizeof(*group_fds), GFP_KERNEL);
  776. groups = kcalloc(hdr.count, sizeof(*groups), GFP_KERNEL);
  777. if (!group_fds || !groups) {
  778. kfree(group_fds);
  779. kfree(groups);
  780. return -ENOMEM;
  781. }
  782. if (copy_from_user(group_fds, (void __user *)(arg + minsz),
  783. hdr.count * sizeof(*group_fds))) {
  784. kfree(group_fds);
  785. kfree(groups);
  786. return -EFAULT;
  787. }
  788. /*
  789. * For each group_fd, get the group through the vfio external
  790. * user interface and store the group and iommu ID. This
  791. * ensures the group is held across the reset.
  792. */
  793. for (i = 0; i < hdr.count; i++) {
  794. struct vfio_group *group;
  795. struct fd f = fdget(group_fds[i]);
  796. if (!f.file) {
  797. ret = -EBADF;
  798. break;
  799. }
  800. group = vfio_group_get_external_user(f.file);
  801. fdput(f);
  802. if (IS_ERR(group)) {
  803. ret = PTR_ERR(group);
  804. break;
  805. }
  806. groups[i].group = group;
  807. groups[i].id = vfio_external_user_iommu_id(group);
  808. }
  809. kfree(group_fds);
  810. /* release reference to groups on error */
  811. if (ret)
  812. goto hot_reset_release;
  813. info.count = hdr.count;
  814. info.groups = groups;
  815. /*
  816. * Test whether all the affected devices are contained
  817. * by the set of groups provided by the user.
  818. */
  819. ret = vfio_pci_for_each_slot_or_bus(vdev->pdev,
  820. vfio_pci_validate_devs,
  821. &info, slot);
  822. if (!ret)
  823. /* User has access, do the reset */
  824. ret = pci_reset_bus(vdev->pdev);
  825. hot_reset_release:
  826. for (i--; i >= 0; i--)
  827. vfio_group_put_external_user(groups[i].group);
  828. kfree(groups);
  829. return ret;
  830. } else if (cmd == VFIO_DEVICE_IOEVENTFD) {
  831. struct vfio_device_ioeventfd ioeventfd;
  832. int count;
  833. minsz = offsetofend(struct vfio_device_ioeventfd, fd);
  834. if (copy_from_user(&ioeventfd, (void __user *)arg, minsz))
  835. return -EFAULT;
  836. if (ioeventfd.argsz < minsz)
  837. return -EINVAL;
  838. if (ioeventfd.flags & ~VFIO_DEVICE_IOEVENTFD_SIZE_MASK)
  839. return -EINVAL;
  840. count = ioeventfd.flags & VFIO_DEVICE_IOEVENTFD_SIZE_MASK;
  841. if (hweight8(count) != 1 || ioeventfd.fd < -1)
  842. return -EINVAL;
  843. return vfio_pci_ioeventfd(vdev, ioeventfd.offset,
  844. ioeventfd.data, count, ioeventfd.fd);
  845. }
  846. return -ENOTTY;
  847. }
  848. static ssize_t vfio_pci_rw(void *device_data, char __user *buf,
  849. size_t count, loff_t *ppos, bool iswrite)
  850. {
  851. unsigned int index = VFIO_PCI_OFFSET_TO_INDEX(*ppos);
  852. struct vfio_pci_device *vdev = device_data;
  853. if (index >= VFIO_PCI_NUM_REGIONS + vdev->num_regions)
  854. return -EINVAL;
  855. switch (index) {
  856. case VFIO_PCI_CONFIG_REGION_INDEX:
  857. return vfio_pci_config_rw(vdev, buf, count, ppos, iswrite);
  858. case VFIO_PCI_ROM_REGION_INDEX:
  859. if (iswrite)
  860. return -EINVAL;
  861. return vfio_pci_bar_rw(vdev, buf, count, ppos, false);
  862. case VFIO_PCI_BAR0_REGION_INDEX ... VFIO_PCI_BAR5_REGION_INDEX:
  863. return vfio_pci_bar_rw(vdev, buf, count, ppos, iswrite);
  864. case VFIO_PCI_VGA_REGION_INDEX:
  865. return vfio_pci_vga_rw(vdev, buf, count, ppos, iswrite);
  866. default:
  867. index -= VFIO_PCI_NUM_REGIONS;
  868. return vdev->region[index].ops->rw(vdev, buf,
  869. count, ppos, iswrite);
  870. }
  871. return -EINVAL;
  872. }
  873. static ssize_t vfio_pci_read(void *device_data, char __user *buf,
  874. size_t count, loff_t *ppos)
  875. {
  876. if (!count)
  877. return 0;
  878. return vfio_pci_rw(device_data, buf, count, ppos, false);
  879. }
  880. static ssize_t vfio_pci_write(void *device_data, const char __user *buf,
  881. size_t count, loff_t *ppos)
  882. {
  883. if (!count)
  884. return 0;
  885. return vfio_pci_rw(device_data, (char __user *)buf, count, ppos, true);
  886. }
  887. static int vfio_pci_mmap(void *device_data, struct vm_area_struct *vma)
  888. {
  889. struct vfio_pci_device *vdev = device_data;
  890. struct pci_dev *pdev = vdev->pdev;
  891. unsigned int index;
  892. u64 phys_len, req_len, pgoff, req_start;
  893. int ret;
  894. index = vma->vm_pgoff >> (VFIO_PCI_OFFSET_SHIFT - PAGE_SHIFT);
  895. if (vma->vm_end < vma->vm_start)
  896. return -EINVAL;
  897. if ((vma->vm_flags & VM_SHARED) == 0)
  898. return -EINVAL;
  899. if (index >= VFIO_PCI_ROM_REGION_INDEX)
  900. return -EINVAL;
  901. if (!vdev->bar_mmap_supported[index])
  902. return -EINVAL;
  903. phys_len = PAGE_ALIGN(pci_resource_len(pdev, index));
  904. req_len = vma->vm_end - vma->vm_start;
  905. pgoff = vma->vm_pgoff &
  906. ((1U << (VFIO_PCI_OFFSET_SHIFT - PAGE_SHIFT)) - 1);
  907. req_start = pgoff << PAGE_SHIFT;
  908. if (req_start + req_len > phys_len)
  909. return -EINVAL;
  910. /*
  911. * Even though we don't make use of the barmap for the mmap,
  912. * we need to request the region and the barmap tracks that.
  913. */
  914. if (!vdev->barmap[index]) {
  915. ret = pci_request_selected_regions(pdev,
  916. 1 << index, "vfio-pci");
  917. if (ret)
  918. return ret;
  919. vdev->barmap[index] = pci_iomap(pdev, index, 0);
  920. if (!vdev->barmap[index]) {
  921. pci_release_selected_regions(pdev, 1 << index);
  922. return -ENOMEM;
  923. }
  924. }
  925. vma->vm_private_data = vdev;
  926. vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
  927. vma->vm_pgoff = (pci_resource_start(pdev, index) >> PAGE_SHIFT) + pgoff;
  928. return remap_pfn_range(vma, vma->vm_start, vma->vm_pgoff,
  929. req_len, vma->vm_page_prot);
  930. }
  931. static void vfio_pci_request(void *device_data, unsigned int count)
  932. {
  933. struct vfio_pci_device *vdev = device_data;
  934. mutex_lock(&vdev->igate);
  935. if (vdev->req_trigger) {
  936. if (!(count % 10))
  937. dev_notice_ratelimited(&vdev->pdev->dev,
  938. "Relaying device request to user (#%u)\n",
  939. count);
  940. eventfd_signal(vdev->req_trigger, 1);
  941. } else if (count == 0) {
  942. dev_warn(&vdev->pdev->dev,
  943. "No device request channel registered, blocked until released by user\n");
  944. }
  945. mutex_unlock(&vdev->igate);
  946. }
  947. static const struct vfio_device_ops vfio_pci_ops = {
  948. .name = "vfio-pci",
  949. .open = vfio_pci_open,
  950. .release = vfio_pci_release,
  951. .ioctl = vfio_pci_ioctl,
  952. .read = vfio_pci_read,
  953. .write = vfio_pci_write,
  954. .mmap = vfio_pci_mmap,
  955. .request = vfio_pci_request,
  956. };
  957. static int vfio_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id)
  958. {
  959. struct vfio_pci_device *vdev;
  960. struct iommu_group *group;
  961. int ret;
  962. if (pdev->hdr_type != PCI_HEADER_TYPE_NORMAL)
  963. return -EINVAL;
  964. /*
  965. * Prevent binding to PFs with VFs enabled, this too easily allows
  966. * userspace instance with VFs and PFs from the same device, which
  967. * cannot work. Disabling SR-IOV here would initiate removing the
  968. * VFs, which would unbind the driver, which is prone to blocking
  969. * if that VF is also in use by vfio-pci. Just reject these PFs
  970. * and let the user sort it out.
  971. */
  972. if (pci_num_vf(pdev)) {
  973. pci_warn(pdev, "Cannot bind to PF with SR-IOV enabled\n");
  974. return -EBUSY;
  975. }
  976. group = vfio_iommu_group_get(&pdev->dev);
  977. if (!group)
  978. return -EINVAL;
  979. vdev = kzalloc(sizeof(*vdev), GFP_KERNEL);
  980. if (!vdev) {
  981. vfio_iommu_group_put(group, &pdev->dev);
  982. return -ENOMEM;
  983. }
  984. vdev->pdev = pdev;
  985. vdev->irq_type = VFIO_PCI_NUM_IRQS;
  986. mutex_init(&vdev->igate);
  987. spin_lock_init(&vdev->irqlock);
  988. mutex_init(&vdev->ioeventfds_lock);
  989. INIT_LIST_HEAD(&vdev->ioeventfds_list);
  990. ret = vfio_add_group_dev(&pdev->dev, &vfio_pci_ops, vdev);
  991. if (ret) {
  992. vfio_iommu_group_put(group, &pdev->dev);
  993. kfree(vdev);
  994. return ret;
  995. }
  996. if (vfio_pci_is_vga(pdev)) {
  997. vga_client_register(pdev, vdev, NULL, vfio_pci_set_vga_decode);
  998. vga_set_legacy_decoding(pdev,
  999. vfio_pci_set_vga_decode(vdev, false));
  1000. }
  1001. if (!disable_idle_d3) {
  1002. /*
  1003. * pci-core sets the device power state to an unknown value at
  1004. * bootup and after being removed from a driver. The only
  1005. * transition it allows from this unknown state is to D0, which
  1006. * typically happens when a driver calls pci_enable_device().
  1007. * We're not ready to enable the device yet, but we do want to
  1008. * be able to get to D3. Therefore first do a D0 transition
  1009. * before going to D3.
  1010. */
  1011. pci_set_power_state(pdev, PCI_D0);
  1012. pci_set_power_state(pdev, PCI_D3hot);
  1013. }
  1014. return ret;
  1015. }
  1016. static void vfio_pci_remove(struct pci_dev *pdev)
  1017. {
  1018. struct vfio_pci_device *vdev;
  1019. vdev = vfio_del_group_dev(&pdev->dev);
  1020. if (!vdev)
  1021. return;
  1022. vfio_iommu_group_put(pdev->dev.iommu_group, &pdev->dev);
  1023. kfree(vdev->region);
  1024. mutex_destroy(&vdev->ioeventfds_lock);
  1025. kfree(vdev);
  1026. if (vfio_pci_is_vga(pdev)) {
  1027. vga_client_register(pdev, NULL, NULL, NULL);
  1028. vga_set_legacy_decoding(pdev,
  1029. VGA_RSRC_NORMAL_IO | VGA_RSRC_NORMAL_MEM |
  1030. VGA_RSRC_LEGACY_IO | VGA_RSRC_LEGACY_MEM);
  1031. }
  1032. if (!disable_idle_d3)
  1033. pci_set_power_state(pdev, PCI_D0);
  1034. }
  1035. static pci_ers_result_t vfio_pci_aer_err_detected(struct pci_dev *pdev,
  1036. pci_channel_state_t state)
  1037. {
  1038. struct vfio_pci_device *vdev;
  1039. struct vfio_device *device;
  1040. device = vfio_device_get_from_dev(&pdev->dev);
  1041. if (device == NULL)
  1042. return PCI_ERS_RESULT_DISCONNECT;
  1043. vdev = vfio_device_data(device);
  1044. if (vdev == NULL) {
  1045. vfio_device_put(device);
  1046. return PCI_ERS_RESULT_DISCONNECT;
  1047. }
  1048. mutex_lock(&vdev->igate);
  1049. if (vdev->err_trigger)
  1050. eventfd_signal(vdev->err_trigger, 1);
  1051. mutex_unlock(&vdev->igate);
  1052. vfio_device_put(device);
  1053. return PCI_ERS_RESULT_CAN_RECOVER;
  1054. }
  1055. static const struct pci_error_handlers vfio_err_handlers = {
  1056. .error_detected = vfio_pci_aer_err_detected,
  1057. };
  1058. static struct pci_driver vfio_pci_driver = {
  1059. .name = "vfio-pci",
  1060. .id_table = NULL, /* only dynamic ids */
  1061. .probe = vfio_pci_probe,
  1062. .remove = vfio_pci_remove,
  1063. .err_handler = &vfio_err_handlers,
  1064. };
  1065. struct vfio_devices {
  1066. struct vfio_device **devices;
  1067. int cur_index;
  1068. int max_index;
  1069. };
  1070. static int vfio_pci_get_devs(struct pci_dev *pdev, void *data)
  1071. {
  1072. struct vfio_devices *devs = data;
  1073. struct vfio_device *device;
  1074. if (devs->cur_index == devs->max_index)
  1075. return -ENOSPC;
  1076. device = vfio_device_get_from_dev(&pdev->dev);
  1077. if (!device)
  1078. return -EINVAL;
  1079. if (pci_dev_driver(pdev) != &vfio_pci_driver) {
  1080. vfio_device_put(device);
  1081. return -EBUSY;
  1082. }
  1083. devs->devices[devs->cur_index++] = device;
  1084. return 0;
  1085. }
  1086. /*
  1087. * Attempt to do a bus/slot reset if there are devices affected by a reset for
  1088. * this device that are needs_reset and all of the affected devices are unused
  1089. * (!refcnt). Callers are required to hold driver_lock when calling this to
  1090. * prevent device opens and concurrent bus reset attempts. We prevent device
  1091. * unbinds by acquiring and holding a reference to the vfio_device.
  1092. *
  1093. * NB: vfio-core considers a group to be viable even if some devices are
  1094. * bound to drivers like pci-stub or pcieport. Here we require all devices
  1095. * to be bound to vfio_pci since that's the only way we can be sure they
  1096. * stay put.
  1097. */
  1098. static void vfio_pci_try_bus_reset(struct vfio_pci_device *vdev)
  1099. {
  1100. struct vfio_devices devs = { .cur_index = 0 };
  1101. int i = 0, ret = -EINVAL;
  1102. bool needs_reset = false, slot = false;
  1103. struct vfio_pci_device *tmp;
  1104. if (!pci_probe_reset_slot(vdev->pdev->slot))
  1105. slot = true;
  1106. else if (pci_probe_reset_bus(vdev->pdev->bus))
  1107. return;
  1108. if (vfio_pci_for_each_slot_or_bus(vdev->pdev, vfio_pci_count_devs,
  1109. &i, slot) || !i)
  1110. return;
  1111. devs.max_index = i;
  1112. devs.devices = kcalloc(i, sizeof(struct vfio_device *), GFP_KERNEL);
  1113. if (!devs.devices)
  1114. return;
  1115. if (vfio_pci_for_each_slot_or_bus(vdev->pdev,
  1116. vfio_pci_get_devs, &devs, slot))
  1117. goto put_devs;
  1118. for (i = 0; i < devs.cur_index; i++) {
  1119. tmp = vfio_device_data(devs.devices[i]);
  1120. if (tmp->needs_reset)
  1121. needs_reset = true;
  1122. if (tmp->refcnt)
  1123. goto put_devs;
  1124. }
  1125. if (needs_reset)
  1126. ret = pci_reset_bus(vdev->pdev);
  1127. put_devs:
  1128. for (i = 0; i < devs.cur_index; i++) {
  1129. tmp = vfio_device_data(devs.devices[i]);
  1130. if (!ret)
  1131. tmp->needs_reset = false;
  1132. if (!tmp->refcnt && !disable_idle_d3)
  1133. pci_set_power_state(tmp->pdev, PCI_D3hot);
  1134. vfio_device_put(devs.devices[i]);
  1135. }
  1136. kfree(devs.devices);
  1137. }
  1138. static void __exit vfio_pci_cleanup(void)
  1139. {
  1140. pci_unregister_driver(&vfio_pci_driver);
  1141. vfio_pci_uninit_perm_bits();
  1142. }
  1143. static void __init vfio_pci_fill_ids(void)
  1144. {
  1145. char *p, *id;
  1146. int rc;
  1147. /* no ids passed actually */
  1148. if (ids[0] == '\0')
  1149. return;
  1150. /* add ids specified in the module parameter */
  1151. p = ids;
  1152. while ((id = strsep(&p, ","))) {
  1153. unsigned int vendor, device, subvendor = PCI_ANY_ID,
  1154. subdevice = PCI_ANY_ID, class = 0, class_mask = 0;
  1155. int fields;
  1156. if (!strlen(id))
  1157. continue;
  1158. fields = sscanf(id, "%x:%x:%x:%x:%x:%x",
  1159. &vendor, &device, &subvendor, &subdevice,
  1160. &class, &class_mask);
  1161. if (fields < 2) {
  1162. pr_warn("invalid id string \"%s\"\n", id);
  1163. continue;
  1164. }
  1165. rc = pci_add_dynid(&vfio_pci_driver, vendor, device,
  1166. subvendor, subdevice, class, class_mask, 0);
  1167. if (rc)
  1168. pr_warn("failed to add dynamic id [%04x:%04x[%04x:%04x]] class %#08x/%08x (%d)\n",
  1169. vendor, device, subvendor, subdevice,
  1170. class, class_mask, rc);
  1171. else
  1172. pr_info("add [%04x:%04x[%04x:%04x]] class %#08x/%08x\n",
  1173. vendor, device, subvendor, subdevice,
  1174. class, class_mask);
  1175. }
  1176. }
  1177. static int __init vfio_pci_init(void)
  1178. {
  1179. int ret;
  1180. /* Allocate shared config space permision data used by all devices */
  1181. ret = vfio_pci_init_perm_bits();
  1182. if (ret)
  1183. return ret;
  1184. /* Register and scan for devices */
  1185. ret = pci_register_driver(&vfio_pci_driver);
  1186. if (ret)
  1187. goto out_driver;
  1188. vfio_pci_fill_ids();
  1189. return 0;
  1190. out_driver:
  1191. vfio_pci_uninit_perm_bits();
  1192. return ret;
  1193. }
  1194. module_init(vfio_pci_init);
  1195. module_exit(vfio_pci_cleanup);
  1196. MODULE_VERSION(DRIVER_VERSION);
  1197. MODULE_LICENSE("GPL v2");
  1198. MODULE_AUTHOR(DRIVER_AUTHOR);
  1199. MODULE_DESCRIPTION(DRIVER_DESC);