gpu_scheduler.c 26 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724725726727728729730731732733734735736737738739740741742743744745746747748749750751752753754755756757758759760761762763764765766767768769770771772773774775776777778779780781782783784785786787788789790791792793794795796797798799800801802803804805806807808809810811812813814815816817818819820821822823824825826827828829830831832833834835836837838839840841842843844845846847848849850851852853854855856857858859860861862863864865866867868869870871872873874875876877878879880881882883884885886887888889890891892893894895896897898899900901902903904905906907908909910911912913914915916917918919920921922923924925926927928929930931932933934935936937938939940941942943944945946947948949950951952953954955956957958959960961962963964965966967968969970971972973974975976977
  1. /*
  2. * Copyright 2015 Advanced Micro Devices, Inc.
  3. *
  4. * Permission is hereby granted, free of charge, to any person obtaining a
  5. * copy of this software and associated documentation files (the "Software"),
  6. * to deal in the Software without restriction, including without limitation
  7. * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  8. * and/or sell copies of the Software, and to permit persons to whom the
  9. * Software is furnished to do so, subject to the following conditions:
  10. *
  11. * The above copyright notice and this permission notice shall be included in
  12. * all copies or substantial portions of the Software.
  13. *
  14. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  15. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  16. * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  17. * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  18. * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  19. * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  20. * OTHER DEALINGS IN THE SOFTWARE.
  21. *
  22. */
  23. /**
  24. * DOC: Overview
  25. *
  26. * The GPU scheduler provides entities which allow userspace to push jobs
  27. * into software queues which are then scheduled on a hardware run queue.
  28. * The software queues have a priority among them. The scheduler selects the entities
  29. * from the run queue using a FIFO. The scheduler provides dependency handling
  30. * features among jobs. The driver is supposed to provide callback functions for
  31. * backend operations to the scheduler like submitting a job to hardware run queue,
  32. * returning the dependencies of a job etc.
  33. *
  34. * The organisation of the scheduler is the following:
  35. *
  36. * 1. Each hw run queue has one scheduler
  37. * 2. Each scheduler has multiple run queues with different priorities
  38. * (e.g., HIGH_HW,HIGH_SW, KERNEL, NORMAL)
  39. * 3. Each scheduler run queue has a queue of entities to schedule
  40. * 4. Entities themselves maintain a queue of jobs that will be scheduled on
  41. * the hardware.
  42. *
  43. * The jobs in a entity are always scheduled in the order that they were pushed.
  44. */
  45. #include <linux/kthread.h>
  46. #include <linux/wait.h>
  47. #include <linux/sched.h>
  48. #include <uapi/linux/sched/types.h>
  49. #include <drm/drmP.h>
  50. #include <drm/gpu_scheduler.h>
  51. #include <drm/spsc_queue.h>
  52. #define CREATE_TRACE_POINTS
  53. #include "gpu_scheduler_trace.h"
  54. #define to_drm_sched_job(sched_job) \
  55. container_of((sched_job), struct drm_sched_job, queue_node)
  56. static bool drm_sched_entity_is_ready(struct drm_sched_entity *entity);
  57. static void drm_sched_wakeup(struct drm_gpu_scheduler *sched);
  58. static void drm_sched_process_job(struct dma_fence *f, struct dma_fence_cb *cb);
  59. /**
  60. * drm_sched_rq_init - initialize a given run queue struct
  61. *
  62. * @rq: scheduler run queue
  63. *
  64. * Initializes a scheduler runqueue.
  65. */
  66. static void drm_sched_rq_init(struct drm_gpu_scheduler *sched,
  67. struct drm_sched_rq *rq)
  68. {
  69. spin_lock_init(&rq->lock);
  70. INIT_LIST_HEAD(&rq->entities);
  71. rq->current_entity = NULL;
  72. rq->sched = sched;
  73. }
  74. /**
  75. * drm_sched_rq_add_entity - add an entity
  76. *
  77. * @rq: scheduler run queue
  78. * @entity: scheduler entity
  79. *
  80. * Adds a scheduler entity to the run queue.
  81. */
  82. static void drm_sched_rq_add_entity(struct drm_sched_rq *rq,
  83. struct drm_sched_entity *entity)
  84. {
  85. if (!list_empty(&entity->list))
  86. return;
  87. spin_lock(&rq->lock);
  88. list_add_tail(&entity->list, &rq->entities);
  89. spin_unlock(&rq->lock);
  90. }
  91. /**
  92. * drm_sched_rq_remove_entity - remove an entity
  93. *
  94. * @rq: scheduler run queue
  95. * @entity: scheduler entity
  96. *
  97. * Removes a scheduler entity from the run queue.
  98. */
  99. static void drm_sched_rq_remove_entity(struct drm_sched_rq *rq,
  100. struct drm_sched_entity *entity)
  101. {
  102. if (list_empty(&entity->list))
  103. return;
  104. spin_lock(&rq->lock);
  105. list_del_init(&entity->list);
  106. if (rq->current_entity == entity)
  107. rq->current_entity = NULL;
  108. spin_unlock(&rq->lock);
  109. }
  110. /**
  111. * drm_sched_rq_select_entity - Select an entity which could provide a job to run
  112. *
  113. * @rq: scheduler run queue to check.
  114. *
  115. * Try to find a ready entity, returns NULL if none found.
  116. */
  117. static struct drm_sched_entity *
  118. drm_sched_rq_select_entity(struct drm_sched_rq *rq)
  119. {
  120. struct drm_sched_entity *entity;
  121. spin_lock(&rq->lock);
  122. entity = rq->current_entity;
  123. if (entity) {
  124. list_for_each_entry_continue(entity, &rq->entities, list) {
  125. if (drm_sched_entity_is_ready(entity)) {
  126. rq->current_entity = entity;
  127. spin_unlock(&rq->lock);
  128. return entity;
  129. }
  130. }
  131. }
  132. list_for_each_entry(entity, &rq->entities, list) {
  133. if (drm_sched_entity_is_ready(entity)) {
  134. rq->current_entity = entity;
  135. spin_unlock(&rq->lock);
  136. return entity;
  137. }
  138. if (entity == rq->current_entity)
  139. break;
  140. }
  141. spin_unlock(&rq->lock);
  142. return NULL;
  143. }
  144. /**
  145. * drm_sched_entity_init - Init a context entity used by scheduler when
  146. * submit to HW ring.
  147. *
  148. * @entity: scheduler entity to init
  149. * @rq_list: the list of run queue on which jobs from this
  150. * entity can be submitted
  151. * @num_rq_list: number of run queue in rq_list
  152. * @guilty: atomic_t set to 1 when a job on this queue
  153. * is found to be guilty causing a timeout
  154. *
  155. * Note: the rq_list should have atleast one element to schedule
  156. * the entity
  157. *
  158. * Returns 0 on success or a negative error code on failure.
  159. */
  160. int drm_sched_entity_init(struct drm_sched_entity *entity,
  161. struct drm_sched_rq **rq_list,
  162. unsigned int num_rq_list,
  163. atomic_t *guilty)
  164. {
  165. if (!(entity && rq_list && num_rq_list > 0 && rq_list[0]))
  166. return -EINVAL;
  167. memset(entity, 0, sizeof(struct drm_sched_entity));
  168. INIT_LIST_HEAD(&entity->list);
  169. entity->rq = rq_list[0];
  170. entity->guilty = guilty;
  171. entity->last_scheduled = NULL;
  172. spin_lock_init(&entity->rq_lock);
  173. spsc_queue_init(&entity->job_queue);
  174. atomic_set(&entity->fence_seq, 0);
  175. entity->fence_context = dma_fence_context_alloc(2);
  176. return 0;
  177. }
  178. EXPORT_SYMBOL(drm_sched_entity_init);
  179. /**
  180. * drm_sched_entity_is_initialized - Query if entity is initialized
  181. *
  182. * @sched: Pointer to scheduler instance
  183. * @entity: The pointer to a valid scheduler entity
  184. *
  185. * return true if entity is initialized, false otherwise
  186. */
  187. static bool drm_sched_entity_is_initialized(struct drm_gpu_scheduler *sched,
  188. struct drm_sched_entity *entity)
  189. {
  190. return entity->rq != NULL &&
  191. entity->rq->sched == sched;
  192. }
  193. /**
  194. * drm_sched_entity_is_idle - Check if entity is idle
  195. *
  196. * @entity: scheduler entity
  197. *
  198. * Returns true if the entity does not have any unscheduled jobs.
  199. */
  200. static bool drm_sched_entity_is_idle(struct drm_sched_entity *entity)
  201. {
  202. rmb();
  203. if (!entity->rq || spsc_queue_peek(&entity->job_queue) == NULL)
  204. return true;
  205. return false;
  206. }
  207. /**
  208. * drm_sched_entity_is_ready - Check if entity is ready
  209. *
  210. * @entity: scheduler entity
  211. *
  212. * Return true if entity could provide a job.
  213. */
  214. static bool drm_sched_entity_is_ready(struct drm_sched_entity *entity)
  215. {
  216. if (spsc_queue_peek(&entity->job_queue) == NULL)
  217. return false;
  218. if (READ_ONCE(entity->dependency))
  219. return false;
  220. return true;
  221. }
  222. static void drm_sched_entity_kill_jobs_cb(struct dma_fence *f,
  223. struct dma_fence_cb *cb)
  224. {
  225. struct drm_sched_job *job = container_of(cb, struct drm_sched_job,
  226. finish_cb);
  227. drm_sched_fence_finished(job->s_fence);
  228. WARN_ON(job->s_fence->parent);
  229. dma_fence_put(&job->s_fence->finished);
  230. job->sched->ops->free_job(job);
  231. }
  232. /**
  233. * drm_sched_entity_flush - Flush a context entity
  234. *
  235. * @sched: scheduler instance
  236. * @entity: scheduler entity
  237. * @timeout: time to wait in for Q to become empty in jiffies.
  238. *
  239. * Splitting drm_sched_entity_fini() into two functions, The first one does the waiting,
  240. * removes the entity from the runqueue and returns an error when the process was killed.
  241. *
  242. * Returns the remaining time in jiffies left from the input timeout
  243. */
  244. long drm_sched_entity_flush(struct drm_sched_entity *entity, long timeout)
  245. {
  246. struct drm_gpu_scheduler *sched;
  247. struct task_struct *last_user;
  248. long ret = timeout;
  249. sched = entity->rq->sched;
  250. if (!drm_sched_entity_is_initialized(sched, entity))
  251. return ret;
  252. /**
  253. * The client will not queue more IBs during this fini, consume existing
  254. * queued IBs or discard them on SIGKILL
  255. */
  256. if (current->flags & PF_EXITING) {
  257. if (timeout)
  258. ret = wait_event_timeout(
  259. sched->job_scheduled,
  260. drm_sched_entity_is_idle(entity),
  261. timeout);
  262. } else
  263. wait_event_killable(sched->job_scheduled, drm_sched_entity_is_idle(entity));
  264. /* For killed process disable any more IBs enqueue right now */
  265. last_user = cmpxchg(&entity->last_user, current->group_leader, NULL);
  266. if ((!last_user || last_user == current->group_leader) &&
  267. (current->flags & PF_EXITING) && (current->exit_code == SIGKILL))
  268. drm_sched_entity_set_rq(entity, NULL);
  269. return ret;
  270. }
  271. EXPORT_SYMBOL(drm_sched_entity_flush);
  272. /**
  273. * drm_sched_entity_cleanup - Destroy a context entity
  274. *
  275. * @sched: scheduler instance
  276. * @entity: scheduler entity
  277. *
  278. * This should be called after @drm_sched_entity_do_release. It goes over the
  279. * entity and signals all jobs with an error code if the process was killed.
  280. *
  281. */
  282. void drm_sched_entity_fini(struct drm_sched_entity *entity)
  283. {
  284. struct drm_gpu_scheduler *sched;
  285. sched = entity->rq->sched;
  286. drm_sched_entity_set_rq(entity, NULL);
  287. /* Consumption of existing IBs wasn't completed. Forcefully
  288. * remove them here.
  289. */
  290. if (spsc_queue_peek(&entity->job_queue)) {
  291. struct drm_sched_job *job;
  292. int r;
  293. /* Park the kernel for a moment to make sure it isn't processing
  294. * our enity.
  295. */
  296. kthread_park(sched->thread);
  297. kthread_unpark(sched->thread);
  298. if (entity->dependency) {
  299. dma_fence_remove_callback(entity->dependency,
  300. &entity->cb);
  301. dma_fence_put(entity->dependency);
  302. entity->dependency = NULL;
  303. }
  304. while ((job = to_drm_sched_job(spsc_queue_pop(&entity->job_queue)))) {
  305. struct drm_sched_fence *s_fence = job->s_fence;
  306. drm_sched_fence_scheduled(s_fence);
  307. dma_fence_set_error(&s_fence->finished, -ESRCH);
  308. /*
  309. * When pipe is hanged by older entity, new entity might
  310. * not even have chance to submit it's first job to HW
  311. * and so entity->last_scheduled will remain NULL
  312. */
  313. if (!entity->last_scheduled) {
  314. drm_sched_entity_kill_jobs_cb(NULL, &job->finish_cb);
  315. } else {
  316. r = dma_fence_add_callback(entity->last_scheduled, &job->finish_cb,
  317. drm_sched_entity_kill_jobs_cb);
  318. if (r == -ENOENT)
  319. drm_sched_entity_kill_jobs_cb(NULL, &job->finish_cb);
  320. else if (r)
  321. DRM_ERROR("fence add callback failed (%d)\n", r);
  322. }
  323. }
  324. }
  325. dma_fence_put(entity->last_scheduled);
  326. entity->last_scheduled = NULL;
  327. }
  328. EXPORT_SYMBOL(drm_sched_entity_fini);
  329. /**
  330. * drm_sched_entity_fini - Destroy a context entity
  331. *
  332. * @sched: scheduler instance
  333. * @entity: scheduler entity
  334. *
  335. * Calls drm_sched_entity_do_release() and drm_sched_entity_cleanup()
  336. */
  337. void drm_sched_entity_destroy(struct drm_sched_entity *entity)
  338. {
  339. drm_sched_entity_flush(entity, MAX_WAIT_SCHED_ENTITY_Q_EMPTY);
  340. drm_sched_entity_fini(entity);
  341. }
  342. EXPORT_SYMBOL(drm_sched_entity_destroy);
  343. static void drm_sched_entity_wakeup(struct dma_fence *f, struct dma_fence_cb *cb)
  344. {
  345. struct drm_sched_entity *entity =
  346. container_of(cb, struct drm_sched_entity, cb);
  347. entity->dependency = NULL;
  348. dma_fence_put(f);
  349. drm_sched_wakeup(entity->rq->sched);
  350. }
  351. static void drm_sched_entity_clear_dep(struct dma_fence *f, struct dma_fence_cb *cb)
  352. {
  353. struct drm_sched_entity *entity =
  354. container_of(cb, struct drm_sched_entity, cb);
  355. entity->dependency = NULL;
  356. dma_fence_put(f);
  357. }
  358. /**
  359. * drm_sched_entity_set_rq - Sets the run queue for an entity
  360. *
  361. * @entity: scheduler entity
  362. * @rq: scheduler run queue
  363. *
  364. * Sets the run queue for an entity and removes the entity from the previous
  365. * run queue in which was present.
  366. */
  367. void drm_sched_entity_set_rq(struct drm_sched_entity *entity,
  368. struct drm_sched_rq *rq)
  369. {
  370. if (entity->rq == rq)
  371. return;
  372. spin_lock(&entity->rq_lock);
  373. if (entity->rq)
  374. drm_sched_rq_remove_entity(entity->rq, entity);
  375. entity->rq = rq;
  376. if (rq)
  377. drm_sched_rq_add_entity(rq, entity);
  378. spin_unlock(&entity->rq_lock);
  379. }
  380. EXPORT_SYMBOL(drm_sched_entity_set_rq);
  381. /**
  382. * drm_sched_dependency_optimized
  383. *
  384. * @fence: the dependency fence
  385. * @entity: the entity which depends on the above fence
  386. *
  387. * Returns true if the dependency can be optimized and false otherwise
  388. */
  389. bool drm_sched_dependency_optimized(struct dma_fence* fence,
  390. struct drm_sched_entity *entity)
  391. {
  392. struct drm_gpu_scheduler *sched = entity->rq->sched;
  393. struct drm_sched_fence *s_fence;
  394. if (!fence || dma_fence_is_signaled(fence))
  395. return false;
  396. if (fence->context == entity->fence_context)
  397. return true;
  398. s_fence = to_drm_sched_fence(fence);
  399. if (s_fence && s_fence->sched == sched)
  400. return true;
  401. return false;
  402. }
  403. EXPORT_SYMBOL(drm_sched_dependency_optimized);
  404. static bool drm_sched_entity_add_dependency_cb(struct drm_sched_entity *entity)
  405. {
  406. struct drm_gpu_scheduler *sched = entity->rq->sched;
  407. struct dma_fence * fence = entity->dependency;
  408. struct drm_sched_fence *s_fence;
  409. if (fence->context == entity->fence_context ||
  410. fence->context == entity->fence_context + 1) {
  411. /*
  412. * Fence is a scheduled/finished fence from a job
  413. * which belongs to the same entity, we can ignore
  414. * fences from ourself
  415. */
  416. dma_fence_put(entity->dependency);
  417. return false;
  418. }
  419. s_fence = to_drm_sched_fence(fence);
  420. if (s_fence && s_fence->sched == sched) {
  421. /*
  422. * Fence is from the same scheduler, only need to wait for
  423. * it to be scheduled
  424. */
  425. fence = dma_fence_get(&s_fence->scheduled);
  426. dma_fence_put(entity->dependency);
  427. entity->dependency = fence;
  428. if (!dma_fence_add_callback(fence, &entity->cb,
  429. drm_sched_entity_clear_dep))
  430. return true;
  431. /* Ignore it when it is already scheduled */
  432. dma_fence_put(fence);
  433. return false;
  434. }
  435. if (!dma_fence_add_callback(entity->dependency, &entity->cb,
  436. drm_sched_entity_wakeup))
  437. return true;
  438. dma_fence_put(entity->dependency);
  439. return false;
  440. }
  441. static struct drm_sched_job *
  442. drm_sched_entity_pop_job(struct drm_sched_entity *entity)
  443. {
  444. struct drm_gpu_scheduler *sched = entity->rq->sched;
  445. struct drm_sched_job *sched_job = to_drm_sched_job(
  446. spsc_queue_peek(&entity->job_queue));
  447. if (!sched_job)
  448. return NULL;
  449. while ((entity->dependency = sched->ops->dependency(sched_job, entity)))
  450. if (drm_sched_entity_add_dependency_cb(entity))
  451. return NULL;
  452. /* skip jobs from entity that marked guilty */
  453. if (entity->guilty && atomic_read(entity->guilty))
  454. dma_fence_set_error(&sched_job->s_fence->finished, -ECANCELED);
  455. dma_fence_put(entity->last_scheduled);
  456. entity->last_scheduled = dma_fence_get(&sched_job->s_fence->finished);
  457. spsc_queue_pop(&entity->job_queue);
  458. return sched_job;
  459. }
  460. /**
  461. * drm_sched_entity_push_job - Submit a job to the entity's job queue
  462. *
  463. * @sched_job: job to submit
  464. * @entity: scheduler entity
  465. *
  466. * Note: To guarantee that the order of insertion to queue matches
  467. * the job's fence sequence number this function should be
  468. * called with drm_sched_job_init under common lock.
  469. *
  470. * Returns 0 for success, negative error code otherwise.
  471. */
  472. void drm_sched_entity_push_job(struct drm_sched_job *sched_job,
  473. struct drm_sched_entity *entity)
  474. {
  475. struct drm_gpu_scheduler *sched = sched_job->sched;
  476. bool first = false;
  477. trace_drm_sched_job(sched_job, entity);
  478. WRITE_ONCE(entity->last_user, current->group_leader);
  479. first = spsc_queue_push(&entity->job_queue, &sched_job->queue_node);
  480. /* first job wakes up scheduler */
  481. if (first) {
  482. /* Add the entity to the run queue */
  483. spin_lock(&entity->rq_lock);
  484. if (!entity->rq) {
  485. DRM_ERROR("Trying to push to a killed entity\n");
  486. spin_unlock(&entity->rq_lock);
  487. return;
  488. }
  489. drm_sched_rq_add_entity(entity->rq, entity);
  490. spin_unlock(&entity->rq_lock);
  491. drm_sched_wakeup(sched);
  492. }
  493. }
  494. EXPORT_SYMBOL(drm_sched_entity_push_job);
  495. /* job_finish is called after hw fence signaled
  496. */
  497. static void drm_sched_job_finish(struct work_struct *work)
  498. {
  499. struct drm_sched_job *s_job = container_of(work, struct drm_sched_job,
  500. finish_work);
  501. struct drm_gpu_scheduler *sched = s_job->sched;
  502. /* remove job from ring_mirror_list */
  503. spin_lock(&sched->job_list_lock);
  504. list_del_init(&s_job->node);
  505. if (sched->timeout != MAX_SCHEDULE_TIMEOUT) {
  506. struct drm_sched_job *next;
  507. spin_unlock(&sched->job_list_lock);
  508. cancel_delayed_work_sync(&s_job->work_tdr);
  509. spin_lock(&sched->job_list_lock);
  510. /* queue TDR for next job */
  511. next = list_first_entry_or_null(&sched->ring_mirror_list,
  512. struct drm_sched_job, node);
  513. if (next)
  514. schedule_delayed_work(&next->work_tdr, sched->timeout);
  515. }
  516. spin_unlock(&sched->job_list_lock);
  517. dma_fence_put(&s_job->s_fence->finished);
  518. sched->ops->free_job(s_job);
  519. }
  520. static void drm_sched_job_finish_cb(struct dma_fence *f,
  521. struct dma_fence_cb *cb)
  522. {
  523. struct drm_sched_job *job = container_of(cb, struct drm_sched_job,
  524. finish_cb);
  525. schedule_work(&job->finish_work);
  526. }
  527. static void drm_sched_job_begin(struct drm_sched_job *s_job)
  528. {
  529. struct drm_gpu_scheduler *sched = s_job->sched;
  530. dma_fence_add_callback(&s_job->s_fence->finished, &s_job->finish_cb,
  531. drm_sched_job_finish_cb);
  532. spin_lock(&sched->job_list_lock);
  533. list_add_tail(&s_job->node, &sched->ring_mirror_list);
  534. if (sched->timeout != MAX_SCHEDULE_TIMEOUT &&
  535. list_first_entry_or_null(&sched->ring_mirror_list,
  536. struct drm_sched_job, node) == s_job)
  537. schedule_delayed_work(&s_job->work_tdr, sched->timeout);
  538. spin_unlock(&sched->job_list_lock);
  539. }
  540. static void drm_sched_job_timedout(struct work_struct *work)
  541. {
  542. struct drm_sched_job *job = container_of(work, struct drm_sched_job,
  543. work_tdr.work);
  544. job->sched->ops->timedout_job(job);
  545. }
  546. /**
  547. * drm_sched_hw_job_reset - stop the scheduler if it contains the bad job
  548. *
  549. * @sched: scheduler instance
  550. * @bad: bad scheduler job
  551. *
  552. */
  553. void drm_sched_hw_job_reset(struct drm_gpu_scheduler *sched, struct drm_sched_job *bad)
  554. {
  555. struct drm_sched_job *s_job;
  556. struct drm_sched_entity *entity, *tmp;
  557. int i;
  558. spin_lock(&sched->job_list_lock);
  559. list_for_each_entry_reverse(s_job, &sched->ring_mirror_list, node) {
  560. if (s_job->s_fence->parent &&
  561. dma_fence_remove_callback(s_job->s_fence->parent,
  562. &s_job->s_fence->cb)) {
  563. dma_fence_put(s_job->s_fence->parent);
  564. s_job->s_fence->parent = NULL;
  565. atomic_dec(&sched->hw_rq_count);
  566. }
  567. }
  568. spin_unlock(&sched->job_list_lock);
  569. if (bad && bad->s_priority != DRM_SCHED_PRIORITY_KERNEL) {
  570. atomic_inc(&bad->karma);
  571. /* don't increase @bad's karma if it's from KERNEL RQ,
  572. * becuase sometimes GPU hang would cause kernel jobs (like VM updating jobs)
  573. * corrupt but keep in mind that kernel jobs always considered good.
  574. */
  575. for (i = DRM_SCHED_PRIORITY_MIN; i < DRM_SCHED_PRIORITY_KERNEL; i++ ) {
  576. struct drm_sched_rq *rq = &sched->sched_rq[i];
  577. spin_lock(&rq->lock);
  578. list_for_each_entry_safe(entity, tmp, &rq->entities, list) {
  579. if (bad->s_fence->scheduled.context == entity->fence_context) {
  580. if (atomic_read(&bad->karma) > bad->sched->hang_limit)
  581. if (entity->guilty)
  582. atomic_set(entity->guilty, 1);
  583. break;
  584. }
  585. }
  586. spin_unlock(&rq->lock);
  587. if (&entity->list != &rq->entities)
  588. break;
  589. }
  590. }
  591. }
  592. EXPORT_SYMBOL(drm_sched_hw_job_reset);
  593. /**
  594. * drm_sched_job_recovery - recover jobs after a reset
  595. *
  596. * @sched: scheduler instance
  597. *
  598. */
  599. void drm_sched_job_recovery(struct drm_gpu_scheduler *sched)
  600. {
  601. struct drm_sched_job *s_job, *tmp;
  602. bool found_guilty = false;
  603. int r;
  604. spin_lock(&sched->job_list_lock);
  605. s_job = list_first_entry_or_null(&sched->ring_mirror_list,
  606. struct drm_sched_job, node);
  607. if (s_job && sched->timeout != MAX_SCHEDULE_TIMEOUT)
  608. schedule_delayed_work(&s_job->work_tdr, sched->timeout);
  609. list_for_each_entry_safe(s_job, tmp, &sched->ring_mirror_list, node) {
  610. struct drm_sched_fence *s_fence = s_job->s_fence;
  611. struct dma_fence *fence;
  612. uint64_t guilty_context;
  613. if (!found_guilty && atomic_read(&s_job->karma) > sched->hang_limit) {
  614. found_guilty = true;
  615. guilty_context = s_job->s_fence->scheduled.context;
  616. }
  617. if (found_guilty && s_job->s_fence->scheduled.context == guilty_context)
  618. dma_fence_set_error(&s_fence->finished, -ECANCELED);
  619. spin_unlock(&sched->job_list_lock);
  620. fence = sched->ops->run_job(s_job);
  621. atomic_inc(&sched->hw_rq_count);
  622. if (fence) {
  623. s_fence->parent = dma_fence_get(fence);
  624. r = dma_fence_add_callback(fence, &s_fence->cb,
  625. drm_sched_process_job);
  626. if (r == -ENOENT)
  627. drm_sched_process_job(fence, &s_fence->cb);
  628. else if (r)
  629. DRM_ERROR("fence add callback failed (%d)\n",
  630. r);
  631. dma_fence_put(fence);
  632. } else {
  633. drm_sched_process_job(NULL, &s_fence->cb);
  634. }
  635. spin_lock(&sched->job_list_lock);
  636. }
  637. spin_unlock(&sched->job_list_lock);
  638. }
  639. EXPORT_SYMBOL(drm_sched_job_recovery);
  640. /**
  641. * drm_sched_job_init - init a scheduler job
  642. *
  643. * @job: scheduler job to init
  644. * @sched: scheduler instance
  645. * @entity: scheduler entity to use
  646. * @owner: job owner for debugging
  647. *
  648. * Refer to drm_sched_entity_push_job() documentation
  649. * for locking considerations.
  650. *
  651. * Returns 0 for success, negative error code otherwise.
  652. */
  653. int drm_sched_job_init(struct drm_sched_job *job,
  654. struct drm_sched_entity *entity,
  655. void *owner)
  656. {
  657. struct drm_gpu_scheduler *sched = entity->rq->sched;
  658. job->sched = sched;
  659. job->entity = entity;
  660. job->s_priority = entity->rq - sched->sched_rq;
  661. job->s_fence = drm_sched_fence_create(entity, owner);
  662. if (!job->s_fence)
  663. return -ENOMEM;
  664. job->id = atomic64_inc_return(&sched->job_id_count);
  665. INIT_WORK(&job->finish_work, drm_sched_job_finish);
  666. INIT_LIST_HEAD(&job->node);
  667. INIT_DELAYED_WORK(&job->work_tdr, drm_sched_job_timedout);
  668. return 0;
  669. }
  670. EXPORT_SYMBOL(drm_sched_job_init);
  671. /**
  672. * drm_sched_ready - is the scheduler ready
  673. *
  674. * @sched: scheduler instance
  675. *
  676. * Return true if we can push more jobs to the hw, otherwise false.
  677. */
  678. static bool drm_sched_ready(struct drm_gpu_scheduler *sched)
  679. {
  680. return atomic_read(&sched->hw_rq_count) <
  681. sched->hw_submission_limit;
  682. }
  683. /**
  684. * drm_sched_wakeup - Wake up the scheduler when it is ready
  685. *
  686. * @sched: scheduler instance
  687. *
  688. */
  689. static void drm_sched_wakeup(struct drm_gpu_scheduler *sched)
  690. {
  691. if (drm_sched_ready(sched))
  692. wake_up_interruptible(&sched->wake_up_worker);
  693. }
  694. /**
  695. * drm_sched_select_entity - Select next entity to process
  696. *
  697. * @sched: scheduler instance
  698. *
  699. * Returns the entity to process or NULL if none are found.
  700. */
  701. static struct drm_sched_entity *
  702. drm_sched_select_entity(struct drm_gpu_scheduler *sched)
  703. {
  704. struct drm_sched_entity *entity;
  705. int i;
  706. if (!drm_sched_ready(sched))
  707. return NULL;
  708. /* Kernel run queue has higher priority than normal run queue*/
  709. for (i = DRM_SCHED_PRIORITY_MAX - 1; i >= DRM_SCHED_PRIORITY_MIN; i--) {
  710. entity = drm_sched_rq_select_entity(&sched->sched_rq[i]);
  711. if (entity)
  712. break;
  713. }
  714. return entity;
  715. }
  716. /**
  717. * drm_sched_process_job - process a job
  718. *
  719. * @f: fence
  720. * @cb: fence callbacks
  721. *
  722. * Called after job has finished execution.
  723. */
  724. static void drm_sched_process_job(struct dma_fence *f, struct dma_fence_cb *cb)
  725. {
  726. struct drm_sched_fence *s_fence =
  727. container_of(cb, struct drm_sched_fence, cb);
  728. struct drm_gpu_scheduler *sched = s_fence->sched;
  729. dma_fence_get(&s_fence->finished);
  730. atomic_dec(&sched->hw_rq_count);
  731. drm_sched_fence_finished(s_fence);
  732. trace_drm_sched_process_job(s_fence);
  733. dma_fence_put(&s_fence->finished);
  734. wake_up_interruptible(&sched->wake_up_worker);
  735. }
  736. /**
  737. * drm_sched_blocked - check if the scheduler is blocked
  738. *
  739. * @sched: scheduler instance
  740. *
  741. * Returns true if blocked, otherwise false.
  742. */
  743. static bool drm_sched_blocked(struct drm_gpu_scheduler *sched)
  744. {
  745. if (kthread_should_park()) {
  746. kthread_parkme();
  747. return true;
  748. }
  749. return false;
  750. }
  751. /**
  752. * drm_sched_main - main scheduler thread
  753. *
  754. * @param: scheduler instance
  755. *
  756. * Returns 0.
  757. */
  758. static int drm_sched_main(void *param)
  759. {
  760. struct sched_param sparam = {.sched_priority = 1};
  761. struct drm_gpu_scheduler *sched = (struct drm_gpu_scheduler *)param;
  762. int r;
  763. sched_setscheduler(current, SCHED_FIFO, &sparam);
  764. while (!kthread_should_stop()) {
  765. struct drm_sched_entity *entity = NULL;
  766. struct drm_sched_fence *s_fence;
  767. struct drm_sched_job *sched_job;
  768. struct dma_fence *fence;
  769. wait_event_interruptible(sched->wake_up_worker,
  770. (!drm_sched_blocked(sched) &&
  771. (entity = drm_sched_select_entity(sched))) ||
  772. kthread_should_stop());
  773. if (!entity)
  774. continue;
  775. sched_job = drm_sched_entity_pop_job(entity);
  776. if (!sched_job)
  777. continue;
  778. s_fence = sched_job->s_fence;
  779. atomic_inc(&sched->hw_rq_count);
  780. drm_sched_job_begin(sched_job);
  781. fence = sched->ops->run_job(sched_job);
  782. drm_sched_fence_scheduled(s_fence);
  783. if (fence) {
  784. s_fence->parent = dma_fence_get(fence);
  785. r = dma_fence_add_callback(fence, &s_fence->cb,
  786. drm_sched_process_job);
  787. if (r == -ENOENT)
  788. drm_sched_process_job(fence, &s_fence->cb);
  789. else if (r)
  790. DRM_ERROR("fence add callback failed (%d)\n",
  791. r);
  792. dma_fence_put(fence);
  793. } else {
  794. drm_sched_process_job(NULL, &s_fence->cb);
  795. }
  796. wake_up(&sched->job_scheduled);
  797. }
  798. return 0;
  799. }
  800. /**
  801. * drm_sched_init - Init a gpu scheduler instance
  802. *
  803. * @sched: scheduler instance
  804. * @ops: backend operations for this scheduler
  805. * @hw_submission: number of hw submissions that can be in flight
  806. * @hang_limit: number of times to allow a job to hang before dropping it
  807. * @timeout: timeout value in jiffies for the scheduler
  808. * @name: name used for debugging
  809. *
  810. * Return 0 on success, otherwise error code.
  811. */
  812. int drm_sched_init(struct drm_gpu_scheduler *sched,
  813. const struct drm_sched_backend_ops *ops,
  814. unsigned hw_submission,
  815. unsigned hang_limit,
  816. long timeout,
  817. const char *name)
  818. {
  819. int i;
  820. sched->ops = ops;
  821. sched->hw_submission_limit = hw_submission;
  822. sched->name = name;
  823. sched->timeout = timeout;
  824. sched->hang_limit = hang_limit;
  825. for (i = DRM_SCHED_PRIORITY_MIN; i < DRM_SCHED_PRIORITY_MAX; i++)
  826. drm_sched_rq_init(sched, &sched->sched_rq[i]);
  827. init_waitqueue_head(&sched->wake_up_worker);
  828. init_waitqueue_head(&sched->job_scheduled);
  829. INIT_LIST_HEAD(&sched->ring_mirror_list);
  830. spin_lock_init(&sched->job_list_lock);
  831. atomic_set(&sched->hw_rq_count, 0);
  832. atomic64_set(&sched->job_id_count, 0);
  833. /* Each scheduler will run on a seperate kernel thread */
  834. sched->thread = kthread_run(drm_sched_main, sched, sched->name);
  835. if (IS_ERR(sched->thread)) {
  836. DRM_ERROR("Failed to create scheduler for %s.\n", name);
  837. return PTR_ERR(sched->thread);
  838. }
  839. return 0;
  840. }
  841. EXPORT_SYMBOL(drm_sched_init);
  842. /**
  843. * drm_sched_fini - Destroy a gpu scheduler
  844. *
  845. * @sched: scheduler instance
  846. *
  847. * Tears down and cleans up the scheduler.
  848. */
  849. void drm_sched_fini(struct drm_gpu_scheduler *sched)
  850. {
  851. if (sched->thread)
  852. kthread_stop(sched->thread);
  853. }
  854. EXPORT_SYMBOL(drm_sched_fini);