i2c-aspeed.txt 1.4 KB

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  1. Device tree configuration for the I2C busses on the AST24XX and AST25XX SoCs.
  2. Required Properties:
  3. - #address-cells : should be 1
  4. - #size-cells : should be 0
  5. - reg : address offset and range of bus
  6. - compatible : should be "aspeed,ast2400-i2c-bus"
  7. or "aspeed,ast2500-i2c-bus"
  8. - clocks : root clock of bus, should reference the APB
  9. clock in the second cell
  10. - resets : phandle to reset controller with the reset number in
  11. the second cell
  12. - interrupts : interrupt number
  13. - interrupt-parent : interrupt controller for bus, should reference a
  14. aspeed,ast2400-i2c-ic or aspeed,ast2500-i2c-ic
  15. interrupt controller
  16. Optional Properties:
  17. - bus-frequency : frequency of the bus clock in Hz defaults to 100 kHz when not
  18. specified
  19. - multi-master : states that there is another master active on this bus.
  20. Example:
  21. i2c {
  22. compatible = "simple-bus";
  23. #address-cells = <1>;
  24. #size-cells = <1>;
  25. ranges = <0 0x1e78a000 0x1000>;
  26. i2c_ic: interrupt-controller@0 {
  27. #interrupt-cells = <1>;
  28. compatible = "aspeed,ast2400-i2c-ic";
  29. reg = <0x0 0x40>;
  30. interrupts = <12>;
  31. interrupt-controller;
  32. };
  33. i2c0: i2c-bus@40 {
  34. #address-cells = <1>;
  35. #size-cells = <0>;
  36. #interrupt-cells = <1>;
  37. reg = <0x40 0x40>;
  38. compatible = "aspeed,ast2400-i2c-bus";
  39. clocks = <&syscon ASPEED_CLK_APB>;
  40. resets = <&syscon ASPEED_RESET_I2C>;
  41. bus-frequency = <100000>;
  42. interrupts = <0>;
  43. interrupt-parent = <&i2c_ic>;
  44. };
  45. };