dwc3-pci.c 9.3 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /**
  3. * dwc3-pci.c - PCI Specific glue layer
  4. *
  5. * Copyright (C) 2010-2011 Texas Instruments Incorporated - http://www.ti.com
  6. *
  7. * Authors: Felipe Balbi <balbi@ti.com>,
  8. * Sebastian Andrzej Siewior <bigeasy@linutronix.de>
  9. */
  10. #include <linux/kernel.h>
  11. #include <linux/module.h>
  12. #include <linux/slab.h>
  13. #include <linux/pci.h>
  14. #include <linux/workqueue.h>
  15. #include <linux/pm_runtime.h>
  16. #include <linux/platform_device.h>
  17. #include <linux/gpio/consumer.h>
  18. #include <linux/acpi.h>
  19. #include <linux/delay.h>
  20. #define PCI_DEVICE_ID_INTEL_BYT 0x0f37
  21. #define PCI_DEVICE_ID_INTEL_MRFLD 0x119e
  22. #define PCI_DEVICE_ID_INTEL_BSW 0x22b7
  23. #define PCI_DEVICE_ID_INTEL_SPTLP 0x9d30
  24. #define PCI_DEVICE_ID_INTEL_SPTH 0xa130
  25. #define PCI_DEVICE_ID_INTEL_BXT 0x0aaa
  26. #define PCI_DEVICE_ID_INTEL_BXT_M 0x1aaa
  27. #define PCI_DEVICE_ID_INTEL_APL 0x5aaa
  28. #define PCI_DEVICE_ID_INTEL_KBP 0xa2b0
  29. #define PCI_DEVICE_ID_INTEL_GLK 0x31aa
  30. #define PCI_DEVICE_ID_INTEL_CNPLP 0x9dee
  31. #define PCI_DEVICE_ID_INTEL_CNPH 0xa36e
  32. #define PCI_DEVICE_ID_INTEL_ICLLP 0x34ee
  33. #define PCI_INTEL_BXT_DSM_GUID "732b85d5-b7a7-4a1b-9ba0-4bbd00ffd511"
  34. #define PCI_INTEL_BXT_FUNC_PMU_PWR 4
  35. #define PCI_INTEL_BXT_STATE_D0 0
  36. #define PCI_INTEL_BXT_STATE_D3 3
  37. /**
  38. * struct dwc3_pci - Driver private structure
  39. * @dwc3: child dwc3 platform_device
  40. * @pci: our link to PCI bus
  41. * @guid: _DSM GUID
  42. * @has_dsm_for_pm: true for devices which need to run _DSM on runtime PM
  43. */
  44. struct dwc3_pci {
  45. struct platform_device *dwc3;
  46. struct pci_dev *pci;
  47. guid_t guid;
  48. unsigned int has_dsm_for_pm:1;
  49. struct work_struct wakeup_work;
  50. };
  51. static const struct acpi_gpio_params reset_gpios = { 0, 0, false };
  52. static const struct acpi_gpio_params cs_gpios = { 1, 0, false };
  53. static const struct acpi_gpio_mapping acpi_dwc3_byt_gpios[] = {
  54. { "reset-gpios", &reset_gpios, 1 },
  55. { "cs-gpios", &cs_gpios, 1 },
  56. { },
  57. };
  58. static int dwc3_pci_quirks(struct dwc3_pci *dwc)
  59. {
  60. struct platform_device *dwc3 = dwc->dwc3;
  61. struct pci_dev *pdev = dwc->pci;
  62. if (pdev->vendor == PCI_VENDOR_ID_AMD &&
  63. pdev->device == PCI_DEVICE_ID_AMD_NL_USB) {
  64. struct property_entry properties[] = {
  65. PROPERTY_ENTRY_BOOL("snps,has-lpm-erratum"),
  66. PROPERTY_ENTRY_U8("snps,lpm-nyet-threshold", 0xf),
  67. PROPERTY_ENTRY_BOOL("snps,u2exit_lfps_quirk"),
  68. PROPERTY_ENTRY_BOOL("snps,u2ss_inp3_quirk"),
  69. PROPERTY_ENTRY_BOOL("snps,req_p1p2p3_quirk"),
  70. PROPERTY_ENTRY_BOOL("snps,del_p1p2p3_quirk"),
  71. PROPERTY_ENTRY_BOOL("snps,del_phy_power_chg_quirk"),
  72. PROPERTY_ENTRY_BOOL("snps,lfps_filter_quirk"),
  73. PROPERTY_ENTRY_BOOL("snps,rx_detect_poll_quirk"),
  74. PROPERTY_ENTRY_BOOL("snps,tx_de_emphasis_quirk"),
  75. PROPERTY_ENTRY_U8("snps,tx_de_emphasis", 1),
  76. /*
  77. * FIXME these quirks should be removed when AMD NL
  78. * tapes out
  79. */
  80. PROPERTY_ENTRY_BOOL("snps,disable_scramble_quirk"),
  81. PROPERTY_ENTRY_BOOL("snps,dis_u3_susphy_quirk"),
  82. PROPERTY_ENTRY_BOOL("snps,dis_u2_susphy_quirk"),
  83. PROPERTY_ENTRY_BOOL("linux,sysdev_is_parent"),
  84. { },
  85. };
  86. return platform_device_add_properties(dwc3, properties);
  87. }
  88. if (pdev->vendor == PCI_VENDOR_ID_INTEL) {
  89. int ret;
  90. struct property_entry properties[] = {
  91. PROPERTY_ENTRY_STRING("dr_mode", "peripheral"),
  92. PROPERTY_ENTRY_BOOL("linux,sysdev_is_parent"),
  93. { }
  94. };
  95. ret = platform_device_add_properties(dwc3, properties);
  96. if (ret < 0)
  97. return ret;
  98. if (pdev->device == PCI_DEVICE_ID_INTEL_BXT ||
  99. pdev->device == PCI_DEVICE_ID_INTEL_BXT_M) {
  100. guid_parse(PCI_INTEL_BXT_DSM_GUID, &dwc->guid);
  101. dwc->has_dsm_for_pm = true;
  102. }
  103. if (pdev->device == PCI_DEVICE_ID_INTEL_BYT) {
  104. struct gpio_desc *gpio;
  105. ret = devm_acpi_dev_add_driver_gpios(&pdev->dev,
  106. acpi_dwc3_byt_gpios);
  107. if (ret)
  108. dev_dbg(&pdev->dev, "failed to add mapping table\n");
  109. /*
  110. * These GPIOs will turn on the USB2 PHY. Note that we have to
  111. * put the gpio descriptors again here because the phy driver
  112. * might want to grab them, too.
  113. */
  114. gpio = gpiod_get_optional(&pdev->dev, "cs", GPIOD_OUT_LOW);
  115. if (IS_ERR(gpio))
  116. return PTR_ERR(gpio);
  117. gpiod_set_value_cansleep(gpio, 1);
  118. gpiod_put(gpio);
  119. gpio = gpiod_get_optional(&pdev->dev, "reset", GPIOD_OUT_LOW);
  120. if (IS_ERR(gpio))
  121. return PTR_ERR(gpio);
  122. if (gpio) {
  123. gpiod_set_value_cansleep(gpio, 1);
  124. gpiod_put(gpio);
  125. usleep_range(10000, 11000);
  126. }
  127. }
  128. }
  129. return 0;
  130. }
  131. #ifdef CONFIG_PM
  132. static void dwc3_pci_resume_work(struct work_struct *work)
  133. {
  134. struct dwc3_pci *dwc = container_of(work, struct dwc3_pci, wakeup_work);
  135. struct platform_device *dwc3 = dwc->dwc3;
  136. int ret;
  137. ret = pm_runtime_get_sync(&dwc3->dev);
  138. if (ret)
  139. return;
  140. pm_runtime_mark_last_busy(&dwc3->dev);
  141. pm_runtime_put_sync_autosuspend(&dwc3->dev);
  142. }
  143. #endif
  144. static int dwc3_pci_probe(struct pci_dev *pci,
  145. const struct pci_device_id *id)
  146. {
  147. struct dwc3_pci *dwc;
  148. struct resource res[2];
  149. int ret;
  150. struct device *dev = &pci->dev;
  151. ret = pcim_enable_device(pci);
  152. if (ret) {
  153. dev_err(dev, "failed to enable pci device\n");
  154. return -ENODEV;
  155. }
  156. pci_set_master(pci);
  157. dwc = devm_kzalloc(dev, sizeof(*dwc), GFP_KERNEL);
  158. if (!dwc)
  159. return -ENOMEM;
  160. dwc->dwc3 = platform_device_alloc("dwc3", PLATFORM_DEVID_AUTO);
  161. if (!dwc->dwc3)
  162. return -ENOMEM;
  163. memset(res, 0x00, sizeof(struct resource) * ARRAY_SIZE(res));
  164. res[0].start = pci_resource_start(pci, 0);
  165. res[0].end = pci_resource_end(pci, 0);
  166. res[0].name = "dwc_usb3";
  167. res[0].flags = IORESOURCE_MEM;
  168. res[1].start = pci->irq;
  169. res[1].name = "dwc_usb3";
  170. res[1].flags = IORESOURCE_IRQ;
  171. ret = platform_device_add_resources(dwc->dwc3, res, ARRAY_SIZE(res));
  172. if (ret) {
  173. dev_err(dev, "couldn't add resources to dwc3 device\n");
  174. goto err;
  175. }
  176. dwc->pci = pci;
  177. dwc->dwc3->dev.parent = dev;
  178. ACPI_COMPANION_SET(&dwc->dwc3->dev, ACPI_COMPANION(dev));
  179. ret = dwc3_pci_quirks(dwc);
  180. if (ret)
  181. goto err;
  182. ret = platform_device_add(dwc->dwc3);
  183. if (ret) {
  184. dev_err(dev, "failed to register dwc3 device\n");
  185. goto err;
  186. }
  187. device_init_wakeup(dev, true);
  188. pci_set_drvdata(pci, dwc);
  189. pm_runtime_put(dev);
  190. #ifdef CONFIG_PM
  191. INIT_WORK(&dwc->wakeup_work, dwc3_pci_resume_work);
  192. #endif
  193. return 0;
  194. err:
  195. platform_device_put(dwc->dwc3);
  196. return ret;
  197. }
  198. static void dwc3_pci_remove(struct pci_dev *pci)
  199. {
  200. struct dwc3_pci *dwc = pci_get_drvdata(pci);
  201. #ifdef CONFIG_PM
  202. cancel_work_sync(&dwc->wakeup_work);
  203. #endif
  204. device_init_wakeup(&pci->dev, false);
  205. pm_runtime_get(&pci->dev);
  206. platform_device_unregister(dwc->dwc3);
  207. }
  208. static const struct pci_device_id dwc3_pci_id_table[] = {
  209. { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_BSW), },
  210. { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_BYT), },
  211. { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_MRFLD), },
  212. { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_SPTLP), },
  213. { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_SPTH), },
  214. { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_BXT), },
  215. { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_BXT_M), },
  216. { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_APL), },
  217. { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_KBP), },
  218. { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_GLK), },
  219. { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_CNPLP), },
  220. { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_CNPH), },
  221. { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICLLP), },
  222. { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_NL_USB), },
  223. { } /* Terminating Entry */
  224. };
  225. MODULE_DEVICE_TABLE(pci, dwc3_pci_id_table);
  226. #if defined(CONFIG_PM) || defined(CONFIG_PM_SLEEP)
  227. static int dwc3_pci_dsm(struct dwc3_pci *dwc, int param)
  228. {
  229. union acpi_object *obj;
  230. union acpi_object tmp;
  231. union acpi_object argv4 = ACPI_INIT_DSM_ARGV4(1, &tmp);
  232. if (!dwc->has_dsm_for_pm)
  233. return 0;
  234. tmp.type = ACPI_TYPE_INTEGER;
  235. tmp.integer.value = param;
  236. obj = acpi_evaluate_dsm(ACPI_HANDLE(&dwc->pci->dev), &dwc->guid,
  237. 1, PCI_INTEL_BXT_FUNC_PMU_PWR, &argv4);
  238. if (!obj) {
  239. dev_err(&dwc->pci->dev, "failed to evaluate _DSM\n");
  240. return -EIO;
  241. }
  242. ACPI_FREE(obj);
  243. return 0;
  244. }
  245. #endif /* CONFIG_PM || CONFIG_PM_SLEEP */
  246. #ifdef CONFIG_PM
  247. static int dwc3_pci_runtime_suspend(struct device *dev)
  248. {
  249. struct dwc3_pci *dwc = dev_get_drvdata(dev);
  250. if (device_can_wakeup(dev))
  251. return dwc3_pci_dsm(dwc, PCI_INTEL_BXT_STATE_D3);
  252. return -EBUSY;
  253. }
  254. static int dwc3_pci_runtime_resume(struct device *dev)
  255. {
  256. struct dwc3_pci *dwc = dev_get_drvdata(dev);
  257. int ret;
  258. ret = dwc3_pci_dsm(dwc, PCI_INTEL_BXT_STATE_D0);
  259. if (ret)
  260. return ret;
  261. queue_work(pm_wq, &dwc->wakeup_work);
  262. return 0;
  263. }
  264. #endif /* CONFIG_PM */
  265. #ifdef CONFIG_PM_SLEEP
  266. static int dwc3_pci_suspend(struct device *dev)
  267. {
  268. struct dwc3_pci *dwc = dev_get_drvdata(dev);
  269. return dwc3_pci_dsm(dwc, PCI_INTEL_BXT_STATE_D3);
  270. }
  271. static int dwc3_pci_resume(struct device *dev)
  272. {
  273. struct dwc3_pci *dwc = dev_get_drvdata(dev);
  274. return dwc3_pci_dsm(dwc, PCI_INTEL_BXT_STATE_D0);
  275. }
  276. #endif /* CONFIG_PM_SLEEP */
  277. static const struct dev_pm_ops dwc3_pci_dev_pm_ops = {
  278. SET_SYSTEM_SLEEP_PM_OPS(dwc3_pci_suspend, dwc3_pci_resume)
  279. SET_RUNTIME_PM_OPS(dwc3_pci_runtime_suspend, dwc3_pci_runtime_resume,
  280. NULL)
  281. };
  282. static struct pci_driver dwc3_pci_driver = {
  283. .name = "dwc3-pci",
  284. .id_table = dwc3_pci_id_table,
  285. .probe = dwc3_pci_probe,
  286. .remove = dwc3_pci_remove,
  287. .driver = {
  288. .pm = &dwc3_pci_dev_pm_ops,
  289. }
  290. };
  291. MODULE_AUTHOR("Felipe Balbi <balbi@ti.com>");
  292. MODULE_LICENSE("GPL v2");
  293. MODULE_DESCRIPTION("DesignWare USB3 PCI Glue Layer");
  294. module_pci_driver(dwc3_pci_driver);