logicpd-torpedo-som.dtsi 6.9 KB

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  1. /*
  2. * This program is free software; you can redistribute it and/or modify
  3. * it under the terms of the GNU General Public License version 2 as
  4. * published by the Free Software Foundation.
  5. */
  6. #include <dt-bindings/input/input.h>
  7. / {
  8. cpus {
  9. cpu@0 {
  10. cpu0-supply = <&vcc>;
  11. };
  12. };
  13. memory@80000000 {
  14. device_type = "memory";
  15. reg = <0x80000000 0>;
  16. };
  17. leds {
  18. compatible = "gpio-leds";
  19. user0 {
  20. label = "user0";
  21. gpios = <&twl_gpio 18 GPIO_ACTIVE_LOW>; /* LEDA */
  22. linux,default-trigger = "none";
  23. };
  24. };
  25. wl12xx_vmmc: wl12xx_vmmc {
  26. compatible = "regulator-fixed";
  27. regulator-name = "vwl1271";
  28. regulator-min-microvolt = <1800000>;
  29. regulator-max-microvolt = <1800000>;
  30. gpio = <&gpio5 29 0>; /* gpio157 */
  31. startup-delay-us = <70000>;
  32. enable-active-high;
  33. vin-supply = <&vmmc2>;
  34. };
  35. };
  36. &gpmc {
  37. ranges = <0 0 0x30000000 0x1000000>; /* CS0: 16MB for NAND */
  38. nand@0,0 {
  39. compatible = "ti,omap2-nand";
  40. reg = <0 0 4>; /* CS0, offset 0, IO size 4 */
  41. interrupt-parent = <&gpmc>;
  42. interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */
  43. <1 IRQ_TYPE_NONE>; /* termcount */
  44. linux,mtd-name = "micron,mt29f4g16abbda3w";
  45. nand-bus-width = <16>;
  46. ti,nand-ecc-opt = "bch8";
  47. rb-gpios = <&gpmc 0 GPIO_ACTIVE_HIGH>; /* gpmc_wait0 */
  48. gpmc,sync-clk-ps = <0>;
  49. gpmc,cs-on-ns = <0>;
  50. gpmc,cs-rd-off-ns = <44>;
  51. gpmc,cs-wr-off-ns = <44>;
  52. gpmc,adv-on-ns = <6>;
  53. gpmc,adv-rd-off-ns = <34>;
  54. gpmc,adv-wr-off-ns = <44>;
  55. gpmc,we-off-ns = <40>;
  56. gpmc,oe-off-ns = <54>;
  57. gpmc,access-ns = <64>;
  58. gpmc,rd-cycle-ns = <82>;
  59. gpmc,wr-cycle-ns = <82>;
  60. gpmc,wr-access-ns = <40>;
  61. gpmc,wr-data-mux-bus-ns = <0>;
  62. gpmc,device-width = <2>;
  63. #address-cells = <1>;
  64. #size-cells = <1>;
  65. /* u-boot uses mtdparts=omap2-nand.0:512k(x-loader),1920k(u-boot),128k(u-boot-env),4m(kernel),-(fs) */
  66. x-loader@0 {
  67. label = "x-loader";
  68. reg = <0 0x80000>;
  69. };
  70. bootloaders@80000 {
  71. label = "u-boot";
  72. reg = <0x80000 0x1e0000>;
  73. };
  74. bootloaders_env@260000 {
  75. label = "u-boot-env";
  76. reg = <0x260000 0x20000>;
  77. };
  78. kernel@280000 {
  79. label = "kernel";
  80. reg = <0x280000 0x400000>;
  81. };
  82. filesystem@680000 {
  83. label = "fs";
  84. reg = <0x680000 0>; /* 0 = MTDPART_SIZ_FULL */
  85. };
  86. };
  87. };
  88. &i2c1 {
  89. clock-frequency = <2600000>;
  90. twl: twl@48 {
  91. reg = <0x48>;
  92. interrupts = <7>; /* SYS_NIRQ cascaded to intc */
  93. interrupt-parent = <&intc>;
  94. twl_audio: audio {
  95. compatible = "ti,twl4030-audio";
  96. codec {
  97. };
  98. };
  99. };
  100. };
  101. &i2c2 {
  102. clock-frequency = <400000>;
  103. };
  104. &i2c3 {
  105. clock-frequency = <400000>;
  106. at24@50 {
  107. compatible = "atmel,24c64";
  108. readonly;
  109. reg = <0x50>;
  110. };
  111. };
  112. /*
  113. * Only found on the wireless SOM. For the SOM without wireless, the pins for
  114. * MMC3 can be routed with jumpers to the second MMC slot on the devkit and
  115. * gpio157 is not connected. So this should be OK to keep common for now,
  116. * probably device tree overlays is the way to go with the various SOM and
  117. * jumpering combinations for the long run.
  118. */
  119. &mmc3 {
  120. interrupts-extended = <&intc 94 &omap3_pmx_core2 0x46>;
  121. pinctrl-0 = <&mmc3_pins &mmc3_core2_pins>;
  122. pinctrl-names = "default";
  123. vmmc-supply = <&wl12xx_vmmc>;
  124. non-removable;
  125. bus-width = <4>;
  126. cap-power-off-card;
  127. #address-cells = <1>;
  128. #size-cells = <0>;
  129. wlcore: wlcore@2 {
  130. compatible = "ti,wl1283";
  131. reg = <2>;
  132. interrupt-parent = <&gpio5>;
  133. interrupts = <24 IRQ_TYPE_LEVEL_HIGH>; /* gpio 152 */
  134. ref-clock-frequency = <26000000>;
  135. tcxo-clock-frequency = <26000000>;
  136. };
  137. };
  138. &omap3_pmx_core {
  139. mmc3_pins: pinmux_mm3_pins {
  140. pinctrl-single,pins = <
  141. OMAP3_CORE1_IOPAD(0x2164, PIN_INPUT_PULLUP | MUX_MODE3) /* sdmmc2_dat4.sdmmc3_dat0 */
  142. OMAP3_CORE1_IOPAD(0x2166, PIN_INPUT_PULLUP | MUX_MODE3) /* sdmmc2_dat5.sdmmc3_dat1 */
  143. OMAP3_CORE1_IOPAD(0x2168, PIN_INPUT_PULLUP | MUX_MODE3) /* sdmmc2_dat6.sdmmc3_dat2 */
  144. OMAP3_CORE1_IOPAD(0x216a, PIN_INPUT_PULLUP | MUX_MODE3) /* sdmmc2_dat6.sdmmc3_dat3 */
  145. OMAP3_CORE1_IOPAD(0x2184, PIN_INPUT_PULLUP | MUX_MODE4) /* mcbsp4_clkx.gpio_152 */
  146. OMAP3_CORE1_IOPAD(0x218e, PIN_OUTPUT | MUX_MODE4) /* mcbsp1_fsr.gpio_157 */
  147. >;
  148. };
  149. mcbsp2_pins: pinmux_mcbsp2_pins {
  150. pinctrl-single,pins = <
  151. OMAP3_CORE1_IOPAD(0x213c, PIN_INPUT | MUX_MODE0) /* mcbsp2_fsx */
  152. OMAP3_CORE1_IOPAD(0x213e, PIN_INPUT | MUX_MODE0) /* mcbsp2_clkx */
  153. OMAP3_CORE1_IOPAD(0x2140, PIN_INPUT | MUX_MODE0) /* mcbsp2_dr */
  154. OMAP3_CORE1_IOPAD(0x2142, PIN_OUTPUT | MUX_MODE0) /* mcbsp2_dx */
  155. >;
  156. };
  157. uart2_pins: pinmux_uart2_pins {
  158. pinctrl-single,pins = <
  159. OMAP3_CORE1_IOPAD(0x2174, PIN_INPUT | MUX_MODE0) /* uart2_cts.uart2_cts */
  160. OMAP3_CORE1_IOPAD(0x2176, PIN_OUTPUT | MUX_MODE0) /* uart2_rts .uart2_rts*/
  161. OMAP3_CORE1_IOPAD(0x2178, PIN_OUTPUT | MUX_MODE0) /* uart2_tx.uart2_tx */
  162. OMAP3_CORE1_IOPAD(0x217a, PIN_INPUT | MUX_MODE0) /* uart2_rx.uart2_rx */
  163. OMAP3_CORE1_IOPAD(0x2198, PIN_OUTPUT | MUX_MODE4) /* GPIO_162,BT_EN */
  164. >;
  165. };
  166. mcspi1_pins: pinmux_mcspi1_pins {
  167. pinctrl-single,pins = <
  168. OMAP3_CORE1_IOPAD(0x21c8, PIN_INPUT | MUX_MODE0) /* mcspi1_clk.mcspi1_clk */
  169. OMAP3_CORE1_IOPAD(0x21ca, PIN_OUTPUT | MUX_MODE0) /* mcspi1_simo.mcspi1_simo */
  170. OMAP3_CORE1_IOPAD(0x21cc, PIN_INPUT_PULLUP | MUX_MODE0) /* mcspi1_somi.mcspi1_somi */
  171. OMAP3_CORE1_IOPAD(0x21ce, PIN_OUTPUT | MUX_MODE0) /* mcspi1_cs0.mcspi1_cs0 */
  172. >;
  173. };
  174. hsusb_otg_pins: pinmux_hsusb_otg_pins {
  175. pinctrl-single,pins = <
  176. OMAP3_CORE1_IOPAD(0x21a2, PIN_INPUT | MUX_MODE0) /* hsusb0_clk.hsusb0_clk */
  177. OMAP3_CORE1_IOPAD(0x21a4, PIN_OUTPUT | MUX_MODE0) /* hsusb0_stp.hsusb0_stp */
  178. OMAP3_CORE1_IOPAD(0x21a6, PIN_INPUT | MUX_MODE0) /* hsusb0_dir.hsusb0_dir */
  179. OMAP3_CORE1_IOPAD(0x21a8, PIN_INPUT | MUX_MODE0) /* hsusb0_nxt.hsusb0_nxt */
  180. OMAP3_CORE1_IOPAD(0x21aa, PIN_INPUT | MUX_MODE0) /* hsusb0_data0.hsusb0_data0 */
  181. OMAP3_CORE1_IOPAD(0x21ac, PIN_INPUT | MUX_MODE0) /* hsusb0_data1.hsusb0_data1 */
  182. OMAP3_CORE1_IOPAD(0x21ae, PIN_INPUT | MUX_MODE0) /* hsusb0_data2.hsusb0_data2 */
  183. OMAP3_CORE1_IOPAD(0x21b0, PIN_INPUT | MUX_MODE0) /* hsusb0_data3.hsusb0_data3 */
  184. OMAP3_CORE1_IOPAD(0x21b2, PIN_INPUT | MUX_MODE0) /* hsusb0_data4.hsusb0_data4 */
  185. OMAP3_CORE1_IOPAD(0x21b4, PIN_INPUT | MUX_MODE0) /* hsusb0_data5.hsusb0_data5 */
  186. OMAP3_CORE1_IOPAD(0x21b6, PIN_INPUT | MUX_MODE0) /* hsusb0_data6.hsusb0_data6 */
  187. OMAP3_CORE1_IOPAD(0x21b8, PIN_INPUT | MUX_MODE0) /* hsusb0_data7.hsusb0_data7 */
  188. >;
  189. };
  190. };
  191. &uart2 {
  192. interrupts-extended = <&intc 73 &omap3_pmx_core OMAP3_UART2_RX>;
  193. pinctrl-names = "default";
  194. pinctrl-0 = <&uart2_pins>;
  195. };
  196. &mcspi1 {
  197. pinctrl-names = "default";
  198. pinctrl-0 = <&mcspi1_pins>;
  199. };
  200. &omap3_pmx_core2 {
  201. mmc3_core2_pins: pinmux_mmc3_core2_pins {
  202. pinctrl-single,pins = <
  203. OMAP3630_CORE2_IOPAD(0x25d8, PIN_INPUT_PULLUP | MUX_MODE2) /* etk_clk.sdmmc3_clk */
  204. OMAP3630_CORE2_IOPAD(0x25da, PIN_INPUT_PULLUP | MUX_MODE2) /* etk_ctl.sdmmc3_cmd */
  205. >;
  206. };
  207. };
  208. #include "twl4030.dtsi"
  209. #include "twl4030_omap3.dtsi"
  210. &twl {
  211. twl_power: power {
  212. compatible = "ti,twl4030-power-idle-osc-off", "ti,twl4030-power-idle";
  213. ti,use_poweroff;
  214. };
  215. };
  216. &twl_gpio {
  217. ti,use-leds;
  218. };