intel_dp_mst.c 16 KB

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  1. /*
  2. * Copyright © 2008 Intel Corporation
  3. * 2014 Red Hat Inc.
  4. *
  5. * Permission is hereby granted, free of charge, to any person obtaining a
  6. * copy of this software and associated documentation files (the "Software"),
  7. * to deal in the Software without restriction, including without limitation
  8. * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  9. * and/or sell copies of the Software, and to permit persons to whom the
  10. * Software is furnished to do so, subject to the following conditions:
  11. *
  12. * The above copyright notice and this permission notice (including the next
  13. * paragraph) shall be included in all copies or substantial portions of the
  14. * Software.
  15. *
  16. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18. * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  19. * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  20. * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  21. * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  22. * IN THE SOFTWARE.
  23. *
  24. */
  25. #include <drm/drmP.h>
  26. #include "i915_drv.h"
  27. #include "intel_drv.h"
  28. #include <drm/drm_atomic_helper.h>
  29. #include <drm/drm_crtc_helper.h>
  30. #include <drm/drm_edid.h>
  31. static bool intel_dp_mst_compute_config(struct intel_encoder *encoder,
  32. struct intel_crtc_state *pipe_config)
  33. {
  34. struct intel_dp_mst_encoder *intel_mst = enc_to_mst(&encoder->base);
  35. struct intel_digital_port *intel_dig_port = intel_mst->primary;
  36. struct intel_dp *intel_dp = &intel_dig_port->dp;
  37. struct drm_device *dev = encoder->base.dev;
  38. int bpp;
  39. int lane_count, slots;
  40. struct drm_display_mode *adjusted_mode = &pipe_config->base.adjusted_mode;
  41. struct intel_connector *found = NULL, *intel_connector;
  42. int mst_pbn;
  43. pipe_config->dp_encoder_is_mst = true;
  44. pipe_config->has_pch_encoder = false;
  45. pipe_config->has_dp_encoder = true;
  46. bpp = 24;
  47. /*
  48. * for MST we always configure max link bw - the spec doesn't
  49. * seem to suggest we should do otherwise.
  50. */
  51. lane_count = drm_dp_max_lane_count(intel_dp->dpcd);
  52. intel_dp->link_bw = intel_dp_max_link_bw(intel_dp);
  53. intel_dp->lane_count = lane_count;
  54. pipe_config->pipe_bpp = 24;
  55. pipe_config->port_clock = drm_dp_bw_code_to_link_rate(intel_dp->link_bw);
  56. for_each_intel_connector(dev, intel_connector) {
  57. if (intel_connector->new_encoder == encoder) {
  58. found = intel_connector;
  59. break;
  60. }
  61. }
  62. if (!found) {
  63. DRM_ERROR("can't find connector\n");
  64. return false;
  65. }
  66. mst_pbn = drm_dp_calc_pbn_mode(adjusted_mode->clock, bpp);
  67. pipe_config->pbn = mst_pbn;
  68. slots = drm_dp_find_vcpi_slots(&intel_dp->mst_mgr, mst_pbn);
  69. intel_link_compute_m_n(bpp, lane_count,
  70. adjusted_mode->crtc_clock,
  71. pipe_config->port_clock,
  72. &pipe_config->dp_m_n);
  73. pipe_config->dp_m_n.tu = slots;
  74. return true;
  75. }
  76. static void intel_mst_disable_dp(struct intel_encoder *encoder)
  77. {
  78. struct intel_dp_mst_encoder *intel_mst = enc_to_mst(&encoder->base);
  79. struct intel_digital_port *intel_dig_port = intel_mst->primary;
  80. struct intel_dp *intel_dp = &intel_dig_port->dp;
  81. int ret;
  82. DRM_DEBUG_KMS("%d\n", intel_dp->active_mst_links);
  83. drm_dp_mst_reset_vcpi_slots(&intel_dp->mst_mgr, intel_mst->port);
  84. ret = drm_dp_update_payload_part1(&intel_dp->mst_mgr);
  85. if (ret) {
  86. DRM_ERROR("failed to update payload %d\n", ret);
  87. }
  88. }
  89. static void intel_mst_post_disable_dp(struct intel_encoder *encoder)
  90. {
  91. struct intel_dp_mst_encoder *intel_mst = enc_to_mst(&encoder->base);
  92. struct intel_digital_port *intel_dig_port = intel_mst->primary;
  93. struct intel_dp *intel_dp = &intel_dig_port->dp;
  94. DRM_DEBUG_KMS("%d\n", intel_dp->active_mst_links);
  95. /* this can fail */
  96. drm_dp_check_act_status(&intel_dp->mst_mgr);
  97. /* and this can also fail */
  98. drm_dp_update_payload_part2(&intel_dp->mst_mgr);
  99. drm_dp_mst_deallocate_vcpi(&intel_dp->mst_mgr, intel_mst->port);
  100. intel_dp->active_mst_links--;
  101. intel_mst->port = NULL;
  102. if (intel_dp->active_mst_links == 0) {
  103. intel_dig_port->base.post_disable(&intel_dig_port->base);
  104. intel_dp_sink_dpms(intel_dp, DRM_MODE_DPMS_OFF);
  105. }
  106. }
  107. static void intel_mst_pre_enable_dp(struct intel_encoder *encoder)
  108. {
  109. struct intel_dp_mst_encoder *intel_mst = enc_to_mst(&encoder->base);
  110. struct intel_digital_port *intel_dig_port = intel_mst->primary;
  111. struct intel_dp *intel_dp = &intel_dig_port->dp;
  112. struct drm_device *dev = encoder->base.dev;
  113. struct drm_i915_private *dev_priv = dev->dev_private;
  114. enum port port = intel_dig_port->port;
  115. int ret;
  116. uint32_t temp;
  117. struct intel_connector *found = NULL, *intel_connector;
  118. int slots;
  119. struct drm_crtc *crtc = encoder->base.crtc;
  120. struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
  121. for_each_intel_connector(dev, intel_connector) {
  122. if (intel_connector->new_encoder == encoder) {
  123. found = intel_connector;
  124. break;
  125. }
  126. }
  127. if (!found) {
  128. DRM_ERROR("can't find connector\n");
  129. return;
  130. }
  131. DRM_DEBUG_KMS("%d\n", intel_dp->active_mst_links);
  132. intel_mst->port = found->port;
  133. if (intel_dp->active_mst_links == 0) {
  134. enum port port = intel_ddi_get_encoder_port(encoder);
  135. I915_WRITE(PORT_CLK_SEL(port),
  136. intel_crtc->config->ddi_pll_sel);
  137. intel_ddi_init_dp_buf_reg(&intel_dig_port->base);
  138. intel_dp_sink_dpms(intel_dp, DRM_MODE_DPMS_ON);
  139. intel_dp_start_link_train(intel_dp);
  140. intel_dp_complete_link_train(intel_dp);
  141. intel_dp_stop_link_train(intel_dp);
  142. }
  143. ret = drm_dp_mst_allocate_vcpi(&intel_dp->mst_mgr,
  144. intel_mst->port,
  145. intel_crtc->config->pbn, &slots);
  146. if (ret == false) {
  147. DRM_ERROR("failed to allocate vcpi\n");
  148. return;
  149. }
  150. intel_dp->active_mst_links++;
  151. temp = I915_READ(DP_TP_STATUS(port));
  152. I915_WRITE(DP_TP_STATUS(port), temp);
  153. ret = drm_dp_update_payload_part1(&intel_dp->mst_mgr);
  154. }
  155. static void intel_mst_enable_dp(struct intel_encoder *encoder)
  156. {
  157. struct intel_dp_mst_encoder *intel_mst = enc_to_mst(&encoder->base);
  158. struct intel_digital_port *intel_dig_port = intel_mst->primary;
  159. struct intel_dp *intel_dp = &intel_dig_port->dp;
  160. struct drm_device *dev = intel_dig_port->base.base.dev;
  161. struct drm_i915_private *dev_priv = dev->dev_private;
  162. enum port port = intel_dig_port->port;
  163. int ret;
  164. DRM_DEBUG_KMS("%d\n", intel_dp->active_mst_links);
  165. if (wait_for((I915_READ(DP_TP_STATUS(port)) & DP_TP_STATUS_ACT_SENT),
  166. 1))
  167. DRM_ERROR("Timed out waiting for ACT sent\n");
  168. ret = drm_dp_check_act_status(&intel_dp->mst_mgr);
  169. ret = drm_dp_update_payload_part2(&intel_dp->mst_mgr);
  170. }
  171. static bool intel_dp_mst_enc_get_hw_state(struct intel_encoder *encoder,
  172. enum pipe *pipe)
  173. {
  174. struct intel_dp_mst_encoder *intel_mst = enc_to_mst(&encoder->base);
  175. *pipe = intel_mst->pipe;
  176. if (intel_mst->port)
  177. return true;
  178. return false;
  179. }
  180. static void intel_dp_mst_enc_get_config(struct intel_encoder *encoder,
  181. struct intel_crtc_state *pipe_config)
  182. {
  183. struct intel_dp_mst_encoder *intel_mst = enc_to_mst(&encoder->base);
  184. struct intel_digital_port *intel_dig_port = intel_mst->primary;
  185. struct intel_crtc *crtc = to_intel_crtc(encoder->base.crtc);
  186. struct drm_device *dev = encoder->base.dev;
  187. struct drm_i915_private *dev_priv = dev->dev_private;
  188. enum transcoder cpu_transcoder = pipe_config->cpu_transcoder;
  189. u32 temp, flags = 0;
  190. pipe_config->has_dp_encoder = true;
  191. temp = I915_READ(TRANS_DDI_FUNC_CTL(cpu_transcoder));
  192. if (temp & TRANS_DDI_PHSYNC)
  193. flags |= DRM_MODE_FLAG_PHSYNC;
  194. else
  195. flags |= DRM_MODE_FLAG_NHSYNC;
  196. if (temp & TRANS_DDI_PVSYNC)
  197. flags |= DRM_MODE_FLAG_PVSYNC;
  198. else
  199. flags |= DRM_MODE_FLAG_NVSYNC;
  200. switch (temp & TRANS_DDI_BPC_MASK) {
  201. case TRANS_DDI_BPC_6:
  202. pipe_config->pipe_bpp = 18;
  203. break;
  204. case TRANS_DDI_BPC_8:
  205. pipe_config->pipe_bpp = 24;
  206. break;
  207. case TRANS_DDI_BPC_10:
  208. pipe_config->pipe_bpp = 30;
  209. break;
  210. case TRANS_DDI_BPC_12:
  211. pipe_config->pipe_bpp = 36;
  212. break;
  213. default:
  214. break;
  215. }
  216. pipe_config->base.adjusted_mode.flags |= flags;
  217. intel_dp_get_m_n(crtc, pipe_config);
  218. intel_ddi_clock_get(&intel_dig_port->base, pipe_config);
  219. }
  220. static int intel_dp_mst_get_ddc_modes(struct drm_connector *connector)
  221. {
  222. struct intel_connector *intel_connector = to_intel_connector(connector);
  223. struct intel_dp *intel_dp = intel_connector->mst_port;
  224. struct edid *edid;
  225. int ret;
  226. edid = drm_dp_mst_get_edid(connector, &intel_dp->mst_mgr, intel_connector->port);
  227. if (!edid)
  228. return 0;
  229. ret = intel_connector_update_modes(connector, edid);
  230. kfree(edid);
  231. return ret;
  232. }
  233. static enum drm_connector_status
  234. intel_dp_mst_detect(struct drm_connector *connector, bool force)
  235. {
  236. struct intel_connector *intel_connector = to_intel_connector(connector);
  237. struct intel_dp *intel_dp = intel_connector->mst_port;
  238. return drm_dp_mst_detect_port(connector, &intel_dp->mst_mgr, intel_connector->port);
  239. }
  240. static int
  241. intel_dp_mst_set_property(struct drm_connector *connector,
  242. struct drm_property *property,
  243. uint64_t val)
  244. {
  245. return 0;
  246. }
  247. static void
  248. intel_dp_mst_connector_destroy(struct drm_connector *connector)
  249. {
  250. struct intel_connector *intel_connector = to_intel_connector(connector);
  251. if (!IS_ERR_OR_NULL(intel_connector->edid))
  252. kfree(intel_connector->edid);
  253. drm_connector_cleanup(connector);
  254. kfree(connector);
  255. }
  256. static const struct drm_connector_funcs intel_dp_mst_connector_funcs = {
  257. .dpms = intel_connector_dpms,
  258. .detect = intel_dp_mst_detect,
  259. .fill_modes = drm_helper_probe_single_connector_modes,
  260. .set_property = intel_dp_mst_set_property,
  261. .atomic_get_property = intel_connector_atomic_get_property,
  262. .destroy = intel_dp_mst_connector_destroy,
  263. .atomic_destroy_state = drm_atomic_helper_connector_destroy_state,
  264. };
  265. static int intel_dp_mst_get_modes(struct drm_connector *connector)
  266. {
  267. return intel_dp_mst_get_ddc_modes(connector);
  268. }
  269. static enum drm_mode_status
  270. intel_dp_mst_mode_valid(struct drm_connector *connector,
  271. struct drm_display_mode *mode)
  272. {
  273. /* TODO - validate mode against available PBN for link */
  274. if (mode->clock < 10000)
  275. return MODE_CLOCK_LOW;
  276. if (mode->flags & DRM_MODE_FLAG_DBLCLK)
  277. return MODE_H_ILLEGAL;
  278. return MODE_OK;
  279. }
  280. static struct drm_encoder *intel_mst_best_encoder(struct drm_connector *connector)
  281. {
  282. struct intel_connector *intel_connector = to_intel_connector(connector);
  283. struct intel_dp *intel_dp = intel_connector->mst_port;
  284. return &intel_dp->mst_encoders[0]->base.base;
  285. }
  286. static const struct drm_connector_helper_funcs intel_dp_mst_connector_helper_funcs = {
  287. .get_modes = intel_dp_mst_get_modes,
  288. .mode_valid = intel_dp_mst_mode_valid,
  289. .best_encoder = intel_mst_best_encoder,
  290. };
  291. static void intel_dp_mst_encoder_destroy(struct drm_encoder *encoder)
  292. {
  293. struct intel_dp_mst_encoder *intel_mst = enc_to_mst(encoder);
  294. drm_encoder_cleanup(encoder);
  295. kfree(intel_mst);
  296. }
  297. static const struct drm_encoder_funcs intel_dp_mst_enc_funcs = {
  298. .destroy = intel_dp_mst_encoder_destroy,
  299. };
  300. static bool intel_dp_mst_get_hw_state(struct intel_connector *connector)
  301. {
  302. if (connector->encoder) {
  303. enum pipe pipe;
  304. if (!connector->encoder->get_hw_state(connector->encoder, &pipe))
  305. return false;
  306. return true;
  307. }
  308. return false;
  309. }
  310. static void intel_connector_add_to_fbdev(struct intel_connector *connector)
  311. {
  312. #ifdef CONFIG_DRM_I915_FBDEV
  313. struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
  314. drm_fb_helper_add_one_connector(&dev_priv->fbdev->helper, &connector->base);
  315. #endif
  316. }
  317. static void intel_connector_remove_from_fbdev(struct intel_connector *connector)
  318. {
  319. #ifdef CONFIG_DRM_I915_FBDEV
  320. struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
  321. drm_fb_helper_remove_one_connector(&dev_priv->fbdev->helper, &connector->base);
  322. #endif
  323. }
  324. static struct drm_connector *intel_dp_add_mst_connector(struct drm_dp_mst_topology_mgr *mgr, struct drm_dp_mst_port *port, const char *pathprop)
  325. {
  326. struct intel_dp *intel_dp = container_of(mgr, struct intel_dp, mst_mgr);
  327. struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp);
  328. struct drm_device *dev = intel_dig_port->base.base.dev;
  329. struct intel_connector *intel_connector;
  330. struct drm_connector *connector;
  331. int i;
  332. intel_connector = kzalloc(sizeof(*intel_connector), GFP_KERNEL);
  333. if (!intel_connector)
  334. return NULL;
  335. connector = &intel_connector->base;
  336. drm_connector_init(dev, connector, &intel_dp_mst_connector_funcs, DRM_MODE_CONNECTOR_DisplayPort);
  337. drm_connector_helper_add(connector, &intel_dp_mst_connector_helper_funcs);
  338. intel_connector->unregister = intel_connector_unregister;
  339. intel_connector->get_hw_state = intel_dp_mst_get_hw_state;
  340. intel_connector->mst_port = intel_dp;
  341. intel_connector->port = port;
  342. for (i = PIPE_A; i <= PIPE_C; i++) {
  343. drm_mode_connector_attach_encoder(&intel_connector->base,
  344. &intel_dp->mst_encoders[i]->base.base);
  345. }
  346. intel_dp_add_properties(intel_dp, connector);
  347. drm_object_attach_property(&connector->base, dev->mode_config.path_property, 0);
  348. drm_object_attach_property(&connector->base, dev->mode_config.tile_property, 0);
  349. drm_mode_connector_set_path_property(connector, pathprop);
  350. drm_reinit_primary_mode_group(dev);
  351. mutex_lock(&dev->mode_config.mutex);
  352. intel_connector_add_to_fbdev(intel_connector);
  353. mutex_unlock(&dev->mode_config.mutex);
  354. drm_connector_register(&intel_connector->base);
  355. return connector;
  356. }
  357. static void intel_dp_destroy_mst_connector(struct drm_dp_mst_topology_mgr *mgr,
  358. struct drm_connector *connector)
  359. {
  360. struct intel_connector *intel_connector = to_intel_connector(connector);
  361. struct drm_device *dev = connector->dev;
  362. /* need to nuke the connector */
  363. mutex_lock(&dev->mode_config.mutex);
  364. intel_connector_dpms(connector, DRM_MODE_DPMS_OFF);
  365. mutex_unlock(&dev->mode_config.mutex);
  366. intel_connector->unregister(intel_connector);
  367. mutex_lock(&dev->mode_config.mutex);
  368. intel_connector_remove_from_fbdev(intel_connector);
  369. drm_connector_cleanup(connector);
  370. mutex_unlock(&dev->mode_config.mutex);
  371. drm_reinit_primary_mode_group(dev);
  372. kfree(intel_connector);
  373. DRM_DEBUG_KMS("\n");
  374. }
  375. static void intel_dp_mst_hotplug(struct drm_dp_mst_topology_mgr *mgr)
  376. {
  377. struct intel_dp *intel_dp = container_of(mgr, struct intel_dp, mst_mgr);
  378. struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp);
  379. struct drm_device *dev = intel_dig_port->base.base.dev;
  380. drm_kms_helper_hotplug_event(dev);
  381. }
  382. static struct drm_dp_mst_topology_cbs mst_cbs = {
  383. .add_connector = intel_dp_add_mst_connector,
  384. .destroy_connector = intel_dp_destroy_mst_connector,
  385. .hotplug = intel_dp_mst_hotplug,
  386. };
  387. static struct intel_dp_mst_encoder *
  388. intel_dp_create_fake_mst_encoder(struct intel_digital_port *intel_dig_port, enum pipe pipe)
  389. {
  390. struct intel_dp_mst_encoder *intel_mst;
  391. struct intel_encoder *intel_encoder;
  392. struct drm_device *dev = intel_dig_port->base.base.dev;
  393. intel_mst = kzalloc(sizeof(*intel_mst), GFP_KERNEL);
  394. if (!intel_mst)
  395. return NULL;
  396. intel_mst->pipe = pipe;
  397. intel_encoder = &intel_mst->base;
  398. intel_mst->primary = intel_dig_port;
  399. drm_encoder_init(dev, &intel_encoder->base, &intel_dp_mst_enc_funcs,
  400. DRM_MODE_ENCODER_DPMST);
  401. intel_encoder->type = INTEL_OUTPUT_DP_MST;
  402. intel_encoder->crtc_mask = 0x7;
  403. intel_encoder->cloneable = 0;
  404. intel_encoder->compute_config = intel_dp_mst_compute_config;
  405. intel_encoder->disable = intel_mst_disable_dp;
  406. intel_encoder->post_disable = intel_mst_post_disable_dp;
  407. intel_encoder->pre_enable = intel_mst_pre_enable_dp;
  408. intel_encoder->enable = intel_mst_enable_dp;
  409. intel_encoder->get_hw_state = intel_dp_mst_enc_get_hw_state;
  410. intel_encoder->get_config = intel_dp_mst_enc_get_config;
  411. return intel_mst;
  412. }
  413. static bool
  414. intel_dp_create_fake_mst_encoders(struct intel_digital_port *intel_dig_port)
  415. {
  416. int i;
  417. struct intel_dp *intel_dp = &intel_dig_port->dp;
  418. for (i = PIPE_A; i <= PIPE_C; i++)
  419. intel_dp->mst_encoders[i] = intel_dp_create_fake_mst_encoder(intel_dig_port, i);
  420. return true;
  421. }
  422. int
  423. intel_dp_mst_encoder_init(struct intel_digital_port *intel_dig_port, int conn_base_id)
  424. {
  425. struct intel_dp *intel_dp = &intel_dig_port->dp;
  426. struct drm_device *dev = intel_dig_port->base.base.dev;
  427. int ret;
  428. intel_dp->can_mst = true;
  429. intel_dp->mst_mgr.cbs = &mst_cbs;
  430. /* create encoders */
  431. intel_dp_create_fake_mst_encoders(intel_dig_port);
  432. ret = drm_dp_mst_topology_mgr_init(&intel_dp->mst_mgr, dev->dev, &intel_dp->aux, 16, 3, conn_base_id);
  433. if (ret) {
  434. intel_dp->can_mst = false;
  435. return ret;
  436. }
  437. return 0;
  438. }
  439. void
  440. intel_dp_mst_encoder_cleanup(struct intel_digital_port *intel_dig_port)
  441. {
  442. struct intel_dp *intel_dp = &intel_dig_port->dp;
  443. if (!intel_dp->can_mst)
  444. return;
  445. drm_dp_mst_topology_mgr_destroy(&intel_dp->mst_mgr);
  446. /* encoders will get killed by normal cleanup */
  447. }