drm.c 26 KB

12345678910111213141516171819202122232425262728293031323334353637383940414243444546474849505152535455565758596061626364656667686970717273747576777879808182838485868788899091929394959697989910010110210310410510610710810911011111211311411511611711811912012112212312412512612712812913013113213313413513613713813914014114214314414514614714814915015115215315415515615715815916016116216316416516616716816917017117217317417517617717817918018118218318418518618718818919019119219319419519619719819920020120220320420520620720820921021121221321421521621721821922022122222322422522622722822923023123223323423523623723823924024124224324424524624724824925025125225325425525625725825926026126226326426526626726826927027127227327427527627727827928028128228328428528628728828929029129229329429529629729829930030130230330430530630730830931031131231331431531631731831932032132232332432532632732832933033133233333433533633733833934034134234334434534634734834935035135235335435535635735835936036136236336436536636736836937037137237337437537637737837938038138238338438538638738838939039139239339439539639739839940040140240340440540640740840941041141241341441541641741841942042142242342442542642742842943043143243343443543643743843944044144244344444544644744844945045145245345445545645745845946046146246346446546646746846947047147247347447547647747847948048148248348448548648748848949049149249349449549649749849950050150250350450550650750850951051151251351451551651751851952052152252352452552652752852953053153253353453553653753853954054154254354454554654754854955055155255355455555655755855956056156256356456556656756856957057157257357457557657757857958058158258358458558658758858959059159259359459559659759859960060160260360460560660760860961061161261361461561661761861962062162262362462562662762862963063163263363463563663763863964064164264364464564664764864965065165265365465565665765865966066166266366466566666766866967067167267367467567667767867968068168268368468568668768868969069169269369469569669769869970070170270370470570670770870971071171271371471571671771871972072172272372472572672772872973073173273373473573673773873974074174274374474574674774874975075175275375475575675775875976076176276376476576676776876977077177277377477577677777877978078178278378478578678778878979079179279379479579679779879980080180280380480580680780880981081181281381481581681781881982082182282382482582682782882983083183283383483583683783883984084184284384484584684784884985085185285385485585685785885986086186286386486586686786886987087187287387487587687787887988088188288388488588688788888989089189289389489589689789889990090190290390490590690790890991091191291391491591691791891992092192292392492592692792892993093193293393493593693793893994094194294394494594694794894995095195295395495595695795895996096196296396496596696796896997097197297397497597697797897998098198298398498598698798898999099199299399499599699799899910001001100210031004100510061007100810091010101110121013101410151016101710181019102010211022102310241025102610271028102910301031103210331034103510361037103810391040104110421043104410451046104710481049105010511052105310541055105610571058105910601061106210631064106510661067106810691070107110721073107410751076107710781079108010811082108310841085108610871088108910901091109210931094109510961097109810991100110111021103110411051106
  1. /*
  2. * Copyright (C) 2012 Avionic Design GmbH
  3. * Copyright (C) 2012-2013 NVIDIA CORPORATION. All rights reserved.
  4. *
  5. * This program is free software; you can redistribute it and/or modify
  6. * it under the terms of the GNU General Public License version 2 as
  7. * published by the Free Software Foundation.
  8. */
  9. #include <linux/host1x.h>
  10. #include <linux/iommu.h>
  11. #include <drm/drm_atomic.h>
  12. #include <drm/drm_atomic_helper.h>
  13. #include "drm.h"
  14. #include "gem.h"
  15. #define DRIVER_NAME "tegra"
  16. #define DRIVER_DESC "NVIDIA Tegra graphics"
  17. #define DRIVER_DATE "20120330"
  18. #define DRIVER_MAJOR 0
  19. #define DRIVER_MINOR 0
  20. #define DRIVER_PATCHLEVEL 0
  21. struct tegra_drm_file {
  22. struct list_head contexts;
  23. };
  24. static void tegra_atomic_schedule(struct tegra_drm *tegra,
  25. struct drm_atomic_state *state)
  26. {
  27. tegra->commit.state = state;
  28. schedule_work(&tegra->commit.work);
  29. }
  30. static void tegra_atomic_complete(struct tegra_drm *tegra,
  31. struct drm_atomic_state *state)
  32. {
  33. struct drm_device *drm = tegra->drm;
  34. /*
  35. * Everything below can be run asynchronously without the need to grab
  36. * any modeset locks at all under one condition: It must be guaranteed
  37. * that the asynchronous work has either been cancelled (if the driver
  38. * supports it, which at least requires that the framebuffers get
  39. * cleaned up with drm_atomic_helper_cleanup_planes()) or completed
  40. * before the new state gets committed on the software side with
  41. * drm_atomic_helper_swap_state().
  42. *
  43. * This scheme allows new atomic state updates to be prepared and
  44. * checked in parallel to the asynchronous completion of the previous
  45. * update. Which is important since compositors need to figure out the
  46. * composition of the next frame right after having submitted the
  47. * current layout.
  48. */
  49. drm_atomic_helper_commit_modeset_disables(drm, state);
  50. drm_atomic_helper_commit_modeset_enables(drm, state);
  51. drm_atomic_helper_commit_planes(drm, state,
  52. DRM_PLANE_COMMIT_ACTIVE_ONLY);
  53. drm_atomic_helper_wait_for_vblanks(drm, state);
  54. drm_atomic_helper_cleanup_planes(drm, state);
  55. drm_atomic_state_put(state);
  56. }
  57. static void tegra_atomic_work(struct work_struct *work)
  58. {
  59. struct tegra_drm *tegra = container_of(work, struct tegra_drm,
  60. commit.work);
  61. tegra_atomic_complete(tegra, tegra->commit.state);
  62. }
  63. static int tegra_atomic_commit(struct drm_device *drm,
  64. struct drm_atomic_state *state, bool nonblock)
  65. {
  66. struct tegra_drm *tegra = drm->dev_private;
  67. int err;
  68. err = drm_atomic_helper_prepare_planes(drm, state);
  69. if (err)
  70. return err;
  71. /* serialize outstanding nonblocking commits */
  72. mutex_lock(&tegra->commit.lock);
  73. flush_work(&tegra->commit.work);
  74. /*
  75. * This is the point of no return - everything below never fails except
  76. * when the hw goes bonghits. Which means we can commit the new state on
  77. * the software side now.
  78. */
  79. drm_atomic_helper_swap_state(state, true);
  80. drm_atomic_state_get(state);
  81. if (nonblock)
  82. tegra_atomic_schedule(tegra, state);
  83. else
  84. tegra_atomic_complete(tegra, state);
  85. mutex_unlock(&tegra->commit.lock);
  86. return 0;
  87. }
  88. static const struct drm_mode_config_funcs tegra_drm_mode_funcs = {
  89. .fb_create = tegra_fb_create,
  90. #ifdef CONFIG_DRM_FBDEV_EMULATION
  91. .output_poll_changed = tegra_fb_output_poll_changed,
  92. #endif
  93. .atomic_check = drm_atomic_helper_check,
  94. .atomic_commit = tegra_atomic_commit,
  95. };
  96. static int tegra_drm_load(struct drm_device *drm, unsigned long flags)
  97. {
  98. struct host1x_device *device = to_host1x_device(drm->dev);
  99. struct tegra_drm *tegra;
  100. int err;
  101. tegra = kzalloc(sizeof(*tegra), GFP_KERNEL);
  102. if (!tegra)
  103. return -ENOMEM;
  104. if (iommu_present(&platform_bus_type)) {
  105. struct iommu_domain_geometry *geometry;
  106. u64 start, end;
  107. tegra->domain = iommu_domain_alloc(&platform_bus_type);
  108. if (!tegra->domain) {
  109. err = -ENOMEM;
  110. goto free;
  111. }
  112. geometry = &tegra->domain->geometry;
  113. start = geometry->aperture_start;
  114. end = geometry->aperture_end;
  115. DRM_DEBUG_DRIVER("IOMMU aperture initialized (%#llx-%#llx)\n",
  116. start, end);
  117. drm_mm_init(&tegra->mm, start, end - start + 1);
  118. mutex_init(&tegra->mm_lock);
  119. }
  120. mutex_init(&tegra->clients_lock);
  121. INIT_LIST_HEAD(&tegra->clients);
  122. mutex_init(&tegra->commit.lock);
  123. INIT_WORK(&tegra->commit.work, tegra_atomic_work);
  124. drm->dev_private = tegra;
  125. tegra->drm = drm;
  126. drm_mode_config_init(drm);
  127. drm->mode_config.min_width = 0;
  128. drm->mode_config.min_height = 0;
  129. drm->mode_config.max_width = 4096;
  130. drm->mode_config.max_height = 4096;
  131. drm->mode_config.funcs = &tegra_drm_mode_funcs;
  132. err = tegra_drm_fb_prepare(drm);
  133. if (err < 0)
  134. goto config;
  135. drm_kms_helper_poll_init(drm);
  136. err = host1x_device_init(device);
  137. if (err < 0)
  138. goto fbdev;
  139. /*
  140. * We don't use the drm_irq_install() helpers provided by the DRM
  141. * core, so we need to set this manually in order to allow the
  142. * DRM_IOCTL_WAIT_VBLANK to operate correctly.
  143. */
  144. drm->irq_enabled = true;
  145. /* syncpoints are used for full 32-bit hardware VBLANK counters */
  146. drm->max_vblank_count = 0xffffffff;
  147. err = drm_vblank_init(drm, drm->mode_config.num_crtc);
  148. if (err < 0)
  149. goto device;
  150. drm_mode_config_reset(drm);
  151. err = tegra_drm_fb_init(drm);
  152. if (err < 0)
  153. goto vblank;
  154. return 0;
  155. vblank:
  156. drm_vblank_cleanup(drm);
  157. device:
  158. host1x_device_exit(device);
  159. fbdev:
  160. drm_kms_helper_poll_fini(drm);
  161. tegra_drm_fb_free(drm);
  162. config:
  163. drm_mode_config_cleanup(drm);
  164. if (tegra->domain) {
  165. iommu_domain_free(tegra->domain);
  166. drm_mm_takedown(&tegra->mm);
  167. mutex_destroy(&tegra->mm_lock);
  168. }
  169. free:
  170. kfree(tegra);
  171. return err;
  172. }
  173. static void tegra_drm_unload(struct drm_device *drm)
  174. {
  175. struct host1x_device *device = to_host1x_device(drm->dev);
  176. struct tegra_drm *tegra = drm->dev_private;
  177. int err;
  178. drm_kms_helper_poll_fini(drm);
  179. tegra_drm_fb_exit(drm);
  180. drm_mode_config_cleanup(drm);
  181. drm_vblank_cleanup(drm);
  182. err = host1x_device_exit(device);
  183. if (err < 0)
  184. return;
  185. if (tegra->domain) {
  186. iommu_domain_free(tegra->domain);
  187. drm_mm_takedown(&tegra->mm);
  188. mutex_destroy(&tegra->mm_lock);
  189. }
  190. kfree(tegra);
  191. }
  192. static int tegra_drm_open(struct drm_device *drm, struct drm_file *filp)
  193. {
  194. struct tegra_drm_file *fpriv;
  195. fpriv = kzalloc(sizeof(*fpriv), GFP_KERNEL);
  196. if (!fpriv)
  197. return -ENOMEM;
  198. INIT_LIST_HEAD(&fpriv->contexts);
  199. filp->driver_priv = fpriv;
  200. return 0;
  201. }
  202. static void tegra_drm_context_free(struct tegra_drm_context *context)
  203. {
  204. context->client->ops->close_channel(context);
  205. kfree(context);
  206. }
  207. static void tegra_drm_lastclose(struct drm_device *drm)
  208. {
  209. #ifdef CONFIG_DRM_FBDEV_EMULATION
  210. struct tegra_drm *tegra = drm->dev_private;
  211. tegra_fbdev_restore_mode(tegra->fbdev);
  212. #endif
  213. }
  214. static struct host1x_bo *
  215. host1x_bo_lookup(struct drm_file *file, u32 handle)
  216. {
  217. struct drm_gem_object *gem;
  218. struct tegra_bo *bo;
  219. gem = drm_gem_object_lookup(file, handle);
  220. if (!gem)
  221. return NULL;
  222. drm_gem_object_unreference_unlocked(gem);
  223. bo = to_tegra_bo(gem);
  224. return &bo->base;
  225. }
  226. static int host1x_reloc_copy_from_user(struct host1x_reloc *dest,
  227. struct drm_tegra_reloc __user *src,
  228. struct drm_device *drm,
  229. struct drm_file *file)
  230. {
  231. u32 cmdbuf, target;
  232. int err;
  233. err = get_user(cmdbuf, &src->cmdbuf.handle);
  234. if (err < 0)
  235. return err;
  236. err = get_user(dest->cmdbuf.offset, &src->cmdbuf.offset);
  237. if (err < 0)
  238. return err;
  239. err = get_user(target, &src->target.handle);
  240. if (err < 0)
  241. return err;
  242. err = get_user(dest->target.offset, &src->target.offset);
  243. if (err < 0)
  244. return err;
  245. err = get_user(dest->shift, &src->shift);
  246. if (err < 0)
  247. return err;
  248. dest->cmdbuf.bo = host1x_bo_lookup(file, cmdbuf);
  249. if (!dest->cmdbuf.bo)
  250. return -ENOENT;
  251. dest->target.bo = host1x_bo_lookup(file, target);
  252. if (!dest->target.bo)
  253. return -ENOENT;
  254. return 0;
  255. }
  256. int tegra_drm_submit(struct tegra_drm_context *context,
  257. struct drm_tegra_submit *args, struct drm_device *drm,
  258. struct drm_file *file)
  259. {
  260. unsigned int num_cmdbufs = args->num_cmdbufs;
  261. unsigned int num_relocs = args->num_relocs;
  262. unsigned int num_waitchks = args->num_waitchks;
  263. struct drm_tegra_cmdbuf __user *cmdbufs =
  264. (void __user *)(uintptr_t)args->cmdbufs;
  265. struct drm_tegra_reloc __user *relocs =
  266. (void __user *)(uintptr_t)args->relocs;
  267. struct drm_tegra_waitchk __user *waitchks =
  268. (void __user *)(uintptr_t)args->waitchks;
  269. struct drm_tegra_syncpt syncpt;
  270. struct host1x_job *job;
  271. int err;
  272. /* We don't yet support other than one syncpt_incr struct per submit */
  273. if (args->num_syncpts != 1)
  274. return -EINVAL;
  275. job = host1x_job_alloc(context->channel, args->num_cmdbufs,
  276. args->num_relocs, args->num_waitchks);
  277. if (!job)
  278. return -ENOMEM;
  279. job->num_relocs = args->num_relocs;
  280. job->num_waitchk = args->num_waitchks;
  281. job->client = (u32)args->context;
  282. job->class = context->client->base.class;
  283. job->serialize = true;
  284. while (num_cmdbufs) {
  285. struct drm_tegra_cmdbuf cmdbuf;
  286. struct host1x_bo *bo;
  287. if (copy_from_user(&cmdbuf, cmdbufs, sizeof(cmdbuf))) {
  288. err = -EFAULT;
  289. goto fail;
  290. }
  291. bo = host1x_bo_lookup(file, cmdbuf.handle);
  292. if (!bo) {
  293. err = -ENOENT;
  294. goto fail;
  295. }
  296. host1x_job_add_gather(job, bo, cmdbuf.words, cmdbuf.offset);
  297. num_cmdbufs--;
  298. cmdbufs++;
  299. }
  300. /* copy and resolve relocations from submit */
  301. while (num_relocs--) {
  302. err = host1x_reloc_copy_from_user(&job->relocarray[num_relocs],
  303. &relocs[num_relocs], drm,
  304. file);
  305. if (err < 0)
  306. goto fail;
  307. }
  308. if (copy_from_user(job->waitchk, waitchks,
  309. sizeof(*waitchks) * num_waitchks)) {
  310. err = -EFAULT;
  311. goto fail;
  312. }
  313. if (copy_from_user(&syncpt, (void __user *)(uintptr_t)args->syncpts,
  314. sizeof(syncpt))) {
  315. err = -EFAULT;
  316. goto fail;
  317. }
  318. job->is_addr_reg = context->client->ops->is_addr_reg;
  319. job->syncpt_incrs = syncpt.incrs;
  320. job->syncpt_id = syncpt.id;
  321. job->timeout = 10000;
  322. if (args->timeout && args->timeout < 10000)
  323. job->timeout = args->timeout;
  324. err = host1x_job_pin(job, context->client->base.dev);
  325. if (err)
  326. goto fail;
  327. err = host1x_job_submit(job);
  328. if (err)
  329. goto fail_submit;
  330. args->fence = job->syncpt_end;
  331. host1x_job_put(job);
  332. return 0;
  333. fail_submit:
  334. host1x_job_unpin(job);
  335. fail:
  336. host1x_job_put(job);
  337. return err;
  338. }
  339. #ifdef CONFIG_DRM_TEGRA_STAGING
  340. static struct tegra_drm_context *tegra_drm_get_context(__u64 context)
  341. {
  342. return (struct tegra_drm_context *)(uintptr_t)context;
  343. }
  344. static bool tegra_drm_file_owns_context(struct tegra_drm_file *file,
  345. struct tegra_drm_context *context)
  346. {
  347. struct tegra_drm_context *ctx;
  348. list_for_each_entry(ctx, &file->contexts, list)
  349. if (ctx == context)
  350. return true;
  351. return false;
  352. }
  353. static int tegra_gem_create(struct drm_device *drm, void *data,
  354. struct drm_file *file)
  355. {
  356. struct drm_tegra_gem_create *args = data;
  357. struct tegra_bo *bo;
  358. bo = tegra_bo_create_with_handle(file, drm, args->size, args->flags,
  359. &args->handle);
  360. if (IS_ERR(bo))
  361. return PTR_ERR(bo);
  362. return 0;
  363. }
  364. static int tegra_gem_mmap(struct drm_device *drm, void *data,
  365. struct drm_file *file)
  366. {
  367. struct drm_tegra_gem_mmap *args = data;
  368. struct drm_gem_object *gem;
  369. struct tegra_bo *bo;
  370. gem = drm_gem_object_lookup(file, args->handle);
  371. if (!gem)
  372. return -EINVAL;
  373. bo = to_tegra_bo(gem);
  374. args->offset = drm_vma_node_offset_addr(&bo->gem.vma_node);
  375. drm_gem_object_unreference_unlocked(gem);
  376. return 0;
  377. }
  378. static int tegra_syncpt_read(struct drm_device *drm, void *data,
  379. struct drm_file *file)
  380. {
  381. struct host1x *host = dev_get_drvdata(drm->dev->parent);
  382. struct drm_tegra_syncpt_read *args = data;
  383. struct host1x_syncpt *sp;
  384. sp = host1x_syncpt_get(host, args->id);
  385. if (!sp)
  386. return -EINVAL;
  387. args->value = host1x_syncpt_read_min(sp);
  388. return 0;
  389. }
  390. static int tegra_syncpt_incr(struct drm_device *drm, void *data,
  391. struct drm_file *file)
  392. {
  393. struct host1x *host1x = dev_get_drvdata(drm->dev->parent);
  394. struct drm_tegra_syncpt_incr *args = data;
  395. struct host1x_syncpt *sp;
  396. sp = host1x_syncpt_get(host1x, args->id);
  397. if (!sp)
  398. return -EINVAL;
  399. return host1x_syncpt_incr(sp);
  400. }
  401. static int tegra_syncpt_wait(struct drm_device *drm, void *data,
  402. struct drm_file *file)
  403. {
  404. struct host1x *host1x = dev_get_drvdata(drm->dev->parent);
  405. struct drm_tegra_syncpt_wait *args = data;
  406. struct host1x_syncpt *sp;
  407. sp = host1x_syncpt_get(host1x, args->id);
  408. if (!sp)
  409. return -EINVAL;
  410. return host1x_syncpt_wait(sp, args->thresh, args->timeout,
  411. &args->value);
  412. }
  413. static int tegra_open_channel(struct drm_device *drm, void *data,
  414. struct drm_file *file)
  415. {
  416. struct tegra_drm_file *fpriv = file->driver_priv;
  417. struct tegra_drm *tegra = drm->dev_private;
  418. struct drm_tegra_open_channel *args = data;
  419. struct tegra_drm_context *context;
  420. struct tegra_drm_client *client;
  421. int err = -ENODEV;
  422. context = kzalloc(sizeof(*context), GFP_KERNEL);
  423. if (!context)
  424. return -ENOMEM;
  425. list_for_each_entry(client, &tegra->clients, list)
  426. if (client->base.class == args->client) {
  427. err = client->ops->open_channel(client, context);
  428. if (err)
  429. break;
  430. list_add(&context->list, &fpriv->contexts);
  431. args->context = (uintptr_t)context;
  432. context->client = client;
  433. return 0;
  434. }
  435. kfree(context);
  436. return err;
  437. }
  438. static int tegra_close_channel(struct drm_device *drm, void *data,
  439. struct drm_file *file)
  440. {
  441. struct tegra_drm_file *fpriv = file->driver_priv;
  442. struct drm_tegra_close_channel *args = data;
  443. struct tegra_drm_context *context;
  444. context = tegra_drm_get_context(args->context);
  445. if (!tegra_drm_file_owns_context(fpriv, context))
  446. return -EINVAL;
  447. list_del(&context->list);
  448. tegra_drm_context_free(context);
  449. return 0;
  450. }
  451. static int tegra_get_syncpt(struct drm_device *drm, void *data,
  452. struct drm_file *file)
  453. {
  454. struct tegra_drm_file *fpriv = file->driver_priv;
  455. struct drm_tegra_get_syncpt *args = data;
  456. struct tegra_drm_context *context;
  457. struct host1x_syncpt *syncpt;
  458. context = tegra_drm_get_context(args->context);
  459. if (!tegra_drm_file_owns_context(fpriv, context))
  460. return -ENODEV;
  461. if (args->index >= context->client->base.num_syncpts)
  462. return -EINVAL;
  463. syncpt = context->client->base.syncpts[args->index];
  464. args->id = host1x_syncpt_id(syncpt);
  465. return 0;
  466. }
  467. static int tegra_submit(struct drm_device *drm, void *data,
  468. struct drm_file *file)
  469. {
  470. struct tegra_drm_file *fpriv = file->driver_priv;
  471. struct drm_tegra_submit *args = data;
  472. struct tegra_drm_context *context;
  473. context = tegra_drm_get_context(args->context);
  474. if (!tegra_drm_file_owns_context(fpriv, context))
  475. return -ENODEV;
  476. return context->client->ops->submit(context, args, drm, file);
  477. }
  478. static int tegra_get_syncpt_base(struct drm_device *drm, void *data,
  479. struct drm_file *file)
  480. {
  481. struct tegra_drm_file *fpriv = file->driver_priv;
  482. struct drm_tegra_get_syncpt_base *args = data;
  483. struct tegra_drm_context *context;
  484. struct host1x_syncpt_base *base;
  485. struct host1x_syncpt *syncpt;
  486. context = tegra_drm_get_context(args->context);
  487. if (!tegra_drm_file_owns_context(fpriv, context))
  488. return -ENODEV;
  489. if (args->syncpt >= context->client->base.num_syncpts)
  490. return -EINVAL;
  491. syncpt = context->client->base.syncpts[args->syncpt];
  492. base = host1x_syncpt_get_base(syncpt);
  493. if (!base)
  494. return -ENXIO;
  495. args->id = host1x_syncpt_base_id(base);
  496. return 0;
  497. }
  498. static int tegra_gem_set_tiling(struct drm_device *drm, void *data,
  499. struct drm_file *file)
  500. {
  501. struct drm_tegra_gem_set_tiling *args = data;
  502. enum tegra_bo_tiling_mode mode;
  503. struct drm_gem_object *gem;
  504. unsigned long value = 0;
  505. struct tegra_bo *bo;
  506. switch (args->mode) {
  507. case DRM_TEGRA_GEM_TILING_MODE_PITCH:
  508. mode = TEGRA_BO_TILING_MODE_PITCH;
  509. if (args->value != 0)
  510. return -EINVAL;
  511. break;
  512. case DRM_TEGRA_GEM_TILING_MODE_TILED:
  513. mode = TEGRA_BO_TILING_MODE_TILED;
  514. if (args->value != 0)
  515. return -EINVAL;
  516. break;
  517. case DRM_TEGRA_GEM_TILING_MODE_BLOCK:
  518. mode = TEGRA_BO_TILING_MODE_BLOCK;
  519. if (args->value > 5)
  520. return -EINVAL;
  521. value = args->value;
  522. break;
  523. default:
  524. return -EINVAL;
  525. }
  526. gem = drm_gem_object_lookup(file, args->handle);
  527. if (!gem)
  528. return -ENOENT;
  529. bo = to_tegra_bo(gem);
  530. bo->tiling.mode = mode;
  531. bo->tiling.value = value;
  532. drm_gem_object_unreference_unlocked(gem);
  533. return 0;
  534. }
  535. static int tegra_gem_get_tiling(struct drm_device *drm, void *data,
  536. struct drm_file *file)
  537. {
  538. struct drm_tegra_gem_get_tiling *args = data;
  539. struct drm_gem_object *gem;
  540. struct tegra_bo *bo;
  541. int err = 0;
  542. gem = drm_gem_object_lookup(file, args->handle);
  543. if (!gem)
  544. return -ENOENT;
  545. bo = to_tegra_bo(gem);
  546. switch (bo->tiling.mode) {
  547. case TEGRA_BO_TILING_MODE_PITCH:
  548. args->mode = DRM_TEGRA_GEM_TILING_MODE_PITCH;
  549. args->value = 0;
  550. break;
  551. case TEGRA_BO_TILING_MODE_TILED:
  552. args->mode = DRM_TEGRA_GEM_TILING_MODE_TILED;
  553. args->value = 0;
  554. break;
  555. case TEGRA_BO_TILING_MODE_BLOCK:
  556. args->mode = DRM_TEGRA_GEM_TILING_MODE_BLOCK;
  557. args->value = bo->tiling.value;
  558. break;
  559. default:
  560. err = -EINVAL;
  561. break;
  562. }
  563. drm_gem_object_unreference_unlocked(gem);
  564. return err;
  565. }
  566. static int tegra_gem_set_flags(struct drm_device *drm, void *data,
  567. struct drm_file *file)
  568. {
  569. struct drm_tegra_gem_set_flags *args = data;
  570. struct drm_gem_object *gem;
  571. struct tegra_bo *bo;
  572. if (args->flags & ~DRM_TEGRA_GEM_FLAGS)
  573. return -EINVAL;
  574. gem = drm_gem_object_lookup(file, args->handle);
  575. if (!gem)
  576. return -ENOENT;
  577. bo = to_tegra_bo(gem);
  578. bo->flags = 0;
  579. if (args->flags & DRM_TEGRA_GEM_BOTTOM_UP)
  580. bo->flags |= TEGRA_BO_BOTTOM_UP;
  581. drm_gem_object_unreference_unlocked(gem);
  582. return 0;
  583. }
  584. static int tegra_gem_get_flags(struct drm_device *drm, void *data,
  585. struct drm_file *file)
  586. {
  587. struct drm_tegra_gem_get_flags *args = data;
  588. struct drm_gem_object *gem;
  589. struct tegra_bo *bo;
  590. gem = drm_gem_object_lookup(file, args->handle);
  591. if (!gem)
  592. return -ENOENT;
  593. bo = to_tegra_bo(gem);
  594. args->flags = 0;
  595. if (bo->flags & TEGRA_BO_BOTTOM_UP)
  596. args->flags |= DRM_TEGRA_GEM_BOTTOM_UP;
  597. drm_gem_object_unreference_unlocked(gem);
  598. return 0;
  599. }
  600. #endif
  601. static const struct drm_ioctl_desc tegra_drm_ioctls[] = {
  602. #ifdef CONFIG_DRM_TEGRA_STAGING
  603. DRM_IOCTL_DEF_DRV(TEGRA_GEM_CREATE, tegra_gem_create, 0),
  604. DRM_IOCTL_DEF_DRV(TEGRA_GEM_MMAP, tegra_gem_mmap, 0),
  605. DRM_IOCTL_DEF_DRV(TEGRA_SYNCPT_READ, tegra_syncpt_read, 0),
  606. DRM_IOCTL_DEF_DRV(TEGRA_SYNCPT_INCR, tegra_syncpt_incr, 0),
  607. DRM_IOCTL_DEF_DRV(TEGRA_SYNCPT_WAIT, tegra_syncpt_wait, 0),
  608. DRM_IOCTL_DEF_DRV(TEGRA_OPEN_CHANNEL, tegra_open_channel, 0),
  609. DRM_IOCTL_DEF_DRV(TEGRA_CLOSE_CHANNEL, tegra_close_channel, 0),
  610. DRM_IOCTL_DEF_DRV(TEGRA_GET_SYNCPT, tegra_get_syncpt, 0),
  611. DRM_IOCTL_DEF_DRV(TEGRA_SUBMIT, tegra_submit, 0),
  612. DRM_IOCTL_DEF_DRV(TEGRA_GET_SYNCPT_BASE, tegra_get_syncpt_base, 0),
  613. DRM_IOCTL_DEF_DRV(TEGRA_GEM_SET_TILING, tegra_gem_set_tiling, 0),
  614. DRM_IOCTL_DEF_DRV(TEGRA_GEM_GET_TILING, tegra_gem_get_tiling, 0),
  615. DRM_IOCTL_DEF_DRV(TEGRA_GEM_SET_FLAGS, tegra_gem_set_flags, 0),
  616. DRM_IOCTL_DEF_DRV(TEGRA_GEM_GET_FLAGS, tegra_gem_get_flags, 0),
  617. #endif
  618. };
  619. static const struct file_operations tegra_drm_fops = {
  620. .owner = THIS_MODULE,
  621. .open = drm_open,
  622. .release = drm_release,
  623. .unlocked_ioctl = drm_ioctl,
  624. .mmap = tegra_drm_mmap,
  625. .poll = drm_poll,
  626. .read = drm_read,
  627. .compat_ioctl = drm_compat_ioctl,
  628. .llseek = noop_llseek,
  629. };
  630. static u32 tegra_drm_get_vblank_counter(struct drm_device *drm,
  631. unsigned int pipe)
  632. {
  633. struct drm_crtc *crtc = drm_crtc_from_index(drm, pipe);
  634. struct tegra_dc *dc = to_tegra_dc(crtc);
  635. if (!crtc)
  636. return 0;
  637. return tegra_dc_get_vblank_counter(dc);
  638. }
  639. static int tegra_drm_enable_vblank(struct drm_device *drm, unsigned int pipe)
  640. {
  641. struct drm_crtc *crtc = drm_crtc_from_index(drm, pipe);
  642. struct tegra_dc *dc = to_tegra_dc(crtc);
  643. if (!crtc)
  644. return -ENODEV;
  645. tegra_dc_enable_vblank(dc);
  646. return 0;
  647. }
  648. static void tegra_drm_disable_vblank(struct drm_device *drm, unsigned int pipe)
  649. {
  650. struct drm_crtc *crtc = drm_crtc_from_index(drm, pipe);
  651. struct tegra_dc *dc = to_tegra_dc(crtc);
  652. if (crtc)
  653. tegra_dc_disable_vblank(dc);
  654. }
  655. static void tegra_drm_preclose(struct drm_device *drm, struct drm_file *file)
  656. {
  657. struct tegra_drm_file *fpriv = file->driver_priv;
  658. struct tegra_drm_context *context, *tmp;
  659. list_for_each_entry_safe(context, tmp, &fpriv->contexts, list)
  660. tegra_drm_context_free(context);
  661. kfree(fpriv);
  662. }
  663. #ifdef CONFIG_DEBUG_FS
  664. static int tegra_debugfs_framebuffers(struct seq_file *s, void *data)
  665. {
  666. struct drm_info_node *node = (struct drm_info_node *)s->private;
  667. struct drm_device *drm = node->minor->dev;
  668. struct drm_framebuffer *fb;
  669. mutex_lock(&drm->mode_config.fb_lock);
  670. list_for_each_entry(fb, &drm->mode_config.fb_list, head) {
  671. seq_printf(s, "%3d: user size: %d x %d, depth %d, %d bpp, refcount %d\n",
  672. fb->base.id, fb->width, fb->height,
  673. fb->format->depth,
  674. fb->format->cpp[0] * 8,
  675. drm_framebuffer_read_refcount(fb));
  676. }
  677. mutex_unlock(&drm->mode_config.fb_lock);
  678. return 0;
  679. }
  680. static int tegra_debugfs_iova(struct seq_file *s, void *data)
  681. {
  682. struct drm_info_node *node = (struct drm_info_node *)s->private;
  683. struct drm_device *drm = node->minor->dev;
  684. struct tegra_drm *tegra = drm->dev_private;
  685. struct drm_printer p = drm_seq_file_printer(s);
  686. mutex_lock(&tegra->mm_lock);
  687. drm_mm_print(&tegra->mm, &p);
  688. mutex_unlock(&tegra->mm_lock);
  689. return 0;
  690. }
  691. static struct drm_info_list tegra_debugfs_list[] = {
  692. { "framebuffers", tegra_debugfs_framebuffers, 0 },
  693. { "iova", tegra_debugfs_iova, 0 },
  694. };
  695. static int tegra_debugfs_init(struct drm_minor *minor)
  696. {
  697. return drm_debugfs_create_files(tegra_debugfs_list,
  698. ARRAY_SIZE(tegra_debugfs_list),
  699. minor->debugfs_root, minor);
  700. }
  701. #endif
  702. static struct drm_driver tegra_drm_driver = {
  703. .driver_features = DRIVER_MODESET | DRIVER_GEM | DRIVER_PRIME |
  704. DRIVER_ATOMIC,
  705. .load = tegra_drm_load,
  706. .unload = tegra_drm_unload,
  707. .open = tegra_drm_open,
  708. .preclose = tegra_drm_preclose,
  709. .lastclose = tegra_drm_lastclose,
  710. .get_vblank_counter = tegra_drm_get_vblank_counter,
  711. .enable_vblank = tegra_drm_enable_vblank,
  712. .disable_vblank = tegra_drm_disable_vblank,
  713. #if defined(CONFIG_DEBUG_FS)
  714. .debugfs_init = tegra_debugfs_init,
  715. #endif
  716. .gem_free_object_unlocked = tegra_bo_free_object,
  717. .gem_vm_ops = &tegra_bo_vm_ops,
  718. .prime_handle_to_fd = drm_gem_prime_handle_to_fd,
  719. .prime_fd_to_handle = drm_gem_prime_fd_to_handle,
  720. .gem_prime_export = tegra_gem_prime_export,
  721. .gem_prime_import = tegra_gem_prime_import,
  722. .dumb_create = tegra_bo_dumb_create,
  723. .dumb_map_offset = tegra_bo_dumb_map_offset,
  724. .dumb_destroy = drm_gem_dumb_destroy,
  725. .ioctls = tegra_drm_ioctls,
  726. .num_ioctls = ARRAY_SIZE(tegra_drm_ioctls),
  727. .fops = &tegra_drm_fops,
  728. .name = DRIVER_NAME,
  729. .desc = DRIVER_DESC,
  730. .date = DRIVER_DATE,
  731. .major = DRIVER_MAJOR,
  732. .minor = DRIVER_MINOR,
  733. .patchlevel = DRIVER_PATCHLEVEL,
  734. };
  735. int tegra_drm_register_client(struct tegra_drm *tegra,
  736. struct tegra_drm_client *client)
  737. {
  738. mutex_lock(&tegra->clients_lock);
  739. list_add_tail(&client->list, &tegra->clients);
  740. mutex_unlock(&tegra->clients_lock);
  741. return 0;
  742. }
  743. int tegra_drm_unregister_client(struct tegra_drm *tegra,
  744. struct tegra_drm_client *client)
  745. {
  746. mutex_lock(&tegra->clients_lock);
  747. list_del_init(&client->list);
  748. mutex_unlock(&tegra->clients_lock);
  749. return 0;
  750. }
  751. static int host1x_drm_probe(struct host1x_device *dev)
  752. {
  753. struct drm_driver *driver = &tegra_drm_driver;
  754. struct drm_device *drm;
  755. int err;
  756. drm = drm_dev_alloc(driver, &dev->dev);
  757. if (IS_ERR(drm))
  758. return PTR_ERR(drm);
  759. dev_set_drvdata(&dev->dev, drm);
  760. err = drm_dev_register(drm, 0);
  761. if (err < 0)
  762. goto unref;
  763. return 0;
  764. unref:
  765. drm_dev_unref(drm);
  766. return err;
  767. }
  768. static int host1x_drm_remove(struct host1x_device *dev)
  769. {
  770. struct drm_device *drm = dev_get_drvdata(&dev->dev);
  771. drm_dev_unregister(drm);
  772. drm_dev_unref(drm);
  773. return 0;
  774. }
  775. #ifdef CONFIG_PM_SLEEP
  776. static int host1x_drm_suspend(struct device *dev)
  777. {
  778. struct drm_device *drm = dev_get_drvdata(dev);
  779. struct tegra_drm *tegra = drm->dev_private;
  780. drm_kms_helper_poll_disable(drm);
  781. tegra_drm_fb_suspend(drm);
  782. tegra->state = drm_atomic_helper_suspend(drm);
  783. if (IS_ERR(tegra->state)) {
  784. tegra_drm_fb_resume(drm);
  785. drm_kms_helper_poll_enable(drm);
  786. return PTR_ERR(tegra->state);
  787. }
  788. return 0;
  789. }
  790. static int host1x_drm_resume(struct device *dev)
  791. {
  792. struct drm_device *drm = dev_get_drvdata(dev);
  793. struct tegra_drm *tegra = drm->dev_private;
  794. drm_atomic_helper_resume(drm, tegra->state);
  795. tegra_drm_fb_resume(drm);
  796. drm_kms_helper_poll_enable(drm);
  797. return 0;
  798. }
  799. #endif
  800. static SIMPLE_DEV_PM_OPS(host1x_drm_pm_ops, host1x_drm_suspend,
  801. host1x_drm_resume);
  802. static const struct of_device_id host1x_drm_subdevs[] = {
  803. { .compatible = "nvidia,tegra20-dc", },
  804. { .compatible = "nvidia,tegra20-hdmi", },
  805. { .compatible = "nvidia,tegra20-gr2d", },
  806. { .compatible = "nvidia,tegra20-gr3d", },
  807. { .compatible = "nvidia,tegra30-dc", },
  808. { .compatible = "nvidia,tegra30-hdmi", },
  809. { .compatible = "nvidia,tegra30-gr2d", },
  810. { .compatible = "nvidia,tegra30-gr3d", },
  811. { .compatible = "nvidia,tegra114-dsi", },
  812. { .compatible = "nvidia,tegra114-hdmi", },
  813. { .compatible = "nvidia,tegra114-gr3d", },
  814. { .compatible = "nvidia,tegra124-dc", },
  815. { .compatible = "nvidia,tegra124-sor", },
  816. { .compatible = "nvidia,tegra124-hdmi", },
  817. { .compatible = "nvidia,tegra124-dsi", },
  818. { .compatible = "nvidia,tegra132-dsi", },
  819. { .compatible = "nvidia,tegra210-dc", },
  820. { .compatible = "nvidia,tegra210-dsi", },
  821. { .compatible = "nvidia,tegra210-sor", },
  822. { .compatible = "nvidia,tegra210-sor1", },
  823. { /* sentinel */ }
  824. };
  825. static struct host1x_driver host1x_drm_driver = {
  826. .driver = {
  827. .name = "drm",
  828. .pm = &host1x_drm_pm_ops,
  829. },
  830. .probe = host1x_drm_probe,
  831. .remove = host1x_drm_remove,
  832. .subdevs = host1x_drm_subdevs,
  833. };
  834. static struct platform_driver * const drivers[] = {
  835. &tegra_dc_driver,
  836. &tegra_hdmi_driver,
  837. &tegra_dsi_driver,
  838. &tegra_dpaux_driver,
  839. &tegra_sor_driver,
  840. &tegra_gr2d_driver,
  841. &tegra_gr3d_driver,
  842. };
  843. static int __init host1x_drm_init(void)
  844. {
  845. int err;
  846. err = host1x_driver_register(&host1x_drm_driver);
  847. if (err < 0)
  848. return err;
  849. err = platform_register_drivers(drivers, ARRAY_SIZE(drivers));
  850. if (err < 0)
  851. goto unregister_host1x;
  852. return 0;
  853. unregister_host1x:
  854. host1x_driver_unregister(&host1x_drm_driver);
  855. return err;
  856. }
  857. module_init(host1x_drm_init);
  858. static void __exit host1x_drm_exit(void)
  859. {
  860. platform_unregister_drivers(drivers, ARRAY_SIZE(drivers));
  861. host1x_driver_unregister(&host1x_drm_driver);
  862. }
  863. module_exit(host1x_drm_exit);
  864. MODULE_AUTHOR("Thierry Reding <thierry.reding@avionic-design.de>");
  865. MODULE_DESCRIPTION("NVIDIA Tegra DRM driver");
  866. MODULE_LICENSE("GPL v2");