regmap.c 71 KB

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  1. /*
  2. * Register map access API
  3. *
  4. * Copyright 2011 Wolfson Microelectronics plc
  5. *
  6. * Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License version 2 as
  10. * published by the Free Software Foundation.
  11. */
  12. #include <linux/device.h>
  13. #include <linux/slab.h>
  14. #include <linux/export.h>
  15. #include <linux/mutex.h>
  16. #include <linux/err.h>
  17. #include <linux/of.h>
  18. #include <linux/rbtree.h>
  19. #include <linux/sched.h>
  20. #include <linux/delay.h>
  21. #define CREATE_TRACE_POINTS
  22. #include "trace.h"
  23. #include "internal.h"
  24. /*
  25. * Sometimes for failures during very early init the trace
  26. * infrastructure isn't available early enough to be used. For this
  27. * sort of problem defining LOG_DEVICE will add printks for basic
  28. * register I/O on a specific device.
  29. */
  30. #undef LOG_DEVICE
  31. static int _regmap_update_bits(struct regmap *map, unsigned int reg,
  32. unsigned int mask, unsigned int val,
  33. bool *change, bool force_write);
  34. static int _regmap_bus_reg_read(void *context, unsigned int reg,
  35. unsigned int *val);
  36. static int _regmap_bus_read(void *context, unsigned int reg,
  37. unsigned int *val);
  38. static int _regmap_bus_formatted_write(void *context, unsigned int reg,
  39. unsigned int val);
  40. static int _regmap_bus_reg_write(void *context, unsigned int reg,
  41. unsigned int val);
  42. static int _regmap_bus_raw_write(void *context, unsigned int reg,
  43. unsigned int val);
  44. bool regmap_reg_in_ranges(unsigned int reg,
  45. const struct regmap_range *ranges,
  46. unsigned int nranges)
  47. {
  48. const struct regmap_range *r;
  49. int i;
  50. for (i = 0, r = ranges; i < nranges; i++, r++)
  51. if (regmap_reg_in_range(reg, r))
  52. return true;
  53. return false;
  54. }
  55. EXPORT_SYMBOL_GPL(regmap_reg_in_ranges);
  56. bool regmap_check_range_table(struct regmap *map, unsigned int reg,
  57. const struct regmap_access_table *table)
  58. {
  59. /* Check "no ranges" first */
  60. if (regmap_reg_in_ranges(reg, table->no_ranges, table->n_no_ranges))
  61. return false;
  62. /* In case zero "yes ranges" are supplied, any reg is OK */
  63. if (!table->n_yes_ranges)
  64. return true;
  65. return regmap_reg_in_ranges(reg, table->yes_ranges,
  66. table->n_yes_ranges);
  67. }
  68. EXPORT_SYMBOL_GPL(regmap_check_range_table);
  69. bool regmap_writeable(struct regmap *map, unsigned int reg)
  70. {
  71. if (map->max_register && reg > map->max_register)
  72. return false;
  73. if (map->writeable_reg)
  74. return map->writeable_reg(map->dev, reg);
  75. if (map->wr_table)
  76. return regmap_check_range_table(map, reg, map->wr_table);
  77. return true;
  78. }
  79. bool regmap_readable(struct regmap *map, unsigned int reg)
  80. {
  81. if (!map->reg_read)
  82. return false;
  83. if (map->max_register && reg > map->max_register)
  84. return false;
  85. if (map->format.format_write)
  86. return false;
  87. if (map->readable_reg)
  88. return map->readable_reg(map->dev, reg);
  89. if (map->rd_table)
  90. return regmap_check_range_table(map, reg, map->rd_table);
  91. return true;
  92. }
  93. bool regmap_volatile(struct regmap *map, unsigned int reg)
  94. {
  95. if (!map->format.format_write && !regmap_readable(map, reg))
  96. return false;
  97. if (map->volatile_reg)
  98. return map->volatile_reg(map->dev, reg);
  99. if (map->volatile_table)
  100. return regmap_check_range_table(map, reg, map->volatile_table);
  101. if (map->cache_ops)
  102. return false;
  103. else
  104. return true;
  105. }
  106. bool regmap_precious(struct regmap *map, unsigned int reg)
  107. {
  108. if (!regmap_readable(map, reg))
  109. return false;
  110. if (map->precious_reg)
  111. return map->precious_reg(map->dev, reg);
  112. if (map->precious_table)
  113. return regmap_check_range_table(map, reg, map->precious_table);
  114. return false;
  115. }
  116. static bool regmap_volatile_range(struct regmap *map, unsigned int reg,
  117. size_t num)
  118. {
  119. unsigned int i;
  120. for (i = 0; i < num; i++)
  121. if (!regmap_volatile(map, reg + i))
  122. return false;
  123. return true;
  124. }
  125. static void regmap_format_2_6_write(struct regmap *map,
  126. unsigned int reg, unsigned int val)
  127. {
  128. u8 *out = map->work_buf;
  129. *out = (reg << 6) | val;
  130. }
  131. static void regmap_format_4_12_write(struct regmap *map,
  132. unsigned int reg, unsigned int val)
  133. {
  134. __be16 *out = map->work_buf;
  135. *out = cpu_to_be16((reg << 12) | val);
  136. }
  137. static void regmap_format_7_9_write(struct regmap *map,
  138. unsigned int reg, unsigned int val)
  139. {
  140. __be16 *out = map->work_buf;
  141. *out = cpu_to_be16((reg << 9) | val);
  142. }
  143. static void regmap_format_10_14_write(struct regmap *map,
  144. unsigned int reg, unsigned int val)
  145. {
  146. u8 *out = map->work_buf;
  147. out[2] = val;
  148. out[1] = (val >> 8) | (reg << 6);
  149. out[0] = reg >> 2;
  150. }
  151. static void regmap_format_8(void *buf, unsigned int val, unsigned int shift)
  152. {
  153. u8 *b = buf;
  154. b[0] = val << shift;
  155. }
  156. static void regmap_format_16_be(void *buf, unsigned int val, unsigned int shift)
  157. {
  158. __be16 *b = buf;
  159. b[0] = cpu_to_be16(val << shift);
  160. }
  161. static void regmap_format_16_le(void *buf, unsigned int val, unsigned int shift)
  162. {
  163. __le16 *b = buf;
  164. b[0] = cpu_to_le16(val << shift);
  165. }
  166. static void regmap_format_16_native(void *buf, unsigned int val,
  167. unsigned int shift)
  168. {
  169. *(u16 *)buf = val << shift;
  170. }
  171. static void regmap_format_24(void *buf, unsigned int val, unsigned int shift)
  172. {
  173. u8 *b = buf;
  174. val <<= shift;
  175. b[0] = val >> 16;
  176. b[1] = val >> 8;
  177. b[2] = val;
  178. }
  179. static void regmap_format_32_be(void *buf, unsigned int val, unsigned int shift)
  180. {
  181. __be32 *b = buf;
  182. b[0] = cpu_to_be32(val << shift);
  183. }
  184. static void regmap_format_32_le(void *buf, unsigned int val, unsigned int shift)
  185. {
  186. __le32 *b = buf;
  187. b[0] = cpu_to_le32(val << shift);
  188. }
  189. static void regmap_format_32_native(void *buf, unsigned int val,
  190. unsigned int shift)
  191. {
  192. *(u32 *)buf = val << shift;
  193. }
  194. #ifdef CONFIG_64BIT
  195. static void regmap_format_64_be(void *buf, unsigned int val, unsigned int shift)
  196. {
  197. __be64 *b = buf;
  198. b[0] = cpu_to_be64((u64)val << shift);
  199. }
  200. static void regmap_format_64_le(void *buf, unsigned int val, unsigned int shift)
  201. {
  202. __le64 *b = buf;
  203. b[0] = cpu_to_le64((u64)val << shift);
  204. }
  205. static void regmap_format_64_native(void *buf, unsigned int val,
  206. unsigned int shift)
  207. {
  208. *(u64 *)buf = (u64)val << shift;
  209. }
  210. #endif
  211. static void regmap_parse_inplace_noop(void *buf)
  212. {
  213. }
  214. static unsigned int regmap_parse_8(const void *buf)
  215. {
  216. const u8 *b = buf;
  217. return b[0];
  218. }
  219. static unsigned int regmap_parse_16_be(const void *buf)
  220. {
  221. const __be16 *b = buf;
  222. return be16_to_cpu(b[0]);
  223. }
  224. static unsigned int regmap_parse_16_le(const void *buf)
  225. {
  226. const __le16 *b = buf;
  227. return le16_to_cpu(b[0]);
  228. }
  229. static void regmap_parse_16_be_inplace(void *buf)
  230. {
  231. __be16 *b = buf;
  232. b[0] = be16_to_cpu(b[0]);
  233. }
  234. static void regmap_parse_16_le_inplace(void *buf)
  235. {
  236. __le16 *b = buf;
  237. b[0] = le16_to_cpu(b[0]);
  238. }
  239. static unsigned int regmap_parse_16_native(const void *buf)
  240. {
  241. return *(u16 *)buf;
  242. }
  243. static unsigned int regmap_parse_24(const void *buf)
  244. {
  245. const u8 *b = buf;
  246. unsigned int ret = b[2];
  247. ret |= ((unsigned int)b[1]) << 8;
  248. ret |= ((unsigned int)b[0]) << 16;
  249. return ret;
  250. }
  251. static unsigned int regmap_parse_32_be(const void *buf)
  252. {
  253. const __be32 *b = buf;
  254. return be32_to_cpu(b[0]);
  255. }
  256. static unsigned int regmap_parse_32_le(const void *buf)
  257. {
  258. const __le32 *b = buf;
  259. return le32_to_cpu(b[0]);
  260. }
  261. static void regmap_parse_32_be_inplace(void *buf)
  262. {
  263. __be32 *b = buf;
  264. b[0] = be32_to_cpu(b[0]);
  265. }
  266. static void regmap_parse_32_le_inplace(void *buf)
  267. {
  268. __le32 *b = buf;
  269. b[0] = le32_to_cpu(b[0]);
  270. }
  271. static unsigned int regmap_parse_32_native(const void *buf)
  272. {
  273. return *(u32 *)buf;
  274. }
  275. #ifdef CONFIG_64BIT
  276. static unsigned int regmap_parse_64_be(const void *buf)
  277. {
  278. const __be64 *b = buf;
  279. return be64_to_cpu(b[0]);
  280. }
  281. static unsigned int regmap_parse_64_le(const void *buf)
  282. {
  283. const __le64 *b = buf;
  284. return le64_to_cpu(b[0]);
  285. }
  286. static void regmap_parse_64_be_inplace(void *buf)
  287. {
  288. __be64 *b = buf;
  289. b[0] = be64_to_cpu(b[0]);
  290. }
  291. static void regmap_parse_64_le_inplace(void *buf)
  292. {
  293. __le64 *b = buf;
  294. b[0] = le64_to_cpu(b[0]);
  295. }
  296. static unsigned int regmap_parse_64_native(const void *buf)
  297. {
  298. return *(u64 *)buf;
  299. }
  300. #endif
  301. static void regmap_lock_mutex(void *__map)
  302. {
  303. struct regmap *map = __map;
  304. mutex_lock(&map->mutex);
  305. }
  306. static void regmap_unlock_mutex(void *__map)
  307. {
  308. struct regmap *map = __map;
  309. mutex_unlock(&map->mutex);
  310. }
  311. static void regmap_lock_spinlock(void *__map)
  312. __acquires(&map->spinlock)
  313. {
  314. struct regmap *map = __map;
  315. unsigned long flags;
  316. spin_lock_irqsave(&map->spinlock, flags);
  317. map->spinlock_flags = flags;
  318. }
  319. static void regmap_unlock_spinlock(void *__map)
  320. __releases(&map->spinlock)
  321. {
  322. struct regmap *map = __map;
  323. spin_unlock_irqrestore(&map->spinlock, map->spinlock_flags);
  324. }
  325. static void dev_get_regmap_release(struct device *dev, void *res)
  326. {
  327. /*
  328. * We don't actually have anything to do here; the goal here
  329. * is not to manage the regmap but to provide a simple way to
  330. * get the regmap back given a struct device.
  331. */
  332. }
  333. static bool _regmap_range_add(struct regmap *map,
  334. struct regmap_range_node *data)
  335. {
  336. struct rb_root *root = &map->range_tree;
  337. struct rb_node **new = &(root->rb_node), *parent = NULL;
  338. while (*new) {
  339. struct regmap_range_node *this =
  340. container_of(*new, struct regmap_range_node, node);
  341. parent = *new;
  342. if (data->range_max < this->range_min)
  343. new = &((*new)->rb_left);
  344. else if (data->range_min > this->range_max)
  345. new = &((*new)->rb_right);
  346. else
  347. return false;
  348. }
  349. rb_link_node(&data->node, parent, new);
  350. rb_insert_color(&data->node, root);
  351. return true;
  352. }
  353. static struct regmap_range_node *_regmap_range_lookup(struct regmap *map,
  354. unsigned int reg)
  355. {
  356. struct rb_node *node = map->range_tree.rb_node;
  357. while (node) {
  358. struct regmap_range_node *this =
  359. container_of(node, struct regmap_range_node, node);
  360. if (reg < this->range_min)
  361. node = node->rb_left;
  362. else if (reg > this->range_max)
  363. node = node->rb_right;
  364. else
  365. return this;
  366. }
  367. return NULL;
  368. }
  369. static void regmap_range_exit(struct regmap *map)
  370. {
  371. struct rb_node *next;
  372. struct regmap_range_node *range_node;
  373. next = rb_first(&map->range_tree);
  374. while (next) {
  375. range_node = rb_entry(next, struct regmap_range_node, node);
  376. next = rb_next(&range_node->node);
  377. rb_erase(&range_node->node, &map->range_tree);
  378. kfree(range_node);
  379. }
  380. kfree(map->selector_work_buf);
  381. }
  382. int regmap_attach_dev(struct device *dev, struct regmap *map,
  383. const struct regmap_config *config)
  384. {
  385. struct regmap **m;
  386. map->dev = dev;
  387. regmap_debugfs_init(map, config->name);
  388. /* Add a devres resource for dev_get_regmap() */
  389. m = devres_alloc(dev_get_regmap_release, sizeof(*m), GFP_KERNEL);
  390. if (!m) {
  391. regmap_debugfs_exit(map);
  392. return -ENOMEM;
  393. }
  394. *m = map;
  395. devres_add(dev, m);
  396. return 0;
  397. }
  398. EXPORT_SYMBOL_GPL(regmap_attach_dev);
  399. static enum regmap_endian regmap_get_reg_endian(const struct regmap_bus *bus,
  400. const struct regmap_config *config)
  401. {
  402. enum regmap_endian endian;
  403. /* Retrieve the endianness specification from the regmap config */
  404. endian = config->reg_format_endian;
  405. /* If the regmap config specified a non-default value, use that */
  406. if (endian != REGMAP_ENDIAN_DEFAULT)
  407. return endian;
  408. /* Retrieve the endianness specification from the bus config */
  409. if (bus && bus->reg_format_endian_default)
  410. endian = bus->reg_format_endian_default;
  411. /* If the bus specified a non-default value, use that */
  412. if (endian != REGMAP_ENDIAN_DEFAULT)
  413. return endian;
  414. /* Use this if no other value was found */
  415. return REGMAP_ENDIAN_BIG;
  416. }
  417. enum regmap_endian regmap_get_val_endian(struct device *dev,
  418. const struct regmap_bus *bus,
  419. const struct regmap_config *config)
  420. {
  421. struct device_node *np;
  422. enum regmap_endian endian;
  423. /* Retrieve the endianness specification from the regmap config */
  424. endian = config->val_format_endian;
  425. /* If the regmap config specified a non-default value, use that */
  426. if (endian != REGMAP_ENDIAN_DEFAULT)
  427. return endian;
  428. /* If the dev and dev->of_node exist try to get endianness from DT */
  429. if (dev && dev->of_node) {
  430. np = dev->of_node;
  431. /* Parse the device's DT node for an endianness specification */
  432. if (of_property_read_bool(np, "big-endian"))
  433. endian = REGMAP_ENDIAN_BIG;
  434. else if (of_property_read_bool(np, "little-endian"))
  435. endian = REGMAP_ENDIAN_LITTLE;
  436. /* If the endianness was specified in DT, use that */
  437. if (endian != REGMAP_ENDIAN_DEFAULT)
  438. return endian;
  439. }
  440. /* Retrieve the endianness specification from the bus config */
  441. if (bus && bus->val_format_endian_default)
  442. endian = bus->val_format_endian_default;
  443. /* If the bus specified a non-default value, use that */
  444. if (endian != REGMAP_ENDIAN_DEFAULT)
  445. return endian;
  446. /* Use this if no other value was found */
  447. return REGMAP_ENDIAN_BIG;
  448. }
  449. EXPORT_SYMBOL_GPL(regmap_get_val_endian);
  450. struct regmap *__regmap_init(struct device *dev,
  451. const struct regmap_bus *bus,
  452. void *bus_context,
  453. const struct regmap_config *config,
  454. struct lock_class_key *lock_key,
  455. const char *lock_name)
  456. {
  457. struct regmap *map;
  458. int ret = -EINVAL;
  459. enum regmap_endian reg_endian, val_endian;
  460. int i, j;
  461. if (!config)
  462. goto err;
  463. map = kzalloc(sizeof(*map), GFP_KERNEL);
  464. if (map == NULL) {
  465. ret = -ENOMEM;
  466. goto err;
  467. }
  468. if (config->lock && config->unlock) {
  469. map->lock = config->lock;
  470. map->unlock = config->unlock;
  471. map->lock_arg = config->lock_arg;
  472. } else {
  473. if ((bus && bus->fast_io) ||
  474. config->fast_io) {
  475. spin_lock_init(&map->spinlock);
  476. map->lock = regmap_lock_spinlock;
  477. map->unlock = regmap_unlock_spinlock;
  478. lockdep_set_class_and_name(&map->spinlock,
  479. lock_key, lock_name);
  480. } else {
  481. mutex_init(&map->mutex);
  482. map->lock = regmap_lock_mutex;
  483. map->unlock = regmap_unlock_mutex;
  484. lockdep_set_class_and_name(&map->mutex,
  485. lock_key, lock_name);
  486. }
  487. map->lock_arg = map;
  488. }
  489. /*
  490. * When we write in fast-paths with regmap_bulk_write() don't allocate
  491. * scratch buffers with sleeping allocations.
  492. */
  493. if ((bus && bus->fast_io) || config->fast_io)
  494. map->alloc_flags = GFP_ATOMIC;
  495. else
  496. map->alloc_flags = GFP_KERNEL;
  497. map->format.reg_bytes = DIV_ROUND_UP(config->reg_bits, 8);
  498. map->format.pad_bytes = config->pad_bits / 8;
  499. map->format.val_bytes = DIV_ROUND_UP(config->val_bits, 8);
  500. map->format.buf_size = DIV_ROUND_UP(config->reg_bits +
  501. config->val_bits + config->pad_bits, 8);
  502. map->reg_shift = config->pad_bits % 8;
  503. if (config->reg_stride)
  504. map->reg_stride = config->reg_stride;
  505. else
  506. map->reg_stride = 1;
  507. map->use_single_read = config->use_single_rw || !bus || !bus->read;
  508. map->use_single_write = config->use_single_rw || !bus || !bus->write;
  509. map->can_multi_write = config->can_multi_write && bus && bus->write;
  510. if (bus) {
  511. map->max_raw_read = bus->max_raw_read;
  512. map->max_raw_write = bus->max_raw_write;
  513. }
  514. map->dev = dev;
  515. map->bus = bus;
  516. map->bus_context = bus_context;
  517. map->max_register = config->max_register;
  518. map->wr_table = config->wr_table;
  519. map->rd_table = config->rd_table;
  520. map->volatile_table = config->volatile_table;
  521. map->precious_table = config->precious_table;
  522. map->writeable_reg = config->writeable_reg;
  523. map->readable_reg = config->readable_reg;
  524. map->volatile_reg = config->volatile_reg;
  525. map->precious_reg = config->precious_reg;
  526. map->cache_type = config->cache_type;
  527. map->name = config->name;
  528. spin_lock_init(&map->async_lock);
  529. INIT_LIST_HEAD(&map->async_list);
  530. INIT_LIST_HEAD(&map->async_free);
  531. init_waitqueue_head(&map->async_waitq);
  532. if (config->read_flag_mask || config->write_flag_mask) {
  533. map->read_flag_mask = config->read_flag_mask;
  534. map->write_flag_mask = config->write_flag_mask;
  535. } else if (bus) {
  536. map->read_flag_mask = bus->read_flag_mask;
  537. }
  538. if (!bus) {
  539. map->reg_read = config->reg_read;
  540. map->reg_write = config->reg_write;
  541. map->defer_caching = false;
  542. goto skip_format_initialization;
  543. } else if (!bus->read || !bus->write) {
  544. map->reg_read = _regmap_bus_reg_read;
  545. map->reg_write = _regmap_bus_reg_write;
  546. map->defer_caching = false;
  547. goto skip_format_initialization;
  548. } else {
  549. map->reg_read = _regmap_bus_read;
  550. map->reg_update_bits = bus->reg_update_bits;
  551. }
  552. reg_endian = regmap_get_reg_endian(bus, config);
  553. val_endian = regmap_get_val_endian(dev, bus, config);
  554. switch (config->reg_bits + map->reg_shift) {
  555. case 2:
  556. switch (config->val_bits) {
  557. case 6:
  558. map->format.format_write = regmap_format_2_6_write;
  559. break;
  560. default:
  561. goto err_map;
  562. }
  563. break;
  564. case 4:
  565. switch (config->val_bits) {
  566. case 12:
  567. map->format.format_write = regmap_format_4_12_write;
  568. break;
  569. default:
  570. goto err_map;
  571. }
  572. break;
  573. case 7:
  574. switch (config->val_bits) {
  575. case 9:
  576. map->format.format_write = regmap_format_7_9_write;
  577. break;
  578. default:
  579. goto err_map;
  580. }
  581. break;
  582. case 10:
  583. switch (config->val_bits) {
  584. case 14:
  585. map->format.format_write = regmap_format_10_14_write;
  586. break;
  587. default:
  588. goto err_map;
  589. }
  590. break;
  591. case 8:
  592. map->format.format_reg = regmap_format_8;
  593. break;
  594. case 16:
  595. switch (reg_endian) {
  596. case REGMAP_ENDIAN_BIG:
  597. map->format.format_reg = regmap_format_16_be;
  598. break;
  599. case REGMAP_ENDIAN_NATIVE:
  600. map->format.format_reg = regmap_format_16_native;
  601. break;
  602. default:
  603. goto err_map;
  604. }
  605. break;
  606. case 24:
  607. if (reg_endian != REGMAP_ENDIAN_BIG)
  608. goto err_map;
  609. map->format.format_reg = regmap_format_24;
  610. break;
  611. case 32:
  612. switch (reg_endian) {
  613. case REGMAP_ENDIAN_BIG:
  614. map->format.format_reg = regmap_format_32_be;
  615. break;
  616. case REGMAP_ENDIAN_NATIVE:
  617. map->format.format_reg = regmap_format_32_native;
  618. break;
  619. default:
  620. goto err_map;
  621. }
  622. break;
  623. #ifdef CONFIG_64BIT
  624. case 64:
  625. switch (reg_endian) {
  626. case REGMAP_ENDIAN_BIG:
  627. map->format.format_reg = regmap_format_64_be;
  628. break;
  629. case REGMAP_ENDIAN_NATIVE:
  630. map->format.format_reg = regmap_format_64_native;
  631. break;
  632. default:
  633. goto err_map;
  634. }
  635. break;
  636. #endif
  637. default:
  638. goto err_map;
  639. }
  640. if (val_endian == REGMAP_ENDIAN_NATIVE)
  641. map->format.parse_inplace = regmap_parse_inplace_noop;
  642. switch (config->val_bits) {
  643. case 8:
  644. map->format.format_val = regmap_format_8;
  645. map->format.parse_val = regmap_parse_8;
  646. map->format.parse_inplace = regmap_parse_inplace_noop;
  647. break;
  648. case 16:
  649. switch (val_endian) {
  650. case REGMAP_ENDIAN_BIG:
  651. map->format.format_val = regmap_format_16_be;
  652. map->format.parse_val = regmap_parse_16_be;
  653. map->format.parse_inplace = regmap_parse_16_be_inplace;
  654. break;
  655. case REGMAP_ENDIAN_LITTLE:
  656. map->format.format_val = regmap_format_16_le;
  657. map->format.parse_val = regmap_parse_16_le;
  658. map->format.parse_inplace = regmap_parse_16_le_inplace;
  659. break;
  660. case REGMAP_ENDIAN_NATIVE:
  661. map->format.format_val = regmap_format_16_native;
  662. map->format.parse_val = regmap_parse_16_native;
  663. break;
  664. default:
  665. goto err_map;
  666. }
  667. break;
  668. case 24:
  669. if (val_endian != REGMAP_ENDIAN_BIG)
  670. goto err_map;
  671. map->format.format_val = regmap_format_24;
  672. map->format.parse_val = regmap_parse_24;
  673. break;
  674. case 32:
  675. switch (val_endian) {
  676. case REGMAP_ENDIAN_BIG:
  677. map->format.format_val = regmap_format_32_be;
  678. map->format.parse_val = regmap_parse_32_be;
  679. map->format.parse_inplace = regmap_parse_32_be_inplace;
  680. break;
  681. case REGMAP_ENDIAN_LITTLE:
  682. map->format.format_val = regmap_format_32_le;
  683. map->format.parse_val = regmap_parse_32_le;
  684. map->format.parse_inplace = regmap_parse_32_le_inplace;
  685. break;
  686. case REGMAP_ENDIAN_NATIVE:
  687. map->format.format_val = regmap_format_32_native;
  688. map->format.parse_val = regmap_parse_32_native;
  689. break;
  690. default:
  691. goto err_map;
  692. }
  693. break;
  694. #ifdef CONFIG_64BIT
  695. case 64:
  696. switch (val_endian) {
  697. case REGMAP_ENDIAN_BIG:
  698. map->format.format_val = regmap_format_64_be;
  699. map->format.parse_val = regmap_parse_64_be;
  700. map->format.parse_inplace = regmap_parse_64_be_inplace;
  701. break;
  702. case REGMAP_ENDIAN_LITTLE:
  703. map->format.format_val = regmap_format_64_le;
  704. map->format.parse_val = regmap_parse_64_le;
  705. map->format.parse_inplace = regmap_parse_64_le_inplace;
  706. break;
  707. case REGMAP_ENDIAN_NATIVE:
  708. map->format.format_val = regmap_format_64_native;
  709. map->format.parse_val = regmap_parse_64_native;
  710. break;
  711. default:
  712. goto err_map;
  713. }
  714. break;
  715. #endif
  716. }
  717. if (map->format.format_write) {
  718. if ((reg_endian != REGMAP_ENDIAN_BIG) ||
  719. (val_endian != REGMAP_ENDIAN_BIG))
  720. goto err_map;
  721. map->use_single_write = true;
  722. }
  723. if (!map->format.format_write &&
  724. !(map->format.format_reg && map->format.format_val))
  725. goto err_map;
  726. map->work_buf = kzalloc(map->format.buf_size, GFP_KERNEL);
  727. if (map->work_buf == NULL) {
  728. ret = -ENOMEM;
  729. goto err_map;
  730. }
  731. if (map->format.format_write) {
  732. map->defer_caching = false;
  733. map->reg_write = _regmap_bus_formatted_write;
  734. } else if (map->format.format_val) {
  735. map->defer_caching = true;
  736. map->reg_write = _regmap_bus_raw_write;
  737. }
  738. skip_format_initialization:
  739. map->range_tree = RB_ROOT;
  740. for (i = 0; i < config->num_ranges; i++) {
  741. const struct regmap_range_cfg *range_cfg = &config->ranges[i];
  742. struct regmap_range_node *new;
  743. /* Sanity check */
  744. if (range_cfg->range_max < range_cfg->range_min) {
  745. dev_err(map->dev, "Invalid range %d: %d < %d\n", i,
  746. range_cfg->range_max, range_cfg->range_min);
  747. goto err_range;
  748. }
  749. if (range_cfg->range_max > map->max_register) {
  750. dev_err(map->dev, "Invalid range %d: %d > %d\n", i,
  751. range_cfg->range_max, map->max_register);
  752. goto err_range;
  753. }
  754. if (range_cfg->selector_reg > map->max_register) {
  755. dev_err(map->dev,
  756. "Invalid range %d: selector out of map\n", i);
  757. goto err_range;
  758. }
  759. if (range_cfg->window_len == 0) {
  760. dev_err(map->dev, "Invalid range %d: window_len 0\n",
  761. i);
  762. goto err_range;
  763. }
  764. /* Make sure, that this register range has no selector
  765. or data window within its boundary */
  766. for (j = 0; j < config->num_ranges; j++) {
  767. unsigned sel_reg = config->ranges[j].selector_reg;
  768. unsigned win_min = config->ranges[j].window_start;
  769. unsigned win_max = win_min +
  770. config->ranges[j].window_len - 1;
  771. /* Allow data window inside its own virtual range */
  772. if (j == i)
  773. continue;
  774. if (range_cfg->range_min <= sel_reg &&
  775. sel_reg <= range_cfg->range_max) {
  776. dev_err(map->dev,
  777. "Range %d: selector for %d in window\n",
  778. i, j);
  779. goto err_range;
  780. }
  781. if (!(win_max < range_cfg->range_min ||
  782. win_min > range_cfg->range_max)) {
  783. dev_err(map->dev,
  784. "Range %d: window for %d in window\n",
  785. i, j);
  786. goto err_range;
  787. }
  788. }
  789. new = kzalloc(sizeof(*new), GFP_KERNEL);
  790. if (new == NULL) {
  791. ret = -ENOMEM;
  792. goto err_range;
  793. }
  794. new->map = map;
  795. new->name = range_cfg->name;
  796. new->range_min = range_cfg->range_min;
  797. new->range_max = range_cfg->range_max;
  798. new->selector_reg = range_cfg->selector_reg;
  799. new->selector_mask = range_cfg->selector_mask;
  800. new->selector_shift = range_cfg->selector_shift;
  801. new->window_start = range_cfg->window_start;
  802. new->window_len = range_cfg->window_len;
  803. if (!_regmap_range_add(map, new)) {
  804. dev_err(map->dev, "Failed to add range %d\n", i);
  805. kfree(new);
  806. goto err_range;
  807. }
  808. if (map->selector_work_buf == NULL) {
  809. map->selector_work_buf =
  810. kzalloc(map->format.buf_size, GFP_KERNEL);
  811. if (map->selector_work_buf == NULL) {
  812. ret = -ENOMEM;
  813. goto err_range;
  814. }
  815. }
  816. }
  817. ret = regcache_init(map, config);
  818. if (ret != 0)
  819. goto err_range;
  820. if (dev) {
  821. ret = regmap_attach_dev(dev, map, config);
  822. if (ret != 0)
  823. goto err_regcache;
  824. }
  825. return map;
  826. err_regcache:
  827. regcache_exit(map);
  828. err_range:
  829. regmap_range_exit(map);
  830. kfree(map->work_buf);
  831. err_map:
  832. kfree(map);
  833. err:
  834. return ERR_PTR(ret);
  835. }
  836. EXPORT_SYMBOL_GPL(__regmap_init);
  837. static void devm_regmap_release(struct device *dev, void *res)
  838. {
  839. regmap_exit(*(struct regmap **)res);
  840. }
  841. struct regmap *__devm_regmap_init(struct device *dev,
  842. const struct regmap_bus *bus,
  843. void *bus_context,
  844. const struct regmap_config *config,
  845. struct lock_class_key *lock_key,
  846. const char *lock_name)
  847. {
  848. struct regmap **ptr, *regmap;
  849. ptr = devres_alloc(devm_regmap_release, sizeof(*ptr), GFP_KERNEL);
  850. if (!ptr)
  851. return ERR_PTR(-ENOMEM);
  852. regmap = __regmap_init(dev, bus, bus_context, config,
  853. lock_key, lock_name);
  854. if (!IS_ERR(regmap)) {
  855. *ptr = regmap;
  856. devres_add(dev, ptr);
  857. } else {
  858. devres_free(ptr);
  859. }
  860. return regmap;
  861. }
  862. EXPORT_SYMBOL_GPL(__devm_regmap_init);
  863. static void regmap_field_init(struct regmap_field *rm_field,
  864. struct regmap *regmap, struct reg_field reg_field)
  865. {
  866. rm_field->regmap = regmap;
  867. rm_field->reg = reg_field.reg;
  868. rm_field->shift = reg_field.lsb;
  869. rm_field->mask = GENMASK(reg_field.msb, reg_field.lsb);
  870. rm_field->id_size = reg_field.id_size;
  871. rm_field->id_offset = reg_field.id_offset;
  872. }
  873. /**
  874. * devm_regmap_field_alloc(): Allocate and initialise a register field
  875. * in a register map.
  876. *
  877. * @dev: Device that will be interacted with
  878. * @regmap: regmap bank in which this register field is located.
  879. * @reg_field: Register field with in the bank.
  880. *
  881. * The return value will be an ERR_PTR() on error or a valid pointer
  882. * to a struct regmap_field. The regmap_field will be automatically freed
  883. * by the device management code.
  884. */
  885. struct regmap_field *devm_regmap_field_alloc(struct device *dev,
  886. struct regmap *regmap, struct reg_field reg_field)
  887. {
  888. struct regmap_field *rm_field = devm_kzalloc(dev,
  889. sizeof(*rm_field), GFP_KERNEL);
  890. if (!rm_field)
  891. return ERR_PTR(-ENOMEM);
  892. regmap_field_init(rm_field, regmap, reg_field);
  893. return rm_field;
  894. }
  895. EXPORT_SYMBOL_GPL(devm_regmap_field_alloc);
  896. /**
  897. * devm_regmap_field_free(): Free register field allocated using
  898. * devm_regmap_field_alloc. Usally drivers need not call this function,
  899. * as the memory allocated via devm will be freed as per device-driver
  900. * life-cyle.
  901. *
  902. * @dev: Device that will be interacted with
  903. * @field: regmap field which should be freed.
  904. */
  905. void devm_regmap_field_free(struct device *dev,
  906. struct regmap_field *field)
  907. {
  908. devm_kfree(dev, field);
  909. }
  910. EXPORT_SYMBOL_GPL(devm_regmap_field_free);
  911. /**
  912. * regmap_field_alloc(): Allocate and initialise a register field
  913. * in a register map.
  914. *
  915. * @regmap: regmap bank in which this register field is located.
  916. * @reg_field: Register field with in the bank.
  917. *
  918. * The return value will be an ERR_PTR() on error or a valid pointer
  919. * to a struct regmap_field. The regmap_field should be freed by the
  920. * user once its finished working with it using regmap_field_free().
  921. */
  922. struct regmap_field *regmap_field_alloc(struct regmap *regmap,
  923. struct reg_field reg_field)
  924. {
  925. struct regmap_field *rm_field = kzalloc(sizeof(*rm_field), GFP_KERNEL);
  926. if (!rm_field)
  927. return ERR_PTR(-ENOMEM);
  928. regmap_field_init(rm_field, regmap, reg_field);
  929. return rm_field;
  930. }
  931. EXPORT_SYMBOL_GPL(regmap_field_alloc);
  932. /**
  933. * regmap_field_free(): Free register field allocated using regmap_field_alloc
  934. *
  935. * @field: regmap field which should be freed.
  936. */
  937. void regmap_field_free(struct regmap_field *field)
  938. {
  939. kfree(field);
  940. }
  941. EXPORT_SYMBOL_GPL(regmap_field_free);
  942. /**
  943. * regmap_reinit_cache(): Reinitialise the current register cache
  944. *
  945. * @map: Register map to operate on.
  946. * @config: New configuration. Only the cache data will be used.
  947. *
  948. * Discard any existing register cache for the map and initialize a
  949. * new cache. This can be used to restore the cache to defaults or to
  950. * update the cache configuration to reflect runtime discovery of the
  951. * hardware.
  952. *
  953. * No explicit locking is done here, the user needs to ensure that
  954. * this function will not race with other calls to regmap.
  955. */
  956. int regmap_reinit_cache(struct regmap *map, const struct regmap_config *config)
  957. {
  958. regcache_exit(map);
  959. regmap_debugfs_exit(map);
  960. map->max_register = config->max_register;
  961. map->writeable_reg = config->writeable_reg;
  962. map->readable_reg = config->readable_reg;
  963. map->volatile_reg = config->volatile_reg;
  964. map->precious_reg = config->precious_reg;
  965. map->cache_type = config->cache_type;
  966. regmap_debugfs_init(map, config->name);
  967. map->cache_bypass = false;
  968. map->cache_only = false;
  969. return regcache_init(map, config);
  970. }
  971. EXPORT_SYMBOL_GPL(regmap_reinit_cache);
  972. /**
  973. * regmap_exit(): Free a previously allocated register map
  974. */
  975. void regmap_exit(struct regmap *map)
  976. {
  977. struct regmap_async *async;
  978. regcache_exit(map);
  979. regmap_debugfs_exit(map);
  980. regmap_range_exit(map);
  981. if (map->bus && map->bus->free_context)
  982. map->bus->free_context(map->bus_context);
  983. kfree(map->work_buf);
  984. while (!list_empty(&map->async_free)) {
  985. async = list_first_entry_or_null(&map->async_free,
  986. struct regmap_async,
  987. list);
  988. list_del(&async->list);
  989. kfree(async->work_buf);
  990. kfree(async);
  991. }
  992. kfree(map);
  993. }
  994. EXPORT_SYMBOL_GPL(regmap_exit);
  995. static int dev_get_regmap_match(struct device *dev, void *res, void *data)
  996. {
  997. struct regmap **r = res;
  998. if (!r || !*r) {
  999. WARN_ON(!r || !*r);
  1000. return 0;
  1001. }
  1002. /* If the user didn't specify a name match any */
  1003. if (data)
  1004. return (*r)->name == data;
  1005. else
  1006. return 1;
  1007. }
  1008. /**
  1009. * dev_get_regmap(): Obtain the regmap (if any) for a device
  1010. *
  1011. * @dev: Device to retrieve the map for
  1012. * @name: Optional name for the register map, usually NULL.
  1013. *
  1014. * Returns the regmap for the device if one is present, or NULL. If
  1015. * name is specified then it must match the name specified when
  1016. * registering the device, if it is NULL then the first regmap found
  1017. * will be used. Devices with multiple register maps are very rare,
  1018. * generic code should normally not need to specify a name.
  1019. */
  1020. struct regmap *dev_get_regmap(struct device *dev, const char *name)
  1021. {
  1022. struct regmap **r = devres_find(dev, dev_get_regmap_release,
  1023. dev_get_regmap_match, (void *)name);
  1024. if (!r)
  1025. return NULL;
  1026. return *r;
  1027. }
  1028. EXPORT_SYMBOL_GPL(dev_get_regmap);
  1029. /**
  1030. * regmap_get_device(): Obtain the device from a regmap
  1031. *
  1032. * @map: Register map to operate on.
  1033. *
  1034. * Returns the underlying device that the regmap has been created for.
  1035. */
  1036. struct device *regmap_get_device(struct regmap *map)
  1037. {
  1038. return map->dev;
  1039. }
  1040. EXPORT_SYMBOL_GPL(regmap_get_device);
  1041. static int _regmap_select_page(struct regmap *map, unsigned int *reg,
  1042. struct regmap_range_node *range,
  1043. unsigned int val_num)
  1044. {
  1045. void *orig_work_buf;
  1046. unsigned int win_offset;
  1047. unsigned int win_page;
  1048. bool page_chg;
  1049. int ret;
  1050. win_offset = (*reg - range->range_min) % range->window_len;
  1051. win_page = (*reg - range->range_min) / range->window_len;
  1052. if (val_num > 1) {
  1053. /* Bulk write shouldn't cross range boundary */
  1054. if (*reg + val_num - 1 > range->range_max)
  1055. return -EINVAL;
  1056. /* ... or single page boundary */
  1057. if (val_num > range->window_len - win_offset)
  1058. return -EINVAL;
  1059. }
  1060. /* It is possible to have selector register inside data window.
  1061. In that case, selector register is located on every page and
  1062. it needs no page switching, when accessed alone. */
  1063. if (val_num > 1 ||
  1064. range->window_start + win_offset != range->selector_reg) {
  1065. /* Use separate work_buf during page switching */
  1066. orig_work_buf = map->work_buf;
  1067. map->work_buf = map->selector_work_buf;
  1068. ret = _regmap_update_bits(map, range->selector_reg,
  1069. range->selector_mask,
  1070. win_page << range->selector_shift,
  1071. &page_chg, false);
  1072. map->work_buf = orig_work_buf;
  1073. if (ret != 0)
  1074. return ret;
  1075. }
  1076. *reg = range->window_start + win_offset;
  1077. return 0;
  1078. }
  1079. int _regmap_raw_write(struct regmap *map, unsigned int reg,
  1080. const void *val, size_t val_len)
  1081. {
  1082. struct regmap_range_node *range;
  1083. unsigned long flags;
  1084. u8 *u8 = map->work_buf;
  1085. void *work_val = map->work_buf + map->format.reg_bytes +
  1086. map->format.pad_bytes;
  1087. void *buf;
  1088. int ret = -ENOTSUPP;
  1089. size_t len;
  1090. int i;
  1091. WARN_ON(!map->bus);
  1092. /* Check for unwritable registers before we start */
  1093. if (map->writeable_reg)
  1094. for (i = 0; i < val_len / map->format.val_bytes; i++)
  1095. if (!map->writeable_reg(map->dev,
  1096. reg + (i * map->reg_stride)))
  1097. return -EINVAL;
  1098. if (!map->cache_bypass && map->format.parse_val) {
  1099. unsigned int ival;
  1100. int val_bytes = map->format.val_bytes;
  1101. for (i = 0; i < val_len / val_bytes; i++) {
  1102. ival = map->format.parse_val(val + (i * val_bytes));
  1103. ret = regcache_write(map, reg + (i * map->reg_stride),
  1104. ival);
  1105. if (ret) {
  1106. dev_err(map->dev,
  1107. "Error in caching of register: %x ret: %d\n",
  1108. reg + i, ret);
  1109. return ret;
  1110. }
  1111. }
  1112. if (map->cache_only) {
  1113. map->cache_dirty = true;
  1114. return 0;
  1115. }
  1116. }
  1117. range = _regmap_range_lookup(map, reg);
  1118. if (range) {
  1119. int val_num = val_len / map->format.val_bytes;
  1120. int win_offset = (reg - range->range_min) % range->window_len;
  1121. int win_residue = range->window_len - win_offset;
  1122. /* If the write goes beyond the end of the window split it */
  1123. while (val_num > win_residue) {
  1124. dev_dbg(map->dev, "Writing window %d/%zu\n",
  1125. win_residue, val_len / map->format.val_bytes);
  1126. ret = _regmap_raw_write(map, reg, val, win_residue *
  1127. map->format.val_bytes);
  1128. if (ret != 0)
  1129. return ret;
  1130. reg += win_residue;
  1131. val_num -= win_residue;
  1132. val += win_residue * map->format.val_bytes;
  1133. val_len -= win_residue * map->format.val_bytes;
  1134. win_offset = (reg - range->range_min) %
  1135. range->window_len;
  1136. win_residue = range->window_len - win_offset;
  1137. }
  1138. ret = _regmap_select_page(map, &reg, range, val_num);
  1139. if (ret != 0)
  1140. return ret;
  1141. }
  1142. map->format.format_reg(map->work_buf, reg, map->reg_shift);
  1143. u8[0] |= map->write_flag_mask;
  1144. /*
  1145. * Essentially all I/O mechanisms will be faster with a single
  1146. * buffer to write. Since register syncs often generate raw
  1147. * writes of single registers optimise that case.
  1148. */
  1149. if (val != work_val && val_len == map->format.val_bytes) {
  1150. memcpy(work_val, val, map->format.val_bytes);
  1151. val = work_val;
  1152. }
  1153. if (map->async && map->bus->async_write) {
  1154. struct regmap_async *async;
  1155. trace_regmap_async_write_start(map, reg, val_len);
  1156. spin_lock_irqsave(&map->async_lock, flags);
  1157. async = list_first_entry_or_null(&map->async_free,
  1158. struct regmap_async,
  1159. list);
  1160. if (async)
  1161. list_del(&async->list);
  1162. spin_unlock_irqrestore(&map->async_lock, flags);
  1163. if (!async) {
  1164. async = map->bus->async_alloc();
  1165. if (!async)
  1166. return -ENOMEM;
  1167. async->work_buf = kzalloc(map->format.buf_size,
  1168. GFP_KERNEL | GFP_DMA);
  1169. if (!async->work_buf) {
  1170. kfree(async);
  1171. return -ENOMEM;
  1172. }
  1173. }
  1174. async->map = map;
  1175. /* If the caller supplied the value we can use it safely. */
  1176. memcpy(async->work_buf, map->work_buf, map->format.pad_bytes +
  1177. map->format.reg_bytes + map->format.val_bytes);
  1178. spin_lock_irqsave(&map->async_lock, flags);
  1179. list_add_tail(&async->list, &map->async_list);
  1180. spin_unlock_irqrestore(&map->async_lock, flags);
  1181. if (val != work_val)
  1182. ret = map->bus->async_write(map->bus_context,
  1183. async->work_buf,
  1184. map->format.reg_bytes +
  1185. map->format.pad_bytes,
  1186. val, val_len, async);
  1187. else
  1188. ret = map->bus->async_write(map->bus_context,
  1189. async->work_buf,
  1190. map->format.reg_bytes +
  1191. map->format.pad_bytes +
  1192. val_len, NULL, 0, async);
  1193. if (ret != 0) {
  1194. dev_err(map->dev, "Failed to schedule write: %d\n",
  1195. ret);
  1196. spin_lock_irqsave(&map->async_lock, flags);
  1197. list_move(&async->list, &map->async_free);
  1198. spin_unlock_irqrestore(&map->async_lock, flags);
  1199. }
  1200. return ret;
  1201. }
  1202. trace_regmap_hw_write_start(map, reg, val_len / map->format.val_bytes);
  1203. /* If we're doing a single register write we can probably just
  1204. * send the work_buf directly, otherwise try to do a gather
  1205. * write.
  1206. */
  1207. if (val == work_val)
  1208. ret = map->bus->write(map->bus_context, map->work_buf,
  1209. map->format.reg_bytes +
  1210. map->format.pad_bytes +
  1211. val_len);
  1212. else if (map->bus->gather_write)
  1213. ret = map->bus->gather_write(map->bus_context, map->work_buf,
  1214. map->format.reg_bytes +
  1215. map->format.pad_bytes,
  1216. val, val_len);
  1217. /* If that didn't work fall back on linearising by hand. */
  1218. if (ret == -ENOTSUPP) {
  1219. len = map->format.reg_bytes + map->format.pad_bytes + val_len;
  1220. buf = kzalloc(len, GFP_KERNEL);
  1221. if (!buf)
  1222. return -ENOMEM;
  1223. memcpy(buf, map->work_buf, map->format.reg_bytes);
  1224. memcpy(buf + map->format.reg_bytes + map->format.pad_bytes,
  1225. val, val_len);
  1226. ret = map->bus->write(map->bus_context, buf, len);
  1227. kfree(buf);
  1228. }
  1229. trace_regmap_hw_write_done(map, reg, val_len / map->format.val_bytes);
  1230. return ret;
  1231. }
  1232. /**
  1233. * regmap_can_raw_write - Test if regmap_raw_write() is supported
  1234. *
  1235. * @map: Map to check.
  1236. */
  1237. bool regmap_can_raw_write(struct regmap *map)
  1238. {
  1239. return map->bus && map->bus->write && map->format.format_val &&
  1240. map->format.format_reg;
  1241. }
  1242. EXPORT_SYMBOL_GPL(regmap_can_raw_write);
  1243. /**
  1244. * regmap_get_raw_read_max - Get the maximum size we can read
  1245. *
  1246. * @map: Map to check.
  1247. */
  1248. size_t regmap_get_raw_read_max(struct regmap *map)
  1249. {
  1250. return map->max_raw_read;
  1251. }
  1252. EXPORT_SYMBOL_GPL(regmap_get_raw_read_max);
  1253. /**
  1254. * regmap_get_raw_write_max - Get the maximum size we can read
  1255. *
  1256. * @map: Map to check.
  1257. */
  1258. size_t regmap_get_raw_write_max(struct regmap *map)
  1259. {
  1260. return map->max_raw_write;
  1261. }
  1262. EXPORT_SYMBOL_GPL(regmap_get_raw_write_max);
  1263. static int _regmap_bus_formatted_write(void *context, unsigned int reg,
  1264. unsigned int val)
  1265. {
  1266. int ret;
  1267. struct regmap_range_node *range;
  1268. struct regmap *map = context;
  1269. WARN_ON(!map->bus || !map->format.format_write);
  1270. range = _regmap_range_lookup(map, reg);
  1271. if (range) {
  1272. ret = _regmap_select_page(map, &reg, range, 1);
  1273. if (ret != 0)
  1274. return ret;
  1275. }
  1276. map->format.format_write(map, reg, val);
  1277. trace_regmap_hw_write_start(map, reg, 1);
  1278. ret = map->bus->write(map->bus_context, map->work_buf,
  1279. map->format.buf_size);
  1280. trace_regmap_hw_write_done(map, reg, 1);
  1281. return ret;
  1282. }
  1283. static int _regmap_bus_reg_write(void *context, unsigned int reg,
  1284. unsigned int val)
  1285. {
  1286. struct regmap *map = context;
  1287. return map->bus->reg_write(map->bus_context, reg, val);
  1288. }
  1289. static int _regmap_bus_raw_write(void *context, unsigned int reg,
  1290. unsigned int val)
  1291. {
  1292. struct regmap *map = context;
  1293. WARN_ON(!map->bus || !map->format.format_val);
  1294. map->format.format_val(map->work_buf + map->format.reg_bytes
  1295. + map->format.pad_bytes, val, 0);
  1296. return _regmap_raw_write(map, reg,
  1297. map->work_buf +
  1298. map->format.reg_bytes +
  1299. map->format.pad_bytes,
  1300. map->format.val_bytes);
  1301. }
  1302. static inline void *_regmap_map_get_context(struct regmap *map)
  1303. {
  1304. return (map->bus) ? map : map->bus_context;
  1305. }
  1306. int _regmap_write(struct regmap *map, unsigned int reg,
  1307. unsigned int val)
  1308. {
  1309. int ret;
  1310. void *context = _regmap_map_get_context(map);
  1311. if (!regmap_writeable(map, reg))
  1312. return -EIO;
  1313. if (!map->cache_bypass && !map->defer_caching) {
  1314. ret = regcache_write(map, reg, val);
  1315. if (ret != 0)
  1316. return ret;
  1317. if (map->cache_only) {
  1318. map->cache_dirty = true;
  1319. return 0;
  1320. }
  1321. }
  1322. #ifdef LOG_DEVICE
  1323. if (map->dev && strcmp(dev_name(map->dev), LOG_DEVICE) == 0)
  1324. dev_info(map->dev, "%x <= %x\n", reg, val);
  1325. #endif
  1326. trace_regmap_reg_write(map, reg, val);
  1327. return map->reg_write(context, reg, val);
  1328. }
  1329. /**
  1330. * regmap_write(): Write a value to a single register
  1331. *
  1332. * @map: Register map to write to
  1333. * @reg: Register to write to
  1334. * @val: Value to be written
  1335. *
  1336. * A value of zero will be returned on success, a negative errno will
  1337. * be returned in error cases.
  1338. */
  1339. int regmap_write(struct regmap *map, unsigned int reg, unsigned int val)
  1340. {
  1341. int ret;
  1342. if (!IS_ALIGNED(reg, map->reg_stride))
  1343. return -EINVAL;
  1344. map->lock(map->lock_arg);
  1345. ret = _regmap_write(map, reg, val);
  1346. map->unlock(map->lock_arg);
  1347. return ret;
  1348. }
  1349. EXPORT_SYMBOL_GPL(regmap_write);
  1350. /**
  1351. * regmap_write_async(): Write a value to a single register asynchronously
  1352. *
  1353. * @map: Register map to write to
  1354. * @reg: Register to write to
  1355. * @val: Value to be written
  1356. *
  1357. * A value of zero will be returned on success, a negative errno will
  1358. * be returned in error cases.
  1359. */
  1360. int regmap_write_async(struct regmap *map, unsigned int reg, unsigned int val)
  1361. {
  1362. int ret;
  1363. if (!IS_ALIGNED(reg, map->reg_stride))
  1364. return -EINVAL;
  1365. map->lock(map->lock_arg);
  1366. map->async = true;
  1367. ret = _regmap_write(map, reg, val);
  1368. map->async = false;
  1369. map->unlock(map->lock_arg);
  1370. return ret;
  1371. }
  1372. EXPORT_SYMBOL_GPL(regmap_write_async);
  1373. /**
  1374. * regmap_raw_write(): Write raw values to one or more registers
  1375. *
  1376. * @map: Register map to write to
  1377. * @reg: Initial register to write to
  1378. * @val: Block of data to be written, laid out for direct transmission to the
  1379. * device
  1380. * @val_len: Length of data pointed to by val.
  1381. *
  1382. * This function is intended to be used for things like firmware
  1383. * download where a large block of data needs to be transferred to the
  1384. * device. No formatting will be done on the data provided.
  1385. *
  1386. * A value of zero will be returned on success, a negative errno will
  1387. * be returned in error cases.
  1388. */
  1389. int regmap_raw_write(struct regmap *map, unsigned int reg,
  1390. const void *val, size_t val_len)
  1391. {
  1392. int ret;
  1393. if (!regmap_can_raw_write(map))
  1394. return -EINVAL;
  1395. if (val_len % map->format.val_bytes)
  1396. return -EINVAL;
  1397. if (map->max_raw_write && map->max_raw_write > val_len)
  1398. return -E2BIG;
  1399. map->lock(map->lock_arg);
  1400. ret = _regmap_raw_write(map, reg, val, val_len);
  1401. map->unlock(map->lock_arg);
  1402. return ret;
  1403. }
  1404. EXPORT_SYMBOL_GPL(regmap_raw_write);
  1405. /**
  1406. * regmap_field_write(): Write a value to a single register field
  1407. *
  1408. * @field: Register field to write to
  1409. * @val: Value to be written
  1410. *
  1411. * A value of zero will be returned on success, a negative errno will
  1412. * be returned in error cases.
  1413. */
  1414. int regmap_field_write(struct regmap_field *field, unsigned int val)
  1415. {
  1416. return regmap_update_bits(field->regmap, field->reg,
  1417. field->mask, val << field->shift);
  1418. }
  1419. EXPORT_SYMBOL_GPL(regmap_field_write);
  1420. /**
  1421. * regmap_field_update_bits(): Perform a read/modify/write cycle
  1422. * on the register field
  1423. *
  1424. * @field: Register field to write to
  1425. * @mask: Bitmask to change
  1426. * @val: Value to be written
  1427. *
  1428. * A value of zero will be returned on success, a negative errno will
  1429. * be returned in error cases.
  1430. */
  1431. int regmap_field_update_bits(struct regmap_field *field, unsigned int mask, unsigned int val)
  1432. {
  1433. mask = (mask << field->shift) & field->mask;
  1434. return regmap_update_bits(field->regmap, field->reg,
  1435. mask, val << field->shift);
  1436. }
  1437. EXPORT_SYMBOL_GPL(regmap_field_update_bits);
  1438. /**
  1439. * regmap_fields_write(): Write a value to a single register field with port ID
  1440. *
  1441. * @field: Register field to write to
  1442. * @id: port ID
  1443. * @val: Value to be written
  1444. *
  1445. * A value of zero will be returned on success, a negative errno will
  1446. * be returned in error cases.
  1447. */
  1448. int regmap_fields_write(struct regmap_field *field, unsigned int id,
  1449. unsigned int val)
  1450. {
  1451. if (id >= field->id_size)
  1452. return -EINVAL;
  1453. return regmap_update_bits(field->regmap,
  1454. field->reg + (field->id_offset * id),
  1455. field->mask, val << field->shift);
  1456. }
  1457. EXPORT_SYMBOL_GPL(regmap_fields_write);
  1458. int regmap_fields_force_write(struct regmap_field *field, unsigned int id,
  1459. unsigned int val)
  1460. {
  1461. if (id >= field->id_size)
  1462. return -EINVAL;
  1463. return regmap_write_bits(field->regmap,
  1464. field->reg + (field->id_offset * id),
  1465. field->mask, val << field->shift);
  1466. }
  1467. EXPORT_SYMBOL_GPL(regmap_fields_force_write);
  1468. /**
  1469. * regmap_fields_update_bits(): Perform a read/modify/write cycle
  1470. * on the register field
  1471. *
  1472. * @field: Register field to write to
  1473. * @id: port ID
  1474. * @mask: Bitmask to change
  1475. * @val: Value to be written
  1476. *
  1477. * A value of zero will be returned on success, a negative errno will
  1478. * be returned in error cases.
  1479. */
  1480. int regmap_fields_update_bits(struct regmap_field *field, unsigned int id,
  1481. unsigned int mask, unsigned int val)
  1482. {
  1483. if (id >= field->id_size)
  1484. return -EINVAL;
  1485. mask = (mask << field->shift) & field->mask;
  1486. return regmap_update_bits(field->regmap,
  1487. field->reg + (field->id_offset * id),
  1488. mask, val << field->shift);
  1489. }
  1490. EXPORT_SYMBOL_GPL(regmap_fields_update_bits);
  1491. /*
  1492. * regmap_bulk_write(): Write multiple registers to the device
  1493. *
  1494. * @map: Register map to write to
  1495. * @reg: First register to be write from
  1496. * @val: Block of data to be written, in native register size for device
  1497. * @val_count: Number of registers to write
  1498. *
  1499. * This function is intended to be used for writing a large block of
  1500. * data to the device either in single transfer or multiple transfer.
  1501. *
  1502. * A value of zero will be returned on success, a negative errno will
  1503. * be returned in error cases.
  1504. */
  1505. int regmap_bulk_write(struct regmap *map, unsigned int reg, const void *val,
  1506. size_t val_count)
  1507. {
  1508. int ret = 0, i;
  1509. size_t val_bytes = map->format.val_bytes;
  1510. size_t total_size = val_bytes * val_count;
  1511. if (map->bus && !map->format.parse_inplace)
  1512. return -EINVAL;
  1513. if (!IS_ALIGNED(reg, map->reg_stride))
  1514. return -EINVAL;
  1515. /*
  1516. * Some devices don't support bulk write, for
  1517. * them we have a series of single write operations in the first two if
  1518. * blocks.
  1519. *
  1520. * The first if block is used for memory mapped io. It does not allow
  1521. * val_bytes of 3 for example.
  1522. * The second one is used for busses which do not have this limitation
  1523. * and can write arbitrary value lengths.
  1524. */
  1525. if (!map->bus) {
  1526. map->lock(map->lock_arg);
  1527. for (i = 0; i < val_count; i++) {
  1528. unsigned int ival;
  1529. switch (val_bytes) {
  1530. case 1:
  1531. ival = *(u8 *)(val + (i * val_bytes));
  1532. break;
  1533. case 2:
  1534. ival = *(u16 *)(val + (i * val_bytes));
  1535. break;
  1536. case 4:
  1537. ival = *(u32 *)(val + (i * val_bytes));
  1538. break;
  1539. #ifdef CONFIG_64BIT
  1540. case 8:
  1541. ival = *(u64 *)(val + (i * val_bytes));
  1542. break;
  1543. #endif
  1544. default:
  1545. ret = -EINVAL;
  1546. goto out;
  1547. }
  1548. ret = _regmap_write(map, reg + (i * map->reg_stride),
  1549. ival);
  1550. if (ret != 0)
  1551. goto out;
  1552. }
  1553. out:
  1554. map->unlock(map->lock_arg);
  1555. } else if (map->use_single_write ||
  1556. (map->max_raw_write && map->max_raw_write < total_size)) {
  1557. int chunk_stride = map->reg_stride;
  1558. size_t chunk_size = val_bytes;
  1559. size_t chunk_count = val_count;
  1560. if (!map->use_single_write) {
  1561. chunk_size = map->max_raw_write;
  1562. if (chunk_size % val_bytes)
  1563. chunk_size -= chunk_size % val_bytes;
  1564. chunk_count = total_size / chunk_size;
  1565. chunk_stride *= chunk_size / val_bytes;
  1566. }
  1567. map->lock(map->lock_arg);
  1568. /* Write as many bytes as possible with chunk_size */
  1569. for (i = 0; i < chunk_count; i++) {
  1570. ret = _regmap_raw_write(map,
  1571. reg + (i * chunk_stride),
  1572. val + (i * chunk_size),
  1573. chunk_size);
  1574. if (ret)
  1575. break;
  1576. }
  1577. /* Write remaining bytes */
  1578. if (!ret && chunk_size * i < total_size) {
  1579. ret = _regmap_raw_write(map, reg + (i * chunk_stride),
  1580. val + (i * chunk_size),
  1581. total_size - i * chunk_size);
  1582. }
  1583. map->unlock(map->lock_arg);
  1584. } else {
  1585. void *wval;
  1586. if (!val_count)
  1587. return -EINVAL;
  1588. wval = kmemdup(val, val_count * val_bytes, map->alloc_flags);
  1589. if (!wval) {
  1590. dev_err(map->dev, "Error in memory allocation\n");
  1591. return -ENOMEM;
  1592. }
  1593. for (i = 0; i < val_count * val_bytes; i += val_bytes)
  1594. map->format.parse_inplace(wval + i);
  1595. map->lock(map->lock_arg);
  1596. ret = _regmap_raw_write(map, reg, wval, val_bytes * val_count);
  1597. map->unlock(map->lock_arg);
  1598. kfree(wval);
  1599. }
  1600. return ret;
  1601. }
  1602. EXPORT_SYMBOL_GPL(regmap_bulk_write);
  1603. /*
  1604. * _regmap_raw_multi_reg_write()
  1605. *
  1606. * the (register,newvalue) pairs in regs have not been formatted, but
  1607. * they are all in the same page and have been changed to being page
  1608. * relative. The page register has been written if that was necessary.
  1609. */
  1610. static int _regmap_raw_multi_reg_write(struct regmap *map,
  1611. const struct reg_sequence *regs,
  1612. size_t num_regs)
  1613. {
  1614. int ret;
  1615. void *buf;
  1616. int i;
  1617. u8 *u8;
  1618. size_t val_bytes = map->format.val_bytes;
  1619. size_t reg_bytes = map->format.reg_bytes;
  1620. size_t pad_bytes = map->format.pad_bytes;
  1621. size_t pair_size = reg_bytes + pad_bytes + val_bytes;
  1622. size_t len = pair_size * num_regs;
  1623. if (!len)
  1624. return -EINVAL;
  1625. buf = kzalloc(len, GFP_KERNEL);
  1626. if (!buf)
  1627. return -ENOMEM;
  1628. /* We have to linearise by hand. */
  1629. u8 = buf;
  1630. for (i = 0; i < num_regs; i++) {
  1631. unsigned int reg = regs[i].reg;
  1632. unsigned int val = regs[i].def;
  1633. trace_regmap_hw_write_start(map, reg, 1);
  1634. map->format.format_reg(u8, reg, map->reg_shift);
  1635. u8 += reg_bytes + pad_bytes;
  1636. map->format.format_val(u8, val, 0);
  1637. u8 += val_bytes;
  1638. }
  1639. u8 = buf;
  1640. *u8 |= map->write_flag_mask;
  1641. ret = map->bus->write(map->bus_context, buf, len);
  1642. kfree(buf);
  1643. for (i = 0; i < num_regs; i++) {
  1644. int reg = regs[i].reg;
  1645. trace_regmap_hw_write_done(map, reg, 1);
  1646. }
  1647. return ret;
  1648. }
  1649. static unsigned int _regmap_register_page(struct regmap *map,
  1650. unsigned int reg,
  1651. struct regmap_range_node *range)
  1652. {
  1653. unsigned int win_page = (reg - range->range_min) / range->window_len;
  1654. return win_page;
  1655. }
  1656. static int _regmap_range_multi_paged_reg_write(struct regmap *map,
  1657. struct reg_sequence *regs,
  1658. size_t num_regs)
  1659. {
  1660. int ret;
  1661. int i, n;
  1662. struct reg_sequence *base;
  1663. unsigned int this_page = 0;
  1664. unsigned int page_change = 0;
  1665. /*
  1666. * the set of registers are not neccessarily in order, but
  1667. * since the order of write must be preserved this algorithm
  1668. * chops the set each time the page changes. This also applies
  1669. * if there is a delay required at any point in the sequence.
  1670. */
  1671. base = regs;
  1672. for (i = 0, n = 0; i < num_regs; i++, n++) {
  1673. unsigned int reg = regs[i].reg;
  1674. struct regmap_range_node *range;
  1675. range = _regmap_range_lookup(map, reg);
  1676. if (range) {
  1677. unsigned int win_page = _regmap_register_page(map, reg,
  1678. range);
  1679. if (i == 0)
  1680. this_page = win_page;
  1681. if (win_page != this_page) {
  1682. this_page = win_page;
  1683. page_change = 1;
  1684. }
  1685. }
  1686. /* If we have both a page change and a delay make sure to
  1687. * write the regs and apply the delay before we change the
  1688. * page.
  1689. */
  1690. if (page_change || regs[i].delay_us) {
  1691. /* For situations where the first write requires
  1692. * a delay we need to make sure we don't call
  1693. * raw_multi_reg_write with n=0
  1694. * This can't occur with page breaks as we
  1695. * never write on the first iteration
  1696. */
  1697. if (regs[i].delay_us && i == 0)
  1698. n = 1;
  1699. ret = _regmap_raw_multi_reg_write(map, base, n);
  1700. if (ret != 0)
  1701. return ret;
  1702. if (regs[i].delay_us)
  1703. udelay(regs[i].delay_us);
  1704. base += n;
  1705. n = 0;
  1706. if (page_change) {
  1707. ret = _regmap_select_page(map,
  1708. &base[n].reg,
  1709. range, 1);
  1710. if (ret != 0)
  1711. return ret;
  1712. page_change = 0;
  1713. }
  1714. }
  1715. }
  1716. if (n > 0)
  1717. return _regmap_raw_multi_reg_write(map, base, n);
  1718. return 0;
  1719. }
  1720. static int _regmap_multi_reg_write(struct regmap *map,
  1721. const struct reg_sequence *regs,
  1722. size_t num_regs)
  1723. {
  1724. int i;
  1725. int ret;
  1726. if (!map->can_multi_write) {
  1727. for (i = 0; i < num_regs; i++) {
  1728. ret = _regmap_write(map, regs[i].reg, regs[i].def);
  1729. if (ret != 0)
  1730. return ret;
  1731. if (regs[i].delay_us)
  1732. udelay(regs[i].delay_us);
  1733. }
  1734. return 0;
  1735. }
  1736. if (!map->format.parse_inplace)
  1737. return -EINVAL;
  1738. if (map->writeable_reg)
  1739. for (i = 0; i < num_regs; i++) {
  1740. int reg = regs[i].reg;
  1741. if (!map->writeable_reg(map->dev, reg))
  1742. return -EINVAL;
  1743. if (!IS_ALIGNED(reg, map->reg_stride))
  1744. return -EINVAL;
  1745. }
  1746. if (!map->cache_bypass) {
  1747. for (i = 0; i < num_regs; i++) {
  1748. unsigned int val = regs[i].def;
  1749. unsigned int reg = regs[i].reg;
  1750. ret = regcache_write(map, reg, val);
  1751. if (ret) {
  1752. dev_err(map->dev,
  1753. "Error in caching of register: %x ret: %d\n",
  1754. reg, ret);
  1755. return ret;
  1756. }
  1757. }
  1758. if (map->cache_only) {
  1759. map->cache_dirty = true;
  1760. return 0;
  1761. }
  1762. }
  1763. WARN_ON(!map->bus);
  1764. for (i = 0; i < num_regs; i++) {
  1765. unsigned int reg = regs[i].reg;
  1766. struct regmap_range_node *range;
  1767. /* Coalesce all the writes between a page break or a delay
  1768. * in a sequence
  1769. */
  1770. range = _regmap_range_lookup(map, reg);
  1771. if (range || regs[i].delay_us) {
  1772. size_t len = sizeof(struct reg_sequence)*num_regs;
  1773. struct reg_sequence *base = kmemdup(regs, len,
  1774. GFP_KERNEL);
  1775. if (!base)
  1776. return -ENOMEM;
  1777. ret = _regmap_range_multi_paged_reg_write(map, base,
  1778. num_regs);
  1779. kfree(base);
  1780. return ret;
  1781. }
  1782. }
  1783. return _regmap_raw_multi_reg_write(map, regs, num_regs);
  1784. }
  1785. /*
  1786. * regmap_multi_reg_write(): Write multiple registers to the device
  1787. *
  1788. * where the set of register,value pairs are supplied in any order,
  1789. * possibly not all in a single range.
  1790. *
  1791. * @map: Register map to write to
  1792. * @regs: Array of structures containing register,value to be written
  1793. * @num_regs: Number of registers to write
  1794. *
  1795. * The 'normal' block write mode will send ultimately send data on the
  1796. * target bus as R,V1,V2,V3,..,Vn where successively higer registers are
  1797. * addressed. However, this alternative block multi write mode will send
  1798. * the data as R1,V1,R2,V2,..,Rn,Vn on the target bus. The target device
  1799. * must of course support the mode.
  1800. *
  1801. * A value of zero will be returned on success, a negative errno will be
  1802. * returned in error cases.
  1803. */
  1804. int regmap_multi_reg_write(struct regmap *map, const struct reg_sequence *regs,
  1805. int num_regs)
  1806. {
  1807. int ret;
  1808. map->lock(map->lock_arg);
  1809. ret = _regmap_multi_reg_write(map, regs, num_regs);
  1810. map->unlock(map->lock_arg);
  1811. return ret;
  1812. }
  1813. EXPORT_SYMBOL_GPL(regmap_multi_reg_write);
  1814. /*
  1815. * regmap_multi_reg_write_bypassed(): Write multiple registers to the
  1816. * device but not the cache
  1817. *
  1818. * where the set of register are supplied in any order
  1819. *
  1820. * @map: Register map to write to
  1821. * @regs: Array of structures containing register,value to be written
  1822. * @num_regs: Number of registers to write
  1823. *
  1824. * This function is intended to be used for writing a large block of data
  1825. * atomically to the device in single transfer for those I2C client devices
  1826. * that implement this alternative block write mode.
  1827. *
  1828. * A value of zero will be returned on success, a negative errno will
  1829. * be returned in error cases.
  1830. */
  1831. int regmap_multi_reg_write_bypassed(struct regmap *map,
  1832. const struct reg_sequence *regs,
  1833. int num_regs)
  1834. {
  1835. int ret;
  1836. bool bypass;
  1837. map->lock(map->lock_arg);
  1838. bypass = map->cache_bypass;
  1839. map->cache_bypass = true;
  1840. ret = _regmap_multi_reg_write(map, regs, num_regs);
  1841. map->cache_bypass = bypass;
  1842. map->unlock(map->lock_arg);
  1843. return ret;
  1844. }
  1845. EXPORT_SYMBOL_GPL(regmap_multi_reg_write_bypassed);
  1846. /**
  1847. * regmap_raw_write_async(): Write raw values to one or more registers
  1848. * asynchronously
  1849. *
  1850. * @map: Register map to write to
  1851. * @reg: Initial register to write to
  1852. * @val: Block of data to be written, laid out for direct transmission to the
  1853. * device. Must be valid until regmap_async_complete() is called.
  1854. * @val_len: Length of data pointed to by val.
  1855. *
  1856. * This function is intended to be used for things like firmware
  1857. * download where a large block of data needs to be transferred to the
  1858. * device. No formatting will be done on the data provided.
  1859. *
  1860. * If supported by the underlying bus the write will be scheduled
  1861. * asynchronously, helping maximise I/O speed on higher speed buses
  1862. * like SPI. regmap_async_complete() can be called to ensure that all
  1863. * asynchrnous writes have been completed.
  1864. *
  1865. * A value of zero will be returned on success, a negative errno will
  1866. * be returned in error cases.
  1867. */
  1868. int regmap_raw_write_async(struct regmap *map, unsigned int reg,
  1869. const void *val, size_t val_len)
  1870. {
  1871. int ret;
  1872. if (val_len % map->format.val_bytes)
  1873. return -EINVAL;
  1874. if (!IS_ALIGNED(reg, map->reg_stride))
  1875. return -EINVAL;
  1876. map->lock(map->lock_arg);
  1877. map->async = true;
  1878. ret = _regmap_raw_write(map, reg, val, val_len);
  1879. map->async = false;
  1880. map->unlock(map->lock_arg);
  1881. return ret;
  1882. }
  1883. EXPORT_SYMBOL_GPL(regmap_raw_write_async);
  1884. static int _regmap_raw_read(struct regmap *map, unsigned int reg, void *val,
  1885. unsigned int val_len)
  1886. {
  1887. struct regmap_range_node *range;
  1888. u8 *u8 = map->work_buf;
  1889. int ret;
  1890. WARN_ON(!map->bus);
  1891. range = _regmap_range_lookup(map, reg);
  1892. if (range) {
  1893. ret = _regmap_select_page(map, &reg, range,
  1894. val_len / map->format.val_bytes);
  1895. if (ret != 0)
  1896. return ret;
  1897. }
  1898. map->format.format_reg(map->work_buf, reg, map->reg_shift);
  1899. /*
  1900. * Some buses or devices flag reads by setting the high bits in the
  1901. * register address; since it's always the high bits for all
  1902. * current formats we can do this here rather than in
  1903. * formatting. This may break if we get interesting formats.
  1904. */
  1905. u8[0] |= map->read_flag_mask;
  1906. trace_regmap_hw_read_start(map, reg, val_len / map->format.val_bytes);
  1907. ret = map->bus->read(map->bus_context, map->work_buf,
  1908. map->format.reg_bytes + map->format.pad_bytes,
  1909. val, val_len);
  1910. trace_regmap_hw_read_done(map, reg, val_len / map->format.val_bytes);
  1911. return ret;
  1912. }
  1913. static int _regmap_bus_reg_read(void *context, unsigned int reg,
  1914. unsigned int *val)
  1915. {
  1916. struct regmap *map = context;
  1917. return map->bus->reg_read(map->bus_context, reg, val);
  1918. }
  1919. static int _regmap_bus_read(void *context, unsigned int reg,
  1920. unsigned int *val)
  1921. {
  1922. int ret;
  1923. struct regmap *map = context;
  1924. if (!map->format.parse_val)
  1925. return -EINVAL;
  1926. ret = _regmap_raw_read(map, reg, map->work_buf, map->format.val_bytes);
  1927. if (ret == 0)
  1928. *val = map->format.parse_val(map->work_buf);
  1929. return ret;
  1930. }
  1931. static int _regmap_read(struct regmap *map, unsigned int reg,
  1932. unsigned int *val)
  1933. {
  1934. int ret;
  1935. void *context = _regmap_map_get_context(map);
  1936. if (!map->cache_bypass) {
  1937. ret = regcache_read(map, reg, val);
  1938. if (ret == 0)
  1939. return 0;
  1940. }
  1941. if (map->cache_only)
  1942. return -EBUSY;
  1943. if (!regmap_readable(map, reg))
  1944. return -EIO;
  1945. ret = map->reg_read(context, reg, val);
  1946. if (ret == 0) {
  1947. #ifdef LOG_DEVICE
  1948. if (map->dev && strcmp(dev_name(map->dev), LOG_DEVICE) == 0)
  1949. dev_info(map->dev, "%x => %x\n", reg, *val);
  1950. #endif
  1951. trace_regmap_reg_read(map, reg, *val);
  1952. if (!map->cache_bypass)
  1953. regcache_write(map, reg, *val);
  1954. }
  1955. return ret;
  1956. }
  1957. /**
  1958. * regmap_read(): Read a value from a single register
  1959. *
  1960. * @map: Register map to read from
  1961. * @reg: Register to be read from
  1962. * @val: Pointer to store read value
  1963. *
  1964. * A value of zero will be returned on success, a negative errno will
  1965. * be returned in error cases.
  1966. */
  1967. int regmap_read(struct regmap *map, unsigned int reg, unsigned int *val)
  1968. {
  1969. int ret;
  1970. if (!IS_ALIGNED(reg, map->reg_stride))
  1971. return -EINVAL;
  1972. map->lock(map->lock_arg);
  1973. ret = _regmap_read(map, reg, val);
  1974. map->unlock(map->lock_arg);
  1975. return ret;
  1976. }
  1977. EXPORT_SYMBOL_GPL(regmap_read);
  1978. /**
  1979. * regmap_raw_read(): Read raw data from the device
  1980. *
  1981. * @map: Register map to read from
  1982. * @reg: First register to be read from
  1983. * @val: Pointer to store read value
  1984. * @val_len: Size of data to read
  1985. *
  1986. * A value of zero will be returned on success, a negative errno will
  1987. * be returned in error cases.
  1988. */
  1989. int regmap_raw_read(struct regmap *map, unsigned int reg, void *val,
  1990. size_t val_len)
  1991. {
  1992. size_t val_bytes = map->format.val_bytes;
  1993. size_t val_count = val_len / val_bytes;
  1994. unsigned int v;
  1995. int ret, i;
  1996. if (!map->bus)
  1997. return -EINVAL;
  1998. if (val_len % map->format.val_bytes)
  1999. return -EINVAL;
  2000. if (!IS_ALIGNED(reg, map->reg_stride))
  2001. return -EINVAL;
  2002. if (val_count == 0)
  2003. return -EINVAL;
  2004. map->lock(map->lock_arg);
  2005. if (regmap_volatile_range(map, reg, val_count) || map->cache_bypass ||
  2006. map->cache_type == REGCACHE_NONE) {
  2007. if (!map->bus->read) {
  2008. ret = -ENOTSUPP;
  2009. goto out;
  2010. }
  2011. if (map->max_raw_read && map->max_raw_read < val_len) {
  2012. ret = -E2BIG;
  2013. goto out;
  2014. }
  2015. /* Physical block read if there's no cache involved */
  2016. ret = _regmap_raw_read(map, reg, val, val_len);
  2017. } else {
  2018. /* Otherwise go word by word for the cache; should be low
  2019. * cost as we expect to hit the cache.
  2020. */
  2021. for (i = 0; i < val_count; i++) {
  2022. ret = _regmap_read(map, reg + (i * map->reg_stride),
  2023. &v);
  2024. if (ret != 0)
  2025. goto out;
  2026. map->format.format_val(val + (i * val_bytes), v, 0);
  2027. }
  2028. }
  2029. out:
  2030. map->unlock(map->lock_arg);
  2031. return ret;
  2032. }
  2033. EXPORT_SYMBOL_GPL(regmap_raw_read);
  2034. /**
  2035. * regmap_field_read(): Read a value to a single register field
  2036. *
  2037. * @field: Register field to read from
  2038. * @val: Pointer to store read value
  2039. *
  2040. * A value of zero will be returned on success, a negative errno will
  2041. * be returned in error cases.
  2042. */
  2043. int regmap_field_read(struct regmap_field *field, unsigned int *val)
  2044. {
  2045. int ret;
  2046. unsigned int reg_val;
  2047. ret = regmap_read(field->regmap, field->reg, &reg_val);
  2048. if (ret != 0)
  2049. return ret;
  2050. reg_val &= field->mask;
  2051. reg_val >>= field->shift;
  2052. *val = reg_val;
  2053. return ret;
  2054. }
  2055. EXPORT_SYMBOL_GPL(regmap_field_read);
  2056. /**
  2057. * regmap_fields_read(): Read a value to a single register field with port ID
  2058. *
  2059. * @field: Register field to read from
  2060. * @id: port ID
  2061. * @val: Pointer to store read value
  2062. *
  2063. * A value of zero will be returned on success, a negative errno will
  2064. * be returned in error cases.
  2065. */
  2066. int regmap_fields_read(struct regmap_field *field, unsigned int id,
  2067. unsigned int *val)
  2068. {
  2069. int ret;
  2070. unsigned int reg_val;
  2071. if (id >= field->id_size)
  2072. return -EINVAL;
  2073. ret = regmap_read(field->regmap,
  2074. field->reg + (field->id_offset * id),
  2075. &reg_val);
  2076. if (ret != 0)
  2077. return ret;
  2078. reg_val &= field->mask;
  2079. reg_val >>= field->shift;
  2080. *val = reg_val;
  2081. return ret;
  2082. }
  2083. EXPORT_SYMBOL_GPL(regmap_fields_read);
  2084. /**
  2085. * regmap_bulk_read(): Read multiple registers from the device
  2086. *
  2087. * @map: Register map to read from
  2088. * @reg: First register to be read from
  2089. * @val: Pointer to store read value, in native register size for device
  2090. * @val_count: Number of registers to read
  2091. *
  2092. * A value of zero will be returned on success, a negative errno will
  2093. * be returned in error cases.
  2094. */
  2095. int regmap_bulk_read(struct regmap *map, unsigned int reg, void *val,
  2096. size_t val_count)
  2097. {
  2098. int ret, i;
  2099. size_t val_bytes = map->format.val_bytes;
  2100. bool vol = regmap_volatile_range(map, reg, val_count);
  2101. if (!IS_ALIGNED(reg, map->reg_stride))
  2102. return -EINVAL;
  2103. if (map->bus && map->format.parse_inplace && (vol || map->cache_type == REGCACHE_NONE)) {
  2104. /*
  2105. * Some devices does not support bulk read, for
  2106. * them we have a series of single read operations.
  2107. */
  2108. size_t total_size = val_bytes * val_count;
  2109. if (!map->use_single_read &&
  2110. (!map->max_raw_read || map->max_raw_read > total_size)) {
  2111. ret = regmap_raw_read(map, reg, val,
  2112. val_bytes * val_count);
  2113. if (ret != 0)
  2114. return ret;
  2115. } else {
  2116. /*
  2117. * Some devices do not support bulk read or do not
  2118. * support large bulk reads, for them we have a series
  2119. * of read operations.
  2120. */
  2121. int chunk_stride = map->reg_stride;
  2122. size_t chunk_size = val_bytes;
  2123. size_t chunk_count = val_count;
  2124. if (!map->use_single_read) {
  2125. chunk_size = map->max_raw_read;
  2126. if (chunk_size % val_bytes)
  2127. chunk_size -= chunk_size % val_bytes;
  2128. chunk_count = total_size / chunk_size;
  2129. chunk_stride *= chunk_size / val_bytes;
  2130. }
  2131. /* Read bytes that fit into a multiple of chunk_size */
  2132. for (i = 0; i < chunk_count; i++) {
  2133. ret = regmap_raw_read(map,
  2134. reg + (i * chunk_stride),
  2135. val + (i * chunk_size),
  2136. chunk_size);
  2137. if (ret != 0)
  2138. return ret;
  2139. }
  2140. /* Read remaining bytes */
  2141. if (chunk_size * i < total_size) {
  2142. ret = regmap_raw_read(map,
  2143. reg + (i * chunk_stride),
  2144. val + (i * chunk_size),
  2145. total_size - i * chunk_size);
  2146. if (ret != 0)
  2147. return ret;
  2148. }
  2149. }
  2150. for (i = 0; i < val_count * val_bytes; i += val_bytes)
  2151. map->format.parse_inplace(val + i);
  2152. } else {
  2153. for (i = 0; i < val_count; i++) {
  2154. unsigned int ival;
  2155. ret = regmap_read(map, reg + (i * map->reg_stride),
  2156. &ival);
  2157. if (ret != 0)
  2158. return ret;
  2159. if (map->format.format_val) {
  2160. map->format.format_val(val + (i * val_bytes), ival, 0);
  2161. } else {
  2162. /* Devices providing read and write
  2163. * operations can use the bulk I/O
  2164. * functions if they define a val_bytes,
  2165. * we assume that the values are native
  2166. * endian.
  2167. */
  2168. #ifdef CONFIG_64BIT
  2169. u64 *u64 = val;
  2170. #endif
  2171. u32 *u32 = val;
  2172. u16 *u16 = val;
  2173. u8 *u8 = val;
  2174. switch (map->format.val_bytes) {
  2175. #ifdef CONFIG_64BIT
  2176. case 8:
  2177. u64[i] = ival;
  2178. break;
  2179. #endif
  2180. case 4:
  2181. u32[i] = ival;
  2182. break;
  2183. case 2:
  2184. u16[i] = ival;
  2185. break;
  2186. case 1:
  2187. u8[i] = ival;
  2188. break;
  2189. default:
  2190. return -EINVAL;
  2191. }
  2192. }
  2193. }
  2194. }
  2195. return 0;
  2196. }
  2197. EXPORT_SYMBOL_GPL(regmap_bulk_read);
  2198. static int _regmap_update_bits(struct regmap *map, unsigned int reg,
  2199. unsigned int mask, unsigned int val,
  2200. bool *change, bool force_write)
  2201. {
  2202. int ret;
  2203. unsigned int tmp, orig;
  2204. if (change)
  2205. *change = false;
  2206. if (regmap_volatile(map, reg) && map->reg_update_bits) {
  2207. ret = map->reg_update_bits(map->bus_context, reg, mask, val);
  2208. if (ret == 0 && change)
  2209. *change = true;
  2210. } else {
  2211. ret = _regmap_read(map, reg, &orig);
  2212. if (ret != 0)
  2213. return ret;
  2214. tmp = orig & ~mask;
  2215. tmp |= val & mask;
  2216. if (force_write || (tmp != orig)) {
  2217. ret = _regmap_write(map, reg, tmp);
  2218. if (ret == 0 && change)
  2219. *change = true;
  2220. }
  2221. }
  2222. return ret;
  2223. }
  2224. /**
  2225. * regmap_update_bits_base:
  2226. * Perform a read/modify/write cycle on the
  2227. * register map with change, async, force option
  2228. *
  2229. * @map: Register map to update
  2230. * @reg: Register to update
  2231. * @mask: Bitmask to change
  2232. * @val: New value for bitmask
  2233. * @change: Boolean indicating if a write was done
  2234. * @async: Boolean indicating asynchronously
  2235. * @force: Boolean indicating use force update
  2236. *
  2237. * if async was true,
  2238. * With most buses the read must be done synchronously so this is most
  2239. * useful for devices with a cache which do not need to interact with
  2240. * the hardware to determine the current register value.
  2241. *
  2242. * Returns zero for success, a negative number on error.
  2243. */
  2244. int regmap_update_bits_base(struct regmap *map, unsigned int reg,
  2245. unsigned int mask, unsigned int val,
  2246. bool *change, bool async, bool force)
  2247. {
  2248. int ret;
  2249. map->lock(map->lock_arg);
  2250. map->async = async;
  2251. ret = _regmap_update_bits(map, reg, mask, val, change, force);
  2252. map->async = false;
  2253. map->unlock(map->lock_arg);
  2254. return ret;
  2255. }
  2256. EXPORT_SYMBOL_GPL(regmap_update_bits_base);
  2257. /**
  2258. * regmap_write_bits: Perform a read/modify/write cycle on the register map
  2259. *
  2260. * @map: Register map to update
  2261. * @reg: Register to update
  2262. * @mask: Bitmask to change
  2263. * @val: New value for bitmask
  2264. *
  2265. * Returns zero for success, a negative number on error.
  2266. */
  2267. int regmap_write_bits(struct regmap *map, unsigned int reg,
  2268. unsigned int mask, unsigned int val)
  2269. {
  2270. int ret;
  2271. map->lock(map->lock_arg);
  2272. ret = _regmap_update_bits(map, reg, mask, val, NULL, true);
  2273. map->unlock(map->lock_arg);
  2274. return ret;
  2275. }
  2276. EXPORT_SYMBOL_GPL(regmap_write_bits);
  2277. /**
  2278. * regmap_update_bits_check: Perform a read/modify/write cycle on the
  2279. * register map and report if updated
  2280. *
  2281. * @map: Register map to update
  2282. * @reg: Register to update
  2283. * @mask: Bitmask to change
  2284. * @val: New value for bitmask
  2285. * @change: Boolean indicating if a write was done
  2286. *
  2287. * Returns zero for success, a negative number on error.
  2288. */
  2289. int regmap_update_bits_check(struct regmap *map, unsigned int reg,
  2290. unsigned int mask, unsigned int val,
  2291. bool *change)
  2292. {
  2293. int ret;
  2294. map->lock(map->lock_arg);
  2295. ret = _regmap_update_bits(map, reg, mask, val, change, false);
  2296. map->unlock(map->lock_arg);
  2297. return ret;
  2298. }
  2299. EXPORT_SYMBOL_GPL(regmap_update_bits_check);
  2300. /**
  2301. * regmap_update_bits_check_async: Perform a read/modify/write cycle on the
  2302. * register map asynchronously and report if
  2303. * updated
  2304. *
  2305. * @map: Register map to update
  2306. * @reg: Register to update
  2307. * @mask: Bitmask to change
  2308. * @val: New value for bitmask
  2309. * @change: Boolean indicating if a write was done
  2310. *
  2311. * With most buses the read must be done synchronously so this is most
  2312. * useful for devices with a cache which do not need to interact with
  2313. * the hardware to determine the current register value.
  2314. *
  2315. * Returns zero for success, a negative number on error.
  2316. */
  2317. int regmap_update_bits_check_async(struct regmap *map, unsigned int reg,
  2318. unsigned int mask, unsigned int val,
  2319. bool *change)
  2320. {
  2321. int ret;
  2322. map->lock(map->lock_arg);
  2323. map->async = true;
  2324. ret = _regmap_update_bits(map, reg, mask, val, change, false);
  2325. map->async = false;
  2326. map->unlock(map->lock_arg);
  2327. return ret;
  2328. }
  2329. EXPORT_SYMBOL_GPL(regmap_update_bits_check_async);
  2330. void regmap_async_complete_cb(struct regmap_async *async, int ret)
  2331. {
  2332. struct regmap *map = async->map;
  2333. bool wake;
  2334. trace_regmap_async_io_complete(map);
  2335. spin_lock(&map->async_lock);
  2336. list_move(&async->list, &map->async_free);
  2337. wake = list_empty(&map->async_list);
  2338. if (ret != 0)
  2339. map->async_ret = ret;
  2340. spin_unlock(&map->async_lock);
  2341. if (wake)
  2342. wake_up(&map->async_waitq);
  2343. }
  2344. EXPORT_SYMBOL_GPL(regmap_async_complete_cb);
  2345. static int regmap_async_is_done(struct regmap *map)
  2346. {
  2347. unsigned long flags;
  2348. int ret;
  2349. spin_lock_irqsave(&map->async_lock, flags);
  2350. ret = list_empty(&map->async_list);
  2351. spin_unlock_irqrestore(&map->async_lock, flags);
  2352. return ret;
  2353. }
  2354. /**
  2355. * regmap_async_complete: Ensure all asynchronous I/O has completed.
  2356. *
  2357. * @map: Map to operate on.
  2358. *
  2359. * Blocks until any pending asynchronous I/O has completed. Returns
  2360. * an error code for any failed I/O operations.
  2361. */
  2362. int regmap_async_complete(struct regmap *map)
  2363. {
  2364. unsigned long flags;
  2365. int ret;
  2366. /* Nothing to do with no async support */
  2367. if (!map->bus || !map->bus->async_write)
  2368. return 0;
  2369. trace_regmap_async_complete_start(map);
  2370. wait_event(map->async_waitq, regmap_async_is_done(map));
  2371. spin_lock_irqsave(&map->async_lock, flags);
  2372. ret = map->async_ret;
  2373. map->async_ret = 0;
  2374. spin_unlock_irqrestore(&map->async_lock, flags);
  2375. trace_regmap_async_complete_done(map);
  2376. return ret;
  2377. }
  2378. EXPORT_SYMBOL_GPL(regmap_async_complete);
  2379. /**
  2380. * regmap_register_patch: Register and apply register updates to be applied
  2381. * on device initialistion
  2382. *
  2383. * @map: Register map to apply updates to.
  2384. * @regs: Values to update.
  2385. * @num_regs: Number of entries in regs.
  2386. *
  2387. * Register a set of register updates to be applied to the device
  2388. * whenever the device registers are synchronised with the cache and
  2389. * apply them immediately. Typically this is used to apply
  2390. * corrections to be applied to the device defaults on startup, such
  2391. * as the updates some vendors provide to undocumented registers.
  2392. *
  2393. * The caller must ensure that this function cannot be called
  2394. * concurrently with either itself or regcache_sync().
  2395. */
  2396. int regmap_register_patch(struct regmap *map, const struct reg_sequence *regs,
  2397. int num_regs)
  2398. {
  2399. struct reg_sequence *p;
  2400. int ret;
  2401. bool bypass;
  2402. if (WARN_ONCE(num_regs <= 0, "invalid registers number (%d)\n",
  2403. num_regs))
  2404. return 0;
  2405. p = krealloc(map->patch,
  2406. sizeof(struct reg_sequence) * (map->patch_regs + num_regs),
  2407. GFP_KERNEL);
  2408. if (p) {
  2409. memcpy(p + map->patch_regs, regs, num_regs * sizeof(*regs));
  2410. map->patch = p;
  2411. map->patch_regs += num_regs;
  2412. } else {
  2413. return -ENOMEM;
  2414. }
  2415. map->lock(map->lock_arg);
  2416. bypass = map->cache_bypass;
  2417. map->cache_bypass = true;
  2418. map->async = true;
  2419. ret = _regmap_multi_reg_write(map, regs, num_regs);
  2420. map->async = false;
  2421. map->cache_bypass = bypass;
  2422. map->unlock(map->lock_arg);
  2423. regmap_async_complete(map);
  2424. return ret;
  2425. }
  2426. EXPORT_SYMBOL_GPL(regmap_register_patch);
  2427. /*
  2428. * regmap_get_val_bytes(): Report the size of a register value
  2429. *
  2430. * Report the size of a register value, mainly intended to for use by
  2431. * generic infrastructure built on top of regmap.
  2432. */
  2433. int regmap_get_val_bytes(struct regmap *map)
  2434. {
  2435. if (map->format.format_write)
  2436. return -EINVAL;
  2437. return map->format.val_bytes;
  2438. }
  2439. EXPORT_SYMBOL_GPL(regmap_get_val_bytes);
  2440. /**
  2441. * regmap_get_max_register(): Report the max register value
  2442. *
  2443. * Report the max register value, mainly intended to for use by
  2444. * generic infrastructure built on top of regmap.
  2445. */
  2446. int regmap_get_max_register(struct regmap *map)
  2447. {
  2448. return map->max_register ? map->max_register : -EINVAL;
  2449. }
  2450. EXPORT_SYMBOL_GPL(regmap_get_max_register);
  2451. /**
  2452. * regmap_get_reg_stride(): Report the register address stride
  2453. *
  2454. * Report the register address stride, mainly intended to for use by
  2455. * generic infrastructure built on top of regmap.
  2456. */
  2457. int regmap_get_reg_stride(struct regmap *map)
  2458. {
  2459. return map->reg_stride;
  2460. }
  2461. EXPORT_SYMBOL_GPL(regmap_get_reg_stride);
  2462. int regmap_parse_val(struct regmap *map, const void *buf,
  2463. unsigned int *val)
  2464. {
  2465. if (!map->format.parse_val)
  2466. return -EINVAL;
  2467. *val = map->format.parse_val(buf);
  2468. return 0;
  2469. }
  2470. EXPORT_SYMBOL_GPL(regmap_parse_val);
  2471. static int __init regmap_initcall(void)
  2472. {
  2473. regmap_debugfs_initcall();
  2474. return 0;
  2475. }
  2476. postcore_initcall(regmap_initcall);