ispccdc.c 71 KB

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  1. /*
  2. * ispccdc.c
  3. *
  4. * TI OMAP3 ISP - CCDC module
  5. *
  6. * Copyright (C) 2009-2010 Nokia Corporation
  7. * Copyright (C) 2009 Texas Instruments, Inc.
  8. *
  9. * Contacts: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
  10. * Sakari Ailus <sakari.ailus@iki.fi>
  11. *
  12. * This program is free software; you can redistribute it and/or modify
  13. * it under the terms of the GNU General Public License version 2 as
  14. * published by the Free Software Foundation.
  15. */
  16. #include <linux/module.h>
  17. #include <linux/uaccess.h>
  18. #include <linux/delay.h>
  19. #include <linux/device.h>
  20. #include <linux/dma-mapping.h>
  21. #include <linux/mm.h>
  22. #include <linux/sched.h>
  23. #include <linux/slab.h>
  24. #include <media/v4l2-event.h>
  25. #include "isp.h"
  26. #include "ispreg.h"
  27. #include "ispccdc.h"
  28. #define CCDC_MIN_WIDTH 32
  29. #define CCDC_MIN_HEIGHT 32
  30. static struct v4l2_mbus_framefmt *
  31. __ccdc_get_format(struct isp_ccdc_device *ccdc, struct v4l2_subdev_fh *fh,
  32. unsigned int pad, enum v4l2_subdev_format_whence which);
  33. static const unsigned int ccdc_fmts[] = {
  34. V4L2_MBUS_FMT_Y8_1X8,
  35. V4L2_MBUS_FMT_Y10_1X10,
  36. V4L2_MBUS_FMT_Y12_1X12,
  37. V4L2_MBUS_FMT_SGRBG8_1X8,
  38. V4L2_MBUS_FMT_SRGGB8_1X8,
  39. V4L2_MBUS_FMT_SBGGR8_1X8,
  40. V4L2_MBUS_FMT_SGBRG8_1X8,
  41. V4L2_MBUS_FMT_SGRBG10_1X10,
  42. V4L2_MBUS_FMT_SRGGB10_1X10,
  43. V4L2_MBUS_FMT_SBGGR10_1X10,
  44. V4L2_MBUS_FMT_SGBRG10_1X10,
  45. V4L2_MBUS_FMT_SGRBG12_1X12,
  46. V4L2_MBUS_FMT_SRGGB12_1X12,
  47. V4L2_MBUS_FMT_SBGGR12_1X12,
  48. V4L2_MBUS_FMT_SGBRG12_1X12,
  49. V4L2_MBUS_FMT_YUYV8_2X8,
  50. V4L2_MBUS_FMT_UYVY8_2X8,
  51. };
  52. /*
  53. * ccdc_print_status - Print current CCDC Module register values.
  54. * @ccdc: Pointer to ISP CCDC device.
  55. *
  56. * Also prints other debug information stored in the CCDC module.
  57. */
  58. #define CCDC_PRINT_REGISTER(isp, name)\
  59. dev_dbg(isp->dev, "###CCDC " #name "=0x%08x\n", \
  60. isp_reg_readl(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_##name))
  61. static void ccdc_print_status(struct isp_ccdc_device *ccdc)
  62. {
  63. struct isp_device *isp = to_isp_device(ccdc);
  64. dev_dbg(isp->dev, "-------------CCDC Register dump-------------\n");
  65. CCDC_PRINT_REGISTER(isp, PCR);
  66. CCDC_PRINT_REGISTER(isp, SYN_MODE);
  67. CCDC_PRINT_REGISTER(isp, HD_VD_WID);
  68. CCDC_PRINT_REGISTER(isp, PIX_LINES);
  69. CCDC_PRINT_REGISTER(isp, HORZ_INFO);
  70. CCDC_PRINT_REGISTER(isp, VERT_START);
  71. CCDC_PRINT_REGISTER(isp, VERT_LINES);
  72. CCDC_PRINT_REGISTER(isp, CULLING);
  73. CCDC_PRINT_REGISTER(isp, HSIZE_OFF);
  74. CCDC_PRINT_REGISTER(isp, SDOFST);
  75. CCDC_PRINT_REGISTER(isp, SDR_ADDR);
  76. CCDC_PRINT_REGISTER(isp, CLAMP);
  77. CCDC_PRINT_REGISTER(isp, DCSUB);
  78. CCDC_PRINT_REGISTER(isp, COLPTN);
  79. CCDC_PRINT_REGISTER(isp, BLKCMP);
  80. CCDC_PRINT_REGISTER(isp, FPC);
  81. CCDC_PRINT_REGISTER(isp, FPC_ADDR);
  82. CCDC_PRINT_REGISTER(isp, VDINT);
  83. CCDC_PRINT_REGISTER(isp, ALAW);
  84. CCDC_PRINT_REGISTER(isp, REC656IF);
  85. CCDC_PRINT_REGISTER(isp, CFG);
  86. CCDC_PRINT_REGISTER(isp, FMTCFG);
  87. CCDC_PRINT_REGISTER(isp, FMT_HORZ);
  88. CCDC_PRINT_REGISTER(isp, FMT_VERT);
  89. CCDC_PRINT_REGISTER(isp, PRGEVEN0);
  90. CCDC_PRINT_REGISTER(isp, PRGEVEN1);
  91. CCDC_PRINT_REGISTER(isp, PRGODD0);
  92. CCDC_PRINT_REGISTER(isp, PRGODD1);
  93. CCDC_PRINT_REGISTER(isp, VP_OUT);
  94. CCDC_PRINT_REGISTER(isp, LSC_CONFIG);
  95. CCDC_PRINT_REGISTER(isp, LSC_INITIAL);
  96. CCDC_PRINT_REGISTER(isp, LSC_TABLE_BASE);
  97. CCDC_PRINT_REGISTER(isp, LSC_TABLE_OFFSET);
  98. dev_dbg(isp->dev, "--------------------------------------------\n");
  99. }
  100. /*
  101. * omap3isp_ccdc_busy - Get busy state of the CCDC.
  102. * @ccdc: Pointer to ISP CCDC device.
  103. */
  104. int omap3isp_ccdc_busy(struct isp_ccdc_device *ccdc)
  105. {
  106. struct isp_device *isp = to_isp_device(ccdc);
  107. return isp_reg_readl(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_PCR) &
  108. ISPCCDC_PCR_BUSY;
  109. }
  110. /* -----------------------------------------------------------------------------
  111. * Lens Shading Compensation
  112. */
  113. /*
  114. * ccdc_lsc_validate_config - Check that LSC configuration is valid.
  115. * @ccdc: Pointer to ISP CCDC device.
  116. * @lsc_cfg: the LSC configuration to check.
  117. *
  118. * Returns 0 if the LSC configuration is valid, or -EINVAL if invalid.
  119. */
  120. static int ccdc_lsc_validate_config(struct isp_ccdc_device *ccdc,
  121. struct omap3isp_ccdc_lsc_config *lsc_cfg)
  122. {
  123. struct isp_device *isp = to_isp_device(ccdc);
  124. struct v4l2_mbus_framefmt *format;
  125. unsigned int paxel_width, paxel_height;
  126. unsigned int paxel_shift_x, paxel_shift_y;
  127. unsigned int min_width, min_height, min_size;
  128. unsigned int input_width, input_height;
  129. paxel_shift_x = lsc_cfg->gain_mode_m;
  130. paxel_shift_y = lsc_cfg->gain_mode_n;
  131. if ((paxel_shift_x < 2) || (paxel_shift_x > 6) ||
  132. (paxel_shift_y < 2) || (paxel_shift_y > 6)) {
  133. dev_dbg(isp->dev, "CCDC: LSC: Invalid paxel size\n");
  134. return -EINVAL;
  135. }
  136. if (lsc_cfg->offset & 3) {
  137. dev_dbg(isp->dev, "CCDC: LSC: Offset must be a multiple of "
  138. "4\n");
  139. return -EINVAL;
  140. }
  141. if ((lsc_cfg->initial_x & 1) || (lsc_cfg->initial_y & 1)) {
  142. dev_dbg(isp->dev, "CCDC: LSC: initial_x and y must be even\n");
  143. return -EINVAL;
  144. }
  145. format = __ccdc_get_format(ccdc, NULL, CCDC_PAD_SINK,
  146. V4L2_SUBDEV_FORMAT_ACTIVE);
  147. input_width = format->width;
  148. input_height = format->height;
  149. /* Calculate minimum bytesize for validation */
  150. paxel_width = 1 << paxel_shift_x;
  151. min_width = ((input_width + lsc_cfg->initial_x + paxel_width - 1)
  152. >> paxel_shift_x) + 1;
  153. paxel_height = 1 << paxel_shift_y;
  154. min_height = ((input_height + lsc_cfg->initial_y + paxel_height - 1)
  155. >> paxel_shift_y) + 1;
  156. min_size = 4 * min_width * min_height;
  157. if (min_size > lsc_cfg->size) {
  158. dev_dbg(isp->dev, "CCDC: LSC: too small table\n");
  159. return -EINVAL;
  160. }
  161. if (lsc_cfg->offset < (min_width * 4)) {
  162. dev_dbg(isp->dev, "CCDC: LSC: Offset is too small\n");
  163. return -EINVAL;
  164. }
  165. if ((lsc_cfg->size / lsc_cfg->offset) < min_height) {
  166. dev_dbg(isp->dev, "CCDC: LSC: Wrong size/offset combination\n");
  167. return -EINVAL;
  168. }
  169. return 0;
  170. }
  171. /*
  172. * ccdc_lsc_program_table - Program Lens Shading Compensation table address.
  173. * @ccdc: Pointer to ISP CCDC device.
  174. */
  175. static void ccdc_lsc_program_table(struct isp_ccdc_device *ccdc,
  176. dma_addr_t addr)
  177. {
  178. isp_reg_writel(to_isp_device(ccdc), addr,
  179. OMAP3_ISP_IOMEM_CCDC, ISPCCDC_LSC_TABLE_BASE);
  180. }
  181. /*
  182. * ccdc_lsc_setup_regs - Configures the lens shading compensation module
  183. * @ccdc: Pointer to ISP CCDC device.
  184. */
  185. static void ccdc_lsc_setup_regs(struct isp_ccdc_device *ccdc,
  186. struct omap3isp_ccdc_lsc_config *cfg)
  187. {
  188. struct isp_device *isp = to_isp_device(ccdc);
  189. int reg;
  190. isp_reg_writel(isp, cfg->offset, OMAP3_ISP_IOMEM_CCDC,
  191. ISPCCDC_LSC_TABLE_OFFSET);
  192. reg = 0;
  193. reg |= cfg->gain_mode_n << ISPCCDC_LSC_GAIN_MODE_N_SHIFT;
  194. reg |= cfg->gain_mode_m << ISPCCDC_LSC_GAIN_MODE_M_SHIFT;
  195. reg |= cfg->gain_format << ISPCCDC_LSC_GAIN_FORMAT_SHIFT;
  196. isp_reg_writel(isp, reg, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_LSC_CONFIG);
  197. reg = 0;
  198. reg &= ~ISPCCDC_LSC_INITIAL_X_MASK;
  199. reg |= cfg->initial_x << ISPCCDC_LSC_INITIAL_X_SHIFT;
  200. reg &= ~ISPCCDC_LSC_INITIAL_Y_MASK;
  201. reg |= cfg->initial_y << ISPCCDC_LSC_INITIAL_Y_SHIFT;
  202. isp_reg_writel(isp, reg, OMAP3_ISP_IOMEM_CCDC,
  203. ISPCCDC_LSC_INITIAL);
  204. }
  205. static int ccdc_lsc_wait_prefetch(struct isp_ccdc_device *ccdc)
  206. {
  207. struct isp_device *isp = to_isp_device(ccdc);
  208. unsigned int wait;
  209. isp_reg_writel(isp, IRQ0STATUS_CCDC_LSC_PREF_COMP_IRQ,
  210. OMAP3_ISP_IOMEM_MAIN, ISP_IRQ0STATUS);
  211. /* timeout 1 ms */
  212. for (wait = 0; wait < 1000; wait++) {
  213. if (isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN, ISP_IRQ0STATUS) &
  214. IRQ0STATUS_CCDC_LSC_PREF_COMP_IRQ) {
  215. isp_reg_writel(isp, IRQ0STATUS_CCDC_LSC_PREF_COMP_IRQ,
  216. OMAP3_ISP_IOMEM_MAIN, ISP_IRQ0STATUS);
  217. return 0;
  218. }
  219. rmb();
  220. udelay(1);
  221. }
  222. return -ETIMEDOUT;
  223. }
  224. /*
  225. * __ccdc_lsc_enable - Enables/Disables the Lens Shading Compensation module.
  226. * @ccdc: Pointer to ISP CCDC device.
  227. * @enable: 0 Disables LSC, 1 Enables LSC.
  228. */
  229. static int __ccdc_lsc_enable(struct isp_ccdc_device *ccdc, int enable)
  230. {
  231. struct isp_device *isp = to_isp_device(ccdc);
  232. const struct v4l2_mbus_framefmt *format =
  233. __ccdc_get_format(ccdc, NULL, CCDC_PAD_SINK,
  234. V4L2_SUBDEV_FORMAT_ACTIVE);
  235. if ((format->code != V4L2_MBUS_FMT_SGRBG10_1X10) &&
  236. (format->code != V4L2_MBUS_FMT_SRGGB10_1X10) &&
  237. (format->code != V4L2_MBUS_FMT_SBGGR10_1X10) &&
  238. (format->code != V4L2_MBUS_FMT_SGBRG10_1X10))
  239. return -EINVAL;
  240. if (enable)
  241. omap3isp_sbl_enable(isp, OMAP3_ISP_SBL_CCDC_LSC_READ);
  242. isp_reg_clr_set(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_LSC_CONFIG,
  243. ISPCCDC_LSC_ENABLE, enable ? ISPCCDC_LSC_ENABLE : 0);
  244. if (enable) {
  245. if (ccdc_lsc_wait_prefetch(ccdc) < 0) {
  246. isp_reg_clr(isp, OMAP3_ISP_IOMEM_CCDC,
  247. ISPCCDC_LSC_CONFIG, ISPCCDC_LSC_ENABLE);
  248. ccdc->lsc.state = LSC_STATE_STOPPED;
  249. dev_warn(to_device(ccdc), "LSC prefetch timeout\n");
  250. return -ETIMEDOUT;
  251. }
  252. ccdc->lsc.state = LSC_STATE_RUNNING;
  253. } else {
  254. ccdc->lsc.state = LSC_STATE_STOPPING;
  255. }
  256. return 0;
  257. }
  258. static int ccdc_lsc_busy(struct isp_ccdc_device *ccdc)
  259. {
  260. struct isp_device *isp = to_isp_device(ccdc);
  261. return isp_reg_readl(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_LSC_CONFIG) &
  262. ISPCCDC_LSC_BUSY;
  263. }
  264. /* __ccdc_lsc_configure - Apply a new configuration to the LSC engine
  265. * @ccdc: Pointer to ISP CCDC device
  266. * @req: New configuration request
  267. *
  268. * context: in_interrupt()
  269. */
  270. static int __ccdc_lsc_configure(struct isp_ccdc_device *ccdc,
  271. struct ispccdc_lsc_config_req *req)
  272. {
  273. if (!req->enable)
  274. return -EINVAL;
  275. if (ccdc_lsc_validate_config(ccdc, &req->config) < 0) {
  276. dev_dbg(to_device(ccdc), "Discard LSC configuration\n");
  277. return -EINVAL;
  278. }
  279. if (ccdc_lsc_busy(ccdc))
  280. return -EBUSY;
  281. ccdc_lsc_setup_regs(ccdc, &req->config);
  282. ccdc_lsc_program_table(ccdc, req->table.dma);
  283. return 0;
  284. }
  285. /*
  286. * ccdc_lsc_error_handler - Handle LSC prefetch error scenario.
  287. * @ccdc: Pointer to ISP CCDC device.
  288. *
  289. * Disables LSC, and defers enablement to shadow registers update time.
  290. */
  291. static void ccdc_lsc_error_handler(struct isp_ccdc_device *ccdc)
  292. {
  293. struct isp_device *isp = to_isp_device(ccdc);
  294. /*
  295. * From OMAP3 TRM: When this event is pending, the module
  296. * goes into transparent mode (output =input). Normal
  297. * operation can be resumed at the start of the next frame
  298. * after:
  299. * 1) Clearing this event
  300. * 2) Disabling the LSC module
  301. * 3) Enabling it
  302. */
  303. isp_reg_clr(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_LSC_CONFIG,
  304. ISPCCDC_LSC_ENABLE);
  305. ccdc->lsc.state = LSC_STATE_STOPPED;
  306. }
  307. static void ccdc_lsc_free_request(struct isp_ccdc_device *ccdc,
  308. struct ispccdc_lsc_config_req *req)
  309. {
  310. struct isp_device *isp = to_isp_device(ccdc);
  311. if (req == NULL)
  312. return;
  313. if (req->table.addr) {
  314. sg_free_table(&req->table.sgt);
  315. dma_free_coherent(isp->dev, req->config.size, req->table.addr,
  316. req->table.dma);
  317. }
  318. kfree(req);
  319. }
  320. static void ccdc_lsc_free_queue(struct isp_ccdc_device *ccdc,
  321. struct list_head *queue)
  322. {
  323. struct ispccdc_lsc_config_req *req, *n;
  324. unsigned long flags;
  325. spin_lock_irqsave(&ccdc->lsc.req_lock, flags);
  326. list_for_each_entry_safe(req, n, queue, list) {
  327. list_del(&req->list);
  328. spin_unlock_irqrestore(&ccdc->lsc.req_lock, flags);
  329. ccdc_lsc_free_request(ccdc, req);
  330. spin_lock_irqsave(&ccdc->lsc.req_lock, flags);
  331. }
  332. spin_unlock_irqrestore(&ccdc->lsc.req_lock, flags);
  333. }
  334. static void ccdc_lsc_free_table_work(struct work_struct *work)
  335. {
  336. struct isp_ccdc_device *ccdc;
  337. struct ispccdc_lsc *lsc;
  338. lsc = container_of(work, struct ispccdc_lsc, table_work);
  339. ccdc = container_of(lsc, struct isp_ccdc_device, lsc);
  340. ccdc_lsc_free_queue(ccdc, &lsc->free_queue);
  341. }
  342. /*
  343. * ccdc_lsc_config - Configure the LSC module from a userspace request
  344. *
  345. * Store the request LSC configuration in the LSC engine request pointer. The
  346. * configuration will be applied to the hardware when the CCDC will be enabled,
  347. * or at the next LSC interrupt if the CCDC is already running.
  348. */
  349. static int ccdc_lsc_config(struct isp_ccdc_device *ccdc,
  350. struct omap3isp_ccdc_update_config *config)
  351. {
  352. struct isp_device *isp = to_isp_device(ccdc);
  353. struct ispccdc_lsc_config_req *req;
  354. unsigned long flags;
  355. u16 update;
  356. int ret;
  357. update = config->update &
  358. (OMAP3ISP_CCDC_CONFIG_LSC | OMAP3ISP_CCDC_TBL_LSC);
  359. if (!update)
  360. return 0;
  361. if (update != (OMAP3ISP_CCDC_CONFIG_LSC | OMAP3ISP_CCDC_TBL_LSC)) {
  362. dev_dbg(to_device(ccdc), "%s: Both LSC configuration and table "
  363. "need to be supplied\n", __func__);
  364. return -EINVAL;
  365. }
  366. req = kzalloc(sizeof(*req), GFP_KERNEL);
  367. if (req == NULL)
  368. return -ENOMEM;
  369. if (config->flag & OMAP3ISP_CCDC_CONFIG_LSC) {
  370. if (copy_from_user(&req->config, config->lsc_cfg,
  371. sizeof(req->config))) {
  372. ret = -EFAULT;
  373. goto done;
  374. }
  375. req->enable = 1;
  376. req->table.addr = dma_alloc_coherent(isp->dev, req->config.size,
  377. &req->table.dma,
  378. GFP_KERNEL);
  379. if (req->table.addr == NULL) {
  380. ret = -ENOMEM;
  381. goto done;
  382. }
  383. ret = dma_get_sgtable(isp->dev, &req->table.sgt,
  384. req->table.addr, req->table.dma,
  385. req->config.size);
  386. if (ret < 0)
  387. goto done;
  388. dma_sync_sg_for_cpu(isp->dev, req->table.sgt.sgl,
  389. req->table.sgt.nents, DMA_TO_DEVICE);
  390. if (copy_from_user(req->table.addr, config->lsc,
  391. req->config.size)) {
  392. ret = -EFAULT;
  393. goto done;
  394. }
  395. dma_sync_sg_for_device(isp->dev, req->table.sgt.sgl,
  396. req->table.sgt.nents, DMA_TO_DEVICE);
  397. }
  398. spin_lock_irqsave(&ccdc->lsc.req_lock, flags);
  399. if (ccdc->lsc.request) {
  400. list_add_tail(&ccdc->lsc.request->list, &ccdc->lsc.free_queue);
  401. schedule_work(&ccdc->lsc.table_work);
  402. }
  403. ccdc->lsc.request = req;
  404. spin_unlock_irqrestore(&ccdc->lsc.req_lock, flags);
  405. ret = 0;
  406. done:
  407. if (ret < 0)
  408. ccdc_lsc_free_request(ccdc, req);
  409. return ret;
  410. }
  411. static inline int ccdc_lsc_is_configured(struct isp_ccdc_device *ccdc)
  412. {
  413. unsigned long flags;
  414. spin_lock_irqsave(&ccdc->lsc.req_lock, flags);
  415. if (ccdc->lsc.active) {
  416. spin_unlock_irqrestore(&ccdc->lsc.req_lock, flags);
  417. return 1;
  418. }
  419. spin_unlock_irqrestore(&ccdc->lsc.req_lock, flags);
  420. return 0;
  421. }
  422. static int ccdc_lsc_enable(struct isp_ccdc_device *ccdc)
  423. {
  424. struct ispccdc_lsc *lsc = &ccdc->lsc;
  425. if (lsc->state != LSC_STATE_STOPPED)
  426. return -EINVAL;
  427. if (lsc->active) {
  428. list_add_tail(&lsc->active->list, &lsc->free_queue);
  429. lsc->active = NULL;
  430. }
  431. if (__ccdc_lsc_configure(ccdc, lsc->request) < 0) {
  432. omap3isp_sbl_disable(to_isp_device(ccdc),
  433. OMAP3_ISP_SBL_CCDC_LSC_READ);
  434. list_add_tail(&lsc->request->list, &lsc->free_queue);
  435. lsc->request = NULL;
  436. goto done;
  437. }
  438. lsc->active = lsc->request;
  439. lsc->request = NULL;
  440. __ccdc_lsc_enable(ccdc, 1);
  441. done:
  442. if (!list_empty(&lsc->free_queue))
  443. schedule_work(&lsc->table_work);
  444. return 0;
  445. }
  446. /* -----------------------------------------------------------------------------
  447. * Parameters configuration
  448. */
  449. /*
  450. * ccdc_configure_clamp - Configure optical-black or digital clamping
  451. * @ccdc: Pointer to ISP CCDC device.
  452. *
  453. * The CCDC performs either optical-black or digital clamp. Configure and enable
  454. * the selected clamp method.
  455. */
  456. static void ccdc_configure_clamp(struct isp_ccdc_device *ccdc)
  457. {
  458. struct isp_device *isp = to_isp_device(ccdc);
  459. u32 clamp;
  460. if (ccdc->obclamp) {
  461. clamp = ccdc->clamp.obgain << ISPCCDC_CLAMP_OBGAIN_SHIFT;
  462. clamp |= ccdc->clamp.oblen << ISPCCDC_CLAMP_OBSLEN_SHIFT;
  463. clamp |= ccdc->clamp.oblines << ISPCCDC_CLAMP_OBSLN_SHIFT;
  464. clamp |= ccdc->clamp.obstpixel << ISPCCDC_CLAMP_OBST_SHIFT;
  465. isp_reg_writel(isp, clamp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_CLAMP);
  466. } else {
  467. isp_reg_writel(isp, ccdc->clamp.dcsubval,
  468. OMAP3_ISP_IOMEM_CCDC, ISPCCDC_DCSUB);
  469. }
  470. isp_reg_clr_set(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_CLAMP,
  471. ISPCCDC_CLAMP_CLAMPEN,
  472. ccdc->obclamp ? ISPCCDC_CLAMP_CLAMPEN : 0);
  473. }
  474. /*
  475. * ccdc_configure_fpc - Configure Faulty Pixel Correction
  476. * @ccdc: Pointer to ISP CCDC device.
  477. */
  478. static void ccdc_configure_fpc(struct isp_ccdc_device *ccdc)
  479. {
  480. struct isp_device *isp = to_isp_device(ccdc);
  481. isp_reg_clr(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_FPC, ISPCCDC_FPC_FPCEN);
  482. if (!ccdc->fpc_en)
  483. return;
  484. isp_reg_writel(isp, ccdc->fpc.dma, OMAP3_ISP_IOMEM_CCDC,
  485. ISPCCDC_FPC_ADDR);
  486. /* The FPNUM field must be set before enabling FPC. */
  487. isp_reg_writel(isp, (ccdc->fpc.fpnum << ISPCCDC_FPC_FPNUM_SHIFT),
  488. OMAP3_ISP_IOMEM_CCDC, ISPCCDC_FPC);
  489. isp_reg_writel(isp, (ccdc->fpc.fpnum << ISPCCDC_FPC_FPNUM_SHIFT) |
  490. ISPCCDC_FPC_FPCEN, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_FPC);
  491. }
  492. /*
  493. * ccdc_configure_black_comp - Configure Black Level Compensation.
  494. * @ccdc: Pointer to ISP CCDC device.
  495. */
  496. static void ccdc_configure_black_comp(struct isp_ccdc_device *ccdc)
  497. {
  498. struct isp_device *isp = to_isp_device(ccdc);
  499. u32 blcomp;
  500. blcomp = ccdc->blcomp.b_mg << ISPCCDC_BLKCMP_B_MG_SHIFT;
  501. blcomp |= ccdc->blcomp.gb_g << ISPCCDC_BLKCMP_GB_G_SHIFT;
  502. blcomp |= ccdc->blcomp.gr_cy << ISPCCDC_BLKCMP_GR_CY_SHIFT;
  503. blcomp |= ccdc->blcomp.r_ye << ISPCCDC_BLKCMP_R_YE_SHIFT;
  504. isp_reg_writel(isp, blcomp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_BLKCMP);
  505. }
  506. /*
  507. * ccdc_configure_lpf - Configure Low-Pass Filter (LPF).
  508. * @ccdc: Pointer to ISP CCDC device.
  509. */
  510. static void ccdc_configure_lpf(struct isp_ccdc_device *ccdc)
  511. {
  512. struct isp_device *isp = to_isp_device(ccdc);
  513. isp_reg_clr_set(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_SYN_MODE,
  514. ISPCCDC_SYN_MODE_LPF,
  515. ccdc->lpf ? ISPCCDC_SYN_MODE_LPF : 0);
  516. }
  517. /*
  518. * ccdc_configure_alaw - Configure A-law compression.
  519. * @ccdc: Pointer to ISP CCDC device.
  520. */
  521. static void ccdc_configure_alaw(struct isp_ccdc_device *ccdc)
  522. {
  523. struct isp_device *isp = to_isp_device(ccdc);
  524. const struct isp_format_info *info;
  525. u32 alaw = 0;
  526. info = omap3isp_video_format_info(ccdc->formats[CCDC_PAD_SINK].code);
  527. switch (info->width) {
  528. case 8:
  529. return;
  530. case 10:
  531. alaw = ISPCCDC_ALAW_GWDI_9_0;
  532. break;
  533. case 11:
  534. alaw = ISPCCDC_ALAW_GWDI_10_1;
  535. break;
  536. case 12:
  537. alaw = ISPCCDC_ALAW_GWDI_11_2;
  538. break;
  539. case 13:
  540. alaw = ISPCCDC_ALAW_GWDI_12_3;
  541. break;
  542. }
  543. if (ccdc->alaw)
  544. alaw |= ISPCCDC_ALAW_CCDTBL;
  545. isp_reg_writel(isp, alaw, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_ALAW);
  546. }
  547. /*
  548. * ccdc_config_imgattr - Configure sensor image specific attributes.
  549. * @ccdc: Pointer to ISP CCDC device.
  550. * @colptn: Color pattern of the sensor.
  551. */
  552. static void ccdc_config_imgattr(struct isp_ccdc_device *ccdc, u32 colptn)
  553. {
  554. struct isp_device *isp = to_isp_device(ccdc);
  555. isp_reg_writel(isp, colptn, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_COLPTN);
  556. }
  557. /*
  558. * ccdc_config - Set CCDC configuration from userspace
  559. * @ccdc: Pointer to ISP CCDC device.
  560. * @ccdc_struct: Structure containing CCDC configuration sent from userspace.
  561. *
  562. * Returns 0 if successful, -EINVAL if the pointer to the configuration
  563. * structure is null, or the copy_from_user function fails to copy user space
  564. * memory to kernel space memory.
  565. */
  566. static int ccdc_config(struct isp_ccdc_device *ccdc,
  567. struct omap3isp_ccdc_update_config *ccdc_struct)
  568. {
  569. struct isp_device *isp = to_isp_device(ccdc);
  570. unsigned long flags;
  571. spin_lock_irqsave(&ccdc->lock, flags);
  572. ccdc->shadow_update = 1;
  573. spin_unlock_irqrestore(&ccdc->lock, flags);
  574. if (OMAP3ISP_CCDC_ALAW & ccdc_struct->update) {
  575. ccdc->alaw = !!(OMAP3ISP_CCDC_ALAW & ccdc_struct->flag);
  576. ccdc->update |= OMAP3ISP_CCDC_ALAW;
  577. }
  578. if (OMAP3ISP_CCDC_LPF & ccdc_struct->update) {
  579. ccdc->lpf = !!(OMAP3ISP_CCDC_LPF & ccdc_struct->flag);
  580. ccdc->update |= OMAP3ISP_CCDC_LPF;
  581. }
  582. if (OMAP3ISP_CCDC_BLCLAMP & ccdc_struct->update) {
  583. if (copy_from_user(&ccdc->clamp, ccdc_struct->bclamp,
  584. sizeof(ccdc->clamp))) {
  585. ccdc->shadow_update = 0;
  586. return -EFAULT;
  587. }
  588. ccdc->obclamp = !!(OMAP3ISP_CCDC_BLCLAMP & ccdc_struct->flag);
  589. ccdc->update |= OMAP3ISP_CCDC_BLCLAMP;
  590. }
  591. if (OMAP3ISP_CCDC_BCOMP & ccdc_struct->update) {
  592. if (copy_from_user(&ccdc->blcomp, ccdc_struct->blcomp,
  593. sizeof(ccdc->blcomp))) {
  594. ccdc->shadow_update = 0;
  595. return -EFAULT;
  596. }
  597. ccdc->update |= OMAP3ISP_CCDC_BCOMP;
  598. }
  599. ccdc->shadow_update = 0;
  600. if (OMAP3ISP_CCDC_FPC & ccdc_struct->update) {
  601. struct omap3isp_ccdc_fpc fpc;
  602. struct ispccdc_fpc fpc_old = { .addr = NULL, };
  603. struct ispccdc_fpc fpc_new;
  604. u32 size;
  605. if (ccdc->state != ISP_PIPELINE_STREAM_STOPPED)
  606. return -EBUSY;
  607. ccdc->fpc_en = !!(OMAP3ISP_CCDC_FPC & ccdc_struct->flag);
  608. if (ccdc->fpc_en) {
  609. if (copy_from_user(&fpc, ccdc_struct->fpc, sizeof(fpc)))
  610. return -EFAULT;
  611. size = fpc.fpnum * 4;
  612. /*
  613. * The table address must be 64-bytes aligned, which is
  614. * guaranteed by dma_alloc_coherent().
  615. */
  616. fpc_new.fpnum = fpc.fpnum;
  617. fpc_new.addr = dma_alloc_coherent(isp->dev, size,
  618. &fpc_new.dma,
  619. GFP_KERNEL);
  620. if (fpc_new.addr == NULL)
  621. return -ENOMEM;
  622. if (copy_from_user(fpc_new.addr,
  623. (__force void __user *)fpc.fpcaddr,
  624. size)) {
  625. dma_free_coherent(isp->dev, size, fpc_new.addr,
  626. fpc_new.dma);
  627. return -EFAULT;
  628. }
  629. fpc_old = ccdc->fpc;
  630. ccdc->fpc = fpc_new;
  631. }
  632. ccdc_configure_fpc(ccdc);
  633. if (fpc_old.addr != NULL)
  634. dma_free_coherent(isp->dev, fpc_old.fpnum * 4,
  635. fpc_old.addr, fpc_old.dma);
  636. }
  637. return ccdc_lsc_config(ccdc, ccdc_struct);
  638. }
  639. static void ccdc_apply_controls(struct isp_ccdc_device *ccdc)
  640. {
  641. if (ccdc->update & OMAP3ISP_CCDC_ALAW) {
  642. ccdc_configure_alaw(ccdc);
  643. ccdc->update &= ~OMAP3ISP_CCDC_ALAW;
  644. }
  645. if (ccdc->update & OMAP3ISP_CCDC_LPF) {
  646. ccdc_configure_lpf(ccdc);
  647. ccdc->update &= ~OMAP3ISP_CCDC_LPF;
  648. }
  649. if (ccdc->update & OMAP3ISP_CCDC_BLCLAMP) {
  650. ccdc_configure_clamp(ccdc);
  651. ccdc->update &= ~OMAP3ISP_CCDC_BLCLAMP;
  652. }
  653. if (ccdc->update & OMAP3ISP_CCDC_BCOMP) {
  654. ccdc_configure_black_comp(ccdc);
  655. ccdc->update &= ~OMAP3ISP_CCDC_BCOMP;
  656. }
  657. }
  658. /*
  659. * omap3isp_ccdc_restore_context - Restore values of the CCDC module registers
  660. * @isp: Pointer to ISP device
  661. */
  662. void omap3isp_ccdc_restore_context(struct isp_device *isp)
  663. {
  664. struct isp_ccdc_device *ccdc = &isp->isp_ccdc;
  665. isp_reg_set(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_CFG, ISPCCDC_CFG_VDLC);
  666. ccdc->update = OMAP3ISP_CCDC_ALAW | OMAP3ISP_CCDC_LPF
  667. | OMAP3ISP_CCDC_BLCLAMP | OMAP3ISP_CCDC_BCOMP;
  668. ccdc_apply_controls(ccdc);
  669. ccdc_configure_fpc(ccdc);
  670. }
  671. /* -----------------------------------------------------------------------------
  672. * Format- and pipeline-related configuration helpers
  673. */
  674. /*
  675. * ccdc_config_vp - Configure the Video Port.
  676. * @ccdc: Pointer to ISP CCDC device.
  677. */
  678. static void ccdc_config_vp(struct isp_ccdc_device *ccdc)
  679. {
  680. struct isp_pipeline *pipe = to_isp_pipeline(&ccdc->subdev.entity);
  681. struct isp_device *isp = to_isp_device(ccdc);
  682. const struct isp_format_info *info;
  683. unsigned long l3_ick = pipe->l3_ick;
  684. unsigned int max_div = isp->revision == ISP_REVISION_15_0 ? 64 : 8;
  685. unsigned int div = 0;
  686. u32 fmtcfg_vp;
  687. fmtcfg_vp = isp_reg_readl(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_FMTCFG)
  688. & ~(ISPCCDC_FMTCFG_VPIN_MASK | ISPCCDC_FMTCFG_VPIF_FRQ_MASK);
  689. info = omap3isp_video_format_info(ccdc->formats[CCDC_PAD_SINK].code);
  690. switch (info->width) {
  691. case 8:
  692. case 10:
  693. fmtcfg_vp |= ISPCCDC_FMTCFG_VPIN_9_0;
  694. break;
  695. case 11:
  696. fmtcfg_vp |= ISPCCDC_FMTCFG_VPIN_10_1;
  697. break;
  698. case 12:
  699. fmtcfg_vp |= ISPCCDC_FMTCFG_VPIN_11_2;
  700. break;
  701. case 13:
  702. fmtcfg_vp |= ISPCCDC_FMTCFG_VPIN_12_3;
  703. break;
  704. }
  705. if (pipe->input)
  706. div = DIV_ROUND_UP(l3_ick, pipe->max_rate);
  707. else if (pipe->external_rate)
  708. div = l3_ick / pipe->external_rate;
  709. div = clamp(div, 2U, max_div);
  710. fmtcfg_vp |= (div - 2) << ISPCCDC_FMTCFG_VPIF_FRQ_SHIFT;
  711. isp_reg_writel(isp, fmtcfg_vp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_FMTCFG);
  712. }
  713. /*
  714. * ccdc_enable_vp - Enable Video Port.
  715. * @ccdc: Pointer to ISP CCDC device.
  716. * @enable: 0 Disables VP, 1 Enables VP
  717. *
  718. * This is needed for outputting image to Preview, H3A and HIST ISP submodules.
  719. */
  720. static void ccdc_enable_vp(struct isp_ccdc_device *ccdc, u8 enable)
  721. {
  722. struct isp_device *isp = to_isp_device(ccdc);
  723. isp_reg_clr_set(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_FMTCFG,
  724. ISPCCDC_FMTCFG_VPEN, enable ? ISPCCDC_FMTCFG_VPEN : 0);
  725. }
  726. /*
  727. * ccdc_config_outlineoffset - Configure memory saving output line offset
  728. * @ccdc: Pointer to ISP CCDC device.
  729. * @offset: Address offset to start a new line. Must be twice the
  730. * Output width and aligned on 32 byte boundary
  731. * @oddeven: Specifies the odd/even line pattern to be chosen to store the
  732. * output.
  733. * @numlines: Set the value 0-3 for +1-4lines, 4-7 for -1-4lines.
  734. *
  735. * - Configures the output line offset when stored in memory
  736. * - Sets the odd/even line pattern to store the output
  737. * (EVENEVEN (1), ODDEVEN (2), EVENODD (3), ODDODD (4))
  738. * - Configures the number of even and odd line fields in case of rearranging
  739. * the lines.
  740. */
  741. static void ccdc_config_outlineoffset(struct isp_ccdc_device *ccdc,
  742. u32 offset, u8 oddeven, u8 numlines)
  743. {
  744. struct isp_device *isp = to_isp_device(ccdc);
  745. isp_reg_writel(isp, offset & 0xffff,
  746. OMAP3_ISP_IOMEM_CCDC, ISPCCDC_HSIZE_OFF);
  747. isp_reg_clr(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_SDOFST,
  748. ISPCCDC_SDOFST_FINV);
  749. isp_reg_clr(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_SDOFST,
  750. ISPCCDC_SDOFST_FOFST_4L);
  751. switch (oddeven) {
  752. case EVENEVEN:
  753. isp_reg_set(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_SDOFST,
  754. (numlines & 0x7) << ISPCCDC_SDOFST_LOFST0_SHIFT);
  755. break;
  756. case ODDEVEN:
  757. isp_reg_set(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_SDOFST,
  758. (numlines & 0x7) << ISPCCDC_SDOFST_LOFST1_SHIFT);
  759. break;
  760. case EVENODD:
  761. isp_reg_set(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_SDOFST,
  762. (numlines & 0x7) << ISPCCDC_SDOFST_LOFST2_SHIFT);
  763. break;
  764. case ODDODD:
  765. isp_reg_set(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_SDOFST,
  766. (numlines & 0x7) << ISPCCDC_SDOFST_LOFST3_SHIFT);
  767. break;
  768. default:
  769. break;
  770. }
  771. }
  772. /*
  773. * ccdc_set_outaddr - Set memory address to save output image
  774. * @ccdc: Pointer to ISP CCDC device.
  775. * @addr: ISP MMU Mapped 32-bit memory address aligned on 32 byte boundary.
  776. *
  777. * Sets the memory address where the output will be saved.
  778. */
  779. static void ccdc_set_outaddr(struct isp_ccdc_device *ccdc, u32 addr)
  780. {
  781. struct isp_device *isp = to_isp_device(ccdc);
  782. isp_reg_writel(isp, addr, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_SDR_ADDR);
  783. }
  784. /*
  785. * omap3isp_ccdc_max_rate - Calculate maximum input data rate based on the input
  786. * @ccdc: Pointer to ISP CCDC device.
  787. * @max_rate: Maximum calculated data rate.
  788. *
  789. * Returns in *max_rate less value between calculated and passed
  790. */
  791. void omap3isp_ccdc_max_rate(struct isp_ccdc_device *ccdc,
  792. unsigned int *max_rate)
  793. {
  794. struct isp_pipeline *pipe = to_isp_pipeline(&ccdc->subdev.entity);
  795. unsigned int rate;
  796. if (pipe == NULL)
  797. return;
  798. /*
  799. * TRM says that for parallel sensors the maximum data rate
  800. * should be 90% form L3/2 clock, otherwise just L3/2.
  801. */
  802. if (ccdc->input == CCDC_INPUT_PARALLEL)
  803. rate = pipe->l3_ick / 2 * 9 / 10;
  804. else
  805. rate = pipe->l3_ick / 2;
  806. *max_rate = min(*max_rate, rate);
  807. }
  808. /*
  809. * ccdc_config_sync_if - Set CCDC sync interface configuration
  810. * @ccdc: Pointer to ISP CCDC device.
  811. * @pdata: Parallel interface platform data (may be NULL)
  812. * @data_size: Data size
  813. */
  814. static void ccdc_config_sync_if(struct isp_ccdc_device *ccdc,
  815. struct isp_parallel_platform_data *pdata,
  816. unsigned int data_size)
  817. {
  818. struct isp_device *isp = to_isp_device(ccdc);
  819. const struct v4l2_mbus_framefmt *format;
  820. u32 syn_mode = ISPCCDC_SYN_MODE_VDHDEN;
  821. format = &ccdc->formats[CCDC_PAD_SINK];
  822. if (format->code == V4L2_MBUS_FMT_YUYV8_2X8 ||
  823. format->code == V4L2_MBUS_FMT_UYVY8_2X8) {
  824. /* The bridge is enabled for YUV8 formats. Configure the input
  825. * mode accordingly.
  826. */
  827. syn_mode |= ISPCCDC_SYN_MODE_INPMOD_YCBCR16;
  828. }
  829. switch (data_size) {
  830. case 8:
  831. syn_mode |= ISPCCDC_SYN_MODE_DATSIZ_8;
  832. break;
  833. case 10:
  834. syn_mode |= ISPCCDC_SYN_MODE_DATSIZ_10;
  835. break;
  836. case 11:
  837. syn_mode |= ISPCCDC_SYN_MODE_DATSIZ_11;
  838. break;
  839. case 12:
  840. syn_mode |= ISPCCDC_SYN_MODE_DATSIZ_12;
  841. break;
  842. }
  843. if (pdata && pdata->data_pol)
  844. syn_mode |= ISPCCDC_SYN_MODE_DATAPOL;
  845. if (pdata && pdata->hs_pol)
  846. syn_mode |= ISPCCDC_SYN_MODE_HDPOL;
  847. if (pdata && pdata->vs_pol)
  848. syn_mode |= ISPCCDC_SYN_MODE_VDPOL;
  849. isp_reg_writel(isp, syn_mode, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_SYN_MODE);
  850. /* The CCDC_CFG.Y8POS bit is used in YCbCr8 input mode only. The
  851. * hardware seems to ignore it in all other input modes.
  852. */
  853. if (format->code == V4L2_MBUS_FMT_UYVY8_2X8)
  854. isp_reg_set(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_CFG,
  855. ISPCCDC_CFG_Y8POS);
  856. else
  857. isp_reg_clr(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_CFG,
  858. ISPCCDC_CFG_Y8POS);
  859. isp_reg_clr(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_REC656IF,
  860. ISPCCDC_REC656IF_R656ON);
  861. }
  862. /* CCDC formats descriptions */
  863. static const u32 ccdc_sgrbg_pattern =
  864. ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP0PLC0_SHIFT |
  865. ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP0PLC1_SHIFT |
  866. ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP0PLC2_SHIFT |
  867. ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP0PLC3_SHIFT |
  868. ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP1PLC0_SHIFT |
  869. ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP1PLC1_SHIFT |
  870. ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP1PLC2_SHIFT |
  871. ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP1PLC3_SHIFT |
  872. ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP2PLC0_SHIFT |
  873. ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP2PLC1_SHIFT |
  874. ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP2PLC2_SHIFT |
  875. ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP2PLC3_SHIFT |
  876. ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP3PLC0_SHIFT |
  877. ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP3PLC1_SHIFT |
  878. ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP3PLC2_SHIFT |
  879. ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP3PLC3_SHIFT;
  880. static const u32 ccdc_srggb_pattern =
  881. ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP0PLC0_SHIFT |
  882. ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP0PLC1_SHIFT |
  883. ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP0PLC2_SHIFT |
  884. ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP0PLC3_SHIFT |
  885. ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP1PLC0_SHIFT |
  886. ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP1PLC1_SHIFT |
  887. ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP1PLC2_SHIFT |
  888. ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP1PLC3_SHIFT |
  889. ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP2PLC0_SHIFT |
  890. ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP2PLC1_SHIFT |
  891. ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP2PLC2_SHIFT |
  892. ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP2PLC3_SHIFT |
  893. ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP3PLC0_SHIFT |
  894. ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP3PLC1_SHIFT |
  895. ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP3PLC2_SHIFT |
  896. ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP3PLC3_SHIFT;
  897. static const u32 ccdc_sbggr_pattern =
  898. ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP0PLC0_SHIFT |
  899. ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP0PLC1_SHIFT |
  900. ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP0PLC2_SHIFT |
  901. ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP0PLC3_SHIFT |
  902. ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP1PLC0_SHIFT |
  903. ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP1PLC1_SHIFT |
  904. ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP1PLC2_SHIFT |
  905. ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP1PLC3_SHIFT |
  906. ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP2PLC0_SHIFT |
  907. ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP2PLC1_SHIFT |
  908. ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP2PLC2_SHIFT |
  909. ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP2PLC3_SHIFT |
  910. ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP3PLC0_SHIFT |
  911. ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP3PLC1_SHIFT |
  912. ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP3PLC2_SHIFT |
  913. ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP3PLC3_SHIFT;
  914. static const u32 ccdc_sgbrg_pattern =
  915. ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP0PLC0_SHIFT |
  916. ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP0PLC1_SHIFT |
  917. ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP0PLC2_SHIFT |
  918. ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP0PLC3_SHIFT |
  919. ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP1PLC0_SHIFT |
  920. ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP1PLC1_SHIFT |
  921. ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP1PLC2_SHIFT |
  922. ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP1PLC3_SHIFT |
  923. ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP2PLC0_SHIFT |
  924. ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP2PLC1_SHIFT |
  925. ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP2PLC2_SHIFT |
  926. ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP2PLC3_SHIFT |
  927. ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP3PLC0_SHIFT |
  928. ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP3PLC1_SHIFT |
  929. ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP3PLC2_SHIFT |
  930. ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP3PLC3_SHIFT;
  931. static void ccdc_configure(struct isp_ccdc_device *ccdc)
  932. {
  933. struct isp_device *isp = to_isp_device(ccdc);
  934. struct isp_parallel_platform_data *pdata = NULL;
  935. struct v4l2_subdev *sensor;
  936. struct v4l2_mbus_framefmt *format;
  937. const struct v4l2_rect *crop;
  938. const struct isp_format_info *fmt_info;
  939. struct v4l2_subdev_format fmt_src;
  940. unsigned int depth_out;
  941. unsigned int depth_in = 0;
  942. struct media_pad *pad;
  943. unsigned long flags;
  944. unsigned int bridge;
  945. unsigned int shift;
  946. u32 syn_mode;
  947. u32 ccdc_pattern;
  948. pad = media_entity_remote_pad(&ccdc->pads[CCDC_PAD_SINK]);
  949. sensor = media_entity_to_v4l2_subdev(pad->entity);
  950. if (ccdc->input == CCDC_INPUT_PARALLEL)
  951. pdata = &((struct isp_v4l2_subdevs_group *)sensor->host_priv)
  952. ->bus.parallel;
  953. /* CCDC_PAD_SINK */
  954. format = &ccdc->formats[CCDC_PAD_SINK];
  955. /* Compute the lane shifter shift value and enable the bridge when the
  956. * input format is YUV.
  957. */
  958. fmt_src.pad = pad->index;
  959. fmt_src.which = V4L2_SUBDEV_FORMAT_ACTIVE;
  960. if (!v4l2_subdev_call(sensor, pad, get_fmt, NULL, &fmt_src)) {
  961. fmt_info = omap3isp_video_format_info(fmt_src.format.code);
  962. depth_in = fmt_info->width;
  963. }
  964. fmt_info = omap3isp_video_format_info(format->code);
  965. depth_out = fmt_info->width;
  966. shift = depth_in - depth_out;
  967. if (fmt_info->code == V4L2_MBUS_FMT_YUYV8_2X8)
  968. bridge = ISPCTRL_PAR_BRIDGE_LENDIAN;
  969. else if (fmt_info->code == V4L2_MBUS_FMT_UYVY8_2X8)
  970. bridge = ISPCTRL_PAR_BRIDGE_BENDIAN;
  971. else
  972. bridge = ISPCTRL_PAR_BRIDGE_DISABLE;
  973. omap3isp_configure_bridge(isp, ccdc->input, pdata, shift, bridge);
  974. ccdc_config_sync_if(ccdc, pdata, depth_out);
  975. syn_mode = isp_reg_readl(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_SYN_MODE);
  976. /* Use the raw, unprocessed data when writing to memory. The H3A and
  977. * histogram modules are still fed with lens shading corrected data.
  978. */
  979. syn_mode &= ~ISPCCDC_SYN_MODE_VP2SDR;
  980. if (ccdc->output & CCDC_OUTPUT_MEMORY)
  981. syn_mode |= ISPCCDC_SYN_MODE_WEN;
  982. else
  983. syn_mode &= ~ISPCCDC_SYN_MODE_WEN;
  984. if (ccdc->output & CCDC_OUTPUT_RESIZER)
  985. syn_mode |= ISPCCDC_SYN_MODE_SDR2RSZ;
  986. else
  987. syn_mode &= ~ISPCCDC_SYN_MODE_SDR2RSZ;
  988. /* Mosaic filter */
  989. switch (format->code) {
  990. case V4L2_MBUS_FMT_SRGGB10_1X10:
  991. case V4L2_MBUS_FMT_SRGGB12_1X12:
  992. ccdc_pattern = ccdc_srggb_pattern;
  993. break;
  994. case V4L2_MBUS_FMT_SBGGR10_1X10:
  995. case V4L2_MBUS_FMT_SBGGR12_1X12:
  996. ccdc_pattern = ccdc_sbggr_pattern;
  997. break;
  998. case V4L2_MBUS_FMT_SGBRG10_1X10:
  999. case V4L2_MBUS_FMT_SGBRG12_1X12:
  1000. ccdc_pattern = ccdc_sgbrg_pattern;
  1001. break;
  1002. default:
  1003. /* Use GRBG */
  1004. ccdc_pattern = ccdc_sgrbg_pattern;
  1005. break;
  1006. }
  1007. ccdc_config_imgattr(ccdc, ccdc_pattern);
  1008. /* Generate VD0 on the last line of the image and VD1 on the
  1009. * 2/3 height line.
  1010. */
  1011. isp_reg_writel(isp, ((format->height - 2) << ISPCCDC_VDINT_0_SHIFT) |
  1012. ((format->height * 2 / 3) << ISPCCDC_VDINT_1_SHIFT),
  1013. OMAP3_ISP_IOMEM_CCDC, ISPCCDC_VDINT);
  1014. /* CCDC_PAD_SOURCE_OF */
  1015. format = &ccdc->formats[CCDC_PAD_SOURCE_OF];
  1016. crop = &ccdc->crop;
  1017. isp_reg_writel(isp, (crop->left << ISPCCDC_HORZ_INFO_SPH_SHIFT) |
  1018. ((crop->width - 1) << ISPCCDC_HORZ_INFO_NPH_SHIFT),
  1019. OMAP3_ISP_IOMEM_CCDC, ISPCCDC_HORZ_INFO);
  1020. isp_reg_writel(isp, crop->top << ISPCCDC_VERT_START_SLV0_SHIFT,
  1021. OMAP3_ISP_IOMEM_CCDC, ISPCCDC_VERT_START);
  1022. isp_reg_writel(isp, (crop->height - 1)
  1023. << ISPCCDC_VERT_LINES_NLV_SHIFT,
  1024. OMAP3_ISP_IOMEM_CCDC, ISPCCDC_VERT_LINES);
  1025. ccdc_config_outlineoffset(ccdc, ccdc->video_out.bpl_value, 0, 0);
  1026. /* The CCDC outputs data in UYVY order by default. Swap bytes to get
  1027. * YUYV.
  1028. */
  1029. if (format->code == V4L2_MBUS_FMT_YUYV8_1X16)
  1030. isp_reg_set(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_CFG,
  1031. ISPCCDC_CFG_BSWD);
  1032. else
  1033. isp_reg_clr(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_CFG,
  1034. ISPCCDC_CFG_BSWD);
  1035. /* Use PACK8 mode for 1byte per pixel formats. */
  1036. if (omap3isp_video_format_info(format->code)->width <= 8)
  1037. syn_mode |= ISPCCDC_SYN_MODE_PACK8;
  1038. else
  1039. syn_mode &= ~ISPCCDC_SYN_MODE_PACK8;
  1040. isp_reg_writel(isp, syn_mode, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_SYN_MODE);
  1041. /* CCDC_PAD_SOURCE_VP */
  1042. format = &ccdc->formats[CCDC_PAD_SOURCE_VP];
  1043. isp_reg_writel(isp, (0 << ISPCCDC_FMT_HORZ_FMTSPH_SHIFT) |
  1044. (format->width << ISPCCDC_FMT_HORZ_FMTLNH_SHIFT),
  1045. OMAP3_ISP_IOMEM_CCDC, ISPCCDC_FMT_HORZ);
  1046. isp_reg_writel(isp, (0 << ISPCCDC_FMT_VERT_FMTSLV_SHIFT) |
  1047. ((format->height + 1) << ISPCCDC_FMT_VERT_FMTLNV_SHIFT),
  1048. OMAP3_ISP_IOMEM_CCDC, ISPCCDC_FMT_VERT);
  1049. isp_reg_writel(isp, (format->width << ISPCCDC_VP_OUT_HORZ_NUM_SHIFT) |
  1050. (format->height << ISPCCDC_VP_OUT_VERT_NUM_SHIFT),
  1051. OMAP3_ISP_IOMEM_CCDC, ISPCCDC_VP_OUT);
  1052. /* Lens shading correction. */
  1053. spin_lock_irqsave(&ccdc->lsc.req_lock, flags);
  1054. if (ccdc->lsc.request == NULL)
  1055. goto unlock;
  1056. WARN_ON(ccdc->lsc.active);
  1057. /* Get last good LSC configuration. If it is not supported for
  1058. * the current active resolution discard it.
  1059. */
  1060. if (ccdc->lsc.active == NULL &&
  1061. __ccdc_lsc_configure(ccdc, ccdc->lsc.request) == 0) {
  1062. ccdc->lsc.active = ccdc->lsc.request;
  1063. } else {
  1064. list_add_tail(&ccdc->lsc.request->list, &ccdc->lsc.free_queue);
  1065. schedule_work(&ccdc->lsc.table_work);
  1066. }
  1067. ccdc->lsc.request = NULL;
  1068. unlock:
  1069. spin_unlock_irqrestore(&ccdc->lsc.req_lock, flags);
  1070. ccdc_apply_controls(ccdc);
  1071. }
  1072. static void __ccdc_enable(struct isp_ccdc_device *ccdc, int enable)
  1073. {
  1074. struct isp_device *isp = to_isp_device(ccdc);
  1075. isp_reg_clr_set(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_PCR,
  1076. ISPCCDC_PCR_EN, enable ? ISPCCDC_PCR_EN : 0);
  1077. }
  1078. static int ccdc_disable(struct isp_ccdc_device *ccdc)
  1079. {
  1080. unsigned long flags;
  1081. int ret = 0;
  1082. spin_lock_irqsave(&ccdc->lock, flags);
  1083. if (ccdc->state == ISP_PIPELINE_STREAM_CONTINUOUS)
  1084. ccdc->stopping = CCDC_STOP_REQUEST;
  1085. spin_unlock_irqrestore(&ccdc->lock, flags);
  1086. ret = wait_event_timeout(ccdc->wait,
  1087. ccdc->stopping == CCDC_STOP_FINISHED,
  1088. msecs_to_jiffies(2000));
  1089. if (ret == 0) {
  1090. ret = -ETIMEDOUT;
  1091. dev_warn(to_device(ccdc), "CCDC stop timeout!\n");
  1092. }
  1093. omap3isp_sbl_disable(to_isp_device(ccdc), OMAP3_ISP_SBL_CCDC_LSC_READ);
  1094. mutex_lock(&ccdc->ioctl_lock);
  1095. ccdc_lsc_free_request(ccdc, ccdc->lsc.request);
  1096. ccdc->lsc.request = ccdc->lsc.active;
  1097. ccdc->lsc.active = NULL;
  1098. cancel_work_sync(&ccdc->lsc.table_work);
  1099. ccdc_lsc_free_queue(ccdc, &ccdc->lsc.free_queue);
  1100. mutex_unlock(&ccdc->ioctl_lock);
  1101. ccdc->stopping = CCDC_STOP_NOT_REQUESTED;
  1102. return ret > 0 ? 0 : ret;
  1103. }
  1104. static void ccdc_enable(struct isp_ccdc_device *ccdc)
  1105. {
  1106. if (ccdc_lsc_is_configured(ccdc))
  1107. __ccdc_lsc_enable(ccdc, 1);
  1108. __ccdc_enable(ccdc, 1);
  1109. }
  1110. /* -----------------------------------------------------------------------------
  1111. * Interrupt handling
  1112. */
  1113. /*
  1114. * ccdc_sbl_busy - Poll idle state of CCDC and related SBL memory write bits
  1115. * @ccdc: Pointer to ISP CCDC device.
  1116. *
  1117. * Returns zero if the CCDC is idle and the image has been written to
  1118. * memory, too.
  1119. */
  1120. static int ccdc_sbl_busy(struct isp_ccdc_device *ccdc)
  1121. {
  1122. struct isp_device *isp = to_isp_device(ccdc);
  1123. return omap3isp_ccdc_busy(ccdc)
  1124. | (isp_reg_readl(isp, OMAP3_ISP_IOMEM_SBL, ISPSBL_CCDC_WR_0) &
  1125. ISPSBL_CCDC_WR_0_DATA_READY)
  1126. | (isp_reg_readl(isp, OMAP3_ISP_IOMEM_SBL, ISPSBL_CCDC_WR_1) &
  1127. ISPSBL_CCDC_WR_0_DATA_READY)
  1128. | (isp_reg_readl(isp, OMAP3_ISP_IOMEM_SBL, ISPSBL_CCDC_WR_2) &
  1129. ISPSBL_CCDC_WR_0_DATA_READY)
  1130. | (isp_reg_readl(isp, OMAP3_ISP_IOMEM_SBL, ISPSBL_CCDC_WR_3) &
  1131. ISPSBL_CCDC_WR_0_DATA_READY);
  1132. }
  1133. /*
  1134. * ccdc_sbl_wait_idle - Wait until the CCDC and related SBL are idle
  1135. * @ccdc: Pointer to ISP CCDC device.
  1136. * @max_wait: Max retry count in us for wait for idle/busy transition.
  1137. */
  1138. static int ccdc_sbl_wait_idle(struct isp_ccdc_device *ccdc,
  1139. unsigned int max_wait)
  1140. {
  1141. unsigned int wait = 0;
  1142. if (max_wait == 0)
  1143. max_wait = 10000; /* 10 ms */
  1144. for (wait = 0; wait <= max_wait; wait++) {
  1145. if (!ccdc_sbl_busy(ccdc))
  1146. return 0;
  1147. rmb();
  1148. udelay(1);
  1149. }
  1150. return -EBUSY;
  1151. }
  1152. /* __ccdc_handle_stopping - Handle CCDC and/or LSC stopping sequence
  1153. * @ccdc: Pointer to ISP CCDC device.
  1154. * @event: Pointing which event trigger handler
  1155. *
  1156. * Return 1 when the event and stopping request combination is satisfied,
  1157. * zero otherwise.
  1158. */
  1159. static int __ccdc_handle_stopping(struct isp_ccdc_device *ccdc, u32 event)
  1160. {
  1161. int rval = 0;
  1162. switch ((ccdc->stopping & 3) | event) {
  1163. case CCDC_STOP_REQUEST | CCDC_EVENT_VD1:
  1164. if (ccdc->lsc.state != LSC_STATE_STOPPED)
  1165. __ccdc_lsc_enable(ccdc, 0);
  1166. __ccdc_enable(ccdc, 0);
  1167. ccdc->stopping = CCDC_STOP_EXECUTED;
  1168. return 1;
  1169. case CCDC_STOP_EXECUTED | CCDC_EVENT_VD0:
  1170. ccdc->stopping |= CCDC_STOP_CCDC_FINISHED;
  1171. if (ccdc->lsc.state == LSC_STATE_STOPPED)
  1172. ccdc->stopping |= CCDC_STOP_LSC_FINISHED;
  1173. rval = 1;
  1174. break;
  1175. case CCDC_STOP_EXECUTED | CCDC_EVENT_LSC_DONE:
  1176. ccdc->stopping |= CCDC_STOP_LSC_FINISHED;
  1177. rval = 1;
  1178. break;
  1179. case CCDC_STOP_EXECUTED | CCDC_EVENT_VD1:
  1180. return 1;
  1181. }
  1182. if (ccdc->stopping == CCDC_STOP_FINISHED) {
  1183. wake_up(&ccdc->wait);
  1184. rval = 1;
  1185. }
  1186. return rval;
  1187. }
  1188. static void ccdc_hs_vs_isr(struct isp_ccdc_device *ccdc)
  1189. {
  1190. struct isp_pipeline *pipe = to_isp_pipeline(&ccdc->subdev.entity);
  1191. struct video_device *vdev = ccdc->subdev.devnode;
  1192. struct v4l2_event event;
  1193. /* Frame number propagation */
  1194. atomic_inc(&pipe->frame_number);
  1195. memset(&event, 0, sizeof(event));
  1196. event.type = V4L2_EVENT_FRAME_SYNC;
  1197. event.u.frame_sync.frame_sequence = atomic_read(&pipe->frame_number);
  1198. v4l2_event_queue(vdev, &event);
  1199. }
  1200. /*
  1201. * ccdc_lsc_isr - Handle LSC events
  1202. * @ccdc: Pointer to ISP CCDC device.
  1203. * @events: LSC events
  1204. */
  1205. static void ccdc_lsc_isr(struct isp_ccdc_device *ccdc, u32 events)
  1206. {
  1207. unsigned long flags;
  1208. if (events & IRQ0STATUS_CCDC_LSC_PREF_ERR_IRQ) {
  1209. struct isp_pipeline *pipe =
  1210. to_isp_pipeline(&ccdc->subdev.entity);
  1211. ccdc_lsc_error_handler(ccdc);
  1212. pipe->error = true;
  1213. dev_dbg(to_device(ccdc), "lsc prefetch error\n");
  1214. }
  1215. if (!(events & IRQ0STATUS_CCDC_LSC_DONE_IRQ))
  1216. return;
  1217. /* LSC_DONE interrupt occur, there are two cases
  1218. * 1. stopping for reconfiguration
  1219. * 2. stopping because of STREAM OFF command
  1220. */
  1221. spin_lock_irqsave(&ccdc->lsc.req_lock, flags);
  1222. if (ccdc->lsc.state == LSC_STATE_STOPPING)
  1223. ccdc->lsc.state = LSC_STATE_STOPPED;
  1224. if (__ccdc_handle_stopping(ccdc, CCDC_EVENT_LSC_DONE))
  1225. goto done;
  1226. if (ccdc->lsc.state != LSC_STATE_RECONFIG)
  1227. goto done;
  1228. /* LSC is in STOPPING state, change to the new state */
  1229. ccdc->lsc.state = LSC_STATE_STOPPED;
  1230. /* This is an exception. Start of frame and LSC_DONE interrupt
  1231. * have been received on the same time. Skip this event and wait
  1232. * for better times.
  1233. */
  1234. if (events & IRQ0STATUS_HS_VS_IRQ)
  1235. goto done;
  1236. /* The LSC engine is stopped at this point. Enable it if there's a
  1237. * pending request.
  1238. */
  1239. if (ccdc->lsc.request == NULL)
  1240. goto done;
  1241. ccdc_lsc_enable(ccdc);
  1242. done:
  1243. spin_unlock_irqrestore(&ccdc->lsc.req_lock, flags);
  1244. }
  1245. static int ccdc_isr_buffer(struct isp_ccdc_device *ccdc)
  1246. {
  1247. struct isp_pipeline *pipe = to_isp_pipeline(&ccdc->subdev.entity);
  1248. struct isp_device *isp = to_isp_device(ccdc);
  1249. struct isp_buffer *buffer;
  1250. int restart = 0;
  1251. /* The CCDC generates VD0 interrupts even when disabled (the datasheet
  1252. * doesn't explicitly state if that's supposed to happen or not, so it
  1253. * can be considered as a hardware bug or as a feature, but we have to
  1254. * deal with it anyway). Disabling the CCDC when no buffer is available
  1255. * would thus not be enough, we need to handle the situation explicitly.
  1256. */
  1257. if (list_empty(&ccdc->video_out.dmaqueue))
  1258. goto done;
  1259. /* We're in continuous mode, and memory writes were disabled due to a
  1260. * buffer underrun. Reenable them now that we have a buffer. The buffer
  1261. * address has been set in ccdc_video_queue.
  1262. */
  1263. if (ccdc->state == ISP_PIPELINE_STREAM_CONTINUOUS && ccdc->underrun) {
  1264. restart = 1;
  1265. ccdc->underrun = 0;
  1266. goto done;
  1267. }
  1268. if (ccdc_sbl_wait_idle(ccdc, 1000)) {
  1269. dev_info(isp->dev, "CCDC won't become idle!\n");
  1270. isp->crashed |= 1U << ccdc->subdev.entity.id;
  1271. omap3isp_pipeline_cancel_stream(pipe);
  1272. goto done;
  1273. }
  1274. buffer = omap3isp_video_buffer_next(&ccdc->video_out);
  1275. if (buffer != NULL) {
  1276. ccdc_set_outaddr(ccdc, buffer->dma);
  1277. restart = 1;
  1278. }
  1279. pipe->state |= ISP_PIPELINE_IDLE_OUTPUT;
  1280. if (ccdc->state == ISP_PIPELINE_STREAM_SINGLESHOT &&
  1281. isp_pipeline_ready(pipe))
  1282. omap3isp_pipeline_set_stream(pipe,
  1283. ISP_PIPELINE_STREAM_SINGLESHOT);
  1284. done:
  1285. return restart;
  1286. }
  1287. /*
  1288. * ccdc_vd0_isr - Handle VD0 event
  1289. * @ccdc: Pointer to ISP CCDC device.
  1290. *
  1291. * Executes LSC deferred enablement before next frame starts.
  1292. */
  1293. static void ccdc_vd0_isr(struct isp_ccdc_device *ccdc)
  1294. {
  1295. unsigned long flags;
  1296. int restart = 0;
  1297. if (ccdc->output & CCDC_OUTPUT_MEMORY)
  1298. restart = ccdc_isr_buffer(ccdc);
  1299. spin_lock_irqsave(&ccdc->lock, flags);
  1300. if (__ccdc_handle_stopping(ccdc, CCDC_EVENT_VD0)) {
  1301. spin_unlock_irqrestore(&ccdc->lock, flags);
  1302. return;
  1303. }
  1304. if (!ccdc->shadow_update)
  1305. ccdc_apply_controls(ccdc);
  1306. spin_unlock_irqrestore(&ccdc->lock, flags);
  1307. if (restart)
  1308. ccdc_enable(ccdc);
  1309. }
  1310. /*
  1311. * ccdc_vd1_isr - Handle VD1 event
  1312. * @ccdc: Pointer to ISP CCDC device.
  1313. */
  1314. static void ccdc_vd1_isr(struct isp_ccdc_device *ccdc)
  1315. {
  1316. unsigned long flags;
  1317. spin_lock_irqsave(&ccdc->lsc.req_lock, flags);
  1318. /*
  1319. * Depending on the CCDC pipeline state, CCDC stopping should be
  1320. * handled differently. In SINGLESHOT we emulate an internal CCDC
  1321. * stopping because the CCDC hw works only in continuous mode.
  1322. * When CONTINUOUS pipeline state is used and the CCDC writes it's
  1323. * data to memory the CCDC and LSC are stopped immediately but
  1324. * without change the CCDC stopping state machine. The CCDC
  1325. * stopping state machine should be used only when user request
  1326. * for stopping is received (SINGLESHOT is an exeption).
  1327. */
  1328. switch (ccdc->state) {
  1329. case ISP_PIPELINE_STREAM_SINGLESHOT:
  1330. ccdc->stopping = CCDC_STOP_REQUEST;
  1331. break;
  1332. case ISP_PIPELINE_STREAM_CONTINUOUS:
  1333. if (ccdc->output & CCDC_OUTPUT_MEMORY) {
  1334. if (ccdc->lsc.state != LSC_STATE_STOPPED)
  1335. __ccdc_lsc_enable(ccdc, 0);
  1336. __ccdc_enable(ccdc, 0);
  1337. }
  1338. break;
  1339. case ISP_PIPELINE_STREAM_STOPPED:
  1340. break;
  1341. }
  1342. if (__ccdc_handle_stopping(ccdc, CCDC_EVENT_VD1))
  1343. goto done;
  1344. if (ccdc->lsc.request == NULL)
  1345. goto done;
  1346. /*
  1347. * LSC need to be reconfigured. Stop it here and on next LSC_DONE IRQ
  1348. * do the appropriate changes in registers
  1349. */
  1350. if (ccdc->lsc.state == LSC_STATE_RUNNING) {
  1351. __ccdc_lsc_enable(ccdc, 0);
  1352. ccdc->lsc.state = LSC_STATE_RECONFIG;
  1353. goto done;
  1354. }
  1355. /* LSC has been in STOPPED state, enable it */
  1356. if (ccdc->lsc.state == LSC_STATE_STOPPED)
  1357. ccdc_lsc_enable(ccdc);
  1358. done:
  1359. spin_unlock_irqrestore(&ccdc->lsc.req_lock, flags);
  1360. }
  1361. /*
  1362. * omap3isp_ccdc_isr - Configure CCDC during interframe time.
  1363. * @ccdc: Pointer to ISP CCDC device.
  1364. * @events: CCDC events
  1365. */
  1366. int omap3isp_ccdc_isr(struct isp_ccdc_device *ccdc, u32 events)
  1367. {
  1368. if (ccdc->state == ISP_PIPELINE_STREAM_STOPPED)
  1369. return 0;
  1370. if (events & IRQ0STATUS_CCDC_VD1_IRQ)
  1371. ccdc_vd1_isr(ccdc);
  1372. ccdc_lsc_isr(ccdc, events);
  1373. if (events & IRQ0STATUS_CCDC_VD0_IRQ)
  1374. ccdc_vd0_isr(ccdc);
  1375. if (events & IRQ0STATUS_HS_VS_IRQ)
  1376. ccdc_hs_vs_isr(ccdc);
  1377. return 0;
  1378. }
  1379. /* -----------------------------------------------------------------------------
  1380. * ISP video operations
  1381. */
  1382. static int ccdc_video_queue(struct isp_video *video, struct isp_buffer *buffer)
  1383. {
  1384. struct isp_ccdc_device *ccdc = &video->isp->isp_ccdc;
  1385. if (!(ccdc->output & CCDC_OUTPUT_MEMORY))
  1386. return -ENODEV;
  1387. ccdc_set_outaddr(ccdc, buffer->dma);
  1388. /* We now have a buffer queued on the output, restart the pipeline
  1389. * on the next CCDC interrupt if running in continuous mode (or when
  1390. * starting the stream).
  1391. */
  1392. ccdc->underrun = 1;
  1393. return 0;
  1394. }
  1395. static const struct isp_video_operations ccdc_video_ops = {
  1396. .queue = ccdc_video_queue,
  1397. };
  1398. /* -----------------------------------------------------------------------------
  1399. * V4L2 subdev operations
  1400. */
  1401. /*
  1402. * ccdc_ioctl - CCDC module private ioctl's
  1403. * @sd: ISP CCDC V4L2 subdevice
  1404. * @cmd: ioctl command
  1405. * @arg: ioctl argument
  1406. *
  1407. * Return 0 on success or a negative error code otherwise.
  1408. */
  1409. static long ccdc_ioctl(struct v4l2_subdev *sd, unsigned int cmd, void *arg)
  1410. {
  1411. struct isp_ccdc_device *ccdc = v4l2_get_subdevdata(sd);
  1412. int ret;
  1413. switch (cmd) {
  1414. case VIDIOC_OMAP3ISP_CCDC_CFG:
  1415. mutex_lock(&ccdc->ioctl_lock);
  1416. ret = ccdc_config(ccdc, arg);
  1417. mutex_unlock(&ccdc->ioctl_lock);
  1418. break;
  1419. default:
  1420. return -ENOIOCTLCMD;
  1421. }
  1422. return ret;
  1423. }
  1424. static int ccdc_subscribe_event(struct v4l2_subdev *sd, struct v4l2_fh *fh,
  1425. struct v4l2_event_subscription *sub)
  1426. {
  1427. if (sub->type != V4L2_EVENT_FRAME_SYNC)
  1428. return -EINVAL;
  1429. /* line number is zero at frame start */
  1430. if (sub->id != 0)
  1431. return -EINVAL;
  1432. return v4l2_event_subscribe(fh, sub, OMAP3ISP_CCDC_NEVENTS, NULL);
  1433. }
  1434. static int ccdc_unsubscribe_event(struct v4l2_subdev *sd, struct v4l2_fh *fh,
  1435. struct v4l2_event_subscription *sub)
  1436. {
  1437. return v4l2_event_unsubscribe(fh, sub);
  1438. }
  1439. /*
  1440. * ccdc_set_stream - Enable/Disable streaming on the CCDC module
  1441. * @sd: ISP CCDC V4L2 subdevice
  1442. * @enable: Enable/disable stream
  1443. *
  1444. * When writing to memory, the CCDC hardware can't be enabled without a memory
  1445. * buffer to write to. As the s_stream operation is called in response to a
  1446. * STREAMON call without any buffer queued yet, just update the enabled field
  1447. * and return immediately. The CCDC will be enabled in ccdc_isr_buffer().
  1448. *
  1449. * When not writing to memory enable the CCDC immediately.
  1450. */
  1451. static int ccdc_set_stream(struct v4l2_subdev *sd, int enable)
  1452. {
  1453. struct isp_ccdc_device *ccdc = v4l2_get_subdevdata(sd);
  1454. struct isp_device *isp = to_isp_device(ccdc);
  1455. int ret = 0;
  1456. if (ccdc->state == ISP_PIPELINE_STREAM_STOPPED) {
  1457. if (enable == ISP_PIPELINE_STREAM_STOPPED)
  1458. return 0;
  1459. omap3isp_subclk_enable(isp, OMAP3_ISP_SUBCLK_CCDC);
  1460. isp_reg_set(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_CFG,
  1461. ISPCCDC_CFG_VDLC);
  1462. ccdc_configure(ccdc);
  1463. /* TODO: Don't configure the video port if all of its output
  1464. * links are inactive.
  1465. */
  1466. ccdc_config_vp(ccdc);
  1467. ccdc_enable_vp(ccdc, 1);
  1468. ccdc_print_status(ccdc);
  1469. }
  1470. switch (enable) {
  1471. case ISP_PIPELINE_STREAM_CONTINUOUS:
  1472. if (ccdc->output & CCDC_OUTPUT_MEMORY)
  1473. omap3isp_sbl_enable(isp, OMAP3_ISP_SBL_CCDC_WRITE);
  1474. if (ccdc->underrun || !(ccdc->output & CCDC_OUTPUT_MEMORY))
  1475. ccdc_enable(ccdc);
  1476. ccdc->underrun = 0;
  1477. break;
  1478. case ISP_PIPELINE_STREAM_SINGLESHOT:
  1479. if (ccdc->output & CCDC_OUTPUT_MEMORY &&
  1480. ccdc->state != ISP_PIPELINE_STREAM_SINGLESHOT)
  1481. omap3isp_sbl_enable(isp, OMAP3_ISP_SBL_CCDC_WRITE);
  1482. ccdc_enable(ccdc);
  1483. break;
  1484. case ISP_PIPELINE_STREAM_STOPPED:
  1485. ret = ccdc_disable(ccdc);
  1486. if (ccdc->output & CCDC_OUTPUT_MEMORY)
  1487. omap3isp_sbl_disable(isp, OMAP3_ISP_SBL_CCDC_WRITE);
  1488. omap3isp_subclk_disable(isp, OMAP3_ISP_SUBCLK_CCDC);
  1489. ccdc->underrun = 0;
  1490. break;
  1491. }
  1492. ccdc->state = enable;
  1493. return ret;
  1494. }
  1495. static struct v4l2_mbus_framefmt *
  1496. __ccdc_get_format(struct isp_ccdc_device *ccdc, struct v4l2_subdev_fh *fh,
  1497. unsigned int pad, enum v4l2_subdev_format_whence which)
  1498. {
  1499. if (which == V4L2_SUBDEV_FORMAT_TRY)
  1500. return v4l2_subdev_get_try_format(fh, pad);
  1501. else
  1502. return &ccdc->formats[pad];
  1503. }
  1504. static struct v4l2_rect *
  1505. __ccdc_get_crop(struct isp_ccdc_device *ccdc, struct v4l2_subdev_fh *fh,
  1506. enum v4l2_subdev_format_whence which)
  1507. {
  1508. if (which == V4L2_SUBDEV_FORMAT_TRY)
  1509. return v4l2_subdev_get_try_crop(fh, CCDC_PAD_SOURCE_OF);
  1510. else
  1511. return &ccdc->crop;
  1512. }
  1513. /*
  1514. * ccdc_try_format - Try video format on a pad
  1515. * @ccdc: ISP CCDC device
  1516. * @fh : V4L2 subdev file handle
  1517. * @pad: Pad number
  1518. * @fmt: Format
  1519. */
  1520. static void
  1521. ccdc_try_format(struct isp_ccdc_device *ccdc, struct v4l2_subdev_fh *fh,
  1522. unsigned int pad, struct v4l2_mbus_framefmt *fmt,
  1523. enum v4l2_subdev_format_whence which)
  1524. {
  1525. const struct isp_format_info *info;
  1526. enum v4l2_mbus_pixelcode pixelcode;
  1527. unsigned int width = fmt->width;
  1528. unsigned int height = fmt->height;
  1529. struct v4l2_rect *crop;
  1530. unsigned int i;
  1531. switch (pad) {
  1532. case CCDC_PAD_SINK:
  1533. for (i = 0; i < ARRAY_SIZE(ccdc_fmts); i++) {
  1534. if (fmt->code == ccdc_fmts[i])
  1535. break;
  1536. }
  1537. /* If not found, use SGRBG10 as default */
  1538. if (i >= ARRAY_SIZE(ccdc_fmts))
  1539. fmt->code = V4L2_MBUS_FMT_SGRBG10_1X10;
  1540. /* Clamp the input size. */
  1541. fmt->width = clamp_t(u32, width, 32, 4096);
  1542. fmt->height = clamp_t(u32, height, 32, 4096);
  1543. break;
  1544. case CCDC_PAD_SOURCE_OF:
  1545. pixelcode = fmt->code;
  1546. *fmt = *__ccdc_get_format(ccdc, fh, CCDC_PAD_SINK, which);
  1547. /* YUV formats are converted from 2X8 to 1X16 by the bridge and
  1548. * can be byte-swapped.
  1549. */
  1550. if (fmt->code == V4L2_MBUS_FMT_YUYV8_2X8 ||
  1551. fmt->code == V4L2_MBUS_FMT_UYVY8_2X8) {
  1552. /* Use the user requested format if YUV. */
  1553. if (pixelcode == V4L2_MBUS_FMT_YUYV8_2X8 ||
  1554. pixelcode == V4L2_MBUS_FMT_UYVY8_2X8 ||
  1555. pixelcode == V4L2_MBUS_FMT_YUYV8_1X16 ||
  1556. pixelcode == V4L2_MBUS_FMT_UYVY8_1X16)
  1557. fmt->code = pixelcode;
  1558. if (fmt->code == V4L2_MBUS_FMT_YUYV8_2X8)
  1559. fmt->code = V4L2_MBUS_FMT_YUYV8_1X16;
  1560. else if (fmt->code == V4L2_MBUS_FMT_UYVY8_2X8)
  1561. fmt->code = V4L2_MBUS_FMT_UYVY8_1X16;
  1562. }
  1563. /* Hardcode the output size to the crop rectangle size. */
  1564. crop = __ccdc_get_crop(ccdc, fh, which);
  1565. fmt->width = crop->width;
  1566. fmt->height = crop->height;
  1567. break;
  1568. case CCDC_PAD_SOURCE_VP:
  1569. *fmt = *__ccdc_get_format(ccdc, fh, CCDC_PAD_SINK, which);
  1570. /* The video port interface truncates the data to 10 bits. */
  1571. info = omap3isp_video_format_info(fmt->code);
  1572. fmt->code = info->truncated;
  1573. /* YUV formats are not supported by the video port. */
  1574. if (fmt->code == V4L2_MBUS_FMT_YUYV8_2X8 ||
  1575. fmt->code == V4L2_MBUS_FMT_UYVY8_2X8)
  1576. fmt->code = 0;
  1577. /* The number of lines that can be clocked out from the video
  1578. * port output must be at least one line less than the number
  1579. * of input lines.
  1580. */
  1581. fmt->width = clamp_t(u32, width, 32, fmt->width);
  1582. fmt->height = clamp_t(u32, height, 32, fmt->height - 1);
  1583. break;
  1584. }
  1585. /* Data is written to memory unpacked, each 10-bit or 12-bit pixel is
  1586. * stored on 2 bytes.
  1587. */
  1588. fmt->colorspace = V4L2_COLORSPACE_SRGB;
  1589. fmt->field = V4L2_FIELD_NONE;
  1590. }
  1591. /*
  1592. * ccdc_try_crop - Validate a crop rectangle
  1593. * @ccdc: ISP CCDC device
  1594. * @sink: format on the sink pad
  1595. * @crop: crop rectangle to be validated
  1596. */
  1597. static void ccdc_try_crop(struct isp_ccdc_device *ccdc,
  1598. const struct v4l2_mbus_framefmt *sink,
  1599. struct v4l2_rect *crop)
  1600. {
  1601. const struct isp_format_info *info;
  1602. unsigned int max_width;
  1603. /* For Bayer formats, restrict left/top and width/height to even values
  1604. * to keep the Bayer pattern.
  1605. */
  1606. info = omap3isp_video_format_info(sink->code);
  1607. if (info->flavor != V4L2_MBUS_FMT_Y8_1X8) {
  1608. crop->left &= ~1;
  1609. crop->top &= ~1;
  1610. }
  1611. crop->left = clamp_t(u32, crop->left, 0, sink->width - CCDC_MIN_WIDTH);
  1612. crop->top = clamp_t(u32, crop->top, 0, sink->height - CCDC_MIN_HEIGHT);
  1613. /* The data formatter truncates the number of horizontal output pixels
  1614. * to a multiple of 16. To avoid clipping data, allow callers to request
  1615. * an output size bigger than the input size up to the nearest multiple
  1616. * of 16.
  1617. */
  1618. max_width = (sink->width - crop->left + 15) & ~15;
  1619. crop->width = clamp_t(u32, crop->width, CCDC_MIN_WIDTH, max_width)
  1620. & ~15;
  1621. crop->height = clamp_t(u32, crop->height, CCDC_MIN_HEIGHT,
  1622. sink->height - crop->top);
  1623. /* Odd width/height values don't make sense for Bayer formats. */
  1624. if (info->flavor != V4L2_MBUS_FMT_Y8_1X8) {
  1625. crop->width &= ~1;
  1626. crop->height &= ~1;
  1627. }
  1628. }
  1629. /*
  1630. * ccdc_enum_mbus_code - Handle pixel format enumeration
  1631. * @sd : pointer to v4l2 subdev structure
  1632. * @fh : V4L2 subdev file handle
  1633. * @code : pointer to v4l2_subdev_mbus_code_enum structure
  1634. * return -EINVAL or zero on success
  1635. */
  1636. static int ccdc_enum_mbus_code(struct v4l2_subdev *sd,
  1637. struct v4l2_subdev_fh *fh,
  1638. struct v4l2_subdev_mbus_code_enum *code)
  1639. {
  1640. struct isp_ccdc_device *ccdc = v4l2_get_subdevdata(sd);
  1641. struct v4l2_mbus_framefmt *format;
  1642. switch (code->pad) {
  1643. case CCDC_PAD_SINK:
  1644. if (code->index >= ARRAY_SIZE(ccdc_fmts))
  1645. return -EINVAL;
  1646. code->code = ccdc_fmts[code->index];
  1647. break;
  1648. case CCDC_PAD_SOURCE_OF:
  1649. format = __ccdc_get_format(ccdc, fh, code->pad,
  1650. V4L2_SUBDEV_FORMAT_TRY);
  1651. if (format->code == V4L2_MBUS_FMT_YUYV8_2X8 ||
  1652. format->code == V4L2_MBUS_FMT_UYVY8_2X8) {
  1653. /* In YUV mode the CCDC can swap bytes. */
  1654. if (code->index == 0)
  1655. code->code = V4L2_MBUS_FMT_YUYV8_1X16;
  1656. else if (code->index == 1)
  1657. code->code = V4L2_MBUS_FMT_UYVY8_1X16;
  1658. else
  1659. return -EINVAL;
  1660. } else {
  1661. /* In raw mode, no configurable format confversion is
  1662. * available.
  1663. */
  1664. if (code->index == 0)
  1665. code->code = format->code;
  1666. else
  1667. return -EINVAL;
  1668. }
  1669. break;
  1670. case CCDC_PAD_SOURCE_VP:
  1671. /* The CCDC supports no configurable format conversion
  1672. * compatible with the video port. Enumerate a single output
  1673. * format code.
  1674. */
  1675. if (code->index != 0)
  1676. return -EINVAL;
  1677. format = __ccdc_get_format(ccdc, fh, code->pad,
  1678. V4L2_SUBDEV_FORMAT_TRY);
  1679. /* A pixel code equal to 0 means that the video port doesn't
  1680. * support the input format. Don't enumerate any pixel code.
  1681. */
  1682. if (format->code == 0)
  1683. return -EINVAL;
  1684. code->code = format->code;
  1685. break;
  1686. default:
  1687. return -EINVAL;
  1688. }
  1689. return 0;
  1690. }
  1691. static int ccdc_enum_frame_size(struct v4l2_subdev *sd,
  1692. struct v4l2_subdev_fh *fh,
  1693. struct v4l2_subdev_frame_size_enum *fse)
  1694. {
  1695. struct isp_ccdc_device *ccdc = v4l2_get_subdevdata(sd);
  1696. struct v4l2_mbus_framefmt format;
  1697. if (fse->index != 0)
  1698. return -EINVAL;
  1699. format.code = fse->code;
  1700. format.width = 1;
  1701. format.height = 1;
  1702. ccdc_try_format(ccdc, fh, fse->pad, &format, V4L2_SUBDEV_FORMAT_TRY);
  1703. fse->min_width = format.width;
  1704. fse->min_height = format.height;
  1705. if (format.code != fse->code)
  1706. return -EINVAL;
  1707. format.code = fse->code;
  1708. format.width = -1;
  1709. format.height = -1;
  1710. ccdc_try_format(ccdc, fh, fse->pad, &format, V4L2_SUBDEV_FORMAT_TRY);
  1711. fse->max_width = format.width;
  1712. fse->max_height = format.height;
  1713. return 0;
  1714. }
  1715. /*
  1716. * ccdc_get_selection - Retrieve a selection rectangle on a pad
  1717. * @sd: ISP CCDC V4L2 subdevice
  1718. * @fh: V4L2 subdev file handle
  1719. * @sel: Selection rectangle
  1720. *
  1721. * The only supported rectangles are the crop rectangles on the output formatter
  1722. * source pad.
  1723. *
  1724. * Return 0 on success or a negative error code otherwise.
  1725. */
  1726. static int ccdc_get_selection(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh,
  1727. struct v4l2_subdev_selection *sel)
  1728. {
  1729. struct isp_ccdc_device *ccdc = v4l2_get_subdevdata(sd);
  1730. struct v4l2_mbus_framefmt *format;
  1731. if (sel->pad != CCDC_PAD_SOURCE_OF)
  1732. return -EINVAL;
  1733. switch (sel->target) {
  1734. case V4L2_SEL_TGT_CROP_BOUNDS:
  1735. sel->r.left = 0;
  1736. sel->r.top = 0;
  1737. sel->r.width = INT_MAX;
  1738. sel->r.height = INT_MAX;
  1739. format = __ccdc_get_format(ccdc, fh, CCDC_PAD_SINK, sel->which);
  1740. ccdc_try_crop(ccdc, format, &sel->r);
  1741. break;
  1742. case V4L2_SEL_TGT_CROP:
  1743. sel->r = *__ccdc_get_crop(ccdc, fh, sel->which);
  1744. break;
  1745. default:
  1746. return -EINVAL;
  1747. }
  1748. return 0;
  1749. }
  1750. /*
  1751. * ccdc_set_selection - Set a selection rectangle on a pad
  1752. * @sd: ISP CCDC V4L2 subdevice
  1753. * @fh: V4L2 subdev file handle
  1754. * @sel: Selection rectangle
  1755. *
  1756. * The only supported rectangle is the actual crop rectangle on the output
  1757. * formatter source pad.
  1758. *
  1759. * Return 0 on success or a negative error code otherwise.
  1760. */
  1761. static int ccdc_set_selection(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh,
  1762. struct v4l2_subdev_selection *sel)
  1763. {
  1764. struct isp_ccdc_device *ccdc = v4l2_get_subdevdata(sd);
  1765. struct v4l2_mbus_framefmt *format;
  1766. if (sel->target != V4L2_SEL_TGT_CROP ||
  1767. sel->pad != CCDC_PAD_SOURCE_OF)
  1768. return -EINVAL;
  1769. /* The crop rectangle can't be changed while streaming. */
  1770. if (ccdc->state != ISP_PIPELINE_STREAM_STOPPED)
  1771. return -EBUSY;
  1772. /* Modifying the crop rectangle always changes the format on the source
  1773. * pad. If the KEEP_CONFIG flag is set, just return the current crop
  1774. * rectangle.
  1775. */
  1776. if (sel->flags & V4L2_SEL_FLAG_KEEP_CONFIG) {
  1777. sel->r = *__ccdc_get_crop(ccdc, fh, sel->which);
  1778. return 0;
  1779. }
  1780. format = __ccdc_get_format(ccdc, fh, CCDC_PAD_SINK, sel->which);
  1781. ccdc_try_crop(ccdc, format, &sel->r);
  1782. *__ccdc_get_crop(ccdc, fh, sel->which) = sel->r;
  1783. /* Update the source format. */
  1784. format = __ccdc_get_format(ccdc, fh, CCDC_PAD_SOURCE_OF, sel->which);
  1785. ccdc_try_format(ccdc, fh, CCDC_PAD_SOURCE_OF, format, sel->which);
  1786. return 0;
  1787. }
  1788. /*
  1789. * ccdc_get_format - Retrieve the video format on a pad
  1790. * @sd : ISP CCDC V4L2 subdevice
  1791. * @fh : V4L2 subdev file handle
  1792. * @fmt: Format
  1793. *
  1794. * Return 0 on success or -EINVAL if the pad is invalid or doesn't correspond
  1795. * to the format type.
  1796. */
  1797. static int ccdc_get_format(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh,
  1798. struct v4l2_subdev_format *fmt)
  1799. {
  1800. struct isp_ccdc_device *ccdc = v4l2_get_subdevdata(sd);
  1801. struct v4l2_mbus_framefmt *format;
  1802. format = __ccdc_get_format(ccdc, fh, fmt->pad, fmt->which);
  1803. if (format == NULL)
  1804. return -EINVAL;
  1805. fmt->format = *format;
  1806. return 0;
  1807. }
  1808. /*
  1809. * ccdc_set_format - Set the video format on a pad
  1810. * @sd : ISP CCDC V4L2 subdevice
  1811. * @fh : V4L2 subdev file handle
  1812. * @fmt: Format
  1813. *
  1814. * Return 0 on success or -EINVAL if the pad is invalid or doesn't correspond
  1815. * to the format type.
  1816. */
  1817. static int ccdc_set_format(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh,
  1818. struct v4l2_subdev_format *fmt)
  1819. {
  1820. struct isp_ccdc_device *ccdc = v4l2_get_subdevdata(sd);
  1821. struct v4l2_mbus_framefmt *format;
  1822. struct v4l2_rect *crop;
  1823. format = __ccdc_get_format(ccdc, fh, fmt->pad, fmt->which);
  1824. if (format == NULL)
  1825. return -EINVAL;
  1826. ccdc_try_format(ccdc, fh, fmt->pad, &fmt->format, fmt->which);
  1827. *format = fmt->format;
  1828. /* Propagate the format from sink to source */
  1829. if (fmt->pad == CCDC_PAD_SINK) {
  1830. /* Reset the crop rectangle. */
  1831. crop = __ccdc_get_crop(ccdc, fh, fmt->which);
  1832. crop->left = 0;
  1833. crop->top = 0;
  1834. crop->width = fmt->format.width;
  1835. crop->height = fmt->format.height;
  1836. ccdc_try_crop(ccdc, &fmt->format, crop);
  1837. /* Update the source formats. */
  1838. format = __ccdc_get_format(ccdc, fh, CCDC_PAD_SOURCE_OF,
  1839. fmt->which);
  1840. *format = fmt->format;
  1841. ccdc_try_format(ccdc, fh, CCDC_PAD_SOURCE_OF, format,
  1842. fmt->which);
  1843. format = __ccdc_get_format(ccdc, fh, CCDC_PAD_SOURCE_VP,
  1844. fmt->which);
  1845. *format = fmt->format;
  1846. ccdc_try_format(ccdc, fh, CCDC_PAD_SOURCE_VP, format,
  1847. fmt->which);
  1848. }
  1849. return 0;
  1850. }
  1851. /*
  1852. * Decide whether desired output pixel code can be obtained with
  1853. * the lane shifter by shifting the input pixel code.
  1854. * @in: input pixelcode to shifter
  1855. * @out: output pixelcode from shifter
  1856. * @additional_shift: # of bits the sensor's LSB is offset from CAMEXT[0]
  1857. *
  1858. * return true if the combination is possible
  1859. * return false otherwise
  1860. */
  1861. static bool ccdc_is_shiftable(enum v4l2_mbus_pixelcode in,
  1862. enum v4l2_mbus_pixelcode out,
  1863. unsigned int additional_shift)
  1864. {
  1865. const struct isp_format_info *in_info, *out_info;
  1866. if (in == out)
  1867. return true;
  1868. in_info = omap3isp_video_format_info(in);
  1869. out_info = omap3isp_video_format_info(out);
  1870. if ((in_info->flavor == 0) || (out_info->flavor == 0))
  1871. return false;
  1872. if (in_info->flavor != out_info->flavor)
  1873. return false;
  1874. return in_info->width - out_info->width + additional_shift <= 6;
  1875. }
  1876. static int ccdc_link_validate(struct v4l2_subdev *sd,
  1877. struct media_link *link,
  1878. struct v4l2_subdev_format *source_fmt,
  1879. struct v4l2_subdev_format *sink_fmt)
  1880. {
  1881. struct isp_ccdc_device *ccdc = v4l2_get_subdevdata(sd);
  1882. unsigned long parallel_shift;
  1883. /* Check if the two ends match */
  1884. if (source_fmt->format.width != sink_fmt->format.width ||
  1885. source_fmt->format.height != sink_fmt->format.height)
  1886. return -EPIPE;
  1887. /* We've got a parallel sensor here. */
  1888. if (ccdc->input == CCDC_INPUT_PARALLEL) {
  1889. struct isp_parallel_platform_data *pdata =
  1890. &((struct isp_v4l2_subdevs_group *)
  1891. media_entity_to_v4l2_subdev(link->source->entity)
  1892. ->host_priv)->bus.parallel;
  1893. parallel_shift = pdata->data_lane_shift * 2;
  1894. } else {
  1895. parallel_shift = 0;
  1896. }
  1897. /* Lane shifter may be used to drop bits on CCDC sink pad */
  1898. if (!ccdc_is_shiftable(source_fmt->format.code,
  1899. sink_fmt->format.code, parallel_shift))
  1900. return -EPIPE;
  1901. return 0;
  1902. }
  1903. /*
  1904. * ccdc_init_formats - Initialize formats on all pads
  1905. * @sd: ISP CCDC V4L2 subdevice
  1906. * @fh: V4L2 subdev file handle
  1907. *
  1908. * Initialize all pad formats with default values. If fh is not NULL, try
  1909. * formats are initialized on the file handle. Otherwise active formats are
  1910. * initialized on the device.
  1911. */
  1912. static int ccdc_init_formats(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh)
  1913. {
  1914. struct v4l2_subdev_format format;
  1915. memset(&format, 0, sizeof(format));
  1916. format.pad = CCDC_PAD_SINK;
  1917. format.which = fh ? V4L2_SUBDEV_FORMAT_TRY : V4L2_SUBDEV_FORMAT_ACTIVE;
  1918. format.format.code = V4L2_MBUS_FMT_SGRBG10_1X10;
  1919. format.format.width = 4096;
  1920. format.format.height = 4096;
  1921. ccdc_set_format(sd, fh, &format);
  1922. return 0;
  1923. }
  1924. /* V4L2 subdev core operations */
  1925. static const struct v4l2_subdev_core_ops ccdc_v4l2_core_ops = {
  1926. .ioctl = ccdc_ioctl,
  1927. .subscribe_event = ccdc_subscribe_event,
  1928. .unsubscribe_event = ccdc_unsubscribe_event,
  1929. };
  1930. /* V4L2 subdev video operations */
  1931. static const struct v4l2_subdev_video_ops ccdc_v4l2_video_ops = {
  1932. .s_stream = ccdc_set_stream,
  1933. };
  1934. /* V4L2 subdev pad operations */
  1935. static const struct v4l2_subdev_pad_ops ccdc_v4l2_pad_ops = {
  1936. .enum_mbus_code = ccdc_enum_mbus_code,
  1937. .enum_frame_size = ccdc_enum_frame_size,
  1938. .get_fmt = ccdc_get_format,
  1939. .set_fmt = ccdc_set_format,
  1940. .get_selection = ccdc_get_selection,
  1941. .set_selection = ccdc_set_selection,
  1942. .link_validate = ccdc_link_validate,
  1943. };
  1944. /* V4L2 subdev operations */
  1945. static const struct v4l2_subdev_ops ccdc_v4l2_ops = {
  1946. .core = &ccdc_v4l2_core_ops,
  1947. .video = &ccdc_v4l2_video_ops,
  1948. .pad = &ccdc_v4l2_pad_ops,
  1949. };
  1950. /* V4L2 subdev internal operations */
  1951. static const struct v4l2_subdev_internal_ops ccdc_v4l2_internal_ops = {
  1952. .open = ccdc_init_formats,
  1953. };
  1954. /* -----------------------------------------------------------------------------
  1955. * Media entity operations
  1956. */
  1957. /*
  1958. * ccdc_link_setup - Setup CCDC connections
  1959. * @entity: CCDC media entity
  1960. * @local: Pad at the local end of the link
  1961. * @remote: Pad at the remote end of the link
  1962. * @flags: Link flags
  1963. *
  1964. * return -EINVAL or zero on success
  1965. */
  1966. static int ccdc_link_setup(struct media_entity *entity,
  1967. const struct media_pad *local,
  1968. const struct media_pad *remote, u32 flags)
  1969. {
  1970. struct v4l2_subdev *sd = media_entity_to_v4l2_subdev(entity);
  1971. struct isp_ccdc_device *ccdc = v4l2_get_subdevdata(sd);
  1972. struct isp_device *isp = to_isp_device(ccdc);
  1973. switch (local->index | media_entity_type(remote->entity)) {
  1974. case CCDC_PAD_SINK | MEDIA_ENT_T_V4L2_SUBDEV:
  1975. /* Read from the sensor (parallel interface), CCP2, CSI2a or
  1976. * CSI2c.
  1977. */
  1978. if (!(flags & MEDIA_LNK_FL_ENABLED)) {
  1979. ccdc->input = CCDC_INPUT_NONE;
  1980. break;
  1981. }
  1982. if (ccdc->input != CCDC_INPUT_NONE)
  1983. return -EBUSY;
  1984. if (remote->entity == &isp->isp_ccp2.subdev.entity)
  1985. ccdc->input = CCDC_INPUT_CCP2B;
  1986. else if (remote->entity == &isp->isp_csi2a.subdev.entity)
  1987. ccdc->input = CCDC_INPUT_CSI2A;
  1988. else if (remote->entity == &isp->isp_csi2c.subdev.entity)
  1989. ccdc->input = CCDC_INPUT_CSI2C;
  1990. else
  1991. ccdc->input = CCDC_INPUT_PARALLEL;
  1992. break;
  1993. /*
  1994. * The ISP core doesn't support pipelines with multiple video outputs.
  1995. * Revisit this when it will be implemented, and return -EBUSY for now.
  1996. */
  1997. case CCDC_PAD_SOURCE_VP | MEDIA_ENT_T_V4L2_SUBDEV:
  1998. /* Write to preview engine, histogram and H3A. When none of
  1999. * those links are active, the video port can be disabled.
  2000. */
  2001. if (flags & MEDIA_LNK_FL_ENABLED) {
  2002. if (ccdc->output & ~CCDC_OUTPUT_PREVIEW)
  2003. return -EBUSY;
  2004. ccdc->output |= CCDC_OUTPUT_PREVIEW;
  2005. } else {
  2006. ccdc->output &= ~CCDC_OUTPUT_PREVIEW;
  2007. }
  2008. break;
  2009. case CCDC_PAD_SOURCE_OF | MEDIA_ENT_T_DEVNODE:
  2010. /* Write to memory */
  2011. if (flags & MEDIA_LNK_FL_ENABLED) {
  2012. if (ccdc->output & ~CCDC_OUTPUT_MEMORY)
  2013. return -EBUSY;
  2014. ccdc->output |= CCDC_OUTPUT_MEMORY;
  2015. } else {
  2016. ccdc->output &= ~CCDC_OUTPUT_MEMORY;
  2017. }
  2018. break;
  2019. case CCDC_PAD_SOURCE_OF | MEDIA_ENT_T_V4L2_SUBDEV:
  2020. /* Write to resizer */
  2021. if (flags & MEDIA_LNK_FL_ENABLED) {
  2022. if (ccdc->output & ~CCDC_OUTPUT_RESIZER)
  2023. return -EBUSY;
  2024. ccdc->output |= CCDC_OUTPUT_RESIZER;
  2025. } else {
  2026. ccdc->output &= ~CCDC_OUTPUT_RESIZER;
  2027. }
  2028. break;
  2029. default:
  2030. return -EINVAL;
  2031. }
  2032. return 0;
  2033. }
  2034. /* media operations */
  2035. static const struct media_entity_operations ccdc_media_ops = {
  2036. .link_setup = ccdc_link_setup,
  2037. .link_validate = v4l2_subdev_link_validate,
  2038. };
  2039. void omap3isp_ccdc_unregister_entities(struct isp_ccdc_device *ccdc)
  2040. {
  2041. v4l2_device_unregister_subdev(&ccdc->subdev);
  2042. omap3isp_video_unregister(&ccdc->video_out);
  2043. }
  2044. int omap3isp_ccdc_register_entities(struct isp_ccdc_device *ccdc,
  2045. struct v4l2_device *vdev)
  2046. {
  2047. int ret;
  2048. /* Register the subdev and video node. */
  2049. ret = v4l2_device_register_subdev(vdev, &ccdc->subdev);
  2050. if (ret < 0)
  2051. goto error;
  2052. ret = omap3isp_video_register(&ccdc->video_out, vdev);
  2053. if (ret < 0)
  2054. goto error;
  2055. return 0;
  2056. error:
  2057. omap3isp_ccdc_unregister_entities(ccdc);
  2058. return ret;
  2059. }
  2060. /* -----------------------------------------------------------------------------
  2061. * ISP CCDC initialisation and cleanup
  2062. */
  2063. /*
  2064. * ccdc_init_entities - Initialize V4L2 subdev and media entity
  2065. * @ccdc: ISP CCDC module
  2066. *
  2067. * Return 0 on success and a negative error code on failure.
  2068. */
  2069. static int ccdc_init_entities(struct isp_ccdc_device *ccdc)
  2070. {
  2071. struct v4l2_subdev *sd = &ccdc->subdev;
  2072. struct media_pad *pads = ccdc->pads;
  2073. struct media_entity *me = &sd->entity;
  2074. int ret;
  2075. ccdc->input = CCDC_INPUT_NONE;
  2076. v4l2_subdev_init(sd, &ccdc_v4l2_ops);
  2077. sd->internal_ops = &ccdc_v4l2_internal_ops;
  2078. strlcpy(sd->name, "OMAP3 ISP CCDC", sizeof(sd->name));
  2079. sd->grp_id = 1 << 16; /* group ID for isp subdevs */
  2080. v4l2_set_subdevdata(sd, ccdc);
  2081. sd->flags |= V4L2_SUBDEV_FL_HAS_EVENTS | V4L2_SUBDEV_FL_HAS_DEVNODE;
  2082. pads[CCDC_PAD_SINK].flags = MEDIA_PAD_FL_SINK
  2083. | MEDIA_PAD_FL_MUST_CONNECT;
  2084. pads[CCDC_PAD_SOURCE_VP].flags = MEDIA_PAD_FL_SOURCE;
  2085. pads[CCDC_PAD_SOURCE_OF].flags = MEDIA_PAD_FL_SOURCE;
  2086. me->ops = &ccdc_media_ops;
  2087. ret = media_entity_init(me, CCDC_PADS_NUM, pads, 0);
  2088. if (ret < 0)
  2089. return ret;
  2090. ccdc_init_formats(sd, NULL);
  2091. ccdc->video_out.type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
  2092. ccdc->video_out.ops = &ccdc_video_ops;
  2093. ccdc->video_out.isp = to_isp_device(ccdc);
  2094. ccdc->video_out.capture_mem = PAGE_ALIGN(4096 * 4096) * 3;
  2095. ccdc->video_out.bpl_alignment = 32;
  2096. ret = omap3isp_video_init(&ccdc->video_out, "CCDC");
  2097. if (ret < 0)
  2098. goto error_video;
  2099. /* Connect the CCDC subdev to the video node. */
  2100. ret = media_entity_create_link(&ccdc->subdev.entity, CCDC_PAD_SOURCE_OF,
  2101. &ccdc->video_out.video.entity, 0, 0);
  2102. if (ret < 0)
  2103. goto error_link;
  2104. return 0;
  2105. error_link:
  2106. omap3isp_video_cleanup(&ccdc->video_out);
  2107. error_video:
  2108. media_entity_cleanup(me);
  2109. return ret;
  2110. }
  2111. /*
  2112. * omap3isp_ccdc_init - CCDC module initialization.
  2113. * @isp: Device pointer specific to the OMAP3 ISP.
  2114. *
  2115. * TODO: Get the initialisation values from platform data.
  2116. *
  2117. * Return 0 on success or a negative error code otherwise.
  2118. */
  2119. int omap3isp_ccdc_init(struct isp_device *isp)
  2120. {
  2121. struct isp_ccdc_device *ccdc = &isp->isp_ccdc;
  2122. int ret;
  2123. spin_lock_init(&ccdc->lock);
  2124. init_waitqueue_head(&ccdc->wait);
  2125. mutex_init(&ccdc->ioctl_lock);
  2126. ccdc->stopping = CCDC_STOP_NOT_REQUESTED;
  2127. INIT_WORK(&ccdc->lsc.table_work, ccdc_lsc_free_table_work);
  2128. ccdc->lsc.state = LSC_STATE_STOPPED;
  2129. INIT_LIST_HEAD(&ccdc->lsc.free_queue);
  2130. spin_lock_init(&ccdc->lsc.req_lock);
  2131. ccdc->clamp.oblen = 0;
  2132. ccdc->clamp.dcsubval = 0;
  2133. ccdc->update = OMAP3ISP_CCDC_BLCLAMP;
  2134. ccdc_apply_controls(ccdc);
  2135. ret = ccdc_init_entities(ccdc);
  2136. if (ret < 0) {
  2137. mutex_destroy(&ccdc->ioctl_lock);
  2138. return ret;
  2139. }
  2140. return 0;
  2141. }
  2142. /*
  2143. * omap3isp_ccdc_cleanup - CCDC module cleanup.
  2144. * @isp: Device pointer specific to the OMAP3 ISP.
  2145. */
  2146. void omap3isp_ccdc_cleanup(struct isp_device *isp)
  2147. {
  2148. struct isp_ccdc_device *ccdc = &isp->isp_ccdc;
  2149. omap3isp_video_cleanup(&ccdc->video_out);
  2150. media_entity_cleanup(&ccdc->subdev.entity);
  2151. /* Free LSC requests. As the CCDC is stopped there's no active request,
  2152. * so only the pending request and the free queue need to be handled.
  2153. */
  2154. ccdc_lsc_free_request(ccdc, ccdc->lsc.request);
  2155. cancel_work_sync(&ccdc->lsc.table_work);
  2156. ccdc_lsc_free_queue(ccdc, &ccdc->lsc.free_queue);
  2157. if (ccdc->fpc.addr != NULL)
  2158. dma_free_coherent(isp->dev, ccdc->fpc.fpnum * 4, ccdc->fpc.addr,
  2159. ccdc->fpc.dma);
  2160. mutex_destroy(&ccdc->ioctl_lock);
  2161. }