gpu_scheduler.c 25 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724725726727728729730731732733734735736737738739740741742743744745746747748749750751752753754755756757758759760761762763764765766767768769770771772773774775776777778779780781782783784785786787788789790791792793794795796797798799800801802803804805806807808809810811812813814815816817818819820821822823824825826827828829830831832833834835836837838839840841842843844845846847848849850851852853854855856857858859860861862863864865866867868869870871872873874875876877878879880881882883884885886887888889890891892893894895896897898899900901902903904905906907908909910911912913914915916917918919920921922923924925926927928929930
  1. /*
  2. * Copyright 2015 Advanced Micro Devices, Inc.
  3. *
  4. * Permission is hereby granted, free of charge, to any person obtaining a
  5. * copy of this software and associated documentation files (the "Software"),
  6. * to deal in the Software without restriction, including without limitation
  7. * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  8. * and/or sell copies of the Software, and to permit persons to whom the
  9. * Software is furnished to do so, subject to the following conditions:
  10. *
  11. * The above copyright notice and this permission notice shall be included in
  12. * all copies or substantial portions of the Software.
  13. *
  14. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  15. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  16. * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  17. * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  18. * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  19. * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  20. * OTHER DEALINGS IN THE SOFTWARE.
  21. *
  22. */
  23. /**
  24. * DOC: Overview
  25. *
  26. * The GPU scheduler provides entities which allow userspace to push jobs
  27. * into software queues which are then scheduled on a hardware run queue.
  28. * The software queues have a priority among them. The scheduler selects the entities
  29. * from the run queue using a FIFO. The scheduler provides dependency handling
  30. * features among jobs. The driver is supposed to provide callback functions for
  31. * backend operations to the scheduler like submitting a job to hardware run queue,
  32. * returning the dependencies of a job etc.
  33. *
  34. * The organisation of the scheduler is the following:
  35. *
  36. * 1. Each hw run queue has one scheduler
  37. * 2. Each scheduler has multiple run queues with different priorities
  38. * (e.g., HIGH_HW,HIGH_SW, KERNEL, NORMAL)
  39. * 3. Each scheduler run queue has a queue of entities to schedule
  40. * 4. Entities themselves maintain a queue of jobs that will be scheduled on
  41. * the hardware.
  42. *
  43. * The jobs in a entity are always scheduled in the order that they were pushed.
  44. */
  45. #include <linux/kthread.h>
  46. #include <linux/wait.h>
  47. #include <linux/sched.h>
  48. #include <uapi/linux/sched/types.h>
  49. #include <drm/drmP.h>
  50. #include <drm/gpu_scheduler.h>
  51. #include <drm/spsc_queue.h>
  52. #define CREATE_TRACE_POINTS
  53. #include "gpu_scheduler_trace.h"
  54. #define to_drm_sched_job(sched_job) \
  55. container_of((sched_job), struct drm_sched_job, queue_node)
  56. static bool drm_sched_entity_is_ready(struct drm_sched_entity *entity);
  57. static void drm_sched_wakeup(struct drm_gpu_scheduler *sched);
  58. static void drm_sched_process_job(struct dma_fence *f, struct dma_fence_cb *cb);
  59. /**
  60. * drm_sched_rq_init - initialize a given run queue struct
  61. *
  62. * @rq: scheduler run queue
  63. *
  64. * Initializes a scheduler runqueue.
  65. */
  66. static void drm_sched_rq_init(struct drm_sched_rq *rq)
  67. {
  68. spin_lock_init(&rq->lock);
  69. INIT_LIST_HEAD(&rq->entities);
  70. rq->current_entity = NULL;
  71. }
  72. /**
  73. * drm_sched_rq_add_entity - add an entity
  74. *
  75. * @rq: scheduler run queue
  76. * @entity: scheduler entity
  77. *
  78. * Adds a scheduler entity to the run queue.
  79. */
  80. static void drm_sched_rq_add_entity(struct drm_sched_rq *rq,
  81. struct drm_sched_entity *entity)
  82. {
  83. if (!list_empty(&entity->list))
  84. return;
  85. spin_lock(&rq->lock);
  86. list_add_tail(&entity->list, &rq->entities);
  87. spin_unlock(&rq->lock);
  88. }
  89. /**
  90. * drm_sched_rq_remove_entity - remove an entity
  91. *
  92. * @rq: scheduler run queue
  93. * @entity: scheduler entity
  94. *
  95. * Removes a scheduler entity from the run queue.
  96. */
  97. static void drm_sched_rq_remove_entity(struct drm_sched_rq *rq,
  98. struct drm_sched_entity *entity)
  99. {
  100. if (list_empty(&entity->list))
  101. return;
  102. spin_lock(&rq->lock);
  103. list_del_init(&entity->list);
  104. if (rq->current_entity == entity)
  105. rq->current_entity = NULL;
  106. spin_unlock(&rq->lock);
  107. }
  108. /**
  109. * drm_sched_rq_select_entity - Select an entity which could provide a job to run
  110. *
  111. * @rq: scheduler run queue to check.
  112. *
  113. * Try to find a ready entity, returns NULL if none found.
  114. */
  115. static struct drm_sched_entity *
  116. drm_sched_rq_select_entity(struct drm_sched_rq *rq)
  117. {
  118. struct drm_sched_entity *entity;
  119. spin_lock(&rq->lock);
  120. entity = rq->current_entity;
  121. if (entity) {
  122. list_for_each_entry_continue(entity, &rq->entities, list) {
  123. if (drm_sched_entity_is_ready(entity)) {
  124. rq->current_entity = entity;
  125. spin_unlock(&rq->lock);
  126. return entity;
  127. }
  128. }
  129. }
  130. list_for_each_entry(entity, &rq->entities, list) {
  131. if (drm_sched_entity_is_ready(entity)) {
  132. rq->current_entity = entity;
  133. spin_unlock(&rq->lock);
  134. return entity;
  135. }
  136. if (entity == rq->current_entity)
  137. break;
  138. }
  139. spin_unlock(&rq->lock);
  140. return NULL;
  141. }
  142. /**
  143. * drm_sched_entity_init - Init a context entity used by scheduler when
  144. * submit to HW ring.
  145. *
  146. * @sched: scheduler instance
  147. * @entity: scheduler entity to init
  148. * @rq: the run queue this entity belongs
  149. * @guilty: atomic_t set to 1 when a job on this queue
  150. * is found to be guilty causing a timeout
  151. *
  152. * Returns 0 on success or a negative error code on failure.
  153. */
  154. int drm_sched_entity_init(struct drm_gpu_scheduler *sched,
  155. struct drm_sched_entity *entity,
  156. struct drm_sched_rq *rq,
  157. atomic_t *guilty)
  158. {
  159. if (!(sched && entity && rq))
  160. return -EINVAL;
  161. memset(entity, 0, sizeof(struct drm_sched_entity));
  162. INIT_LIST_HEAD(&entity->list);
  163. entity->rq = rq;
  164. entity->sched = sched;
  165. entity->guilty = guilty;
  166. entity->fini_status = 0;
  167. entity->last_scheduled = NULL;
  168. spin_lock_init(&entity->rq_lock);
  169. spsc_queue_init(&entity->job_queue);
  170. atomic_set(&entity->fence_seq, 0);
  171. entity->fence_context = dma_fence_context_alloc(2);
  172. return 0;
  173. }
  174. EXPORT_SYMBOL(drm_sched_entity_init);
  175. /**
  176. * drm_sched_entity_is_initialized - Query if entity is initialized
  177. *
  178. * @sched: Pointer to scheduler instance
  179. * @entity: The pointer to a valid scheduler entity
  180. *
  181. * return true if entity is initialized, false otherwise
  182. */
  183. static bool drm_sched_entity_is_initialized(struct drm_gpu_scheduler *sched,
  184. struct drm_sched_entity *entity)
  185. {
  186. return entity->sched == sched &&
  187. entity->rq != NULL;
  188. }
  189. /**
  190. * drm_sched_entity_is_idle - Check if entity is idle
  191. *
  192. * @entity: scheduler entity
  193. *
  194. * Returns true if the entity does not have any unscheduled jobs.
  195. */
  196. static bool drm_sched_entity_is_idle(struct drm_sched_entity *entity)
  197. {
  198. rmb();
  199. if (spsc_queue_peek(&entity->job_queue) == NULL)
  200. return true;
  201. return false;
  202. }
  203. /**
  204. * drm_sched_entity_is_ready - Check if entity is ready
  205. *
  206. * @entity: scheduler entity
  207. *
  208. * Return true if entity could provide a job.
  209. */
  210. static bool drm_sched_entity_is_ready(struct drm_sched_entity *entity)
  211. {
  212. if (spsc_queue_peek(&entity->job_queue) == NULL)
  213. return false;
  214. if (READ_ONCE(entity->dependency))
  215. return false;
  216. return true;
  217. }
  218. static void drm_sched_entity_kill_jobs_cb(struct dma_fence *f,
  219. struct dma_fence_cb *cb)
  220. {
  221. struct drm_sched_job *job = container_of(cb, struct drm_sched_job,
  222. finish_cb);
  223. drm_sched_fence_finished(job->s_fence);
  224. WARN_ON(job->s_fence->parent);
  225. dma_fence_put(&job->s_fence->finished);
  226. job->sched->ops->free_job(job);
  227. }
  228. /**
  229. * drm_sched_entity_do_release - Destroy a context entity
  230. *
  231. * @sched: scheduler instance
  232. * @entity: scheduler entity
  233. *
  234. * Splitting drm_sched_entity_fini() into two functions, The first one does the waiting,
  235. * removes the entity from the runqueue and returns an error when the process was killed.
  236. */
  237. void drm_sched_entity_do_release(struct drm_gpu_scheduler *sched,
  238. struct drm_sched_entity *entity)
  239. {
  240. if (!drm_sched_entity_is_initialized(sched, entity))
  241. return;
  242. /**
  243. * The client will not queue more IBs during this fini, consume existing
  244. * queued IBs or discard them on SIGKILL
  245. */
  246. if ((current->flags & PF_SIGNALED) && current->exit_code == SIGKILL)
  247. entity->fini_status = -ERESTARTSYS;
  248. else
  249. entity->fini_status = wait_event_killable(sched->job_scheduled,
  250. drm_sched_entity_is_idle(entity));
  251. drm_sched_entity_set_rq(entity, NULL);
  252. }
  253. EXPORT_SYMBOL(drm_sched_entity_do_release);
  254. /**
  255. * drm_sched_entity_cleanup - Destroy a context entity
  256. *
  257. * @sched: scheduler instance
  258. * @entity: scheduler entity
  259. *
  260. * This should be called after @drm_sched_entity_do_release. It goes over the
  261. * entity and signals all jobs with an error code if the process was killed.
  262. */
  263. void drm_sched_entity_cleanup(struct drm_gpu_scheduler *sched,
  264. struct drm_sched_entity *entity)
  265. {
  266. if (entity->fini_status) {
  267. struct drm_sched_job *job;
  268. int r;
  269. /* Park the kernel for a moment to make sure it isn't processing
  270. * our enity.
  271. */
  272. kthread_park(sched->thread);
  273. kthread_unpark(sched->thread);
  274. if (entity->dependency) {
  275. dma_fence_remove_callback(entity->dependency,
  276. &entity->cb);
  277. dma_fence_put(entity->dependency);
  278. entity->dependency = NULL;
  279. }
  280. while ((job = to_drm_sched_job(spsc_queue_pop(&entity->job_queue)))) {
  281. struct drm_sched_fence *s_fence = job->s_fence;
  282. drm_sched_fence_scheduled(s_fence);
  283. dma_fence_set_error(&s_fence->finished, -ESRCH);
  284. r = dma_fence_add_callback(entity->last_scheduled, &job->finish_cb,
  285. drm_sched_entity_kill_jobs_cb);
  286. if (r == -ENOENT)
  287. drm_sched_entity_kill_jobs_cb(NULL, &job->finish_cb);
  288. else if (r)
  289. DRM_ERROR("fence add callback failed (%d)\n", r);
  290. }
  291. }
  292. dma_fence_put(entity->last_scheduled);
  293. entity->last_scheduled = NULL;
  294. }
  295. EXPORT_SYMBOL(drm_sched_entity_cleanup);
  296. /**
  297. * drm_sched_entity_fini - Destroy a context entity
  298. *
  299. * @sched: scheduler instance
  300. * @entity: scheduler entity
  301. *
  302. * Calls drm_sched_entity_do_release() and drm_sched_entity_cleanup()
  303. */
  304. void drm_sched_entity_fini(struct drm_gpu_scheduler *sched,
  305. struct drm_sched_entity *entity)
  306. {
  307. drm_sched_entity_do_release(sched, entity);
  308. drm_sched_entity_cleanup(sched, entity);
  309. }
  310. EXPORT_SYMBOL(drm_sched_entity_fini);
  311. static void drm_sched_entity_wakeup(struct dma_fence *f, struct dma_fence_cb *cb)
  312. {
  313. struct drm_sched_entity *entity =
  314. container_of(cb, struct drm_sched_entity, cb);
  315. entity->dependency = NULL;
  316. dma_fence_put(f);
  317. drm_sched_wakeup(entity->sched);
  318. }
  319. static void drm_sched_entity_clear_dep(struct dma_fence *f, struct dma_fence_cb *cb)
  320. {
  321. struct drm_sched_entity *entity =
  322. container_of(cb, struct drm_sched_entity, cb);
  323. entity->dependency = NULL;
  324. dma_fence_put(f);
  325. }
  326. /**
  327. * drm_sched_entity_set_rq - Sets the run queue for an entity
  328. *
  329. * @entity: scheduler entity
  330. * @rq: scheduler run queue
  331. *
  332. * Sets the run queue for an entity and removes the entity from the previous
  333. * run queue in which was present.
  334. */
  335. void drm_sched_entity_set_rq(struct drm_sched_entity *entity,
  336. struct drm_sched_rq *rq)
  337. {
  338. if (entity->rq == rq)
  339. return;
  340. spin_lock(&entity->rq_lock);
  341. if (entity->rq)
  342. drm_sched_rq_remove_entity(entity->rq, entity);
  343. entity->rq = rq;
  344. if (rq)
  345. drm_sched_rq_add_entity(rq, entity);
  346. spin_unlock(&entity->rq_lock);
  347. }
  348. EXPORT_SYMBOL(drm_sched_entity_set_rq);
  349. /**
  350. * drm_sched_dependency_optimized
  351. *
  352. * @fence: the dependency fence
  353. * @entity: the entity which depends on the above fence
  354. *
  355. * Returns true if the dependency can be optimized and false otherwise
  356. */
  357. bool drm_sched_dependency_optimized(struct dma_fence* fence,
  358. struct drm_sched_entity *entity)
  359. {
  360. struct drm_gpu_scheduler *sched = entity->sched;
  361. struct drm_sched_fence *s_fence;
  362. if (!fence || dma_fence_is_signaled(fence))
  363. return false;
  364. if (fence->context == entity->fence_context)
  365. return true;
  366. s_fence = to_drm_sched_fence(fence);
  367. if (s_fence && s_fence->sched == sched)
  368. return true;
  369. return false;
  370. }
  371. EXPORT_SYMBOL(drm_sched_dependency_optimized);
  372. static bool drm_sched_entity_add_dependency_cb(struct drm_sched_entity *entity)
  373. {
  374. struct drm_gpu_scheduler *sched = entity->sched;
  375. struct dma_fence * fence = entity->dependency;
  376. struct drm_sched_fence *s_fence;
  377. if (fence->context == entity->fence_context ||
  378. fence->context == entity->fence_context + 1) {
  379. /*
  380. * Fence is a scheduled/finished fence from a job
  381. * which belongs to the same entity, we can ignore
  382. * fences from ourself
  383. */
  384. dma_fence_put(entity->dependency);
  385. return false;
  386. }
  387. s_fence = to_drm_sched_fence(fence);
  388. if (s_fence && s_fence->sched == sched) {
  389. /*
  390. * Fence is from the same scheduler, only need to wait for
  391. * it to be scheduled
  392. */
  393. fence = dma_fence_get(&s_fence->scheduled);
  394. dma_fence_put(entity->dependency);
  395. entity->dependency = fence;
  396. if (!dma_fence_add_callback(fence, &entity->cb,
  397. drm_sched_entity_clear_dep))
  398. return true;
  399. /* Ignore it when it is already scheduled */
  400. dma_fence_put(fence);
  401. return false;
  402. }
  403. if (!dma_fence_add_callback(entity->dependency, &entity->cb,
  404. drm_sched_entity_wakeup))
  405. return true;
  406. dma_fence_put(entity->dependency);
  407. return false;
  408. }
  409. static struct drm_sched_job *
  410. drm_sched_entity_pop_job(struct drm_sched_entity *entity)
  411. {
  412. struct drm_gpu_scheduler *sched = entity->sched;
  413. struct drm_sched_job *sched_job = to_drm_sched_job(
  414. spsc_queue_peek(&entity->job_queue));
  415. if (!sched_job)
  416. return NULL;
  417. while ((entity->dependency = sched->ops->dependency(sched_job, entity)))
  418. if (drm_sched_entity_add_dependency_cb(entity))
  419. return NULL;
  420. /* skip jobs from entity that marked guilty */
  421. if (entity->guilty && atomic_read(entity->guilty))
  422. dma_fence_set_error(&sched_job->s_fence->finished, -ECANCELED);
  423. dma_fence_put(entity->last_scheduled);
  424. entity->last_scheduled = dma_fence_get(&sched_job->s_fence->finished);
  425. spsc_queue_pop(&entity->job_queue);
  426. return sched_job;
  427. }
  428. /**
  429. * drm_sched_entity_push_job - Submit a job to the entity's job queue
  430. *
  431. * @sched_job: job to submit
  432. * @entity: scheduler entity
  433. *
  434. * Note: To guarantee that the order of insertion to queue matches
  435. * the job's fence sequence number this function should be
  436. * called with drm_sched_job_init under common lock.
  437. *
  438. * Returns 0 for success, negative error code otherwise.
  439. */
  440. void drm_sched_entity_push_job(struct drm_sched_job *sched_job,
  441. struct drm_sched_entity *entity)
  442. {
  443. struct drm_gpu_scheduler *sched = sched_job->sched;
  444. bool first = false;
  445. trace_drm_sched_job(sched_job, entity);
  446. first = spsc_queue_push(&entity->job_queue, &sched_job->queue_node);
  447. /* first job wakes up scheduler */
  448. if (first) {
  449. /* Add the entity to the run queue */
  450. spin_lock(&entity->rq_lock);
  451. drm_sched_rq_add_entity(entity->rq, entity);
  452. spin_unlock(&entity->rq_lock);
  453. drm_sched_wakeup(sched);
  454. }
  455. }
  456. EXPORT_SYMBOL(drm_sched_entity_push_job);
  457. /* job_finish is called after hw fence signaled
  458. */
  459. static void drm_sched_job_finish(struct work_struct *work)
  460. {
  461. struct drm_sched_job *s_job = container_of(work, struct drm_sched_job,
  462. finish_work);
  463. struct drm_gpu_scheduler *sched = s_job->sched;
  464. /* remove job from ring_mirror_list */
  465. spin_lock(&sched->job_list_lock);
  466. list_del_init(&s_job->node);
  467. if (sched->timeout != MAX_SCHEDULE_TIMEOUT) {
  468. struct drm_sched_job *next;
  469. spin_unlock(&sched->job_list_lock);
  470. cancel_delayed_work_sync(&s_job->work_tdr);
  471. spin_lock(&sched->job_list_lock);
  472. /* queue TDR for next job */
  473. next = list_first_entry_or_null(&sched->ring_mirror_list,
  474. struct drm_sched_job, node);
  475. if (next)
  476. schedule_delayed_work(&next->work_tdr, sched->timeout);
  477. }
  478. spin_unlock(&sched->job_list_lock);
  479. dma_fence_put(&s_job->s_fence->finished);
  480. sched->ops->free_job(s_job);
  481. }
  482. static void drm_sched_job_finish_cb(struct dma_fence *f,
  483. struct dma_fence_cb *cb)
  484. {
  485. struct drm_sched_job *job = container_of(cb, struct drm_sched_job,
  486. finish_cb);
  487. schedule_work(&job->finish_work);
  488. }
  489. static void drm_sched_job_begin(struct drm_sched_job *s_job)
  490. {
  491. struct drm_gpu_scheduler *sched = s_job->sched;
  492. dma_fence_add_callback(&s_job->s_fence->finished, &s_job->finish_cb,
  493. drm_sched_job_finish_cb);
  494. spin_lock(&sched->job_list_lock);
  495. list_add_tail(&s_job->node, &sched->ring_mirror_list);
  496. if (sched->timeout != MAX_SCHEDULE_TIMEOUT &&
  497. list_first_entry_or_null(&sched->ring_mirror_list,
  498. struct drm_sched_job, node) == s_job)
  499. schedule_delayed_work(&s_job->work_tdr, sched->timeout);
  500. spin_unlock(&sched->job_list_lock);
  501. }
  502. static void drm_sched_job_timedout(struct work_struct *work)
  503. {
  504. struct drm_sched_job *job = container_of(work, struct drm_sched_job,
  505. work_tdr.work);
  506. job->sched->ops->timedout_job(job);
  507. }
  508. /**
  509. * drm_sched_hw_job_reset - stop the scheduler if it contains the bad job
  510. *
  511. * @sched: scheduler instance
  512. * @bad: bad scheduler job
  513. *
  514. */
  515. void drm_sched_hw_job_reset(struct drm_gpu_scheduler *sched, struct drm_sched_job *bad)
  516. {
  517. struct drm_sched_job *s_job;
  518. struct drm_sched_entity *entity, *tmp;
  519. int i;
  520. spin_lock(&sched->job_list_lock);
  521. list_for_each_entry_reverse(s_job, &sched->ring_mirror_list, node) {
  522. if (s_job->s_fence->parent &&
  523. dma_fence_remove_callback(s_job->s_fence->parent,
  524. &s_job->s_fence->cb)) {
  525. dma_fence_put(s_job->s_fence->parent);
  526. s_job->s_fence->parent = NULL;
  527. atomic_dec(&sched->hw_rq_count);
  528. }
  529. }
  530. spin_unlock(&sched->job_list_lock);
  531. if (bad && bad->s_priority != DRM_SCHED_PRIORITY_KERNEL) {
  532. atomic_inc(&bad->karma);
  533. /* don't increase @bad's karma if it's from KERNEL RQ,
  534. * becuase sometimes GPU hang would cause kernel jobs (like VM updating jobs)
  535. * corrupt but keep in mind that kernel jobs always considered good.
  536. */
  537. for (i = DRM_SCHED_PRIORITY_MIN; i < DRM_SCHED_PRIORITY_KERNEL; i++ ) {
  538. struct drm_sched_rq *rq = &sched->sched_rq[i];
  539. spin_lock(&rq->lock);
  540. list_for_each_entry_safe(entity, tmp, &rq->entities, list) {
  541. if (bad->s_fence->scheduled.context == entity->fence_context) {
  542. if (atomic_read(&bad->karma) > bad->sched->hang_limit)
  543. if (entity->guilty)
  544. atomic_set(entity->guilty, 1);
  545. break;
  546. }
  547. }
  548. spin_unlock(&rq->lock);
  549. if (&entity->list != &rq->entities)
  550. break;
  551. }
  552. }
  553. }
  554. EXPORT_SYMBOL(drm_sched_hw_job_reset);
  555. /**
  556. * drm_sched_job_recovery - recover jobs after a reset
  557. *
  558. * @sched: scheduler instance
  559. *
  560. */
  561. void drm_sched_job_recovery(struct drm_gpu_scheduler *sched)
  562. {
  563. struct drm_sched_job *s_job, *tmp;
  564. bool found_guilty = false;
  565. int r;
  566. spin_lock(&sched->job_list_lock);
  567. s_job = list_first_entry_or_null(&sched->ring_mirror_list,
  568. struct drm_sched_job, node);
  569. if (s_job && sched->timeout != MAX_SCHEDULE_TIMEOUT)
  570. schedule_delayed_work(&s_job->work_tdr, sched->timeout);
  571. list_for_each_entry_safe(s_job, tmp, &sched->ring_mirror_list, node) {
  572. struct drm_sched_fence *s_fence = s_job->s_fence;
  573. struct dma_fence *fence;
  574. uint64_t guilty_context;
  575. if (!found_guilty && atomic_read(&s_job->karma) > sched->hang_limit) {
  576. found_guilty = true;
  577. guilty_context = s_job->s_fence->scheduled.context;
  578. }
  579. if (found_guilty && s_job->s_fence->scheduled.context == guilty_context)
  580. dma_fence_set_error(&s_fence->finished, -ECANCELED);
  581. spin_unlock(&sched->job_list_lock);
  582. fence = sched->ops->run_job(s_job);
  583. atomic_inc(&sched->hw_rq_count);
  584. if (fence) {
  585. s_fence->parent = dma_fence_get(fence);
  586. r = dma_fence_add_callback(fence, &s_fence->cb,
  587. drm_sched_process_job);
  588. if (r == -ENOENT)
  589. drm_sched_process_job(fence, &s_fence->cb);
  590. else if (r)
  591. DRM_ERROR("fence add callback failed (%d)\n",
  592. r);
  593. dma_fence_put(fence);
  594. } else {
  595. drm_sched_process_job(NULL, &s_fence->cb);
  596. }
  597. spin_lock(&sched->job_list_lock);
  598. }
  599. spin_unlock(&sched->job_list_lock);
  600. }
  601. EXPORT_SYMBOL(drm_sched_job_recovery);
  602. /**
  603. * drm_sched_job_init - init a scheduler job
  604. *
  605. * @job: scheduler job to init
  606. * @sched: scheduler instance
  607. * @entity: scheduler entity to use
  608. * @owner: job owner for debugging
  609. *
  610. * Refer to drm_sched_entity_push_job() documentation
  611. * for locking considerations.
  612. *
  613. * Returns 0 for success, negative error code otherwise.
  614. */
  615. int drm_sched_job_init(struct drm_sched_job *job,
  616. struct drm_gpu_scheduler *sched,
  617. struct drm_sched_entity *entity,
  618. void *owner)
  619. {
  620. job->sched = sched;
  621. job->entity = entity;
  622. job->s_priority = entity->rq - sched->sched_rq;
  623. job->s_fence = drm_sched_fence_create(entity, owner);
  624. if (!job->s_fence)
  625. return -ENOMEM;
  626. job->id = atomic64_inc_return(&sched->job_id_count);
  627. INIT_WORK(&job->finish_work, drm_sched_job_finish);
  628. INIT_LIST_HEAD(&job->node);
  629. INIT_DELAYED_WORK(&job->work_tdr, drm_sched_job_timedout);
  630. return 0;
  631. }
  632. EXPORT_SYMBOL(drm_sched_job_init);
  633. /**
  634. * drm_sched_ready - is the scheduler ready
  635. *
  636. * @sched: scheduler instance
  637. *
  638. * Return true if we can push more jobs to the hw, otherwise false.
  639. */
  640. static bool drm_sched_ready(struct drm_gpu_scheduler *sched)
  641. {
  642. return atomic_read(&sched->hw_rq_count) <
  643. sched->hw_submission_limit;
  644. }
  645. /**
  646. * drm_sched_wakeup - Wake up the scheduler when it is ready
  647. *
  648. * @sched: scheduler instance
  649. *
  650. */
  651. static void drm_sched_wakeup(struct drm_gpu_scheduler *sched)
  652. {
  653. if (drm_sched_ready(sched))
  654. wake_up_interruptible(&sched->wake_up_worker);
  655. }
  656. /**
  657. * drm_sched_select_entity - Select next entity to process
  658. *
  659. * @sched: scheduler instance
  660. *
  661. * Returns the entity to process or NULL if none are found.
  662. */
  663. static struct drm_sched_entity *
  664. drm_sched_select_entity(struct drm_gpu_scheduler *sched)
  665. {
  666. struct drm_sched_entity *entity;
  667. int i;
  668. if (!drm_sched_ready(sched))
  669. return NULL;
  670. /* Kernel run queue has higher priority than normal run queue*/
  671. for (i = DRM_SCHED_PRIORITY_MAX - 1; i >= DRM_SCHED_PRIORITY_MIN; i--) {
  672. entity = drm_sched_rq_select_entity(&sched->sched_rq[i]);
  673. if (entity)
  674. break;
  675. }
  676. return entity;
  677. }
  678. /**
  679. * drm_sched_process_job - process a job
  680. *
  681. * @f: fence
  682. * @cb: fence callbacks
  683. *
  684. * Called after job has finished execution.
  685. */
  686. static void drm_sched_process_job(struct dma_fence *f, struct dma_fence_cb *cb)
  687. {
  688. struct drm_sched_fence *s_fence =
  689. container_of(cb, struct drm_sched_fence, cb);
  690. struct drm_gpu_scheduler *sched = s_fence->sched;
  691. dma_fence_get(&s_fence->finished);
  692. atomic_dec(&sched->hw_rq_count);
  693. drm_sched_fence_finished(s_fence);
  694. trace_drm_sched_process_job(s_fence);
  695. dma_fence_put(&s_fence->finished);
  696. wake_up_interruptible(&sched->wake_up_worker);
  697. }
  698. /**
  699. * drm_sched_blocked - check if the scheduler is blocked
  700. *
  701. * @sched: scheduler instance
  702. *
  703. * Returns true if blocked, otherwise false.
  704. */
  705. static bool drm_sched_blocked(struct drm_gpu_scheduler *sched)
  706. {
  707. if (kthread_should_park()) {
  708. kthread_parkme();
  709. return true;
  710. }
  711. return false;
  712. }
  713. /**
  714. * drm_sched_main - main scheduler thread
  715. *
  716. * @param: scheduler instance
  717. *
  718. * Returns 0.
  719. */
  720. static int drm_sched_main(void *param)
  721. {
  722. struct sched_param sparam = {.sched_priority = 1};
  723. struct drm_gpu_scheduler *sched = (struct drm_gpu_scheduler *)param;
  724. int r;
  725. sched_setscheduler(current, SCHED_FIFO, &sparam);
  726. while (!kthread_should_stop()) {
  727. struct drm_sched_entity *entity = NULL;
  728. struct drm_sched_fence *s_fence;
  729. struct drm_sched_job *sched_job;
  730. struct dma_fence *fence;
  731. wait_event_interruptible(sched->wake_up_worker,
  732. (!drm_sched_blocked(sched) &&
  733. (entity = drm_sched_select_entity(sched))) ||
  734. kthread_should_stop());
  735. if (!entity)
  736. continue;
  737. sched_job = drm_sched_entity_pop_job(entity);
  738. if (!sched_job)
  739. continue;
  740. s_fence = sched_job->s_fence;
  741. atomic_inc(&sched->hw_rq_count);
  742. drm_sched_job_begin(sched_job);
  743. fence = sched->ops->run_job(sched_job);
  744. drm_sched_fence_scheduled(s_fence);
  745. if (fence) {
  746. s_fence->parent = dma_fence_get(fence);
  747. r = dma_fence_add_callback(fence, &s_fence->cb,
  748. drm_sched_process_job);
  749. if (r == -ENOENT)
  750. drm_sched_process_job(fence, &s_fence->cb);
  751. else if (r)
  752. DRM_ERROR("fence add callback failed (%d)\n",
  753. r);
  754. dma_fence_put(fence);
  755. } else {
  756. drm_sched_process_job(NULL, &s_fence->cb);
  757. }
  758. wake_up(&sched->job_scheduled);
  759. }
  760. return 0;
  761. }
  762. /**
  763. * drm_sched_init - Init a gpu scheduler instance
  764. *
  765. * @sched: scheduler instance
  766. * @ops: backend operations for this scheduler
  767. * @hw_submission: number of hw submissions that can be in flight
  768. * @hang_limit: number of times to allow a job to hang before dropping it
  769. * @timeout: timeout value in jiffies for the scheduler
  770. * @name: name used for debugging
  771. *
  772. * Return 0 on success, otherwise error code.
  773. */
  774. int drm_sched_init(struct drm_gpu_scheduler *sched,
  775. const struct drm_sched_backend_ops *ops,
  776. unsigned hw_submission,
  777. unsigned hang_limit,
  778. long timeout,
  779. const char *name)
  780. {
  781. int i;
  782. sched->ops = ops;
  783. sched->hw_submission_limit = hw_submission;
  784. sched->name = name;
  785. sched->timeout = timeout;
  786. sched->hang_limit = hang_limit;
  787. for (i = DRM_SCHED_PRIORITY_MIN; i < DRM_SCHED_PRIORITY_MAX; i++)
  788. drm_sched_rq_init(&sched->sched_rq[i]);
  789. init_waitqueue_head(&sched->wake_up_worker);
  790. init_waitqueue_head(&sched->job_scheduled);
  791. INIT_LIST_HEAD(&sched->ring_mirror_list);
  792. spin_lock_init(&sched->job_list_lock);
  793. atomic_set(&sched->hw_rq_count, 0);
  794. atomic64_set(&sched->job_id_count, 0);
  795. /* Each scheduler will run on a seperate kernel thread */
  796. sched->thread = kthread_run(drm_sched_main, sched, sched->name);
  797. if (IS_ERR(sched->thread)) {
  798. DRM_ERROR("Failed to create scheduler for %s.\n", name);
  799. return PTR_ERR(sched->thread);
  800. }
  801. return 0;
  802. }
  803. EXPORT_SYMBOL(drm_sched_init);
  804. /**
  805. * drm_sched_fini - Destroy a gpu scheduler
  806. *
  807. * @sched: scheduler instance
  808. *
  809. * Tears down and cleans up the scheduler.
  810. */
  811. void drm_sched_fini(struct drm_gpu_scheduler *sched)
  812. {
  813. if (sched->thread)
  814. kthread_stop(sched->thread);
  815. }
  816. EXPORT_SYMBOL(drm_sched_fini);